Systems and methods for cobalt metallization

Abstract

To provide systems and methods for depositing a TiN liner layer and a cobalt seed layer on a semiconductor wafer in a cobalt metallization process.SOLUTION: In a method of cooling a wafer after deposition of a TiN liner layer and / or a cobalt seed layer, the TiN liner layer and cobalt seed layer are deposited in process modules that are part of a semiconductor processing apparatus that also includes one or more modules for cooling the substrate. The cobalt seed layer comprises a mixture of TiN and cobalt, a nanolaminate of TiN and cobalt layers or a graded TiN / Co layer.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Application No. 62 / 951,457, filed December 20, 2019, which is incorporated herein by reference.

[0002] This application relates to integrated circuit manufacturing, and more particularly to methods and apparatus for cobalt metallization. [Background technology]

[0003] Cluster tools used for semiconductor processing of wafers or other workpieces typically comprise a central wafer handling chamber or transfer chamber surrounded by a number of process chambers in which various processes (e.g., deposition, etching, doping, annealing, and oxidation) are performed on the wafer. A robot is provided within the transfer chamber for moving the wafer within the cluster tool. The transfer chamber is typically separated from each process chamber by a gate valve.

[0004] The current process flow for cobalt metallization includes the deposition of a liner layer and an adhesion layer. A cobalt seed layer may be deposited by chemical vapor deposition (CVD), followed by cobalt plating. Summary of the Invention

[0005] In some embodiments, a cobalt metallization process and an apparatus for carrying out the process are provided. The cobalt metallization process can include depositing a thin TiN liner layer on a three-dimensional structure, such as a trench on a semiconductor substrate, followed by depositing a thin seed layer, such as a seed layer that includes cobalt. One or both of the TiN liner layer and the seed layer can be deposited, for example, by an atomic layer deposition (ALD) process. After depositing the TiN liner layer and the seed layer, cobalt can be deposited, for example, by plating, to fill the three-dimensional structure.

[0006] In some embodiments, a semiconductor wafer processing apparatus is provided. In some embodiments, the semiconductor wafer processing apparatus may include a wafer handling chamber, a wafer handling robot, a first deposition process module, a second deposition process module, and a cooling stage. In some embodiments, the apparatus further includes a cluster turbo pump. In some embodiments, the first deposition process module and the second deposition process module are identical.

[0007] In some embodiments, the apparatus may include a controller configured to sequentially move a wafer comprising the three-dimensional structure from the wafer handling chamber to a first deposition process module, deposit a TiN liner layer on the wafer at a first deposition temperature in the first deposition process module, move the wafer to a cooling stage, cool the wafer to below the first deposition temperature, move the wafer to a second deposition process module, and deposit a cobalt seed layer on the TiN liner layer on the wafer at a second deposition temperature. In some embodiments, the cobalt seed layer comprises a nanolaminate.

[0008] In some embodiments, the controller is configured to move the wafer from the first deposition process module to a cooling stage after deposition of the cobalt seed layer, and the wafer can then be cooled to or below the second deposition temperature.

[0009] In some embodiments, the controller is configured to deposit a TiN liner layer on the wafer in a first deposition process module by atomic layer deposition (ALD), hi some embodiments, the controller is configured to deposit a cobalt seed layer on the wafer in a second deposition process module by ALD.

[0010] In some embodiments, a method of cobalt metallization is provided. The method can include depositing a TiN liner layer onto a three-dimensional feature of a substrate, such as a semiconductor wafer. The TiN liner layer can be deposited, for example, by ALD. The ALD process can be performed at a first deposition temperature in a first deposition module of a deposition apparatus. The wafer can then be cooled to a temperature below the first deposition temperature. For example, the wafer can be transferred to a cooling module and cooled to a temperature below the first deposition temperature. After cooling, the wafer can be transferred to a second deposition module of the deposition apparatus. In some embodiments, the second deposition module can be the same as the first deposition module.

[0011] In some embodiments, in the second deposition module, a cobalt seed layer can be deposited on and in contact with the TiN liner layer. The cobalt seed layer can be deposited, for example, by ALD. The ALD process for depositing the cobalt seed layer can be performed at a second deposition temperature. Cobalt can be deposited on the cobalt seed layer, for example, by plating.

[0012] In some embodiments, the wafer is cooled to a temperature equal to or less than the second deposition temperature after the cobalt seed layer deposition and before depositing cobalt onto the cobalt seed layer by plating.

[0013] In some embodiments, cooling the wafer below the first deposition temperature and / or below the second temperature includes moving the wafer to a cooling chamber, hi some embodiments, the wafer is cooled below the first deposition temperature or below the second temperature by placing the wafer on a cooling stage.

[0014] In some embodiments, the cobalt seed layer comprises a mixture of cobalt and TiN, hi some embodiments, the cobalt seed layer further comprises a cobalt layer on the seed layer comprising a mixture of cobalt and TiN.

[0015] In some embodiments, the cobalt seed layer comprises a nanolaminate of cobalt and TiN. In some embodiments, the nanolaminate comprises a top layer of cobalt. In some embodiments, the seed layer comprises a layer of cobalt on the nanolaminate.

[0016] In some embodiments, the cobalt seed layer includes a graded layer of TiN and cobalt, which may include an increasing concentration of cobalt from the interface with the underlying TiN layer to an upper surface of the graded layer.

[0017] In some embodiments, the TiN layer is treated prior to deposition of the cobalt seed layer. For example, in some embodiments, after deposition of the TiN liner layer and prior to deposition of the cobalt seed layer, the substrate is exposed to a titanium halide, such as TiCl. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 is a flow chart illustrating a process flow for forming a TiN liner layer and a cobalt seed layer in cobalt metallization. [Diagram 2] FIG. 2 is a top-down schematic view of a wafer processing apparatus according to some embodiments. [Diagram 3] FIG. 3 is a top-down schematic view of a wafer processing apparatus according to some embodiments. [Figure 4] FIG. 4 is a top-down schematic view of a wafer processing apparatus according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] A cobalt metallization process may include depositing a thin TiN liner layer on a three-dimensional structure, such as a trench on a semiconductor substrate, followed by depositing a thin seed layer, such as a seed layer including cobalt. One or both of the TiN liner layer and the seed layer may be deposited, for example, by an atomic layer deposition (ALD) process. After deposition of the TiN liner layer and the seed layer, cobalt may be deposited, for example, by plating, to fill the three-dimensional structure.

[0020] In some embodiments, the seed layer comprises a cobalt layer, which may be deposited, for example, by ALD.

[0021] In some embodiments, the seed layer comprises a cobalt layer. The cobalt layer may be deposited, for example, by ALD. In some embodiments, the seed layer comprises a nanolaminate of a thin TiN layer and a Co layer. In some embodiments, the top layer of the nanolaminate is a Co layer. In some embodiments, the top layer of the nanolaminate is a mixture of cobalt and TiN. In some embodiments, the top layer of the nanolaminate is a cobalt-rich layer. In some embodiments, the bottom layer of the nanolaminate is a TiN layer. In some embodiments, the nanolaminate of the TiN layer and the Co layer functions as both a liner layer and a seed layer. In some embodiments, a thinner TiN liner layer is used in combination with a seed layer comprising an ultra-thin Co layer and an ultra-thin TiN layer such that the overall thickness of the liner layer and the seed layer is reduced. In some embodiments, the seed layer comprising a nanolaminate of a thin TiN layer and a Co layer is deposited as part of a cobalt metallization process in which a separate liner layer is not utilized. For example, in a cobalt metallization process, a seed layer comprising a nanolaminate of thin TiN and Co layers is deposited directly over a three-dimensional structure, such as a trench, on a semiconductor substrate, followed by deposition of cobalt to fill the three-dimensional structure, but without depositing a separate liner layer prior to depositing the nanolaminate. In some embodiments, a cobalt layer may be deposited over the nanolaminate to form a seed stack.

[0022] The TiN and Co layers of the nanolaminate can be ultra-thin. In some embodiments, the nanolaminate includes an ultra-thin cobalt layer and an ultra-thin TiN layer. For example, in some embodiments, the TiN layer in the nanolaminate can be about 1 nm and the cobalt layer can be about 1-2 nm. In some embodiments, one or more of the TiN layers in the nanolaminate can be about 3 nm or less, about 2 nm or less, about 1.5 nm or less, about 1.2 nm or less, about 1.0 nm or less, or about 0.8 nm or less. In some embodiments, one or more of the Co layers in the nanolaminate can be about 4 nm or less, about 3 nm or less, about 2.5 nm or less, about 2 nm or less, or about 1.5 nm or less.

[0023] In some embodiments, the nanolaminate includes two or more ultra-thin cobalt layers and two or more ultra-thin TiN layers. In some embodiments, the TiN and Co layers in the nanolaminate are indistinguishable from one another. In some embodiments, the TiN and Co layers are deposited by ALD. In some embodiments, the cobalt seed layer includes TiN and Co deposited in a manner that forms a mixture of TiN and Co. For example, TiN and Co may be deposited by ALD in sub-cycles that allow for intermixing of Co and TiN such that separate and distinguishable Co and TiN layers are not formed. In some embodiments, the TiN and Co layers are so thin that they overlap, resulting in intermixing of TiN and Co.

[0024] In some embodiments, additional cobalt may be deposited on the TiN and Co nanolaminate or mixture to form a seed stack. The additional cobalt may be deposited by ALD.

[0025] In some embodiments, the cobalt seed layer comprises a graded TiN / Co thin film. The graded TiN / Co film may be deposited by an ALD process including an ALD subcycle for depositing TiN and an ALD subcycle for depositing Co. The TiN and Co subcycles are repeated at a selected ratio that varies over time to form the graded layer. In some embodiments, the graded TiN / Co thin film functions as both a liner layer and a seed stack. In some embodiments, the graded TiN / Co thin film may start as TiN on the bottom surface and end as cobalt on the top surface. In some embodiments, the ALD process for forming the graded TiN / Co thin film includes performing one, two or more TiN ALD subcycles, followed by TiN ALD subcycles and Co subcycles of variable ratios, and ending with one, two or more Co ALD subcycles. In some embodiments, an additional cobalt layer may be deposited on the graded layer to form the seed stack. The additional cobalt may be deposited by ALD.

[0026] Methods for depositing TiN and Co by ALD are known in the art. For example, TiN can be deposited by ALD using a titanium precursor such as TiCl4 and a nitrogen-containing precursor, such as ammonia or hydrazine or a plasma of excited or nitrogen-containing atomic species. As discussed below, in some embodiments, the ALD process includes exposing the substrate to TiCl4 as the final step of the process. Cobalt can be deposited by an ALD process using, for example, a cobalt precursor, such as CoDAD (bis(1,4-di-butyl-1,3-diazabutadienyl)cobalt) and its derivatives, and a second reactant, such as hydrogen. In some embodiments, the substrate is contacted alternately and sequentially with the cobalt precursor and the second reactant. In some embodiments, Co can be deposited by an ALD process as described in US2013 / 0251903, US2014 / 0234550, US2016 / 0326645, US2018 / 0044788, US2018 / 0130706, or WO2017 / 214088, which are incorporated by reference herein.

[0027] In some embodiments, the substrate may be treated before or after one or more of the deposition steps to form the liner layer and / or seed layer stack. In some embodiments, the substrate is treated before and / or after one or more Co ALD cycles. In some embodiments, the substrate is treated before and / or after one or more TiN ALD cycles. For example, the substrate may be cooled after depositing a TiN liner layer, after depositing a cobalt seed stack, or both. In some embodiments, the substrate is cooled after depositing TiN by one or more ALD cycles. In some embodiments, the substrate is cooled after depositing Co by one or more ALD cycles. In some embodiments, the substrate is cooled to a temperature equal to or lower than the deposition temperature. In some embodiments, the substrate is cooled to room temperature.

[0028] In some embodiments, the substrate is treated prior to deposition of the first TiN liner layer. For example, the substrate may be subjected to a pre-cleaning treatment. In some embodiments, the pre-cleaning treatment may include outgassing. In some embodiments, the pre-cleaning treatment is performed prior to performing one or more TiN ALD cycles.

[0029] In some embodiments, the substrate is treated after deposition of the TiN liner layer and before deposition of a cobalt seed layer or seed stack, such as a nanolaminate seed stack. For example, the substrate may be cooled after deposition of the TiN layer and before deposition of a subsequent cobalt-containing layer. In some embodiments, the substrate may be cooled after deposition of the TiN layer by one or more ALD cycles and before deposition of a subsequent cobalt seed stack by one or more ALD cycles. In some embodiments, the substrate is subjected to a plasma treatment after TiN deposition and before a subsequent deposition, such as deposition of a subsequent cobalt-containing layer.

[0030] In some embodiments, the substrate is subjected to a halogenation treatment after TiN deposition and before a subsequent deposition, such as a subsequent deposition of a seed layer or seed stack. The halogenation treatment may improve the surface roughness of the subsequently deposited Co film. In some embodiments, the halogenation treatment includes exposing the substrate to TiCl4. In some embodiments, the halogenation treatment includes exposing the substrate to a titanium halide precursor used in the deposition of the TiN layer. For example, after TiN deposition by ALD using TiCl4 as the titanium precursor, the substrate may be exposed to TiCl4 before the subsequent deposition. In some embodiments, the exposure to titanium halide after TiN deposition may be for the same duration and under the same conditions as in the TiN deposition process. In some embodiments, this exposure may be accomplished by utilizing an ALD process for depositing the TiN layer that includes alternating sequential exposure of the substrate to titanium halide and nitrogen reactants, such as TiCl4, with the final step of the ALD process including exposing the substrate to titanium halide. In some embodiments, TiN is deposited by repeating ALD cycles in which the substrate is sequentially exposed to a nitrogen reactant and TiCl4, such that the ALD process terminates with exposure to TiCl4.

[0031] In some embodiments, the substrate is treated after deposition of a cobalt seed layer or seed stack, such as a nanolaminate, and prior to subsequent cobalt plating. For example, the substrate may be cooled after cobalt seed layer deposition or seed stack deposition. In some embodiments, the substrate is cooled after deposition of a cobalt seed stack by one or more ALD cycles and after cobalt plating.

[0032] Following deposition of the seed layer or seed stack and any intervening treatments, cobalt is deposited, such as by plating. After plating, the substrate may be further processed, such as by cooling.

[0033] FIG. 1 is a flow chart illustrating a process 100 for cobalt metallization, including depositing a TiN liner layer and a cobalt-containing seed stack. A semiconductor wafer including a three-dimensional structure is loaded into a processing apparatus 110. In some embodiments, the three-dimensional structure may include trenches, vias, or both trenches and vias, such as in the context of a dual damascene process. A control of the processing apparatus is configured to perform the steps shown. A TiN liner layer is deposited on the structure on the wafer 120 by an ALD process. Optionally, the wafer may be subjected to processing such as a pre-clean 150 prior to deposition of the TiN liner layer 120 as shown. Processing may occur in the same chamber as the TiN deposition or in a separate chamber.

[0034] After deposition of the TiN liner layer 120, the wafer may optionally be cooled 160 (or otherwise processed) prior to deposition of the cobalt seed layer 130, such as by an ALD process. Cooling may occur in the same chamber as the TiN deposition or Co deposition, or may occur in a separate chamber.

[0035] In some embodiments, after TiN deposition, the substrate is treated by exposure to TiCl4. The treatment can be performed in the same chamber as TiN deposition or in a separate chamber. The exposure to TiCl4 can be for the same duration during each cycle of the ALD process.

[0036] As discussed above, in some embodiments, the cobalt seed layer includes a cobalt layer deposited by ALD. In some embodiments, the cobalt seed layer includes a TiN and Co nanolaminate. The cobalt layer can be deposited on the nanolaminate to form the seed stack. In some embodiments, the cobalt seed layer includes a mixture of TiN and Co. The cobalt layer can be deposited on the mixture to form the seed stack. In some embodiments, the cobalt seed layer includes a graded layer of TiN and Co. For example, the graded layer can start with TiN at the bottom surface adjacent to the TiN liner layer, and include an increasing concentration of cobalt and a decreasing concentration of TiN in the direction from the bottom surface to the top surface, and include a top surface of cobalt. Again, a cobalt layer can be deposited on the graded layer to form the seed stack. In some embodiments, the cobalt layer can be deposited by continuing the ALD cycle used to deposit cobalt in the formation of the graded layer.

[0037] In some embodiments, TiN deposition and Co deposition occur in the same process chamber. In some embodiments, TiN deposition occurs in one process chamber and Co deposition occurs in another process chamber.

[0038] Following deposition of the cobalt seed layer 130, the wafer may optionally be cooled 170 before being removed from the processing apparatus 140. Again, cooling may occur in the same chamber as the deposition or in a separate chamber. In some embodiments, the wafer is subjected to further processing, such as deposition of cobalt by plating.

[0039] As mentioned above, in some embodiments, the use of a cobalt seed layer as described herein may allow for a thinner TiN layer than typical. The deposition of a TiN liner layer may be followed by the deposition of a cobalt seed layer formed by depositing a TiN / Co nanolaminate or TiN / Co mixture. The additional cobalt may be deposited by ALD or by another process to complete the seed layer. In some embodiments, an ultra-thin cobalt layer is deposited by ALD, followed by the deposition of an ultra-thin TiN layer. For example, rather than depositing a 1 nm TiN layer followed by a 2 nm Co seed layer, a 0.5 nm TiN layer may be deposited, followed by a 0.5 nm TiN layer and a Co layer. The 0.5 nm layer of TiN and Co may be deposited by an ALD TiN sub-cycle and an ALD Co sub-cycle. An additional 1.5 nm of cobalt may then be deposited to complete the seed layer and form a seed stack. As a result, the total thickness of the liner layer and seed layer (or seed stack) is reduced by 0.5 nm, improving the metallization process by allowing additional cobalt metal in the structure.

[0040] In some embodiments, each of the ALD deposition steps and the processing steps are performed in a semiconductor wafer processing apparatus, such as a cluster tool. FIG. 2 is a top-down schematic diagram of an exemplary semiconductor processing apparatus 200, according to some embodiments. The semiconductor processing apparatus 200 includes a central substrate or workpiece handling chamber, referred to herein as a wafer handling chamber (WHC) 220, connected to at least one process module (PM) 230, 240. FIG. 2 shows the WHC 220 surrounded by two process modules 230, 240. In alternative embodiments, the apparatus 200 may include a greater or lesser number of process modules. For example, the apparatus 200 may include only one process module connected to the WHC 220, or may include more than the two process modules 230, 240 shown. Additionally, the apparatus 200 may be configured to perform additional or other types of processes, and may be configured to perform the same process in two or more of the process modules 230, 240. A workpiece handling robot 250 mounted within the wafer handling chamber 220 can add and remove substrates from the load lock chamber (LLC) 210 and the individual process modules 230, 240. The apparatus 200 can also include one or more intermediate process modules 225, which can be used, for example, as temperature control modules. A temperature control module can be used to reduce or increase the temperature of the wafer before or after a particular processing step.

[0041] In some embodiments, the apparatus 200 includes a turbo pump (not shown). The turbo pump may allow for a lower base pressure. In some embodiments, layers deposited when a turbo pump is used have lower impurities. This may be attributed to a reduction in residuals in the chamber, such as moisture and O2. The turbo pump may be used to increase the flow of one or more gases in one or more areas of the apparatus. For example, the turbo pump may be used to increase the flow of gas in the WHC 220 or the load lock chamber 210. In some embodiments, the turbo pump may allow for a higher gas flow at the same pressure.

[0042] To operate the wafer processing apparatus 200, a user inputs a process recipe into a controller (not shown). The process recipe may include instructions regarding process sequence, process time, process temperature, pressure, and gas flows. For example, the controller may control each step in the deposition of a TiN layer and a cobalt seed layer or seed stack on a wafer in cobalt metallization, e.g., as described above with respect to FIG.

[0043] The wafer processing apparatus shown in FIG. 2 may be configured for cobalt metallization, which deposits a TiN liner layer and a cobalt seed layer or seed stack on a wafer. The apparatus 200 may include a deposition process module 230 and an intermediate process module 240. The deposition process module 230 may be configured for deposition of one or both of TiN and Co, for example, by ALD. The intermediate process module 240 may be configured to process the substrate before or after deposition of TiN and / or Co. For example, the intermediate process module 240 may be a temperature control module, such as a cooling module, where the substrate is cooled before or after deposition of TiN and / or Co, or a pressure module to control pressure. That is, the substrate may be moved to the process module 240 to be cooled before or after another processing step. In some embodiments, the apparatus 200 may include one or more other intermediate process modules (not shown) that may be used for other processing. In some embodiments, the intermediate process module 240 (or a different intermediate process module (not shown)) may be used to pre-clean the substrate before deposition. For example, one intermediate process module 240 may be used as a chill module, while a second intermediate process module (not shown) may be used as a pre-clean module. The wafer processing apparatus includes a controller configured to control the intermediate process modules to provide the desired reaction conditions.

[0044] In some embodiments, the intermediate process module 240 is a wafer temperature control module, such as a wafer cooling module. The wafer processing apparatus includes a controller configured to achieve a desired temperature in the temperature control module. The wafer cooling module may be maintained at a temperature equal to or lower than the temperature of the wafer in a previous deposition process or other previous processing. In some embodiments, the wafer temperature control module may be configured to provide an inert gas flow during cooling, for example. In some embodiments, the temperature control module is maintained at room temperature. In some embodiments, the temperature control module is actively cooled. In some embodiments, the temperature control module includes one or more cooling stages that are actively cooled or heated. The wafer may be placed on the cooling stage by a robot. In some embodiments, the cooling or heating is by thermoelectric cooling or heating. In some embodiments, the cooling or heating is achieved by a gas flow, such as an inert gas flow. In some embodiments, the temperature control module may control the wafer temperature from about 0° C. to about 300° C. In some embodiments, the temperature control module may control the wafer temperature from about room temperature to about 150° C. In some embodiments, the temperature control module controls the wafer temperature to about 0 to about 400° C., about 15 to about 350° C., about 20 to about 300° C., about 25 to about 250° C., about 30 to about 200° C., about 20 to about 150° C., or about 20 to about 100° C. In some embodiments, a temperature control module, such as a cooling module, reduces the temperature to about 10° C. or more, about 20° C. or more, about 40° C. or more, about 60° C. or more, about 80° C. or more, about 100° C. or more, about 150° C. or more, about 200° C. or more, about 250° C. or more, about 300° C. or more, or about 400° C. or more below the TiN deposition (module reaction) temperature.

[0045] In some embodiments, the pressure at one or more locations within the deposition apparatus, such as, for example, an intermediate process module, a deposition module, or a WHC, is controlled to a pressure of about 2000 torr. In some embodiments, the pressure is controlled to 2000 torr or less, 1000 torr or less, 760 torr or less, 100 torr or less, 10 torr or less, 1 torr or less, 0.1 torr or less, 1E-4 torr or less, 1E-6 torr or less, or 1E-8 torr or less. In some embodiments, the pressure is controlled to about 10 torr or more, 50 torr or more, 100 torr or more, 400 torr or more, 760 torr or more, or 1000 torr or more. The deposition processing apparatus includes a controller configured to provide a desired pressure to each region of the deposition apparatus, such as the deposition module, the intermediate process module, and the WHC.

[0046] In some embodiments, the environment in an intermediate process module, such as a cooling module, or a deposition module or WHC includes an inert gas such as N2 or a noble gas such as He or Ar. In some embodiments, the environment includes a mixture of N2 / H2, a reducing gas such as H2, or other reducing gas such as an inert gas or a gas containing an organic reducing agent. In some embodiments, the environment may include a plasma of excited H or radical species. The deposition processing apparatus includes a controller configured to provide the appropriate environment.

[0047] In some embodiments, the substrate resides in the intermediate process module, such as a chill module, for between about 1 and 3600 seconds, between about 5 and 1200 seconds, between about 10 and 600 seconds, or between about 20 and 300 seconds. In some embodiments, the substrate resides in the intermediate process module, such as a chill module, for greater than about 10 seconds, greater than about 30 seconds, greater than about 60 seconds, greater than about 90 seconds, greater than about 120 seconds, greater than about 180 seconds, greater than about 300 seconds, or greater than about 600 seconds. In some embodiments, the substrate resides in the intermediate process module for less than about 600 seconds, less than about 300 seconds, less than about 180 seconds, less than about 120 seconds, less than about 60 seconds, or less than about 30 seconds. The deposition processing apparatus includes a controller configured to maintain the substrate in the intermediate processing apparatus for a preselected time.

[0048] As mentioned above, in some embodiments, the processing equipment may include multiple intermediate process modules. For example, the processing equipment may include an intermediate process module configured for pre-cleaning of the wafer as well as an intermediate process module configured to control the temperature of the wafer. In some embodiments, the processing equipment may include two or more temperature control modules, such as two or more wafer cooling modules. In some embodiments, the two or more temperature control modules are set to different temperatures. In some embodiments, the cooling modules or temperature control modules can be used in addition to temperature management or only for wafer queue time management, minimizing queue time and accelerating throughput.

[0049] In some embodiments, a single process module may serve two or more different purposes. For example, a process module may function as both a pre-clean module and a temperature control module. That is, a wafer may be subjected to a pre-clean in a particular process module and then moved to the same process module for cooling after a deposition step.

[0050] In some embodiments, cooling may be performed in another part of the processing equipment rather than in the process module. For example, the transfer chamber may function as the cooling module. In some embodiments, the wafer may be moved to the transfer chamber for cooling after a deposition process, such as after deposition of TiN and / or Co. In some embodiments, cooling may be performed within the WHC, such as on a cooling stage or on a wafer transfer robot, as described in more detail below.

[0051] In some embodiments, an intermediate process module may be configured to process multiple wafers simultaneously or sequentially. In some embodiments, an intermediate process module, such as a chill module, may be configured to process two or more substrates, three or more substrates, five or more substrates, seven or more substrates, or ten or more substrates. For example, a chill module may include two or more chill stages where two or more substrates may be chilled before or after a deposition or other processing step. In some embodiments, two or more substrates are chilled simultaneously. In some embodiments, one or more wafers that have already been chilled are removed from one chill stage of the chill module, while a second wafer or set of wafers to be chilled is moved onto a second stage of the process module.

[0052] The cooling stage, whether located in a process module or in a WHC, may include one or more temperature control features. The cooling stage may include one or more cooling elements configured to facilitate a desired reduction in temperature of the wafer on the cooling stage. The cooling stage may also include one or more heating elements configured to facilitate a desired increase in temperature of the wafer, if desired. One or both of the cooling element and heating element may be embedded within one or more portions of the stage. For example, multiple cooling and / or heating elements may be positioned across a lateral dimension of the substrate stage to facilitate a desired temperature control. In some embodiments, the cooling element comprises a cooling tube configured to supply coolant to a heat sink. In some embodiments, the one or more cooling or heat generating elements are located in a cooling module separate from the cooling stage body. One or more cooling stage thermocouples may be configured to measure the temperature of the cooling stage.

[0053] In some embodiments, the controller of the processing apparatus 200 is configured to deposit a TiN liner layer by ALD, followed by depositing a Co seed layer by ALD. The controller is configured to have the robot 250 transport the wafer from the load lock chamber 210 to the WHC 220. The wafer can then be optionally moved to an intermediate process module (not shown) via the robot 250 for pre-deposition processing. After pre-deposition processing, the wafer is moved by the robot 250 to the deposition process module 230. The controller is configured to deposit a TiN liner layer on the wafer in the module 230 by ALD. In some embodiments, the controller is configured to terminate the TiN deposition process by exposing the substrate to TiCl4. After TiN deposition, the wafer is returned by the robot 250 to the WHC 220. The wafer can then be optionally moved to the intermediate process module 240, which functions as a cooling module. Following cool down in the intermediate process module 240, the wafer is returned by the robot 250 to the WHC 220 and then to the deposition process module 230 where a cobalt seed layer is deposited. After deposition of the cobalt seed layer, the wafer is returned to the WHC 220 and optionally moved to the intermediate process module 240 for further processing, such as cooling. The wafer can be moved to another process module for subsequent processing or removed from the wafer processing apparatus 200 through the load lock chamber 210.

[0054] In some embodiments, separate deposition process modules are used to deposit the TiN liner layer and the Cobalt seed layer. Such a processing apparatus is shown in FIG. 3. In the processing apparatus 300, the controller can be set to deposit the TiN liner layer in a first deposition process module 330, for example, by ALD, and deposit the Co seed layer in a second process module 340, for example, by ALD. In some embodiments, the controller is set to deposit the TiN liner layer by ALD (optionally with a final exposure to TiCl4), then cool, and then deposit the Co seed layer by ALD, optionally cool. The controller is set to transfer the wafer from the load lock chamber 310 to the WHC 320. The wafer can then be transferred to the TiN deposition module 330. The controller is set to deposit the TiN liner layer on the wafer in module 330, by ALD. After TiN deposition, the wafer is moved by the robot 350 back to the WHC 320 and then to the cooling module 325. After a sufficient time has passed to cool the wafer to a desired temperature, e.g., room temperature, the robot 350 moves the wafer from the cooling module 325 back to the WHC 320 and then to the deposition process module 340 where a cobalt seed layer is deposited. After deposition of the cobalt seed layer, the wafer is returned by the robot 350 to the WHC 320. The wafer may then optionally be returned to the cooling module 325. After cooling to the desired temperature, the wafer may be returned to the WHC 320. From there, the wafer may be moved to another process module for further processing or removed from the wafer processing apparatus 300 through the load lock chamber 310.

[0055] In some embodiments, the deposition of the cobalt seed layer includes deposition of both cobalt and TiN, as described above. Thus, in some embodiments, the controller is configured to move the wafer between process modules 330 for TiN deposition and 340 for Co deposition as needed to achieve the desired cobalt seed layer composition. In some embodiments, deposition of both TiN and Co occurs in the same process module, and the cobalt seed layer with TiN is deposited in a single process module without moving the wafer.

[0056] In some embodiments, intermediate processing before and / or after deposition of the TiN liner layer and the Co seed layer may be performed separately within the wafer handling chamber itself rather than in a cluster process module. For example, in some embodiments, the wafer handling chamber may include one or more cooling stages on which the wafer is placed for cooling following processing in one or more process modules, such as deposition of the TiN liner layer and / or the Co seed layer. In some embodiments, the cooling device in the wafer handling chamber may be exposed to the environment of the WHC and is not located in a separate enclosure. In some embodiments, the cooling device may be located in a housing or other enclosure within the WHC. In some embodiments, the cooling device may be configured to cool two or more wafers.

[0057] In some embodiments, the wafer handling robot itself may be configured to cool the wafer in the WHC. For example, if cooling is desired after a processing step, the robot may remove the wafer from the deposition module and the wafer may remain on the robot's end effector in the wafer handling chamber until the desired temperature is reached. In some embodiments, the cooling on the end effector may be passive. In other embodiments, active cooling of the wafer on the end effector may be implemented.

[0058] 4 shows a processing apparatus 400 that includes a wafer handling chamber 420 and a cooling stage 460 within the wafer handling chamber 420 body. The processing apparatus 400 also includes two process modules 430, 440 and an intermediate process module 425, which may be, for example, a pre-cleaning module. The process modules 430, 440 may be used to deposit cobalt and TiN, respectively. For example, in some embodiments, the controller is set to deposit a TiN liner layer by ALD in process module 430 (optionally with a subsequent treatment with titanium halide), followed by cooling in the WHC 420 and subsequent deposition of a Co seed layer by ALD in process module 440.

[0059] The controller is configured to transfer the wafer from the load lock chamber 410 to the WHC 420. The wafer may then be transferred by the robot 450 to an intermediate process module 425, for example, for a pre-cleaning step. The wafer may then be transferred via the robot 450 to a TiN deposition module 430. A TiN liner layer is deposited in the module 430, for example, by ALD. After TiN deposition, the wafer is transferred by the robot 450 back to the WHC 420 and placed on a cooling stage 460. After a sufficient time has elapsed to cool the wafer to a desired temperature, for example, room temperature, the robot 450 moves the wafer from the cooling stage 460 to the cobalt deposition module 440, where a cobalt seed layer is deposited.

[0060] After deposition of the cobalt seed layer, the wafer is returned to the WHC 420. The wafer may then optionally be returned to the cooling stage 460. After cooling to the desired temperature, the wafer may be moved to another process module for further processing or removed from the wafer processing apparatus 400 through the load lock chamber 410.

[0061] As mentioned above, in some embodiments, the cobalt seed layer is formed by deposition of both TiN and Co. Thus, the wafer may be shuttled between a TiN deposition module 430 and a Co deposition module 440 to deposit the cobalt seed layer with the desired composition.

[0062] In some embodiments, TiN and Co may be deposited in the same deposition module, thereby eliminating the need for transfer between the two modules. Thus, in some embodiments, a TiN liner layer is deposited on a wafer in a deposition module, the wafer is transferred to a WHC or intermediate process module for cooling, and the wafer is returned to the same deposition module for deposition of a cobalt seed layer that includes both cobalt and TiN.

[0063] Although not separately illustrated in the drawings, it will be understood that each process step disclosed herein can be programmed into a process tool controller that is electrically connected to control gas flow valves, mass flow controllers, gate valve actuators, substrate handling robots, etc. One skilled in the art will readily appreciate that the equipment can be equipped with software programming or hardwiring to accomplish the desired processing steps described herein.

Claims

1. A semiconductor wafer processing apparatus comprising: Wafer handling chamber, Wafer handling robots, a first deposition process module; A cooling stage, and a controller configured to sequentially move a wafer having a three-dimensional structure from the wafer handling chamber to the first deposition process module, deposit a TiN liner layer on the wafer at a first deposition temperature in the first deposition process module, move the wafer to the cooling stage, cool the wafer to below the first deposition temperature, return the wafer to a second deposition process module, deposit a cobalt seed layer on the TiN liner layer on the wafer at a second deposition temperature, and subject the wafer to a halogenation treatment after deposition of the TiN liner layer and prior to deposition of the cobalt seed layer.

2. 2. The apparatus of claim 1 , wherein the controller is configured to move the wafer from the second deposition process module to the cooling stage after depositing the cobalt seed layer and cooling the wafer to below the second deposition temperature.

3. The device of claim 1 , wherein the cobalt seed layer comprises a nanolaminate.

4. The apparatus of claim 1 further comprising a cluster turbo pump.

5. 10. The apparatus of claim 1, wherein the controller is configured to deposit the TiN liner layer on the wafer in the first deposition process module by atomic layer deposition.

6. 6. The apparatus of claim 5, wherein the controller is configured to deposit the cobalt seed layer on the wafer in the second deposition process module by atomic layer deposition.

7. The apparatus of claim 1 , wherein the first deposition process module and the second deposition process module are identical.

8. 1. A method of cobalt metallization comprising the steps of: depositing a TiN liner layer on the three-dimensional structure on the wafer at a first deposition temperature in a first deposition process module by atomic layer deposition; cooling the wafer to a temperature below the first deposition temperature; moving the wafer to a second deposition process module; depositing a cobalt seed layer directly and contactingly on the TiN liner layer in a second deposition process module at a second deposition temperature by atomic layer deposition; and depositing cobalt onto the cobalt seed layer by plating; The method further comprising subjecting the wafer to a halogenation treatment after deposition of the TiN liner layer and prior to deposition of the cobalt seed layer.

9. The method of claim 8 , wherein cooling the wafer to a temperature below the first deposition temperature comprises moving the wafer to a cooling module.

10. The method of claim 8 , wherein cooling the wafer to a temperature below the first deposition temperature comprises placing the wafer on a cooling stage.

11. 9. The method of claim 8, further comprising cooling the wafer to a temperature below the second deposition temperature after depositing the cobalt seed layer and before depositing cobalt on the cobalt seed layer by plating.

12. The method of claim 11 , wherein cooling the wafer to a temperature below the second deposition temperature comprises moving the wafer to a cooling module.

13. The method of claim 8 , wherein the first deposition process module and the second deposition process module are identical.

14. The method of claim 8 , wherein the cobalt seed layer comprises a mixture of cobalt and TiN.

15. The method of claim 14 , wherein the cobalt seed layer further comprises a cobalt layer over the mixture of cobalt and TiN.

16. The method of claim 8 , wherein the cobalt seed layer comprises a nanolaminate of a TiN layer and a cobalt layer.

17. The method of claim 16 , wherein the cobalt seed layer further comprises a cobalt layer on the nanolaminate.

18. The method of claim 8 , wherein the cobalt seed layer comprises a graded layer of TiN and cobalt.

19. 20. The method of claim 18, wherein the graded layer comprises an increasing concentration of cobalt from an interface with the TiN liner layer to an upper surface of the graded layer.

20. After deposition of the TiN liner layer and before deposition of the cobalt seed layer, the wafer is treated with TiCl ４ The method of claim 8, further comprising exposing the

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