Apparatus and method for brightness control of a display device - Patents.com

Abstract

To make it possible to brightly display the portion of the highest brightness of a display image while dark portions of the display image remain unchanged, thereby effectively improving the contrast.SOLUTION: A display driver comprises signal supply circuitry and control circuitry. The signal supply circuitry is configured to supply an emission control signal to a display panel. The emission control signal controls a ratio of pixel circuits that emit light to pixels of the display panel. The control circuitry is configured to control the emission control signal based on an input image data.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] SUMMARY OF THE DISCLOSURE The embodiments disclosed herein generally relate to an apparatus and method for brightness control of a display device. [Background technology]

[0002] The quality of a displayed image may depend on the luminance dynamic range of the display device. To improve image quality, brightness controls of the display device may be used to increase the luminance dynamic range. Summary of the Invention

[0003] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

[0004] In one or more embodiments, a display driver is disclosed. The display driver includes a signal providing circuitry and a control circuitry. The signal providing circuitry is configured to provide an emission control signal to a display panel. The emission control signal controls a proportion of emitting pixel circuits of pixels of the display panel. The control circuitry is configured to control the emission control signal based on input image data.

[0005] In one or more embodiments, a display device is disclosed. The display device includes a display panel and a display driver. The display driver includes a signal supply circuitry and a control circuitry. The signal supply circuitry is configured to provide an emission control signal to the display panel. The emission control signal controls a ratio of emitting pixel circuits to pixels of the display panel. The control circuitry is configured to control the emission control signal based on input image data.

[0006] In one or more embodiments, a method is also disclosed that includes providing an emission control signal to a display panel to control a proportion of pixel circuits that emit light for pixels of the display panel, and controlling the emission control signal based on input image data. [Brief description of the drawings]

[0007] The patent or application file contains at least one drawing of color. Copies of this patent or patent publication with color drawing(s) will be provided by the Office upon request and payment of the necessary fee.

[0008] So that the above-mentioned features of the present disclosure can be understood in detail, a more particular description of the present disclosure briefly summarized above can be made with reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings merely illustrate exemplary embodiments of the present disclosure, and therefore should not be considered as limiting the scope of the invention, since the present disclosure admits of other equally effective embodiments.

[0009] [Figure 1] FIG. 1 illustrates an exemplary configuration of a display device according to one or more embodiments.

[0010] [Diagram 2] FIG. 2 illustrates an example configuration of a pixel circuit according to one or more embodiments.

[0011] [Diagram 3] FIG. 3 illustrates an example configuration of a pixel according to one or more embodiments.

[0012] [Figure 4] FIG. 4 illustrates an example configuration of image processing circuitry according to one or more embodiments.

[0013] [Diagram 5]FIG. 5 illustrates a gamma curve and the control points that specify the gamma curve, according to one or more embodiments.

[0014] [Figure 6] FIG. 6 illustrates an example configuration of control circuitry according to one or more embodiments.

[0015] [Figure 7] FIG. 7 illustrates an example definition of a sub-region according to one or more embodiments.

[0016] [Figure 8] FIG. 8 illustrates an exemplary calculation of the highest luminance-enhanced display luminance value (highest luminance-enhanced DBV) based on the highest local average picture level (highest local APL) in accordance with one or more embodiments.

[0017] [Figure 9] FIG. 9 illustrates an example calculation of the highest luminance-enhanced DBV based on a global APL, in accordance with one or more embodiments.

[0018] [Figure 10] FIG. 10 illustrates the generation of luminance gain for each pixel in accordance with one or more embodiments.

[0019] [Figure 11] FIG. 11 illustrates the generation of control points in accordance with one or more embodiments.

[0020] [Figure 12] FIG. 12 illustrates an exemplary method for control of signal processing circuitry in accordance with one or more embodiments.

[0021] [Figure 13] 4 illustrates an example operation of a display device according to one or more embodiments.

[0022] For ease of understanding, the same reference numbers have been used, where possible, to designate identical elements common to the figures. It is anticipated that elements disclosed in one embodiment may be beneficially used in other embodiments without specific mention. The drawings referred to herein should not be understood to be drawn to scale unless specifically noted. Also, for clarity of presentation and explanation, the drawings are often simplified, omitting details or components. The drawings and discussion serve to explain the principles discussed below, where like numerals refer to like elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] The following detailed description is merely exemplary in nature and is not intended to be limiting of the disclosure and its application and uses.Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding background, summary or the following detailed description.

[0024] A displayed image may contain areas with partially high brightness. In such cases, image quality may depend on the dynamic range of brightness of the display device. Increasing the dynamic range of brightness may make it possible to display bright areas of the displayed image at high brightness and dark areas at low brightness.

[0025] In one or more embodiments, a signal supply circuitry configured to supply at least one signal to the display panel is dynamically controlled based on input image data to increase the dynamic range of luminance. In various embodiments, the signal supply circuitry may be configured to generate an emission control signal that controls a ratio of pixels that emit light relative to a total number of pixels provided on the display panel. In such embodiments, the emission control signal may be dynamically controlled based on the input image data. In one or more embodiments, the signal supply circuitry may be controlled based on the input image data to increase the luminance of the entire display image when an image corresponding to the input image data includes bright areas. In such embodiments, the image processing circuitry of the signal supply circuitry may be configured to perform image processing to cancel increases in luminance of pixels in dark areas of the display image. This may effectively increase the contrast of the display image.

[0026] FIG. 1 illustrates an exemplary configuration of a display device 100 according to one or more embodiments. The display device 100 may be configured to display an image corresponding to input image data Din received from a host 200. Examples of the host 200 include an application processor, a central processing unit (CPU), or other processor. The display device 100 includes a display panel 1 and a display driver 2. The display panel 1 may include a self-emissive display panel, such as an organic light-emitting diode (OLED) display panel. In other embodiments, the display panel 1 may be a liquid crystal display panel. In the illustrated embodiment, the display panel 1 includes a display area 3, a scan driver circuit section 4, a high-potential side power supply terminal 5, and a low-potential side power supply terminal 6. The display area 3 includes a pixel circuit 7, N scan lines SC[1] to SC[N], N emission lines EM[1] to EM[N], and M data lines D[1] to D[M]. The scan lines SC[1] to SC[N] and the N emission lines EM[1] to EM[N] are connected to a scan driver circuit unit 4, and the data lines D[1] to D[M] are connected to a display driver 2. The scan lines SC[1] to SC[N] and the emission lines EM[1] to EM[N] extend in the horizontal direction of the display panel 1, and the data lines D[1] to D[M] extend in the vertical direction. Each pixel circuit 7 is connected to a corresponding scan line SC, emission line EM, and data line D.

[0027] In various embodiments, the high-potential side power supply terminal 5 and the low-potential side power supply terminal 6 are configured to receive a high-potential side power supply voltage ELVDD and a low-potential side power supply voltage ELVSS, respectively, from a power management integrated circuit (PMIC) 300. The high-potential side power supply voltage ELVDD may be distributed to each pixel circuit 7 from the high-potential side power supply terminal 5 via a high-potential side power supply line (not shown), and the low-potential side power supply voltage ELVSS may be distributed to each pixel circuit 7 from the low-potential side power supply terminal 6 via a low-potential side power supply line (not shown).

[0028] The pixel circuit 7 may be configured to emit light at a luminance level corresponding to the drive voltage received from the display driver 2. FIG. 2 illustrates an exemplary configuration of the pixel circuit 7. The illustrated pixel circuit 7 includes PMOS transistors M1 to M3, a holding capacitor Cst, and a light-emitting element 8. The PMOS transistor M2 has a gate connected to a scan line SC[i] and is connected between the data line D[j] and the gate of the PMOS transistor M1. The PMOS transistor M1 has a source connected to a high-potential power supply node 9a configured to supply a high-potential power supply voltage ELVDD, and a drain connected via the light-emitting element 8 and the PMOS transistor M3 to a low-potential power supply terminal 9b configured to supply a low-potential power supply voltage ELVSS. The light-emitting element 8 may be an LED, an OLED, or another light-emitting element depending on the type of the display panel 1. The PMOS transistor M3 has a gate connected to an emission line EM[i]. The holding capacitor Cst is connected between the gate and source of the PMOS transistor M1. The pixel circuit 7 may have a configuration different from that illustrated in FIG. 2. For example, the pixel circuit 7 may be configured as a 5T2C circuit (having five thin film transistors (TFTs)), or as a 6T1C circuit (having six TFTs and one capacitor).

[0029] In one or more embodiments, a write operation to program a drive voltage to a pixel circuit 7 may include asserting a scan line SC[i] with the emission line EM[i] deasserted and a drive voltage provided to the data line D[j]. This operation allows the drive voltage to be written to a retention capacitor Cst. The retention capacitor Cst may be configured to hold a retention voltage corresponding to the drive voltage written to it.

[0030] In one or more embodiments, when the emission line EM[i] is deasserted, the light-emitting element 8 is disconnected from the high-potential power supply node 9a and does not emit light. In one or more embodiments, when the emission line EM[i] is asserted, the light-emitting element 8 emits light at a luminance level corresponding to the hold voltage held in the hold capacitor Cst.

[0031] 2, the voltage between the high-side power supply node 9a and the gate of the PMOS transistor M1 increases as the drive voltage written to the pixel circuit 7 decreases, and increasing the voltage between the high-side power supply node 9a and the gate of the PMOS transistor M1 increases the brightness of the pixel circuit 7. In such an embodiment, the low-side power supply voltage ELVSS is set to be lower than the lowest drive voltage allowed.

[0032] FIG. 3 illustrates an exemplary configuration of pixels 10 of a display panel 1 in one or more embodiments. Each pixel 10 includes a plurality of pixel circuits 7 configured to display different colors, for example, red (R), green (G), or blue (B). In various embodiments, the pixel circuits 7 configured to display red, green, and blue are referred to as R, G, and B sub-pixels, respectively. Hereinafter, the pixel circuits 7 configured to display red, green, and blue may be referred to as R, G, and B sub-pixels 7R, 7G, and 7B, respectively. Each pixel 10 may include at least one R sub-pixel 7R, at least one G sub-pixel 7G, and at least one B sub-pixel 7B. Each pixel 10 may further include at least one additional sub-pixel configured to display a color other than red, green, and blue. The color combination of the sub-pixels of each pixel is not limited to those disclosed herein. For example, each pixel 10 may further include a sub-pixel configured to display white or yellow. The display panel 1 may further be configured to support sub-pixel rendering (SPR). In such an embodiment, each pixel 10 may comprise a number of R sub-pixels 7R, a number of G sub-pixels 7G and / or a number of B sub-pixels 7B.

[0033] 1 again, in one or more embodiments, the scan driver circuit unit 4 is configured to drive the scan lines SC[1] to SC[N] and the emission lines EM[1] to EM[N] to select a row of the pixel circuits 7 for which a write operation is to be performed. The scan driver circuit unit 4 may be configured to deassert the emission line EM[i] and assert the scan line SC[i], for example, during a write operation for the pixel circuits 7 located in the i-th row. The scan driver circuit unit 4 may be configured to drive the scan lines SC[1] to SC[N] based on a scan control signal SOUT received from the display driver 2.

[0034] In one or more embodiments, the scan control signal SOUT includes an emission control signal EM_ctrl. In such an embodiment, the scan driver circuitry 4 may be further configured to control light emission from rows of pixel circuits 7 that are not being written to based on the emission control signal EM_ctrl. The emission control signal EM_ctrl may control the proportion of pixel circuits 7 that emit light relative to the overall pixel circuits 7 of the display panel 1, thereby controlling a display brightness level of the display device 100. In various embodiments, the display brightness level may be the brightness level of the entire image being displayed on the display panel 1.

[0035] In one or more embodiments, the emission control signal EM_ctrl is generated as a pulse width modulated (PWM) signal, and the display brightness level of the display device 100 is controlled by a duty ratio of the emission control signal EM_ctrl. The duty ratio of the emission control signal EM_ctrl may correspond to a ratio of the period during which the emission control signal EM_ctrl is asserted to one period of the emission control signal EM_ctrl. In one or more embodiments, for example, when the duty ratio of the emission control signal EM_ctrl is increased, the ratio of the number of asserted emission lines EM to the total number of emission lines EM increases, and the ratio of pixel circuits 7 that emit light also increases. Thus, the display brightness level of the display device 100 is increased.

[0036] In one or more embodiments, the display driver 2 is configured to drive the display panel 1 based on input image data Din and control data Dctrl received from the host 200 to display an image corresponding to the input image data Din on the display panel 1. The input image data Din may comprise pixel data describing the gradation value of each color of each pixel 10 of the display panel 1. The display driver 2 may comprise an interface circuit unit 11, a signal supply circuit unit 12, and a control circuit unit 13.

[0037] In one or more embodiments, the interface circuitry 11 is configured to receive input image data Din and control data Dctrl from the host 200. The interface circuitry 11 may be further configured to transfer the input image data Din to the signal supply circuitry 12 and transfer the control data Dctrl to the control circuitry 13. In other embodiments, the interface circuitry 11 may be configured to process the input image data Din and send the processed input image data Din to the signal supply circuitry 12.

[0038] In one or more embodiments, the signal supply circuit unit 12 is configured to supply various signals to the display panel 1 based at least in part on the control circuit unit 13. The signal supply circuit unit 12 includes an image processing circuit unit 14, a grayscale voltage generation circuit unit 15, a data driver circuit unit 16, and a panel interface (I / F) circuit unit 17.

[0039] In one or more embodiments, the image processing circuit unit 14 is configured to generate output voltage data Dout by performing image processing on the input image data Din received from the interface circuit unit 11. The output voltage data Dout describes a voltage value that specifies the voltage level of the drive voltage to be written to each pixel circuit 7 of each pixel 10 of the display panel 1.

[0040] The image processing in the image processing circuitry 14 may be controlled by a control parameter Para_ctrl received from the control circuitry 13. In an embodiment in which the display brightness level of the display device 100 depends on the correspondence between the input image data Din and the output voltage data Dout, the display brightness level of the display device 100 may be controlled by controlling the image processing using the control parameter Para_ctrl.

[0041] In one or more embodiments, the image processing circuit unit 14 may be configured to perform IR drop compensation to mitigate display unevenness that may occur in an image displayed on the display panel 1 due to a voltage drop in a power line that distributes the high potential side power supply voltage ELVDD from the high potential side power supply terminal 5 to each pixel circuit 7 by compensating for the voltage drop in the power supply line. The control parameter Para_ctrl provided to the image processing circuit unit 14 may include an amount of IR drop compensation. The amount of IR drop may differ between each pixel circuit 7 of each pixel 10 and may be determined and calculated individually. The IR drop compensation may depend on the position of the pixel 10 in question and the total current flowing through the display panel 1. The total current may be the sum of the currents flowing through the pixel circuits 7 of the entire display panel 1. The voltage drop in the power supply line may reduce the brightness of the displayed image. Furthermore, the amount of reduction in the brightness level of the pixel circuit 7 increases as the total current increases and increases as the distance from the high potential side power supply terminal 5 increases. Therefore, the amount of IR drop correction for the pixel circuit 7 increases as the total current flowing through the display panel 1 increases, and as the distance from the high potential power supply terminal 5 increases.

[0042] FIG. 4 illustrates an exemplary configuration of the image processing circuitry. In one or more embodiments, the image processing circuitry 14 includes a flexible gamma circuitry 21 and an IR drop correction circuitry 22. In various embodiments, the flexible gamma circuitry 21 is configured to generate gamma-processed voltage data Dout_g based on the input image data Din. The gamma-processed voltage data Dout_g may describe a voltage value that specifies a voltage level of a drive voltage for each pixel circuit 7 of each pixel 10 of the display panel 1. In various embodiments, the gamma-processed voltage data Dout_g may be generated such that the correspondence between the luminance level of the light emitted by the pixel circuit 7 and the grayscale value described in the input image data Din follows a gamma characteristic represented by a gamma value γ. The processing performed by the flexible gamma circuitry 21 may be referred to as gamma processing. The gamma value γ may be set to, for example, 2.2.

[0043] FIG. 5 illustrates a gamma curve and control points that specify the gamma curve, according to one or more embodiments. The gamma curve represents the input / output characteristics of the flexible gamma circuit unit 21, i.e., the correspondence between the grayscale values ​​of the input image data Din and the voltage values ​​of the gamma-processed voltage data Dout_g. In the illustrated diagram, a first coordinate axis (illustrated as the X-axis) represents the grayscale values ​​of the input image data Din, and a second coordinate axis (illustrated as the Y-axis) represents the voltage values ​​of the gamma-processed voltage data Dout_g. In one embodiment, the flexible gamma circuit unit 21 may be configured to calculate the voltage values ​​of the gamma-processed voltage data Dout_g as the Y-coordinate of a point on the gamma curve having an X-coordinate that corresponds to the grayscale value of the input image data Din.

[0044] In various embodiments, the shape of the gamma curve is specified by a set of control points CP#0 to CP#q, where q is an integer equal to or greater than 1. The gamma curve may be a free curve (e.g., a Bezier curve) having a shape specified by the control points CP#0 to CP#q. The positions of the control points CP#0 to CP#q may be expressed in coordinates in the coordinate system described above. In such an embodiment, the control parameter Para_ctrl may comprise data indicating the coordinates of the control points CP#0 to CP#q. The coordinates of the control point CP#i may be referred to below as (CPXi, CPYi), where CPXi is the coordinate of the control point CP#i on the first coordinate axis or X-axis, and CPYi is the coordinate of the control point CP#i on the second coordinate axis or Y-axis. CPXi and CPYi may be referred to below as the X-coordinate CPXi and the Y-coordinate CPYi, respectively.

[0045] In one or more embodiments, the flexible gamma circuitry 21 is configured to flexibly control the shape of the gamma curve by adjusting the positions of the control points CP#0-CP#q. In various embodiments, the flexible gamma circuitry 21 is configured to adjust the X-coordinates CPX0-CPXq of the control points CP#0-CP#q used to generate the voltage values ​​of the gamma-processed voltage data Dout_g. This allows the gamma curve to be scaled (i.e., enlarged or reduced) in a direction parallel to the first coordinate axis or X-axis. In one or more embodiments, when the gamma curve is scaled in a direction parallel to the first coordinate axis or X-axis, the voltage values ​​of the gamma-processed voltage data Dout_g are increased, thus increasing the drive voltage supplied to the pixel circuit 7. In such an embodiment, when the gamma curve is scaled in a direction parallel to the first coordinate axis or X-axis, the luminance level of the pixel circuit 7 is decreased.

[0046] 4, in one or more embodiments, the IR drop correction circuit unit 22 is configured to correct the gamma processed voltage data Dout_g based on the control parameter Para_ctrl to generate the output voltage data Dout. The control parameter Para_ctrl may include an IR drop compensation gain, and the IR drop correction circuit unit 22 may include a multiplier 23. In such an embodiment, the multiplier 23 may be configured to generate a voltage value of the output voltage data Dout by multiplying a voltage value of the gamma processed voltage data Dout_g by the IR drop compensation gain.

[0047] In one or more embodiments, the greyscale voltage generation circuit unit 15 is configured to supply (m+1) greyscale voltages V0 to Vm to the data driver circuit unit 16. In various embodiments, the (m+1) greyscale voltages V0 to Vm have different voltage levels from one another. In an embodiment in which the greyscale voltage V0 is the highest greyscale voltage and the greyscale voltage Vm is the lowest greyscale voltage, the intermediate greyscale voltages V1 to V(m-1) may be generated by voltage division of the greyscale voltages V0 and Vm. The display brightness level of the display device 100 may depend on a range of drive voltages supplied to the pixel circuits 7, which may have an upper limit for the greyscale voltage V0 and a lower limit for the greyscale voltage Vm. The voltage level of the greyscale voltage V0 is determined by a V0 command value V0 supplied from the control circuit unit 13. * The voltage level of the gradation voltage Vm may be specified by the Vm command value Vm * In such an embodiment, the voltage range of the driving voltage, i.e., the display brightness level of the display device 100, may be specified by the V0 command value V0 * and Vm command value Vm * It can be controlled by.

[0048] In one or more embodiments, the data driver circuit unit 16 is configured to output a drive voltage to be written to each pixel circuit 7 of each pixel 10 of the display panel 1, based on the output voltage data Dout from the image processing circuit unit 14 and the grayscale voltages V0 to Vm. The data driver circuit unit 16 may be configured to select a drive voltage to be written to each pixel circuit 7 from the grayscale voltages V0 to Vm, based on the voltage value of the output voltage data Dout corresponding to each pixel circuit 7. In one or more embodiments, the drive voltage written to each pixel circuit 7 is in the range from Vm to V0, and increases as the voltage value of the output voltage data Dout increases.

[0049] In one or more embodiments, the panel interface circuitry 17 is configured to generate a scan control signal SOUT to control the scan driver circuitry 4 of the display panel 1. In such an embodiment, the scan driver circuitry 4 may be configured to drive the scan lines SC and the emission lines EM based on the scan control signal SOUT. The scan control signal SOUT may include the emission control signal EM_ctrl described above. In such an embodiment, the panel interface circuitry 17 may be configured to control the duty ratio of the emission control signal EM_ctrl based on the emission command value Emission* received from the control circuitry 13. For example, the duty ratio of the emission control signal EM_ctrl may increase as the emission command value Emission* increases. In an embodiment in which the display brightness level of the display device 100 is controllable by the emission control signal EM_ctrl, the display brightness level is controllable by the emission command value Emission*.

[0050] The panel interface circuit unit 17 may be further configured to control the high potential power supply voltage ELVDD and the low potential power supply voltage ELVSS by supplying a PMIC control signal PMIC_ctrl to the PMIC 300. In such an embodiment, the panel interface circuit unit 17 may be configured to control the low potential power supply voltage ELVSS based on an ELVSS command value ELVSS* received from the control circuit unit 13. In one or more embodiments, the low potential power supply voltage ELVSS is set lower than the lowest gradation voltage Vm.

[0051] In one or more embodiments, the control circuitry 13 is configured to control the operation of the signal supply circuitry 12 based on the control data Dctrl received from the host 200. In various embodiments, the control data Dctrl includes a display brightness value (DBV), and the control circuitry 13 is configured to control the display brightness level of the display device 100 based on the DBV. The DBV may be generated based on a user operation. For example, when an instruction to adjust the brightness of an image displayed on the display device 100 is manually input to an input device (not shown), the host 200 may generate the DBV based on the instruction to adjust the display brightness level. The input device may be, for example, a touch panel, a cursor control device, and mechanical and / or non-mechanical buttons provided on at least a part of the display panel 1.

[0052] 6 illustrates an exemplary configuration of the control circuit section 13. In the illustrated embodiment, the control circuit section 13 includes an image analysis circuit section 31, a DBV control circuit section 32, a brightness control circuit section 33, a CP calculation circuit section 34, an IR drop correction control circuit section 35, and a register circuit section 36.

[0053] The image analysis circuitry 31 is configured to analyze the input image data Din to generate analysis data of a display image corresponding to the input image data Din. The image analysis circuitry 31 may further be configured to generate scatter data indicative of the scatter of the luminance levels of the pixels 10.

[0054] The DBV control circuit section 32 determines the luminance emphasis gain G DBV and then the DBV and the brightness emphasis gain G DBV The maximum luminance-emphasized DBV is generated based on the DBV and a luminance emphasis gain G DBV It may also be a product of

[0055] The brightness control circuit section 33 is DBV The brightness control circuit section 33 may include an emission control circuit section 33a, a power supply control circuit section 33b, and a gamma voltage control circuit section 33c. The emission control circuit section 33a is configured to generate an emission command value Emission* based on the highest brightness emphasis DBV. The power supply control circuit section 33b is configured to generate an ELVSS command value ELVSS* based on the highest brightness emphasis DBV. The gamma voltage control circuit section 33c is configured to generate a V0 command value V0 based on the highest brightness emphasis DBV. * and Vm command value Vm * and

[0056] The CP calculation circuit section 34 is configured to generate control points CP#0 to CP#q to be set in the flexible gamma circuit section 21 of the image processing circuit section 14.

[0057] The IR drop correction control circuit section 35 is configured to calculate an IR drop compensation gain based on the dispersion data received from the image analysis circuit section 31 .

[0058] The register circuit unit 36 ​​is configured to hold one or more register values ​​for controlling the operation of the control circuit unit 13. The register circuit unit 36 ​​may be configured so that the register values ​​are rewritable from an external device such as the host 200.

[0059] In one or more embodiments, the control circuit unit 13 is configured to control the analog operation of the signal supply circuit unit 12 based on the input image data Din. This enables dynamic control of the analog operation depending on the content of the input image data Din. The control circuit unit 13 may be configured to control the emission control signal EM_ctrl and / or the low potential side power supply voltage ELVSS. The emission control signal EM_ctrl may be controlled by generating an emission command value Emission* based on the input image data Din. The low potential side power supply voltage ELVSS may be controlled by generating an ELVSSS command value ELVSS* based on the input image data Din. The control of the analog operation may include control of a voltage range of a drive voltage supplied to the pixel circuit 7 based on the input image data Din. The control of the voltage range of the drive voltage may include control of a maximum grayscale voltage V0 and / or control of a minimum grayscale voltage Vm. The above-mentioned control of the analog operation affects the luminance of the entire display image in the display area 3. The maximum grayscale voltage V0 is controlled by a V0 command value V0 based on the input image data Din. * The lowest gradation voltage Vm may be controlled by generating a Vm command value Vm based on the input image data Din. * may be controlled by generating

[0060] The control circuitry 13 may be configured to determine or calculate an average picture level (APL) of each partial region defined in the display region 3 of the display panel 1 based on the input image data Din, and to control the above-mentioned analog operation based on the calculated APL. The APL calculated for each partial region may be referred to as a local APL hereinafter. In one or more embodiments, the APL of a target partial region may be calculated as an average of maximum values ​​of gradation values ​​of sub-pixels of all colors (e.g., red, green, and blue) of each pixel 10 of the partial region. In one or more embodiments, the control circuitry 13 may be configured to control the above-mentioned analog operation based on the highest local APL among the local APLs calculated for each partial region. According to this operation, when a display image corresponding to the input image data Din includes a bright portion, the image may be displayed brighter on the display panel 1.

[0061] 7 illustrates an exemplary definition of a partial region according to one or more embodiments. As shown in FIG. 7, a plurality of partial regions 20, denoted by reference numeral 20, are each associated with a pixel 10 of the display panel 1. Each partial region 20 may be defined to include the corresponding pixel 10. For example, partial regions 201-204 corresponding to pixels 101-104 are defined to include pixels 101-104, respectively. Hereinafter, a local APL of a partial region 20 corresponding to a pixel 10 may be simply referred to as a local APL corresponding to the pixel 10.

[0062] When the corresponding pixel 10 of a certain partial region 20 is sufficiently far from the edge of the display region 3, the partial region 20 may be defined as a rectangular region having a predetermined width and height. Here, the pixel 10 corresponding to the partial region 20 is located at the geometric center of the rectangular region. In FIG. 7, the partial regions 201 and 202 are illustrated as rectangular regions having the predetermined width and height. Here, the corresponding pixels 101 and 102 are sufficiently far from the edge of the display region 3 compared with the dimensions of the partial regions 201 and 202, and are located at the geometric centers of the partial regions 201 and 202. When the corresponding pixel 10 of the partial region 20 is located close to or on the edge of the display region 3, the partial region 20 may be defined as a part of the rectangular region having the above-mentioned predetermined width and height. However, the part is located inside the display region 3, and the pixel 10 corresponding to the partial region 20 is located at the geometric center of the rectangular region. In one or more embodiments, pixel 103 corresponding to partial region 203 is located near an edge of display region 3, and pixel 104 corresponding to partial region 204 is located on an edge of display region 3. In such an embodiment, partial regions 203 and 204 may be defined as portions of a rectangular region having the same width and height as partial regions 201 and 202, provided that the portions are located within display region 3 and pixels 103 and 104 are located at the geometric center of the rectangular region. Although FIG. 7 illustrates only partial regions 201-204 corresponding to pixels 101-104, partial region 20 may be defined for all pixels 10 of display region 3. Although FIG. 7 illustrates partial region 20 as a rectangle, partial region 20 may have other shapes.

[0063] In another embodiment, the control circuit unit 13 may be configured to calculate the APL of the entire display image in the display area 3 of the display panel 1 based on the input image data Din, and control the analog operation of the signal supply circuit unit 12 based on the calculated APL. This operation may make it possible to display a brighter display image corresponding to the input image data Din when the display image is bright. Hereinafter, the APL of the entire display image may be referred to as the global APL to distinguish it from the above-mentioned local APL.

[0064] In another embodiment, the control circuitry 13 may be configured to selectively control the analog operation based on the highest local APL and the analog operation based on the global APL. The control circuitry 13 may be configured to control the analog operation of the signal supply circuitry 12 based on the highest local APL in the local APL mode (also referred to as the first operation mode). The control circuitry 13 may further be configured to control the analog operation of the signal supply circuitry 12 based on the global APL in the global APL mode (also referred to as the second operation mode). The selection of the operation mode may be based on a register value stored in the register circuitry 36. In another embodiment, the selection of the operation mode may be based on a register value stored in another memory provided away from the control circuitry 13.

[0065] In one or more embodiments, the control circuitry 13 is configured to increase the brightness of a bright portion of a display image having a bright portion and a dark portion by controlling an analog operation of the signal supply circuitry 12. Since the analog operation may affect the brightness of the entire display image in the display region 3, in one or more embodiments, the control circuitry 13 is further configured to cancel the increase in brightness of the dark portion by controlling the image processing in the image processing circuitry 14. This may effectively improve the contrast of the display image. In various embodiments, when the emission control signal EM_ctrl is controlled to increase the brightness level of a target pixel 10, the image processing for the pixel 10 may be performed to cancel the increase in the brightness level of the target pixel 10 based on the local APL of the partial region 20 corresponding to the target pixel 10. In one or more embodiments, the control of the image processing of the image processing circuitry 14 may be performed by adjusting the coordinates of the control points CP#0 to CP#q and / or adjusting the IR drop compensation gain.

[0066] In one or more embodiments, the image analysis circuitry 31 is configured to analyze the input image data Din to calculate one or more feature values ​​of the display image corresponding to the input image data Din. The feature values ​​may include a local APL of each partial region 20, a global APL of the display image, or a dispersion degree of the luminance levels of the pixels 10. The image analysis circuitry 31 may be configured to calculate a local APL of each partial region 20 defined in the display region 3 of the display panel 1 based on the input image data Din. The image analysis circuitry 31 may be configured to calculate a global APL of the display image based on the input image data Din. The image analysis circuitry 31 may be configured to generate analysis data indicative of at least one of the highest local APL and the global APL among the local APLs of the partial regions 20. The image analysis circuitry 31 may further be configured to generate dispersion degree data indicative of the dispersion degree of the luminance levels of the pixels 10 in the display image based on the input image data Din. The dispersion data may indicate at least one of the following: a difference between a maximum and a minimum value of the luminance levels of the pixels 10; a variance of the luminance levels of the pixels 10; a mean absolute deviation of the luminance levels of the pixels 10; and a standard deviation of the luminance levels of the pixels 10.

[0067] In one or more embodiments, the DBV control circuitry 32 determines the luminance enhancement gain G based on the analysis data. DBV and then the DBV and the brightness emphasis gain G DBV The maximum luminance-emphasizing DBV may be generated based on the DBV and a luminance emphasis gain G DBV In various embodiments, the maximum luminance emphasis DBV is used as a parameter for controlling the luminance of the brightest part of the display image displayed in the display region 3.

[0068] In an embodiment where the analysis data includes a highest local APL, as shown in FIG. 8, DBV control circuitry 32 may select a luminance emphasis gain G based on the highest local APL. DBV and then the DBV and the brightness emphasis gain G DBVIn such an embodiment, the DBV control circuitry 32 may be configured to generate the highest luminance emphasis DBV based on the highest local APL and the luminance emphasis gain G DBV The DBV control circuitry 32 may further include a luminance emphasis gain table that indicates a correspondence between the luminance emphasis gain G DBV In one or more embodiments, the luminance enhancement gain G DBV can increase with increasing highest local APL. Figure 8 shows that the highest luminance emphasis DBV is the DBV and the luminance emphasis gain G DBV The luminance emphasis gain G DBV is 3.20.

[0069] In an embodiment where the analysis data includes a global APL, as shown in FIG. 9, DBV control circuitry 32 determines the luminance emphasis gain G based on the global APL. DBV and then the DBV and the brightness emphasis gain G DBV In such an embodiment, the DBV control circuitry 32 may be configured to generate the maximum luminance emphasis DBV based on the global APL and the luminance emphasis gain G DBV The DBV control circuit section 32 may further include a luminance emphasis gain table showing the correspondence between the luminance emphasis gain G DBV In one or more embodiments, the luminance enhancement gain G DBV can increase with increasing global APL. Figure 9 shows the relationship between the DBV and the luminance emphasis gain G DBV The luminance emphasis gain G DBV is 2.50.

[0070] In an embodiment in which the display driver 2 has a local APL mode and a global APL mode, the DBV control circuit unit 32 controls the luminance emphasis gain G based on the selection between the local APL mode and the global APL mode. DBV In one or more embodiments, in the local APL mode, the DBV control circuitry 32 may be configured to generate a luminance emphasis gain G based on the highest local APL. DBV and then the DBV and the brightness emphasis gain G DBV In one or more embodiments, the DBV control circuitry 32 may be configured to generate the maximum luminance emphasis DBV based on the global APL in the global APL mode. DBV and then the DBV and the brightness emphasis gain G DBV The selection of the local APL mode and the global APL mode may be based on a register value stored in the register circuit unit 36.

[0071] Referring again to FIG. 6, in one or more embodiments, the brightness control circuitry 33 includes a (DBV and G DBV In one or more embodiments, the brightness control circuit 33 is configured to control an analog operation of the signal supply circuit 12 based on the maximum brightness emphasis DBV (which may be a product of the Emission* and V0 command values ​​V0 * and Vm command value Vm * and an ELVSS command value ELVSS* based on the highest luminance emphasis DBV. The emission command value Emission* may be generated to increase the duty ratio of the emission control signal EM_ctrl as the highest luminance emphasis DBV increases. In various embodiments, as the duty ratio of the emission control signal EM_ctrl increases, the proportion of pixel circuits 7 that emit light increases, and the maximum luminance achievable in the display panel 1 increases. *may be generated to reduce the lowest gradation voltage Vm as the highest-luminance emphasis DBV increases. In various embodiments, as the lowest gradation voltage Vm decreases, the maximum current flowing through the light-emitting element 8 of the pixel circuit 7 increases, and the highest luminance achievable in the display panel 1 increases. The ELVSS command value ELVSS* may be generated to reduce the low-potential-side power supply voltage ELVSS as the highest-luminance emphasis DBV increases. The ELVSS command value ELVSS* may be generated such that the low-potential-side power supply voltage ELVSS is lower than the lowest gradation voltage Vm.

[0072] In one or more embodiments, the luminance control circuitry 33 may be further configured to generate maximum luminance control points CP#0_max to CP#q_max based on the maximum luminance emphasis DBV. The maximum luminance control points CP#0_max to CP#q_max may be a set of control points representing a shape of a gamma curve suitable for the maximum luminance portion of the display image displayed in the display area 3. The luminance control circuitry 33 may be configured to store a set of multiple control points CP#0 to CP#q, and to select the maximum luminance control point CP#0_max to CP#q_max from the stored set of multiple control points CP#0 to CP#q based on the maximum luminance emphasis DBV.

[0073] In one or more embodiments, the CP calculation circuit unit 34 is configured to generate control points CP#0 to CP#q to be set in the flexible gamma circuit unit 21 of the image processing circuit unit 14 by modifying the maximum luminance control points CP#0_max to CP#q_max received from the luminance control circuit unit 33 based on the local APL calculated for each pixel 10. In an embodiment in which the analog operation of the signal supply circuit unit 12 is controlled by the luminance control circuit unit 33 to increase the luminance of a bright portion of the display image, the CP calculation circuit unit 34 may be configured to generate the control points CP#0 to CP#q to cancel the increase in luminance in a dark portion of the display image by the image processing in the image processing circuit unit 14. The control points CP#0 to CP#q to be set in the flexible gamma circuit unit 21 may be calculated for each pixel 10.

[0074] 10, in one or more embodiments, the control points CP#0 to CP#q used to generate the post-gamma-processed voltage data Dout_g for the target pixel 10 may be generated based on a luminance gain G_brt of the target pixel 10. In one or more embodiments, the luminance gain G_brt of the target pixel 10 represents the degree to which the luminance level of the target pixel 10 is reduced in image processing in the image processing circuit unit 14. In various embodiments, the luminance gain G_brt of the target pixel 10 is calculated based on a local APL corresponding to the target pixel 10 and the highest local APL of the displayed image.

[0075] The CP calculation circuitry 34 may include an image enhancement table that describes the correspondence between the local APL and the desired luminance level for each local APL. Furthermore, the CP calculation circuitry 34 may refer to the image enhancement table when generating the luminance gain G_brt for the target pixel 10. In such an embodiment, the CP calculation circuitry 34 may be configured to generate the desired luminance level corresponding to the local APL corresponding to the target pixel 10 and the desired luminance level corresponding to the highest local APL by table lookup to the image enhancement table, and determine the luminance gain G_brt as the ratio of the desired luminance level corresponding to the local APL corresponding to the target pixel 10 to the desired luminance level corresponding to the highest local APL. FIG. 10 illustrates an example in which the local APL corresponding to the target pixel 10 is 96, the highest local APL is 224, and the luminance gain G_brt is 0.78.

[0076] Referring again to FIG. 6, in various embodiments, the control points CP#0 to CP#q used to generate the gamma-processed voltage data Dout_g for the target pixel 10 are generated based on the brightness gain G_brt and the maximum brightness control points CP#0_max to CP#q_max. In one or more embodiments, the X-coordinates CPX0 to CPXq of the control points CP#0 to CP#q are calculated by multiplying the X-coordinates CPX0_max to CPXq_max of the maximum brightness control points CP#0_max to CP#q_max by a coefficient α (≧1) calculated based on the brightness gain G_brt. In one or more embodiments, the Y-coordinates CPY0 to CPYq of the control points CP#0 to CP#q are determined to be the same as the Y-coordinates CPY0 to CPYq of the maximum brightness control points CP#0_max to CP#q_max. As a result, as shown in FIG. 11, the gamma curve used to generate the gamma-processed voltage data Dout_g is expanded by α times in the X-axis direction. In one or more embodiments, the coefficient α may be calculated according to the following formula (1): α = 1 / G_brt 1 / γ , (1) Here, γ is a gamma value set in the display device 100. The gamma value γ may be, for example, 2.2. In an embodiment in which the coefficient α is calculated according to equation (1), the gamma curve is expanded by α times in a direction parallel to the first coordinate axis or the X-axis, which makes the luminance level of each pixel circuit 7 G_brt times (≦1). By using the control points CP#0 to CP#q calculated in this manner in generating the post-gamma-processing voltage data Dout_g for the target pixel 10, it is possible to reduce the luminance level of the target pixel 10 while suppressing changes in the gamma characteristics of the display device 100.

[0077] 6 again, in an embodiment in which the global APL is used to control the analog operation of the signal supply circuit unit 12, the maximum brightness control points CP#0_max to CP#q_max may be used as they are as the control points CP#0 to CP#q set in the flexible gamma circuit unit 21. In an embodiment in which the display device 100 has a global APL mode and a local APL mode, the CP calculation circuit unit 34 may be configured to output the maximum brightness control points CP#0_max to CP#q_max as they are as the control points CP#0 to CP#q set in the flexible gamma circuit unit 21 in the global APL mode. In such an embodiment, the CP calculation circuit unit 34 may further be configured to generate the control points CP#0 to CP#q set in the flexible gamma circuit unit 21 by modifying the maximum brightness control points CP#0_max to CP#q_max based on the local APL calculated for each pixel 10 in the local APL mode.

[0078] In one or more embodiments, the IR drop correction control circuit unit 35 may be configured to calculate the IR drop compensation gain based on the dispersion data received from the image analysis circuit unit 31. The IR drop correction control circuit unit 35 may be configured to select whether to perform IR drop correction based on the dispersion of the luminance levels of the pixels 10 indicated by the dispersion data. When IR drop correction is performed, the IR drop compensation gain may be calculated based on the position of the target pixel 10 and the total current flowing through the display panel 1. When IR drop correction is not performed, the IR drop compensation gain may be unconditionally set to "1", and the gamma-processed voltage data Dout_g may be output as it is as the output voltage data Dout.

[0079] In one or more embodiments, when the spread data indicates that the spread of the luminance levels of the pixels 10 exceeds a predetermined threshold, the IR drop compensation is not performed. In an embodiment in which the grayscale values ​​of the input image data Din are 8-bit values ​​ranging from 0 to 255 (inclusive), the luminance levels of the pixels 10 may be determined as values ​​ranging from 0 to 255 (inclusive), and the predetermined threshold may be set to a value ranging from 0 to 255 (inclusive). The predetermined threshold may be dependent on the desired contrast of the displayed image. The IR drop compensation reduces contrast while reducing unevenness caused by voltage drops in the power supply lines. In one or more embodiments, when the spread of the luminance levels of the pixels 10 exceeds a predetermined threshold and therefore the contrast of the displayed image should be increased, the IR drop compensation may be not performed to suppress the reduction in contrast.

[0080] In embodiments where the spread data indicates a difference between minimum and maximum luminance values ​​of pixels 10 in the displayed image, the decision to perform IR drop compensation may be based on comparing the difference between the minimum and maximum luminance values ​​to a predetermined threshold. In one or more embodiments, IR drop compensation is not performed if the difference between the minimum and maximum luminance values ​​of pixels 10 is greater than the predetermined threshold. In one or more embodiments, IR drop compensation is performed if the difference between the minimum and maximum luminance values ​​of pixels 10 is less than the predetermined threshold.

[0081] In one or more embodiments, when the dispersion of the luminance levels of the designated pixels 10 is large, an inverse correction may be performed that has an opposite effect to the IR drop correction. The inverse correction may be performed to enhance unevenness caused by a voltage drop in the power supply line. The inverse correction may be performed to reduce the luminance level of the target pixel 10 to a greater extent as the total current flowing through the display panel 1 increases. In one or more embodiments, the inverse correction may enhance the contrast of the displayed image. The implementation of the inverse correction may be controlled based on a comparison between a difference between a maximum value and a minimum value of the luminance level of the pixel 10 and a predetermined threshold value. For example, the inverse correction may be performed when the difference between the maximum value and the minimum value is greater than the predetermined threshold value. In an embodiment in which the grayscale value of the input image data Din is an 8-bit value ranging from 0 to 255 (inclusive), the luminance level of the pixel 10 may be determined as an 8-bit value ranging from 0 to 255 (inclusive), and the predetermined threshold value may be set to a value between 0 to 255 (inclusive) depending on the desired contrast of the displayed image.

[0082] Method 1200 of Figure 12 illustrates steps for controlling signal providing circuitry 12 in one or more embodiments. Note that the order of steps may be changed from the order illustrated.

[0083] In the illustrated embodiment, in step 1210, an emission control signal EM_ctrl that controls the ratio of pixel circuits 7 that emit light to the pixel circuits 7 of the entire display panel 1 is supplied from the panel interface circuit unit 17 to the display panel 1. In step 1220, a low potential side power supply voltage ELVSS is supplied from the PMIC 300 to the display panel 1. In step 1230, grayscale voltages V0 and Vm, which may be the maximum and minimum grayscale voltages, are generated.

[0084] In step 1240, analysis data is generated by the image analysis circuitry 31 based on the input image data Din. The analysis data may indicate the local APL of each partial region 20 and / or the global APL of the displayed image. The local APL may be calculated for each of all pixels 10 in the display region of the display panel 1.

[0085] In step 1250, in one or more embodiments, the emission control signal EM_ctrl is controlled based on the analysis data. The duty ratio of the emission control signal EM_ctrl may be controlled based on the analysis data. In one or more embodiments, the emission control signal EM_ctrl is controlled based on the local APL of each sub-region 20. In some embodiments, the emission control signal EM_ctrl is controlled based on the highest local APL. The duty ratio of the emission control signal EM_ctrl may increase as the highest local APL increases. This increases the duty ratio of the emission control signal EM_ctrl when the image contains bright areas, improving the contrast of the displayed image. In other embodiments, the emission control signal EM_ctrl is controlled based on the global APL.

[0086] In step 1260, optionally, the low-potential side power supply voltage ELVSS is controlled based on the analysis data. The low-potential side power supply voltage ELVSS may be based on the local APL of each sub-region 20. In some embodiments, the low-potential side power supply voltage ELVSS is controlled based on the highest local APL. In other embodiments, the low-potential side power supply voltage ELVSS is controlled based on the global APL.

[0087] In step 1270, optionally, the grayscale voltages V0 and Vm are controlled based on the analysis data. The grayscale voltages V0 and Vm may be based on the local APL of each sub-region 20. In some embodiments, the grayscale voltages V0 and Vm are controlled based on the highest local APL. In other embodiments, the grayscale voltages V0 and Vm are controlled based on the global APL.

[0088] In step 1280, in one or more embodiments, the control points CP#0 to CP#q are determined or calculated by the CP calculation circuitry 34. In embodiments in which the control points CP#0 to CP#q are determined or calculated for each pixel 10, the control points CP#0 to CP#q are determined or calculated based on a local APL corresponding to each pixel 10. The control points CP#0 to CP#q may be determined or calculated based on the local APL corresponding to the target pixel 10 so as to cancel an increase in the luminance level of the target pixel 10 caused by control of the emission control signal EM_ctrl, the low potential side power supply voltage ELVSS, and / or the grayscale voltages V0 and Vm.

[0089] Optionally, IR drop compensation is controlled at step 1290. In one or more embodiments, the IR drop compensation control circuitry 35 may select to perform or not perform IR drop compensation based on the spread of luminance levels of the pixels 10.

[0090] 13 illustrates an exemplary operation of the display device 100. In one or more embodiments, when the display device 100 is set to a normal mode, the luminance enhancement gain G DBV is set to "1", and the analog operation and image processing of the signal supply circuit unit 12 are controlled based on the DBV. In the example of Fig. 12, the emission command value Emission* is set so that the duty ratio of the emission control signal EM_ctrl is set to 50%, and a gamma curve corresponding to the DBV is used in the image processing.

[0091] In one or more embodiments, when the display device 100 is set to the local APL mode, the highest luminance-emphasized DBV is calculated based on the highest local APL. Furthermore, in an embodiment in which the display image includes a bright portion as shown in FIG. 12, the one or more local APLs calculated for the bright portion are increased, and the highest local APL is also increased. Thus, the highest luminance-emphasized DBV is calculated to be greater than the original DBV. In the example shown in FIG. 12, the highest luminance-emphasized DBV is 150% of the original DBV. In one or more embodiments, the analog operation of the signal supply circuit unit 12 is controlled based on the highest luminance-emphasized DBV. In the example shown in FIG. 12, the emission command value Emission* is set so that the duty ratio of the emission control signal EM_ctrl is 99.7%. This allows the display device 100 to display the brightest portion of the display image brightly. In one or more embodiments, image processing is performed on the dark portion of the display image based on the local APL calculated for each pixel 10 to cancel the increase in luminance caused by the control of the analog operation. Thus, the dark portion of the display image remains unchanged. Operation in the local APL mode illustrated in FIG. 12 can effectively improve contrast.

[0092] Although various embodiments are specifically described herein, those skilled in the art will understand that the techniques disclosed herein can be practiced with various modifications.

Claims

1. a signal supply circuit section configured to supply an emission control signal to the display panel for controlling a pixel circuit that emits light of the display panel, and to control a duty ratio of the emission control signal; a control circuit configured to calculate a local average image level, which is an average of gradation values ​​of images in a plurality of partial regions of a display region of the display panel, or a global average image level, which is an average of gradation values ​​of an entire display image displayed on the display panel, based on input image data, and to control the duty ratio of the emission control signal based on the calculated local average image level or global average image level; A display driver comprising:

2. Controlling the emission control signal includes controlling the emission control signal based on a highest local average picture level among local average picture levels of the plurality of sub-regions.

2. A display driver as claimed in claim 1.

3. controlling the emission control signal based on the highest local average picture level; generating a highest brightness-enhanced display brightness value (DBV) based on a DBV received from a device external to the display driver and the highest local average picture level; controlling the emission control signal based on the maximum brightness emphasis DBV; Includes 3. A display driver according to claim 2.

4. Each of the plurality of partial regions is associated with one or more pixels of the display panel.

2. A display driver as claimed in claim 1.

5. The signal supply circuit unit an image processing circuit configured to generate output voltage data based on the input image data; a data driver circuit configured to drive the pixel circuit based on the output voltage data; Equipped with generating the output voltage data includes processing a first one of the one or more pixels based on a local average picture level of a first one of the plurality of sub-regions and a highest local average picture level of the plurality of sub-regions; The first partial region corresponds to the first pixel.

5. A display driver according to claim 4.

6. When the emission control signal is controlled to increase the luminance level of the first pixel, image processing for the first pixel is performed to cancel the increase in the luminance level of the first pixel based on a local average image level of the first partial region.

6. A display driver according to claim 5.

7. The signal supply circuit unit an image processing circuit configured to perform IR drop correction for compensating for a voltage drop in a power supply line of the display panel on the input image data to generate output voltage data; a data driver circuit configured to drive the pixel circuit based on the output voltage data; Equipped 2. A display driver as claimed in claim 1.

8. The IR drop correction is based on the dispersion of luminance levels of pixels of the display panel. A display driver according to claim 7.

9. The IR drop correction is disabled based on the spread of luminance levels of pixels of the display panel. A display driver according to claim 7.

10. The control circuit is configured to control a low-potential power supply voltage supplied to the display panel based on the input image data.

2. A display driver as claimed in claim 1.

11. Controlling the low potential power supply voltage includes controlling the low potential power supply voltage based on local average luminance levels of a plurality of partial regions of a display region of the display panel. A display driver as claimed in claim 10.

12. Controlling the low potential power supply voltage includes controlling the low potential power supply voltage based on a highest local average luminance level among local average luminance levels of a plurality of partial regions in a display region of the display panel. A display driver as claimed in claim 10.

13. The signal supply circuit unit an image processing circuit configured to generate output voltage data based on the input image data and to control a voltage range of a driving voltage based on the input image data; a data driver circuit configured to supply the driving voltage to the pixel circuit based on the output voltage data; Equipped 2. A display driver as claimed in claim 1.

14. Controlling the voltage range of the driving voltage includes controlling the voltage range based on local average luminance levels of a plurality of sub-regions defined in a display region of the display panel. A display driver as claimed in claim 13.

15. Controlling the voltage range of the driving voltage includes controlling the voltage range based on a highest local average luminance level among local average luminance levels of a plurality of partial regions in a display region of the display panel. A display driver as claimed in claim 13.

16. A display panel; A display driver; Equipped with The display driver a signal supply circuit section configured to supply an emission control signal to the display panel for controlling a pixel circuit that emits light of the display panel, and to control a duty ratio of the emission control signal; a control circuit configured to calculate a local average image level, which is an average of gradation values ​​of images in a plurality of partial regions of a display region of the display panel, or a global average image level, which is an average of gradation values ​​of an entire display image displayed on the display panel, based on input image data, and to control the duty ratio of the emission control signal based on the calculated local average image level or global average image level; Equipped Display device.

17. Controlling the emission control signal includes controlling the emission control signal based on a highest local average picture level among local average picture levels of the plurality of sub-regions. The display device according to claim 16.

18. controlling the emission control signal based on the highest local average picture level generating a highest brightness-enhanced display brightness value (DBV) based on a DBV received from a device external to the display driver and the highest local average picture level; controlling the emission control signal based on the maximum brightness emphasis DBV; Includes The display device according to claim 17.

19. supplying an emission control signal for controlling a pixel circuit of a display panel that emits light to the display panel such that a duty ratio of the emission control signal is controlled; Calculating a local average image level, which is an average of the gradation values ​​of images in a plurality of partial regions of the display region of the display panel, or a global average image level, which is an average of the gradation values ​​of the entire display image displayed on the display panel, based on input image data; controlling the duty ratio of the emission control signal based on the calculated local average picture level or the calculated global average picture level; Includes method.

Images