Semiconductor Device

Abstract

To realize an aluminum alloy film capable of achieving both film hardness for suppressing cracking of the film itself and stress relaxation applied to other films covered by the film, and a semiconductor device using the same.SOLUTION: An Al-Si-Mg alloy film contains at least 0.9 wt.% to 1.1 wt.% Si and 0.1 wt.% to 2.3 wt.% Mg, and contains Mg silicide crystals in Al crystals. In addition, the semiconductor device includes a plurality of trench gate structures including a gate trench 3, a gate insulating film 4, and a gate electrode 5 on one surface 2a of a substrate 2, an interlayer insulating film 6 covering the trench gate structures, an electrode film 7 covering the interlayer insulating film 6, an insulating layer 8 covering the electrode film 7, and a conductive layer 9. This electrode film 7 is composed of the Al-Si-Mg alloy film.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an aluminum alloy Membrane The present invention relates to a semiconductor device using the same. [Background technology]

[0002] Conventionally, there is known a power semiconductor device using a semiconductor substrate mainly composed of Si (silicon) or SiC (silicon carbide) and using an aluminum alloy film as an electrode film. This type of semiconductor device is being miniaturized, for example, in fields such as in-vehicle applications. However, as the miniaturization of semiconductor devices progresses, the areas of the semiconductor elements and their electrodes, which are the components, are also reduced, which causes issues such as migration occurring in the electrodes and an increase in the amount of heat generated due to increased resistance.

[0003] As a method for solving the above problems, it has been proposed to form an electrode from an Al (aluminum) alloy film, as described in Patent Document 1. This Al alloy film is mainly made of Al-Cu (copper) with at least one element of the group X consisting of Nd (neodymium), Gd (gadolinium), La (lanthanum) and Mg (magnesium) added, and while having low resistance, high film hardness can be obtained. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2019-102896 A Summary of the Invention [Problem to be solved by the invention]

[0005] The present inventors have investigated miniaturization of this type of semiconductor device, which includes a semiconductor element having an electrode film, an insulating layer that partially covers the electrode film, and a conductive layer that covers the portion of the electrode film that is exposed through the insulating layer, and have found that thermal stress concentrates at the points of the electrode film where the insulating layer and the conductive layer are in contact (hereinafter referred to as "triple points" for convenience), causing cracks.

[0006] Therefore, the inventors constructed the electrode film from an Al-Cu-X alloy film described in Patent Document 1, and the cracks at the triple points of the electrode film were suppressed. However, on the other hand, a new problem of cracks occurring in other layers covered by the electrode film was found. In other words, in order to further improve the reliability of the semiconductor device having the above configuration, it is necessary to achieve both film hardness for suppressing cracks in the electrode film and relaxation of stress applied to other films covered by it.

[0007] In view of the above, the present invention provides an aluminum alloy that can simultaneously achieve a film hardness that suppresses cracks in the film itself and a stress relaxation on other films that are covered by the film. Membrane The present invention aims to provide a semiconductor device using the same as an electrode film and having improved reliability. [Means for solving the problem]

[0010] In order to achieve the above object, claim 1, 2 and 3The semiconductor device described in is a semiconductor device having a vertical semiconductor element with a trench gate structure, and includes a substrate (2) having one surface (2a) and another surface (2b) that are in a front-back relationship and made of silicon or silicon carbide, a plurality of gate trenches (3) that are grooves extending from one surface to the other surface and are arranged apart from each other, a gate insulating film (4) that covers the inner wall surfaces of the gate trenches, a gate electrode (5) that is provided on the gate insulating film and fills the gate trenches, and a gate electrode (6) that is provided on the one surface and covers the plurality of gate trenches while filling the gate trenches between adjacent gate trenches on the one surface. the insulating layer (8) being provided on the electrode film and having an opening (81) exposing a portion of the electrode film; and a conductive layer (9) being disposed in the opening and covering the portion of the electrode film exposed from the insulating layer, wherein the electrode film is made of an Al-Si-Mg alloy containing at least 0.9% by weight to 1.1% by weight of Si and 0.1% by weight to 2.3% by weight of Mg, and has an aluminum alloy layer containing Mg silicide crystals in the Al crystals. In the semiconductor device described in claim 1, the electrode film is formed by laminating a first layer (71) and a second layer (72) from the interlayer insulating film side, the first layer being the aluminum alloy layer, and the second layer being made of an aluminum alloy having a film hardness greater than that of the first layer. Claim 2 In the semiconductor device described in the above, the electrode film is formed by stacking a first layer (71), a second layer (72), and a third layer (73) from the interlayer insulating film side, the second layer being the aluminum alloy layer, and the first layer and the third layer being made of an aluminum alloy having a film hardness greater than that of the second layer. Claim 3 In the semiconductor device described in the above, the electrode film is formed by laminating a first layer (71) and a second layer (72) from the interlayer insulating film side, the second layer being the aluminum alloy layer, and the first layer being made of an aluminum alloy having a film hardness greater than that of the second layer.

[0011] This semiconductor device has a trench gate structure, in which a trench gate structure portion extending from one surface of a substrate to the other surface is covered with an interlayer insulating film, and includes an electrode film on the interlayer insulating film, an insulating layer covering a portion of the electrode film and having an opening, and a conductive layer covering the electrode film at the opening. At least a portion of this electrode film has an aluminum alloy layer having a film hardness capable of suppressing cracks in itself and alleviating stresses applied to other adjacent films. Therefore, this semiconductor device has a structure in which cracks originating from triple points in the electrode film where the electrode film contacts the insulating layer and the conductive layer are suppressed, and stresses applied to the interlayer insulating film covered by the electrode film are alleviated, thereby suppressing cracks in the interlayer insulating film. The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and specific components described in the embodiments described below. [Brief description of the drawings]

[0012] [Figure 1] 1 is a cross-sectional view showing a semiconductor device according to a first embodiment. [Diagram 2] 11A and 11B are diagrams showing cracks in an electrode film in a semiconductor device of a comparative example. [Diagram 3] 11A and 11B are diagrams showing cracks in an interlayer insulating film in a semiconductor device of a comparative example. [Figure 4] 1 is a graph showing the strain-tensile properties of several aluminum alloys having different compositions. [Diagram 5] FIG. 1 is a diagram showing the relationship between the Mg content and film hardness in an AlSi alloy. [Figure 6] FIG. 1 is a graph showing the relationship between the Mg content in an AlSi alloy and the amount of strain in an interlayer insulating film. [Figure 7] FIG. 2 is a diagram showing the results of SEM (Scanning Electron Microscope) observation of an Al—Si—Mg alloy film, illustrating the presence of Mg silicide crystals in Al crystals. [Figure 8] FIG. 4 is a cross-sectional view showing a semiconductor device according to a second embodiment. [Figure 9] FIG. 11 is a cross-sectional view showing a semiconductor device according to a third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals.

[0014] (First embodiment) A semiconductor device 1 according to a first embodiment will be described with reference to FIG.

[0015] [Basic configuration] The semiconductor device 1 of the present embodiment is configured to have, for example, a vertical semiconductor element having a trench gate structure. In this specification, a vertical power semiconductor element having a MOSFET formed therein will be described as a representative example, but the present invention is not limited to this element structure.

[0016] As shown in FIG. 1, the semiconductor device 1 includes a substrate 2, a trench gate structure including a gate trench 3 formed in the substrate 2, a gate insulating film 4, and a gate electrode 5, an interlayer insulating film 6, an electrode film 7, an insulating layer 8, and a conductive layer 9.

[0017] The substrate 2 is a semiconductor substrate made of, for example, Si (silicon) or SiC (silicon carbide). The substrate 2 is in the form of a plate having a first surface 2a and a second surface 2b, which are opposite surfaces. For example, in a region where a MOSFET is to be formed, a n-type semiconductor substrate made of SiC is formed from the second surface 2b toward the first surface 2a. + type layer, n - type layer, n type layer, p type layer, n + The substrate 2 has a laminated structure of a mold layer. + The above-mentioned layers are obtained by epitaxially growing on a mold substrate.

[0018] The n on the other surface 2b of the substrate 2 + The dopant layer has an n-type impurity concentration of, for example, 1.0×10 19 / cm 3The surface is the (0001) Si surface. + Layered on the mold layer - The dopant layer has an n-type impurity concentration of, for example, 0.5 to 2.0 × 10 16 / cm 3 It is said that. - The n-type layer laminated on the n-type layer has an n-type impurity concentration of, for example, 8×10 16 / cm 3 It is said that the degree - The n-type layer has a higher concentration (i.e., a lower resistance) than the n-type layer, and serves to reduce the JFET resistance by dispersing the current over a wider range. - Together with the mold layer, it constitutes a drift layer.

[0019] The p-type layer laminated on the n-type layer of the substrate 2 is a portion in which a channel region is formed, and has a p-type impurity concentration of, for example, 2.0×10 17 / cm 3 The thickness of the substrate 2 is about 300 nm. + The n-type impurity concentration in the surface layer is, for example, 2.5×10 18 ~1.0×10 19 / cm 3 And so on. - The impurity concentration is higher than that of the mold layer, and the thickness is about 0.5 μm. The substrate 2 is formed with, for example, an annular guard ring (not shown) surrounding the region in which the MOSFET is to be formed. The substrate 2 is a groove extending from one surface 2a to the other surface 2b, and the n-type layer located on the outermost surface of the one surface 2a is formed with a n-type gate. + The n-type layer and the p-type layer are penetrated. - A gate trench 3 is formed which reaches the mold layer.

[0020] A plurality of gate trenches 3 are provided on one surface 2a of the substrate 2, for example, and are spaced apart from each other. The gate trenches 3 are arranged at a pitch of, for example, 1.0 μm, and have an aspect ratio, which is the ratio of depth to width, of 2 or more. The plurality of gate trenches 3 are formed by anisotropic etching such as RIE (Reactive Ion Etching) using a mask, for example, and are linear grooves when viewed from the normal direction to the one surface 2a, and are arranged in a stripe shape in parallel at equal intervals. A gate insulating film 4 is formed on the inner wall surface of the plurality of gate trenches 3.

[0021] The gate insulating film 4 is an insulating film provided along and covering the inner wall surface of the gate trench 3, and is made of, for example, SiO2. The gate insulating film 4 is formed to a thickness of about 100 nm by CVD (chemical vapor deposition) using, for example, TEOS (tetraethoxysilane) as a gas material. The surface of the gate insulating film 4 is covered with a gate electrode 5 that fills the gate trench 3.

[0022] The gate electrode 5 has an n-type impurity of, for example, 1.0×10 17 ~1.0×10 20 / cm 3 The gate electrode 5 is made of doped Poly-Si containing about 1000 .mu.m of doped Poly-Si. The gate electrode 5 is formed, for example, by forming a film of doped Poly-Si by CVD and then etching it back so as to leave the Poly-Si at least in the gate trench 3.

[0023] In this manner, a plurality of trench gate structures each including a gate trench 3, a gate insulating film 4, and a gate electrode 5 are provided at a predetermined pitch on one surface 2a of the substrate 2. The substrate 2 has an interlayer insulating film 6 formed thereon to cover the trench gate structures on one surface 2a.

[0024] The interlayer insulating film 6 is, for example, an insulating film that covers the trench gate structures on the surface 2a of the substrate 2 and has a predetermined pattern shape having contact holes that expose the regions between adjacent trench gate structures. The interlayer insulating film 6 is, for example, formed by CVD to a thickness of 300 nm to 900 nm and is made of an insulating material such as BPSG (Boron Phosphorus Silicon Glass). The interlayer insulating film 6 electrically insulates the gate electrode 5 from the electrode film 7 and is covered by the electrode film 7.

[0025] In this embodiment, the electrode film 7 is an aluminum alloy layer composed of an Al-Si-Mg alloy film containing at least 0.9 wt % to 1.1 wt % Si and 0.1 wt % to 2.3 wt % Mg over the entire region. The electrode film 7 is composed of an Al-Si-Mg alloy film having the above composition, and thus has a film hardness that can simultaneously suppress the occurrence of cracks originating from triple points that contact both the insulating layer 8 and the conductive layer 9 and relieve the stress applied to the interlayer insulating film 6. The electrode film 7 is an aluminum alloy layer having the above composition, and is configured such that Mg silicide crystals exist in the Al crystals. These details will be described later. The electrode film 7 is formed so as to cover the interlayer insulating film 6 and fill the contact holes therein, and is in ohmic contact with the one surface 2a of the substrate 2. The electrode film 7 is formed, for example, by preparing a target material made of an Al-Si-Mg alloy having the above composition and depositing the film using a sputtering device. In the case of sputtering, the electrode film 7 can be formed under conditions of, for example, DC power of 6.0 to 12.0 kW, vacuum degree of 0.2 Pa, and film formation temperature of 200 to 350° C., but is not limited to these film formation conditions. The electrode film 7 is partially covered with an insulating layer 8, and a portion exposed from an opening 81 of the insulating layer 8 is covered with a conductive layer 9.

[0026] The insulating layer 8 is made of an insulating resin material such as polyimide, and has a predetermined pattern shape having openings 81. The insulating layer 8 is formed by, for example, forming a film by a wet film forming method such as spin coating, and then patterning by a photolithography etching method. The insulating layer 8 has a thickness of, for example, 10.0 μm, which is larger than the thickness of the conductive layer 9.

[0027] The conductive layer 9 is made of, for example, a conductive metal material such as Ni (nickel) or an alloy thereof, and is electrically connected to a portion of the electrode film 7 exposed by the opening 81. The conductive layer 9 functions, together with the electrode film 7, as, for example, a source electrode in a region where a MOSFET is formed. The conductive layer 9 is a cover layer that covers the electrode film 7, and has a thickness of, for example, about 4.5 μm.

[0028] In addition, the electrode film 7 is used as a first electrode, and a second electrode (not shown) that forms a pair with the first electrode is formed on the other surface 2b of the substrate 2. When the electrode film 7 is a source electrode, the second electrode is a drain electrode.

[0029] The above is the basic configuration of the semiconductor device 1 of this embodiment.

[0030] [Electrode film] Next, the composition and effects of electrode film 7 will be described in comparison with a comparative semiconductor device in which a film equivalent to electrode film 7 is constituted by a conventional aluminum alloy film.

[0031] For the sake of convenience, an aluminum alloy film in which α weight percent of element X1 is added to Al is referred to as "Al-αwt%X1", and an aluminum alloy film in which β weight percent of element X2 is added to Al-αwt%X1 is referred to as "Al-αwt%X1-βwt%X2". In addition, an aluminum alloy film in which 0.9-1.1 weight percent of Si and 0.1-2.3 weight percent of Mg are added to Al is collectively referred to simply as "Al-Si-Mg alloy film".

[0032] 2, the semiconductor device 100 of the comparative example has the same basic configuration as the semiconductor device 1 of the present embodiment, but the film corresponding to the electrode film 7 is an electrode film M1 composed of Al-1 wt % Si. The electrode film M1 is an aluminum alloy film having a lower film hardness than an Al-Si-Mg alloy film and a composition that can more easily relieve the stress applied to the interlayer insulating film 6.

[0033] However, when the present inventors performed a reliability evaluation test using thermal cycles on the semiconductor device 100 of the comparative example, it was found that cracks occurred starting from the triple point TP, which is a portion of the electrode film M1 that contacts both the insulating layer 8 and the conductive layer 9. This is thought to be because stress was concentrated at the triple point TP, and the film hardness of the electrode film M1 was not enough to withstand the stress.

[0034] Therefore, the inventors fabricated a comparative semiconductor device 101 having an electrode film M2 made of an aluminum alloy film having a film hardness greater than that of the electrode film M1, as shown in FIG. 3, and performed a similar reliability evaluation test. The electrode film M2 is made of, for example, Al-1%Cu. As a result of the reliability evaluation test, the comparative semiconductor device 101 did not have any cracks in the electrode film M2, but did have cracks in the interlayer insulating film 6 covered by it. This is thought to be because, while the film hardness of the electrode film M2 is increased and cracks in the electrode film M2 can be suppressed, the film is too hard, weakening the stress relaxation effect and causing stress to concentrate in the interlayer insulating film 6.

[0035] The above results show that it is necessary to adjust the film hardness to a level that can simultaneously suppress cracks in the electrode film and relieve the stress applied to the interlayer insulating film 6.

[0036] Here, the results of evaluating the strain-tensile properties of a number of aluminum alloy films with different compositions are shown in Figure 4. In Figure 4, the horizontal axis is true strain, and the vertical axis is true stress.

[0037] For Al-1%Si, the true stress increases to about 50 MPa as the true strain changes from 0 to 0.01, but when the true strain exceeds 0.01, the true stress is about 60 MPa. It is believed that the cracks occurred in the electrode film M1 composed of Al-1wt%Si because it is an aluminum alloy that is soft and brittle.

[0038] For Al-1wt%Cu, the true stress rose to about 320MPa as the true strain went from 0 to 0.01, and when the true strain exceeded 0.01 the true stress was about 380MPa. The electrode film M2 made of Al-1wt%Cu is an aluminum alloy that is harder than Al-1wt%Si, so although no cracks occurred in the electrode film M2, it is believed that the stress relaxation effect was weakened.

[0039] For Al-5wt%Mg, the true stress rose to about 630MPa as the true strain went from 0 to 0.01, and even when the true strain exceeded 0.01, the true stress rose slowly, reaching about 720MPa at a true strain of 0.05. Al-5wt%Mg is an aluminum alloy film that is harder than Al-1wt%Cu, and it is thought that if an electrode film is formed using this, the results will be similar to those of Al-1wt%Cu.

[0040] Therefore, in order to simultaneously suppress cracks in the electrode film and relieve the stress applied to the interlayer insulating film 6, it is sufficient to use an aluminum alloy film having strain-tensile characteristics intermediate between those of Al-1wt%Si and Al-1wt%Cu, for example.

[0041] As a result of intensive research, the inventors of the present invention found that the above-mentioned compatibility can be achieved by using an Al-Si-Mg alloy film. For example, in the case of Al-1wt%Si-2wt%Mg, as the true strain changes from 0 to 0.02, the true stress increases to about 150MPa, and thereafter the true strain remains almost constant. When a reliability evaluation test similar to that of the semiconductor device 100 of the comparative example was carried out on the semiconductor device 1 having the electrode film 7 made of an Al-Si-Mg alloy film having such characteristics, no cracks were generated in either the electrode film 7 or the interlayer insulating film 6.

[0042] Next, the relationship between the Mg content in the Al-Si-Mg alloy film and the film hardness of the alloy film will be described with reference to FIG.

[0043] The results shown in Fig. 5 were obtained by nanoindentation measurement of evaluation samples prepared by depositing an Al-Si alloy film or an Al-Si-Mg alloy film with different Mg contents to a thickness of 5.0 μm on a silicon substrate. The aluminum alloy film of the evaluation sample was based on Al-Si, which is Al with 0.9 wt% to 1.1 wt% Si added, and was deposited by sputtering using a target material with different Mg contents.

[0044] The Al-Si alloy film not containing Mg had a film hardness of about 0.78 GPa. The Al-Si-Mg alloy film had a film hardness of about 0.66 GPa when the Mg content was 0.5 wt%, and about 0.90 GPa (estimated value) when the Mg content was 2.5 wt%. The curve shown by the dashed line in FIG. 5 was obtained by curve approximation of these results by the least squares method. As a result of the study by the inventors, the film hardness required to suppress the cracking of the film itself was 0.6 to 0.8 GPa. The Mg content that satisfies this condition is 2.3 wt% or less.

[0045] Next, the relationship between the Mg content in the Al-Si-Mg alloy film and the amount of strain in the interlayer insulating film 6 will be described with reference to FIG.

[0046] The results shown in Fig. 6 were obtained by simulation calculation using CAE analysis. In this CAE analysis, a simulation model was used in which a BPSG film (corresponding to the interlayer insulating film 6) with a thickness of 900 nm was formed on a silicon substrate, and an Al-Si or Al-Si-Mg alloy film with a varying Mg content with a thickness of 5.0 µm was formed on the BPSG. The vertical axis of Fig. 6, "amount of strain in the interlayer insulating film," is the simulation result for the BPSG film of the analysis model described below.

[0047] The amount of strain in the BPSG film for the Al-Si alloy film that does not contain Mg is approximately 3.5 × 10 -3 In the Al-Si-Mg alloy film, when the Mg content was 0.5 wt%, the strain of the BPSG film was approximately 1.7 × 10 -3 When the Mg content is 2.5 wt%, the strain of the BPSG film is about 3.4 × 10 -3 The curve shown by the dashed line in FIG. 6 was obtained by curve approximation using the least squares method. As a result of the investigation by the present inventors, it was found that the amount of strain should be 3.0×10 -3 The Mg content that satisfies this condition is 0.1 to 2.3 wt %.

[0048] These results indicate that the Mg content must be within the range of 0.1 to 2.3 wt % in order to obtain an Al-Si-Mg alloy film that can simultaneously suppress cracks in the electrode film 7 and relieve the stress on the interlayer insulating film 6. In other words, by making the electrode film 7 an Al-Si-Mg alloy film containing at least 0.9 to 1.1 wt % Si and 0.1 to 2.3 wt % Mg, it is possible to simultaneously suppress cracks in the electrode film 7 and relieve the stress on other films.

[0049] In addition, when the surface of a sample in which an Al-Si-Mg alloy film was formed on a silicon substrate was observed by SEM, Mg silicide crystals were found to exist, for example as shown in Figure 7. The Al-Si-Mg alloy film in the sample shown in Figure 7 is Al-1.0wt%Si-0.5wt%Mg. In Figure 7, arrows indicate Mg silicide crystals.

[0050] In this embodiment, the Al-Si-Mg alloy film contains at least 0.9-1.1 wt% Si and 0.1-2.3 wt% Mg, making it possible to reduce cracks in the film and stresses on other films covered by the film. The semiconductor device 1, in which the electrode film 7 is formed from the Al-Si-Mg alloy film and the interlayer insulating film 6 is covered by the electrode film 7, has a configuration in which cracks in the electrode film 7 and the interlayer insulating film 6 are suppressed, and the semiconductor device 1 has a power semiconductor element with improved reliability.

[0051] Second embodiment The semiconductor device 1 of the second embodiment will be described with reference to FIG.

[0052] 8, the semiconductor device 1 of this embodiment differs from the first embodiment in that the electrode film 7 has a laminated structure in which a first layer 71 and a second layer 72 are laminated from the side of the interlayer insulating film 6. In this embodiment, this difference will be mainly described.

[0053] In this embodiment, the electrode film 7 is formed by laminating two aluminum alloy films having different compositions, and has a total thickness of, for example, about 5.0 μm.

[0054] The first layer 71 is made of an Al-Si-Mg alloy film containing at least 0.9 wt % to 1.1 wt % Si and 0.1 wt % to 2.3 wt % Mg. The first layer 71 has a thickness of, for example, 1.0 to 2.5 μm and has a film hardness sufficient to function as a stress relaxation layer that relieves stress applied to the interlayer insulating film 6 from the insulating layer 8, the conductive layer 9, and the second layer 72 while suppressing the occurrence of cracks in the first layer 71 itself.

[0055] The second layer 72 is composed of an aluminum alloy film having a different composition from the first layer 71 and a film hardness greater than that of the first layer 71. The second layer 72 is composed of any aluminum alloy film, such as an Al-1wt%Si alloy, an Al-1wt%Cu alloy, an Al-5wt%Mg alloy, or any of these alloys to which other metal elements are added. The second layer 72 may be an aluminum alloy film of other known compositions as long as it has a film hardness sufficient to suppress cracks originating from triple junctions in contact with both the insulating layer 8 and the conductive layer 9. For example, when the thickness of the electrode film 7 is 5.0 μm, the second layer 72 has a thickness of 2.5 μm to 4.0 μm.

[0056] The semiconductor device 1 of this embodiment also provides the same effects as those of the first embodiment.

[0057] Third embodiment The semiconductor device 1 of the third embodiment will be described with reference to FIG.

[0058] 9, the semiconductor device 1 of this embodiment differs from the first embodiment in that the electrode film 7 has a laminated structure in which a first layer 71, a second layer 72, and a third layer 73 are laminated from the side of the interlayer insulating film 6. In this embodiment, this difference will be mainly described.

[0059] In this embodiment, the electrode film 7 is formed by laminating three aluminum alloy films, and has a total thickness of, for example, about 5.0 μm.

[0060] The first layer 71 and the third layer 73 are composed of an aluminum alloy film having a different composition from the second layer 72 and a film hardness greater than that of at least the second layer 72. The first layer 71 and the third layer 73 are composed of any composition, such as an Al-1wt%Si alloy, an Al-1wt%Cu alloy, an Al-5wt%Mg alloy, or an alloy to which other metal elements are added, but may be aluminum alloy films of other known compositions. For example, when the thickness of the electrode film 7 is 5.0 μm, the first layer 71 and the third layer 73 each have a thickness of about 2.0 μm. The first layer 71 and the third layer 73 may be aluminum alloy films of the same composition or different compositions.

[0061] The first layer 71 has a film hardness greater than that of an Al-Si-Mg alloy film and a stress relaxation effect of the film itself smaller than that of an Al-Si-Mg alloy film, but is configured to relax the stress applied to the interlayer insulating film 6 by having a thickness of a predetermined value, for example, 2.0 μm or less.

[0062] The third layer 73 has a film hardness larger than that of the Al-Si-Mg alloy film, and therefore has a film hardness capable of suppressing cracks originating from triple points in contact with both the insulating layer 8 and the conductive layer 9. The semiconductor device 1 of this embodiment is configured such that the stress acting on the interlayer insulating film 6 side due to the film hardness of the third layer 73 is mitigated by the second layer 72 having a predetermined film hardness.

[0063] The second layer 72 is made of an Al-Si-Mg alloy film containing at least 0.9 wt % to 1.1 wt % Si and 0.1 wt % to 2.3 wt % Mg. The second layer 72 has a thickness of, for example, about 1.0 μm and has a film hardness sufficient to function as a stress relaxation layer that relieves stress applied to the interlayer insulating film 6 from the insulating layer 8, the conductive layer 9, and the third layer 73 while suppressing the occurrence of cracks in the second layer 72 itself.

[0064] The semiconductor device 1 of this embodiment also provides the same effects as those of the first embodiment.

[0065] (Other embodiments) Although the present invention has been described based on the embodiment, it is understood that the present invention is not limited to the embodiment or structure. The present invention also includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, and other combinations and forms including only one element, more than one, or less than one, are also within the scope and concept of the present invention.

[0066] For example, the semiconductor device 1 of the second embodiment may have the first layer 71 and the second layer 72 in a reversed configuration. In this case, the electrode film 7 has the first layer 71 made of an aluminum alloy film having a higher film hardness than the Al-Si-Mg alloy film, and the second layer 72 made of an Al-Si-Mg alloy film. That is, the second layer 72 functions as a stress relaxation layer that relieves the stress applied to the interlayer insulating film 6 from the insulating layer 8 side. Even in this case, the semiconductor device 1 can obtain the same effects as those of the first embodiment. [Explanation of symbols]

[0067] 2...substrate, 2a...one surface, 2b...other surface, 3...gate trench, 4...gate insulating film, 5...gate electrode, 6...interlayer insulating film, 7...electrode film, 71...first layer, 72...second layer, 73...third layer, 8...insulating layer, 81 opening, 9 conductive layer

Claims

1. A semiconductor device including a vertical semiconductor element having a trench gate structure, A substrate (2) having one surface (2a) and another surface (2b) in a front-back relationship and made of silicon or silicon carbide; A plurality of gate trenches (3) extending from the one surface toward the other surface and spaced apart from each other; a gate insulating film (4) covering the inner wall surface of the gate trench; a gate electrode (5) provided on the gate insulating film and filling the gate trench; an interlayer insulating film (6) provided on the one surface, covering the plurality of gate trenches and having contact holes exposing a portion of the one surface between adjacent gate trenches; an electrode film (7) provided on the interlayer insulating film; an insulating layer (8) provided on the electrode film and having an opening (81) that exposes a portion of the electrode film; a conductive layer (9) disposed in the opening and covering a portion of the electrode film exposed from the insulating layer; the electrode film is made of an Al-Si-Mg alloy containing at least 0.9% by weight to 1.1% by weight of Si and 0.1% by weight to 2.3% by weight of Mg, has an aluminum alloy layer containing Mg silicide crystals in Al crystals, and is formed by laminating a first layer (71) and a second layer (72) from the side of the interlayer insulating film; the first layer is the aluminum alloy layer, The second layer is made of an aluminum alloy having a film hardness greater than that of the first layer.

2. A semiconductor device including a vertical semiconductor element having a trench gate structure, A substrate (2) having one surface (2a) and another surface (2b) in a front-back relationship and made of silicon or silicon carbide; A plurality of gate trenches (3) extending from the one surface toward the other surface and spaced apart from each other; a gate insulating film (4) covering the inner wall surface of the gate trench; a gate electrode (5) provided on the gate insulating film and filling the gate trench; an interlayer insulating film (6) provided on the one surface, covering the plurality of gate trenches and having contact holes exposing a portion of the one surface between adjacent gate trenches; an electrode film (7) provided on the interlayer insulating film; an insulating layer (8) provided on the electrode film and having an opening (81) that exposes a portion of the electrode film; a conductive layer (9) disposed in the opening and covering a portion of the electrode film exposed from the insulating layer; the electrode film is made of an Al-Si-Mg alloy containing at least 0.9% by weight to 1.1% by weight of Si and 0.1% by weight to 2.3% by weight of Mg, has an aluminum alloy layer containing Mg silicide crystals in Al crystals, and is formed by laminating a first layer (71), a second layer (72), and a third layer (73) from the side of the interlayer insulating film; the second layer is the aluminum alloy layer, The semiconductor device, wherein the first layer and the third layer are made of an aluminum alloy having a film hardness greater than that of the second layer.

3. A semiconductor device including a vertical semiconductor element having a trench gate structure, A substrate (2) having one surface (2a) and another surface (2b) in a front-back relationship and made of silicon or silicon carbide; A plurality of gate trenches (3) extending from the one surface toward the other surface and spaced apart from each other; a gate insulating film (4) covering the inner wall surface of the gate trench; a gate electrode (5) provided on the gate insulating film and filling the gate trench; an interlayer insulating film (6) provided on the one surface, covering the plurality of gate trenches and having contact holes exposing a portion of the one surface between adjacent gate trenches; an electrode film (7) provided on the interlayer insulating film; an insulating layer (8) provided on the electrode film and having an opening (81) that exposes a portion of the electrode film; a conductive layer (9) disposed in the opening and covering a portion of the electrode film exposed from the insulating layer; the electrode film is made of an Al-Si-Mg alloy containing at least 0.9% by weight to 1.1% by weight of Si and 0.1% by weight to 2.3% by weight of Mg, has an aluminum alloy layer containing Mg silicide crystals in Al crystals, and is formed by laminating a first layer (71) and a second layer (72) from the side of the interlayer insulating film; the second layer is the aluminum alloy layer, The first layer is made of an aluminum alloy having a film hardness greater than that of the second layer. Semiconductor device.

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