RF Package with Inner Moisture Barrier

Abstract

A method of packaging an RF transistor device includes attaching one or more electronic devices to a carrier substrate, applying an encapsulant over at least one of the one or more electronic devices, and providing a protective structure on the carrier substrate over the one or more electronic devices. The packaged RF transistor device includes the carrier substrate, the one or more electronic devices attached to the carrier substrate, the encapsulant over at least one of the one or more electronic devices extending onto the carrier substrate, and the protective structure on the carrier substrate over the one or more electronic devices and the encapsulant.

Description

[Technical field]

[0001] This application relates to packages for electronic devices, and more particularly to packages for RF power electronic devices. [Background technology]

[0002] Electrical circuits that require high power handling capabilities while operating at high frequencies, such as R-band (0.5-1 GHz), S-band (3 GHz), X-band (10 GHz), Ku-band (12-18 GHz), K-band (18-27 GHz), Ka-band (27-40 GHz) and V-band (40-75 GHz), are becoming more widespread. In particular, there is now a high demand for RF transistor amplifiers that are used to amplify RF signals at frequencies, for example, above 500 MHz (including microwave frequencies). These RF transistor amplifiers are often required to exhibit high reliability, good linearity, and handle high power levels.

[0003] RF transistor amplifiers may be implemented in silicon or wide bandgap semiconductor materials, such as silicon carbide ("SiC") and III-nitride materials. As used herein, the term "wide bandgap" refers to semiconductor materials having a bandgap greater than 1.40 eV. As used herein, the term "III-nitrides" refers to those semiconductor compounds formed between nitrogen and elements in group III of the periodic table, usually aluminum (Al), gallium (Ga) and / or indium (In). The term also refers to ternary and quaternary compounds, such as AlGaN and AlInGaN. These compounds have an empirical formula in which one mole of nitrogen is combined with one mole of group III elements in total.

[0004] Silicon-based RF transistor amplifiers are typically implemented using laterally diffused metal oxide semiconductor ("LDMOS") transistors. Silicon LDMOS RF transistor amplifiers can exhibit high levels of linearity and can be relatively inexpensive to manufacture. III-nitride based RF transistor amplifiers are typically implemented as high electron mobility transistors ("HEMTs") and are primarily used in applications requiring high power and / or high frequency operation where LDMOS RF transistor amplifiers may have inherent performance limitations.

[0005] An RF transistor amplifier may include one or more amplification stages, with each stage typically implemented as a transistor amplifier. To increase output power and current handling capabilities, RF transistor amplifiers are typically implemented in a "unit cell" configuration, where multiple individual "unit cell" transistors are electrically arranged in parallel. RF transistor amplifiers may be implemented as a single integrated circuit chip or "die," or may include multiple dies. When multiple RF transistor amplifier dies are used, they may be connected in series and / or parallel.

[0006] RF transistor amplifiers often include matching circuits, such as (1) impedance matching circuits designed to improve impedance matching (for RF signals at the fundamental operating frequency of the amplifier) ​​between the RF transistor amplifier die and the transmission lines connected to them, and (2) harmonic termination circuits designed to at least partially terminate harmonics that may be generated during device operation, such as second and third harmonics. The RF transistor amplifier die and the impedance matching and harmonic termination circuits may be enclosed within a package. Conductors may extend from the package to electrically connect the RF transistor amplifier to external circuit elements, such as input and output RF transmission lines and bias voltage sources.

[0007] As mentioned above, III-nitride based RF transistor amplifiers are often used in high power and / or high frequency applications. Typically, high levels of heat are generated within the III-nitride based RF transistor amplifier die during operation. If the RF transistor amplifier die becomes too hot, its performance (output power, efficiency, linearity, gain, etc.) may be degraded and / or the RF transistor amplifier die may be damaged. Therefore, III-nitride based RF transistor amplifiers are typically mounted in packages that may be optimized for heat removal. Summary of the Invention

[0008] A method of packaging an RF transistor device according to some embodiments includes attaching one or more electronic devices including an RF transistor die to a carrier substrate, applying an encapsulant material over at least one of the one or more electronic devices, and providing a protective structure to the carrier substrate over the one or more electronic devices.

[0009] The encapsulation material may include a curable liquid encapsulation material and the method may include dispensing the curable liquid encapsulation material onto the RF transistor die. The encapsulation material may include a polytetrafluoroethylene (PTFE) based material. In some embodiments, the encapsulation material may include liquid silicone, polyamide, benzocyclobutene, and / or liquid epoxy resin.

[0010] The protective structure may include a lid that forms a seal on the carrier substrate around the one or more electronic devices and an encapsulant, hi some embodiments, there is an open cavity between the lid and the one or more electronic devices.

[0011] The method may further include providing auxiliary electronics on the carrier substrate prior to providing the encapsulation material over the RF transistor die, and connecting the auxiliary electronics to the RF transistor die.

[0012] The protective structure may include a plastic overmold on a carrier substrate, the plastic overmold may be in contact with the carrier substrate and covering the encapsulant and the one or more electronic devices. The plastic overmold may be in contact with the encapsulant. The encapsulant and the plastic overmold may have different coefficients of thermal expansion. In some embodiments, the encapsulant and the plastic overmold may have different hardnesses.

[0013] Curing the curable encapsulant may include fully curing the curable encapsulant after providing a protective structure over the RF transistor die.

[0014] The method may further include providing an adhesive between the protective structure and the carrier substrate and simultaneously curing the curable encapsulant and the adhesive.

[0015] Curing the curable encapsulant may include allowing the curable encapsulant to fully cure before providing a protective structure over the one or more electronic devices.

[0016] Attaching the one or more electronic devices to the carrier substrate may include attaching at least one of the one or more electronic devices to the carrier substrate by sintered silver or eutectic die attach.

[0017] Attaching the one or more electronic devices to the carrier substrate may include forming solder bumps on the carrier substrate and / or the one or more electronic devices and attaching the one or more electronic devices to the carrier substrate via the solder bumps, wherein the curable encapsulant extends between the one or more electronic devices and the carrier substrate.

[0018] Curing the curable sealant may include exposing the curable sealant to light, heat, radiation, or ultrasonic energy.

[0019] The curable encapsulant may include a hardener in the curable encapsulant. Applying the curable encapsulant may include dispensing the curable encapsulant and the hardener onto the RF transistor die.

[0020] The method may further include forming an encapsulant dam on the carrier substrate around at least one of the one or more electronic devices, the encapsulant dam defining a die attach area of ​​the carrier substrate, and the encapsulant material being provided in the die attach area.

[0021] The RF transistor die may include a high electron mobility transistor, a field effect transistor, or a monolithic microwave integrated circuit. The RF transistor die may include a GaN-based device or a SiC-based device. In some embodiments, the RF transistor die may have an operating frequency greater than 1 GHz.

[0022] The packaged RF transistor device includes a carrier substrate, one or more electronic devices attached to the carrier substrate, an encapsulation material extending onto the carrier substrate over at least one of the one or more electronic devices, and a protective structure on the carrier substrate over the one or more electronic devices and the encapsulation material.

[0023] The sealing material may include a polytetrafluoroethylene (PTFE) based material.

[0024] The protective structure may include a lid that forms a seal on the carrier substrate around the one or more electronic devices and a curable encapsulant, and there may be an open cavity between the lid and the one or more electronic devices.

[0025] The packaged RF transistor device may further include ancillary electronics on the carrier substrate adjacent to the RF transistor device. An encapsulation material may cover the RF transistor device and the ancillary electronics.

[0026] The protective structure may include a plastic overmold on a carrier substrate, the plastic overmold in contact with the carrier substrate and covering the encapsulant material and the one or more electronic devices.

[0027] One or more electronic devices may be attached to the carrier substrate by sintered silver or eutectic die attach.

[0028] The encapsulant material may include silicone, polyimide, benzocyclobutene, and / or epoxy resin.

[0029] The one or more electronic devices may be attached to a carrier substrate, and an encapsulation material may extend between the RF transistor die and the carrier substrate.

[0030] The encapsulant may include an additive that changes the dielectric constant of the encapsulant.

[0031] The packaged RF transistor device may further include an encapsulant dam on the carrier substrate around at least one of the one or more electronic devices, the encapsulant dam defining a die attach region of the carrier substrate, and the encapsulant material being provided in the die attach region.

[0032] The accompanying drawings, which are included to provide a further understanding of the inventive concepts and which are incorporated in and constitute a part of this application, illustrate certain illustrative embodiments of the inventive concepts. [Brief description of the drawings]

[0033] [Figure 1A] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 1B] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 1C] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 1D] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 2A] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 2B] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 2C] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 2D] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 3A] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 3B] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 4A] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 4B] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 5A] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 5B] 1 is a schematic cross-sectional view of an RF package according to various embodiments. [Figure 6] 1 is a flow chart of operations according to some embodiments. [Figure 7A] FIG. 2 is a schematic block diagram of a multi-amplifier circuit in which an RF transistor amplifier according to an embodiment may be used; [Figure 7B] FIG. 2 is a schematic block diagram of a multi-amplifier circuit in which an RF transistor amplifier according to an embodiment may be used; [Figure 7C] FIG. 2 is a schematic block diagram of a multi-amplifier circuit in which an RF transistor amplifier according to an embodiment may be used; [Figure 8] 1 is a plan view of a MMIC RF transistor amplifier in accordance with some embodiments. [Figure 9] 1 is a schematic cross-sectional view of an RF transistor amplifier according to an embodiment. [Figure 10A] FIG. 1 is a schematic plan view of a III-nitride based RF transistor amplifier die. [Figure 10B]FIG. 10B is a schematic cross-sectional view taken along line 1B-1B of FIG. 10A. [Figure 10C] 1C is a schematic cross-sectional view taken along line 1C-1C of FIG. 10B, showing a metallization layer formed directly on top of the semiconductor layer structure. [Figure 10D] FIG. 1D is a schematic cross-sectional view taken along line 1D-1D of FIG. 10C. [Figure 10E] 10A-10D are schematic cross-sectional views of the III-nitride based RF transistor amplifier die of FIGS. 10A-10D packaged in a ceramic package according to some embodiments. [Figure 10F] 10A-10D are schematic cross-sectional views of the III-nitride based RF transistor amplifier die of FIGS. 10A-10D packaged in an overmolded package according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] Embodiments of the inventive concepts will now be described in more detail below with reference to the accompanying drawings, in which embodiments of the inventive concepts are shown. However, the inventive concepts may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concepts to those skilled in the art. Like numbers refer to like elements throughout.

[0035] Terms such as first, second, etc. may be used herein to describe various elements, but it will be understood that these elements should not be limited by these terms. These terms are used only to distinguish one element from another element. For example, a first element can be called a second element, and similarly, a second element can be called a first element, without departing from the scope of the inventive concept. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0036] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limitations of the inventive concept. As used herein, the singular forms "a", "an" and "the" are intended to include the plural unless the context clearly indicates otherwise. It will be further understood that as used herein, the terms "comprises", "comprising", "includes" and / or "including" indicate the presence of stated features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0037] Unless otherwise specified, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the inventive concept belongs. It will be further understood that the terms used herein should be interpreted as having a meaning consistent with their meaning in the context of the present specification and related art, and are not to be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0038] In an open cavity package for RF power applications, one or more RF power transistor devices are mounted to a copper or ceramic (e.g., alumina) based flange. For example, standard RF transistor amplifier packages are often constructed with CPC (copper-copper molybdenum-copper laminate), CuW or CuMo flanges.

[0039] The lid, which may be metal or ceramic, provides environmental protection for the RF die within the open cavity defined by the lid, the submount, and the sidewalls. Due to a thermal expansion mismatch between the lid and the flange and / or package leads, moisture may nevertheless infiltrate the package, especially when the package is thermally cycled during device operation.

[0040] Some embodiments described herein provide an RF transistor amplifier package that includes a moisture barrier layer evacuated over the RF transistor die. The evacuated moisture barrier layer is formed by evacuating a curable encapsulant over the RF transistor die and then curing the curable encapsulant. Providing a moisture barrier layer evacuated over the RF die may help protect the RF transistor die from moisture that may penetrate the interface between the lid and the flange of the package while maintaining RF performance characteristics of the RF die.

[0041] 1A is a schematic cross-sectional view of an RF transistor amplifier package 100A according to some embodiments. The package 100A includes a carrier substrate 110, such as a flange or lead frame, on which an RF power transistor die 112 is mounted. The carrier substrate 110 may include a conductive material, such as Cu, CPC (e.g., copper-copper molybdenum-copper laminate structure) or CuW, or an electrically insulating material, such as a ceramic (e.g., alumina) with high thermal conductivity.

[0042] The package 100A includes sidewalls 134 and a lid 130 which, together with a carrier substrate, define an open cavity 132. The RF transistor die 112 (including its interconnect structure) is disposed on the carrier substrate 110 within the open cavity 132.

[0043] The carrier substrate 110 may include a material configured to aid in thermal management of the package 100A. For example, the carrier substrate 110 may include copper and / or molybdenum. In some embodiments, the carrier substrate 1130 may be comprised of multiple layers and / or may include vias / interconnects. The sidewalls 134 and / or the lid 130 may be formed of or include an insulating material in some embodiments. For example, the lid 130 may be formed of or include a ceramic material. In some embodiments, the lid 130 may be formed of, for example, Al2O3. The lid 130 may be bonded to the sidewalls 134 using an epoxy adhesive. The sidewalls 134 may be attached to the carrier substrate 110 via, for example, CuAg brazing.

[0044] The RF transistor die 112 may be attached to the carrier substrate 110 at the die attach region 110C of the carrier substrate 110 using solder, a eutectic die attach material such as AuSi or AuSn, or an organic adhesive. In some embodiments, the RF transistor die 112 may be attached to the carrier substrate 110 using sintered silver die attach. In the sintered silver die attach process, a silver paste is printed or dispensed onto the carrier substrate 110, and the RF transistor die 112 is placed on top of the silver paste. Pressure (e.g., pressure in the range of tens of MPa) and temperature (e.g., about 240° C.) are applied to the RF transistor die 112, causing sintering of the silver and forming a strong adhesive connection between the RF transistor die 112 and the carrier substrate 110.

[0045] The RF transistor die 112 may be an RF electronic device, such as a high electron mobility transistor (HEMT), or a power MOSFET device, such as a laterally diffused MOSFET (LDMOS), formed in silicon, silicon carbide, gallium arsenide, gallium nitride, etc. In particular, the RF transistor die 112 may have an operating frequency greater than 1 GHz, in some embodiments greater than 5 GHz, and in some embodiments greater than 20 GHz.

[0046] One or more auxiliary electronics 114 may be mounted on the carrier substrate 110 along with the RF transistor die 112. The auxiliary electronics 114 may include, for example, input and / or output matching capacitors, DC blocking capacitors, IPDs (integrated passive devices), etc., and may be used to form circuits such as input matching circuits, interstage matching circuits, output matching circuits, harmonic reduction circuits (including baseband harmonics or fundamental frequency harmonics), bias voltage adjustment circuits, electrostatic discharge circuits, etc. In some embodiments, the auxiliary electronics 114 may include active devices such as GaAs, Si, and / or GaN transistors forming a first amplification stage.

[0047] Wire bonds 116 may be formed to couple pads 118 on the RF transistor die 112 and / or auxiliary electronics 114 and connect the RF transistor die 112 and / or auxiliary electronics 114 to each other and to conductive leads or traces on members 110L, 110R of the carrier substrate 110. In some embodiments, the RF transistor die 112 and / or auxiliary electronics 114 may be connected to metal leads (not shown) that extend through or under the sidewalls 134.

[0048] The lid 130 is attached to the carrier substrate 110 over the die attach region 110C of the carrier substrate 110. The lid 130 defines an open cavity 132 over the RF transistor die 112 and the auxiliary electronics 114 attached to the carrier substrate 110, and the lid 130 provides environmental protection for the RF transistor die 112 and the auxiliary electronics 114 within the open cavity 132. In particular, the lid 130 may be non-hermetically sealed to the sidewalls 132 and / or the carrier substrate 110 by an adhesive, such as a heat activated adhesive or epoxy, to reduce / prevent moisture from undesirably entering the open cavity 132 and damaging the RF transistor die 112, the auxiliary electronics 114, the wire bonds 116, and / or other components of the package 100A.

[0049] To provide additional protection to the RF transistor die shown in FIG. 1A, an encapsulant material 120 may be provided on the RF transistor die 112 prior to attaching the lid 130 to the carrier substrate 110. The encapsulant material 120 may be provided by dispensing a curable liquid encapsulant material onto the RF transistor die 112 and then curing the curable liquid encapsulant. The curable encapsulant may cover exposed surfaces of the RF transistor die 112, including the top surface of the die 112 and the sides of the die 112, and may extend to the top surface of the carrier substrate 110 adjacent the RF transistor die 112. As will be appreciated, the top surface of the RF transistor die 112 may be coated during a die processing step with a passivation material, such as polyimide. Such passivation does not extend to the sides of the die, since dicing occurs after passivation. Additionally, the high temperatures (up to 315° C.) used during die attach may degrade chip-level passivation. In contrast, encapsulation material 120 may provide additional protection to the corners and sides of RF transistor die 112 after die attach.

[0050] In some embodiments, the curable sealing material 120 may include an amorphous polytetrafluoroethylene (PTFE) fluoropolymer. Examples of commercially available amorphous fluoropolymers include Teflon AF® from Dupont® and Cytop™ from Asahi Glass Co., Ltd. of Tokyo, Japan. These materials can be applied as a thin coating in a fluorosolvent.

[0051] To encapsulate the RF transistor die 112 using amorphous PTFE fluoropolymer, a dilute solution (typically 5% by weight) of Teflon AF® in a mixture of C5-C18 perfluorosolvents may be applied using a dropper, manual syringe, automated syringe, or other dispensing method, and then allowed to dry. A series of such coatings may be applied to build up a layer thick enough to provide the desired level of protection for the RF transistor die 112. The coating may be cured at room temperature or at elevated temperatures (e.g., 50-70° C.) until the solvent evaporates.

[0052] In some embodiments, air atomization spraying may be used to coat the RF transistor die 112 with PTFE. In this method, a dispersion of low molecular weight solids of PTFE suspended in a suitable carrier liquid, such as a solvent or water, is atomized and sprayed onto the RF transistor die. The carrier is then evaporated, leaving a coating of PTFE. The coating may be sintered to increase its uniformity. Typical film thicknesses are 10-100 microns thick, for example, 20-50 microns thick. The PTFE particles in the dispersion may have an average particle size of less than 100 microns, and in some cases less than 50 microns. Additionally, the PTFE particles may have an average particle size of less than 30 microns. In yet another embodiment, the PTFE particles may comprise nanoparticles having an average particle size of less than 400 nm. For example, in some embodiments, the PTFE particles may have an average particle size of 350 nm-400 nm, in some embodiments an average particle size of 100-150 nm, and in some embodiments an average particle size of 30-50 nm.

[0053] In conventional or air atomized spraying, the coating is fed to the spray gun by siphon, gravity or pressure feed. When the gun trigger is pulled, the coating flows through the nozzle as a fluid stream. Compressed air from the center of the nozzle surrounds the fluid with a hollow cone as it leaves the nozzle, breaking the coating into small droplets, transferring velocity to the droplets and driving the droplets towards the RF transistor die.

[0054] The atomized spray may be applied using electrostatic or non-electrostatic coating. In electrostatic coating, the fluid is atomized and then negatively charged. The part to be coated is electrically neutral, making it positive relative to the negative coating droplets. The coating particles are attracted to the surface and held there by the charge difference until they are cured.

[0055] The dispersion solvent may be sufficiently volatile to evaporate quickly, leaving the PTFE particles substantially dry. A suitable dispersion solvent is trichlorotrifluoroethane, although other low boiling halogenated hydrocarbons may be used. The dispersion may be exposed to energy in the form of light, heat, radiation, or ultrasonic energy to further cure the encapsulant.

[0056] PTFE may be a good choice for encapsulating RF transistor dies due to its relatively low dielectric constant, low permittivity, and high dielectric strength. For example, extruded PTFE has a dielectric constant of about 2 and is commonly used as an insulator in coaxial cables for RF signal transmission. For comparison, materials commonly used for plastic overmolding of RF components, such as KMC-2110G-7 manufactured by Shin Etsu Handotai and G700H manufactured by Sumitomo Electric Corporation, have a dielectric constant of about 2.6 to 4.5. In addition, PTFE generally has a high resistance to chemical attack and a low surface free energy that leads to its hydrophobic nature, both qualities that increase its effectiveness as a protective coating.

[0057] In other embodiments, the curable encapsulant material 120 may include a curable epoxy resin, a polyimide, a benzocyclobutene (BCB), or a curable liquid silicone, which may be dispensed in liquid form onto the carrier substrate 110 over the RF transistor die 112.

[0058] The curable encapsulant material 120 is cured to solidify and solidify the curable encapsulant material 120 on / around the RF transistor die 112. Curing may be accomplished, for example, by exposing the curable encapsulant material 120 to energy, such as light, heat, radiation, or ultrasonic energy, for a period of time sufficient to solidify the encapsulant material by evaporating solvents in the curable encapsulant material. As will be appreciated, the curing process may include cross-linking of polymers within the encapsulant material. Such cross-linking imparts mechanical strength and stability to the cured encapsulant material, which increases protection of the RF transistor die 112.

[0059] In particular, it has been found that PTFE can be crosslinked to form a network structure when exposed to high energy radiation, such as by irradiating the material in a vacuum at temperatures of 330-340° C. The crosslinked PTFE has been found to obtain significant improvements in both high temperature mechanical properties and radiation stability.

[0060] In some embodiments, the curable encapsulant material 120 may be at least partially cured before the lid 130 is attached to the carrier substrate 110. If the curable encapsulant material 120 is not cured or is only partially cured before attachment of the lid 130, curing of the curable encapsulant material 120 may be completed after the lid 130 is attached to the carrier substrate 110. In some embodiments, the curable encapsulant material 120 may be cured at the same time that a heat-activated adhesive used to attach the lid 130 to the carrier substrate 110 is cured, such as by a heat treatment. In some embodiments, the curable encapsulant material 120 may be partially cured before attachment of the lid 130 to evaporate solvents in the curable encapsulant material 120 before attachment of the lid 130, and the curable encapsulant material 120 may be fully cured after attachment of the lid 130, such as to cause cross-linking of polymers within the curable encapsulant material 120. That is, curing after attachment of the lid 130 may involve cross-linking within the sealing material 120 rather than outgassing of evaporated solvent from the sealing material 120 .

[0061] In some embodiments, a hardener or additive, such as a hardener or desiccant, may be added to the curable encapsulant material 120 to enhance or accelerate the curing process. In some embodiments, a dielectric adjusting additive, such as metal flakes or powder, may be added to the curable encapsulant material 120 to modify the dielectric constant of the encapsulant.

[0062] Although a single RF transistor die 112 is shown in FIG. 1A , it will be appreciated that the RF transistor amplifier package 100A may include two or more RF transistor dies 112 and the curable material 120 may or may not cover one or more of the RF transistor dies 112 and / or the auxiliary electronics 114.

[0063] 1B illustrates an RF transistor amplifier package 100B according to another embodiment. The structure of the RF transistor amplifier package 100B is the same as that of the RF transistor amplifier package 100A illustrated in FIG. 1A, except that instead of having a lid over the RF transistor die 112 and the auxiliary electronics 114, a protective plastic overmold 140 is formed on the carrier substrate 110 over the RF transistor die 112 and the auxiliary electronics 114 (like numbers refer to like elements). The plastic overmold 140 may be formed, for example, by inserting the carrier substrate 110 with the RF transistor die 112 and the auxiliary electronics 114 mounted thereon into a mold, and then injecting plastic over the RF transistor die 112 and the auxiliary electronics 114 to form the plastic overmold 140. The curable encapsulant material 120 is provided over the RF transistor die 112 prior to injection molding and is at least partially cured prior to injection molding, whereby the plastic overmold 140 is formed directly over the cured / curable encapsulant material 120. In some embodiments, the cured / curable encapsulant material 120 may be fully cured prior to the formation of the plastic overmold 140.

[0064] An overmold material 140, which may be a plastic or plastic-polymer compound, is injection molded around the RF transistor die 112, thereby providing protection from the external environment.

[0065] The carrier substrate 110 of package 100B may include a material configured to assist in thermal management. For example, the carrier substrate 110 may include copper and / or molybdenum. In some embodiments, the carrier substrate 110 may be comprised of multiple layers and / or may include vias / interconnects. In some embodiments, the carrier substrate 110 may include a metal heat sink that is part of a lead frame or metal slug that is at least partially surrounded by a plastic overmold 140.

[0066] Thus, in RF transistor amplifier package 100B, there may be no voids above RF transistor die 112 and cured / hardenable encapsulant 120. Additionally, cured / hardenable encapsulant 120 may provide additional mechanical stability and protection to wire bonds 116 during formation of protective plastic overmold 140.

[0067] Although a single RF transistor die 112 and ancillary electronics 114 are shown in FIG. 1B, it will be appreciated that RF transistor amplifier package 100B may include more than one RF transistor die 112 and / or more than one ancillary electronics 114, and encapsulation material 120 may cover one or more of the RF transistor die and / or ancillary electronics 114, or may not cover one or more of the RF transistor die and / or ancillary electronics 114.

[0068] 1C illustrates an RF transistor amplifier package 100C according to another embodiment. The structure of the RF transistor amplifier package 100C is the same as that of the RF transistor amplifier package 100A illustrated in FIG. 1A (like numbers refer to like elements), except that an encapsulation material 120 is formed over one or more of the auxiliary electronics 114, but not over one or more of the RF transistor dies 112.

[0069] 1D illustrates an RF transistor amplifier package 100D according to another embodiment, the structure of which is the same as that of the RF transistor amplifier package 100B illustrated in FIG. 1B, except that an encapsulation material 120 is formed over one or more of the auxiliary electronics 114, but not over one or more of the RF transistor dies 112 (like numbers refer to like elements).

[0070] 2A shows an RF transistor amplifier package 100E according to another embodiment. The structure of the RF transistor amplifier package 100E is the same as that of the RF transistor amplifier package 100A shown in FIG. 1A, except that in the RF transistor amplifier package 100E, a curable encapsulant material 120 covers both the RF transistor die 112 and the supporting electronics 114 (like numbers refer to like elements).

[0071] Although a single RF transistor die 112 and ancillary electronics 114 are shown in FIG. 2A , it will be appreciated that the RF transistor amplifier package 100E may include more than one RF transistor die 112 and / or more than one ancillary electronics 114, and the encapsulation material 120 may cover some, all, or none of the RF transistor die 112 and / or ancillary electronics 114 in various embodiments.

[0072] FIG. 2B illustrates an RF transistor amplifier package 100F according to another embodiment. The structure of the RF transistor amplifier package 100F is the same as that of the RF transistor amplifier package 100A illustrated in FIG. 1A, except that in the RF transistor amplifier package 100F, a curable encapsulant material 120 covers both the RF transistor die 112 and the auxiliary electronics 114, and instead of having a lid on the RF transistor die 112 and the auxiliary electronics 114, a protective plastic overmold 140 is formed on the carrier substrate 110 over the RF transistor die 112 and the auxiliary electronics 114 (like numbers refer to like elements). Additionally, FIG. 2B also illustrates the attachment of the RF transistor die 112 to the carrier substrate 110 using a sintered silver die attach 145. Although the sintered silver die attach 145 is only illustrated in the embodiment of FIG. 2B, it will be appreciated that such a die attach can be used in any of the illustrated embodiments.

[0073] The addition of the curable encapsulant material 120 onto the RF transistor die 112 may provide additional protection to the sintered silver die attach 145. In particular, sintered silver can result in the formation of dendrites, which are branches or extensions of silver, when exposed to moisture. The growth of dendrites can lead to shorts and device failure. The curable encapsulant material 120 may provide additional moisture protection to the sintered silver die attach 145, which may inhibit or slow the growth of dendrites from the sintered silver die attach 145, which may extend the life of the device.

[0074] Although a single RF transistor die 112 and auxiliary electronics 114 are shown in FIG. 2B, it will be appreciated that the RF transistor amplifier package 100F may include more than one RF transistor die 112 and / or more than one auxiliary electronics 114, and the encapsulation material 120 may cover some, all, or none of the RF transistor die 112 and / or auxiliary electronics 114 in various embodiments.

[0075] 2C illustrates an RF transistor amplifier package 100G according to another embodiment, the structure of which is the same as that of the RF transistor amplifier package 100E illustrated in FIG. 2A, except that in package 100G, separate encapsulants 120A, 120B are provided over one or more of the RF transistor die 112 and the auxiliary electronics 114 (like numbers refer to like elements).

[0076] Although a single RF transistor die 112 and ancillary electronics 114 are shown in FIG. 2C, it will be appreciated that the RF transistor amplifier package 100G may include more than one RF transistor die 112 and / or more than one ancillary electronics 114, and the encapsulant 120A, 120B may cover some, all, or none of the RF transistor die 112 and / or ancillary electronics 114 in various embodiments.

[0077] 2D illustrates another embodiment of an RF transistor amplifier package 100H, the structure of which is the same as that of the RF transistor amplifier package 100F illustrated in FIG. 2B, except that in package 100H, separate encapsulants 120A, 120B are provided over one or more of the RF transistor die 112 and the auxiliary electronics 114 (like numbers refer to like elements).

[0078] Although a single RF transistor die 112 and ancillary electronics 114 are shown in FIG. 2D, it will be appreciated that RF transistor amplifier package 100H may include more than one RF transistor die 112 and / or more than one ancillary electronics 114, and encapsulant 120A, 120B may cover some, all, or none of RF transistor die 112 and / or ancillary electronics 114 in various embodiments.

[0079] FIG. 3A illustrates an RF transistor amplifier package 100I according to another embodiment. The structure of the RF transistor amplifier package 100I is the same as that of the RF transistor amplifier package 100A illustrated in FIG. 1A (like numbers refer to like elements), except that in the RF transistor amplifier package 100I, the RF transistor die 112 is flip-mounted to the carrier substrate 110 by solder bumps 155L, 155R formed on the RF transistor die 112 and / or the carrier substrate 110, thereby eliminating the need to provide wirebond connections between the RF transistor die 112 and the carrier substrate 110 or traces / leads on the carrier substrate 110. As illustrated in FIG. 3A, the curable encapsulant material 120 may flow under the RF transistor die 112 between the RF transistor die 112 and the carrier substrate 110 to protect the underside of the flip-mounted RF transistor die 112.

[0080] Although the auxiliary electronics are not shown in Figure 3A, it will be appreciated that one or more auxiliary electronics may be included within package 100I. Additionally, although a single RF transistor die 112 is shown in Figure 3A, it will be appreciated that RF transistor amplifier package 100I may include more than one RF transistor die 112, and that encapsulation material 120 may cover some, all, or none of RF transistor die 112 and / or auxiliary electronics 114 in various embodiments.

[0081] 3B illustrates another embodiment of an RF transistor amplifier package 100J. The structure of the RF transistor amplifier package 100J is the same as that of the RF transistor amplifier package 100I illustrated in FIG. 3A (like numbers refer to like elements), except that in the RF transistor amplifier package 100J, instead of having a lid over the RF transistor die 112, a protective plastic overmold 140 is formed on the carrier substrate 110 over the RF transistor die 112 and in direct contact with the curable encapsulant material 120, thereby forming no open cavity over the RF transistor die 112.

[0082] As shown in FIG. 3B , the curable encapsulant material 120 may flow under the RF transistor die 112 in the space 116 between the RF transistor die 112 and the carrier substrate 110 to protect the underside of the flip-mounted RF transistor die 112. This may prevent the material of the plastic overmold 140 from entering the space 116 between the RF transistor die 112 and the carrier substrate 110. If the material of the plastic overmold 140 enters the space 116, the expansion of the plastic may separate the RF transistor die 112 from the carrier substrate 110 due to the difference in coefficient of thermal expansion (CTE) between the plastic and the solder bumps 155L, 155R, leading to device failure. Therefore, some embodiments may provide a softer filler material to protect the underside of the RF transistor die 112 from the plastic overmold 140.

[0083] It will be appreciated that the curable encapsulant material 120 may be a material capable of withstanding the high operating temperatures of an RF transistor device. For example, the junction temperature (T J ) is about 225-275°C. Sintered silver typically requires heating at about 250-260°C, while eutectic die attach is typically performed at about 315°C. However, once attached and exposed to a 3 hour reflow cycle, sintered silver can withstand higher temperatures, such as the expected operating junction temperatures of RF transistor devices. Cross-linked PTFE encapsulants may be able to withstand the expected operating junction temperatures of RF transistor devices.

[0084] Although the auxiliary electronics are not shown in Figure 3B, it will be appreciated that one or more auxiliary electronics may be included within package 100J. Additionally, although a single RF transistor die 112 is shown in Figure 3B, it will be appreciated that RF transistor amplifier package 100J may include more than one RF transistor die 112, and that encapsulation material 120 may cover some, all, or none of RF transistor die 112 and / or auxiliary electronics 114 in various embodiments.

[0085] 4A illustrates an RF transistor amplifier package 100K according to another embodiment, in which an encapsulant material 120 is provided in a die attach area 110C defined by an encapsulant dam 210, which may include an encapsulant material such as silicone, that is dispensed onto a carrier substrate 110. After the transistor die 112 and the auxiliary electronics 114 are attached to the carrier substrate 110 in the die attach area 110C, the encapsulant dam 210 is dispensed onto the carrier substrate 110 and then at least partially cured before dispensing the encapsulant material 120 onto the carrier substrate 110 over the RF transistor die 112 and the auxiliary electronics 114.

[0086] The inclusion of the encapsulant dam may provide more precise control of the position and / or thickness of the encapsulant material 120. For example, depending on the viscosity of the encapsulant material 120 and the clearance at the edges, the encapsulant dam 210 may help block or prevent the encapsulant 110 from interfering with the attachment of the lid 130 to the carrier substrate 110.

[0087] Although a single RF transistor die 112 and ancillary electronics 114 are shown in FIG. 4A , it will be appreciated that RF transistor amplifier package 100K may include more than one RF transistor die 112 and / or more than one ancillary electronics 114, and encapsulation material 120 may cover some, all, or none of the RF transistor die 112 and / or ancillary electronics 114 in various embodiments.

[0088] 4B shows an RF transistor amplifier package 100L according to another embodiment. The structure of the RF transistor amplifier package 100L is L 4A (like numbers refer to like elements), except that instead of having a lid on the RF transistor die 112, a protective plastic overmold 140 is formed on the carrier substrate 110 over the RF transistor die 112 and in direct contact with the encapsulant dam 210 and the encapsulant material 120, such that no open cavity is formed over the RF transistor die 112.

[0089] Although a single RF transistor die 112 and supporting electronics 14 are shown in FIG. 4B, the RF transistor amplifier package 100 L It will be appreciated that the encapsulation material 120 may include two or more RF transistor dies 112 and / or two or more auxiliary electronics 114, and that the encapsulation material 120 may cover some, all, or none of the RF transistor dies 112 and / or auxiliary electronics 114 in various embodiments.

[0090] FIG. 5A is a schematic cross-sectional view of a thermally enhanced RF transistor amplifier package 100M according to another embodiment.

[0091] Package 100M includes a carrier substrate 110 on which one or more RF power transistor dies 112 and / or supporting electronics 114 are mounted. Carrier substrate 110 includes a conductive laminate structure of CPC including a layer of copper 312, a layer of copper molybdenum 314, and a layer of copper 316.

[0092] The package 100M includes sidewalls 134 and a lid 130, which together with the carrier substrate 110 define an open cavity 132 over the RF power transistor die 112 and / or the supporting electronics 114. The sidewalls 134 and the lid 130 may be formed from a ceramic material, such as Al2O3. The sidewalls 134 may be attached to the carrier substrate 110 by CuAg brazing. The lid 130 may be bonded to the sidewalls 134 using an epoxy adhesive.

[0093] Wire bonds 116 may be formed on the RF transistor die 112 and / or the auxiliary electronics 114 to connect the RF transistor die 112 and / or the auxiliary electronics 114 to each other and to the conductive leads 310L, 310R that extend into the open cavity 132. The conductive leads 310L, 310R may be attached to the sidewalls 132 by CuAg brazing.

[0094] The encapsulant material 120 is provided over the RF transistor die 112 and the supporting electronics 114 prior to attaching the lid 130 onto the carrier substrate 110. The encapsulant material 120 may be a curable liquid encapsulant that is dispensed onto the RF transistor die 112 and the supporting electronics 114 and then cured. The encapsulant material 120 may cover the exposed surfaces of the RF transistor die 112, including the top and side surfaces of the die 112, and may extend onto the top surface of the carrier substrate 110 adjacent to the RF transistor die 112.

[0095] Depending on the embodiment, the RF transistor die 112 and the ancillary electronics 114 may include one or more transistors along with input matching circuits, output matching circuits, baseband and / or fundamental frequency harmonic reduction circuits, filters, biasing circuits, electrostatic discharge (ESD), bias adjustment, filtering, inter-stage matching circuits between series connected transistors, and / or other circuits and components. Some embodiments include a separate transistor and multiple transistors in one and / or multiple passes, such as in a Doherty configuration, as illustrated in Figures 7A-7C, as described below. The encapsulation material 120 according to different embodiments may cover all, some, or only one of the components. The encapsulation material 120 may be a single continuous encapsulation or multiple separate encapsulations over some or all of the above components as well as other components of the package.

[0096] FIG. 5B is a schematic cross-sectional view of a thermally enhanced RF transistor amplifier package 100N according to another embodiment. The RF transistor amplifier package 100N is the same as the RF transistor amplifier package 100M described above with reference to FIG. 5A, except that the leads 310L, 310R are replaced by a printed circuit board (PCB) 320 including top traces 322 wire-bonded to the RF transistor die 112 and / or the auxiliary electronics 114 to act as input and output leads for the package 100M. The carrier substrate 110 may be a copper slug that acts as a heat sink for the package 100M. The printed circuit board 320 may be attached to the carrier substrate 110 via, for example, a conductive adhesive. The printed circuit board 320 includes a central opening 326 in which the RF transistor die 112 and the auxiliary electronics 114 are attached to the carrier substrate.

[0097] 6 illustrates operations for forming a packaged RF transistor device according to some embodiments. Referring to FIG. 6, a method for forming a packaged RF transistor device according to some embodiments includes attaching an RF transistor die to a carrier substrate (block 602) and providing an encapsulant over the RF transistor die (block 604). Optionally, the operations may include at least partially curing the curable encapsulant (block 606). Finally, a protective structure (e.g., a lid) is provided on the carrier substrate over the RF transistor die (block 608).

[0098] The encapsulant may include a curable liquid encapsulant. In particular, the encapsulant may include a polytetrafluoroethylene (PTFE) based material. In some embodiments, the curable encapsulant may include liquid silicone, polyimide, benzocyclobutene, and / or liquid epoxy resin.

[0099] The protective structure may include a lid that forms a seal on the carrier substrate around the RF transistor die and the curable encapsulant, hi some embodiments, there is an open cavity between the lid and the RF transistor die.

[0100] The method may further include providing supporting electronics on the carrier substrate and connecting the supporting electronics to the RF transistor die before providing the curable encapsulant over the RF transistor die.

[0101] The protective structure may include a plastic overmold on a carrier substrate, the plastic overmold may be in contact with the carrier substrate and cover the curable encapsulant and the RF transistor die. The plastic overmold may be in contact with the encapsulant. The encapsulant and the plastic overmold may have different coefficients of thermal expansion. In some embodiments, the encapsulant and the plastic overmold may have different hardnesses.

[0102] Curing the curable encapsulant may include fully curing the curable encapsulant after providing a protective structure over the RF transistor die.

[0103] The method may further include providing an adhesive between the protective structure and the carrier substrate, and simultaneously curing the curable encapsulant and the adhesive.

[0104] Curing the curable encapsulant may include fully curing the curable encapsulant before providing a protective structure over the RF transistor die.

[0105] Attaching the RF transistor die to the carrier substrate may include attaching the RF transistor die to the carrier substrate by sintered silver.

[0106] Attaching the RF transistor die to the carrier substrate may include forming solder bumps on the RF transistor die and / or the carrier substrate and attaching the RF transistor die to the carrier substrate via the solder bumps, wherein the curable encapsulant extends between the RF transistor die and the carrier substrate.

[0107] Curing the curable sealant may include exposing the curable sealant to light, heat, radiation, or ultrasonic energy.

[0108] The curable encapsulant may include a hardener in the curable encapsulant. Applying the curable encapsulant may include dispensing or spraying the curable encapsulant and the hardener onto the RF transistor die.

[0109] The RF transistor amplifiers described herein may be designed to operate in a wide variety of different frequency bands. In some embodiments, the RF transistor amplifiers may be configured to operate at frequencies greater than 1 GHz. In other embodiments, the RF transistor amplifier dies may be configured to operate at frequencies greater than 2.5 GHz. In still other embodiments, the RF transistor amplifier dies may be configured to operate at frequencies greater than 3.1 GHz. In still further embodiments, the RF transistor amplifier dies may be configured to operate at frequencies greater than 5 GHz. In some embodiments, the RF transistor amplifier dies may be configured to operate in at least one of the following frequency bands or subportions thereof: 2.5-2.7 GHz, 3.4-4.2 GHz, 5.1-5.8 GHz, 12-18 GHz, 18-27 GHz, 27-40 GHz, or 40-75 GHz.

[0110] Although embodiments of the inventive concept are described above with respect to an RF transistor amplifier die implemented using HEMT devices, it will be appreciated that other types of semiconductor devices may be formed in semiconductor layer structure 230 without departing from the inventive concept. For example, semiconductor layer structure 230 may include MOSFETs, DMOS transistors, MESFETs, and / or LDMOS transistors in other embodiments.

[0111] The RF transistor amplifier described above can be used as a stand-alone RF transistor amplifier. The RF transistor amplifier may be used in various applications including multiple RF transistor amplifiers. An example of how an RF transistor amplifier according to an embodiment may be used in an application including multiple amplifiers is described with respect to Figures 7A-7C.

[0112] Referring to FIG. 7A, a schematic diagram of an RF transistor amplifier 1000A is shown, which includes a preamplifier 1010 and a main amplifier 1030 electrically connected in series. As shown in FIG. 7A, the RF transistor amplifier 1000A includes an RF input section 1001, a preamplifier 1010, an inter-stage impedance matching network 1020, a main amplifier 1030, and an RF output section 1002. The inter-stage impedance matching network 1020 may include, for example, inductors and / or capacitors arranged in any suitable configuration to form a circuit that improves impedance matching between the output of the preamplifier 1010 and the input of the main amplifier 1030. Although not shown in FIG. 7A, the RF transistor amplifier 1000A may further include an input matching network disposed between the RF input section 1001 and the preamplifier 1010, and / or an output matching network disposed between the main amplifier 1030 and the RF output section 1002. An RF transistor amplifier according to an embodiment may be used to implement either or both of the preamplifier 1010 and the main amplifier 1030.

[0113] 7B, there is shown a schematic diagram of an RF transistor amplifier 1000B including an RF input section 1001, a pair of preamplifiers 1010-1, 1010-2, a pair of interstage impedance matching networks 1020-1, 1020-2, a pair of main amplifiers 1030-1, 1030-2, and an RF output section 1002. A splitter 1003 and a combiner 1004 are also provided. The preamplifiers 1010-1 and main amplifier 1030-1 (electrically connected in series) are electrically arranged in parallel with the preamplifiers 1010-2 and main amplifiers 1030-2 (electrically connected in series). Like the RF transistor amplifier 1000A of FIG. 7A, the RF transistor amplifier 1000B may further include an input matching network disposed between the RF input section 1001 and the preamplifiers 1010-1, 1010-2, and / or an output matching network disposed between the main amplifiers 1030-1, 1030-2 and the RF output section 1002.

[0114] As shown in FIG. 7C, an RF transistor amplifier according to some embodiments may be used to implement a Doherty amplifier. As known in the art, a Doherty amplifier circuit includes first and second (or more) power-combined amplifiers. The first amplifier is called the “main” or “carrier” amplifier, and the second amplifier is called the “peaking” amplifier. The two amplifiers may be biased differently. For example, the main amplifier may include a class AB or class B amplifier, while the peaking amplifier may be a class C amplifier in one common Doherty amplifier implementation. Doherty amplifiers may operate more efficiently than balanced amplifiers when operating at power levels backed off from saturation. The RF signal input to the Doherty amplifier is split (e.g., using a quadrature coupler) and the outputs of the two amplifiers are combined. The main amplifier is configured to turn on first (i.e., at lower input power levels), so that only the main amplifier operates at lower power levels. As the input power level is increased towards saturation, the peaking amplifier is turned on and the input RF signal is split between the main amplifier and the peaking amplifier.

[0115] 7C, the Doherty RF transistor amplifier 1000C includes an RF input 1001, an input splitter 1003, a main amplifier 1040, a peaking amplifier 1050, an output combiner 1004, and an RF output 1002. The Doherty RF transistor amplifier 1000C includes a 90° transformer 1007 at the input of the peaking amplifier 1050 and a 90° transformer 1005 at the input of the main amplifier 1040, and may optionally include an input matching network and / or an output matching network (not shown). The main amplifier 1040 and / or the peaking amplifier 1050 may be implemented using any of the RF transistor amplifiers described above according to embodiments.

[0116] RF transistor amplifiers according to embodiments may be formed as separate devices or as part of a monolithic microwave integrated circuit (MMIC). MMIC refers to an integrated circuit operating on radio and / or microwave frequency signals in which all of the circuitry for a particular function is integrated on one semiconductor chip. An example MMIC device is a transistor amplifier with associated matching circuits, feed networks, etc., all implemented on a common substrate. MMIC transistor amplifiers typically include multiple unit cell HEMT transistors connected in parallel.

[0117] In some embodiments, the RF transistor die 112 and / or the supporting electronics 114 shown in FIGS. 1A-5B may be monolithically integrated. Microwave The present invention may be provided in the form of a multi-layer integrated circuit (MMIC) RF transistor amplifier. For example, the MMIC RF transistor amplifier may implement circuits such as those shown in FIGS. 7A-7C. FIG. 8 is a plan view of a MMIC RF transistor amplifier 800 according to some embodiments. As shown in FIG. 8, the MMIC RF transistor amplifier 800 includes an integrated circuit chip 830 housed within a package 810. The package 810 may include a protective housing that encloses and protects the integrated circuit chip 830. The package 810 may be formed, for example, from a ceramic material. An encapsulant (not shown) may be formed over the integrated circuit chip 830 as described above.

[0118] Package 810 includes input leads 812 and output leads 818. Input leads 812 may be attached to input lead pads 814, for example, by soldering. One or more input bond wires 820 may electrically connect input lead pads 814 to input bond pads on an integrated circuit chip 830.

[0119] The integrated circuit chip 830 includes an input feed network 838 that feeds parallel amplifier chains 825-1, 825-2 (similar to the amplifier circuit shown in FIG. 7B). In this example, each amplifier chain 825-1, 825-2 includes an input impedance matching network 850-1, 850-2, a first RF transistor amplifier stage 860-1, 860-2, a middle impedance matching network 840-1, 840-2, a second RF transistor amplifier stage 862-1, 862-2, and an output impedance matching stage 870-1, 870-2. An output feed network 882 connects the amplifier chains 825-1, 825-2 to output bond pads 835 on the integrated circuit chip 830. The package 810 further includes an output lead 818 connected to an output lead pad 816, for example, by soldering. One or more output bond wires 890 may electrically connect the output lead pads 816 to output bond pads 835 on the integrated circuit chip 830 .

[0120] MMIC transistor amplifier 800 differs from the discrete RF transistor amplifiers described above in that all of the circuitry is formed on a single semiconductor chip.

[0121] 9 is a schematic cross-sectional view of an RF transistor amplifier 101 that may be provided in a package according to some embodiments. As shown in FIG. 9, the RF transistor amplifier 101 includes an RF transistor amplifier die 111, an optional coupling element 121, and an interconnect structure 131.

[0122] The RF transistor amplifier die 111 may include a III-nitride based RF transistor amplifier die including a plurality of unit cell transistors (not shown). Each unit cell transistor may include a field effect transistor (e.g., a GaN HEMT transistor) having a gate, a drain, and a source. At least some of the unit cell transistors may be electrically connected in parallel. The RF transistor amplifier die 111 may include one or more gate terminals 122, one or more drain terminals 124, and one or more source terminals 126. Each of the gate terminals 122, the drain terminals 124, and the source terminals 126 may be disposed on an upper side of the RF transistor amplifier die 111 and / or on a lower side of the RF transistor amplifier die 111. In the illustrated embodiment, the gate terminal 122, the drain terminal 124 are shown disposed on an upper side of the RF transistor amplifier die 111, and a pair of source terminals 126-1, 126-2 are provided on an upper side and a back side of the RF transistor die 111, respectively. However, it will be appreciated that each of the gate terminal 122, drain terminal 124, and source terminal 126 may be present on the top side of the RF transistor amplifier die 111, the bottom side of the RF transistor amplifier die 111, or both. Note that while a two-part reference number (e.g., source terminal 126-2) may be used in the drawings to indicate the same element, the full reference number may be used to refer to a particular instance of the element, whereas the first part of the reference number may be used to refer to the elements collectively.

[0123] The bonding elements 121, if included, may be attached to a top surface of the RF transistor amplifier die 111, and the interconnect structure 131 may be attached to a top surface of the bonding elements 121. Thus, the bonding elements 121 may be disposed between the RF transistor amplifier die 111 and the interconnect structure 131. In some embodiments, the bonding elements 121 may include conductive structures (e.g., metal pillars and pads) formed during wafer-level processing (i.e., before a semiconductor wafer including multiple RF transistor amplifier dies 111 is diced into individual RF transistor amplifier dies 111) using conventional semiconductor processing techniques and / or other methods. In such embodiments, an underfill material, such as a capillary underfill material, may be sprayed to fill spaces between the conductive structures of the bonding elements 121. In other embodiments, the bonding elements 121 may include separate structures, such as, for example, redistribution layer ("RDL") laminate structures and / or interposers, formed separately from the RF transistor amplifier die 111. In such an embodiment, the coupling elements 121 may be attached to the RF transistor amplifier die 111 during a wafer level processing step (i.e., before the wafer is diced into individual RF transistor amplifier dies 111) or may be applied to the individual RF transistor amplifier dies 111. It should be noted that even if the coupling elements are formed as part of wafer level processing, they are described herein as being separate elements from the RF transistor amplifier die 111 for ease of explanation.

[0124] The interconnect structure 131 may include any structure electrically connected to the RF transistor amplifier die 111 that provides a suitable mounting surface for the RF transistor amplifier die 111. In some cases, the interconnect structure 131 may include an RDL laminate structure. An RDL laminate structure refers to a substrate having conductive layer patterns and / or conductive vias for electrical and / or thermal interconnection. The RDL laminate structure may be fabricated using semiconductor processing techniques by depositing conductive and insulating layers and / or patterns on a base material and forming vias and copper routing patterns within the structure for transmitting signals through the RDL laminate structure. Other interconnect structures 131 may alternatively be used, such as, for example, a printed circuit board (e.g., a multi-layer printed circuit board), a metal core printed circuit board, or a ceramic substrate including conductive vias and / or pads. In yet another embodiment, the interconnect structure 131 may include a metal flange having an insulating pattern (e.g., a solder mask layer) on its top surface, and conductive traces on the insulating layer that provide electrical connection to, for example, one or more of the gate terminal 122, the drain terminal 124, and the source terminal 126. In either case, it will be appreciated that the interconnect structure 131 may be any other suitable mounting surface for the RF transistor amplifier die 111 that can form an electrical connection to the RF transistor amplifier die 111 directly or via the coupling element 121 and / or other intervening elements. Two or more interconnect structures 131 may be provided in a stacked format. The RF transistor amplifier die 111 may be attached to the interconnect structure 131 (e.g., an RDL laminate structure) by the die manufacturer. In other cases, the RF transistor amplifier die 111 may be directly mounted in the package on a package submount, such as a metal flange, and dielectrics and traces are formed on the metal flange such that the metal flange can act as the interconnect structure 131. Interconnect structure 131 may be omitted in some embodiments (eg, when the RF transistor amplifier die is mounted directly to a customer printed circuit board).

[0125] 10A-10D are various schematic views of a III-nitride based RF transistor amplifier die 10 that may be provided in a package according to an embodiment. In particular, FIG. 10A is a schematic plan view of the III-nitride based RF transistor amplifier die 10, and FIG. 10B is a cross-sectional view of the RF transistor amplifier die 10 taken along line 1B-1B of FIG. 10A. FIG. 10C is a schematic cross-sectional view taken along line 1C-1C of FIG. 10B showing metallization on a top surface of the semiconductor layer structure of the RF transistor amplifier die 10, and FIG. 10D is a cross-sectional view of the RF transistor amplifier die 10 taken along line 1D-1D of FIG. 10C. FIGs. 10E and 10F are schematic cross-sectional views illustrating two example ways in which the RF transistor amplifier die 10 of FIGS. 10A-10D may be packaged to provide packaged RF transistor amplifiers 1A and 1B, respectively. It will be appreciated that FIGS. 10A-10F (and many of the other figures herein) are highly simplified diagrams and that an actual RF transistor amplifier may include many additional unit cells and various circuits and elements not shown in the simplified drawings herein.

[0126] 10A , the RF transistor amplifier die 10 includes a gate terminal 22 and a drain terminal 24 exposed at a top surface of the RF transistor amplifier die 10. First and second circuit elements (not shown) may be connected to the gate terminal 22 and the drain terminal 24, respectively, by, for example, bond wires (not shown). The first circuit element may, for example, transmit an input RF signal to be amplified to the RF transistor amplifier die 10, and the second circuit element may receive an amplified RF signal output by the RF transistor amplifier die 10. A protective insulating layer or pattern 28 may cover the remainder of the top surface of the RF transistor amplifier die 10.

[0127] 10B-10D, the RF transistor amplifier die 10 includes a semiconductor layer structure 30, a topside metallization structure 20, and a backside metallization structure that serves as a source terminal 26 for the RF transistor amplifier die 10.

[0128] The semiconductor layer structure 30 includes multiple semiconductor layers. The RF transistor amplifier die 10 may be a HEMT-based RF transistor amplifier die, and therefore the semiconductor layer structure 30 may include at least a channel layer and a barrier layer (typically, additional layers are included in the semiconductor layer structure 30). Referring to FIG. 10D, in the illustrated example, the semiconductor layer structure 30 includes a total of three layers: a growth substrate 32, a semiconducting channel layer 34 formed on the growth substrate 32, and a semiconducting barrier layer 36 formed on the channel layer 34 on the opposite side to the growth substrate 32. The growth substrate 32 may be a semiconductor or insulating substrate (such as a SiC or sapphire substrate). The growth substrate 32 is considered to be part of the semiconductor layer structure 30 even if it is formed from a non-semiconductor material.

[0129] Referring again to FIG. 10B, the semiconductor layer structure 30 has an upper side 12 and a lower side 14. An upper metallization structure 20 is formed on the upper side 12 of the semiconductor layer structure 30, and a source terminal 26 is formed on the lower side 14 of the semiconductor layer structure 30. The upper metallization structure 20 includes, among other things, a conductive (typically metal) gate manifold 42 and a conductive (typically metal) drain manifold 44, conductive gate and drain vias 43, 45, conductive gate and drain terminals 22, 24, and gate, drain and source fingers 52, 54, 56 (described below). A dielectric passivation layer 23 separates the gate and drain terminals from the substrate. Although one dielectric passivation layer 23 is shown in FIG. 10B, more elaborate structures are possible. The gate manifold 42 is electrically connected to the gate terminal 22 through gate vias 43, and the drain manifold 44 is electrically connected to the drain terminal 24 through conductive drain vias 45. The gate and drain vias 43, 45 may include, for example, metal pillars formed of a dielectric material such as silicon oxide or silicon nitride.

[0130] As shown in FIG. 10C, the RF transistor amplifier die 10 includes a plurality of unit cell transistors 16, one of which is indicated by a dashed box in FIG. 10C. Each unit cell transistor 16 includes a gate finger 52, a drain finger 54, and a source finger 56. The gate, drain, and source fingers 52, 54, 56 are formed on the top surface of the semiconductor layer structure 30 and comprise a portion of the upper metallization structure 20. The upper metallization structure 20 further includes a gate manifold 42 and a drain manifold 44. The gate finger 52 is electrically connected to the gate manifold 42, and the drain finger 54 is electrically connected to the drain manifold 44. The source finger 56 is electrically connected to the source terminal 26 (FIG. 10B) by a plurality of conductive source vias 66 that extend through the semiconductor layer structure 30. The conductive source vias 66 may include metal plated or metal filled vias that extend completely through the semiconductor layer structure 30 .

[0131] The unit cell transistor 16 may be a HEMT device. Suitable structures for III-nitride based HEMT devices in which embodiments may be utilized are described, for example, in commonly assigned U.S. Patent Application Publication No. 2002 / 0066908, entitled "Aluminum Gallium Nitride / Gallium Nitride High Electron Mobility Transistors Having A Gate Contact On A Gallium Nitride Based Cap Segment And Methods Of Fabricating Same," published on June 6, 2002; U.S. Patent Application Publication No. 2002 / 0167023, entitled "Group-III Nitride Based High Electron Mobility Transistor (HEMT) With Barrier / Spacer Layer," published on November 14, 2002; and U.S. Patent Application Publication No. 2004 / 0061129, entitled "Nitride-Based Transistors And Methods Of Fabrication Thereof Using Non-Etched Contact No. 7,906,799, issued on March 15, 2011, entitled "Nitride-Based Transistors With A Protective Layer And A Low-Damage Recess," and U.S. Pat. No. 6,316,793, issued on November 13, 2001, entitled "Nitride Based Transistors On Semi-Insulating Silicon Carbide Substrates," the disclosures of which are incorporated herein by reference in their entireties.

[0132] As further shown in FIG. 10C, a plurality of metal plated source vias 66 may be provided extending from the upper metallization structure 40 through the semiconductor layer structure 30. The metal plated source vias 66 physically and electrically connect the source fingers 56 to the source terminals 126-2 provided on the backside of the RF transistor amplifier die 10. Each of the metal plated source vias 266 may be implemented by forming an opening through the semiconductor layer structure (e.g., by anisotropic etching) and then depositing a metal plating that coats the sidewalls of the opening. In some applications, the metal may completely fill the opening such that the metal plated via is a metal filled via. However, in many applications, the RF transistor amplifier die 10 may operate over a wide temperature range (due to outdoor applications and / or high levels of heat that may be generated within the RF transistor amplifier die during device operation), which may lead to high stress levels in the device due to metal and semiconductor materials having significantly different thermal expansion coefficients. In such cases, the center of the metal plated via 66 may be left open (ie, air filled) to reduce the amount of stress caused by thermal cycling.

[0133] Referring to FIG. 10D, the semiconductor layer structure 30 includes multiple semiconductor layers. In the illustrated embodiment, a total of two semiconductor layers are shown: a channel layer 34 and a barrier layer 36 above the channel layer 34. The semiconductor layer structure 30 may (and typically does) include additional semiconductor and / or non-semiconductor layers. For example, the semiconductor layer structure 30 may include a growth substrate 32 on which other semiconductor layers are grown. The growth substrate 32 may include, for example, a 4H-SiC or 6H-SiC substrate. In other embodiments, the growth substrate may include a different semiconductor material (e.g., silicon or III-nitride-based materials, GaAs, ZnO, InP) or a non-semiconductor material (e.g., sapphire).

[0134] SiC has a much closer crystal lattice match to III-nitrides than sapphire (Al2O3), a very common substrate material for III-nitride devices. The closer lattice match of SiC can result in higher quality III-nitride films than those typically available on sapphire. SiC has a very high thermal conductivity, such that the total output power of a III-nitride device in silicon carbide is typically not as limited by the heat dissipation of the substrate as it would be for the same device formed on sapphire. The availability of semi-insulating SiC substrates can also provide device isolation and reduced parasitic capacitance.

[0135] Optional buffer, nucleation and / or transition layers (not shown) may be provided on the growth substrate 32 beneath the channel layer 34. For example, an AlN buffer layer may be included to provide a suitable crystal structure transition between the SiC growth substrate 32 and the remainder of the semiconductor layer structure 30. In addition, a strain balanced transition layer may be provided as described, for example, in commonly assigned U.S. Patent Application Publication No. 2003 / 0102482, entitled "Strain Balanced Nitride Heterojunction Transistors And Methods Of Fabricating Strain Balanced Nitride Heterojunction Transistors," published June 5, 2003, the disclosure of which is incorporated herein by reference as if fully set forth herein.

[0136] In some embodiments, the channel layer 34 is Al X Ga 1-XThe channel layer 34 may be a III-nitride material such as GaN, where 0≦X<1 if the energy of the conduction band edge of the channel layer 34 is less than the energy of the conduction band edge of the barrier layer 36 at the interface between the channel and the barrier layers 34, 36. In one embodiment, X=0 indicates that the channel layer 34 is gallium nitride ("GaN"). The channel layer 34 may be other III-nitrides such as InGaN, AlInGaN, etc. The channel layer 34 may be undoped or unintentionally doped, and may be grown to a thickness of, for example, greater than about 20 Å. The channel layer 34 may be a multi-layer structure, such as a superlattice or combination of GaN, AlGaN, etc.

[0137] The channel layer 34 may have a bandgap smaller than the bandgap of at least a portion of the barrier layer 36, and the channel layer 34 may also have a greater electron affinity than the barrier layer 36. In some embodiments, the barrier layer 36 is AlN, AlInN, AlGaN, or AlInGaN with a thickness of about 0.1 nm to about 10 nm or more. In particular embodiments, the barrier layer 36 is sufficiently thick and has a sufficiently high Al composition and doping to induce significant carrier concentration at the interface between the channel layer 34 and the barrier layer 36.

[0138] The barrier layer 36 may be a III-nitride and may have a bandgap larger than that of the channel layer 34 and a lower electron affinity than the channel layer 34. Thus, in one embodiment, the barrier layer 36 may include AlGaN, AlInGaN, and / or AlN, or combinations of layers thereof. The barrier layer 36 may be, for example, from about 0.1 nm to about 30 nm thick. In one embodiment, the barrier layer 36 is undoped or is about 10 19 cm -3 In some embodiments, the barrier layer 36 is doped with an n-type dopant to a concentration of less than Al. X Ga 1-XN, where 0 < X < 1. In certain embodiments, the aluminum concentration is about 25%. However, in other embodiments, the barrier layer 36 comprises AlGaN having an aluminum concentration of about 5% to about 100%. In certain embodiments, the aluminum concentration is greater than about 10%.

[0139] Due to the difference in bandgap between the barrier layer 36 and the channel layer 34 and the piezoelectric effect at the interface between the barrier layer 36 and the channel layer 34, a two-dimensional electron gas (2DEG) is induced in the channel layer 34 at the junction between the channel layer 34 and the barrier layer 36. The 2DEG acts as a very conductive layer that allows conduction between the source region and the associated drain region of each unit cell transistor 16. The source region is the portion of the semiconductor layer structure 30 directly below the source finger 56, and the drain region is the portion of the semiconductor layer structure 30 directly below the corresponding drain finger 54.

[0140] An interlayer insulating layer (not shown) is formed over the gate finger 52, the drain finger 54, and the source finger 56. The interlayer insulating layer may include a dielectric material such as SiN, SiO2, etc.

[0141] FIG. 10E is a schematic side view of a packaged group III nitride-based RF transistor amplifier 1A according to several embodiments including the RF transistor amplifier die 10 of FIGS. 10A - 10D. As shown in FIG. 10E, the packaged RF transistor amplifier 1A includes an RF transistor amplifier die 10 and an open cavity package 70. The package 70 includes a metal gate lead 72, a metal drain lead 74, a metal submount 76, a ceramic sidewall 78, and a ceramic lid 80.

[0142] The RF transistor amplifier die 10 is mounted on the top surface of the metal submount 76 (which may be a metal flange) in a cavity defined by the metal submount 76, ceramic sidewalls 78, and ceramic lid 80. The source terminal 26 of the RF transistor amplifier die 10 may be attached to the metal submount 76 using, for example, a conductive die attach material. The metal submount 76 may provide an electrical connection to the source terminal 26 and may function as a heat dissipation structure to dissipate heat generated in the RF transistor amplifier die 10. The heat is generated primarily in the top portion of the RF transistor amplifier die 10, where a relatively high current density occurs, for example, in the channel region of the unit cell transistor 16. This heat may be transferred to the source terminal 26 through the source vias 66 and the semiconductor layer structure 30 and then to the metal submount 76.

[0143] An input matching circuit 90 and / or an output matching circuit 92 may also be mounted within the package 70. The matching circuits 90, 92 may include impedance matching and / or harmonic termination circuits. The impedance matching circuits may be used to match the impedance of the fundamental component of the RF signal input to or output from the RF transistor amplifier 1A to the impedance at the input or output of the RF transistor amplifier die 10, respectively. The harmonic termination circuits may be used to ground harmonics of the fundamental RF signal that may be present at the input or output of the RF transistor amplifier die 10. More than one input matching circuit 90 and / or output matching circuit 92 may be provided. As shown diagrammatically in FIG. 10E, the input and output matching circuits 90, 92 may be mounted on the metal submount 76. The gate lead 72 may be connected to an input matching circuit 90 by one or more first bond wires 82, which may be connected to the gate terminal 22 of the RF transistor amplifier die 10 by one or more second bond wires 84. Similarly, the drain lead 74 may be connected to an output matching circuit 92 by one or more fourth bond wires 88, which may be connected to the drain terminal 24 of the RF transistor amplifier die 10 by one or more third bond wires 86. The inductive bond wires 82, 84, 86, 88 may form part of the input and / or output matching circuits. The gate lead 72 and the drain lead 74 may extend through a ceramic sidewall 78. The interior of the package 70 may include an air-filled cavity.

[0144] An encapsulant 120 is provided on the submount 76 over the RF transistor amplifier die 10 to package it.

[0145] 10F is a schematic side view of another packaged III-nitride based RF transistor amplifier 1B according to some embodiments. RF transistor amplifier 1B differs from RF transistor amplifier 1A in that it includes a different package 70'. Package 70' includes a metal submount 76 (which acts as a metal heat sink and can be implemented as a metal slug) and gate and drain leads 72', 74'. An encapsulant 120 is provided on the submount 76 over the RF transistor amplifier die 10 to package it.

[0146] RF transistor amplifier 1B also includes a plastic overmold 78' that at least partially encapsulates RF transistor amplifier die 10 over encapsulation material 120, leads 72', 74', and metal submount 76. The other components of RF transistor amplifier 1B may be the same as the like-numbered components of RF transistor amplifier 1A, and therefore further description thereof will be omitted.

[0147] When an element, such as a layer, region, or substrate, is said to be "on" or extending "upon" another element, it will be understood that the element can be directly on or extending directly onto the other element, or that intervening elements may be present. In contrast, when an element is said to be "directly on" or extending "directly onto" another element, there are no intervening elements present. When an element is said to be "connected" or "coupled" to another element, it will also be understood that the element can be directly connected or coupled to the other element, or that intervening elements may be present. In contrast, when an element is said to be "directly connected" or "directly coupled" to another element, there are no intervening elements present.

[0148] Relative terms such as "lower," "upper," "upper side," "lower," "horizontal," "lateral," "vertical," "below," "above," "above," and the like may be used herein to describe the relationship of one element, layer, or region to another element, layer, or region as illustrated in the figures. It will be understood that these terms are intended to encompass different orientations of the device in addition to the orientation depicted.

[0149] Embodiments of the inventive concepts are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the inventive concepts. Thicknesses of layers and regions in the drawings may be exaggerated for clarity. Additionally, variations from the shapes of the illustrations as a result of, for example, manufacturing techniques and / or tolerances are expected. Thus, embodiments of the inventive concepts should not be construed as limited to the particular shapes of regions illustrated herein, but should include, for example, deviations in shapes that result from manufacturing. For example, an implant region illustrated as a rectangle typically has rounded or curved features and / or a gradient of implant concentration at its edges rather than a discrete transition from implant region to non-implant region. Similarly, buried regions formed by implantation may, in some implantations, result in a region between the buried region and the surface through which the implantation occurs. Thus, the illustrated regions are schematic in nature, and their shapes are not intended to represent the actual shape of the regions of the device, and are not intended to limit the scope of the inventive concepts.

[0150] In connection with the above description and drawings, many different embodiments are disclosed herein. It will be understood that literally describing and illustrating every combination and subcombination of these embodiments would be undue repetition and complexity. Thus, all embodiments can be combined in any manner and / or combination, and the specification, including the drawings, is to be construed as constituting a complete written description of all combinations and subcombinations of the embodiments described herein, and the modes and processes for making and using them, and supports the claims to every such combination or subcombination.

[0151] In the drawings and specification, exemplary embodiments of the inventive concept have been disclosed and specific terms have been employed, but they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the inventive concept being indicated in the following claims.

Claims

1. 1. A method of packaging a transistor device, comprising the steps of: Attaching a plurality of electronic devices to a carrier substrate, the plurality of electronic devices including a Group III-nitride based radio frequency (RF) transistor die having an operating frequency greater than 1 GHz and ancillary electronic devices; applying an encapsulation material over the RF transistor die and not over the auxiliary electronics, the encapsulation material comprising a curable encapsulation material; providing a protective structure on the carrier substrate over the plurality of electronic devices and the encapsulation material, the protective structure including a plastic overmold on the carrier substrate, the plastic overmold in contact with the carrier substrate and covering the encapsulation material and the plurality of electronic devices; curing the curable encapsulation material after providing the protective structure over the plurality of electronic devices and the encapsulation material; Including, 13. A method for packaging a transistor device, wherein the encapsulation material comprises a polytetrafluoroethylene (PTFE) based material.

2. 2. The method of claim 1, wherein the curable encapsulant comprises a curable liquid encapsulant, and applying the encapsulant comprises dispensing the curable liquid encapsulant over the RF transistor die.

3. The method of claim 1 , further comprising connecting the auxiliary electronics to the RF transistor die before providing the encapsulation material over the RF transistor die.

4. The method of claim 1 , wherein the plastic overmold is in contact with the encapsulation material.

5. The method of claim 1 , wherein the encapsulation material and the plastic overmold have different coefficients of thermal expansion.

6. The method of claim 1 , wherein the encapsulation material and the plastic overmold have different hardnesses.

7. The method of claim 1 , further comprising fully curing the curable encapsulant material after providing the protective structure over the plurality of electronic devices and the encapsulant material.

8. The method of claim 1 , further comprising at least partially curing the curable encapsulant material after providing the protective structure over the plurality of electronic devices and the encapsulant material.

9. 2. The method of claim 1 , wherein the curable encapsulation material comprises a hardener, and applying the curable encapsulation material comprises applying the hardener over the one of the RF transistor die and the auxiliary electronics.

10. The method of claim 1 , wherein attaching the plurality of electronic devices to the carrier substrate comprises attaching at least one of the plurality of electronic devices to the carrier substrate by sintered silver or eutectic die attach.

11. 2. The method of claim 1, wherein attaching the plurality of electronic devices to the carrier substrate comprises forming solder bumps on the plurality of electronic devices and / or the carrier substrate and attaching the plurality of electronic devices to the carrier substrate via the solder bumps, wherein the encapsulation material extends between the plurality of electronic devices and the carrier substrate.

12. 10. The method of claim 1, further comprising forming an encapsulant dam on the carrier substrate around the plurality of electronic devices, the encapsulant dam defining a die attach area of ​​the carrier substrate, the encapsulant material being provided within the die attach area.

13. The method of claim 1 , wherein the RF transistor die comprises a GaN-based device or a SiC-based device.

14. 1. A method of packaging a transistor device, comprising the steps of: attaching one or more electronic devices to a carrier substrate, the one or more electronic devices including a transistor die; applying an encapsulation material over at least one of the one or more electronic devices, the encapsulation material comprising a curable encapsulation material; providing a protective structure on the carrier substrate over the one or more electronic devices and the encapsulation material; providing an adhesive between the protective structure and the carrier substrate, and simultaneously curing the curable encapsulant and the adhesive; 13. A method for packaging a transistor device, comprising:

15. The method of claim 14 , wherein the adhesive comprises an epoxy adhesive.

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