Power Conversion Equipment

Abstract

To provide a power conversion device capable of restarting quickly or continuing operation on an uninterruptible basis when there is a bypass request to a cell converter and capable of preventing the increase of harmonics.SOLUTION: A power conversion device 1 includes: three or more cell converters 31_k, each having a main circuit 301, input / output terminals 303 and 304, and a bypass switch 302, the input / output terminals 303 and 304 being connected in series; and a control unit 5 controlling the main circuit 301 and the bypass switch 302 provided on each of the cell converters 31_k. The control unit 5 controls at least two of the cell converters 31_k so that the maximum possible output voltage is lower than a rated voltage by control signals Sg1 to Sg4 generated using carrier signals whose phases are identical to each other when all of the bypass switches 302 are controlled in a non-conducting state.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a power conversion device including a plurality of cell converters connected in series. [Background technology]

[0002] The Modular Multilevel Converter (MMC) is attracting attention as a next-generation transformerless power converter suitable for large-capacity, high-voltage applications. Patent Document 1 discloses an MMC. The MMC consists of a reactor and N cell converters connected in series.

[0003] Non-Patent Document 1 describes the phase-shift method as a pulse width modulation (PWM) method for MMC. The phase-shift method prepares triangular wave carrier signals for each cell converter that makes up the MMC, and arranges these carrier signals at equal phase intervals based on the number of cell converters. This allows the phase-shift method to obtain multi-level voltages by uniformly shifting the output pulse waveforms of each cell converter. This allows MMCs to reduce harmonic output, thereby enabling the miniaturization and cost reduction of harmonic filters, etc.

[0004] Patent document 2 discloses a method in which, when one of multiple cell converters connected in series fails, a bypass switch provided on the failed cell converter is turned on, thereby short-circuiting the external output terminal provided on the cell converter, stopping the supply of current to the failed cell converter and allowing the power conversion device to continue operating. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 5800154 [Patent Document 2] Patent No. 3544838 [Non-patent literature]

[0006] [Non-Patent Document 1] Iwaji et al., "PWM Control Method for High-Voltage Direct Inverters," Transactions of the Institute of Electrical Engineers of Japan, Vol. 121, No. 4, pp. 476-483, 2001 Summary of the Invention [Problem to be solved by the invention]

[0007] Figure 6 shows an example of a triangular wave carrier signal used in a phase-shift system in an MMC with three serially connected cell converters. "CS1" in Figures 6(a) and 6(b) indicates the carrier signal used to generate a control signal to control one of the three cell converters. "CS2" in Figures 6(a) and 6(b) indicates the carrier signal used to generate a control signal to control one of the remaining two cell converters. "CS3" in Figure 6(a) indicates the carrier signal used to generate a control signal to control the remaining cell converter. "Tc" in Figures 6(a) and 6(b) indicates the calculation timing for calculating voltage commands for the voltages input / output by the three cell converters to / from the system AC power source. "Pc" in Figures 6(a) and 6(b) indicates the calculation period for calculating the voltage commands. In Figure 6, one of the multiple calculation timings indicated by downward arrows in Figures 6(a) and 6(b) is given the reference symbol "Tc", and one of the multiple calculation periods indicated by bidirectional arrows in Figures 6(a) and 6(b) is given the reference symbol "Pc".

[0008] As shown in Figure 6(a), in general, in an MMC that uses the phase shift method, the carrier signals of each cell converter are set so that the phase difference is equal. Also, in such an MMC, the voltage command is updated at calculation timings Tc, which correspond to the peaks and valleys of the carrier signal. Therefore, the calculation period Pc, in which the voltage command is calculated, is the interval of the calculation timings Tc. In the example shown in Figure 6(a), the phase difference between carrier signals CS1, CS2, and CS3 is set to 60°, so the calculation timings Tc are intervals that divide one period into 6 equal parts.

[0009] If a cell converter controlled by a control signal generated using one of the carrier signals CS1, CS2, or CS3 fails and operation continues by bypassing the failed cell converter (hereinafter sometimes referred to as the "faulty cell converter"), the carrier signals used to generate control signals for controlling the non-faulty cell converter (hereinafter sometimes referred to as the "healthy cell converter") will no longer be spaced at equal intervals.

[0010] Hereinafter, a cell converter controlled by a control signal generated using a carrier signal is referred to as a "cell converter associated with the carrier signal." For example, assume that the cell converter associated with carrier signal CS3 shown in Figure 6(a) fails. In this case, the phase difference between the peaks of carrier signal CS1 and the peaks of carrier signal CS2, which are used to generate the control signal for controlling the healthy cell converter, and the phase difference between the troughs of carrier signal CS1 and the troughs of carrier signal CS2 are 60°. However, the phase difference between the peaks of carrier signal CS2 and the troughs of carrier signal CS1 and the phase difference between the troughs of carrier signal CS2 and the peaks of carrier signal CS1 are 120°. As such, the phase differences between the peaks and troughs of carrier signals CS1 and CS2 are not equally spaced, resulting in an increase in harmonics. Generally, peripheral devices such as filters used in MMCs are designed to handle the increased harmonics when a cell converter fails. This results in larger peripheral devices such as filters used in MMCs.

[0011] One possible solution to this increase in harmonics is to re-arrange the carrier signals at equal intervals to match the number of healthy cell converters after a cell converter fails. For example, suppose the cell converter associated with carrier signal CS3 shown in Figure 6(a) fails. In this case, as shown in Figure 6(b), the carrier signals CS1 and CS2 are re-arranged so that the peaks and valleys (i.e., calculation timing Tc) are equally spaced. As a result, the calculation period Pc of carrier signals CS1 and CS2 is divided into four equal intervals.

[0012] However, rearranging the carrier signals CS1 and CS2 changes the calculation timing Tc for updating the voltage command, which necessitates changing the calculation cycle Pc. Because the calculation cycle in an MMC is a fundamental part of the system, changing it requires system initialization, and it takes time from system reconfiguration until the power conversion equipment using an MMC starts operating again. For this reason, the method of preventing an increase in harmonics by changing the calculation cycle when a cell converter fails cannot be applied to systems that require immediate recovery in the event of a failure or systems that require uninterrupted operation.

[0013] An object of the present invention is to provide a power conversion device that can quickly restart or continue operation without interruption when a bypass request is made to a cell converter, and that can prevent an increase in harmonics. [Means for solving the problem]

[0014] In order to achieve the above object, a power conversion device according to one embodiment of the present invention comprises three or more cell converters, each having a main circuit that generates power to be input and output between a system AC power source, a pair of input / output terminals through which the power is input and output, and a switch that is configured to be able to short-circuit the pair of input / output terminals, and the pairs of input / output terminals are connected in series, and a control unit that controls the main circuits and the switches provided in the three or more cell converters, and when the control unit controls all of the switches to a non-conducting state, controls at least two of the three or more cell converters using control signals generated using carrier signals that have the same phase so that the maximum voltage that can be output is lower than the rated voltage. [Effects of the Invention]

[0015] According to one aspect of the present invention, when a bypass request is made to a cell converter, it is possible to quickly restart or continue operation without interruption, and to prevent an increase in harmonics. [Brief explanation of the drawings]

[0016] [Figure 1] 1 is a circuit block diagram showing a schematic configuration of a power conversion device according to an embodiment of the present invention. [Figure 2] 2 is a block diagram showing a schematic configuration of a control unit provided in the power conversion device according to one embodiment of the present invention. FIG. [Figure 3] FIG. 10 is a diagram for explaining the operation of the power conversion device according to one embodiment of the present invention, showing an example of various voltage waveforms when all cell converters are in a healthy state. [Figure 4] FIG. 1 is a diagram for explaining the operation of the power conversion device according to one embodiment of the present invention, showing an example of various voltage waveforms when a failure occurs in a cell converter (part 1). [Figure 5] FIG. 10 is a diagram for explaining the operation of the power conversion device according to one embodiment of the present invention, showing an example of various voltage waveforms when a failure occurs in the cell converter (part 2). [Figure 6]FIG. 1 shows an example of a triangular wave carrier signal used in a phase-shift method in a conventional MMC having three cell converters connected in series. DETAILED DESCRIPTION OF THE INVENTION

[0017] One embodiment of the present invention exemplifies an apparatus and method for embodying the technical idea of ​​the present invention, and the technical idea of ​​the present invention does not specify the materials, shapes, structures, arrangements, etc. of the components as described below. The technical idea of ​​the present invention can be variously modified within the technical scope defined by the claims.

[0018] (Configuration of power conversion device) A power conversion device according to one embodiment of the present invention will be described with reference to Figs. 1 to 5. First, a schematic configuration of the power conversion device according to this embodiment will be described with reference to Figs. 1 and 2. Hereinafter, the power conversion device 1 according to this embodiment will be described using a single-phase modular multilevel converter (MMC) that can be connected to a power grid as an example. The power conversion device 1 according to this embodiment can be applied to a reactive power compensator.

[0019] As shown in Fig. 1, a power conversion device 1 according to this embodiment is connected to a system AC power supply 9. The power conversion device 1 includes a main circuit 301 that generates power to be input and output to and from the system AC power supply 9, a pair of input / output terminals 303, 304 to and from which the power is input and output, and a bypass switch (an example of a switch) 302 that is provided so as to be able to short-circuit the pair of input / output terminals 303, 304. The power conversion device 1 includes three or more (n in this embodiment (n is a natural number greater than or equal to 3)) cell converters 31_1, 31_2, ..., 31_m (m is a natural number greater than or equal to 3 and less than n) and 31_n, each of which is connected in series with the pair of input / output terminals 303, 304. The bypass switch 302 is, for example, a mechanical switch. The cell converters 31_1 to 31_n form a single-phase cluster 3. The power conversion device 1 includes a control unit 5 that controls the main circuits 301 and the bypass switches 302 provided in the three or more cell converters 31_1 to 31_n.

[0020] Each of the cell converters 31_1 to 31_n has a driving capacity that allows a combination of any two or more of the cell converters 31_1 to 31_n to input and output AC power to and from the system AC power supply 9. Therefore, when all of the cell converters 31_1 to 31_n are in a healthy state and not faulty, the power conversion device 1 operates the cell converters 31_1 to 31_n with the driving capacity of some of the cell converters 31_1 to 31_n reduced. Furthermore, when a failure occurs within a range of "nm" of the cell converters 31_1 to 31_n, the power conversion device 1 can input and output AC power between the single-phase cluster 3 and the system AC power supply 9 by increasing the driving capacity of the remaining healthy cell converters that have been operating with reduced driving capacity in accordance with the number of faulty cell converters, etc. In this way, "nm" cell converters (for example, cell converters 31_m+1 to 31_n) among the cell converters 31_1 to 31_n are provided as redundant cell converters (hereinafter, sometimes referred to as "redundant cell converters").

[0021] When all of the bypass switches 302 provided in the cell converters 31_1 to 31_n are controlled to be in a non-conductive state (off state), the control unit 5 controls the redundant cell converter and the cell converters other than the redundant one (hereinafter, sometimes referred to as "primary cell converter") with control signals generated using carrier signals having the same phase as each other. For example, it is assumed that the cell converters 31_1 to 31_m are primary cell converters and the cell converters 31_m+1 to 31_n are redundant cell converters. In this case, the control unit 5 controls any one of the cell converters 31_1 to 31_m and at least one of the cell converters 31_m+1 to 31_n with control signals generated using carrier signals having the same phase as each other.

[0022] In the power conversion device 1, one main cell converter and one or more redundant cell converters may be paired together and controlled by a control signal generated using carrier signals of the same phase. Also, in the power conversion device 1, some of the main cell converters may not be paired with a redundant cell converter, and each of the remaining main cell converters may be paired with one of the redundant cell converters. Also, in the power conversion device 1, each of all of the main cell converters may be paired with one of the redundant cell converters.

[0023] Incidentally, cases in which all of the bypass switches 302 provided in the cell converters 31_1 to 31_n are controlled to a non-conductive state (off state) include the initial state of the power conversion device 1, when a bypass request has not been made to any of the cell converters 31_1 to 31_n, etc. Cases in which a bypass request is made to any of the cell converters 31_1 to 31_n include when the cell converter has failed or when the operation of the cell converter is stopped (for example, when the cell converter is stopped for maintenance work).

[0024] The power conversion device 1 includes a reactor L arranged between the cell converters 31_1 to 31_n and a system AC power supply 9. The reactor L is provided, for example, to smooth an AC current Is flowing through the single-phase cluster 3. The reactor L is also provided, for example, to prevent an overcurrent from flowing through the single-phase cluster 3.

[0025] Here, the configuration of the cell converters 31_1 to 31_n will be described. The cell converters 31_1 to 31_n have the same configuration. Therefore, the configuration of the cell converters 31_1 to 31_n will be described by taking the cell converter 31_1 as an example.

[0026] 1, the main circuit 301 provided in the cell converter 31_1 has a semiconductor switch Q1 (an example of a first semiconductor switch) and a semiconductor switch Q2 (an example of a second semiconductor switch) connected in series, a semiconductor switch Q3 (an example of a third semiconductor switch) and a semiconductor switch Q4 (an example of a fourth semiconductor switch) connected in series, and a capacitor C. The semiconductor switches Q1 to Q4 are configured, for example, by MOS field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistors).

[0027] The semiconductor switches Q1 and Q2, the semiconductor switches Q3 and Q4, and the capacitor C are connected in parallel. An input / output terminal 303 (one of a pair of input / output terminals) is connected to the connection between the semiconductor switches Q1 and Q2, and an input / output terminal 304 (the other of the pair of input / output terminals) is connected to the connection between the semiconductor switches Q3 and Q4.

[0028] The main circuit 301 has freewheeling diodes D1, D2, D3, and D4 (an example of a diode) connected in antiparallel to a semiconductor switch Q1, a semiconductor switch Q2, a semiconductor switch Q3, and a semiconductor switch Q4, respectively.

[0029] In this embodiment, the semiconductor switches Q1, Q2, Q3, and Q4 are configured with power semiconductor elements, such as n-type SiC MOSFETs. The drain terminal of the semiconductor switch Q1 is connected to the cathode terminal of the freewheeling diode D1, the drain terminal of the semiconductor switch Q3, and the cathode terminal of the freewheeling diode D3. The source terminal of the semiconductor switch Q1 is connected to the anode terminal of the freewheeling diode D1, the drain terminal of the semiconductor switch Q2, and the cathode terminal of the freewheeling diode D2. The gate terminal of the semiconductor switch Q1 is connected to the control unit 5. As a result, a control signal Sg1 output from the control unit 5 is input to the gate terminal of the semiconductor switch Q1, thereby controlling the on (conduction) / off (non-conduction) of the semiconductor switch Q1.

[0030] The source terminal of semiconductor switch Q2 is connected to the anode terminal of freewheeling diode D2, the source terminal of semiconductor switch Q4, and the anode terminal of freewheeling diode D4. The gate terminal of semiconductor switch Q2 is connected to control unit 5. As a result, a control signal Sg2 output from control unit 5 is input to the gate terminal of semiconductor switch Q2, controlling the on (conducting) / off (non-conducting) of semiconductor switch Q2.

[0031] The source terminal of semiconductor switch Q3 is connected to the anode terminal of freewheeling diode D3, the drain terminal of semiconductor switch Q4, and the cathode terminal of freewheeling diode D4. The gate terminal of semiconductor switch Q3 is connected to control unit 5. As a result, a control signal Sg3 output from control unit 5 is input to the gate terminal of semiconductor switch Q3, controlling the on (conducting) / off (non-conducting) of semiconductor switch Q3.

[0032] The gate terminal of the semiconductor switch Q4 is connected to the control unit 5. As a result, a control signal Sg4 output from the control unit 5 is input to the gate terminal of the semiconductor switch Q4, and the on (conducting) / off (non-conducting) state of the semiconductor switch Q4 is controlled.

[0033] One electrode of capacitor C is connected to the drain terminal of semiconductor switch Q1, the cathode terminal of freewheeling diode D1, the drain terminal of semiconductor switch Q3, and the cathode terminal of freewheeling diode D3, while the other electrode of capacitor C is connected to the source terminal of semiconductor switch Q2, the anode terminal of freewheeling diode D2, the source terminal of semiconductor switch Q4, and the anode terminal of freewheeling diode D4.

[0034] The source terminal of semiconductor switch Q1, the anode terminal of freewheeling diode D1, the drain terminal of semiconductor switch Q2, and the cathode terminal of freewheeling diode D2 are connected to input / output terminal 303 and one terminal of bypass switch 302. The source terminal of semiconductor switch Q3, the anode terminal of freewheeling diode D3, the drain terminal of semiconductor switch Q4, and the cathode terminal of freewheeling diode D4 are connected to input / output terminal 304 and another terminal of bypass switch 302. In this way, input / output terminals 303 and 304 and bypass switch 302 are connected to a connection portion where capacitor C is not connected, among the connection portions where the terminals of semiconductor switches Q1, Q2, Q3, and Q4 are connected to one another.

[0035] An input / output terminal 303 and one terminal of the bypass switch 302 provided in the cell converter 31_1 are connected to one terminal of the reactor L. The other terminal of the reactor L is connected to the positive terminal of the system AC power supply 9. An input / output terminal 304 and the other terminal of the bypass switch 302 provided in the cell converter 31_1 are connected to an input / output terminal 303 and one terminal of the bypass switch 302 provided in the cell converter 31_2.

[0036] Similarly, the input / output terminal 303 and one terminal of the bypass switch 302 provided in the cell converter 31_i (i is a natural number from 2 to n-1) are connected to the input / output terminal 304 and the other terminal of the bypass switch 302 provided in the cell converter 31_i-1. The input / output terminal 304 and the other terminal of the bypass switch 302 provided in the cell converter 31_i are connected to the input / output terminal 303 and one terminal of the bypass switch 302 provided in the cell converter 31_i+1.

[0037] An input / output terminal 303 and one terminal of the bypass switch 302 provided in the cell converter 31_n are connected to an input / output terminal 304 provided in the cell converter 31_n-1 and the other terminal of the bypass switch 302. The input / output terminal 304 and the other terminal of the bypass switch 302 provided in the cell converter 31_n are connected to the negative terminal of the system AC power supply 9.

[0038] 1, the control unit 5 outputs a control signal Sg1 for controlling the switching of the semiconductor switch Q1 to each of the main circuits 301 provided in the cell converters 31_1 to 31_n. The control unit 5 outputs a control signal Sg2 for controlling the switching of the semiconductor switch Q2 to each of the main circuits 301 provided in the cell converters 31_1 to 31_n. The control unit 5 outputs a control signal Sg3 for controlling the switching of the semiconductor switch Q3 to each of the main circuits 301 provided in the cell converters 31_1 to 31_n. The control unit 5 outputs a control signal Sg4 for controlling the switching of the semiconductor switch Q4 to each of the main circuits 301 provided in the cell converters 31_1 to 31_n.

[0039] The control unit 5 outputs a switching signal Ssd1 to the cell converter 31_1 to control the switching of the bypass switch 302 provided in the cell converter 31_1. The control unit 5 outputs a switching signal Ssdi (i is a natural number from 2 to n-1) to the cell converter 31_i to control the switching of the bypass switch 302 provided in the cell converter 31_i. The control unit 5 outputs a switching signal Ssdn to the cell converter 31_n to control the switching of the bypass switch 302 provided in the cell converter 31_n.

[0040] The control unit 5 controls the cell converters 31_1 to 31_n by pulse width modulation (PWM). In PWM control, the control unit 5 updates output voltage commands that cause the output voltages V1, Vm, Vn of the cell converters 31_1, . . . , 31_m, . . . , 31_n to follow the timing of peaks and valleys of multiple carrier signals. That is, the calculation cycle in which the control unit 5 calculates the output voltage commands is the interval between adjacent peaks and valleys of multiple carrier signals. Therefore, if the frequency of the carrier signals used by the control unit 5 to generate control signals Sg1 to Sg4 for controlling the cell converters 31_1 to 31_n is denoted by fc and the number of main cell converters among the cell converters 31_1 to 31_n is denoted by M, the calculation cycle Pc of the output voltage commands is expressed by the following equation (1): Pc=1 / (fc×M×2) (1)

[0041] In the power conversion device 1, when all of the bypass switches 302 provided in the cell converters 31_1 to 31_n are controlled to a non-conductive state (for example, in the initial state of the power conversion device 1), the control signals Sg1 to Sg4 that control the pairs of primary and redundant cell converters among the cell converters 31_1 to 31_n are generated using carrier signals with the same phase. Therefore, the number M of primary cell converters is equal to the number of carrier signals with different phases.

[0042] The power conversion device 1 is designed to be able to output the maximum value of the AC voltage Vio (the rated voltage of the AC voltage Vio) using the same number of cell converters as the number M of main cell converters. Here, the AC voltage Vio is the sum of the output voltages V1 to Vn of the cell converters 31_1 to 31_n, and is the output voltage of the single-phase cluster 3. Furthermore, it is assumed that when all of the cell converters 31_1 to 31_n operate in a normal state where no faults or the like occur, the sum of the output voltages V1 to Vn output by the cell converters 31_1 to 31_n is equal to the rated voltage of the AC voltage Vio. In this case, in the power conversion device 1, the voltage output by an individual cell converter among the cell converters 31_1 to 31_n is set to the rated voltage of the cell converter 31_1 to 31_n. Here, an "individual cell converter" refers to a cell converter among the main cell converters that is not paired with a redundant cell converter.

[0043] As described above, the number of carrier signals used in the power conversion device 1 is equal to the number M of main cell converters, so the phase θm of the mth carrier signal (m is a natural number from 1 to M) is expressed by the following equation (2). θm=180°×(m-1) / M (2)

[0044] The phases of the carrier signals used to generate the control signals Sg1 to Sg4 of the redundant cell converters match any of the phases expressed by equation (2). By setting the phases of the multiple carrier signals according to equation (2), the power conversion device 1 can reduce harmonics in the output voltages V1 to Vn of the cell converters 31_1 to 31_n and in the AC current Is flowing through the cell converters 31_1 to 31_n.

[0045] When all of the bypass switches 302 provided in the cell converter 31_k (k is a natural number from 1 to n) (i.e., the cell converters 31_1 to 31_n) are controlled to be in a non-conductive state, the number of cell converters related to the carrier signal of the same phase is set to R, and the output voltage command for tracking the output voltage of the single-phase cluster 3 is set to Vio * Then, the output voltage command Vddk that makes the output voltage Vk (k is a natural number from 1 to n) of the cell converter 31_k follow * is expressed by the following equation (3). Vddk * =Vio * / (M×R) ···(3)

[0046] Although details will be described later, in this embodiment, the control unit 5 is configured to perform the functions expressed by equations (1) to (3). For this reason, the control unit 5 determines whether the output voltage Vk of the cell converter 31_k is equal to the output voltage command Vddk * Since the cell converter 31_k is controlled to follow the voltage Vk, the output voltage Vk of the cell converter 31_k is expressed by the following equation (4). Vk = Vio / (M × R) (4)

[0047] For example, the output voltage command of the single cell converter is expressed by R=1 in equation (3). Therefore, the control unit 5 sets the voltage command of the output voltage of the single-phase cluster 3 as Vio * The output voltage command Vddk obtained by dividing by the number M of main cell converters and the number R (R=1) of cell converters related to the carrier signal of the same phase * Then, control signals Sg1 to Sg4 are generated to control the single cell converter so that the output voltage of the single cell converter can follow the control signal Sg1 to Sg4.

[0048] Furthermore, the output voltage commands of the non-single cell converter and the redundant cell converter related to carrier signals having the same phase are expressed by R>1 (where R is a natural number) in equation (3). Therefore, when the control unit 5 controls all of the bypass switches 302 provided in the cell converters 31_1 to 31_n to a non-conductive state, the control unit 5 controls the non-single cell converter and the redundant cell converter (an example of at least two cell converters) among the cell converters 31_1 to 31_n (an example of three or more cell converters) using control signals Sg1 to Sg4 generated using carrier signals having the same phase so that the maximum voltages that the non-single cell converter and the redundant cell converter can output are lower than the rated voltage of the single cell converter.

[0049] Furthermore, if a bypass request is issued to any of the non-single cell converters and redundant cell converters associated with carrier signals having the same phase, the cell converter for which the bypass request was issued will no longer output a voltage. In this case, the number R in equation (3) is reduced by the number of cell converters for which the bypass request was issued. Therefore, the remaining cell converters among the non-single cell converters and redundant cell converters associated with carrier signals having the same phase are adjusted so that their output voltages Vk increase.

[0050] That is, the control unit 5 issues an output voltage command for the output voltage of the single-phase cluster 3 as Vio * The output voltage command Vddk obtained by dividing by the number M of main cell converters and the number R of cell converters related to the carrier signal of the same phase (a value smaller than the number R before the bypass request) * Then, control signals Sg1 to Sg4 are generated to control the single cell converter so that the output voltage of the single cell converter can follow the control signal Sg1 to Sg4.

[0051] In this way, when the bypass switch 302 controlled to the conductive state is included in the non-single cell converter and the redundant cell converter (an example of at least two cell converters), the control unit 5 controls the output voltage command Vddk so that the maximum voltage that can be output by the non-single cell converter and the redundant cell converter having the bypass switch 302 controlled to the non-conductive state is higher than the maximum voltage set when all of the bypass switches 302 are controlled to the non-conductive state, within a range that does not exceed the rated voltage of the single cell converter. * Set.

[0052] Thus, the output voltage command Vddk * By setting the above, when the bypass switch 302 controlled to the conductive state is included in the non-single cell converter and redundant cell converter (an example of at least two cell converters), the control unit 5 can set the maximum voltage that can be output by the non-single cell converter and redundant cell converter having the bypass switch 302 controlled to the non-conductive state to be higher than the maximum voltage set when all of the bypass switches 302 are controlled to the non-conductive state, within a range that does not exceed the rated voltage of the single cell converter.

[0053] As a result, even if at least one of the redundant cell converters and the non-single cell converters associated with the same phase carrier signal fails, the remaining cell converters can compensate for the voltage output by the failed cell converter. Therefore, even if at least one of the redundant cell converters and the non-single cell converters fails, the power conversion device 1 can maintain the rated voltage of the AC voltage Vio output by the single-phase cluster 3. Furthermore, in this case, at least one of the redundant cell converters and the non-single cell converters associated with the same phase carrier signal continues to operate, so there is no change in the carrier signal used in the power conversion device 1 before and after the bypass request. Therefore, the power conversion device 1 does not need to change the calculation cycle of the voltage command, and can quickly restart or continue operation without interruption.

[0054] Furthermore, when a bypass request is made to an individual cell converter, the control unit 5 limits the output of the control signals Sg1 to Sg4 for controlling the individual cell converter so that the individual cell converter that has made the bypass request will not output power. In this case, as will be described in detail later, the control unit 5 controls the output voltage command Vddk for the output voltage Vk of either the non-individual cell converter or the redundant cell converter that is paired with the individual cell converter so that the output voltage Vk increases. * Furthermore, the control unit 5 changes the phase of the carrier signal for generating the control signals Sg1 to Sg4 of the cell converters that increase the output voltage Vk among the non-single cell converters and redundant cell converters to the phase of the carrier signal for generating the control signal of the single cell converter that has requested bypass.

[0055] In other words, the control unit 5 controls all of the bypass switches 302 provided in the non-single cell converters and redundant cell converters (an example of a first cell converter which is at least two cell converters) controlled by control signals Sg1 to Sg4 generated using a first carrier signal which is a carrier signal having the same phase as each other to a non-conductive state, and controls at least one of the bypass switches 302 provided in the single cell converters (an example of a second cell converter which is one or more remaining cell converters) controlled by control signals Sg1 to Sg4 generated using one or more second carrier signals which have a different phase from the first carrier signal to a conductive state.

[0056] In this case, the control unit 5 changes the phase of the first carrier signal to the same phase as the phase of the second carrier signal used to generate the control signals Sg1 to Sg4 that control the single cell converter that controls the bypass switch 302 to be in a conductive state. Furthermore, the control unit 5 controls the output voltage command Vddk so that the maximum voltage that can be output by the non-single cell converter and the redundant cell converter is higher than the maximum voltage set before the change in the phase of the first carrier signal, within a range that does not exceed the rated voltage. * Set.

[0057] In this way, the output voltage command Vddk *By setting the maximum voltage that can be output by the non-single cell converter and the redundant cell converter, the control unit 5 can set the maximum voltage that can be output by the non-single cell converter and the redundant cell converter to be higher than the maximum voltage set before changing the phase of the first carrier signal, within a range that does not exceed the rated voltage.

[0058] In this way, the control unit 5 can control the cell converter 31_k so that the AC voltage Vio output by the single-phase cluster 3 is maintained at the rated voltage before and after the bypass request, regardless of whether a bypass request is made to either the bypass switch 302 provided in the non-single-cell converter or the redundant cell converter associated with carrier signals having the same phase, or whether a bypass request is made to the bypass switch 302 provided in the single-cell converter. Furthermore, the control unit 5 can control the cell converter 31_k without changing the carrier signal used before and after the bypass request. Therefore, the power conversion device 1 can be quickly restarted or continue operation without interruption without needing to change the calculation cycle of the voltage command.

[0059] The number R of cell converters related to carrier signals of the same phase decreases when a bypass request is made to at least one of the bypass switches 302 provided in the redundant cell converter and the primary cell converter paired with that cell converter (for example, when a cell converter fails). Hereinafter, the primary cell converter paired with the redundant cell converter may be referred to as a "non-single cell converter." Furthermore, the number R increases when a request to cancel the bypass request is made to at least one of the bypass switches 302 (for example, when a cell converter is restored). Therefore, the number R is a variable that increases or decreases depending on the state of the paired redundant cell converter and primary cell converter.

[0060] 1, when the cell converter 31_1 fails, the cell converter 31_1 outputs a fault information signal Sb1 to the control unit 5. When the cell converter 31_i fails, the cell converter 31_i outputs a fault information signal Sbi (i is a natural number from 2 to n-1) to the control unit 5. When the cell converter 31_n fails, the cell converter 31_n outputs a fault information signal Sbn to the control unit 5. An example of a fault in the cell converters 31_1 to 31_n is a fault in which at least one of the semiconductor switches Q1 to Q4 remains in a short-circuited state or an open-circuited state regardless of the voltage levels of the input control signals Sg1 to Sg4.

[0061] The power conversion device 1 is configured so that the drain-source voltages of the semiconductor switches Q1 to Q4 and the DC voltages Vc1, Vc2, . . . , Vcm, . . . , Vcn of the capacitor C are input to the control unit 5 from the cell converters 31_1, 31_2, . . . , 31_m, . . . , 31_n. The control unit 5 may use these drain-source voltages as fault information signals Sb1, Sb2, . . . , Sbm, . . . , Sbn. In this case, the control unit 5 determines whether the degree of coincidence between the drain-source voltages of the semiconductor switches Q1 to Q4 obtained by control based on the control signals Sg1 to Sg4 and the drain-source voltages input from the cell converters 31_1 to 31_n satisfies a specified value. The control unit 5 determines that a semiconductor switch that outputs a drain-source voltage that does not satisfy the specified value has failed, and identifies the cell converter having that semiconductor switch as the failed cell converter (faulty cell converter).

[0062] Furthermore, the control unit 5 may use the DC voltages Vc1 to Vcn of the capacitors C as the fault information signals Sb1 to Sbn. In this case, the control unit 5 determines whether the degree of coincidence between the command value of the DC voltage of the capacitor C provided in each of the cell converters 31_1 to 31_n and the DC voltages Vc1 to Vcn input from each of the cell converters 31_1 to 31_n satisfies a specified value. The control unit 5 determines that a capacitor with a DC voltage that does not satisfy the specified value has failed, and recognizes the cell converter having that capacitor as a faulty cell converter.

[0063] Next, the configuration of the main part of the control unit 5 (the configuration related to the generation of the control signals Sg1 to Sg4) will be described using FIG. 2 while also referring to FIG.

[0064] As shown in FIG. 2, the control unit 5 outputs an output voltage command Vio that causes the AC voltage Vio of the single-phase cluster 3 to follow the * Although detailed description will be omitted, the voltage command generation unit 54 generates an output voltage command Vio based on the DC voltages Vc1 to Vcn of the capacitors C provided in the cell converters 31_1 to 31_n, the current flowing in the single-phase cluster 3, and the AC voltage Vs of the system AC power supply 9. * Generate.

[0065] As shown in FIG. 2, the control unit 5 controls the output voltage command Vio * The divider 53 divides the output voltage command Vio input from the voltage command generator 54 to cause the AC voltage Vio output by the single-phase cluster 3 to follow the output voltage command Vio. * is divided by the number of carrier signals Ctn to obtain the output voltage command Viod * Therefore, the output voltage Vk output from the cell converter 31_k decreases as the number Ctn of carrier signals used to generate the control signals Sg1 to Sg4 (i.e., the number M of main cell converters) increases. * The maximum value of is the rated voltage of the single cell converter.

[0066] 2, the control unit 5 has a switching signal generation unit 55 that generates switching signals Ssd1 to Ssdn for controlling the bypass switches 302 provided in the cell converters 31_1 to 31_n. Although a detailed description will be omitted, the switching signal generation unit 55 generates the switching signals Ssd1 to Ssdn based on the failure information signals Sb1 to Sbn input from the cell converters 31_1 to 31_n. When the switching signal generation unit 55 receives a failure information signal Sbk (k is a natural number from 1 to n) indicating that the cell converter 31_k has failed, it generates a switching signal Ssdk for controlling the bypass switch 302 provided in the cell converter 31_k to a conductive state (for example, a high voltage level). On the other hand, when the fault information signal Sbk indicating that the cell converter 31_k is not faulty is input, the switching signal generation unit 55 generates a switching signal Ssdk for controlling the bypass switch 302 provided in the cell converter 31_k to a non-conductive state (for example, a low voltage level). The switching signal generation unit 55 outputs the generated switching signal Ssdk to the cell converter 31_k and the control signal adjustment unit 52 (details of which will be described later).

[0067] 2, the control unit 5 has a control signal adjuster 52 that adjusts the output of control signals Sg1 to Sg4 generated by a control signal generator 51_k (details of which will be described later). The control signal adjuster 52 generates, based on a switching signal Ssdk input from a switching signal generator 55, number information RIk including the number Rk (k is a natural number from 1 to n) of cell converters associated with carrier signals of the same phase, phase information PIk (k is a natural number from 1 to n) of the carrier signal, and an output control signal SFk. The control signal adjuster 52 outputs the generated number information RIk, phase information PIk, and output control signal SFk to the control signal generator 51_k.

[0068] Information on the cell converters that function as single cell converters, information on the cell converters that function as non-single cell converters, and information on the cell converters that function as redundant cell converters among the cell converters 31_k is preset in the control signal adjustment unit 52. Furthermore, information on the non-single cell converters and redundant cell converters that are controlled by control signals Sg1 to Sg4 that are generated using carrier signals that have the same phase (i.e., information on pairs of non-single cell converters and redundant cell converters) is preset in the control signal adjustment unit 52.

[0069] The control signal adjuster 52 determines whether to maintain the current control of the cell converter 31_k or to change the maximum voltage of the output voltage Vk of any of the cell converters 31_k and, if necessary, change the phase of the carrier signal related to that cell converter 31_k, based on, for example, the voltage level of the switching signal Ssdk input from the switching signal generator 55. The control signal adjuster 52 outputs number information RIk, phase information PIk, and output control signal SFk generated based on the determination result to the control signal generator 51_k.

[0070] As shown in Fig. 2, the control unit 5 has a control signal generation unit 51_k (k is a natural number from 1 to n) that generates control signals Sg1 to Sg4 to control each of the cell converters 31_k. Fig. 2 shows the following among the cell converters 31_k: a control signal generation unit 51_1 that generates control signals Sg1 to Sg4 to control the cell converter 31_1 (see Fig. 1), a control signal generation unit 51_2 that generates control signals Sg1 to Sg4 to control the cell converter 31_2 (see Fig. 1), a control signal generation unit 51_m that generates control signals Sg1 to Sg4 to control the cell converter 31_m (see Fig. 1), and a control signal generation unit 51_n that generates control signals Sg1 to Sg4 to control the cell converter 31_n (see Fig. 1).

[0071] 2, control signal generation unit 51_k includes a divider 511 connected to divider 53 and control signal adjustment unit 52, an inverter circuit 515 connected to divider 511, and a carrier signal generation unit 512 connected to control signal adjustment unit 52. Control signal generation unit 51_k also includes a PWM calculation unit 513 connected to divider 511 and carrier signal generation unit 512, and a logical product circuit (AND gate) 514 connected to PWM calculation unit 513 and control signal adjustment unit 52. Control signal generation unit 51_k also includes a PWM calculation unit 516 connected to inverter circuit 515 and carrier signal generation unit 512, and a logical product circuit (AND gate) 517 connected to PWM calculation unit 516 and control signal adjustment unit 52.

[0072] Control signals Sg1 and Sg3 that control semiconductor switches Q1 and Q3 provided in the cell converter 31_k are generated by a division unit 511, a carrier signal generation unit 512, a PWM calculation unit 513, and a logical product circuit 514. Control signals Sg2 and Sg4 that control semiconductor switches Q2 and Q4 provided in the cell converter 31_k are generated by a division unit 511, an inverter circuit 515, a carrier signal generation unit 512, a PWM calculation unit 516, and a logical product circuit 517.

[0073] The divider 511 calculates the output voltage command Vio * is divided by the number R included in the number information RIk input from the control signal adjustment unit 52 to obtain the output voltage command Vdd * The output voltage command Vdd generated by the division unit 511 is * is obtained by dividing the output voltage command that causes the AC voltage Vio output by the single-phase cluster 3 to follow by the number of carrier signals Ctn, which is the same as the number M of main cell converters, and the number Rk of cell converters associated with carrier signals of the same phase. Therefore, the operation of the division unit 53 and the division unit 511 executes the calculation expressed by equation (3).

[0074] A plurality of carrier signals CSm with phases θm calculated based on equation (2) are set in advance in the carrier signal generation unit 512. Phase information PIk of the carrier signal input from the control signal adjustment unit 52 includes, for example, phase information. The carrier signal generation unit 512 determines the carrier signal Csm with the same phase θm as the phase included in the phase information PIk input from the control signal adjustment unit 52 as the carrier signal CSk (k is a natural number from 1 to n) for generating the control signals Sg1 to Sg4.

[0075] The PWM calculation unit 513 calculates the carrier signal CSk input from the carrier signal generation unit 512 and the output voltage command Vddk input from the division unit 511. * More specifically, the PWM calculation unit 513 generates a pulse signal based on, for example, the output voltage command Vddk * When the voltage level of the output voltage command Vddk is greater than the voltage level of the carrier signal CSk, the PWM calculation unit 513 outputs a voltage with a positive voltage level. * When the voltage level of the output voltage command Vddk is smaller than the voltage level of the carrier signal CSk, the PWM calculation unit 513 outputs a voltage whose voltage level is zero. * and a pulse signal based on the magnitude relationship between the voltage levels of the carrier signal CSk.

[0076] The logical product circuit 514 calculates the logical product of the pulse signal input from the PWM calculation unit 513 and the output control signal SFk input from the control signal adjustment unit 52, and generates control signals Sg1 and Sg3 to be input to the gate terminals of the semiconductor switches Q1 and Q3 provided in the main circuit 301 of the cell converter 31_k.

[0077] As will be described in detail later, the output control signal SFk is a signal whose voltage level is controlled to, for example, a high level when no bypass request has been made to the cell converter 31u_k (e.g., when the cell converter 31_k is not faulty). On the other hand, the output control signal SFk is a signal whose voltage level is controlled to, for example, a low level when a bypass request has been made to the cell converter 31u_k (e.g., when the cell converter 31_k is faulty). Therefore, pulse-like control signals Sg1 and Sg3 whose voltage level changes are input to the gate terminals of the semiconductor switches Q1 and Q3 provided in the cell converter 31u_k when no bypass request has been made to the cell converter 31u_k, and constant control signals Sg1 and Sg3 whose voltage level is low are input to the gate terminals of the semiconductor switches Q1 and Q3 provided in the cell converter 31u_k when a bypass request has been made to the cell converter 31u_k. Therefore, when a bypass request has been made to the cell converter 31u_k, the semiconductor switches Q1 and Q3 provided in the cell converter 31u_k are maintained in an inactive state. Therefore, the result of the PWM calculation performed by the PWM calculation unit 513 is reflected when no bypass request is made to the cell converter 31u_k.

[0078] As shown in FIG. 2, the inverter circuit 515 receives the output voltage command Vddk * Inverted signal VddkI * Output.

[0079] The PWM calculation unit 516 calculates the carrier signal CSk input from the carrier signal generation unit 512 and the inverted signal VddkI input from the inverter circuit 515. * More specifically, the PWM calculation unit 516 generates a pulse signal based on the inverted signal VddkI. * When the voltage level of the inverted signal VddkI is greater than the voltage level of the carrier signal CSk, the PWM calculation unit 516 outputs a positive voltage. * When the voltage level of the inverted signal VddkI is smaller than the voltage level of the carrier signal CSk, the PWM operation unit 516 outputs a voltage whose voltage level is zero. *and a pulse signal based on the magnitude relationship between the voltage levels of the carrier signal CSk.

[0080] The logical product circuit 517 calculates the logical product of the pulse signal input from the PWM calculation unit 516 and the output control signal SFk input from the control signal adjustment unit 52, and generates control signals Sg2 and Sg4 to be input to the gate terminals of the semiconductor switches Q2 and Q4 provided in the main circuit 301 of the cell converter 31_k.

[0081] The gate terminals of the semiconductor switches Q2 and Q4 provided in the cell converter 31u_k receive pulsed control signals Sg2 and Sg4 whose voltage levels change when no bypass request has been made to the cell converter 31u_k (e.g., the cell converter 31_k is not faulty), and receive constant low-level control signals Sg2 and Sg4 when a bypass request has been made to the cell converter 31u_k (e.g., the cell converter 31_k is faulty). Therefore, when a bypass request has been made to the cell converter 31u_k, the semiconductor switches Q2 and Q4 provided in the cell converter 31u_k are maintained in an inactive state. Therefore, the results of the PWM calculation by the PWM calculation unit 516 are reflected when no bypass request has been made to the cell converter 31u_k.

[0082] (Operation of power conversion device) Next, the operation of the power conversion device 1 according to this embodiment will be described using Figures 3 to 5 with reference to Figures 1 and 2. Hereinafter, the operation of the power conversion device 1 will be described taking as an example a case where the single-phase cluster 3 has three cell converters 31_1, 31_2, 31_3 (n=3) connected in series.

[0083] (normal operation) First, a normal operation of the power conversion device 1 when, for example, none of the cell converters 31_1, 31_2, and 31_3 has failed and no bypass request is issued to the cell converters 31_1, 31_2, and 31_3 will be described using FIG. 3 with reference to FIGS.

[0084] [Table 1]

[0085] Table 1 shows the initial state of the power conversion device 1. "Cell converter" in Table 1 represents the cell converters 31_1, 31_2, and 31_3 provided in the single-phase cluster 3 of the power conversion device 1. The numbers "31_1," "31_1," and "31_3" shown in the "Cell converter" column in Table 1 represent the reference symbols of the cell converters 31_1, 31_2, and 31_3.

[0086] "Carrier signal" in Table 1 represents the carrier signal used in the power conversion device 1. The "Carrier signal" column is divided into two sections: "Reference symbol" and "Phase [°]." "Reference symbol" in Table 1 represents the type of carrier signal used in the power conversion device 1, and "Phase [°]" in Table 1 represents the phase of the carrier signal in its initial state (initial phase). The symbols "CS1," "CS2," and "CS3" shown in the "Reference symbol" column in Table 1 represent the reference symbols of carrier signals CS1, CS2, and CS3.

[0087] "Output voltage command [%]" in Table 1 is the output voltage command Vdd1 of each of the cell converters 31_1, 31_2, and 31_3. * ,Vdd2 * ,Vdd3 * The "Output voltage command [%]" column shows the output voltage command Vdd1 of the cell converters 31_1, 31_2, and 31_3. * ,Vdd2 * ,Vdd3 * The output voltage command Vio is used to track the AC voltage Vio output from the single-phase cluster 3. * The "output voltage command [%]" column indicates the percentage in the initial state of the power conversion device 1.

[0088] In Table 1, "Output voltage [%]" represents the output voltages V1, V2, and V3 of the cell converters 31_1, 31_2, and 31_3, respectively. The "Output voltage [%]" column shows the output voltages V1, V2, and V3 of the cell converters 31_1, 31_2, and 31_3 as a percentage of the AC voltage Vio output from the single-phase cluster 3. The "Output voltage [%]" column also shows the percentage in the initial state of the power conversion device 1.

[0089] As shown in Table 1, the cell converter 31_1 (see FIG. 1) is controlled by control signals Sg1 to Sg4 (see FIG. 1) that are generated using a carrier signal CS1 with a phase of 0°. In addition, the cell converter 31_1 is set to be controlled by the control unit 5 so that, in the initial state of the power conversion device 1, the output voltage V1 is 50% of the AC voltage Vio output by the single-phase cluster 3.

[0090] The cell converter 31_2 (see FIG. 1) is controlled by control signals Sg1 to Sg4 (see FIG. 1) that are generated using a carrier signal CS2 that has a phase of 90° relative to the phase of the carrier signal CS1. In addition, the cell converter 31_2 is set to be controlled by the control unit 5 so that, in the initial state of the power conversion device 1, the output voltage V2 is 25% of the AC voltage Vio output by the single-phase cluster 3.

[0091] The cell converter 31_3 (see FIG. 1) is controlled by control signals Sg1 to Sg4 (see FIG. 1) generated using a carrier signal CS3 whose phase is 90° relative to the phase of the carrier signal CS1. Therefore, the carrier signal CS2 related to the cell converter 31_2 and the carrier signal CS3 related to the cell converter 31_3 have the same initial phase. Furthermore, the cell converter 31_3 is set to be controlled by the control unit 5 so that, in the initial state of the power conversion device 1, the output voltage V2 is 25% of the AC voltage Vio output by the single-phase cluster 3.

[0092] In the initial state of the power conversion device 1, the cell converters 31_1, 31_2, and 31_3 are set as described above, so in this operation example, the cell converter 31_1 functions as an isolated cell converter, the cell converter 31_2 functions as a non-isolated cell converter, and the cell converter 31_3 functions as a redundant cell converter. Also, in this operation example, the cell converters 31_1 and 31_2 function as primary cell converters. Therefore, the control unit 5 sets "2" as the number Ctn of carrier signals, which is the same as the number M of primary cell converters.

[0093] When no failure or the like occurs in any of the cell converters 31_1, 31_2, 31_3 and no bypass request is made (i.e., when the power conversion device 1 is operating normally), failure information signals Sb1, Sb2, Sb3 (see FIGS. 1 and 2) indicating that the cell converters 31_1, 31_2, 31_3 are not faulty are input to the switching signal generation unit 55 (see FIG. 2) provided in the control unit 5. Therefore, the switching signal generation unit 55 outputs switching signals Ssd1, Ssd2, Ssd3 to the cell converters 31_1, 31_2, 31_3 and the control signal adjustment unit 52 (see FIG. 2) to maintain the bypass switches 302 provided in the cell converters 31_1, 31_2, 31_3 in a non-conductive state, respectively.

[0094] The control signal adjustment unit 52 continues to output the same number information RI1, RI2, RI3, phase information PI1, PI2, PI3 and output control signals SF1, SF2, SF3 as in the initial state of the power conversion device 1 based on, for example, the voltage levels of the switching signals Ssd1, Ssd2, Ssd3 input from the switching signal generation unit 55.

[0095] Therefore, the control signal generating unit 51_1 receives, from the control signal adjusting unit 52, number information RI1 including information of "1" as the number R1 of cell converters related to carrier signals of the same phase, phase information PI1 including information of 0°, and an output control signal SF1 indicating that no bypass request has been made. *The output voltage command Vdd1 corresponds to 50% of the voltage value of * Based on this, the control signals Sg1 to Sg4 for controlling the cell converter 31_1 are generated, and the generated control signals Sg1 to Sg4 are output to the cell converter 31_1.

[0096] Further, the control signal generating unit 51_2 receives, from the control signal adjusting unit 52, number information RI2 including information of "2" as the number R2 of cell converters related to carrier signals of the same phase, phase information PI2 including information of 90°, and an output control signal SF2 indicating that no bypass request has been made. As a result, the control signal generating unit 51_2 adjusts the output voltage command Vio output by the voltage command generating unit 54. * The output voltage command Vdd2 corresponds to 25% of the voltage value of * Based on this, the control signals Sg1 to Sg4 for controlling the cell converter 31_2 are generated, and the generated control signals Sg1 to Sg4 are output to the cell converter 31_2.

[0097] Further, the control signal generating unit 51_3 receives, from the control signal adjusting unit 52, number information RI3 including information of "2" as the number R3 of cell converters related to carrier signals of the same phase, phase information PI3 including information of 90°, and an output control signal SF3 indicating that no bypass request has been made. As a result, the control signal generating unit 51_3 adjusts the output voltage command Vio output by the voltage command generating unit 54. * The output voltage command Vdd3 corresponds to 25% of the voltage value of * Based on this, the control signals Sg1 to Sg4 for controlling the cell converter 31_3 are generated, and the generated control signals Sg1 to Sg4 are output to the cell converter 31_3.

[0098] FIG. 3 is a diagram showing an example of operating waveforms during normal operation of the power conversion device 1 set to the state shown in Table 1. The first row in FIG. 3 shows the voltage waveforms of the output voltage commands and the voltage waveform of the carrier signal of the cell converters 31_1, 31_2, and 31_3. The "output voltage command" in the first row in FIG. 3 shows the output voltage command that causes the output voltages V1, V2, and V3 of the cell converters 31_1, 31_2, and 31_3 to follow. The "carrier signal" in the first row in FIG. 3 shows the carrier signal related to the cell converters 31_1, 31_2, and 31_3. The "Vdd1" shown in the first row in FIG. 3 * " represents the voltage waveform of the output voltage command that makes the output voltage V1 of the cell converter 31_1 follow. "Vdd2 * " represents the voltage waveform of the output voltage command that causes the output voltage V2 of the cell converter 31_2 to follow. * " represents the voltage waveform of the output voltage command that causes the output voltage V3 of the cell converter 31_3 to follow. * " is the output voltage command Vdd1I * The voltage waveform of the inverted signal with the polarity of VddI2 * " is the output voltage command Vdd2I * The voltage waveform of the inverted signal with the polarity of VddI3 * " is the output voltage command Vdd3I * 10 shows the voltage waveform of an inverted signal in which the polarity of the signal is inverted.

[0099] "CS1" shown in the first row of Fig. 3 represents the voltage waveform of the carrier signal CS1 used to generate the control signals Sg1 to Sg4 that control the cell converter 31u_1. "CS2" shown in the first row of Fig. 3 represents the voltage waveform of the carrier signal CS2 used to generate the control signals Sg1 to Sg4 that control the cell converter 31_2. "CS3" shown in the first row of Fig. 3 represents the voltage waveform of the carrier signal CS3 used to generate the control signals Sg1 to Sg4 that control the cell converter 31u_3.

[0100] "Tc" in Fig. 3 indicates the calculation timing at which the single-phase cluster 3 (i.e., the cell converters 31_1, 31_2, 31_3) calculates an output voltage command to be followed by the voltage input / output between the single-phase cluster 3 (i.e., the cell converters 31_1, 31_2, 31_3) and the system AC power supply 9 (see Fig. 1). "Pc" in Fig. 3 indicates the calculation cycle at which the output voltage command is calculated. In Fig. 3, the reference symbol "Tc" is assigned to one calculation timing among the multiple calculation timings indicated by the thick downward arrows in Fig. 3, and the reference symbol "Pc" is assigned to one calculation cycle among the multiple calculation cycles indicated by the two-way arrows in Fig. 3.

[0101] "Output voltage V1" in the second row of FIG. 3 indicates the output voltage V1 output by the cell converter 31u_1. The second row of FIG. 3 shows the voltage waveform of the output voltage V1. "Output voltage V2" in the third row of FIG. 3 indicates the output voltage V2 output by the cell converter 31_2. The third row of FIG. 3 shows the voltage waveform of the output voltage V2. "Output voltage V3" in the fourth row of FIG. 3 indicates the output voltage V3 output by the cell converter 31u_3. The third row of FIG. 3 shows the voltage waveform of the output voltage V3. "AC voltage Vio" in the fifth row of FIG. 3 indicates the AC voltage Vio output by the single-phase cluster 3. The fifth row of FIG. 3 shows the voltage waveform of the AC voltage Vio.

[0102] As shown in Figure 3, the output voltage command Vio * (not shown in FIG. 3) and output voltage command Vdd1 * ,Vdd2 * ,Vdd3 * The calculation timing Tc for calculating Pc is the timing when the voltages of the carrier signals CS1, CS2, and CS3 reach their maximums (peaks) and minimums (troughs). If one cycle of the carrier signals CS1, CS2, and CS3 is defined as "1," then the frequency fc of the carrier signals CS1, CS2, and CS3 is "1." In this example of operation, the number M of main cell converters is "2," so the calculation cycle Pc is "4." Therefore, as shown in FIG. 3, the calculation cycle Pc is 1 / 4 of one cycle of the carrier signals CS1, CS2, and CS3.

[0103] An output voltage command Vdd1 that causes the output voltage V1 output by the cell converter 31_1 to follow * is the output voltage command Viod output from the division unit 53 * The divider 511 divides by "1" to obtain the output voltage command Vdd2 that makes the output voltages V2 and V3 output from the cell converters 31_2 and 31_3 follow the output voltage command Vdd2. * ,Vdd3 * is the output voltage command Viod output from the division unit 53 * is obtained by dividing by the number of cell converters related to the carrier signals of the same phase ("2" in this operation example) by the divider 511. Therefore, as shown in the first row of FIG. 3, the output voltage command Vdd2 of the cell converters 31_2 and 31_3 * ,Vdd3 * The amplitude of the output voltage command Vdd1 of the cell converter 31_1 * The amplitude of

[0104] The cell converter 31_1 receives an output voltage command Vdd1 shown in the first row of FIG. * and control signals Sg1 to Sg4 (not shown in FIG. 3) generated by a control signal generation unit 51_1 using a triangular wave carrier signal CS1 are input. Semiconductor switches Q1, Q2, Q3, and Q4 (see FIG. 1) provided in the cell converter 31_1 are controlled by the control signals Sg1 to Sg4 input from the control signal generation unit 51_1. As a result, as shown in the second row of FIG. 3, the cell converter 31_1 outputs an AC output voltage V1 corresponding to a voltage value that is 50% of the voltage value of the AC voltage Vio output by the single-phase cluster 3.

[0105] The cell converter 31_2 is supplied with an output voltage command Vdd2 shown in the first row of FIG. *and a triangular wave carrier signal CS2 are used to generate control signals Sg1 to Sg4 (not shown in FIG. 3) generated by a control signal generation unit 51_2. The semiconductor switches Q1, Q2, Q3, and Q4 (see FIG. 1) provided in the cell converter 31_2 are controlled by the control signals Sg1 to Sg4 input from the control signal generation unit 51_2. As a result, as shown in the third row in FIG. 3, the cell converter 31_2 outputs an AC output voltage V2 corresponding to a voltage value that is 25% of the voltage value of the AC voltage Vio output by the single-phase cluster 3.

[0106] The cell converter 31_3 is supplied with an output voltage command Vdd3 shown in the first row of FIG. * and a triangular wave carrier signal CS3 are used to input control signals Sg1 to Sg4 (not shown in FIG. 3) generated by a control signal generation unit 51_3. Semiconductor switches Q1, Q2, Q3, and Q4 (see FIG. 1) provided in the cell converter 31_3 are controlled by the control signals Sg1 to Sg4 input from the control signal generation unit 51_3. As a result, as shown in the fourth row in FIG. 3, the cell converter 31_3 outputs an AC output voltage V3 corresponding to a voltage value that is 25% of the voltage value of the AC voltage Vio output by the single-phase cluster 3.

[0107] 3, the AC voltage Vio output by the single-phase cluster 3 is a voltage obtained by adding up the output voltages V1, V2, and V3 output by the cell converters 31_1, 31_2, and 31_3. Therefore, the maximum amplitude of the AC voltage Vio during normal operation of the power conversion device 1 is twice the maximum amplitude (rated voltage) of the output voltage V1 of the cell converter 31_1, and four times the maximum amplitude (half the rated voltage) of each of the output voltages V2 and V3 of the cell converters 31_2 and 31_3.

[0108] In this embodiment, the maximum voltage that can be output by the single cell converter is set to the rated voltage. Therefore, in this operation example, the maximum output voltage V1 output by the cell converter 31_1 functioning as a single cell converter is equal to the rated voltage. On the other hand, the maximum voltage that can be output by the cell converter 31_2 functioning as a non-single cell converter and the cell converter 31_3 functioning as a redundant cell converter is limited by the control unit 5 to half that of the cell converter 31_1.

[0109] Specifically, the control unit 5 determines the output voltage command Viod based on the number information RI2 including the information "2" as the number R2 of cell converters related to carrier signals of the same phase. * The output voltage command Viod * corresponds to a command value for causing the output voltages V1 to V3 output by the individual cell converters to follow each other. Therefore, the control unit 5 sets the voltage value of the maximum voltage that can be output by the cell converters 31_2 and 31_3 to a value obtained by dividing the voltage values ​​of the rated voltages of the output voltages V1 to V3 output by the cell converters 31_1 to 31_3 by the number of cell converters 31_2 and 31_3 (an example of at least two cell converters). As a result, although the cell converters 31_2 and 31_3 can output up to the same voltage as the maximum voltage of the cell converter 31_1, the maximum voltage that can be output is limited to half that of the cell converter 31_1.

[0110] (Operation of the power conversion device when a bypass request is made to a non-single cell converter or a redundant cell converter) Next, the operation of the power conversion device 1 when, for example, a failure occurs in the cell converter 31_2 and a bypass request is made to the cell converter 31_2 while the power conversion device 1 is operating in the state shown in Table 1 will be explained using Figure 4 with reference to Figures 1 to 3.

[0111] [Table 2]

[0112] Table 2 shows the state of the power conversion device 1 when the cell converter 31_2 functioning as a non-single cell converter fails. The items in Table 2, such as "cell converter," have the same contents as the items in Table 1, such as "cell converter," and therefore their explanations will be omitted. The symbol "-" in Table 2 indicates that the cell converter 31_2 does not contribute to the input / output of power between the single-phase cluster 3 and the system AC power supply 9. In other words, in this operation example, the cell converter 31_2 does not contribute to the input / output of power between the system AC power supply 9.

[0113] When a failure occurs in the cell converter 31_2, a failure information signal Sb2 indicating that a failure has occurred in the cell converter 31_2 and failure information signals Sb1 and Sb3 indicating that no failure has occurred in the cell converters 31_1 and 31_3 are input to the switching signal generation unit 55. Therefore, the switching signal generation unit 55 maintains each of the bypass switches 302 provided in the cell converters 31_1 and 31_3 in a non-conductive state, and outputs switching signals Ssd1, Ssd2, and Ssd3 to the cell converters 31_1, 31_2, and 31_3 and the control signal adjustment unit 52 to change the bypass switch 302 provided in the cell converter 31_2 to a conductive state.

[0114] The control signal adjuster 52 outputs to the control signal generator 51_1 the number information RI1, phase information PI1 and output control signal SF1 that are the same as those in the initial state of the power conversion device 1, based on, for example, the voltage level of the switching signal Ssd1 input from the switching signal generator 55.

[0115] The control signal adjuster 52 determines that a failure has occurred in the cell converter 31_2 functioning as a non-single cell converter, based on, for example, the voltage level of the switching signal Ssd2 input from the switching signal generator 55. For this reason, the control signal adjuster 52 outputs number information RI2, RI3, phase information PI2, PI3, and output control signals SF2, SF3 that are partially different from the initial state of the power conversion device 1.

[0116] Specifically, the control signal adjuster 52 outputs to the control signal generator 51_2 the number information RI2 and phase information PI2 that are the same as those in the initial state of the power conversion device 1, and an output control signal SF2 (for example, the output control signal SF2 having a low voltage level) indicating that a bypass request has been made. The control signals Sg1 to Sg4 output from the control signal generator 51_2 are forced to have a constant low voltage level by the output control signal SF2. For this reason, the information included in the number information RI2 and phase information PI2 input from the control signal adjuster 52 to the control signal generator 51_2 in this case is arbitrary as long as the number R2 included in the number information RI2 is not "0".

[0117] The control signal adjustment unit 52 outputs to the control signal generation unit 51_3 number information RI3 including information of "1" as the number R3 of cell converters related to carrier signals of the same phase, phase information PI3 that is the same as the initial state of the power conversion device 1, and an output control signal SF3.

[0118] Therefore, the control signal generating unit 51_1 operates in the same manner as in the initial state of the power conversion device 1, and outputs pulse-like control signals Sg1 to Sg4 to the cell converter 31_1. Furthermore, the control signal generating unit 51_2 outputs control signals Sg1 to Sg4 whose voltage levels are constantly low to the cell converter 31_2.

[0119] As described above, the control signal generating unit 51_3 receives the number information RI3 including the information of "1" as the number R3 of cell converters related to carrier signals of the same phase, the phase information PI3 including the information of 90°, and the output control signal SF3 indicating that no bypass request is made from the control signal adjusting unit 52. As a result, the control signal generating unit 51_3 adjusts the output voltage command Vio output by the voltage command generating unit 54. * Output voltage command Vdd3 corresponds to a voltage value that is 50% of the voltage value of * Based on this, the control signals Sg1 to Sg4 for controlling the cell converter 31_3 are generated, and the generated control signals Sg1 to Sg4 are output to the cell converter 31_3.

[0120] Fig. 4 is a diagram showing an example of operating waveforms during operation of the power conversion device 1 when a bypass request is made to the cell converter 31_2 (in this example, when a failure occurs in the cell converter 31_2). The various symbols shown in Fig. 4 have the same meaning as the various symbols shown in Fig. 3, and therefore their explanation will be omitted.

[0121] As shown in Figure 4, the output voltage command Vio * (not shown in FIG. 4) and output voltage command Vdd1 * ,Vdd3 * The calculation timing Tc for calculating the above is the timing when the voltages of the carrier signals CS1 and CS3 reach their maximum (peak) and minimum (trough) respectively. Even if the cell converter 31_2 fails, the phase of the carrier signal CS3 does not change. Therefore, as shown in Figures 3 and 4, the calculation timing Tc and calculation period Pc do not change before and after the failure of the cell converter 31_2.

[0122] The control signal generator 51_1 operates in the same manner before and after the failure of the cell converter 31_2. For this reason, as shown in the first row of FIG. 4, the output voltage command Vdd1 that causes the output voltage V1 output by the cell converter 31_1 to follow the * The voltage waveforms before and after the failure of the cell converter 31_2 are the same.

[0123] On the other hand, when a failure occurs in the cell converter 31_2, the control signal generating unit 51_3 reduces the output voltage command Viod output from the dividing unit 53. * is divided by "1" in the division unit 511, the output voltage command Vdd3 that makes the output voltage V3 output by the cell converter 31_3 follow * Therefore, as shown in the first row of FIG. 4, the output voltage command Vdd3 output from the divider 511 provided in the control signal generator 51_3 is calculated. * The amplitude of the output voltage command Vdd1 is twice as large as that before the failure occurred in the cell converter 31_2 (see the first row in FIG. 3). * has the same amplitude as

[0124] The control signals Sg1 to Sg4 input to the cell converter 31_1 remain unchanged before and after the failure of the cell converter 31_2. Therefore, as shown in the second row of Fig. 4, the cell converter 31_1 outputs an AC output voltage V1 that corresponds to 50% of the voltage value of the AC voltage Vio output by the single-phase cluster 3.

[0125] Control signals Sg1 to Sg4 with constant low voltage levels are input to the cell converter 31_2. As a result, the semiconductor switches Q1, Q2, Q3, and Q4 provided in the cell converter 31_2 do not operate, and the cell converter 31_2 is in a non-operating state. Furthermore, the bypass switch 302 provided in the cell converter 31_2 is in a conducting state. As a result, as shown in the third row of FIG. 4, the cell converter 31_2 is in a state equivalent to outputting a constant 0V output voltage V2.

[0126] The cell converter 31_3 is supplied with an output voltage command Vdd3 shown in the first row of FIG. * and a triangular wave carrier signal CS3, and control signals Sg1 to Sg4 generated by a control signal generation unit 51_3 are input. The semiconductor switches Q1, Q2, Q3, and Q4 provided in the cell converter 31_3 are controlled by the control signals Sg1 to Sg4 input from the control signal generation unit 51_3. As a result, as shown in the fourth row of FIG. 4, the cell converter 31_3 outputs an AC output voltage V3 corresponding to a voltage value that is 50% of the voltage value of the AC voltage Vio output by the single-phase cluster 3. The output voltage V3 when a failure occurs in the cell converter 31_2 is twice the output voltage V3 when no failure occurs in the cell converter 31_2.

[0127] As shown in the fifth row of FIG. 4, the AC voltage Vio output by the single-phase cluster 3 is the sum of the output voltages V1, V2, and V3 output by the cell converters 31_1, 31_2, and 31_3. If a failure occurs in the cell converter 31_2, the voltage value of the output voltage V3 doubles. Therefore, the maximum amplitude of the AC voltage Vio remains unchanged before and after the failure of the cell converter 31_2. Furthermore, if a failure occurs in the cell converter 31_2, the maximum amplitude of the AC voltage Vio of the single-phase cluster 3 becomes twice the maximum amplitude (rated voltage) of the output voltages V1 and V3 of the cell converters 31_1 and 31_3.

[0128] In this embodiment, the maximum voltage that can be output by the single cell converter is set to the rated voltage. Therefore, in this operation example, the maximum output voltage V1 output by the cell converter 31_1 functioning as a single cell converter is equal to the rated voltage. On the other hand, the cell converter 31_3 functioning as a redundant cell converter needs to cover the contribution of the output voltage V2 of the cell converter 31_2 to the AC voltage Vio of the single-phase cluster 3 when a failure occurs in the paired cell converter 31_2. Therefore, when a failure occurs in the cell converter 31_2, the maximum output voltage V3 output by the cell converter 31_3 is equal to the maximum voltage (rated voltage) that can be output by the single cell converter.

[0129] Specifically, when a bypass request is made to the cell converter 31_2 (for example, when a failure occurs in the cell converter 31_2), the control unit 5 sets the output voltage command Viod to the cell converter 31_2 based on the number information RI3 including the information "1" as the number R3 of cell converters related to the carrier signal of the same phase. * The output voltage command Viod *corresponds to a command value for causing the output voltage output by the individual cell converter to follow. Therefore, when the bypass switch 302 controlled to the conductive state is included in the cell converter 31_2 and the cell converter 31_3 (an example of at least two cell converters), the control unit 5 sets the maximum voltage (maximum value of the output voltage V3) that can be output by at least two cell converters (cell converter 31_3 in this operation example) having the bypass switch 302 controlled to the non-conductive state higher than the maximum voltage (maximum value of the output voltage V3) set when all of the bypass switches 302 are controlled to the non-conductive state (for example, when no failure occurs in the cell converter 31_2), within a range that does not exceed the rated voltage of the individual cell converter.

[0130] In this operation example, a case where a bypass request is made to the cell converter 31_2 functioning as a non-single cell converter is described, but the power conversion device 1 can also operate in the same manner when a bypass request is made to the cell converter 31_3 functioning as a redundant cell converter.

[0131] Now, suppose that after a cell converter fails, the carrier signal is rearranged at equal time intervals to match the number of healthy cell converters. The timing for updating the voltage command for the cell converter's output voltage is set to the maximum and minimum amplitudes (peaks and valleys) of the carrier signal. Rearranging the carrier signal also changes the timing for updating the voltage command for the cell converter's output voltage. Therefore, it is necessary to change the calculation cycle for the voltage command for the cell converter's output voltage. The voltage command for the cell converter's output voltage is executed by the control unit. Because the control unit is the foundation of the system, system initialization is required to change the voltage command for the cell converter's output voltage. As a result, it takes time for the power converter to start operating again after system reconstruction. This makes conventional power conversion devices difficult to apply to systems that require quick recovery in the event of a cell converter failure or systems that require uninterrupted operation.

[0132] In contrast, the power conversion device 1 can maintain the rated voltage of the AC voltage Vio output from the single-phase cluster 3 without changing the calculation timing Tc and calculation period Pc of the output voltage command before and after a failure occurs in the cell converter 31_2 functioning as a non-single cell converter or the cell converter 31_3 functioning as a redundant cell converter.

[0133] (Operation of the power conversion device when a bypass request is made to a single cell converter) Next, the operation of the power conversion device 1 when, for example, a failure occurs in the cell converter 31_1 and a bypass request is made to the cell converter 31_1 while the power conversion device 1 is operating in the state shown in Table 1 will be explained using Figure 5 while also referring to Figures 1 to 3.

[0134] [Table 3]

[0135] Table 3 shows the state of the power conversion device 1 when the cell converter 31_1 functioning as an individual cell converter fails. The items in Table 3, such as "cell converter," have the same contents as the items in Table 1, such as "cell converter," and therefore their explanations will be omitted. In Table 3, "-" indicates that the cell converter 31_1 does not contribute to the input / output of power between the single-phase cluster 3 and the system AC power supply 9. In other words, in this operation example, the cell converter 31_1 does not contribute to the input / output of power between the system AC power supply 9.

[0136] When a failure occurs in the cell converter 31_1, a failure information signal Sb1 indicating that a failure has occurred in the cell converter 31_1 and failure information signals Sb2 and Sb3 indicating that no failure has occurred in the cell converters 31_2 and 31_3 are input to the switching signal generation unit 55. Therefore, the switching signal generation unit 55 changes the bypass switch 302 provided in the cell converter 31_1 to a conductive state and outputs switching signals Ssd1, Ssd2, and Ssd3 to the cell converters 31_1, 31_2, and 31_3 and the control signal adjustment unit 52 to maintain each of the bypass switches 302 provided in the cell converters 31_2 and 31_3 in a non-conductive state.

[0137] The control signal adjuster 52 determines that a failure has occurred in the cell converter 31_1 functioning as an individual cell converter, based on, for example, the voltage level of the switching signal Ssd1 input from the switching signal generator 55. For this reason, the control signal adjuster 52 outputs number information RI1, phase information PI1, and output control signal SF1 that are partially different from the initial state of the power conversion device 1.

[0138] Specifically, the control signal adjuster 52 outputs to the control signal generator 51_1 the number information RI2 and phase information PI2 that are the same as those in the initial state of the power conversion device 1, and an output control signal SF1 (for example, the output control signal SF1 having a low voltage level) indicating that a bypass request has been made. The control signals Sg1 to Sg4 output from the control signal generator 51_1 are forced to have a constant low voltage level by the output control signal SF1. For this reason, the information included in the number information RI1 and phase information PI1 input from the control signal adjuster 52 to the control signal generator 51_1 in this case is arbitrary as long as the number R1 included in the number information RI1 is not "0".

[0139] The control signal adjuster 52 determines that a failure has occurred in the cell converter 31_1 functioning as an individual cell converter, based on, for example, the voltage level of the switching signal Ssd1 input from the switching signal generator 55. For this reason, the control signal adjuster 52 changes the phase of the carrier signal for one of the cell converter 31_2 functioning as a non-individual cell converter and the cell converter 31_3 functioning as a redundant cell converter, and outputs number information RI2, RI3, phase information PI2, PI3, and output control signals SF2, SF3 to increase the maximum voltage that can be output.

[0140] Specifically, for example, the control signal adjustment unit 52 outputs to the control signal generation unit 51_2 number information RI2 including information of "1" as the number R2 of cell converters related to carrier signals of the same phase, phase information PI2 including information of a phase of "0°", and an output control signal SF2 that is the same as the initial state of the power conversion device 1, in order to change the phase of the carrier signal related to the cell converter 31_2 and increase the maximum voltage of the output voltage V2.

[0141] In addition, the control signal adjustment unit 52 outputs to the control signal generation unit 51_3 number information RI3 including information of "1" as the number R3 of cell converters related to carrier signals of the same phase, phase information PI3 that is the same as the initial state of the power conversion device 1, and an output control signal SF3.

[0142] Therefore, the control signal generating unit 51_1 outputs the control signals Sg1 to Sg4 whose voltage levels are constantly low to the cell converter 31_2.

[0143] As described above, the control signal generating unit 51_2 receives the number information RI3 including the information of "1" as the number R2 of cell converters related to carrier signals of the same phase, the phase information PI2 including the information of 0°, and the output control signal SF2 indicating that no bypass request has been made from the control signal adjusting unit 52. As a result, the control signal generating unit 51_2 adjusts the carrier signal CS2 having a phase of 0° (i.e., the same phase as the carrier signal CS1 at the time of the initial operation of the power conversion device 1) and the output voltage command Vio output by the voltage command generating unit 54. *The output voltage command Vdd2 corresponds to 50% of the voltage value of * Based on this, the control signals Sg1 to Sg4 for controlling the cell converter 31_2 are generated, and the generated control signals Sg1 to Sg4 are output to the cell converter 31_2.

[0144] Further, the control signal generating unit 51_3 receives, from the control signal adjusting unit 52, number information RI3 including information of "1" as the number R3 of cell converters related to carrier signals of the same phase, phase information PI3 including information of 90°, and an output control signal SF3 indicating that no bypass request has been made. As a result, the control signal generating unit 51_3 adjusts the output voltage command Vio output by the voltage command generating unit 54. * Output voltage command Vdd3 corresponds to a voltage value that is 50% of the voltage value of * Based on this, the control signals Sg1 to Sg4 for controlling the cell converter 31_3 are generated, and the generated control signals Sg1 to Sg4 are output to the cell converter 31_3.

[0145] Fig. 5 is a diagram showing an example of operating waveforms during operation of the power conversion device 1 when a bypass request is made to the cell converter 31_1 (in this example, when a failure occurs in the cell converter 31_1). The various symbols shown in Fig. 5 have the same meaning as the various symbols shown in Fig. 3, and therefore their explanation will be omitted.

[0146] As shown in Figure 5, the output voltage command Vio * (not shown in FIG. 5) and output voltage command Vdd2 * ,Vdd3 * The calculation timing Tc for calculating is the timing when the voltages of the carrier signals CS2 and CS3 become maximum (peak) and minimum (trough). When the cell converter 31_1 fails, the phase of the carrier signal CS1 is changed to the same phase as the carrier signal CS1 related to the failed cell converter 31_1. Therefore, as shown in Figures 3 and 5, the calculation timing Tc and the calculation period Pc do not change before and after the failure of the cell converter 31_1.

[0147] When a failure occurs in the cell converter 31_1, the control signal generating unit 51_2 reduces the output voltage command Viod output from the dividing unit 53. * is divided by "1" in the division unit 511, the output voltage command Vdd2 that makes the output voltage V2 output by the cell converter 31_2 follow * Therefore, as shown in the first row of FIG. 5, the output voltage command Vdd2 output from the divider 511 provided in the control signal generator 51_2 is calculated. * The amplitude is twice as large as that before the failure occurred in the cell converter 31_1 (see the first row in FIG. 3), and the output voltage command Vdd1 * has the same amplitude as

[0148] In addition, when a failure occurs in the cell converter 31_1, the control signal generating unit 51_3 reduces the output voltage command Viod output from the dividing unit 53. * is divided by "1" in the division unit 511, the output voltage command Vdd3 that makes the output voltage V3 output by the cell converter 31_3 follow * Therefore, as shown in the first row of FIG. 5, the output voltage command Vdd3 output from the divider 511 provided in the control signal generator 51_3 is calculated. * The amplitude of the output voltage command Vdd1 before the failure of the cell converter 31_1 is twice as large as that before the failure of the cell converter 31_2 (see the first row in FIG. 3). * has the same amplitude as

[0149] Control signals Sg1 to Sg4 with constant low voltage levels are input to the cell converter 31_1. As a result, the semiconductor switches Q1, Q2, Q3, and Q4 provided in the cell converter 31_1 do not operate, and the cell converter 31_1 is in a non-operating state. Furthermore, the bypass switch 302 provided in the cell converter 31_1 is in a conductive state. As a result, the input / output terminals 303 and 304 provided in the cell converter 31_1 are at the same potential, and as shown in the second row of FIG. 5, the cell converter 31_1 is in a state equivalent to outputting a constant 0V output voltage V1.

[0150] The cell converter 31_2 is supplied with an output voltage command Vdd2 shown in the first row of FIG. * and a triangular wave carrier signal CS2, and control signals Sg1 to Sg4 generated by the control signal generation unit 51_2 are input. The semiconductor switches Q1, Q2, Q3, and Q4 provided in the cell converter 31_2 are controlled by the control signals Sg1 to Sg4 input from the control signal generation unit 51_2. As a result, as shown in the fourth row of FIG. 5, the cell converter 31_2 outputs an AC output voltage V2 corresponding to a voltage value that is 50% of the voltage value of the AC voltage Vio output by the single-phase cluster 3. The output voltage V2 when a fault occurs in the cell converter 31_1 is twice the output voltage V2 when no fault occurs in the cell converter 31_1.

[0151] The cell converter 31_3 is supplied with an output voltage command Vdd3 shown in the first row of FIG. * and a triangular wave carrier signal CS3, and control signals Sg1 to Sg4 generated by a control signal generation unit 51_3 are input. The semiconductor switches Q1, Q2, Q3, and Q4 provided in the cell converter 31_3 are controlled by the control signals Sg1 to Sg4 input from the control signal generation unit 51_3. As a result, as shown in the fourth row of FIG. 5, the cell converter 31_3 outputs an AC output voltage V3 corresponding to a voltage value that is 50% of the voltage value of the AC voltage Vio output by the single-phase cluster 3. The output voltage V3 when a failure occurs in the cell converter 31_1 is twice the output voltage V3 when no failure occurs in the cell converter 31_1.

[0152] As shown in the fifth row of FIG. 5, the AC voltage Vio output by the single-phase cluster 3 is the sum of the output voltages V1, V2, and V3 output by the cell converters 31_1, 31_2, and 31_3. If a failure occurs in the cell converter 31_1, the voltage values ​​of the output voltages V2 and V3 are doubled. Therefore, the maximum amplitude of the AC voltage Vio remains unchanged before and after the failure of the cell converter 31_1. Furthermore, if a failure occurs in the cell converter 31_1, the maximum amplitude of the AC voltage Vio of the single-phase cluster 3 is twice the maximum amplitude (rated voltage) of the output voltages V2 and V3 of the cell converters 31_2 and 31_3.

[0153] In this embodiment, the maximum voltage that can be output by the individual cell converter is set to the rated voltage. When a failure occurs in the cell converter 31_1 functioning as an individual cell converter, the cell converter 31_2 functioning as a non-individual cell converter and the cell converter 31_3 functioning as a redundant cell converter must also cover the contribution of the output voltage V1 of the cell converter 31_1 to the AC voltage Vio of the single-phase cluster 3. Therefore, when a failure occurs in the cell converter 31_1, the maximum output voltages V2 and V3 output by the cell converters 31_2 and 31_3 become equal to the maximum voltage (rated voltage) that can be output by the individual cell converter.

[0154] Specifically, when a bypass request is made to the cell converter 31_1 (for example, when a failure occurs in the cell converter 31_1), the control unit 5 calculates the output voltage command Viod using the number information RI2 and RI3 that include information of "1" as the numbers R2 and R3 of cell converters related to carrier signals of the same phase. * The output voltage command Viod *corresponds to a command value for making the output voltage output by the single cell converter follow. For this reason, the control unit 5 controls all of the bypass switches 302 provided in the cell converters 31_2 and 31_3 (an example of a first cell converter which is at least two cell converters) controlled by the control signals Sg1 to Sg4 generated using the carrier signal CS2 (an example of a first carrier signal) to be non-conductive, and controls the bypass switch 302 (provided in the cell converter 31_1) controlled by the control signals Sg1 to Sg4 generated using the carrier signal CS3 (an example of one or more second carrier signals which are out of phase with the carrier signal CS2) to be non-conductive. When one or more remaining cell converters (an example of at least one of the switches provided in the second cell converter) are controlled to a conductive state, the phase of the carrier signal CS2 is changed to the same phase as the phase of the carrier signal CS1 used to generate the control signals Sg1 to Sg4 that control the cell converter 31_1 that controls the bypass switch 302 to a conductive state, and the maximum voltage that can be output by the cell converters 31_2, 31_3 is set higher than the maximum voltage set before the phase of the carrier signal CS2 was changed, within a range that does not exceed the rated voltage of the cell converters 31_2, 31_3.

[0155] As a result, the power conversion device 1 can maintain the rated voltage of the AC voltage Vio output from the single-phase cluster 3 without changing the calculation timing Tc and calculation period Pc of the output voltage command before and after a failure occurs in the cell converter 31_1 functioning as a single cell converter.

[0156] As described above, the power conversion device 1 according to this embodiment includes a main circuit 301 that generates power to be input / output to / from the system AC power supply 9, a pair of input / output terminals 303, 304 to / from which the power is input / output, and a bypass switch (an example of a switch) 302 that is provided so as to be able to short-circuit the pair of input / output terminals 303, 304, and includes three or more (n in this embodiment (n is a natural number equal to or greater than 3)) cell converters 31_1, 31_2, ..., 31_m (m is a natural number equal to or greater than 3 and smaller than n) 31_n, each of which is connected in series with the pair of input / output terminals 303, 304. The control unit 5 controls the main circuits 301 and bypass switches 302 provided in the cell converters 31_1 to 31_n. When the control unit 5 controls all of the bypass switches 302 provided in the cell converters 31_1 to 31_n to be in a non-conductive state, the control unit 5 controls the non-single cell converters and the redundant cell converters (an example of at least two cell converters) among the cell converters 31_1 to 31_n (an example of three or more cell converters) by control signals Sg1 to Sg4 generated using carrier signals having the same phase so that the maximum voltage that the non-single cell converters and the redundant cell converters can output is lower than the rated voltage of the single cell converter.

[0157] With this configuration, the power conversion device 1 generates an output voltage command Vdd1 that causes the output voltages V1 to Vn of the cell converters 31_1 to 31_n to follow the output voltages Vdd1 to Vn before and after a bypass request is issued to any of the cell converters 31_1 to 31_n. * ~Vddn * The calculation timing Tc and calculation period Pc for calculating the voltage Vcc can be made the same. As a result, when a bypass request is made to any of the cell converters 31_1 to 31_n, the power conversion device 1 can quickly restart or continue operation without interruption, and can prevent an increase in harmonics.

[0158] The present invention is not limited to the above-described embodiment, and various modifications are possible. The power conversion device 1 according to the above embodiment is configured to deactivate the cell converter 31_k by forcibly setting the voltage levels of the control signals Sg1 to Sg4 to a constant low level using the output control signal SFk when a bypass request is made to the cell converter, but the present invention is not limited to this. For example, the input of the output voltage command Viod* to the divider 511 may be stopped, and the voltage levels of the output terminals of the AND circuits 514 and 517 may be set to a constant low level via pull-down resistors. This results in the voltage levels of the control signals Sg1 to Sg4 input to the cell converter 31_k being constant at a low level, thereby achieving the same effect as the above embodiment. Furthermore, in this case, the operation of the target control signal generator 51_k can be stopped, thereby reducing the power consumption of the power conversion device 1.

[0159] In the above embodiment, the power conversion device applied to a reactive power compensator has been described as an example, but the present invention is not limited to this. For example, the power conversion device according to the present embodiment can also be applied to an inverter or a converter.

[0160] Although the power conversion device 1 according to the above embodiment includes the single-phase cluster 3, the present invention is not limited to this. The power conversion device 1 may include multiple (e.g., three-phase) clusters, each of which may have the same configuration as the single-phase cluster 3 in the above embodiment. In this case, the control unit provided in the power conversion device 1 controls each cluster individually, similar to the single-phase cluster 3.

[0161] In the above embodiment, a bypass request to a cell converter is made when the cell converter fails, but the present invention is not limited to this. For example, the present invention can also be applied to a bypass request when performing maintenance on one of a plurality of cell converters.

[0162] In the above embodiment, the semiconductor switches Q1 to Q4 are configured by MOS field effect transistors, but the present invention is not limited to this. The semiconductor switches Q1 to Q4 may be configured by, for example, insulated gate bipolar transistors (IGBTs) or bipolar transistors.

[0163] The technical scope of the present invention is not limited to the exemplary embodiments shown and described, but includes all embodiments that achieve equivalent effects to the object of the present invention. Furthermore, the technical scope of the present invention is not limited to the combination of inventive features defined by the claims, but can be defined by any desired combination of specific features from among all the respective disclosed features. [Explanation of symbols]

[0164] 1 Power conversion device 3 Single-phase cluster 5. Control section 9 grid AC power supply 31_1,31_2,31_3,31_i,31_i-1,31_k,31_m,31_n,31_n-1 Cell converter 51_1, 51_2, 51_3, 51_k, 51_m, 51_n control signal generation unit 52 Control signal adjustment unit 53,511 Division part 54 Voltage command generator 55 Switching signal generation unit 301 Main circuit 302 Bypass Switch 303,304 Input / output terminal 512 Carrier signal generator 513,516 PWM calculation section 514,517 AND circuit 515 Inverter Circuit C capacitor CS1,CS2,CS3,CSk,Csm,CSm carrier signal Ctn Carrier signal number D1, D2, D3, D4 Freewheeling diodes fc frequency Is alternating current L reactor Number of M, R, R1, R2, R3, Rk Pc calculation cycle PI1, PI2, PI3, PIk phase information Q1, Q2, Q3, Q4 semiconductor switches RI1, RI2, RI3, RIk Quantity Information Sb1, Sb2, Sb3, Sb4 Fault information signal SF1, SF2, SF3, SFk output control signals Sg1, Sg2, Sg3, Sg4, Sgk control signals Ssd1, Ssd2, Ssd3, Ssdi, Ssdk, Ssdn switching signals Tc Calculation timing V1, V2, V3, Vk, Vm, Vn output voltage Vc1, Vc2, Vc3, Vc4, Vcm, Vcn DC voltage Vdd * ,Vdd1 * ,Vdd2 * ,Vdd3 * ,Vddk * ,Vio * ,Viod * Output voltage command Vdd1I * ,Vdd2I * ,VddkI * Inverted Signal Vio,Vs AC voltage θm phase

Claims

1. a main circuit that generates electric power input and output between the system AC power source, a pair of input / output terminals through which the electric power is input and output, and a switch that is provided to be able to short-circuit the pair of input / output terminals, and three or more cell converters, the pair of input / output terminals being connected in series; a control unit for controlling the main circuits and the switches provided in the three or more cell converters; Equipped with When the control unit controls all of the switches to a non-conductive state, the control unit controls at least two of the three or more cell converters by control signals generated using carrier signals having the same phase so that a maximum voltage that can be output is lower than a rated voltage. Power conversion equipment.

2. The control unit sets a voltage value of the maximum voltage to a value obtained by dividing the voltage value of the rated voltage by the number of the at least two cell converters. The power conversion device according to claim 1 .

3. When the switch controlled to a conductive state is included in the at least two cell converters, the control unit sets a maximum voltage that can be output from the at least two cell converters having the switch controlled to a non-conductive state to a value higher than the maximum voltage set when all of the switches are controlled to a non-conductive state, within a range not exceeding the rated voltage. The power conversion device according to claim 1 or 2.

4. The control unit is When all of the switches provided in a first cell converter, which is the at least two cell converters controlled by the control signal generated using a first carrier signal that is the carrier signal, are controlled to a non-conductive state, and at least one of the switches provided in a second cell converter, which is one or more remaining cell converters controlled by the control signal generated using one or more second carrier signals that are out of phase with the first carrier signal, is controlled to a conductive state, changing the phase of the first carrier signal to the same phase as the phase of the second carrier signal used to generate the control signal that controls the second cell converter that controls the switch to a conductive state, and setting the maximum voltage that can be output by the first cell converter higher than the maximum voltage that was set before the phase of the first carrier signal was changed, within a range that does not exceed the rated voltage. The power conversion device according to any one of claims 1 to 3.

5. the main circuit includes a first semiconductor switch and a second semiconductor switch connected in series, a third semiconductor switch and a fourth semiconductor switch connected in series, and a capacitor; the first semiconductor switch and the second semiconductor switch, the third semiconductor switch and the fourth semiconductor switch, and the capacitor are connected in parallel; one of the pair of input / output terminals is connected to a connection portion of the first semiconductor switch and the second semiconductor switch; The other of the pair of input / output terminals is connected to a connection portion of the third semiconductor switch and the fourth semiconductor switch. The power conversion device according to any one of claims 1 to 4.

6. The main circuit includes diodes connected in anti-parallel to the first semiconductor switch, the second semiconductor switch, the third semiconductor switch, and the fourth semiconductor switch, respectively. The power conversion device according to claim 5 .

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