Semiconductor device

Abstract

To provide a semiconductor device capable of stabilizing characteristics.SOLUTION: According to an embodiment, a semiconductor device includes a semiconductor member, an electrode portion, a pad portion, and first and second conductive members. The electrode portion includes a source electrode, a gate electrode including a first gate portion, and a drain electrode. The first conductive member is electrically connected to the gate electrode. The first conductive member includes a first conductive portion. A position in a first direction of a drain pad of the pad portion is between a position in the first direction of the electrode portion and a position in the first direction of the first conductive portion. The second conductive member is electrically connected to the source electrode. The second conductive member includes at least one of first to third conductive regions. The first conductive portion is between the drain pad and the first conductive region. The electrode portion is between the second conductive region and the third conductive region.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present invention relate to semiconductor devices.

Background Art

[0002] For example, in semiconductor devices such as transistors, stable characteristics are desired.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments of the present invention provide a semiconductor device capable of stably maintaining characteristics.

Means for Solving the Problems

[0005] According to an embodiment of the present invention, a semiconductor device includes a semiconductor member, an electrode portion, a pad portion, a first conductive member, and a second conductive member. The semiconductor member includes a first semiconductor layer containing Al x1 Ga 1-x1 N (0 ≦ x1 < 1), and a first semiconductor layer containing Al x2 Ga 1-x2It includes a second semiconductor layer including N(0 < x2 ≤ 1, x1 < x2). The electrode portion includes a source electrode extending along a first direction, a gate electrode including a first gate portion extending along the first direction, and a drain electrode extending along the first direction. The first gate portion is between the source electrode and the drain electrode in a second direction intersecting the first direction. The pad portion includes a drain pad electrically connected to the drain electrode. The first conductive member is electrically connected to the gate electrode. The first conductive member includes a first conductive portion. The position of the drain pad in the first direction is between the position of the electrode portion in the first direction and the position of the first conductive portion in the first direction. The second conductive member is electrically connected to the source electrode. The second conductive member includes at least one of a first conductive region, a second conductive region, and a third conductive region. The position of the first conductive portion in the first direction is between the position of the drain pad in the first direction and the position of the first conductive region in the first direction. The position of the electrode portion in the second direction is between the position of the second conductive region in the second direction and the position of the third conductive region in the second direction.

Brief Description of the Drawings

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BEST MODE FOR CARRYING OUT THE INVENTION

[0007] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationships between the thicknesses and widths of the respective parts, the size ratios between the parts, etc. are not necessarily the same as those in reality. Even when representing the same part, there may be cases where the dimensions and ratios are shown differently in the drawings. In this specification and each figure, elements similar to those described above with respect to the previously presented figures are denoted by the same reference numerals, and detailed descriptions thereof are omitted as appropriate.

[0008] (First Embodiment) Figs. 1 to 4 are schematic plan views illustrating a semiconductor device according to the first embodiment. In Figs. 1 to 4, for ease of viewing, some members are taken out and drawn. Figs. 5 to 9 are schematic cross-sectional views illustrating a semiconductor device according to the first embodiment. Fig. 5 is a cross-sectional view taken along line A1 - A2 of Fig. 1. Fig. 6 is a cross-sectional view taken along line B1 - B2 of Fig. 1. Fig. 7 is a cross-sectional view taken along line C1 - C2 of Fig. 1. Fig. 8 is a cross-sectional view taken along line E1 - E2 of Fig. 1. Fig. 9 is a cross-sectional view taken along line F1 - F2 of Fig. 1.

[0009] As shown in Figs. 1 and 5 to 9, the semiconductor device 110 according to the embodiment includes a semiconductor member 10M, an electrode portion 50E, a pad portion 50P, a first conductive member 61, and a second conductive member 62.

[0010] As shown in Figs. 5 to 9, the semiconductor member 10M includes a first semiconductor layer 11 and a second semiconductor layer 12. The first semiconductor layer 11 contains Al x1 Ga 1-x1 N (0 ≤ x1 < 1). The composition ratio x1 is, for example, 0 or more and less than 0.1. The first semiconductor layer 11 is, for example, a GaN layer.

[0011] The second semiconductor layer 12 contains Al x2 Ga 1-x2 N (0 < x2 ≤ 1, x1 < x2). The composition ratio x2 is, for example, 0.1 or more and 0.35 or less. The second semiconductor layer 12 is, for example, an AlGaN layer.

[0012] The semiconductor device 110 may further include a substrate 10s. There is a first semiconductor layer 11 between the substrate 10s and the second semiconductor layer 12. The substrate 10s may include, for example, a silicon substrate or a SiC substrate.

[0013] The first semiconductor layer 11 is provided on the substrate 10s. The second semiconductor layer 12 is provided on the first semiconductor layer 11. An electrode portion 50E, a pad portion 50P, a first conductive member 61, and a second conductive member 62 are provided on the semiconductor member 10M. For example, a superlattice layer may be provided between the substrate 10s and the first semiconductor layer 11. The superlattice layer has a stacked structure including, for example, an AlGaN layer and a GaN layer. For example, a nitride layer containing carbon (for example, a GaN layer) may be provided between the substrate 10s and the first semiconductor layer 11. The concentration of carbon in the nitride layer containing carbon is higher than the concentration of carbon in the first semiconductor layer 11. For example, an AlGaN back barrier layer may be provided between the substrate 10s and the first semiconductor layer 11. For example, at least any one of the superlattice layer, the nitride layer containing carbon, and the AlGaN back barrier layer may be provided.

[0014] As shown in FIG. 1, the electrode portion 50E includes a source electrode 51, a gate electrode 53, and a drain electrode 52. The source electrode 51 extends along the first direction D1. The first direction D1 is the Y-axis direction. One direction perpendicular to the Y-axis direction is the X-axis direction. The direction perpendicular to the Y-axis direction and the X-axis direction is the Z-axis direction.

[0015] The gate electrode 53 includes a first gate portion 53a. The first gate portion 53a extends along the first direction D1. The drain electrode 52 extends along the first direction D1. The first gate portion 53a is between the source electrode 51 and the drain electrode 52 in the second direction D2. The second direction D2 intersects the first direction D1. The second direction D2 is, for example, the X-axis direction.

[0016] The pad portion 50P includes a drain pad 52P. The drain pad 52P is electrically connected to the drain electrode 52. In this example, the pad portion 50P includes a source pad 51P and a gate pad 53P. The source pad 51P is electrically connected to the source electrode 51. The gate pad 53P is electrically connected to the gate electrode 53.

[0017] The first conductive member 61 is electrically connected to the gate electrode 53. The first conductive member 61 includes a first conductive portion 61a. The position of the drain pad 52P in the first direction D1 is between the position of the electrode portion 50E in the first direction D1 and the position of the first conductive portion 61a in the first direction D1.

[0018] The second conductive member 62 is electrically connected to the source electrode 51. The second conductive member 62 includes at least any one of a first conductive region 62a, a second conductive region 62b, and a third conductive region 62c. The position of the first conductive portion 61a in the first direction D1 is between the position of the drain pad 52P in the first direction D1 and the position of the first conductive region 62a in the first direction D1. For example, in a plan view, the first conductive portion 61a is between the drain pad 52P and the first conductive region 62a.

[0019] The position of the electrode portion 50E in the second direction D2 is between the position of the second conductive region 62b in the second direction D2 and the position of the third conductive region 62c in the second direction D2. For example, in a plan view, the source electrode 51, the gate electrode 53, and the drain electrode 52 are between the second conductive region 62b and the third conductive region 62c in the second direction D2.

[0020] FIG. 2 illustrates the semiconductor member 10M. As shown in FIG. 2, the semiconductor member 10M includes an element region RE, a pad portion region 10P, a peripheral region RP, a first intermediate region R1, and a second intermediate region R2. The peripheral region RP is around the element region RE and the pad portion region 10P in a plane (e.g., the X-Y plane) including a first direction D1 and a second direction D2. The first intermediate region R1 is between the element region RE and the peripheral region RP. The second intermediate region R2 is between the pad portion region 10P and the peripheral region RP.

[0021] As shown in FIGS. 1 and 2, the electrode portion 50E is provided in the element region RE. The pad portion 50P is provided in the pad portion region 10P. In this example, the pad portion 50P includes a drain pad 52P, a source pad 51P, and a gate pad 53P. The drain pad 52P is provided in a part of the pad portion region 10P. The source pad 51P and the gate pad 53P are provided in another part of the pad portion region 10P.

[0022] At least a part of the first conductive member 61 and at least a part of the second conductive member 62 are provided in at least one of the first intermediate region R1 and the second intermediate region R2.

[0023] As shown in FIG. 1, in this example, the first conductive member 61 further includes a second conductive portion 61b and a third conductive portion 61c. The position of the second conductive portion 61b in the second direction D2 is between the position of the second conductive region 62b in the second direction D2 and the position of the electrode portion 50E in the second direction D2. The position of the third conductive portion 61c in the second direction D2 is between the position of the electrode portion 50E in the second direction D2 and the position of the third conductive region 62c in the second direction D2.

[0024] For example, the second conductive portion 61b and the third conductive portion 61c may be continuous with the first conductive portion 61a. For example, the second conductive region 62b and the third conductive region 62c may be continuous with the first conductive region 62a.

[0025] For example, there is a reference example in which the first conductive member 61 and the second conductive member 62 are not provided at the X-axis end of the electrode portion 50E (the X-axis end of the element region RE). In this reference example, a low-voltage conductive member (such as the first conductive member 61 and the second conductive member 62) is not provided in the path between the drain electrode 52 to which a high voltage is applied and the peripheral region RP. Therefore, a high electric field is generated in the region between the X-axis end of the electrode portion 50E and the peripheral region RP. As a result, a leakage current may occur. In particular, in a high-temperature and high-humidity operation test (THB: thermal hyumidity baias test) or the like, the leakage current increases. Thereby, the operation may become unstable. For example, the semiconductor device may be destroyed.

[0026] On the other hand, in the embodiment, for example, the first conductive member 61 (for example, the second conductive portion 61b and the third conductive portion 61c) is provided between the X-axis end of the electrode portion 50E and the peripheral region RP. Further, the second conductive member 62 (for example, the second conductive region 62b and the third conductive region 62c) is provided between the first conductive member 61 and the peripheral region RP. Thereby, the electric field is low at the X-axis end of the element region RE. For example, the electric field strength becomes substantially zero. In the embodiment, the leakage current can be suppressed. It is difficult for the semiconductor device to be destroyed in the high-temperature and high-humidity operation test.

[0027] In the embodiment, for example, the first conductive member 61 (for example, the first conductive portion 61a) is provided between the drain pad 52P and the peripheral region RP. For example, the second conductive member 62 (for example, the first conductive region 62a) is provided between the first conductive member 61 and the peripheral region RP. Thereby, the electric field is low in the region between the drain pad 52P and the peripheral region RP. In the embodiment, the leakage current can be suppressed. In the embodiment, a semiconductor device capable of stabilizing characteristics can be provided.

[0028] As already described, the pad portion 50P may further include a source pad 51P. The source pad 51P is electrically connected to the source electrode 51. For example, the position of the electrode portion 50E (source electrode 51, gate electrode 53, and drain electrode 52) in the first direction D1 is between the position of the source pad 51P in the first direction D1 and the position of the drain pad 52P in the first direction D1.

[0029] As already described, the pad portion 50P may further include a gate pad 53P. The gate pad 53P is electrically connected to the gate electrode 53. For example, the position of the electrode portion 50E in the first direction D1 is between the position of the gate pad 53P in the first direction D1 and the position of the drain pad 52P in the first direction D1.

[0030] As shown in FIG. 1, the first conductive member 61 may further include a fourth conductive portion 61d. The second conductive member 62 may further include a fourth conductive region 62d. The position of the electrode portion 50E in the first direction D1 is between the position of the fourth conductive region 62d in the first direction D1 and the position of the drain pad 52P in the first direction D1. The position of the fourth conductive portion 61d in the first direction D1 is between the position of the fourth conductive region 62d in the first direction D1 and the position of the electrode portion 50E in the first direction D1.

[0031] For example, the fourth conductive portion 61d is continuous with the first conductive portion 61a. The first to fourth conductive portions 61a to 61d may be continuous with each other. The fourth conductive region 62d is continuous with the second conductive region 62b and the third conductive region 62c. The first to fourth conductive regions 62a to 62d may be continuous with each other.

[0032] For example, in a plan view, the electrode portion 50E may be surrounded by the first conductive member 61. In a plan view, the first conductive member 61 may be surrounded by the second conductive member 62. For example, in a plan view, the pad portion 50P may be surrounded by the first conductive member 61. A peripheral region RP is provided around these conductive members in a plan view. Leakage current is more suppressed.

[0033] Figure 3 illustrates the planar shapes of the source electrode 51, the gate electrode 53, the drain electrode 52, the first conductive member 61, and the second conductive member 62.

[0034] As shown in FIG. 3, in this example, the gate electrode 53 further includes a second gate portion 53b, a third gate portion 53c, and a fourth gate portion 53d. The second gate portion 53b extends along the first direction D1.

[0035] In the second direction D2, the source electrode 51 is between the second gate portion 53b and the drain electrode 52. In the second direction D2, the source electrode 51 is between the second gate portion 53b and the first gate portion 53a. In the first direction D1, the source electrode 51 is between the third gate portion 53c and the fourth gate portion 53d. For example, the source electrode 51 is between a plurality of portions of the gate electrode 53 in the second direction D2 and the first direction D1. For example, the gate electrode 53 exists in the path between the source electrode 51 and the drain electrode 52. Thereby, the leakage current is suppressed also in the element region RE. The characteristics can be made more stable.

[0036] For example, the first gate portion 53a, the second gate portion 53b, the third gate portion 53c, and the fourth gate portion 53d may be continuous with each other. For example, the source electrode 51 may be surrounded by the first gate portion 53a, the second gate portion 53b, the third gate portion 53c, and the fourth gate portion 53d in the X-Y plane (a plane including the first direction D1 and the second direction D2). More stable characteristics can be obtained.

[0037] As shown in FIG. 3, a plurality of source electrodes 51, a plurality of gate electrodes 53, and a plurality of drain electrodes 52 may be provided.

[0038] As shown in FIGS. 4 and 6, the source electrode 51 may be electrically connected to the source pad 51P by the source connection portion 51C.

[0039] As shown in FIG. 4, the gate electrode 53 may be electrically connected to the gate pad 53P by the gate connection portion 53C.

[0040] As shown in FIGS. 4 and 7, the drain electrode 52 may be electrically connected to the drain pad 52P by the drain connection portion 52C.

[0041] As shown in FIGS. 4 to 9, the semiconductor device 110 may further include a third conductive member 63. The third conductive member 63 is electrically connected to the second conductive member 62. At least a part of the first conductive member 61 is between the semiconductor member 10M and the third conductive member 63 in the third direction D3. The third direction D3 intersects the plane (X-Y plane) including the first direction D1 and the second direction D2. The third direction D3 is, for example, the Z-axis direction. The third conductive member 63 functions as, for example, a field plate. For example, local concentration of an electric field is suppressed. A more stable operation is easily obtained.

[0042] As shown in FIG. 5, the third conductive portion 61c is between the semiconductor member 10M and the third conductive member 63 in the third direction D3. Similarly, the second conductive portion 61b may be between the semiconductor member 10M and the third conductive member 63 in the third direction D3.

[0043] As shown in FIG. 6, the first conductive portion 61a is between the semiconductor member 10M and the third conductive member 63 in the third direction D3. The fourth conductive portion 61d is between the semiconductor member 10M and the third conductive member 63 in the third direction D3.

[0044] As shown in FIGS. 4 and 8, the semiconductor device 110 may include a second conductive member connection portion 62C. The second conductive member connection portion 62C electrically connects the second conductive member 62 to the source pad 51P. At least a part of the first conductive member 61 is between the semiconductor member 10M and the third conductive member 63 in the third direction D3. At least a part of the second conductive member connection portion 62C is between the third conductive member 63 and the source pad 51P in the first direction D1. For example, at least a part of the second conductive member connection portion 62C may be in the same layer as the third conductive member 63 and the source pad 51P.

[0045] As shown in FIGS. 4 and 9, the semiconductor device 110 may include a first conductive member connection portion 61C. The first conductive member connection portion 61C electrically connects the first conductive member 61 to the gate pad 53P. As shown in FIG. 9, at least a part of the position of the first conductive member connection portion 61C in the third direction D3 is between the position of the first conductive member 61 in the third direction D3 and the position of the gate pad 53P in the third direction D3.

[0046] As shown in FIG. 6, the position of the first conductive member 61 (such as the first conductive portion 61a and the fourth conductive portion 61d) in the third direction D3 is the same as the position of the gate electrode 53 (such as the first gate portion 53a and the fourth gate portion 53d) in the third direction D3. At least a part of the position of the first conductive member connection portion 61C in the third direction D3 is between the position of the gate electrode 53 in the third direction D3 and the position of the gate pad 53P in the third direction D3.

[0047] As shown in FIG. 5, the semiconductor device 110 may include a fourth conductive member 64. The fourth conductive member 64 is electrically connected to the source electrode 51. At least a part of the gate electrode 53 (such as the first to fourth gate portions 53a to 53d) is between the semiconductor member 10M and the fourth conductive member 64 in the third direction D3. The fourth conductive member 64 functions as, for example, a field plate. For example, local concentration of the electric field is suppressed. A more stable operation is easily obtained.

[0048] As shown in FIG. 5, in this example, the gate electrode 53 is provided between a plurality of regions of the second semiconductor layer 12 in the X-Y plane. A part of the gate electrode 53 may be provided between a plurality of regions of the first semiconductor layer 11 in the X-Y plane. For example, the first gate portion 53a is between a part of the second semiconductor layer 12 and another part of the second semiconductor layer 12 in the second direction D2. For example, the first gate portion 53a may be provided between a part of the first semiconductor layer 11 and another part of the first semiconductor layer 11 in the second direction D2. The gate electrode 53 is, for example, a recessed gate electrode. With such a configuration, for example, a normally-off operation can be obtained. In an embodiment, a normally-on operation may be applied.

[0049] As shown in FIG. 5, the first semiconductor layer 11 includes a region facing the second semiconductor layer 12. A carrier region 10c is formed in this region. The carrier region 10c is, for example, a two-dimensional electron gas. The semiconductor device 110 is, for example, a HEMT (High Electron Mobility Transistor). The current flowing between the source electrode 51 and the drain electrode 52 is controlled by the potential of the gate electrode 53. The potential of the gate electrode 53 may be, for example, a potential based on the potential of the source electrode 51.

[0050] The semiconductor device 110 may include a first insulating member 41 and a second insulating member 42. At least a part of the first insulating member 41 is between the gate electrode 53 and the semiconductor member 10M. In the third direction D3, the second semiconductor layer 12 is between the first semiconductor layer 11 and the second insulating member 42. The second insulating member 42 is between the second semiconductor layer 12 and a part of the first insulating member 41 in the third direction D3. The second insulating member 42 is, for example, a protective film.

[0051] The first insulating member 41 includes at least one selected from the group consisting of oxygen and nitrogen, and at least one selected from the group consisting of silicon and aluminum. In one example, the first insulating member 41 includes silicon oxide.

[0052] The second insulating member 42 includes at least one selected from the group consisting of oxygen and nitrogen, and silicon. The concentration of nitrogen in the first insulating member 41 is lower than the concentration of nitrogen in the second insulating member 42. In one example, the first insulating member 41 includes at least one of silicon nitride and silicon oxide.

[0053] As shown in FIG. 5, the semiconductor device 110 may include a compound member 43. A part of the compound member 43 is provided between the first insulating member 41 and the semiconductor member 10M. A part of the compound member 43 may be provided between the second insulating member 42 and the first insulating member 41. The compound member 43 includes AlN or AlGaN. The composition ratio of Al in the compound member 43 is higher than the composition ratio of Al in the second semiconductor layer 12. By providing the compound member 43, a higher carrier mobility can be obtained. A lower on-resistance can be obtained in the semiconductor device.

[0054] As shown in FIG. 5, the semiconductor device 110 may include an interlayer insulating portion 80. The interlayer insulating portion 80 includes, for example, an interlayer insulating film 81 and an interlayer insulating film 82.

[0055] As shown in FIG. 6, the semiconductor device 110 may include an insulating film 85. A part of the insulating film 85 may be provided on the third conductive member 63. The insulating film 85 may be provided on a part of the source pad 51P, a part of the drain pad 52P, and a part of the gate pad 53P. The insulating film 85 functions, for example, as a protective film.

[0056] As already described with reference to FIG. 2, the semiconductor member 10M may include an element region RE, a pad portion region 10P, a peripheral region RP, a first intermediate region R1, and a second intermediate region R2. The element region RE, the first intermediate region R1, and the second intermediate region R2 are, for example, "active regions". The peripheral region RP and the pad portion region 10P are, for example, "non-active regions". The peripheral region RP is, for example, an element isolation region.

[0057] The crystallinity in the inactive regions (the peripheral region RP and the pad portion region 10P) is lower than that in the active regions (the element region RE, the first intermediate region R1, and the second intermediate region R2). For example, in the inactive regions, the crystallinity of the semiconductor member 10M is deteriorated.

[0058] In one example, the deterioration of the crystallinity of the semiconductor member 10M can be observed by PL (Photo Luminessence). In one example of PL evaluation, for example, when irradiated with a He-Cd laser having a peak wavelength of 325 nm, the excitation light spectrum in the inactive region is different from the excitation light spectrum in the active region.

[0059] For example, the light intensity at about 360 nm in the inactive regions (the peripheral region RP and the pad portion region 10P) is lower than the light intensity at about 360 nm in the active regions (the element region RE, the first intermediate region R1, and the second intermediate region R2). For example, the light intensity at about 530 nm in the inactive regions (the peripheral region RP and the pad portion region 10P) is higher than the light intensity at about 530 nm in the active regions (the element region RE, and the first intermediate region R1 and the second intermediate region R2).

[0060] In one example, the crystallinity can be observed by, for example, TEM (Transmission Electron Microscope). In one example of TEM observation, in the TEM observation of the inactive region, the periodicity of the crystal lattice of the semiconductor Component 10M is observed to be disturbed.

[0061] In one example, for example, the inactive regions (the peripheral region RP and the pad portion region 10P) contain a first element, and the inactive regions (the element region RE, the first intermediate region R1, and the second intermediate region R2) do not substantially contain the first element. The first element includes at least one selected from the group consisting of Ar, P, B, and N. The first element may be, for example, a heavy element. The first element is introduced, for example, by ion implantation.

[0062] For example, the concentration of the first element in the non-active regions (peripheral region RP and pad portion region 10P) is higher than the concentration of the first element in the active regions (element region RE, and first intermediate region R1 and second intermediate region R2).

[0063] For example, the first element is introduced into the non-active region. In the region where the first element is introduced, due to the collision damage of the first element, the crystallinity of the semiconductor member 10M deteriorates. Due to the deterioration of the crystallinity, a carrier region 10c (two-dimensional electron gas) is not substantially generated in the non-active regions (peripheral region RP and pad portion region 10P). The carrier region 10c is generated in the active regions (element region RE, first intermediate region R1 and second intermediate region R2).

[0064] FIGS. 10 and 11 are schematic plan views illustrating a semiconductor device according to the first embodiment. In FIGS. 10 and 11, some members are taken out and drawn for easy viewing of the figures. FIGS. 12 and 13 are schematic cross-sectional views illustrating a semiconductor device according to the first embodiment. FIG. 12 is a cross-sectional view taken along line G1-G2 of FIG. 10. FIG. 13 is a cross-sectional view taken along line H1-H2 of FIG. 10.

[0065] As shown in FIGS. 10 to 13, in the semiconductor device 111 according to the embodiment, the configuration of the first conductive member connection portion 61C is different from the configuration of the first conductive member connection portion 61C in the semiconductor device 110. The configuration of the semiconductor device 111 may be the same as the configuration of the semiconductor device 110 except for this.

[0066] As shown in FIG. 12, in the semiconductor device 111, the position of the first conductive member 61 (for example, the third conductive portion 61c) in the third direction D3 is between the position of the semiconductor member 10M in the third direction D3 and the position of the first conductive member connection portion 61C in the third direction D3. As shown in FIG. 13, the position of the gate connection portion 53C in the third direction D3 is between the position of the first conductive member 61 (for example, the fourth conductive portion 61d) in the third direction D3 and the position of the gate pad 53P in the third direction D3. For example, the height of the gate connection portion 53C with respect to the first semiconductor layer 11 may be substantially the same as the height of the third conductive portion 61c with respect to the first semiconductor layer 11.

[0067] Leakage current can also be suppressed in the semiconductor device 111. A semiconductor device capable of stabilizing characteristics can be provided.

[0068] In the semiconductor devices 110 and 111, when the length (width) of the second conductive member connection portion 62C in the second direction D2 is short, the parasitic capacitance can be reduced. When the width is long, a stable connection can be made. The width can be variously deformed.

[0069] FIG. 14 is a schematic plan view illustrating a semiconductor device according to the first embodiment. In FIG. 14, some members are drawn separately for easy viewing of the figure. As shown in FIG. 14, in the semiconductor device 112 according to the embodiment, the second conductive member 62 includes a second conductive region 62b and a third conductive region 62c. The first conductive region 62a and the fourth conductive region 62d are omitted. The configuration of the semiconductor device 112 excluding this may be the same as the configuration of the semiconductor device 110 or the semiconductor device 111.

[0070] Also in the semiconductor device 112, a first conductive member 61 (for example, a second conductive portion 61b and a third conductive portion 61c) is provided between the end of the electrode portion 50E in the X-axis direction and the peripheral region RP. Further, a second conductive member 62 (for example, a second conductive region 62b and a third conductive region 62c) is provided between the first conductive member 61 and the peripheral region RP. Thereby, at the end of the first intermediate region R1 in the X-axis direction, the electric field is low. Also in the semiconductor device 112, the leakage current can be suppressed. A semiconductor device capable of stabilizing characteristics can be provided. For example, in a high-temperature and high-humidity operation test, the semiconductor device is less likely to be damaged.

[0071] (Second Embodiment) FIG. 15 is a schematic plan view illustrating a semiconductor device according to the second embodiment. In FIG. 15, some members are drawn separately for ease of viewing. As shown in FIG. 15, the semiconductor device 120 according to the embodiment includes a semiconductor member 10M, an electrode portion 50E, a pad portion 50P, a first conductive member 61, and a second conductive member 62. In the semiconductor device 120, the configurations of the electrode portion 50E, the first conductive member 61, and the second conductive member 62 are Device different from those in 110 to 112. The configuration of the semiconductor device 120 except for this may be the same as the configurations of the semiconductor devices 110 to 112.

[0072] For example, also in the semiconductor device 120, the semiconductor member 10M includes a first semiconductor layer 11 and a second semiconductor layer 12. Also in the semiconductor device 120, the electrode portion 50E includes a source electrode 51, a gate electrode 53, and a drain electrode 52. The source electrode 51 and the drain electrode 52 extend along the first direction D1.

[0073] The gate electrode 53 includes a first gate portion 53a, a second gate portion 53b, and a third gate portion 53c. The first gate portion 53a and the second gate portion 53b extend along the first direction D1. In a second direction D2 intersecting the first direction D1, the first gate portion 53a is , soIt is between the source electrode 51 and the drain electrode 52. The source electrode 51 is between the second gate portion 53b and the drain electrode 52. In the second direction D2, the source electrode 51 is between the second gate portion 53b and the first gate portion 53a.

[0074] The pad portion 50P includes the drain pad 52P. The drain pad 52P is electrically connected to the drain electrode 52.

[0075] The first conductive member 61 is electrically connected to the gate electrode 53. In the semiconductor device 120, the first conductive member 61 includes a first conductive portion 61a, a second conductive portion 61b, and a third conductive portion 61c. The position of the drain pad 52P in the first direction D1 is between the position of the electrode portion 50E in the first direction D1 and the position of the first conductive portion 61a in the first direction D1.

[0076] The second conductive member 62 is electrically connected to the source electrode 51. In the semiconductor device 120, the second conductive member 62 includes a first conductive region 62a, a second conductive region 62b, and a third conductive region 6 2 c. The position of the first conductive portion 61a in the first direction D1 is between the position of the drain pad 52P in the first direction D1 and the position of the first conductive region 62a in the first direction D1. The position of the electrode portion 50E in the second direction D2 is between the position of the second conductive region 62b in the second direction D2 and the position of the third conductive region 62c in the second direction D2. For example, the second conductive region 62b and the third conductive region 62c may be continuous with the first conductive region 62a.

[0077] The position of the second conductive portion 61b in the second direction D2 is between the position of the second conductive region 62b in the second direction D2 and the position of the electrode portion 50E in the second direction D2. The position of the third conductive portion 61c in the second direction D2 is between the position of the electrode portion 50E in the second direction D2 and the position of the third conductive region 62c in the second direction D2. For example, the second conductive portion 61b and the third conductive portion 61c may be continuous with the first conductive portion 61a.

[0078] The second conductive portion 61b is continuous with the second gate portion 53b. The third conductive portion 61c is continuous with the first gate portion 53a. The position of the third gate portion 53c in the first direction D1 is between the position of the source electrode 51 in the first direction D1 and the position of the drain pad 52P in the first direction D1.

[0079] In the semiconductor device 120, at least one of the gate electrode 53 and the first conductive member 61 is provided between the source electrode 51 and the drain electrode 52. The first conductive member 61 is provided between the drain electrode 52 and the second conductive member 62. The first conductive member 61 (the first conductive portion 61a) is provided between the drain pad 52P and the second conductive member 62 (the first conductive region 62a). The electric field can be lowered. For example, the leakage current can be suppressed. Also in the second embodiment, a semiconductor device capable of stably maintaining characteristics is provided.

[0080] In this example, the first conductive member 61 further includes a fourth conductive portion 61d. The position of the drain electrode 52 in the first direction D1 is between the position of the fourth conductive portion 61d in the first direction D1 and the above-mentioned position of the drain pad 52P in the first direction D1. For example, the fourth conductive portion 61d may be continuous with the second conductive portion 61b and the third conductive portion 61c.

[0081] For example, the drain electrode 52 may be surrounded by at least one of the gate electrode 53 and the first conductive member 61 in the X-Y plane. The X-Y plane is a plane including the first direction D1 and the second direction D2. For example, the source electrode 51 is outside the region surrounded by at least one of the gate electrode 53 and the first conductive member 61 described above. For example, at least one of the gate electrode 53 and the first conductive member 61 is provided in the path between the source electrode 51 and the drain electrode 52. For example, at least one of the first conductive member 61 is provided in the path between the drain electrode 52 and the second conductive member 62. The leakage current is suppressed.

[0082] The pad portion 50P may include a source pad 51P. The source pad 51P is electrically connected to the source electrode 51. The position of the fourth conductive portion 61d in the first direction D1 is between the position of the source pad 51P in the first direction D1 and the position of the drain electrode 52 in the first direction D1.

[0083] The pad portion 50P may include a gate pad 53P. The gate pad 53P is electrically connected to the gate electrode 53. For example, the position of the fourth conductive portion 61d in the first direction D1 is between the position of the gate pad 53P in the first direction D1 and the position of the drain electrode 52 in the first direction D1.

[0084] Also in the semiconductor device 120, Half The conductor member 10M Element includes a region RE, a pad portion region 10P, a peripheral region RP, a first intermediate region R1, and a second intermediate region R2. The electrode portion 50E is provided in the element region RE. The pad portion 50P is provided in the pad portion region 10P. For example, the drain pad 52P is provided in a part of the pad portion region 10P. The source pad 51P and the gate pad 53P are provided in another part of the pad portion region 10P. At least a part of the first conductive member 61 and at least a part of the second conductive member 62 are provided in at least one of the first intermediate region R1 and the second intermediate region R2.

[0085] FIG. 16 is a schematic plan view illustrating a semiconductor device according to the second embodiment. In FIG. 16, some members are drawn separately for clarity of the drawing. As shown in FIG. 16, in the semiconductor device 121 according to the embodiment, the second conductive member 62 further includes a fourth conductive region 62d. The configuration of the semiconductor device 121 excluding this may be the same as the configuration of the semiconductor device 120.

[0086] In the semiconductor device 121, the position of the fourth conductive portion 61d in the first direction D1 is between the position of the fourth conductive region 62d in the first direction D1 and the position of the drain electrode 52 in the first direction D1. For example, in the region between the drain electrode 52 and the source pad 51P, the electric field can be reduced. For example, the leakage current can be suppressed.

[0087] For example, the fourth conductive region 62d may be continuous with the second conductive region 62b and the third conductive region 62c. For example, the drain electrode 52 is surrounded by at least one of the gate electrode 53 and the first conductive member 61. For example, the gate electrode 53 and the first conductive member 61 are surrounded by the second conductive member 62. For example, in a plan view, the drain pad 52P is surrounded by at least one of the gate electrode 53 and the first conductive member 61. The characteristics can be made more stable.

[0088] Hereinafter, an example of a method for manufacturing a semiconductor device according to an embodiment will be described. The following description corresponds to an example of a method for manufacturing the semiconductor device 121.

[0089] FIGS. 17(a), 17(b), 18(a), 18(b), 19(a) and 19(b) are schematic plan views illustrating a method for manufacturing a semiconductor device according to an embodiment. As shown in FIG. 17(a), a trench 53T is formed in the semiconductor member 10M. As will be described later, by forming a conductive layer in the trench 53T, the gate electrode 53 and the first conductive member 61 are formed.

[0090] As shown in FIG. 17(b), an insulating film 41f serving as the first insulating member 41 is formed. At least a part of the insulating film 41f is provided in the trench 53T. Thereafter, a heat treatment (PDA: Post Deposition Annealing) may be performed. Before the formation of the insulating film 41f, the compound member 43 and the second insulating member 42 may be formed.

[0091] As shown in FIG. 18(a), by embedding a conductive material in the trench 53T, the gate electrode 53 and the first conductive member 61 are formed.

[0092] As shown in FIG. 18(b), a first element is introduced into the semiconductor member 10M. The introduction is performed, for example, by ion implantation or the like. In the introduction of the first element, by using the mask M1, a region where the first element is introduced and a region where the first element is not introduced are formed. The region where the first element is introduced becomes the peripheral region RP and the pad portion region 10P. The region where the first element is not introduced becomes the element region RE, the first intermediate region R1, and the second intermediate region R2.

[0093] For example, after the ion implantation process, PDA for improving the quality of the first insulating member 41 may be performed. As a result, the crystallinity of the region where the first element is introduced is restored, the element isolation ability deteriorates, and the leakage current increases. For example, when the first insulating member 41 contains silicon oxide, PDA at a high temperature is required. Due to PDA at a high temperature, the leakage current is likely to deteriorate.

[0094] By performing ion implantation after PDA, the leakage current becomes small. For example, ion implantation is Gate performed after the formation of the electrode 53 and the first conductive member 61. As a result, the first insulating member 41 provided in the trench 53T is hardly contaminated. For example, contamination from the mask material is hardly generated. For example, particles are hardly generated. Gate breakdown due to contamination or particles is hardly generated. In the introduction of the first element, Gate the electrode 53 and the first conductive member 61 are covered by the mask M1. Therefore, the device for introducing the first element is Gate not contaminated by the materials contained in the electrode 53 and the first conductive member 61. For example, when the gate electrode 53 does not surround the source electrode 51, the leakage current increases between the source electrode 51 and the drain electrode 52. By surrounding the source electrode 51 with the gate electrode 53, the leakage current can be reduced.

[0095] As shown in FIG. 19(a), after removing the mask M1, the source electrode 51, the second conductive member 62, and the drain electrode 52 are formed. After that, interlayer insulationSection 8 0 is formed.

[0096] As shown in FIG. 19(b), a drain pad 52P, a source pad 51P, and a gate pad 53P are formed. If necessary, an insulating film 85 is formed. Thereby, the semiconductor device 121 is formed.

[0097] Various semiconductor devices according to the embodiment can also be manufactured by appropriately modifying the above manufacturing method.

[0098] In the embodiment, the source electrode 51 includes, for example, at least one selected from the group consisting of Ti, Al, and W. The drain electrode 52 includes, for example, at least one selected from the group consisting of Ti, Al, and W. The gate electrode 53 includes, for example, at least one selected from the group consisting of TiN, WN, Ti, W, Ni, Pt, Au, Ta, TaN, Poly-Si, Poly-AlGaN, and Poly-GaN. The first conductive member 61 includes, for example, the same material as the material of the gate electrode 53. The second conductive member 62 includes, for example, the same material as the material of the source electrode 51.

[0099] Information on the length, thickness, and shape can be obtained, for example, by electron microscope observation or the like. Information on the composition of the material can be obtained, for example, by SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy dispersive X-ray spectroscopy) or the like.

[0100] According to the embodiment, a semiconductor device capable of stabilizing characteristics can be provided.

[0101] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, regarding the specific configurations of each element such as semiconductor members, semiconductor layers, electrode portions, pad portions, conductive members, and insulating members included in the semiconductor device, those skilled in the art can appropriately select from the known range to implement the present invention in the same manner, and as long as the same effects can be obtained, it is included in the scope of the present invention.

[0102] In addition, combinations of any two or more elements of each specific example within the technically possible range are also included in the scope of the present invention as long as they encompass the gist of the present invention.

[0103] Furthermore, based on the semiconductor device described above as an embodiment of the present invention, all semiconductor devices that can be appropriately designed and modified by those skilled in the art also belong to the scope of the present invention as long as they encompass the gist of the present invention.

[0104] In addition, within the scope of the idea of the present invention, those skilled in the art can conceive of various modification examples and correction examples, and it is understood that these modification examples and correction examples also belong to the scope of the present invention.

[0105] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and its equivalent scope.

Explanation of Reference Numerals

[0106] 10M… semiconductor member, 10P… pad portion region, 10c… carrier region, 10s… substrate, 11, 12… first and second semiconductor layers, 41, 42… first and second insulating members, 41f… insulating film, 43… compound member, 50E… electrode portion, 50P… pad portion, 51… source electrode, 51C… source connection portion, 51P… source pad, 52… drain electrode, 52C… drain connection portion, 52P… drain pad, 53… gate electrode, 53C… gate connection portion, 53P… gate pad, 53a~53d… first to fourth gate portions, 61~64… first to fourth conductive members, 61C… first conductive member connection portion, 61a~61d… first to fourth conductive portions, 62… second conductive member, 62C… second conductive member connection portion, 62a~62d… first to fourth conductive regions, 80… interlayer insulating portion, 81, 82… interlayer insulating films, 85… insulating film, 110, 120, 121… semiconductor devices, D1~D3… first to third directions, R1, R2… first and second intermediate regions, RE… element region, RP… peripheral region

Claims

1. Al ｘ１ Ga １－ｘ１ A first semiconductor layer containing N (0 ≦ x1 < 1), Al ｘ２ Ga １－ｘ２ A second semiconductor layer containing N (0 < x2 ≦ 1, x1 < x2), and a semiconductor member including the same An electrode part, wherein the electrode part comprises: A source electrode extending along a first direction; A gate electrode including a first gate part extending along the first direction; A drain electrode extending along the first direction, wherein the first gate part is between the source electrode and the drain electrode in a second direction intersecting the first direction, the drain electrode; The electrode part including the above; A pad part including a drain pad electrically connected to the drain electrode; A first conductive member electrically connected to the gate electrode, the first conductive member including a first conductive part, and a position of the drain pad in the first direction is between a position of the electrode part in the first direction and a position of the first conductive part in the first direction, the first conductive member; A second conductive member electrically connected to the source electrode, the second conductive member including a first conductive region, a second conductive region, and a third conductive region, and the position of the first conductive part in the first direction is between the position of the drain pad in the first direction and a position of the first conductive region in the first direction, and a position of the electrode part in the second direction is between a position of the second conductive region in the second direction and a position of the third conductive region in the second direction, the second conductive member; A first conductive member connection part; Comprising; The pad part further includes a gate pad electrically connected to the gate electrode; The position of the electrode part in the first direction is between the position of the gate pad in the first direction and the position of the drain pad in the first direction; The first conductive member connection part electrically connects the first conductive member to the gate pad; At least a part of the position of the first conductive member connection part in a third direction intersecting a plane including the first direction and the second direction is between the position of the first conductive member in the third direction and the position of the gate pad in the third direction, a semiconductor device.

2. The second conductive region and the third conductive region are continuous with the first conductive region, the semiconductor device according to Claim 1.

3. The first conductive member further includes a second conductive part and a third conductive part; The position of the second conductive portion in the second direction is between the position of the second conductive region in the second direction and the position of the electrode portion in the second direction. The semiconductor device according to claim 1 or 2, wherein the position of the third conductive portion in the second direction is between the position of the electrode portion in the second direction and the position of the third conductive region in the second direction.

4. The semiconductor device according to claim 3, wherein the second conductive portion and the third conductive portion are continuous with the first conductive portion.

5. The pad portion further includes a source pad electrically connected to the source electrode. The semiconductor device according to any one of claims 1 to 4, wherein the position of the electrode portion in the first direction is between the position of the source pad in the first direction and the position of the drain pad in the first direction.

6. The first conductive member further includes a fourth conductive portion. The second conductive member further includes a fourth conductive region. The semiconductor device according to any one of claims 1 to 5, wherein the position of the electrode portion in the first direction is between the position of the fourth conductive region in the first direction and the position of the drain pad in the first direction. The semiconductor device according to any one of claims 1 to 5, wherein the position of the fourth conductive portion in the first direction is between the position of the fourth conductive region in the first direction and the position of the electrode portion in the first direction.

7. The fourth conductive portion is continuous with the first conductive portion. The semiconductor device according to claim 6, wherein the fourth conductive region is continuous with the second conductive region and the third conductive region.

8. The semiconductor device further includes a third conductive member electrically connected to the second conductive member. The semiconductor device according to any one of claims 1 to 7, wherein at least a part of the first conductive member is between the semiconductor member and the third conductive member in the third direction.

9. A third conductive member electrically connected to the second conductive member; A second conductive member connection portion that electrically connects the second conductive member to the source pad; The semiconductor device further includes: The semiconductor device according to claim 5, wherein at least a part of the first conductive member is between the semiconductor member and the third conductive member in the third direction. The semiconductor device according to claim 5, wherein at least a part of the second conductive member connection portion is between the third conductive member and the source pad in the first direction.

10. The semiconductor member an element region, a pad portion region, a peripheral region around the element region and the pad portion region in a plane including the first direction and the second direction, a first intermediate region between the element region and the peripheral region, a second intermediate region between the pad portion region and the peripheral region, and includes the electrode portion is provided in the element region, the pad portion is provided in the pad portion region, at least a part of the first conductive member and at least a part of the second conductive member are provided in at least one of the first intermediate region and the second intermediate region, the semiconductor device according to any one of claims 1 to 9.

11. The crystallinity in the peripheral region and the pad portion region is lower than the crystallinity in the element region, the first intermediate region, and the second intermediate region, the semiconductor device according to claim 10.

12. The gate electrode further includes a second gate portion, a third gate portion, and a fourth gate portion, the second gate portion extends along the first direction, in the second direction, the source electrode is between the second gate portion and the drain electrode, in the second direction, the source electrode is between the second gate portion and the first gate portion, in the first direction, the source electrode is between the third gate portion and the fourth gate portion, the semiconductor device according to claim 10 or 11.

13. The first gate portion, the second gate portion, the third gate portion, and the fourth gate portion are continuous with each other, the semiconductor device according to claim 12.

14. The second conductive region and the third conductive region are continuous with the first conductive region, the first conductive member further includes a second conductive portion and a third conductive portion, the position of the second conductive portion in the second direction is between the position of the second conductive region in the second direction and the position of the electrode portion in the second direction, the position of the third conductive portion in the second direction is between the position of the electrode portion in the second direction and the position of the third conductive region in the second direction, the second conductive portion and the third conductive portion are continuous with the first conductive portion, the gate electrode further includes a second gate portion and a third gate portion, the second gate portion extends along the first direction, in the second direction, the source electrode is between the second gate portion and the drain electrode, In the second direction, the source electrode is between the second gate portion and the first gate portion. The second conductive portion is continuous with the second gate portion. The third conductive portion is continuous with the first gate portion. The semiconductor device according to claim 1, wherein a position of the third gate portion in the first direction is between a position of the source electrode in the first direction and a position of the drain pad in the first direction.

15. The drain electrode is surrounded by at least one of the gate electrode and the first conductive member in a plane including the first direction and the second direction. The semiconductor device according to claim 14, wherein the source electrode is outside a region surrounded by at least one of the gate electrode and the first conductive member.

16. The first conductive member further includes a fourth conductive portion. The semiconductor device according to claim 14 or 15, wherein a position of the drain electrode in the first direction is between a position of the fourth conductive portion in the first direction and a position of the drain pad in the first direction.

17. The second conductive member further includes a fourth conductive region. The semiconductor device according to claim 16, wherein a position of the fourth conductive portion in the first direction is between a position of the fourth conductive region in the first direction and a position of the drain electrode in the first direction.

18. The semiconductor device according to any one of claims 1 to 17, wherein the first gate portion is between a part of the second semiconductor layer and another part of the second semiconductor layer in the second direction.

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