Semiconductor device

Abstract

To provide a semiconductor device capable of miniaturization or high integration.SOLUTION: A semiconductor device includes an oxide, a first conductor and a second conductor disposed apart from each other on the oxide, a first insulator disposed on the first conductor and the second conductor and having an opening formed overlapping between the first conductor and the second conductor, a third conductor disposed in the opening, and a second insulator disposed between the oxide, the first conductor, the second conductor and the first insulator, and the third conductor. The second insulator has a first film thickness between the oxide and the third conductor and a second film thickness between the first conductor or the second conductor, and the third conductor. The first film thickness is smaller than the second film thickness.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method of the semiconductor device. One aspect of the invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, and There are cases where the child devices and the like can be said to have semiconductor devices.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. An aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the issue of the [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, and memories are mainly used. A CPU is a semiconductor integrated circuit (at least transistors and The semiconductor device is an assembly of semiconductor elements having a memory and electrodes that serve as connection terminals.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, e.g. They are mounted on printed wiring boards and used as components in a variety of electronic devices.

[0006] In addition, a technique for forming a transistor using a semiconductor thin film formed on a substrate having an insulating surface has attracted attention. This transistor is widely applied to electronic devices such as integrated circuits (ICs) and image display devices (also referred to simply as display devices). As a semiconductor thin film applicable to transistors, silicon-based semiconductor materials are widely known, but oxide semiconductors are attracting attention as other materials. In addition, transistors using oxide semiconductors are known to have extremely low leakage current in the non-conducting state. For example, low-power CPUs that apply the characteristic of low leakage current of transistors using oxide semiconductors have been disclosed (see Patent Document 1).

[0007] In addition, methods for manufacturing transistors using oxide semiconductors, such as embedding a gate electrode in an opening, have been disclosed (see Patent Document 2).

[0008] In recent years, with the miniaturization and weight reduction of electronic devices, the demand for integrated circuits with high-density integration of transistors and the like has been increasing. In addition, an improvement in the productivity of semiconductor devices including integrated circuits is required.

[0009]

[0010] As oxide semiconductors, for example, not only oxides of single-element metals such as indium oxide and zinc oxide but also oxides of multi-element metals are known. Among the oxides of multi-element metals, in particular, research on In-Ga-Zn oxide (hereinafter also referred to as IGZO) has been actively conducted. According to research on IGZO, in oxide semiconductors, a state that is neither single crystal nor amorphous, C

[0011] AAC (c-axis aligned crystalline) structure and nc (n anocrystalline) structure have been found (see Non-Patent Documents 1 to 3 .). In Non-Patent Documents 1 and 2, techniques for fabricating transistors using oxide semiconductors having a CAAC structure are also disclosed. Furthermore, even oxide semiconductors with lower crystallinity than the CAAC structure and nc structure have been shown to have minute crystals in Non-Patent Documents 4 and 5. Furthermore, a transistor using IGZO as an active layer has an extremely low off-current (see Non-Patent Document 6), and LSIs and displays utilizing such characteristics have been reported (see Non-Patent Documents 7 and 8).

[0012]

Prior Art Documents

Patent Documents

[0013]

Patent Document 1

Patent Document 2

Non-Patent Documents

[0014]

Non-Patent Document 1

Non-Patent Document 2

Non-Patent Document 3

Non-Patent Document 4

Non-Patent Document 5

Non-Patent Document 6

Non-Patent Document 7

Non-Patent Document 8

Summary of the Invention

Problems to be Solved by the Invention

[0015] One aspect of the present invention is to provide a semiconductor device capable of miniaturization or high integration as one of the problems. One aspect of the present invention is to provide a semiconductor device having good electrical characteristics as the problem. ​One of the problems is as follows. One aspect of the present invention is to provide a semiconductor device having good frequency characteristics. Another problem is as follows. One aspect of the present invention is to provide a semiconductor device with good reliability. Another problem is as follows. One aspect of the present invention is to provide a highly productive semiconductor device. One of the problems is as follows.

[0016] One aspect of the present invention is to provide a semiconductor device capable of retaining data for a long period of time. One of the problems is as follows. One aspect of the present invention is to provide a semiconductor device with a high information writing speed. One of the problems is as follows. One aspect of the present invention is to provide a semiconductor device with a high degree of design freedom. One of the problems is as follows. One aspect of the present invention is to provide a semiconductor device capable of suppressing power consumption. One of the problems is as follows. One aspect of the present invention is to provide a novel semiconductor device. One of the problems is as follows.

[0017] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be naturally apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other problems from the descriptions in the specification, drawings, claims, etc. One aspect of the present invention is not required to solve all of these problems. Other problems will be naturally apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other problems from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problems

[0018] One aspect of the present invention includes an oxide, a first conductor and a second conductor disposed separately from each other on the oxide, a first insulator disposed on the first conductor and the second conductor and having an opening formed by overlapping between the first conductor and the second conductor, a third conductor disposed in the opening, the oxide, the first conductor, the second conductor, the first insulator, and the third conductor. and a first insulator disposed on the first conductor and the second conductor and having an opening formed by overlapping between the first conductor and the second conductor, a third conductor disposed in the opening, the oxide, the first conductor, the second conductor, and the first insulator, and the third conductor. 2 and a first insulator disposed on the first conductor and the second conductor and having an opening formed by overlapping between the first conductor and the second conductor, a third conductor disposed in the opening, the oxide, the first conductor, the second conductor, and the first insulator, and the third conductor. and a third conductor disposed in the opening, the oxide, the first conductor, the second conductor, and the first insulator, and the third conductor. ​and a second insulator disposed between the first and second conductive layers, the second insulator being made of an oxide and a third conductive material. Between the first conductor or the second conductor and the third conductor, the first film thickness is formed. and a second thickness between the first and second layers, the first thickness being thinner than the second thickness. It is a semiconductor device.

[0019] In the above, the second insulator has a third insulator and a fourth insulator, The insulator is an oxide, a first conductor, a second conductor, and a first insulator and a third conductor. and a fourth insulator is disposed between the first conductor, the second conductor, and the first insulator. The insulating body may be disposed between the insulating body and a third insulating body.

[0020] In the above, the oxide, the first conductor, the second conductor, the first insulator, A fifth insulator is disposed between the first and second electrodes, the fifth insulator being made of at least one of aluminum and hafnium. It may be an oxide containing at least one of them.

[0021] In the above, the oxide is a material containing In and an element M (M is Al, Ga, Y, or Sn). and Zn.

[0022] In another embodiment of the present invention, a first oxide and a second oxide are disposed on the first oxide at a distance from each other. a first conductor and a second conductor disposed on the first conductor and the second conductor; a first insulator having an opening formed therein and overlapping the first conductor and the second conductor; a third conductor disposed in the mouth; and a first oxide, a first conductor, a second conductor, and a second insulator disposed between the first insulator and the third conductor; and a first oxide. Disposed between the first conductor, the second conductor, and the first insulator and the second insulator has a second oxide, and the second insulator is between the first oxide and the third conductor has a first film thickness, and between the first conductor or the second conductor and the third conductor, the second film thickness, and the first film thickness is thinner than the second film thickness, a semiconductor device characterized by being.

[0023] Also, in the above, a third insulator is disposed between the first oxide, the first conductor, and the second conductor and the first insulator, and the third insulator may be an oxide containing at least one of aluminum and hafnium

[0024] Also, in the above, the fourth insulator is disposed between the first conductor, the second conductor, and the first insulator and the second oxide, and the fourth insulator may be an oxide containing at least one of aluminum and hafnium

[0025] Also, in the above, the first oxide and the second oxide preferably have In, element M (M is Al , Ga, Y, or Sn), and Zn

[0026] Also, in the above, the upper surface of the first insulator, the upper surface of the third conductor, and the upper surface of the second insulator may be substantially flush. Also, in the above, in contact with the upper surface of the first insulator, the upper surface of the third conductor, and the upper surface of the second insulator, a sixth insulator is disposed, and the sixth insulator may be an oxide containing aluminum

[0027] Also, in the above, the first conductor and the second conductor are aluminum, chromium ​​​​​​​Copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium Aluminum, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium At least one of tungsten, ruthenium, iridium, strontium, and lanthanum It is preferable that:

[0028] In the above, the first conductor and the second conductor are made of tantalum nitride, titanium nitride, or the like. titanium and aluminum nitrides, tantalum and aluminum nitrides, ruthenium oxides Ruthenium, ruthenium nitride, oxides containing strontium and ruthenium, and lanthanum and an oxide containing nickel. Effect of the Invention

[0029] According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device having favorable frequency characteristics can be provided. According to the present invention, a semiconductor device with high reliability can be provided. As a result, a semiconductor device with high productivity can be provided.

[0030] Alternatively, a semiconductor device capable of retaining data for a long period of time can be provided. Alternatively, a semiconductor device with a high data writing speed can be provided. It is possible to provide a semiconductor device having a high degree of freedom. It is possible to provide a semiconductor device. Alternatively, it is possible to provide a novel semiconductor device. .

[0031] Note that the description of these effects does not preclude the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims

Brief Description of the Drawings

[0032]

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Embodiments for Carrying Out the Invention

[0033] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways, and it will be easily understood by those skilled in the art that the forms and details can be variously changed without departing from the spirit and its scope. Therefore, the present invention is not construed as being limited to the description of the following embodiments.

[0034] Also, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. Note that the drawings schematically show ideal examples and are not limited to the shapes or values shown in the drawings. For example, in an actual manufacturing process, layers or resist masks may unintentionally shrink due to processing such as etching, but may be omitted for ease of understanding. Also, in the drawings, the same reference numerals are commonly used for the same parts or parts having similar functions among different drawings, and the repeated description may be omitted. Also, when referring to similar functions, the hatching patterns may be the same and may not be particularly labeled.

[0035] Also, particularly in top views (also referred to as "plan views") and perspective views, etc., for ease of understanding the invention, the description of some components may be omitted. Also, the description of some hidden lines, etc., may be omitted.

[0036] Also, in this specification and the like, ordinal numbers such as first, second, etc. are used for convenience and do not indicate the process order or the stacking order. Therefore, for example, "the first" can be appropriately replaced with "the second" or "the third" and so on for explanation. Also, the ordinal numbers described in this specification and the like may not match the ordinal numbers used to specify an aspect of the present invention.

[0037] Also, in this specification and the like, terms indicating arrangements such as "on" and "under" are used for convenience to explain the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes as appropriate depending on the direction in which each component is depicted. Therefore, it is not limited to the

[0038] terms described in the specification and can be appropriately rephrased according to the circumstances. For example, in this specification and the like, when it is explicitly described that X and Y are connected, it is considered that the cases where X and Y are electrically connected, where X and Y are functionally connected, and where X and Y are directly connected are disclosed in this specification and the like. Therefore, it is not limited to a predetermined connection

[0039] relationship, for example, the connection relationship shown in the figure or the text, and connections other than those shown in the figure or the text are also considered to be those

[0040] described in the figure or the text. As an example of the case where X and Y are directly connected, an element that enables when an element such as iodine, a display element, a light-emitting element, or a load is not connected between X and Y and there is an element (for example, a switch, a transistor, a capacitor, an inductor, a resistor, a diode, a display element, a light-emitting element, a load, etc.) that enables electrical connection between X and Y and X and Y are connected without passing through the element This is the case where X and Y are connected

[0041] As an example of the case where X and Y are electrically connected, one or more elements (for example, a switch, a transistor, a capacitor, an inductor, a resistor, a diode, a display element, a light-emitting element, a load, etc.) that enable electrical connection between X and Y can be connected between X and Y Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not or the switch has a function of selecting and switching the path through which current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected

[0042] As an example of the case where X and Y are functionally connected, a circuit (for example, a logic circuit (an inverter, a NAND circuit, a NOR circuit, etc.), a signal conversion circuit (a DA conversion circuit, an AD conversion circuit, a gamma correction circuit, etc.), a potential level conversion circuit (a power supply circuit (a boost circuit, a buck circuit, etc.), a level shifter circuit that changes the potential level of a signal, etc.), a voltage source, a current source, a switching circuit, an amplification circuit (a circuit that can increase the signal amplitude or the amount of current, an operational amplifier, a differential amplification circuit, a source follower circuit, a buffer circuit, etc.), a signal generation circuit that enables functional connection between X and Y ​​​​Circuits, memory circuits, control circuits, etc.) can be connected by one or more between X and Y. Note that, as an example, even if another circuit is sandwiched between X and Y, when the signal output from X is transmitted to Y, X and Y are considered to be functionally connected. Note that when X and Y are functionally connected, it includes the case where X and Y are directly connected and the case where X and Y are electrically connected.

[0043] Also, in this specification, etc., a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a region where a channel is formed between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow between the source and the drain through the region where the channel is formed. Note that, in this specification, etc., the region where the channel is formed refers to the region where current mainly flows.

[0044] Also, the functions of the source and the drain may be interchanged when transistors of different polarities are adopted or when the direction of current changes in the circuit operation. Therefore, in this specification, etc., the terms source and drain may be used interchangeably in some cases.

[0045] Note that the channel length is, for example, in the top view of the transistor, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or in the region where the channel is formed, the source (source region or refers to the distance between the source (source region or source electrode) and the drain (drain region or drain electrode). Note that, in one transistor, the channel length does not necessarily take the same value in all regions. That is, the channel length of one transistor may not be determined by a single value. Therefore, in this specification, the channel length is taken as any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed.

[0046] The channel width refers to, for example, the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or the length of the part where the source and the drain face each other in the region where the channel is formed. Note that, in one transistor, the channel width does not necessarily take the same value in all regions. That is, the channel width of one transistor may not be determined by a single value. Therefore, in this specification, the channel width is taken as any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed. Note that, depending on the structure of the transistor, the channel width in the region where the channel is actually formed (hereinafter also referred to as the "effective channel width") and the channel width shown in the top view of the transistor (hereinafter also referred to as the "apparent channel width") may be different. For example, when the gate electrode covers the side surface of the semiconductor, the effective channel width may be larger than the apparent channel width, and the influence may become non-negligible. For example, in a fine transistor in which the gate electrode covers the side surface of the semiconductor, the ratio of the channel formation region formed on the side surface of the semiconductor may increase. In that case, it is larger than the apparent channel width.

[0047] Note that, depending on the structure of the transistor, the channel width in the region where the channel is actually formed (hereinafter also referred to as the "effective channel width") and the channel width shown in the top view of the transistor (hereinafter also referred to as the "apparent channel width") may be different. For example, when the gate electrode covers the side surface of the semiconductor, the effective channel width may be larger than the apparent channel width, and the influence may become non-negligible. For example, in a fine transistor in which the gate electrode covers the side surface of the semiconductor, the ratio of the channel formation region formed on the side surface of the semiconductor may increase. In that case, it is larger than the apparent channel width. There may be cases where they are different. For example, when the gate electrode covers the side surface of the semiconductor, the effective channel width may be larger than the apparent channel width, and the influence may become non-negligible. For example, in a fine and a transistor in which the gate electrode covers the side surface of the semiconductor, the ratio of the channel formation region formed on the side surface of the semiconductor may increase. In that case, it is larger than the apparent channel width. channel width. For example, in a fine transistor in which the gate electrode covers the side surface of the semiconductor, the ratio of the channel formation region formed on the side surface of the semiconductor may increase. In that case, the effective channel width is larger than the apparent channel width, and the influence may become non-negligible. The effective channel width becomes larger.

[0048] In such a case, it may be difficult to estimate the effective channel width by measurement. For example, in order to estimate the effective channel width from the design value, it is necessary to assume that the shape of the semiconductor is known. Therefore, when the shape of the semiconductor is not accurately known, it is difficult to accurately measure the effective channel width.

[0049] Therefore, in this specification, the apparent channel width may be referred to as the "surrounded channel width (SCW)". Also, in this specification, when simply described as the channel width, it may refer to the surrounded channel width or the apparent channel width. Or, in this specification, when simply described as the channel width, it may refer to the effective channel width. Note that the channel length, channel width, effective channel width, apparent channel width, surrounded channel width, etc. can be determined by analyzing a cross-sectional TEM image or the like.

[0050] Note that the impurities in the semiconductor refer to, for example, components other than the main component constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic% can be said to be an impurity. When impurities are included, for example, the DOS (Density of States) of the semiconductor may increase or the crystallinity may decrease. When the semiconductor is an oxide semiconductor, impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main component of the oxide semiconductor. ​​​​​​There are hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. Oxides In the case of a semiconductor, water may also function as an impurity. Also, in the case of an oxide semiconductor, for example oxygen vacancies may be formed due to the incorporation of impurities. Also, when the semiconductor is silicon examples of impurities that change the characteristics of the semiconductor include, for example, Group 1 elements excluding oxygen and hydrogen , Group 2 elements, Group 13 elements, Group 15 elements, etc.

[0051] Note that in this specification, etc., a silicon oxynitride film means that, in terms of its composition, the oxygen content is higher than the nitrogen content . For example, preferably, oxygen is 55 atomic% or more and 65 atomic% or less , nitrogen is 1 atomic% or more and 20 atomic% or less, silicon is 25 atomic% or more and 35 atomic% or less, and hydrogen is included in the concentration range of 0.1 atomic% or more and 10 atomic% or less. Also, a silicon nitride oxide film means that, in terms of its composition, the nitrogen content is higher than the oxygen content . For example, preferably, nitrogen is 55 atomic% or more and 65 atomic% or less, oxygen is 1 atomic% or more and 20 atomic% or less, silicon is 25 atomic% or more and 35 atomic% or less, and hydrogen is included in the concentration range of 0.1 atomic% or more and 10 atomic% or less .

[0052] Also, in this specification, etc., the term "film" and the term "layer" can be used interchangeably . For example, the term "conductive layer" may be changed to the term "conductive film". Or, for example, the term "insulating film" may be changed to the term "insulating layer" .

[0053] Also, in this specification, etc., the term "insulator" is used interchangeably with an insulating film or an insulating layer ​​It is possible. Also, the term "conductor" can be replaced with a conductive film or a conductive layer. Also, the term "semiconductor" can be replaced with a semiconductor film or a semiconductor layer. It is possible.

[0054] Also, unless otherwise specified, the transistors shown in this specification and the like are field-effect transistors. Also, unless otherwise specified, the transistors shown in this specification and the like are n-channel transistors. Therefore, its threshold voltage (also referred to as "Vth") is greater than 0V unless otherwise specified. Unless otherwise specified.

[0055] Also, in this specification and the like, "parallel" means a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, cases of -5 degrees or more and 5 degrees or less are also included. Also, "substantially parallel" means a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. Also, "perpendicular" means a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, cases of 85 degrees or more and 95 degrees or less are also included. Also, "substantially perpendicular" means a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.

[0056] In this specification, a barrier film is a film having a function of suppressing the permeation of impurities such as hydrogen and oxygen. When the barrier film has conductivity, it may be referred to as a conductive barrier film. It may be called.

[0057] In this specification and the like, metal oxide means an oxide of a metal in a broad sense. Metal oxides include oxide insulators and oxide conductors (including transparent oxide conductors). ​​​​​.), oxide semiconductor (also simply referred to as Oxide Semiconductor or OS) .) and the like. For example, when a metal oxide is used for the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when described as an OS FET or an OS transistor, it can be paraphrased as a transistor having an oxide or an oxide semiconductor.

[0058] Also, in this specification and the like, normally-off means that when no potential is applied to the gate or when a ground potential is applied to the gate, the current per 1 μm channel width flowing through the transistor is 1×10 -20 A or less at room temperature, 1×10 -18 A or less at 85 °C, or 1×10 -16 A or less at 125 °C.

[0059] (Embodiment 1) Hereinafter, an example of a semiconductor device having a transistor 200 according to one aspect of the present invention will be described.

[0060] <Configuration Example of Semiconductor Device> FIGS. 1(A), 1(B), and 1(C) are top views and cross-sectional views of a transistor 2 00 according to one aspect of the present invention and the periphery thereof.

[0061] FIG. 1(A) is a top view of a semiconductor device having a transistor 200. Also, FIG. 1( B) and FIG. 1(C) are cross-sectional views of the semiconductor device. Here, FIG. 1(B) is a cross-sectional view of the portion indicated by the dashed line A1 - A2 in FIG. 1( A), and is also a cross-sectional view in the channel length direction of the transistor 200. Further, FIG. 1(C) is a dashed line A3 - A4 in FIG. 1(A) ​​​It is a cross-sectional view of the part shown, and also a cross-sectional view in the channel width direction of the transistor 200. Also, in the top view of FIG. 1(A), some elements are omitted for clarity of the figure.

[0062] A semiconductor device according to an aspect of the present invention includes a transistor 200, an insulator 210 that functions as an interlayer film, an insulator 212, and an insulator 281. Further, conductors 203 that are electrically connected to the transistor 200 and function as wiring, and conductors 24 0 (conductor 240a and conductor 240b) that function as plugs.

[0063] Note that in the conductor 203, a conductor 203a is formed in contact with the inner wall of the opening of the insulator 212 , and a conductor 203b is further formed inside. Here, the height of the upper surface of the conductor 203 and the height of the upper surface of the insulator 212 can be made approximately the same. In the transistor 200, the conductor 203 has a stacked structure of the conductor 203a and the conductor 203b. However, the present invention is not limited to this. For example, the conductor 203 may be provided as a single layer or a stacked structure of three or more layers. When the structure has a stacked structure, ordinal numbers may be assigned in the formation order to distinguish them.

[0064] Also, the conductor 240 has a first conductor of the conductor 240 formed in contact with the inner walls of the openings of the insulator 244, the insulator 280, the insulator 274, and the insulator 2 81, and a second conductor of the conductor 240 is further formed inside. Here, the height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 281 can be made approximately the same. In the transistor 200, the structure in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are stacked is shown, but the present invention is not limited to this. The present invention is not limited to this. For example, the conductor 240 may be provided in a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, ordinal numbers may be assigned in the order of formation for distinction.

[0065] [Transistor 200] As shown in FIG. 1, the transistor 200 includes an oxide 230a disposed on a substrate (not shown), an oxide 230b disposed on the oxide 230a, conductors 242a and 242b disposed apart from each other on the oxide 230b, an insulator 280 disposed on the conductors 242a and 242b and having an opening formed therein so as to overlap between the conductors 242a and 242b, a conductor 260 disposed in the opening, an insulator 250 disposed between the oxide 230b, the conductors 242a, 242b, and the insulator 280 and the conductor 260, and an oxide 230c disposed between the oxide 230b, the conductors 242a, 242b, and the insulator 280 and the insulator 250. Also, as shown in FIG. 1, an insulator 244 is preferably disposed between the oxide 230a, the oxide 230b, the conductors 242a and 242b, and the insulator 280. Further, as shown in FIG. 1, the conductor 260 preferably includes a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a. Also, as shown in FIG. 1, an insulator 274 is preferably disposed on the insulator 280, the conductor 260, and the insulator 250.

[0066] Hereinafter, the oxide 230a, the oxide 230b, and the oxide 230c are collectively referred to as... Sometimes it is referred to as oxide 230. Also, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. Sometimes it is referred to as the conductor 242.

[0067] In the transistor 200, a region where a channel is formed (hereinafter also referred to as a channel formation region) and, in the vicinity thereof, a structure in which three layers of the oxide 230a, the oxide 230b, and the oxide 230c are laminated is shown, but the present invention is not limited to this. For example, a single layer of the oxide 230b, a two-layer structure of the oxide 230b and the oxide 230a, a two-layer structure of the oxide 230b and the oxide 230c, or a laminated structure of four or more layers may be provided. Also, in the transistor 200, the conductor 260 is shown as a two-layer laminated structure, but the present invention is not limited to this. For example, the conductor 260 may have a single-layer structure or a laminated structure of three or more layers. Here, the conductor 260 functions as a gate electrode of the transistor, and the conductor 242a and the conductor 242b function as a source electrode or a drain electrode, respectively. As described above, the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and the region sandwiched between the conductor 242a and the conductor 242b. Here, the arrangement of the conductor 260, the conductor 242a, and the conductor 242b is self-aligned with respect to the opening of the insulator 280. That is, in the transistor 200, the gate electrode can be self-alignedly arranged between the source electrode and the drain electrode. Therefore, the conductor 260 can be formed without providing an alignment mark, so that the occupied area of the transistor 200 can be reduced.

[0068] can be achieved. As a result, miniaturization and high integration of the semiconductor device can be achieved.

[0069] Furthermore, since the conductor 260 is self-alignedly formed in the region between the conductors 242a and 242b, the conductor 260 does not have an overlapping region with the conductor 242a or the conductor 242b. As a result, the parasitic capacitance formed between the conductor 260 and the conductors 242a and 242b can be reduced. Therefore, the switching speed of the transistor 200 can be improved, and the transistor 200 can have high frequency characteristics.

[0070] Also, the transistor 200 preferably includes an insulator 214 disposed on the insulator 212, an insulator 216 disposed on the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 214 and the insulator 216, an insulator 220 disposed on the insulator 216 and the conductor 205, an insulator 222 disposed on the insulator 220, and an insulator 224 disposed on the insulator 222. Preferably, an oxide 230a is disposed on the insulator 224.

[0071] Also, for the transistor 200 using a metal oxide (hereinafter also referred to as an oxide semiconductor) that functions as an oxide semiconductor in the oxide 230 (oxide 230a, oxide 230b, and oxide 230c) including the channel formation region, it is preferable to use an oxide semiconductor.

[0072] Since the transistor 200 using an oxide semiconductor in the channel formation region has an extremely small leakage current in the non-conducting state, a semiconductor device with low power consumption can be provided. Also, since the oxide semiconductor can be formed into a film using a sputtering method or the like, a highly integrated semiconductor device can be configured. ​ It can be used for the transistor 200.

[0073] For example, as the oxide 230, an In-M-Zn oxide (element M is selected from one or more of aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) or the like of metal oxides may be used. Also, as the oxide 230, an In-Ga oxide or an In-Zn oxide may be used. of metal oxides may be used. Also, as the oxide 230, an In-Ga oxide or an In-Zn oxide may be used. luminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) or the like of metal oxides may be used. Also, as the oxide 230, an In-Ga oxide or an In-Zn oxide may be used. one or more selected from the group consisting of) or the like of metal oxides may be used. Also, as the oxide 230, an In-Ga oxide or an In-Zn oxide may be used. of metal oxides may be used. Also, as the oxide 230, an In-Ga oxide or an In-Zn oxide may be used. oxide or an In-Zn oxide may be used.

[0074] Here, when impurities such as hydrogen, nitrogen, or a metal element are present in the oxide 230, the carrier density may increase and the resistance may decrease. Also, when the oxygen concentration contained in the oxide 230 decreases, the carrier density may increase and the resistance may decrease. Here, when impurities such as hydrogen, nitrogen, or a metal element are present in the oxide 230, the carrier density may increase and the resistance may decrease. Also, when the oxygen concentration contained in the oxide 230 decreases, the carrier density may increase and the resistance may decrease. Here, when impurities such as hydrogen, nitrogen, or a metal element are present in the oxide 230, the carrier density may increase and the resistance may decrease. Also, when the oxygen concentration contained in the oxide 230 decreases, the carrier density may increase and the resistance may decrease.

[0075] When the conductor 242 (conductor 242a and conductor 242b) provided in contact with the oxide 230 and functioning as a source electrode or a drain electrode has a function of absorbing oxygen of the oxide 230, or has a function of supplying impurities such as hydrogen, nitrogen, or a metal element to the oxide 230, a low-resistance region may be partially formed in the oxide 230. When the conductor 242 (conductor 242a and conductor 242b) provided in contact with the oxide 230 and functioning as a source electrode or a drain electrode has a function of absorbing oxygen of the oxide 230, or has a function of supplying impurities such as hydrogen, nitrogen, or a metal element to the oxide 230, a low-resistance region may be partially formed in the oxide 230. When the conductor 242 (conductor 242a and conductor 242b) provided in contact with the oxide 230 and functioning as a source electrode or a drain electrode has a function of absorbing oxygen of the oxide 230, or has a function of supplying impurities such as hydrogen, nitrogen, or a metal element to the oxide 230, a low-resistance region may be partially formed in the oxide 230. When the conductor 242 (conductor 242a and conductor 242b) provided in contact with the oxide 230 and functioning as a source electrode or a drain electrode has a function of absorbing oxygen of the oxide 230, or has a function of supplying impurities such as hydrogen, nitrogen, or a metal element to the oxide 230, a low-resistance region may be partially formed in the oxide 230. a low-resistance region may be partially formed in the oxide 230.

[0076] The insulator 244 is provided to suppress the oxidation of the conductor 242. Therefore, when the conductor 242 is made of an oxidation-resistant material or its conductivity does not significantly decrease even when it absorbs oxygen, the insulator 244 does not necessarily need to be provided. The insulator 244 is provided to suppress the oxidation of the conductor 242. Therefore, when the conductor 242 is made of an oxidation-resistant material or its conductivity does not significantly decrease even when it absorbs oxygen, the insulator 244 does not necessarily need to be provided. The insulator 244 is provided to suppress the oxidation of the conductor 242. Therefore, when the conductor 242 is made of an oxidation-resistant material or its conductivity does not significantly decrease even when it absorbs oxygen, the insulator 244 does not necessarily need to be provided.

[0077] Here, an enlarged view of region 239, which is surrounded by a dashed line in FIG. 1(B), is shown in FIG. 2. FIG. 2 As shown in FIG. 2, the insulator 250 has a film thickness T1 between the oxide 230b and the conductor 260 and has a film thickness T2 between the conductor 242a or the conductor 242b and the conductor 260. In the insulator 250, it is preferable that the film thickness T1 is thinner than the film thickness T2.

[0078] To make the film thickness T1 of the insulator 250 thinner than the film thickness T2, for example, the insulator 250 located between the oxide 230b and the conductor 260 is made into a single layer, and the insulator 250 located between the conductor 242 and the conductor 260 is preferably made into a laminated structure. When the insulator 250 located between the oxide 230b and the conductor 260 is made into a laminated structure, the number of laminations of the insulator 250 located between the conductor 242 and the conductor 260 may be more than the number of laminations of the insulator 250 located between the oxide 230b and the conductor 260.

[0079] By making the film thickness T2 of the insulator 250 thicker than the film thickness T1 in this way, the parasitic capacitance between the conductor 260 and the conductor 242 can be reduced, and the transistor 200 having high frequency characteristics can be provided. Furthermore, since the film thickness T1 is thin, the electric field from the gate electrode does not weaken, so the transistor 200 having good electrical characteristics can be provided.

[0080] Also, as shown in FIG. 2, the conductor 242 is provided so as to be in contact with the oxide 230, and in the interface between the oxide 230 and the conductor 242 and in the vicinity thereof, regions 243 ( region 243a and region 243b) are formed as low resistance regions. The oxide 230 includes a region 234 that functions as a channel formation region of the transistor 200 and a part of the region 243, and the source ​​​​​​​​​​​ A region 231 (region 231a and region 231 b) that functions as a source region or a drain region, and a region 232 (region 232a, and region 232b) that includes a part of region 243 and functions as a junction region.

[0081] In the region 231 that functions as a source region or a drain region, particularly, region 243 has a low oxygen concentration or contains impurities such as hydrogen, nitrogen, and metal elements, which increases the carrier concentration and results in a low-resistance region. That is, region 231 is a region with a high carrier density and low resistance as compared with region 234. Also, the region 234 that functions as a channel formation region is a high-resistance region with a low carrier density because, among region 231, particularly, it has a higher oxygen concentration or a lower impurity concentration than region 243. Further, the oxygen concentration of region 232 is preferably equal to or higher than the oxygen concentration of region 231, and equal to or lower than the oxygen concentration of region 234. Or, the impurity concentration of region 232 is preferably equal to or lower than the impurity concentration of region 231, and equal to or higher than the impurity concentration of region 234.

[0082] When the low-resistance region 243 contains a metal element, region 243 preferably has one or more metal elements selected from among metal elements such as aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum in addition to the metal elements contained in the oxide 23 0.

[0083] In addition, in FIG. 2, the region 243 is a thickness direction of the oxide 230b. However, the present invention is not limited to this. For example, the region 24 3 may have a thickness approximately equal to that of oxide 230b, or may be the same thickness as oxide 230a. 2, the region 243 may be formed between the region 231 and the region 232. However, the present invention is not limited to this. For example, the insulating film 232 may be formed only in the region 231. However, it may be formed in the region 231 and a part of the region 232, or it may be formed in the region 231 and a part of the region 232. It may be formed in the region 232 and a part of the region 234 .

[0084] In addition, it may be difficult to clearly detect the boundaries between the regions of the oxide 230. The concentrations of metal elements, hydrogen, nitrogen, and other impurity elements detected in each region are The change is not limited to gradual changes in each area, but also continuous changes (also called gradation) within each area. In other words, the closer to the channel formation region, the more the metal elements, etc. It is sufficient that the concentrations of impurity elements such as hydrogen and nitrogen are reduced.

[0085] In order to selectively reduce the resistance of the oxide 230, for example, aluminum is used as the conductor 242. Aluminum, Chromium, Copper, Silver, Gold, Platinum, Tantalum, Nickel, Titanium, Molybdenum, Tungsten Tennium, hafnium, vanadium, niobium, manganese, magnesium, zirconium, Conductive ions such as lithium, indium, ruthenium, iridium, strontium, and lanthanum It is preferable to use a material containing at least one of a metal element and an impurity that enhances the resistance. Alternatively, in the formation of the conductive film 242A which becomes the conductor 242, oxygen deficiency is generated in the oxide 230. Materials into which impurities such as elements to be formed or elements trapped by oxygen vacancies are implanted, film formation methods, etc. may be used. For example, examples of such elements include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, noble gases, etc. Representative examples of noble gas elements include helium, neon, argon, krypton, and xenon, etc.

[0086] Here, in a transistor using an oxide semiconductor, if there are impurities and oxygen vacancies in the region where the channel in the oxide semiconductor is formed, the electrical characteristics are likely to fluctuate and the reliability may deteriorate. In addition, if the region where the channel in the oxide semiconductor is formed contains oxygen vacancies, the transistor is likely to have normally-on characteristics. Therefore, it is preferable that the oxygen vacancies in the region 234 where the channel is formed are reduced as much as possible.

[0087] To suppress the normally-on state of the transistor, it is preferable that the insulator 250 adjacent to the oxide 230 contains more oxygen (also referred to as excess oxygen) than oxygen that satisfies the stoichiometric composition. The oxygen contained in the insulator 250 diffuses into the oxide 230, reducing the oxygen vacancies in the oxide 230 and suppressing the normally-on state of the transistor.

[0088] That is, by the oxygen contained in the insulator 250 and the insulator 280 diffusing into the region 234 of the oxide 230, the oxygen vacancies in the region 234 of the oxide 230 can be reduced.

[0089] In addition, to provide an oxygen region in the insulator 250 and the insulator 280, an oxide is used as the insulator 274 in contact with the upper surfaces of the insulator 250 and the insulator 280, and formed by sputtering.​​​​​​​​ It is preferable to form a film. By using a sputtering method for forming the oxide film, an insulator containing a large amount of oxygen and having few impurities such as water or hydrogen can be formed. For example, for the insulator 274, it is preferable to use aluminum oxide.

[0090] During film formation by the sputtering method, ions and sputtered particles exist between the target and the substrate. For example, the target is connected to a power supply and a potential E0 is applied. Also, a potential E1 such as a ground potential is applied to the substrate. However, the substrate may be electrically floating. Also, a region having a potential E2 exists between the target and the substrate. The magnitude relationship of each potential is E2 > E1 > E0. Ions in the plasma are accelerated by the potential difference E2 - E0 and collide with the target,

[0091] whereby particles sputtered from the target are ejected. The sputtered particles adhere to and deposit on the film formation surface, thereby forming a film. Also, some ions are rebounded by the target, pass through the film formed as rebounded ions, and may be taken into the insulator 250 and the insulator 280 in contact with the film formation surface. Also, ions in the plasma are accelerated by the potential difference E2 - E1 and impact the film formation surface. At this time, some ions reach inside the insulator 280. When ions are taken into the insulator 250 and the insulator 280, a region where the ions are taken in is formed in the insulator 280. That is, when the ions are ions containing oxygen, an excess oxygen region is formed in the insulator 250 and the insulator 280.

[0092] By introducing excess oxygen into the insulator 250 and the insulator 280, an excess oxygen region can be formed in the insulator 250 and the insulator 280. The excess oxygen in the insulator 250 and the insulator 28 0 is supplied to the oxide 230 by heat treatment or the like, and the oxygen deficiency in the region 234 of the oxide 230 can be filled.

[0093] Note that the insulator 280 is preferably made of silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide having pores. Materials such as silicon oxynitride tend to form an excess oxygen region. On the other hand, compared with materials such as the above-mentioned silicon oxynitride, even if the oxide 230 is formed on the oxide 230 by a sputtering method, an excess oxygen region is less likely to be formed. Therefore, by providing the insulator 280 having an excess oxygen region around the region 234 of the oxide 230, the excess oxygen of the insulator 280 can be effectively supplied to the region 234 of the oxide 230.

[0094] From the above, a semiconductor device having a transistor with a large on-current can be provided. Or, a semiconductor device having a transistor with a small off-current can be provided. Or, a semiconductor device that suppresses fluctuations in electrical characteristics, has stable electrical characteristics, and has improved reliability can be provided.

[0095] Hereinafter, the detailed configuration of a semiconductor device having a transistor 200 according to one aspect of the present invention will be described.

[0096] As shown in FIGS. 1(A) and 1(C), the conductor 203 extends in the channel width direction. It functions as a wiring for applying a potential to the conductor 205. Note that the conductor 203 is preferably embedded in the insulator 212. It is preferably provided embedded in the insulator 212.

[0097] The conductor 205 is arranged so as to overlap with the oxide 230 and the conductor 260. Also, the conductor 205 may be provided in contact with the conductor 203. Further, the conductor 205 is preferably provided embedded in the insulators 214 and 216. It is preferably provided embedded in the insulators 214 and 216.

[0098] Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the Vth of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be made larger than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied. Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the Vth of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be made larger than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied. Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the Vth of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be made larger than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied. Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the Vth of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be made larger than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied. Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the Vth of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be made larger than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied. Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the Vth of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be made larger than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied. Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the Vth of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be made larger than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied. Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the Vth of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the Vth of the transistor 200 can be made larger than 0 V, and the off-current can be reduced. Therefore, applying a negative potential to the conductor 205 can make the drain current smaller when the potential applied to the conductor 260 is 0 V than when no potential is applied.

[0099] Also, by providing the conductor 205 on the conductor 203, it is possible to appropriately design the distance between the conductor 203 and the conductor 260 which has the functions of a first gate electrode and a wiring. That is, by providing the insulators 214 and 216 between the conductor 203 and the conductor 260, the parasitic capacitance between the conductor 203 and the conductor 260 can be reduced, and the breakdown voltage between the conductor 203 and the conductor 260 can be increased. Also, by providing the conductor 205 on the conductor 203, it is possible to appropriately design the distance between the conductor 203 and the conductor 260 which has the functions of a first gate electrode and a wiring. That is, by providing the insulators 214 and 216 between the conductor 203 and the conductor 260, the parasitic capacitance between the conductor 203 and the conductor 260 can be reduced, and the breakdown voltage between the conductor 203 and the conductor 260 can be increased. Also, by providing the conductor 205 on the conductor 203, it is possible to appropriately design the distance between the conductor 203 and the conductor 260 which has the functions of a first gate electrode and a wiring. That is, by providing the insulators 214 and 216 between the conductor 203 and the conductor 260, the parasitic capacitance between the conductor 203 and the conductor 260 can be reduced, and the breakdown voltage between the conductor 203 and the conductor 260 can be increased. Also, by providing the conductor 205 on the conductor 203, it is possible to appropriately design the distance between the conductor 203 and the conductor 260 which has the functions of a first gate electrode and a wiring. That is, by providing the insulators 214 and 216 between the conductor 203 and the conductor 260, the parasitic capacitance between the conductor 203 and the conductor 260 can be reduced, and the breakdown voltage between the conductor 203 and the conductor 260 can be increased. Also, by providing the conductor 205 on the conductor 203, it is possible to appropriately design the distance between the conductor 203 and the conductor 260 which has the functions of a first gate electrode and a wiring. That is, by providing the insulators 214 and 216 between the conductor 203 and the conductor 260, the parasitic capacitance between the conductor 203 and the conductor 260 can be reduced, and the breakdown voltage between the conductor 203 and the conductor 260 can be increased.

[0100] Also, by reducing the parasitic capacitance between the conductor 203 and the conductor 260, the switching speed of the transistor 2 00 can be improved, and a transistor with high frequency characteristics can be obtained. Also, by increasing the breakdown voltage between the conductor 203 and the conductor 260, the reliability of the transistor 200 can be improved. Therefore, it is preferable to increase the film thicknesses of the insulator 214 and the insulator 216 . Note that the extending direction of the conductor 203 is not limited to this, and for example, it may be extended in the channel length direction of the transistor 200 .

[0101] Note that the conductor 205 is arranged so as to overlap with the oxide 230 and the conductor 260 as shown in Fig. 1(A). Also, the conductor 205 is preferably provided larger than the region 234 in the oxide 230 . In particular, as shown in Fig. 1(C), the conductor 205 preferably extends also in a region outside the end portion intersecting with the channel width direction of the region 234 of the oxide 23 0. That is, outside the side surface in the channel width direction of the oxide 230, it is preferable that the conductor 205 and the conductor 260 overlap via an insulator .

[0102] By having the above configuration, when a potential is applied to the conductor 260 and the conductor 205, the electric field generated from the conductor 260 and the electric field generated from the conductor 205 are connected, and the channel formation region formed in the oxide 2 30 can be covered .

[0103] That is, the electric field of the conductor 260 having the function as the first gate electrode and the electric field of the conductor 205 having the function as the second gate electrode can electrically surround the channel formation region of the region 234 . In this specification, the first gate electrode and the second​​​ The structure of a transistor that electrically surrounds a channel formation region by the electric field of a gate electrode is called a surrounded channel (S-channel) structure.

[0104] Further, the conductor 205 is in contact with the inner walls of the openings of the insulator 214 and the insulator 216 to form a conductor 205a, and a conductor 205b is further formed inside. Here, the heights of the upper surfaces of the conductor 2 05a and the conductor 205b can be made approximately the same as the height of the upper surface of the insulator 216 In the transistor 200, the structure of laminating the conductor 205a and the conductor 205b is shown, but the present invention is not limited to this. For example, the conductor 205 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a laminated structure ordinal numbers may be assigned in the order of formation for distinction.

[0105] Here, the conductor 205a or the conductor 203a has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms (the above impurities are difficult to permeate). It is preferable to use a conductive material having such a function. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate). Note that in this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of any one or all of the above impurities or the above oxygen. Since the conductor 205a or the conductor 203a has a function of suppressing the diffusion of oxygen,

[0106] ​​​It is possible to suppress the oxidation of the conductor 205b or the conductor 203b and the resulting decrease in conductivity. As the conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like is preferably used. Therefore, as the conductor 205a or the conductor 203a, the above conductive material may be used as a single layer or a laminate. This can suppress the diffusion of impurities such as hydrogen and water through the conductor 203 and the conductor 205 to the transistor 200 side.

[0107] In addition, for the conductor 205b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. Although the conductor 205b is illustrated as a single layer, it may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride, and the above conductive material.

[0108] In addition, since the conductor 203b functions as a wiring, it is preferable to use a conductor having higher conductivity than the conductor 205b. For example, a conductive material mainly composed of copper or aluminum can be used. The conductor 203b may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride, and the above conductive material.

[0109] In particular, it is preferable to use copper for the conductor 203b. Since copper has a small resistance, it is preferably used for wirings and the like. On the other hand, since copper is likely to diffuse, it may reduce the electrical characteristics of the transistor 200 by diffusing into the oxide 230. Therefore, for example, for the insulator 214, a material such as aluminum oxide or hafnium oxide with low copper permeability can be used to suppress the diffusion of copper.

[0110] Note that the conductor 205, the insulator 214, and the insulator 216 do not necessarily have to be provided. . In that case, a part of the conductor 203 can function as the second gate electrode.

[0111] The insulator 210 and the insulator 214 preferably function as barrier insulating films that suppress impurities such as water or hydrogen from entering the transistor 200 from the substrate side. Thus, the insulator 210 and the insulator 214 preferably use an insulating material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms (the above impurities are difficult to permeate). Or, it is preferable to use an insulating material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate). For example, it is preferable to use aluminum oxide or the like as the insulator 210 and silicon nitride or the like as the insulator 214. Thereby, it is possible to suppress the diffusion of impurities such as hydrogen and water from the substrate side to the transistor 200 side through the insulator 210 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side rather than the insulator 210 and the insulator 21 4. Also, by adopting a configuration in which the conductor 205 is laminated and provided on the conductor 203, the insulator 214 can be provided between the conductor 203 and the conductor 205. Here, even if a metal such as copper that easily diffuses is used for the conductor 20

[0112] 3b, it is provided with silicon nitride or the like as the insulator 214.

[0113] Moreover, by forming a structure in which the conductor 205 is laminated on the conductor 203, an insulator 214 can be provided between the conductor 203 and the conductor 205. Here, even if a metal such as copper that easily diffuses is used for the conductor 20 3b, silicon nitride or the like is provided as the insulator 214. By doing so, diffusion of the metal into the layer above the insulator 214 can be suppressed. .

[0114] Also, the insulators 212, 216, 280, and insulator 281 that function as interlayer films preferably have a lower dielectric constant than the insulator 210 or the insulator 214. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced. .

[0115] For example, as the insulators 212, 216, 280, and 281, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide , tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (Ba,Sr)TiO3 (BST) and other insulators can be used in a single layer or in a stacked manner. Alternatively, for example, aluminum oxide can be added to these insulators. Or these insulators can be nitrided. Silicon oxide, silicon oxynitride, or nitride silicon can be laminated on the above insulators and used.

[0116] The insulators 220, 222, 224, and 250 have the function as a gate insulator.

[0117] Here, for the insulator 224 in contact with the oxide 230, it is preferable to use an insulator containing more oxygen than stoichiometric composition oxygen. That is, in the insulator 224, an excess oxygen region Preferably, a region is formed. By providing such an insulator containing excess oxygen in contact with the oxide 230, oxygen vacancies in the oxide 230 can be reduced, and the reliability of the transistor 200 can be improved. As the insulator having an excess oxygen region, specifically, it is preferable to use an oxide material in which some oxygen is desorbed by heating. The oxide that desorbs oxygen by heating is an oxide film in which the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 atoms / cm

[0118] or more, preferably 1.0×10 atoms / cm or more, more preferably 2.0×10 atoms / cm 18 or more, or 3.0×10 3 atoms / cm or more, as determined by TDS (Thermal Desorption Spectroscopy) analysis. Note that the surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 1 19 00°C or higher and 400°C or lower. 3 atoms / cm 19 atoms / c m 3 or more, or 3.0×10 20 atoms / cm 3 or more. In addition, when the insulator 224 has an excess oxygen region, the insulator 222 preferably has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). (It is difficult for the above oxygen to permeate.) By having a function of suppressing the diffusion of oxygen and impurities, the oxygen possessed by the insulator 222 does not diffuse to the insulator 220 side, which is preferable. Also, the conductor 205 can be prevented from reacting with the oxygen possessed by the insulator 224 and the oxide 230.

[0119] When the insulator 222 has a function of suppressing the diffusion of oxygen and impurities, the oxygen possessed by the oxide 230 does not diffuse to the insulator 220 side, which is preferable. Also, the conductor 205 can be prevented from reacting with the oxygen possessed by the insulator 224 and the oxide 230. When the insulator 222 has a function of suppressing the diffusion of oxygen and impurities, the oxygen possessed by the oxide 230 does not diffuse to the insulator 220 side, which is preferable. Also, the conductor 205 can be prevented from reacting with the oxygen possessed by the insulator 224 and the oxide 230. When the insulator 222 has a function of suppressing the diffusion of oxygen and impurities, the oxygen possessed by the oxide 230 does not diffuse to the insulator 220 side, which is preferable. Also, the conductor 205 can be prevented from reacting with the oxygen possessed by the insulator 224 and the oxide 230.

[0120] When the insulator 222 has a function of suppressing the diffusion of oxygen and impurities, the oxygen possessed by the oxide 230 does not diffuse to the insulator 220 side, which is preferable. Also, the conductor 205 can be prevented from reacting with the oxygen possessed by the insulator 224 and the oxide 230. When the insulator 222 has a function of suppressing the diffusion of oxygen and impurities, the oxygen possessed by the oxide 230 does not diffuse to the insulator 220 side, which is preferable. Also, the conductor 205 can be prevented from reacting with the oxygen possessed by the insulator 224 and the oxide 230. When the insulator 222 has a function of suppressing the diffusion of oxygen and impurities, the oxygen possessed by the oxide 230 does not diffuse to the insulator 220 side, which is preferable. Also, the conductor 205 can be prevented from reacting with the oxygen possessed by the insulator 224 and the oxide 230.

[0121] The insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, or zinc oxide. Lead zirconate titanate (PZT), strontium titanate (SrTiO3 ) or (Ba,Sr)TiO3 (BST), which are so-called high-k materials It is preferable to use the material in a single layer or a multilayer structure. As this progresses, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material as the insulator that functions as a thermal insulator, This makes it possible to reduce the gate potential during transistor operation.

[0122] In particular, it has the function of suppressing the diffusion of impurities and oxygen (the oxygen is less likely to permeate). ) Insulating materials containing oxides of one or both of aluminum and hafnium. It is advisable to use an insulator, which may contain oxides of either or both of aluminum and hafnium. The insulators include aluminum oxide, hafnium oxide, aluminum and hafnium. It is preferable to use oxides such as hafnium aluminate. When the insulator 222 is formed by using the above-mentioned method, the insulator 222 is resistant to oxygen release from the oxide 230 and A layer for suppressing the intrusion of impurities such as hydrogen from the periphery of the transistor 200 into the oxide 230. It functions as such.

[0123] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, etc. may be added to these insulators. tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0124] In addition, the insulator 220 is preferably thermally stable. For example, silicon oxide and Silicon oxide nitride and silicon oxynitride are thermally stable and therefore suitable as high-k materials for insulator and insulator 2. By combining with 20, it is possible to obtain a laminated structure that is thermally stable and has a high relative dielectric constant. do.

[0125] The insulators 220, 222, and 224 each have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, and may be made of different materials. A laminated structure may also be used.

[0126] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide 230b on the oxide 230a. The oxide 230c is located on the oxide 230b. The oxide 230a is located under the oxide 230b. As a result, impurities from the structure formed below the oxide 230a are transferred to the oxide 230b. The diffusion can be suppressed. In addition, by having the oxide 230c on the oxide 230b, Diffusion of impurities from structures formed above oxide 230c into oxide 230b can be suppressed.

[0127] The oxide 230 has a layered structure made of oxides having different atomic ratios of metal atoms. Specifically, in the metal oxide used for the oxide 230a, the constituent elements The atomic ratio of element M in the oxide 230b is the atomic ratio of element M in the metal oxide in the constituent elements. It is preferable that the atomic ratio of the metal oxide used for the oxide 230a is larger than that of the element M. In the case where the atomic ratio of element M to In is greater than the atomic ratio of element M to In in the metal oxide used for the oxide 230b. It is preferably greater. Also, in the metal oxide used for the oxide 230b, the atomic ratio of In to element M is preferably greater than the atomic ratio of In to element M in the metal oxide used for the oxide 230a. Also, the oxide 230c can use a metal oxide that can be used for the oxide 230a or the oxide 230b. the oxide 230c can use a metal oxide that can be used for the oxide 230a or the oxide 230b. the oxide 230c can use a metal oxide that can be used for the oxide 230a or the oxide 230b.

[0128] Also, the energy at the lower end of the conduction band of the oxide 230a and the oxide 230c is preferably higher than the energy at the lower end of the conduction band of the oxide 23 0b. In other words, the electron affinity of the oxide 230a and the oxide 230c is preferably smaller than the electron affinity of the oxide 230b. 0b. In other words, the electron affinity of the oxide 230a and the oxide 230c is preferably smaller than the electron affinity of the oxide 230b. 0b. In other words, the electron affinity of the oxide 230a and the oxide 230c is preferably smaller than the electron affinity of the oxide 230b.

[0129] Here, at the junction of the oxide 230a, the oxide 230b, and the oxide 230c, the energy level at the lower end of the conduction band changes smoothly. In other words, the energy level at the lower end of the conduction band at the junction of the oxide 230a, the oxide 230b, and the oxide 230c can also be said to change continuously or be continuously joined. To achieve this, it is advisable to lower the density of defect levels in the mixed layer formed at the interface between the oxide 230a and the oxide 230b and at the interface between the oxide 230b and the oxide 230c. the energy level at the lower end of the conduction band changes smoothly. In other words, the energy level at the lower end of the conduction band at the junction of the oxide 230a, the oxide 230b, and the oxide 230c can also be said to change continuously or be continuously joined. To achieve this, it is advisable to lower the density of defect levels in the mixed layer formed at the interface between the oxide 230a and the oxide 230b and at the interface between the oxide 230b and the oxide 230c. the energy level at the lower end of the conduction band changes smoothly. In other words, the energy level at the lower end of the conduction band at the junction of the oxide 230a, the oxide 230b, and the oxide 230c can also be said to change continuously or be continuously joined. To achieve this, it is advisable to lower the density of defect levels in the mixed layer formed at the interface between the oxide 230a and the oxide 230b and at the interface between the oxide 230b and the oxide 230c. Specifically, by having a common element other than oxygen (as the main component) between the oxide 230a and the oxide 230b and between the oxide 230b and the oxide 230c, a mixed layer with a low defect level density can be formed. For example, when the oxide 230b is an In-Ga-Zn oxide,

[0130] Specifically, by having a common element other than oxygen (as the main component) between the oxide 230a and the oxide 230b and between the oxide 230b and the oxide 230c, a mixed layer with a low defect level density can be formed. For example, when the oxide 230b is an In-Ga-Zn oxide, formed. For example, when the oxide 230b is an In-Ga-Zn oxide, As the object 230a and the oxide 230c, indium-gallium-zinc oxide, gallium-zinc oxide, gallium oxide or the like may be used.

[0131] At this time, the main path of carriers may be the oxide 230b. By configuring the oxide 230a and the oxide 230c as described above, the density of defect energy levels at the interface between the oxide 230a and the oxide 230b and at the interface between the oxide 230b and the oxide 230c can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the transistor 200 can obtain a high on-current.

[0132] In addition, the oxide 230 has a region 231 and a region 234. Note that at least a part of the region 231 has a region in contact with the conductor 242.

[0133] Note that when the transistor 200 is turned on, the region 231a or the region 231b functions as a source region or a drain region. On the other hand, at least a part of the region 234 functions as a region where a channel is formed. Further, a region 232 that functions as a junction region may be provided between the region 231 and the region 234. That is, by appropriately selecting the range of each region, a transistor having electrical characteristics

[0134] matching the requirements can be easily provided according to the circuit design. That is, by appropriately selecting the range of each region, a transistor having electrical characteristics

[0135] The oxide 230 preferably uses a metal oxide that functions as an oxide semiconductor (hereinafter, also referred to as an oxide semiconductor). For example, as the metal oxide that becomes the region 234, those having a band gap of 2 eV or more, preferably 2.5 eV or more are preferably used. As such, by using a metal oxide with a large band gap, the off-current of the transistor can be reduced.

[0136] A transistor using an oxide semiconductor has an extremely small leakage current in the non-conducting state Therefore, a low-power semiconductor device can be provided. In addition, since the oxide semiconductor can be formed into a film using a sputtering method or the like, it can be used for transistors constituting a highly integrated semiconductor device.

[0137] On the oxide 230b, conductors 242 (conductor 242a and conductor 242b) that function as source electrodes and drain electrodes are provided. As the conductor 242, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, or an alloy containing the above-described metal elements as components, or an alloy formed by combining the above-described metal elements is preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. are preferably used. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are conductive materials that are difficult to oxidize, or materials that maintain conductivity even when absorbing oxygen. ​​​​​​​Therefore, it is preferable.

[0138] By providing the conductor 242 so as to be in contact with the oxide 230, the oxygen concentration in the region 243 may be reduced. Further, a metal compound layer containing the metal contained in the conductor 242 and the component of the oxide 23 0 may be formed. In such a case, the carrier density in the region 243 increases, and the region 243 becomes a low-resistance region.

[0139] Here, the region between the conductor 242a and the conductor 242b overlaps with the opening of the insulator 280 and is formed. Thereby, the conductor 260 can be self-alignedly arranged between the conductor 242a and the conductor 242b.

[0140] The insulator 244 is provided so as to cover the conductor 242 and suppresses the oxidation of the conductor 242. At this time, the insulator 244 may cover the side surface of the oxide 230 and be provided so as to be in contact with the insulator 224.

[0141] As the insulator 244, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used. In particular, an insulator containing one or both of aluminum and hafnium oxides, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate), is preferably used. In particular, hafnium aluminate

[0142] has higher heat resistance than a hafnium oxide film. Therefore, in the thermal history in a later process, the junction It is preferable because it is difficult to crystallize. In addition, when the conductor 242 is a material having oxidation resistance or the conductivity does not significantly decrease even when oxygen is absorbed, the insulator 244 is not an essential component. It may be appropriately designed according to the required transistor characteristics. When oxygen is absorbed, if the conductivity does not significantly decrease, the insulator 244 is not an essential component. It may be appropriately designed according to the required transistor characteristics. It may be appropriately designed according to the required transistor characteristics.

[0143] The insulator 250 functions as a gate insulator. The insulator 250 is preferably disposed in contact with the inner side (upper surface and side surface) of the oxide 230c. The insulator 250 is preferably formed using an insulator that releases oxygen upon heating. For example, by temperature programmed desorption gas spectrometry (TDS analysis), the desorption amount of oxygen in terms of oxygen molecules is 1.0×10 ato ms / cm or more, preferably 1.0×10 18 atoms / cm or more, more preferably 2.0×10 3 atoms / cm 19 or more, still more preferably 3.0×10 3 atoms / cm or more, or 3.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / c m 3 or more, and is an oxide film. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower.

[0144] Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, and silicon oxide having pores can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat. Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, and silicon oxide having pores can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat. Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, and silicon oxide having pores can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

[0145] An insulator that releases oxygen upon heating is used as the insulator 250 on the upper surface of the oxide 230c. By providing it in contact, oxygen can be effectively supplied from the insulator 250, through the oxide 230c, to the region 234 of the oxide 230b Moreover, similar to the insulator 224, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 250 is reduced. The film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0146] In addition, the insulator 250 is provided not only between the oxide 230b and the conductor 260, but also between the conductor 242 and the conductor 260. Depending on the required film thickness of the insulator 250, a parasitic capacitance is formed between the conductor 242 and the conductor 260, which may adversely affect the characteristics of the transistor 200 or the semiconductor device. In such a case, the film thickness of the insulator 250 located between the conductor 242 and the conductor 260 is preferably made thicker than the film thickness of the insulator 250 located between the oxide 230b and the conductor 260. For this purpose, for example, the insulator 250 located between the conductor 242 and the conductor 260 is made into a two-layer structure, and the insulator 250 located between the oxide 230b and the conductor 260 is made into a single-layer structure. Although details will be described later, an insulating film serving as a first insulator is formed inside the oxide film 230C that becomes the oxide 230c, and anisotropic etching is performed on the insulating film to form the first insulator only on the inner wall of the oxide film 230C. Subsequently, by forming an insulating film serving as a second insulator, the insulator 250 located between the oxide 230b and the conductor 260 becomes a single-layer structure, and the insulator 250 located between the conductor 242 and the conductor 260 becomes a two-layer structure. Therefore, the film thickness of the insulator 250 located between the conductor 242 and the conductor 260 can be made thicker than the film thickness of the insulator 250 located between the oxide 230b and the conductor 260.

[0147] ​​​​​​​​​​ In addition, in order to efficiently supply the excess oxygen possessed by the insulator 250 to the oxide 230, a metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of excess oxygen from the insulator 250 to the conductor 260 is suppressed. That is, it is possible to suppress a decrease in the amount of excess oxygen supplied to the oxide 230. In addition, it is possible to suppress the oxidation of the conductor 260 by excess oxygen. In addition, the metal oxide may have a function as part of the gate insulator. Therefore, when silicon oxide, silicon oxynitride, etc. are used for the insulator 250, it is preferable to use a metal oxide which is a high-k material having a high relative permittivity as the metal oxide. By forming the gate insulator into a laminated structure of the insulator 250 and the metal oxide, a laminated structure that is stable against heat and has a high relative permittivity can be obtained. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator. Specifically, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. can be used. In particular, it is an insulator containing one or both oxides of aluminum or hafnium.

[0148] In addition, the metal oxide may have a function as part of the gate insulator. Therefore, when silicon oxide, silicon oxynitride, etc. are used for the insulator 250, it is preferable to use a metal oxide which is a high-k material having a high relative permittivity as the metal oxide. By forming the gate insulator into a laminated structure of the insulator 250 and the metal oxide, a laminated structure that is stable against heat and has a high relative permittivity can be obtained. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness of the gate insulator. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator. Specifically, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. can be used. In particular, it is an insulator containing one or both oxides of aluminum or hafnium.

[0149] Specifically, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. can be used. In particular, it is an insulator containing one or both oxides of aluminum or hafnium.

[0150] In particular, it is an insulator containing one or both oxides of aluminum or hafnium. , oxides containing aluminum oxide, hafnium oxide, aluminum, and hafnium (hafnium aluminate), etc. are preferably used. In particular, hafnium aluminate has higher heat resistance than the hafnium oxide film. Therefore, in the thermal history of subsequent processes, it is preferred because it is difficult to crystallize. Note that the metal oxide is not an essential component. It may be appropriately designed according to the required transistor characteristics.

[0151] The conductor 260 that functions as the first gate electrode is shown as a two-layer structure in FIG. 1 but may be a single-layer structure or a laminated structure of three or more layers.

[0152] Similar to the conductor 205a, the conductor 260a preferably uses a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms , nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms. Or, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). Preferably, a conductive material having a function of suppressing the diffusion of oxygen is used. Preferably, a conductive material having a function of suppressing the diffusion of oxygen is used.

[0153] In addition, since the conductor 260a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 260b by the oxygen contained in the insulator 250 and the decrease in conductivity. As a conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used. As a conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used. Preferably, a conductive material having a function of suppressing the diffusion of oxygen is used.

[0154] In addition, the conductor 260b preferably uses a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 260b also functions as a wiring, it is preferably used. It is preferable to use a conductor with high conductivity. For example, tungsten, copper, or aluminum A conductive material mainly composed of niobium can be used. Also, the conductor 260b may have a laminated structure For example, a laminated structure of titanium, titanium nitride, and the above conductive material may also be used is acceptable.

[0155] Also, as shown in FIG. 1(C), when the conductor 205 extends in a region outside the end portion intersecting the channel width direction of the oxide 230 the conductor 260 preferably overlaps the conductor 205 via the insulator 250 in that region. That is, outside the side surface of the oxide 230 it is preferable that the conductor 205, the insulator 250, and the conductor 260 form a laminated structure.

[0156] By having the above configuration, when a potential is applied to the conductor 260 and the conductor 205 the electric field generated from the conductor 260 and the electric field generated from the conductor 205 are connected and can cover the channel formation region formed in the oxide 2 30.

[0157] That is, the electric field of the conductor 260 having the function as the first gate electrode and the electric field of the conductor 205 having the function as the second gate electrode can electrically surround the channel formation region of the region 234.

[0158] The insulator 280 is provided on the conductor 242 via the insulator 244. The insulator 280 preferably has an excess oxygen region. For example, as the insulator 280, silicon oxide silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, having pores It is preferable to have silicon oxide, resin, etc. In particular, silicon oxide and silicon nitride are preferable because they are thermally stable. In particular, silicon oxide and silicon oxide having pores are preferable because an excess oxygen region can be

[0159] easily formed in a subsequent process. As described above, it is preferable that the insulator 280 has an excess oxygen region. By providing the insulator 280 from which oxygen is released by heating in contact with the oxide 230c, the oxygen in the insulator 280 can be efficiently supplied to the region 234 of the oxide 230 through the oxide 230c. It is preferable that the concentration of impurities such

[0160] as water or hydrogen in the insulator 280 is reduced. Also, the upper surface of the insulator 280 preferably substantially coincides with

[0161] the upper surface of the conductor 260 and the upper surface of the insulator 250. The insulator 274 is preferably provided in contact with the upper surface of the insulator 280, the upper surface of the conductor 260, and the upper surface of the insulator 250. By forming the insulator 274 by sputtering, an excess oxygen

[0162] region can be provided in the insulator 250 and the insulator 280. Thereby, oxygen can be supplied from the excess oxygen region into the oxide 230. For example, as the insulator 274, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium,

[0163] In particular, aluminum oxide has high barrier properties and can be a thin film with a thickness of 0.5 nm or more and 3.0 nm or less. Even in this case, it is possible to suppress the diffusion of hydrogen and nitrogen. Therefore, aluminum oxide formed by sputtering can function not only as an oxygen source but also as a barrier film for impurities such as hydrogen. For example, by using aluminum oxide formed by sputtering as the insulator 274, the insulator 274 can supply oxygen to the insulator 280 and suppress the entry of impurities such as hydrogen from above the insulator 274 into the insulator 280 side.

[0164] Also, it is preferable to provide an insulator 281 that functions as an interlayer film on the insulator 274. Similar to the insulator 224 and the like, the insulator 281 preferably has a reduced concentration of impurities such as water or hydrogen in the film.

[0165] In addition, conductors 240a and 240b are disposed in the openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 244. The conductors 240a and 240b are provided to face each other with the conductor 260 interposed therebetween. Note that the upper surfaces of the conductors 240a and 240b may be on the same plane as the upper surface of the insulator 281.

[0166] In addition, a first conductor of the conductor 240a is formed in contact with the inner wall of the opening of the insulator 281, the insulator 274, the insulator 280, and the insulator 244. At least a part of the bottom of the opening has the conductor 242a located therein, and the conductor 240a is in contact with the conductor 242a. Similarly, a first conductor of the conductor 240a is formed in contact with the inner wall of the opening of the insulator 281, the insulator 274, the insulator 280, and the insulator 244. In contact therewith, a first conductor of the conductor 240b is formed. At least a part of the bottom of the opening also has the conductor 242b located therein, and the conductor 240b is in contact with the conductor 242b.

[0167] Here, FIG. 3(A) shows a cross-sectional view of a portion indicated by a one-dot chain line of A5-A6 in FIG. 1(A), that is, a cross-sectional view of the source region or the drain region of the transistor 200. As shown in FIG. 3, the conductor 240a (conductor 240b) is in contact with at least the upper surface and the side surface of the conductor 242a (conductor 242b), and further in contact with the side surface of the oxide 230b and the side surface of the oxide 230a . In particular, the conductor 240a (conductor 240b) is preferably in contact with both or one of the side surface on the A5 side and the side surface on the A6 side at the side surface intersecting the channel width direction of the oxide 230. Also, the conductor 240a (conductor 240b) may be configured to be in contact with the side surface on the A1 side (A2 side) at the side surface intersecting the channel length direction of the oxide 230. In this way, by configuring the conductor 240a and the conductor 240b to be in contact with the upper surface and the side surface of the conductor 242a (conductor 242b), and also with the side surface of the oxide 230b and the side surface of the oxide 230a, without increasing the upper surface area of the contact portion between the conductor 240a (conductor 240b) and the conductor 242 a (conductor 242b), the contact area of the contact portion can be increased, and the contact resistance between the conductor 240a (conductor 240b) and the conductor 242 a (conductor 242b) can be reduced. Thereby, while miniaturizing the source electrode and the drain electrode of the transistor, the on-current can be increased.

[0168] Also, FIG. 3(B) shows the formation of an opening for exposing a part of the conductor 242a (conductor 242b) ​​​​​​​​​When performing the process, the alignment of the mask in the lithography method is shifted in the A5 direction. An example of the case is shown. In the channel width direction, by making the width of the opening larger than the widths of the conductor 242a (conductor 242b), oxide 230b, and oxide 230a, even if an alignment shift occurs, the conductor 240a (conductor 240b) can contact the upper surface and side surface of the conductor 242a ( conductor 242b), the side surface of the oxide 230b, and the side surface of the oxide 230a, and good contact can be obtained.

[0169] The conductor 240a and the conductor 240b are preferably made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 240a and the conductor 24 0b may have a laminated structure.

[0170] Also, when the conductor 240 has a laminated structure, the conductor in contact with the oxide 230a, oxide 230b, conductor 242, insulator 244, insulator 280, insulator 274, and insulator 281 should, like the conductor 205a, have a function of suppressing the permeation of impurities such as water or hydrogen. For example, it is preferable to use tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide. Also, a conductive material having a function of suppressing the permeation of impurities such as water or hydrogen can be used in a single layer or in a laminated form. By using such a conductive material, the mixing of impurities such as hydrogen and water from the upper layer of the insulator 281 into the oxide 230 through the conductor 240a and the conductor 240b can be suppressed.

[0171] Also, although not shown, disposed in contact with the upper surface of the conductor 240a and the upper surface of the conductor 240b​​​​ A conductor that functions as a wire may be arranged. The conductor that functions as a wiring preferably uses a conductive material mainly composed of tungsten , copper, or aluminum. Further, the conductor may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride, and the above conductive material. Incidentally, the conductor may be formed so as to be embedded in an opening provided in an insulator, similar to the conductor 203 and the like.

[0172] <Constituent Materials of Semiconductor Device> Hereinafter, constituent materials that can be used in a semiconductor device will be described.

[0173] <<Substrate>> As the substrate on which the transistor 200 is formed, for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used. Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as a yttria-stabilized zirconia substrate), and a resin substrate. Examples of the semiconductor substrate include semiconductor substrates such as silicon and germanium, or compound semiconductor substrates composed of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. Further, there are semiconductor substrates having an insulator region inside the aforementioned semiconductor substrates, for example, SOI (Silicon On Insulator) substrates and the like. Examples of the conductor substrate include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate. Alternatively, there are substrates having a metal nitride, substrates having a metal oxide, and the like. Further, there are substrates in which a conductor or a semiconductor is provided on an insulator substrate, substrates in which a conductor or an insulator is provided on a semiconductor substrate, and substrates in which a semiconductor or an insulator is provided on a conductor substrate. Insulator) substrate and the like. Examples of the conductor substrate include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate. Alternatively, there are substrates having a metal nitride, substrates having a metal oxide, and the like. Further, there are substrates in which a conductor or a semiconductor is provided on an insulator substrate, substrates in which a conductor or an insulator is provided on a semiconductor substrate, and substrates in which a semiconductor or an insulator is provided on a conductor substrate. There is a provided substrate or the like. Alternatively, those in which elements are provided on these substrates may also be used. Examples of the elements provided on the substrate include a capacitive element, a resistive element, a switching element, a light-emitting element, a memory element, and the like.

[0174] Further, a flexible substrate may be used as the substrate. As a method of providing a transistor on the flexible substrate, after fabricating a transistor on a non-flexible substrate, the transistor is peeled off and transferred to a substrate that is a flexible substrate. In that case, it is preferable to provide a release layer between the non-flexible substrate and the transistor. Further, the substrate may have stretchability. Further, the substrate may have a property of returning to its original shape when bending or pulling is stopped. Alternatively, it may have a property of not returning to its original shape. The substrate has a region with a thickness of, for example, 5 μm or more and 700 μm or less, preferably 10 μm or more and 500 μm or less, and more preferably 15 μm or more and 300 μm or less. Thinning the substrate can reduce the weight of the semiconductor device having the transistor. Further, by thinning the substrate, even when using glass or the like, it has stretchability or has a property of returning to its original shape when bending or pulling is stopped. Therefore, it is possible to mitigate the impact applied to the semiconductor device on the substrate due to dropping or the like. That is, a robust semiconductor device can be provided.

[0175] Examples of the substrate that is a flexible substrate include metals, alloys, resins, or glasses, or fibers thereof, etc. can be used. Further, as the substrate, a sheet, film, or foil in which fibers are woven may also be used. The substrate that is a flexible substrate has a lower linear expansion coefficient, the more stable it is in the environment. stable it is in the environment. It is preferable that deformation due to 1×10 -3 / K or less, 5×10 -5 / K or less, or 1×10 -5 / K or less. As the substrate, which is a flexible substrate, for example, a material may be used. Examples of the resin include polyester, polyolefin, polyamide ( nylon, aramid, etc.), polyimide, polycarbonate, acrylic, etc. In particular , aramid is suitable as the substrate which is a flexible substrate because of its low coefficient of linear expansion.

[0176] <<Insulator>> Examples of the insulator include oxides, nitrides, oxynitrides, nitride oxides, metal oxides , metal oxynitrides, metal nitride oxides, etc. that have insulating properties.

[0177] For example, as the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulator . By using a high-k material for the insulator that functions as a gate insulator, it is possible to reduce the operating voltage of the transistor while maintaining the physical film thickness . On the other hand, by using a material with a low relative permittivity for the insulator that functions as an interlayer film, the parasitic capacitance generated between wirings can be reduced. Therefore, the material may be selected according to the function of the insulator .

[0178] Examples of insulators with a high relative permittivity include gallium oxide, hafnium oxide, zirconium oxide , oxides having aluminum and hafnium, oxynitrides having aluminum and hafnium , oxides having silicon and hafnium, oxynitrides having silicon and hafnium , or nitrides having silicon and hafnium, etc.

[0179] In addition, examples of insulators with a low relative permittivity include silicon oxide, silicon oxynitride, silicon nitride oxynitride, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with pores, or resin, etc. There is. There is.

[0180] In particular, silicon oxide and silicon oxynitride are thermally stable. Therefore, For example, by combining with resin, a laminated structure that is thermally stable and has a low relative permittivity can be obtained. Examples of the resin include polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, or acrylic, etc. Also, For example, by combining silicon oxide and silicon oxynitride with an insulator having a high relative permittivity, a laminated structure that is thermally stable and has a high relative permittivity can be obtained. For example, silicon oxide and silicon oxynitride can be combined with an insulator having a high relative permittivity to form a laminated structure that is thermally stable and has a high relative permittivity. For example, by combining silicon oxide and silicon oxynitride with an insulator having a high relative permittivity, a laminated structure that is thermally stable and has a high relative permittivity can be obtained.

[0181] In addition, a transistor using an oxide semiconductor can have its electrical characteristics stabilized by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen. By surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, the electrical characteristics of the transistor can be stabilized. It is possible.

[0182] Examples of insulators having a function of suppressing the permeation of impurities such as hydrogen and oxygen include, for example, insulators containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum can be used in a single layer or in a laminate. That is, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum, which has a function of suppressing the permeation of impurities such as hydrogen and oxygen, can be used in a single layer or in a laminate. Specifically, as an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, Lithium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or metal oxides such as tantalum oxide, silicon oxynitride, or silicon nitride can be used. It is possible.

[0183] For example, as the insulator 274, hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or a metal oxide containing one or more selected from magnesium can be used. Also, silicon nitride, silicon nitride containing oxygen, that is, silicon nitride or silicon oxynitride can be used. It is possible.

[0184] In particular, aluminum oxide has a high barrier property and can suppress the diffusion of hydrogen and nitrogen even in a thin film of 0.5 nm or more and 3.0 nm or less. Also, hafnium oxide has a lower barrier property than aluminum oxide, but the barrier property can be enhanced by increasing the film thickness. Therefore, by adjusting the film thickness of hafnium oxide, an appropriate addition amount of hydrogen and nitrogen can be adjusted. It is possible. Although hafnium oxide has a lower barrier property than aluminum oxide, the barrier property can be enhanced by increasing the film thickness. Therefore, by adjusting the film thickness of hafnium oxide, an appropriate addition amount of hydrogen and nitrogen can be adjusted. It is possible.

[0185] For example, the insulator 250 and the insulator 224 that function as a gate insulator are preferably insulators having an excess oxygen region. For example, by forming a structure in which silicon oxide or silicon oxynitride having an excess oxygen region is in contact with the oxide 230, the oxygen deficiency of the oxide 230 can be compensated. It is possible. By forming a structure in which silicon oxide or silicon oxynitride having an excess oxygen region is in contact with the oxide 230, the oxygen deficiency of the oxide 230 can be compensated. It is possible.

[0186] Also, for example, in the insulator 222 that functions as a part of the gate insulator, aluminum Using an insulator containing one or more oxides of mu, hafnium, and gallium is possible. In particular, an insulator containing one or both oxides of aluminum and hafnium such as aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. is preferably used.

[0187] For example, for the insulator 220, it is preferable to use silicon oxide or silicon oxynitride that is stable against heat. As the gate insulator, by forming a laminated structure of a film that is stable against heat and a film having a high relative dielectric constant, it becomes possible to thin the equivalent oxide thickness (EOT) of the gate insulator while maintaining the physical film thickness. By adopting the above laminated structure, it is possible to improve the on-current without weakening the influence of the electric field from the gate electrode. Also, by maintaining the distance between the gate electrode and the region where the channel is formed by the physical thickness of the gate insulator, it is possible to suppress the leakage current between the gate electrode and the channel formation region.

[0188]

[0189] The insulators 212, 216, 280, and 281 preferably have an insulator with a low relative dielectric constant. For example, the insulators 212, 216, 280, and 281 preferably have silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with pores, or resin, etc. Or, the insulators 212, 216, 280, and 281 are preferably ​​​​​​​​​​​Silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or preferably, silicon oxide having pores, and a resin, have a laminated structure. Since silicon oxide and silicon oxynitride are thermally stable, a laminated structure that is thermally stable and has a low relative dielectric constant can be obtained by combining them with a resin. Examples of the resin include polyester, polyolefin, polyamide (such as nylon and aramid), polyimide, polycarbonate, or acrylic.

[0190] As the insulators 210, 214, 244, and 274, an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen can be used. Examples of the insulators 210, 214, 244, and 274 include metal oxides such as aluminum oxide, hafnium oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon nitride oxide, or silicon nitride.

[0191] <<Conductor>> As the conductor, a material containing one or more metal elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc. can be used. Further, a material represented by polycrystalline silicon containing impurity A conductor, a silicide such as nickel silicide, may be used.

[0192] Also, a plurality of conductive layers formed of the above materials may be laminated and used. For example, a laminated structure combining the material containing a metal element and the conductive material containing oxygen may be used. Also, a laminated structure combining the material containing the above-described metal element and the conductive material containing nitrogen may be used. Also, a laminated structure combining the material containing the above-described metal element, the conductive material containing oxygen, and the conductive

[0193] In addition, when an oxide is used in the channel formation region of the transistor, for the conductor that functions as the gate electrode, a laminated structure combining the material containing the above-described metal element and the conductive material containing oxygen is preferably used. In this case, it is preferable to provide the conductive material containing oxygen on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is easily supplied to the channel formation region.

[0194] In particular, as the conductor that functions as the gate electrode, it is preferable to use a conductive material containing the metal element and oxygen contained in the metal oxide in which the channel is formed. Also, the above-described metal element and a conductive material containing nitrogen may be used. For example, a conductive material containing nitrogen such as titanium nitride and tantalum nitride may be used. Also, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon may be used. Also, indium containing nitrogen ​​​​​​​​ Mugarium zinc oxide may also be used. By using such a material, hydrogen contained in the metal oxide in which the channel is formed may be captured. Alternatively, hydrogen mixed in from an external insulator or the like may be captured.

[0195] As the conductors 260, 203, 205, 242, and 240, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum is preferably used, or an alloy containing the above-described metal elements as components, or an alloy combining the above-described metal elements. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. are preferably used. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Also, a semiconductor having high electrical conductivity typified by polycrystalline silicon containing impurity elements such as phosphorus, a silicide such as nickel silicide may be used.

[0196] <<Metal Oxide>> As the oxide 230, it is preferable to use a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor). Hereinafter, the metal oxide applicable to the oxide 230 according to the present invention will be described. Also, it is preferable to use a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor). Hereinafter, the metal oxide applicable to the oxide 230 according to the present invention will be described. The metal oxide is preferably described below.

[0197] The metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. In addition to these, it is preferable that aluminum, gallium, yttrium, tin, or the like is contained. Further, one or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like may be contained. Here, consider the case where the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. Note that element M is aluminum, gallium, yttrium, or tin or the like. Elements applicable to other element M include boron, titanium, iron,

[0198] nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like. However, as element M, there may be cases where a plurality of the aforementioned elements may be combined. nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like. However, as element M, there may be cases where a plurality of the aforementioned elements may be combined.

[0199] In this specification and the like, a metal oxide having nitrogen may also be collectively referred to as a metal oxide (metal oxide). Further, a metal oxide having nitrogen may be referred to as a metal oxynitride (metal oxynitride). In this specification and the like, a metal oxide having nitrogen may also be collectively referred to as a metal oxide (metal oxide). Further, a metal oxide having nitrogen may be referred to as a metal oxynitride (metal oxynitride). In this specification and the like, a metal oxide having nitrogen may also be collectively referred to as a metal oxide (metal oxide). Further, a metal oxide having nitrogen may be referred to as a metal oxynitride (metal oxynitride).

[0200] [Constitution of Metal Oxide] Hereinafter, the configuration of the CAC (Cloud-Aligned Composite)-OS that can be used for the transistor disclosed in one aspect of the present invention will be described. loud-Aligned Composite)-OS will be described.

[0201] In this specification and the like, there are cases where CAAC (c-axis aligned crystal l), and CAC (Cloud-Aligned Composite) are described. Note that CAAC represents an example of a crystal structure, and CAC represents an example of the configuration of a function or a material. Note that CAAC represents an example of a crystal structure, and CAC represents an example of the configuration of a function or a material. An example is shown.

[0202] CAC-OS or CAC-metal oxide has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. When CAC-OS or CAC-metal oxide is used for the semiconductor layer of a transistor, the conductive function is a function of flowing electrons (or holes) serving as carriers, and the insulating function is a function of not flowing electrons serving as carriers. By causing the conductive function and the insulating function to act complementarily, respectively, a switching function (On / O ff function) can be imparted to CAC-OS or CAC-metal oxide. In CAC-OS or CAC-metal oxide, by separating the respective functions, both functions can be enhanced to the maximum extent. Note that when CAC-OS or CAC-metal oxide is used for the semiconductor layer of a transistor, the conductive function is a function of flowing electrons (or holes) serving as carriers, and the insulating function is a function of not flowing electrons serving as carriers. By causing the conductive function and the insulating function to act complementarily, respectively, a switching function (On / O ff function) can be imparted to CAC-OS or CAC-metal oxide. In CAC-OS or CAC-metal oxide, by separating the respective functions, both functions can be enhanced to the maximum extent. ff function) can be imparted to CAC-OS or CAC-metal oxide. In CAC-OS or CAC-metal oxide, by separating the respective functions, both functions can be enhanced to the maximum extent. In CAC-OS or CAC-metal oxide, by separating the respective functions, both functions can be enhanced to the maximum extent.

[0203] In addition, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-described conductive function, and the insulating region has the above-described insulating function. Also, in the material, the conductive region and the insulating region are nanoparticles In addition, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-described conductive function, and the insulating region has the above-described insulating function. Also, in the material, the conductive region and the insulating region are nanoparticles In addition, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-described conductive function, and the insulating region has the above-described insulating function. Also, in the material, the conductive region and the insulating region are nanoparticles There may be cases where they are separated at the level. Also, the conductive region and the insulating region may be unevenly distributed in the material respectively. Also, the conductive region may be observed with its periphery blurred and connected in a cloud-like shape. There may be cases.

[0204] Also, in CAC-OS or CAC-metal oxide, the conductive region and the insulating region may be dispersed in the material with a size of 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 nm or less respectively.

[0205] Also, CAC-OS or CAC-metal oxide is composed of components having different band gaps. For example, CAC-OS or CAC-metal ox ide is composed of a component having a wide band gap due to the insulating region and a component having a narrow band gap due to the conductive region. In such a configuration, when carriers flow, in the component having a narrow band gap, carriers mainly flow. Also, the component having a narrow band gap acts complementarily on the component having a wide band gap, and carriers also flow through the component having a wide band gap in conjunction with the component having a narrow band gap. Therefore, when the above CAC-OS or CAC-metal oxide is used for the channel formation region of a transistor a high current driving force, that is, a large on-current, and a high field-effect mobility can be obtained in the on-state of the transistor. That is, CAC-OS or CAC-metal oxide can also be called a matrix composite material (matrix composite), or a metal matrix composite (metal matrix composite). In other words, a high current driving force, that is, a large on-current,

[0206] That is, CAC-OS or CAC-metal oxide can also be referred to as a matrix composite material (matrix composite), or a metal matrix composite (metal matrix composite).

[0207] [Structure of Metal Oxide] Oxide semiconductors (metal oxides) can be divided into single crystal oxide semiconductors and other non-single crystal oxide semiconductors. Examples of non-single crystal oxide semiconductors include CAAC-OS (c-axis aligned crystalline oxide semiconductor), polycrystalline oxide semiconductors, nc-OS (nanocrystalline oxide semiconductor), pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductor), and amorphous oxide semiconductors. CAAC-OS has a c-axis orientation and a crystal structure in which a plurality of nanocrystals are connected in the a-b plane direction and have strain. The strain refers to a location where the orientation of the lattice arrangement changes between a region with an aligned lattice arrangement and another region with an aligned lattice arrangement in the region where the plurality of nanocrystals are connected. axis aligned crystalline oxide semicondu ctor), polycrystalline oxide semiconductors, nc-OS (nanocrystalline ox ide semiconductor), pseudo-amorphous oxide semiconductors (a-like OS :amorphous-like oxide semiconductor), and amorphous oxide semiconductors.

[0208] CAAC-OS has a c-axis orientation and a crystal structure in which a plurality of nanocrystals are connected in the a-b plane direction and have strain. The strain refers to a location where the orientation of the lattice arrangement changes between a region with an aligned lattice arrangement and another region with an aligned lattice arrangement in the region where the plurality of nanocrystals are connected. CAAC-OS has a c-axis orientation and a crystal structure in which a plurality of nanocrystals are connected in the a-b plane direction and have strain. The strain refers to a location where the orientation of the lattice arrangement changes between a region with an aligned lattice arrangement and another region with an aligned lattice arrangement in the region where the plurality of nanocrystals are connected. CAAC-OS has a c-axis orientation and a crystal structure in which a plurality of nanocrystals are connected in the a-b plane direction and have strain. The strain refers to a location where the orientation of the lattice arrangement changes between a region with an aligned lattice arrangement and another region with an aligned lattice arrangement in the region where the plurality of nanocrystals are connected. CAAC-OS has a c-axis orientation and a crystal structure in which a plurality of nanocrystals are connected in the a-b plane direction and have strain. The strain refers to a location where the orientation of the lattice arrangement changes between a region with an aligned lattice arrangement and another region with an aligned lattice arrangement in the region where the plurality of nanocrystals are connected.

[0209] Nanocrystals are based on hexagons, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the strain, there may be cases where lattice arrangements such as pentagons and heptagons are present. In CAAC-OS, it is difficult to confirm a clear grain boundary (also called a grain boundary) even in the vicinity of the strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the bond distance between atoms changes due to the substitution of metal elements. Nanocrystals are based on hexagons, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the strain, there may be cases where lattice arrangements such as pentagons and heptagons are present. In CAAC-OS, it is difficult to confirm a clear grain boundary (also called a grain boundary) even in the vicinity of the strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the bond distance between atoms changes due to the substitution of metal elements. Nanocrystals are based on hexagons, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the strain, there may be cases where lattice arrangements such as pentagons and heptagons are present. In CAAC-OS, it is difficult to confirm a clear grain boundary (also called a grain boundary) even in the vicinity of the strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the bond distance between atoms changes due to the substitution of metal elements. Nanocrystals are based on hexagons, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the strain, there may be cases where lattice arrangements such as pentagons and heptagons are present. In CAAC-OS, it is difficult to confirm a clear grain boundary (also called a grain boundary) even in the vicinity of the strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the bond distance between atoms changes due to the substitution of metal elements. Nanocrystals are based on hexagons, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the strain, there may be cases where lattice arrangements such as pentagons and heptagons are present. In CAAC-OS, it is difficult to confirm a clear grain boundary (also called a grain boundary) even in the vicinity of the strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the bond distance between atoms changes due to the substitution of metal elements. Nanocrystals are based on hexagons, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the strain, there may be cases where lattice arrangements such as pentagons and heptagons are present. In CAAC-OS, it is difficult to confirm a clear grain boundary (also called a grain boundary) even in the vicinity of the strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the bond distance between atoms changes due to the substitution of metal elements. Nanocrystals are based on hexagons, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the strain, there may be cases where lattice arrangements such as pentagons and heptagons are present. In CAAC-OS, it is difficult to confirm a clear grain boundary (also called a grain boundary) even in the vicinity of the strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the bond distance between atoms changes due to the substitution of metal elements.

[0210] In addition, CAAC-OS has a tendency to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer) are stacked. Note that indium and element M are mutually replaceable. When element M in the (M,Zn) layer is replaced with indium, it can also be represented as an (In,M,Zn) layer. Further, when indium in the In layer is replaced with element M, it can also be represented as an (In,M) layer. In addition, CAAC-OS has a tendency to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer) are stacked. Note that indium and element M are mutually replaceable. When element M in the (M,Zn) layer is replaced with indium, it can also be represented as an (In,M,Zn) layer. Further, when indium in the In layer is replaced with element M, it can also be represented as an (In,M) layer. In addition, CAAC-OS has a tendency to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer) are stacked. Note that indium and element M are mutually replaceable. When element M in the (M,Zn) layer is replaced with indium, it can also be represented as an (In,M,Zn) layer. Further, when indium in the In layer is replaced with element M, it can also be represented as an (In,M) layer. In addition, CAAC-OS has a tendency to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer) are stacked. Note that indium and element M are mutually replaceable. When element M in the (M,Zn) layer is replaced with indium, it can also be represented as an (In,M,Zn) layer. Further, when indium in the In layer is replaced with element M, it can also be represented as an (In,M) layer. In addition, CAAC-OS has a tendency to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer) are stacked. Note that indium and element M are mutually replaceable. When element M in the (M,Zn) layer is replaced with indium, it can also be represented as an (In,M,Zn) layer. Further, when indium in the In layer is replaced with element M, it can also be represented as an (In,M) layer. In addition, CAAC-OS has a tendency to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer) are stacked. Note that indium and element M are mutually replaceable. When element M in the (M,Zn) layer is replaced with indium, it can also be represented as an (In,M,Zn) layer. Further, when indium in the In layer is replaced with element M, it can also be represented as an (In,M) layer.

[0211] CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm distinct crystal grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to crystal grain boundaries is unlikely to occur. Also, since the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be a metal oxide with few impurities and defects (such as oxygen vacancies (also referred to as V:oxygen vacancy). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable. CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm distinct crystal grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to crystal grain boundaries is unlikely to occur. Also, since the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be a metal oxide with few impurities and defects (such as oxygen vacancies (also referred to as V:oxygen vacancy). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable. CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm distinct crystal grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to crystal grain boundaries is unlikely to occur. Also, since the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be a metal oxide with few impurities and defects (such as oxygen vacancies (also referred to as V:oxygen vacancy). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable. CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm distinct crystal grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to crystal grain boundaries is unlikely to occur. Also, since the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be a metal oxide with few impurities and defects (such as oxygen vacancies (also referred to as V:oxygen vacancy). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable. O :oxygen v CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm distinct crystal grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to crystal grain boundaries is unlikely to occur. Also, since the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be a metal oxide with few impurities and defects (such as oxygen vacancies (also referred to as V:oxygen vacancy). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable. CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm distinct crystal grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to crystal grain boundaries is unlikely to occur. Also, since the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be a metal oxide with few impurities and defects (such as oxygen vacancies (also referred to as V:oxygen vacancy). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable. CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm distinct crystal grain boundaries in CAAC-OS, it can be said that a decrease in electron mobility due to crystal grain boundaries is unlikely to occur. Also, since the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be a metal oxide with few impurities and defects (such as oxygen vacancies (also referred to as V:oxygen vacancy). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. For this reason, the metal oxide having CAAC-OS is heat-resistant and highly reliable.

[0212] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Also, nc-OS does not show regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Consequently, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or amorphous oxide semiconductors. nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Also, nc-OS does not show regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Consequently, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or amorphous oxide semiconductors. nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Also, nc-OS does not show regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Consequently, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or amorphous oxide semiconductors. nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Also, nc-OS does not show regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Consequently, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or amorphous oxide semiconductors. nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Also, nc-OS does not show regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Consequently, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or amorphous oxide semiconductors.

[0213] Indium, which is a type of metal oxide having indium, gallium, and zinc, gallium-zinc oxide (hereinafter, IGZO) may form a stable structure with the above-described nanocrystals. In particular, since IGZO tends to be difficult to grow crystals in the air, it may be structurally more stable as a smaller crystal (here, a crystal of several millimeters or several centimeters) than a large crystal. For example, the above-described nanocrystal.

[0214] a-like OS is a metal oxide having a structure between nc-OS and an amorphous oxide semiconductor. a-like OS has a loose or low-density region. That is, a-li ke OS has lower crystallinity than nc-OS and CAAC-OS.

[0215] Oxide semiconductors (metal oxides) have various structures and each has different characteristics. The oxide semiconductor according to one embodiment of the present invention may have two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, a-li ke OS, nc-OS, and CAAC-OS.

[0216] [Transistor having a metal oxide] Subsequently, the case where the above metal oxide is used for the channel formation region of the transistor will be described.

[0217] By using the above metal oxide for the channel formation region of the transistor, a transistor having a high field effect mobility can be realized. In addition, a highly reliable transistor can be realized.

[0218] In addition, it is preferable to use a metal oxide having a low carrier density for the transistor. Gold In the case of lowering the carrier density of the metal oxide film, the impurity concentration in the metal oxide film is lowered. In this specification, the impurity concentration is low and the defect level density is low. A metal oxide with a low level of density is called high purity intrinsic or substantially high purity intrinsic. For example, , the carrier density is 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 Less than, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 That's it. stomach.

[0219] In addition, a highly pure intrinsic or substantially highly pure intrinsic metal oxide film has a low density of defect states. Therefore, the trap level density may be low.

[0220] In addition, the charges trapped in the trap levels of metal oxides take a long time to disappear. Therefore, the trap level density is high. A transistor having a metal oxide in a channel formation region may have unstable electrical characteristics. be.

[0221] Therefore, in order to stabilize the electrical characteristics of the transistor, the impurity concentration in the metal oxide must be In order to reduce the impurity concentration in the metal oxide, It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0222] In addition, a thin film with high crystallinity is used as the metal oxide semiconductor for the transistor. is preferable. By using such a thin film, the stability or reliability of the transistor can be improved. Examples of such a thin film include a single crystal metal oxide thin film or a polycrystalline metal oxide thin film. However, in order to form a single crystal metal oxide thin film or a polycrystalline metal oxide thin film on a substrate, a high temperature or laser heating process is required. Therefore, the cost of the manufacturing process increases, and furthermore, the throughput also decreases.

[0223] In 2009, it was reported in Non-Patent Document 1 and Non-Patent Document 2 that indium-gallium-zinc oxide having a CAAC structure (referred to as CAAC-IGZO herein) was discovered. Here, it is reported that CAAC-IGZO has c-axis orientation, no clearly confirmed grain boundaries, and can be formed on a substrate at a low temperature. Furthermore, it is reported that a transistor using CAAC-IGZO has excellent electrical characteristics and reliability.

[0224] Also, in 2013, indium-gallium-zinc oxide having an nc structure (referred to as nc-IGZO herein) was discovered (see Non-Patent Document 3). Here, it is reported that nc-IGZO has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 3 nm or less), and no regularity is observed in the crystal orientation between different such regions.

[0225] In Non-Patent Document 4 and Non-Patent Document 5, the transition of the average crystal size due to electron beam irradiation for each of the above-mentioned CAAC-IGZO, nc-IGZO, and an IGZO thin film with low crystallinity is shown. In the IGZO thin film with low crystallinity, even before the electron beam is irradiated as shown in , crystalline IGZO of about 1 nm is observed. Therefore, herein, for IGZO​​ It has been reported that the presence of a completely amorphous structure could not be confirmed. Further, compared with thin films of IGZO with low crystallinity, thin films of CAAC-IGZO and thin films of nc-IGZO have been shown to have high stability against electron beam irradiation. Therefore, it is preferable to use a thin film of CAAC-IGZO or a thin film of nc-IGZO as the semiconductor of the transistor.

[0226] A transistor using a metal oxide has an extremely small leakage current in the non-conducting state. Specifically, it is shown in Non-Patent Document 6 that the off-current per 1 μm of the channel width of the transistor is on the order of yA / μm (10−18 A / μm). For example, a low-power CPU that applies the characteristic of low leakage current of a transistor using a metal oxide has been disclosed (see Non-Patent Document 7). -2 4

[0227] In addition, an application of the transistor using a metal oxide to a display device by utilizing the characteristic of low leakage current has been reported (see Non-Patent Document 8). In a display device, the displayed image is switched several tens of times per second. The number of times the image is switched per second is called the refresh rate. Sometimes, the refresh rate is also called the driving frequency. Such a high-speed switching of the screen that is difficult for the human eye to perceive is considered to be a cause of eye fatigue. Therefore, it has been proposed to reduce the refresh rate of the display device to reduce the number of times the image is rewritten. Further, by driving with a reduced refresh rate, it is possible to reduce the power consumption of the display device. Such a driving method is ​​​​​​​​​​​​​​​ It is called idling stop (IDS) drive.

[0228] The discovery of the CAAC structure and the nc structure has contributed to the improvement of the electrical characteristics and reliability of transistors using metal oxides having the CAAC structure or the nc structure, as well as the reduction of the cost and the improvement of the throughput in the manufacturing process. Further, research on the application of the transistor to a display device and an LSI using the characteristic of the low leakage current of the transistor is being advanced.

[0229] [Impurity] Here, the influence of each impurity in the metal oxide will be described.

[0230] In the metal oxide, when silicon or carbon, which is one of the Group 14 elements, is contained, defect levels are formed in the metal oxide. Therefore, the concentration of silicon or carbon in the metal oxide and the concentration of silicon or carbon near the interface with the metal oxide (the concentration obtained by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry)) are set to 2×10 atoms / cm 18 atoms / cm 3 or less, preferably 2×10 17 atoms / cm 3 or less.

[0231] Further, when the metal oxide contains an alkali metal or an alkaline earth metal, defect levels may be formed and carriers may be generated. Therefore, a transistor using a metal oxide containing an alkali metal or an alkaline earth metal in the channel formation region tends to have a normally-on characteristic. For this reason, the concentration of the alkali metal or the alkaline earth metal in the metal oxide ​​​​​​​​​​It is preferable to reduce the degree. Specifically, the concentration of alkali metal or alkaline earth metal in the metal oxide obtained by SIMS is 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0232] In addition, in the metal oxide, when nitrogen is contained, carriers, i.e., electrons, are generated, and the carrier density increases, making it easy to become n-type. As a result, a transistor using a metal oxide containing nitrogen in the channel formation region tends to have normally-on characteristics. Therefore, in the metal oxide, it is preferable that the nitrogen in the channel formation region is reduced as much as possible. For example, the nitrogen concentration in the metal oxide is 5×10 19 atoms / cm 3 less than, preferably 5×10 18 atoms / cm 3 or less, more preferably 1×10 18 atoms / cm 3 or less, even more preferably 5×10 17 atoms / cm 3 or less. .

[0233] In addition, the hydrogen contained in the metal oxide may react with the oxygen bonded to the metal atom to form water, thus forming oxygen vacancies. When hydrogen enters the oxygen vacancies, carriers, i.e., electrons, may be generated. Also, part of the hydrogen may bond with the oxygen bonded to the metal atom to generate carriers, i.e., electrons. Therefore, a transistor using a metal oxide containing hydrogen tends to have normally-on characteristics.

[0234] In addition, hydrogen contained in the metal oxide may form shallow defect levels (sDOS: shallow level Density of States) in the metal oxide. The shallow defect levels refer to interface levels located near the lower end of the conduction band. It is presumed that the shallow defect levels exist near the boundary between the high-density region and the low-density region in the metal oxide. Here, the high-density region and the low-density region in the metal oxide are distinguished by the amount of hydrogen contained in the region. That is, compared with the low-density region, the high-density region is a region containing more hydrogen. Near the boundary between the high-density region and the low-density region in the metal oxide, due to the stress strain between the two regions, minute cracks are likely to occur, and oxygen deficiency and indium dangling bonds are generated near the cracks. Here, it is presumed that shallow defect levels are formed by the localization of impurities such as hydrogen or water here. In addition, the high-density region in the metal oxide may have higher crystallinity than the low-density region. Also, the high-density region in the metal oxide may have a higher film density than the low-density region. When the metal oxide has a composition including indium, gallium, and zinc, the high-density region may contain indium, gallium, and zinc, and the low-density region may contain indium and zinc.

[0235] In other words, the low-density region may have a lower gallium ratio than the high-density region.

[0236]

[0236] Note that the shallow defect levels are presumed to be caused by oxygen deficiency. When the oxygen deficiency in the metal oxide increases, it is presumed that deep defect levels (dDOS: deep level Density of States) also increase together with the shallow defect levels. This is because deep defect levels are also This is because it is considered to be due to oxygen deficiency. Note that a deep defect level refers to a defect level located near the center of the band gap.

[0237] Therefore, by suppressing oxygen deficiency in the metal oxide, it becomes possible to reduce the levels of both shallow defect levels and deep defect levels. Also, regarding shallow defect levels, there is a possibility of being able to control them to some extent by adjusting the temperature during the film formation of the metal oxide. Specifically, by setting the temperature during the film formation of the metal oxide to 170 °C or near it, preferably 130 °C or near it, and more preferably room temperature, the shallow defect levels can be reduced.

[0238] In addition, the shallow defect levels of the metal oxide affect the electrical characteristics of a transistor using the metal oxide as a semiconductor layer. That is, due to the shallow defect levels, in the drain current - gate voltage (Id - Vg) characteristics of the transistor, the change in the drain current Id with respect to the gate voltage Vg becomes gentle, and the S value (Subthreshold Swing, also referred to as SS), which is one of the criteria for evaluating the quality of the rising characteristic of the transistor from the off state to the on state, deteriorates. This is considered to be because electrons are trapped in the shallow defect levels.

[0239] For this reason, it is preferable that hydrogen in the metal oxide is reduced as much as possible. Specifically, in the metal oxide, the hydrogen concentration obtained by SIMS is less than 1×10 atoms 20 / cm 3 19 atoms / cm 3 0 18 atoms / cm 3 ​​​​​​​​​​​​​18 atoms / cm 3 less than Use a metal oxide with sufficiently reduced impurities in the channel formation region of the transistor to impart stable electrical characteristics.

[0240] <Fabrication method of semiconductor device> Next, a method for fabricating a semiconductor device having the transistor 200 according to the present invention will be described with reference to FIGS. 4 to 13. In FIGS. 4 to 13, (A) in each figure is a top view showing. Further, (B) in each figure is a cross-sectional view corresponding to the portion indicated by the dashed line A1 - A2 shown in (A) and is also a cross-sectional view in the channel length direction of the transistor 200. Further, ( C) in each figure is a cross-sectional view corresponding to the portion indicated by the dashed line A3 - A4 in (A) and is also a cross-sectional view in the channel width direction of the transistor 200. In the top view of (A) in each figure, some elements are omitted for clarity of illustration and shown.

[0241] First, prepare a substrate (not shown) and form an insulator 210 on the substrate. The formation of the insulator 210 can be performed using a sputtering method, a chemical vapor deposition (CVD: Chemical Vap or Deposition) method, a molecular beam epitaxy (MBE: Molecular Beam Epitaxy) method, a pulsed laser deposition (PLD: Pulsed Laser Deposition) method, or an ALD (Atomic Layer Deposi tion) method or the like.

[0242] Note that the CVD method includes a plasma CVD (PECVD: Plasma Enhanced CVD) method using plasma and a thermal CVD (TCVD: Thermal C It can be classified into methods such as plasma CVD method and photo CVD method that uses light. Furthermore, according to the raw material gas used, it can be divided into metal CVD (MCVD) method and metal organic CVD (MOCVD) method. For example, the wiring, electrodes, elements (such as transistors and capacitor elements) contained in semiconductor devices may be charged up by receiving charges from the plasma. At this time, the wiring, electrodes, elements, etc. contained in the semiconductor device may be damaged by the accumulated charges.

[0243] The plasma CVD method can obtain high-quality films at relatively low temperatures. Also, since the thermal CVD method does not use plasma, it is a film-forming method that can reduce plasma damage to the object to be processed. For example, the wiring, electrodes, elements (such as transistors and capacitor elements) contained in semiconductor devices may be charged up by receiving charges from the plasma. At this time, the wiring, electrodes, elements, etc. contained in the semiconductor device may be damaged by the accumulated charges. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so the yield of semiconductor devices can be increased. Also, in the thermal CVD method, since plasma damage does not occur in the deposited film, a film with few defects can be obtained. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so the yield of semiconductor devices can be increased. Also, in the thermal CVD method, since plasma damage does not occur in the deposited film, a film with few defects can be obtained. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so the yield of semiconductor devices can be increased. Also, in the thermal CVD method, since plasma damage does not occur in the deposited film, a film with few defects can be obtained. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so the yield of semiconductor devices can be increased. Also, in the thermal CVD method, since plasma damage does not occur in the deposited film, a film with few defects can be obtained. On the other hand, in the case of the thermal CVD method that does not use plasma, such plasma damage does not occur, so the yield of semiconductor devices can be increased. Also, in the thermal CVD method, since plasma damage does not occur in the deposited film, a film with few defects can be obtained.

[0244] Also, the ALD method is also a film-forming method that can reduce plasma damage to the object to be processed. Also, since plasma damage does not occur during film formation in the ALD method, a film with few defects can be obtained. Note that some of the precursors used in the ALD method contain impurities such as carbon. Also, since plasma damage does not occur during film formation in the ALD method, a film with few defects can be obtained. Note that some of the precursors used in the ALD method contain impurities such as carbon. Therefore, the film formed by the ALD method may contain more impurities such as carbon compared to the film formed by other film-forming methods. Note that the quantification of impurities can be performed using X-ray photoelectron spectroscopy (XPS). Therefore, the film formed by the ALD method may contain more impurities such as carbon compared to the film formed by other film-forming methods. Note that the quantification of impurities can be performed using X-ray photoelectron spectroscopy (XPS). Therefore, the film formed by the ALD method may contain more impurities such as carbon compared to the film formed by other film-forming methods. Note that the quantification of impurities can be performed using X-ray photoelectron spectroscopy (XPS). Therefore, the film formed by the ALD method may contain more impurities such as carbon compared to the film formed by other film-forming methods. Note that the quantification of impurities can be performed using X-ray photoelectron spectroscopy (XPS).

[0245] The CVD method and the ALD method are film formation methods in which particles emitted from a target or the like are deposited, which are different from those in which a film is formed by a reaction on the surface of an object to be processed. Therefore, it is a film formation method that is less affected by the shape of the object to be processed and has good step coverage. In particular, the ALD method is suitable for coating the surface of an opening with a high aspect ratio because it has excellent step coverage and excellent thickness uniformity. However, since the ALD method has a relatively slow film formation speed, it may be preferable to use it in combination with other film formation methods such as the CVD method with a high film formation speed.

[0246] The CVD method and the ALD method can control the composition of the obtained film by the flow rate ratio of the source gases. For example, in the CVD method and the ALD method, a film with an arbitrary composition can be formed by the flow rate ratio of the source gases. Also, for example, in the CVD method and the ALD method, by changing the flow rate ratio of the source gases while forming a film, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gases, compared with the case of using a plurality of film formation chambers to form a film, the time required for film formation can be shortened because the time required for transfer and pressure adjustment is not required. Therefore, in some cases, the productivity of semiconductor devices can be increased.

[0247] In this embodiment, aluminum oxide is formed as the insulator 210 by a sputtering method. Also, the insulator 210 may have a multilayer structure. For example, a structure in which aluminum oxide is formed by a sputtering method and aluminum oxide is formed on the aluminum oxide by an ALD method may be used. Or, aluminum oxide may be formed by an ALD method. Form a film, and on the aluminum oxide, it may be structured to form aluminum oxide by sputtering method. It may be structured to form a film.

[0248] Next, an insulator 212 is formed on the insulator 210. The formation of the insulator 212 can be performed using a sputtering method, CVD method, MBE method, PLD method, ALD method, or the like. In this embodiment, silicon oxide is formed as the insulator 212 by CVD method. Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film.

[0249] Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film. Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film. Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film. Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film. Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film. Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film. Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film. Next, an opening reaching the insulator 210 is formed in the insulator 212. The opening includes, for example, grooves, slits, etc. Also, when referring to the region where the opening is formed as the opening portion, there may be cases. For forming the opening, a wet etching method may be used, but a dry etching method is more preferable for microfabrication. Also, it is preferable to select the insulator 210 as an insulator that functions as an etching stopper film when etching the insulator 212 to form an opening. For example, when a silicon oxide film is used for the insulator 212 for forming the opening, the insulator 210 may be a silicon nitride film, aluminum oxide film, hafnium oxide film as an insulating film that functions as an etching stopper film.

[0250] After forming the opening, a conductive film that becomes the conductor 203a is formed. The conductive film preferably includes a conductor having a function of suppressing oxygen permeation. For example, tantalum nitride, tantalum tungsten nitride, titanium nitride, etc. can be used. Or it can be a laminated film of tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten alloy. The formation of the conductive film that becomes the conductor 203a can be performed by sputtering method, CVD method, MBE After forming the opening, a conductive film that becomes the conductor 203a is formed. The conductive film preferably includes a conductor having a function of suppressing oxygen permeation. For example, tantalum nitride, tantalum tungsten nitride, titanium nitride, etc. can be used. Or it can be a laminated film of tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten alloy. The formation of the conductive film that becomes the conductor 203a can be performed by sputtering method, CVD method, MBE After forming the opening, a conductive film that becomes the conductor 203a is formed. The conductive film preferably includes a conductor having a function of suppressing oxygen permeation. For example, tantalum nitride, tantalum tungsten nitride, titanium nitride, etc. can be used. Or it can be a laminated film of tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten alloy. The formation of the conductive film that becomes the conductor 203a can be performed by sputtering method, CVD method, MBE After forming the opening, a conductive film that becomes the conductor 203a is formed. The conductive film preferably includes a conductor having a function of suppressing oxygen permeation. For example, tantalum nitride, tantalum tungsten nitride, titanium nitride, etc. can be used. Or it can be a laminated film of tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten alloy. The formation of the conductive film that becomes the conductor 203a can be performed by sputtering method, CVD method, MBE After forming the opening, a conductive film that becomes the conductor 203a is formed. The conductive film preferably includes a conductor having a function of suppressing oxygen permeation. For example, tantalum nitride, tantalum tungsten nitride, titanium nitride, etc. can be used. Or it can be a laminated film of tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten alloy. The formation of the conductive film that becomes the conductor 203a can be performed by sputtering method, CVD method, MBE It can be carried out using methods such as sputtering, PLD method, or ALD method.

[0251] In this embodiment, as the conductive film that becomes the conductor 203a, a tantalum nitride film is formed by sputtering, or a film in which titanium nitride is laminated on tantalum nitride. By using such a metal nitride as the conductor 2 03a, even if a metal that easily diffuses copper or the like is used in the conductor 203b described later, the diffusion of the metal from the conductor 203a to the outside can be suppressed.

[0252] Next, a conductive film that becomes the conductor 203b is formed on the conductive film that becomes the conductor 203a. The formation of the conductive film can be carried out using methods such as sputtering, CVD method, MBE method, PLD method, or ALD method. In this embodiment, as the conductive film that becomes the conductor 203b, a low-resistance conductive material such as copper is formed.

[0253] Next, by performing CMP processing, a part of the conductive film that becomes the conductor 203a and the conductive film that becomes the conductor 203 b is removed to expose the insulator 212. As a result, only in the opening, the conductive film that becomes the conductor 203a and the conductive film that becomes the conductor 203b remain. Thereby, a conductor 203 including the conductor 203a and the conductor 203b with a flat upper surface can be formed (see FIG. 4). Note that a part of the insulator 212 may be removed by the CMP processing.

[0254] Next, an insulator 214 is formed on the insulator 212 and the conductor 203. The formation of the insulator 214 can be carried out using methods such as sputtering, CVD method, MBE method, PLD method, or ALD method. In this embodiment, as the insulator 214, silicon nitride is formed by CVD method.​​​​​​​ A silicon film is formed. Thus, by using an insulator such as silicon nitride through which copper hardly permeates, even if a metal such as copper that easily diffuses is used for the conductor 203b, diffusion of the metal into the layer above the insulator 214 can be suppressed.

[0255] Next, an insulator 216 is formed on the insulator 214. The insulator 216 can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, silicon oxide is formed as the insulator 216 by a CVD method.

[0256] Next, an opening reaching the conductor 203 is formed in the insulator 214 and the insulator 216. Although a wet etching method may be used for forming the opening, the dry etching method is more preferable for microfabrication.

[0257] After forming the opening, a conductive film that becomes the conductor 205a is formed. The conductive film preferably contains a conductive material having a function of suppressing oxygen permeation. For example, tantalum nitride, tungsten nitride, titanium nitride, or the like can be used. Alternatively, it can be a laminated film with tantalum, tungsten, titanium, molybdenum, aluminum, copper, a molybdenum-tungsten alloy, or the like. The conductive film that becomes the conductor 205a can be formed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, tantalum nitride is formed as the conductive film that becomes the conductor 205a by a sputtering method.

[0258]

[0259] Next, a conductive film to be the conductor 205b is formed on the conductive film to be the conductor 205a. The formation of the conductive film can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0260] In this embodiment, as the conductive film to be the conductor 205b, titanium nitride is formed by a CVD method. Then, tungsten is formed by a CVD method on the titanium nitride.

[0261] Next, by performing CMP processing, a part of the conductive film to be the conductor 205a and the conductive film to be the conductor 205b is removed to expose the insulator 216. As a result, the conductive films to be the conductor 205a and the conductor 205b remain only in the opening. Thereby, the conductor 205 including the flat-topped conductor 205a and the conductor 205b can be formed (see Fig. 4). Note that a part of the insulator 216 may be removed by the CMP processing.

[0262] Next, an insulator 220 is formed on the insulator 216 and the conductor 205. The formation of the insulator 220 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, silicon oxide is formed as the insulator 220 by a CVD method.

[0263] Next, an insulator 222 is formed on the insulator 220. As the insulator 222, an insulator containing one or both of aluminum and hafnium oxides may be formed. Note that, as the insulator containing one or both of aluminum and hafnium oxides, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminum oxide)​​​​​​​​​​​ It is preferable to use, for example, a nitride. One or both of aluminum and hafnium The insulator containing the oxide has a barrier property against oxygen, hydrogen, and water. Since the insulator 22 2 has a barrier property against hydrogen and water, hydrogen and water contained in the structure provided around the transistor 200 are suppressed from diffusing inside the transistor 200 through the insulator 222, and the generation of oxygen vacancies in the oxide 230 can be suppressed.

[0264] The film formation of the insulator 222 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, or an A LD method or the like.

[0265] Next, an insulator 224 is formed on the insulator 222. The film formation of the insulator 224 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, silicon oxide is formed as the insulator 224 by a CVD method.

[0266] Subsequently, it is preferable to perform a heat treatment. The heat treatment may be performed at 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. The heat treatment may be performed in a nitrogen or inert gas atmosphere, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. The heat treatment may also be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to supplement the desorbed oxygen after heat treatment in a nitrogen or inert gas atmosphere.

[0267] ​​​​​​​In this embodiment, as the heat treatment, after the formation of the insulator 224, a treatment is performed at a temperature of 400 ° C for 1 hour in a nitrogen atmosphere. By this heat treatment, impurities such as hydrogen and water contained in the insulator 224 can be removed.

[0268] Also, the heat treatment can be performed at each timing after the formation of the insulator 220 and after the formation of the insulator 222. The heat treatment can use the above-described heat treatment conditions, but the heat treatment after the formation of the insulator 220 is preferably performed in an atmosphere containing nitrogen.

[0269] Here, in order to form an excess oxygen region in the insulator 224, a plasma treatment containing oxygen may be performed in a reduced pressure state. The plasma treatment containing oxygen is preferably performed using, for example, a device having a power source for generating high-density plasma using microwaves. Alternatively, it may have a power source for applying RF (Radio Frequency) to the substrate side. By using high-density plasma, high-density oxygen radicals can be generated, and by applying RF to the substrate side, the oxygen radicals generated by the high-density plasma can be efficiently introduced into the insulator 224. Alternatively, after performing a plasma treatment containing an inert gas using this device, a plasma treatment containing oxygen may be performed to supplement the desorbed oxygen. Note that by appropriately selecting the conditions of the plasma treatment, impurities such as hydrogen and water contained in the insulator 224 can be removed. In that case, the heat treatment may not be performed.

[0270] Here, an insulator that functions as a stopper when etching the insulator 280, the insulator 244A, and the conductor 242B in a later process may be formed on the insulator 224. As the insulator, an insulator that can be used for the insulator 222 may be used. The film formation of the insulator can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. After the film formation of the insulator, the heat treatment described above may be performed.

[0271] Next, an oxide film 230A that becomes the oxide 230a and an oxide film 230B that becomes the oxide 230b are sequentially formed on the insulator 224 (see FIG. 4). Note that it is preferable to continuously form the oxide films without exposing them to the atmospheric environment. By forming the films without opening to the atmosphere, it is possible to prevent impurities or moisture from the atmospheric environment from adhering to the oxide film 230A and the oxide film 230B, and it is possible to keep the vicinity of the interface between the oxide film 230A and the oxide film 230B clean. The oxide film 230A, and the oxide film 230B can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. For example, when forming the oxide film 230A and the oxide film 230B by a sputtering method, oxygen or a mixed gas of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the formed oxide film can be increased. When forming the above oxide film by a sputtering method, for example, an In-M-Zn oxide target can be used. In particular, when forming the oxide film 230A, a part of the oxygen contained in the sputtering gas may be supplied to the insulator 224. Therefore, the sputtering gas for the oxide film 230A contains

[0272] method, a PLD method, or an ALD method, or the like. The film formation of the oxide film 230A and the oxide film 230B can be performed using a sputtering method, a CVD method, an MBE

[0273] For example, when forming the oxide film 230A and the oxide film 230B by a sputtering method, oxygen or a mixed gas of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the formed oxide film can be increased. When forming the above oxide film by a sputtering method, for example, an In-M-Zn oxide target can be used. When forming the oxide film 230A and the oxide film 230B by a sputtering method, oxygen or a mixed gas of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the formed oxide film can be increased. When forming the above oxide film by a sputtering method, for example, an In-M-Zn oxide target can be used. In particular, when forming the oxide film 230A, a part of the oxygen contained in the sputtering gas may be supplied to the insulator 224. Therefore, the sputtering gas for the oxide film 230A contains For example, when forming the oxide film 230A and the oxide film 230B by a sputtering method, oxygen or a mixed gas of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the formed oxide film can be increased. When forming the above oxide film by a sputtering method, for example, an In-M-Zn oxide target can be used. For example, when forming the oxide film 230A and the oxide film 230B by a sputtering method, oxygen or a mixed gas of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the formed oxide film can be increased. When forming the above oxide film by a sputtering method, for example, an In-M-Zn oxide target can be used.

[0274] In particular, when forming the oxide film 230A, a part of the oxygen contained in the sputtering gas may be supplied to the insulator 224. Therefore, the sputtering gas for the oxide film 230A contains In particular, when forming the oxide film 230A, a part of the oxygen contained in the sputtering gas may be supplied to the insulator 224. Therefore, the sputtering gas for the oxide film 230A contains The percentage of oxygen contained in the gas should be 70% or more, preferably 80% or more, and more preferably 100%. Good.

[0275] In addition, when the oxide film 230B is formed by a sputtering method, the oxide film 230B is formed by sputtering. The ratio of oxygen to be added is set to 1% or more and 30% or less, preferably 5% or more and 20% or less. The oxygen-deficient oxide semiconductor is formed in the channel formation region. A transistor using this region can achieve a relatively high field effect mobility.

[0276] In this embodiment, the oxide film 230A is formed by sputtering In:Ga: The film is formed using a target of Zn=1:3:4 [atomic ratio]. In addition, the oxide film 230B and Then, the In:Ga:Zn atomic ratio was 4:2:4.1 by sputtering. Each oxide film is formed by appropriately selecting the film formation conditions and atomic ratio. In this way, it is possible to form the oxide 230 according to the desired characteristics.

[0277] Next, a heat treatment may be performed. The heat treatment may be performed under the above-mentioned heat treatment conditions. By the heat treatment, impurities such as hydrogen and water in the oxide film 230A and the oxide film 230B are removed. In this embodiment, the wafer is heated at 400° C. in a nitrogen atmosphere. After one hour of treatment, the sample was treated in an oxygen atmosphere at 400°C for one hour. cormorant.

[0278] Next, a conductive film 242A is formed on the oxide film 230B. Aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten Niobium, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium A metal element selected from um, indium, ruthenium, iridium, strontium, and lanthanum, or an alloy containing the above-mentioned metal element as a component, or an alloy obtained by combining the above-mentioned metal elements, etc. is preferably used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. are preferably used. Also, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferred because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Note that the formation of the conductive film 242A can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method, etc. Next, the conductive film 242A is processed to form a hard mask for processing the oxide film 230A and the oxide film 230B. In addition, the processing of the conductive film 242A may be performed using a lithography method. Also, dry etching or wet etching can be used for the processing. Processing by the dry etching method is suitable for microfabrication. In the lithography method, first, the resist is exposed through a mask. Next, the exposed area is removed or left using a developer to form a resist mask. Next, the ... (The original text seems to be incomplete here. The translation continues based on the provided content.) ... ... ... ... ... ...

[0279] ... ...

[0280] ... ... ...

[0281] ... ... By performing an etching process through a resist mask, conductors, semiconductors, insulators, etc. can be processed into a desired shape. For example, a resist mask may be formed by exposing a resist using KrF excimer laser light, ArF excimer laser light, EUV (Extreme Ultraviolet) light, etc. Also, a liquid (e.g., water) may be filled between the substrate and the projection lens and exposure may be performed using a liquid immersion technique. Further, instead of the light described above, an electron beam or an ion beam may be used. Note that when using an electron beam or an ion beam, since direct drawing is performed on the resist, the above-described mask for resist exposure becomes unnecessary. Note that the resist mask can be removed by performing dry etching such as ashing, wet etching, performing wet etching after dry etching, or performing dry etching after wet etching. Next, by etching the conductive film 242A using the resist mask, a conductor 242B that functions as a hard mask is formed (see FIG. 5). After forming the conductor 242B, the

[0282] resist mask may be removed and then the oxide film may be processed, or the resist mask may be left as it is and processed. In the latter case, the resist mask may disappear during etching. After etching the above-described oxide film, the hard mask may be removed by etching, but in this embodiment, since the conductor 242B is further processed to form a source electrode and a drain electrode, the conductor 242B is not removed. As a dry etching apparatus, a capacitively coupled plasma (CCP) having parallel plate electrodes

[0283] :It is possible to use a capacitively coupled plasma etching apparatus. A capacitively coupled plasma etching apparatus having parallel plate electrodes may be configured to apply a high-frequency power source to one of the parallel plate electrodes. Or it may be configured to apply a plurality of different high-frequency power sources to one of the parallel plate electrodes. Or it may be configured to apply high-frequency power sources of the same frequency to each of the parallel plate electrodes. Or it may be configured to apply high-frequency power sources of different frequencies to each of the parallel plate electrodes. Or it is possible to use a dry etching apparatus having a high-density plasma source. A dry etching apparatus having a high-density plasma source can use, for example, an inductively coupled plasma (ICP) etching apparatus, etc. This can be done. A capacitively coupled plasma etching apparatus having parallel plate electrodes may be configured to apply a high-frequency power source to one of the parallel plate electrodes. Or it may be configured to apply a plurality of different high-frequency power sources to one of the parallel plate electrodes. Or it may be configured to apply high-frequency power sources of the same frequency to each of the parallel plate electrodes. Or it may be configured to apply high-frequency power sources of different frequencies to each of the parallel plate electrodes. Or it is possible to use a dry etching apparatus having a high-density plasma source. Or it may be configured to apply a plurality of different high-frequency power sources to one of the parallel plate electrodes. Or it may be configured to apply high-frequency power sources of the same frequency to each of the parallel plate electrodes. Or it may be configured to apply high-frequency power sources of different frequencies to each of the parallel plate electrodes. Or it is possible to use a dry etching apparatus having a high-density plasma source. Or it may be configured to apply high-frequency power sources of the same frequency to each of the parallel plate electrodes. Or it may be configured to apply high-frequency power sources of different frequencies to each of the parallel plate electrodes. Or it is possible to use a dry etching apparatus having a high-density plasma source. Or it may be configured to apply high-frequency power sources of different frequencies to each of the parallel plate electrodes. Or it is possible to use a dry etching apparatus having a high-density plasma source. Or it is possible to use a dry etching apparatus having a high-density plasma source. A dry etching apparatus having a high-density plasma source can use, for example, an inductively coupled plasma (ICP) etching apparatus, etc. ed Plasma) etching apparatus, etc. This can be done.

[0284] Next, using the conductor 242B as a hard mask, the oxide film 230A and the oxide film 23 0B are processed into an island shape to form the oxide 230a and the oxide 230b (see Fig. 5. ). Note that a part of the insulator 224 may be removed in this processing.

[0285] Here, the oxide 230a and the oxide 230b are formed so that at least a part thereof overlaps with the conductor 205. Also, the side surfaces of the oxide 230a and the oxide 230b are preferably substantially perpendicular to the upper surface of the insulator 222. By the side surfaces of the oxide 230a and the oxide 23 0b being substantially perpendicular to the upper surface of the insulator 222, when providing a plurality of transistors 2 00, it becomes possible to reduce the area and increase the density. Note that the configuration may be such that the angle formed by the side surfaces of the oxide 230a and the oxide 23 0b and the upper surface of the insulator 222 is an acute angle. 00, miniaturization and high density are possible. Note that the configuration may be such that the angle formed by the side surfaces of the oxide 230a and the oxide 23 0b and the upper surface of the insulator 222 is an acute angle. In this case, the larger the angle formed by the sides of the oxide 230a and the oxide 230b and the upper surface of the insulator 222, the better. It is more preferable.

[0286] Also, between the sides of the oxide 230a, the oxide 230b, and the conductor 242B and the upper surface of the conductor 24 2B, there is a curved surface. That is, it is preferable that the end of the side surface and the end of the upper surface are curved (hereinafter also referred to as round). The curved surface is, for example, at the end of the conductor 242B, and the radius of curvature is 3 nm or more and 10 nm or less, preferably 5 nm or more and 6 nm or less. By not having a corner at the end, the film coating property in the subsequent film formation process is improved.

[0287] Note that for the processing of the oxide film, the conductor 242B can be used as a hard mask, and a dry etching method or a wet etching method can be used. Processing by the dry etching method is suitable for fine processing.

[0288] Also, by performing the above processing such as dry etching, impurities caused by etching gas or the like may adhere to or diffuse into the sides or the inside of the oxide 230a and the oxide 230b. Examples of the impurities include fluorine or chlorine.

[0289] In order to remove the above impurities, cleaning is performed. As the cleaning method, there are wet cleaning using a cleaning liquid or the like, plasma treatment using plasma, or cleaning by heat treatment. These cleanings may be appropriately combined.

[0290] As the wet cleaning, a cleaning treatment may be performed using an aqueous solution diluted with oxalic acid, phosphoric acid, hydrogen peroxide water, or hydrofluoric acid with carbonated water or pure water. Or pure water or Ultrasonic cleaning may be performed using carbonated water. In this embodiment, ultrasonic cleaning is performed using pure water or carbonated water.

[0291] Subsequently, heat treatment may be performed. The conditions of the heat treatment can use the conditions of the heat treatment described above. However, when oxidation of the conductor 242B is a concern due to the heat treatment, the heat treatment is preferably performed in an atmosphere not containing oxygen. On the other hand, when the conductor 242B contains an oxidation-resistant material, the heat treatment may be performed in an atmosphere containing oxygen.

[0292] Next, an insulator 244A is formed on the insulator 224, the oxide 230a, the oxide 230b, and the conductor 242B (see FIG. 6). Note that the insulator 244A preferably functions as an insulating barrier, and an insulator containing one or both of aluminum and hafnium oxides may be formed. As the insulator containing one or both of aluminum and hafnium oxides, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. are preferably used. The insulator 244A having barrier properties can suppress the oxidation of the conductor 242B. Note that when the conductor 242B contains an oxidation-resistant material, the insulator 244A does not necessarily need to be provided. The formation of the insulator 244A can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0293] Next, an insulator 280 is formed on the insulator 244A. The insulator 280 preferably has an insulator with a low relative permittivity. For example, silicon oxide, silicon oxynitride, oxynitride ​​​​​​​​​​​​​​Silicon oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with pores, or resin, etc. are preferably included. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method. It is preferable to have any of them. In particular, when silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores is used for the insulator 280, it is preferable because an excess oxygen region can be easily formed in the insulator 280 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. The film formation of the insulator 280 can be performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. Or, it can be performed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing, offset printing, etc.), a doctor knife method, a roll coater method, or a curtain coater method, etc. In this embodiment, as the insulator 280, silicon oxynitride is formed by the CVD method.

[0294] Note that the insulator 280 is preferably formed so that its upper surface has flatness. For example, the upper surface of the insulator 280 may have flatness immediately after film formation. Or, for example, the insulator 280 may have flatness by removing an insulator or the like from the upper surface so as to be parallel to a reference surface such as the back surface of the substrate after film formation. Such a process is called a planarization process. As the planarization process, there are a CMP process, a dry etching process, etc. In this embodiment, as the planarization process, a CMP process is used. However, the upper surface of the insulator 280 does not necessarily have to have flatness. Note that the insulator 280 is preferably formed so that its upper surface has flatness. For example, the upper surface of the insulator 280 may have flatness immediately after film formation. Or, for example, the insulator 280 may have flatness by removing an insulator or the like from the upper surface so as to be parallel to a reference surface such as the back surface of the substrate after film formation. Such a process is called a planarization process. As the planarization process, there are a CMP process, a dry etching process, etc. In this embodiment, as the planarization process, a CMP process is used. However, the upper surface of the insulator 280 does not necessarily have to have flatness. Note that the insulator 280 is preferably formed so that its upper surface has flatness. For example,

[0295] Next, an area overlapping at least the conductor 205 is formed on the insulator 280. Perform a processing operation to form the opening 245 (see FIG. 7). For forming the opening, wet etching may be used, but it is preferable to use a dry etching method in terms of being capable of fine processing and being able to process the side surface of the insulator 280 substantially vertically. Also, the formation of the opening 245 is preferably performed by forming a hard mask on the insulator 280. The hard mask may be made of a conductor or an insulator.

[0296] Next, process the insulator 244A and the conductor 242B to form the insulator 244 and the conductor 242 (conductor 242a and conductor 242b) (see FIG. 8). For this processing it is preferable to use dry etching capable of anisotropic etching. By this processing a part of the side surface of the oxide 230a, the surface, side surface of the oxide 230b, and the surface of the insulator 224 is exposed. Also, a part of the insulator 224 may be etched by this processing. Also, the cross-section of the surfaces of the conductor 242a and the conductor 242b facing each other may have a tapered shape. On the other hand, the cross-section may have a substantially vertical shape.

[0297] At this time, using the insulator 280 and / or the above hard mask as a mask, form the conductor 242a and the conductor 242b. Thus, the opening 245 formed in the insulator 280 will overlap the region between the conductor 242a and the conductor 242b. As a result in a later process, the conductor 260 can be self-aligned and arranged between the conductor 242a and the conductor 242b.

[0298] Here, it is preferable to perform a heat treatment. The heat treatment is at 250°C or higher and 650°C or lower, preferably Alternatively, it may be carried out at 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. The heat treatment is carried out in a nitrogen or inert gas atmosphere. On the other hand, when the conductor 242 is a conductor having oxidation resistance, the heat treatment may be carried out in an atmosphere containing oxygen. Also the heat treatment may be carried out under reduced pressure. For example, as the heat treatment, treatment is carried out at a temperature of 400 °C for 1 hour in a nitrogen atmosphere.

[0299] By this heat treatment, impurities such as hydrogen and water contained in the oxide 230a and the oxide 230b can be removed. Also, damage generated in the oxide 2 30a or the oxide 230b by dry etching in the above processing can be recovered. Also, when the heat treatment is carried out in an atmosphere containing oxygen, oxygen can be added to the oxide 230a and the oxide 230b.

[0300] Also, by the above heat treatment, the above-described metal element diffuses from the conductor 242 to the oxide 230, and the metal element can be added to the oxide 230. Also, oxygen in the vicinity of the interface between the conductor 242 of the oxide 230 may be absorbed by the conductor 242. As a result, the vicinity of the interface between the oxide 230 and the conductor 242 becomes a metal compound, and the resistance is reduced. At that time a part of the oxide 230 and the above-described metal element may be alloyed. By alloying a part of the oxide 230 and the metal element, the metal element added to the oxide 230 is in a relatively stable state, and a highly reliable semiconductor device can be provided. In FIG. 8(B) as an example of the low-resistance region of the oxide 230, regions 243a and regions 243b are shown by dotted lines.

[0301] Regions 243a and 243b are provided so as to diffuse in the depth direction in the vicinity of the conductor 242 of the oxide 230b. Although an example in which they are provided so as to diffuse in the depth direction is shown, the present invention is not limited to this. The regions 243a and 243b may be formed throughout the oxide 230b in the depth direction, or may be formed in the oxide 230a. Also, regions 243a and region 243b are shown as an example of being formed in a region (regions 231 and 232 shown in FIG. 2) that diffuses horizontally from the conductor 242 in the horizontal direction, but the present invention is not limited to this. Regions 243a and region 243b may be formed only in a region (region 231 ) that overlaps with the conductor 242, or may also be formed in a region (a part of region 234) that overlaps with a part of the conductor 260 formed in a later process.

[0302] Also, when hydrogen in the oxide 230 diffuses into region 231 shown in FIG. 2 and enters the oxygen deficiency existing in region 231, it becomes a relatively stable state. Also, hydrogen in the oxygen deficiency existing in region 234 escapes from the oxygen deficiency by heat treatment at 250 °C or higher, diffuses into region 231, and enters the oxygen deficiency existing in region 231, becoming a relatively stable state. Therefore, by heat treatment, region 231 has lower resistance, and region 234 is purified ( reduction of impurities such as water and hydrogen) and has higher resistance.

[0303] Also, after heat treatment in a nitrogen or inert gas atmosphere, heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. The heat treatment may be performed at 25 0 °C or higher and 650 °C or lower, preferably 300 °C or higher and 500 °C or lower, more preferably 320 °C or higher and 450 °C or lower. ​​​​​​​

[0304] After forming the conductive film 242A or after the heat treatment after forming the conductor 242, oxygen in the region 231 of the oxide 230 may be absorbed by the conductive film 242A or the conductor 242, and as a result, oxygen deficiency may occur in the region 231. Hydrogen in the oxide 230 enters the oxygen deficiency, and the carrier density in the region 231 increases. Therefore, the region 231 of the oxide 230 becomes n-type and has a lower resistance.

[0305] The oxygen concentration in the region 231 may be lower than the oxygen concentration in the region 234. Also, the oxygen concentration in the region 232 may be equal to or higher than the oxygen concentration in the region 231 and equal to or lower than the oxygen concentration in the region 234. Also, the hydrogen concentration in the region 231 may be higher than the hydrogen concentration in the region 234. Also, the hydrogen concentration in the region 232 may be equal to or higher than the hydrogen concentration in the region 234 and equal to or lower than the hydrogen concentration in the region 231.

[0306] Next, an oxide film 230C that becomes the oxide 230c is formed on the insulator 280 so as to have a region in contact with the side surface of the oxide 230a, the upper surface and side surface of the oxide 230b, the side surface of the conductor 242, and the side surface of the insulator 280 (see FIG. 9).

[0307] The oxide film 230C can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The oxide film 230C may be formed using the same film formation method as the oxide film 230A or the oxide film 230B according to the characteristics required for the oxide 230c. In the present embodiment, as the oxide film 230C, it is formed by a sputtering method using a target of In:Ga:Zn = 1:3:4 [atomic ratio].

[0308] ​​​​​​​​​​​Subsequently, an insulator 250A is formed on the oxide film 230C (see Fig. 9).

[0309] The insulator 250A can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method or the like. As the insulator 250A, it is preferable to form silicon oxynitride by a CVD method. Note that the film formation temperature when forming the insulator 250A is preferably 350°C or higher and lower than 450°C, particularly around 400°C. By forming the insulator 250A at 400°C, an insulator with few impurities can be formed.

[0310] Note that oxygen can be excited with microwaves to generate high-density oxygen plasma, and oxygen can be introduced into the insulator 250A by exposing the insulator 250A to the oxygen plasma.

[0311] Also, heat treatment may be performed. The heat treatment conditions described above can be used. By this heat treatment, the moisture concentration and hydrogen concentration of the insulator 250A can be reduced.

[0312] Here, the conductor 242 and the conductor 260 formed in a later process can form a parasitic capacitance. That is, the insulating film provided on the side surface of the conductor 242 can function as a dielectric of the parasitic capacitance. On the other hand, since the insulating film functions as a gate insulator of the transistor 200, it is preferably formed of a thin film of 2 0 nm or less, preferably 10 nm or less, more preferably 5 nm or less. In order to make the insulating film provided on the side surface of the conductor 242 thick enough so that the parasitic capacitance can be ignored, it is preferable that the insulating film has a laminated structure of two or more layers at least on the side surface of the conductor 242.

[0313] ​​​​​​​ Therefore, it is preferable to perform anisotropic etching on the insulator 250A and form the insulator 250B on the side surface of the conductor 242 and also on the side surface of the insulator 280 via the oxide film 230C (see FIG. 10). (See FIG. 10).

[0314] Next, an insulator 250C is formed so as to cover the oxide film 230C and the insulator 250B (see FIG. 11). The insulator 250C can be formed of the same material using the same apparatus as the insulator 250A. Through the above process, the insulator 250C is provided above the oxide 230b, and the insulator 250B and the insulator 250C can be provided on the side surface of the conductor 242. That is, an insulator thicker than the insulator above the oxide 230b can be provided on the side surface of the conductor 242. (See FIG. 11). The insulator 250C can be formed of the same material using the same apparatus as the insulator 250A. Through the above process, the insulator 250C is provided above the oxide 230b, and the insulator 250B and the insulator 250C can be provided on the side surface of the conductor 242. That is, an insulator thicker than the insulator above the oxide 230b can be provided on the side surface of the conductor 242.

[0315] Subsequently, the conductive films 260A and 260B are sequentially formed (see FIG. 11). The conductive films 260A and 260B can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. For example, titanium nitride may be formed as the conductive film 260A, and tungsten may be formed as the conductive film 260B.

[0316] As the conductive film 260A, a metal nitride may be formed by a CVD method or a sputtering method. By using a metal nitride for the conductive film 260A, it is possible to prevent the conductive film 260B from being oxidized by oxygen in the insulator 250C and the conductivity from decreasing.

[0317] Also, by laminating a low-resistance metal film as the conductive film 260B, a transistor with a small drive voltage can be provided.

[0318] ​​​​​​​​​​​ Subsequently, heat treatment can be performed. The heat treatment can use the aforementioned heat treatment conditions. Note that the heat treatment may not be necessary in some cases. By this heat treatment, a low-resistance region may be formed in the oxide 230b.

[0319] Next, the conductive film 260B, the conductive film 260A, the insulator 250B, the insulator 250C, and the oxide film 230C are processed to perform a planarization treatment, and the conductor 260 (conductor 260a and conductor 260b), the insulator 250 (insulator 250a and insulator 250b), and the oxide 230c are formed (see FIG. 12). For the planarization treatment, there are methods such as using the CMP method to polish the conductive film 260B, the conductive film 260A, the insulator 250B, the insulator 250C, and the oxide film 230C, and methods using an etch-back method. Note that it is not necessary to process the conductive film 260B, the conductive film 260A, the insulator 250B, the insulator 250C, and the oxide film 230C all at once, and they may be processed while appropriately changing the conditions.

[0320] In this way, the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and the region sandwiched between the conductor 242a and the conductor 242b. Since the formation of the conductor 260 is performed self-alignedly without using a lithography method, it is not necessary to provide a margin for alignment of the conductor 260. Therefore, the occupied area of the transistor 200 can be reduced, and the semiconductor device can be miniaturized and highly integrated. In addition, since the lithography process is unnecessary, an improvement in productivity due to process simplification is expected.

[0321] In addition, when miniaturizing the semiconductor device, it is required to shorten the gate length. However, the conductor It is necessary to prevent the conductivity of the conductor 260 from decreasing. Therefore, if the film thickness of the conductor 260 is increased, the conductor 260 can have a shape with a high aspect ratio. In this embodiment , since the conductor 260 is provided so as to be embedded in the opening of the insulator 280, even if the conductor 260 has a shape with a high aspect ratio, it can be formed without collapsing the conductor 260 during the process.

[0322] At this time, at least a part of the conductor 260 is formed so as to overlap with the conductor 205, the oxide 230a, and also the oxide 230b.

[0323] Further, by this processing, it is preferable that the upper surface of the insulator 280, the upper surface of the conductor 260, the upper surface of the insulator 250, and the upper surface of the oxide 230c are substantially flush.

[0324] Here, the insulator 250b is disposed between the oxide 230b, the conductor 242a (conductor 242b), and the insulator 280 and the conductor 260, and the insulator 250a is disposed between the conductor 242 a (conductor 242b), and the insulator 280 and the insulator 250b. That is, the insulator 250 has the insulator 250b between the oxide 230b and the conductor 260, and has the insulator 250a and the insulator 250b between the conductor 242 and the conductor 260. Therefore, by manufacturing the transistor 200 by the above method, the film thickness T1 of the insulator 25 0 can be made thinner than the film thickness T2. Thereby, the parasitic capacitance between the conductor 260 and the conductor 242 can be reduced, and a transistor 200 having high frequency characteristics can be provided.

[0325] Note that in this embodiment, the insulator 250 is made using the insulator 250a and the insulator 250b.​​​ However, the method for manufacturing the semiconductor device shown in this embodiment is not limited to this. For example, in the anisotropic etching process shown in FIG. The area corresponding to the bottom of the opening 245 is not completely removed, but the thickness of the film in that area is reduced. This allows the insulator 250A alone to have a thickness T1 smaller than the thickness T2. A border 250 may be formed.

[0326] In this embodiment, the insulator 250 is made of two layers, an insulator 250a and an insulator 250b. However, the configuration of the transistor 200 is not limited to this. The number of layers of the insulator 250 located between the conductor 260 is set to be the number of layers of the oxide 230b and the conductor 260. If the number of layers of the insulator 250 located between the 10 and 110 is to be more than that of the 100, the insulator 250 must be composed of three or more layers. It may be formed.

[0327] Next, the insulator 274 is formed on the insulator 280 and the conductor 260 (see FIG. 13). The insulator 274 is made of aluminum and / or hafnium, which have barrier properties. For example, it is preferable to use an oxide of aluminum oxide by sputtering. By using a sputtering method, it is possible to form a film containing a large amount of oxygen. Moreover, it is possible to form an aluminum oxide film having a small amount of impurities such as water or hydrogen.

[0328] In addition, by forming the film in an atmosphere containing oxygen gas using a sputtering device, Oxygen can also be introduced into the insulators 250 and 280 while the insulator 274 is being formed. As a result, the insulator 274 can be used as an oxygen source to supply oxygen to the insulators 250 and 280. Oxygen in the insulator 274 is supplied, and an excess oxygen region is formed in the insulator 250 and the insulator 280. It can be formed.

[0329] The insulator 250 and the insulator 280 in which the excess oxygen region is formed as described above can effectively supply oxygen from the excess oxygen region to the region 234 of the oxide 230 through the oxide 230c and the like. It can be supplied.

[0330] Subsequently, heat treatment can be performed. The heat treatment can use the above-described heat treatment conditions. By performing the heat treatment, oxygen in the insulator such as the insulator 250 can be supplied to the oxide 230. Further, hydrogen trapped in the oxygen deficiency formed in the region 231 of the oxide 230 may be absorbed into the insulator 274 through the insulator 244 and the insulator 280, and the hydrogen in the oxide 230 may be reduced. It can be reduced.

[0331] Next, an insulator 281 is formed on the insulator 274. The insulator 281 can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. Alternatively, it can be formed using a spin coating method, a dip method, a droplet ejection method (such as an inkjet method), a printing method (such as screen printing or offset printing), a doctor knife method, a roll coater method, or a curtain coater method. In the present embodiment, silicon oxynitride is used as the insulator 281.

[0332] Next, a part of the insulator 281 is removed. The insulator 281 is preferably formed so that the upper surface has flatness. For example, the insulator 281 has flatness on the upper surface immediately after film formation. ​​​​​​​​​​It may be okay. Or, for example, the insulator 281 may have flatness by removing an insulator or the like from above so as to be parallel to a reference surface such as the back surface of the substrate after film formation. Such processing is called planarization processing. Examples of the planarization processing include CMP processing and dry etching processing. In the present embodiment, CMP processing is used as the planarization processing. However, the upper surface of the insulator 281 does not necessarily have to have flatness.

[0333] Next, openings reaching the oxide 230 are formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 244. The openings may be formed using a lithography method. Note that, in the openings reaching the oxide 230, the side surfaces of the oxide 230 are exposed so that the conductor 240a and the conductor 240b are provided in contact with the side surfaces of the oxide 230. The openings are formed.

[0334] Next, a conductive film serving as the first conductor of the conductor 240 and the second conductor of the conductor 240 is formed. The conductive film can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method or the like.

[0335] Next, by performing CMP processing, a part of the conductive film serving as the conductor 240a and the conductor 240b is removed to expose the insulator 281. As a result, the conductive film remains only in the above openings, and conductors 240a and 240b having a flat upper surface can be formed (see FIG. 13). Note that a part of the insulator 281 may be removed by the CMP processing.

[0336] As described above, a semiconductor device having the transistor 200 can be manufactured. FIGS. 4 to As shown in FIGS. 1 to 13, by using the method for manufacturing a semiconductor device according to the present embodiment, a transistor 200 having good electrical characteristics and capable of miniaturization or high integration can be manufactured. It is possible.

[0337] According to one aspect of the present invention, it is possible to provide a semiconductor device capable of miniaturization or high integration. Alternatively, according to one aspect of the present invention, it is possible to provide a semiconductor device having good electrical characteristics. Alternatively, according to one aspect of the present invention, it is possible to provide a semiconductor device having good frequency characteristics. Alternatively, according to one aspect of the present invention, it is possible to provide a semiconductor device having good reliability. Alternatively, according to one aspect of the present invention, it is possible to provide a semiconductor device having a small off-current. Alternatively, according to one aspect of the present invention, it is possible to provide a semiconductor device having a large on-current. Alternatively, according to one aspect of the present invention, it is possible to provide a semiconductor device with reduced power consumption. Alternatively, according to one aspect of the present invention, it is possible to provide a highly productive semiconductor device. It is possible.

[0338] As described above, the configurations, methods, etc. shown in the present embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments. It can be used in appropriate combination.

[0339] <Modification example of semiconductor device> Hereinafter, with reference to FIGS. 14 to 17, an example of a semiconductor device having a transistor 200 according to one aspect of the present invention, which is different from that shown in the previous <Configuration example of semiconductor device>, will be described. An example of a semiconductor device having a transistor 200 according to one aspect of the present invention, which is different from that shown in the previous <Configuration example of semiconductor device>, will be described. It will be described.

[0340] In FIGS. 14 to 17, (A) in each figure shows a top view. Also, (B) in each figure is a cross-sectional view corresponding to the part indicated by the one-dot chain line of A1 - A2 shown in (A), and is also a cross-sectional view in the channel length direction of the transistor 200. Further, (C) in each figure is a cross-sectional view corresponding to the part indicated by the one-dot chain line of A3 - A 4 shown in (A), and is also a cross-sectional view in the channel width direction of the transistor 200. In the top view of (A) in each figure, some elements are omitted for clarity of the figure and shown.

[0341] In the semiconductor device shown in FIGS. 14 to 17, the same reference numerals are assigned to the structures having the same functions as the structures constituting the semiconductor device (see FIG. 1) shown in <Configuration Example of Semiconductor Device>. In this item, regarding the constituent materials of the transistor 200, the materials described in detail in <Configuration Example of Semiconductor Device> can be used.

[0342] The transistor 200 shown in FIG. 14 is different from the transistor 200 shown in FIG. 1 in that an insulator 252 is disposed between the oxide 230, the conductor 242, and the insulator 280 and the oxide 230c. Here, as the insulator 252, an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, which can be used for the insulator 244, may be used . By using such an insulator 252, oxidation of the surfaces of the conductor 242a and the conductor 242b that are in contact with the insulator 252 can be suppressed.

[0343] Further, in the transistor 200 shown in FIG. 14, an insulator 252 is provided between the conductor 242 and the conductor 260, and no insulator 252 is provided between the oxide 230b and the conductor 260 . Therefore, in the transistor 200 shown in FIG. 14, by providing the insulator 252, the conduction The parasitic capacitance between the electrical body 260 and the conductor 242 can be reduced. As a result, in the transistor 200 shown in FIG. 14 In the transistor 200 shown in FIG. 1, the film thickness of the insulator 250 between the conductor 242 and the conductor 260 and the film thickness of the insulator 250 between the oxide 230b and the conductor 260 may be made substantially the same .

[0344] Also, in the transistor 200 shown in FIG. 1, as the oxide 230, a configuration in which three layers of the oxide 230 a, the oxide 230b, and the oxide 230c are laminated is shown, but the semiconductor device shown in the present embodiment is not limited to this. For example, like the transistor 200 shown in FIG. 15 , a configuration in which the oxide 230c is not provided may be adopted.

[0345] Also, in the transistor 200 shown in FIG. 1, a configuration in which an insulator 244 is provided to cover the conductor 242, the oxide 230, and the insulator 224 is shown, but the semiconductor device shown in the present embodiment is not limited to this. For example, when a material with oxidation resistance is used for the conductor 242 , like the transistor 200 shown in FIG. 16 , a configuration in which the insulator 244 is not provided may be adopted.

[0346] By adopting a configuration in which the insulator 244 is not provided, oxygen added to the insulator 274 can be supplied from the side surface of the oxide 230 during the film formation of the insulator 2 80. Also, in this case, oxygen added to the insulator 280 can be supplied to the oxide 230 through the insulator 224 . As a result, oxygen can be more effectively supplied to the region 234 of the oxide 230 .

[0347] The transistor 200 shown in FIG. 17 is different from FIG. 17 in that the conductor 242 is not provided ​It is different from the transistor 200 shown in 1. In the transistor 200 shown in FIG. 17, for example, by adding an element that can increase the carrier density of the oxide 230 and reduce the resistance as a dopant, the region 243 may be formed.

[0348] As the dopant, an element that forms an oxygen deficiency or an element that binds to the oxygen deficiency may be used. Typical examples of such elements include boron or phosphorus. In addition, hydrogen, carbon, nitrogen, fluorine, sulfur, chlorine, titanium, noble gases, etc. may be used. Also, typical examples of noble gas elements include helium, neon, argon, krypton, and xenon. In addition, one or more metal elements selected from metal elements such as aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, sodium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc. may be added. Among the above, boron and phosphorus are preferable as the dopant. When boron and phosphorus are used as the dopant, the equipment of the amorphous silicon or low-temperature polysilicon manufacturing line can be used, so the capital investment can be suppressed. The concentration of the above elements may be measured using SIMS or the like.

[0349] In particular, it is preferable to use an element that easily forms an oxide as the element added to the region 243. Typical examples of such elements include boron, phosphorus, aluminum, magnesium, etc. The element added to the region 243 takes oxygen in the oxide 230 to form an oxide. can be formed. As a result, many oxygen deficiencies occur in region 243. The combination of the oxygen deficiency and hydrogen in the oxide 230 generates carriers, resulting in a region with extremely low resistance. Further, since the element added to region 243 exists in region 243 in the state of a stable oxide, it is difficult to desorb from region 243 even if a process requiring a high temperature is performed in a subsequent step. That is, by using an element that easily forms an oxide as the element added to region 243, a region that is difficult to increase in resistance even through a high-temperature process can be formed in oxide 230. By forming region 243 that functions as a source region or a drain region in oxide 230, a conductor 240 that functions as a plug can be connected to region 243 without providing source electrodes and drain electrodes formed of a metal. When forming region 243 by adding a dopant, for example, a dummy gate may be formed at the position where oxide 230c, insulator 250, and conductor 260 are provided, and the dopant may be added using the dummy gate as a mask. Thereby, in oxide 230, region 243 containing the above element can be formed in a region where the dummy gate does not overlap. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. That is, by using an element that easily forms an oxide as the element added to region 243, a region that is difficult to increase in resistance even through a high-temperature process can be formed in oxide 230. By forming region 243 that functions as a source region or a drain region in oxide 230, a conductor 240 that functions as a plug can be connected to region 243 without providing source electrodes and drain electrodes formed of a metal.

[0350] When forming region 243 by adding a dopant, for example, a dummy gate may be formed at the position where oxide 230c, insulator 250, and conductor 260 are provided, and the dopant may be added using the dummy gate as a mask. Thereby, in oxide 230, region 243 containing the above element can be formed in a region where the dummy gate does not overlap. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified.

[0351] When forming region 243 by adding a dopant, for example, a dummy gate may be formed at the position where oxide 230c, insulator 250, and conductor 260 are provided, and the dopant may be added using the dummy gate as a mask. Thereby, in oxide 230, region 243 containing the above element can be formed in a region where the dummy gate does not overlap. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified.

[0352] As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. As the dopant addition method, an ion implantation method in which an ionized source gas is mass-separated and added, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, or the like can be used. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. When mass separation is performed, the ion species to be added and its concentration can be strictly controlled. On the other hand, when mass separation is not performed, the addition operation can be simplified. When separation is not performed, high-concentration ions can be added in a short time. Also, an ion doping method that generates clusters of atoms or molecules and ionizes them may be used. Note that the dopant may be rephrased as an ion, donor, acceptor, impurity, element, etc. Yes.

[0353] Also, by adding an element that forms an oxygen deficiency in region 243 and performing heat treatment, the hydrogen contained in region 234 that functions as a channel formation region can sometimes be captured by the oxygen deficiency contained in region 243. Thereby, stable electrical characteristics can be given to transistor 200, and reliability can be improved.

[0354] Note that after the addition of the dopant, as shown in FIG. 6, an insulator 280 is formed, CMP processing is performed until the dummy gate is exposed, and the exposed dummy gate may be removed. In this way, the opening 245 shown in FIG. 7 can be formed.

[0355] As described above, the configurations, structures, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, structures and methods, etc. shown in other embodiments.

[0356] (Embodiment 2) In this embodiment, a form of a semiconductor device that functions as a memory device, which is different from the above embodiment, will be described with reference to FIGS. 18 to 21.

[0357] <Memory device 1> FIGS. 18(A) and 18(B) show a cell 600 that constitutes a memory device. Cell 600 includes transistors 200a, transistor 200b, capacitor element 100a, and capacitor element 100b. FIG. 18(A) is a top view of cell 600. Also, FIG. 18(B) is FIG. 18 (A) is a cross-sectional view of the part indicated by the one-dot chain line A1 - A2. Note that the top view of Fig. 18(A) shows only some elements for clarity of the figure.

[0358] The cell 600 has transistors 200a and 200b, has a capacitor element 100a superimposed on the transistor 200a, and has a capacitor element 100b superimposed on the transistor 200b. In the cell 600, the transistor 200a and the transistor 2 00b, and the capacitor element 100a and the capacitor element 100b may be arranged in line symmetry. Therefore, it is preferable that the transistor 200a and the transistor 200b have similar configurations, and it is preferable that the capacitor element 100a and the capacitor element 100b have similar configurations.

[0359] There is an insulator 130 on the insulator 281 on the transistors 200a and 200b, and there is an insulator 150 on the insulator 130. Here, the insulator 150 may be an insulator that can be used for the insulator 281.

[0360] Furthermore, there is a conductor 160 on the insulator 150. Also, a conductor 240 is provided so as to be embedded in the openings formed in the insulator 280, the insulator 27 4, the insulator 281, the insulator 130, and the insulator 150. The lower surface of the conductor 240 is in contact with the conductor 242b, and the upper surface of the conductor 240 is in contact with the conductor 160.

[0361] The transistors 200a and 200b can use the transistor 200 shown in the above embodiment. Therefore, the transistors 200a and 2 00b Regarding the configuration of 00b, the description of the transistor 200 above can be referred to. Also , in FIGS. 18(A) and 18(B), the reference numerals of the elements of the transistor 200a and the transistor 200b are omitted. Note that the transistor 200a and the transistor 200b shown in FIGS. 18(A) and 18(B) are merely examples, and are not limited to their structures, and appropriate transistors may be used according to the circuit configuration and the driving method.

[0362] Both the transistor 200a and the transistor 200b are constituted by the oxide 230, and one of the source and drain of the transistor 200a and one of the source and drain of the transistor 200 b are both in contact with the conductor 242b. Therefore, one of the source and drain of the transistor 200a and one of the source and drain of the transistor 200b are electrically connected to the conductor 240 via the conductor 242b. Thereby, the contact portions of the transistor 200a and the transistor 200b are shared, and the number of plugs and contact holes can be reduced. In this way, by sharing the wiring that is electrically connected to one of the source and drain, the occupied area of the memory cell array can be further reduced.

[0363] [Capacitor elements 100a and 100b] As shown in FIGS. 18(A) and 18(B), the capacitor element 100a is provided in a region that overlaps with the transistor 200a. Similarly, the capacitor element 100b is provided in a region that overlaps with the transistor 200b. Note that the capacitor element 100b has a structure corresponding to the structure of the capacitor element 100a. Hereinafter, the detailed structure of the capacitor element 100a will be described. Unless otherwise specified, the description of the capacitive element 100a can be referred to for the capacitive element 100b. This is possible.

[0364] The capacitive element 100a includes a conductor 110, an insulator 130, and a conductor 120 on the insulator 130. Here, the conductor 110 and the conductor 120 may be conductors that can be used for the conductor 203, the conductor 205, or the conductor 260, etc. The capacitive element 100a is formed in an opening of the insulator 244, the insulator 280, the insulator 274, and the insulator 281. On the bottom surface and the side surface of the opening, the conductor 110 that functions as a lower electrode and the conductor 120 that functions as an upper electrode face each other with the insulator 130 that functions as a dielectric interposed therebetween. Here, the conductor 110 of the capacitive element 100a is formed in contact with the conductor 242a of the transistor 200a.

[0365] In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area). In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area). In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area). In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area). In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area).

[0366] In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area). In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area). In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area). In particular, by increasing the depth of the opening of the insulator 280, the insulator 274, and the insulator 281, the projected area remains unchanged, and the capacitance of the capacitive element 100a can be increased. Therefore, the capacitive element 100a is preferably of a cylinder type (the side area is larger than the bottom area).

[0367] With the above configuration, the capacitance per unit area of the capacitive element 100a can be increased, and the miniaturization or high integration of the semiconductor device can be promoted. Also, the value of the capacitance of the capacitive element 100a can be appropriately set according to the film thicknesses of the insulator 280, the insulator 274, and the insulator 281. Therefore, a semiconductor device with a high degree of design freedom can be provided. With the above configuration, the capacitance per unit area of the capacitive element 100a can be increased, and the miniaturization or high integration of the semiconductor device can be promoted. Also, the value of the capacitance of the capacitive element 100a can be appropriately set according to the film thicknesses of the insulator 280, the insulator 274, and the insulator 281. Therefore, a semiconductor device with a high degree of design freedom can be provided. With the above configuration, the capacitance per unit area of the capacitive element 100a can be increased, and the miniaturization or high integration of the semiconductor device can be promoted. Also, the value of the capacitance of the capacitive element 100a can be appropriately set according to the film thicknesses of the insulator 280, the insulator 274, and the insulator 281. Therefore, a semiconductor device with a high degree of design freedom can be provided. With the above configuration, the capacitance per unit area of the capacitive element 100a can be increased, and the miniaturization or high integration of the semiconductor device can be promoted. Also, the value of the capacitance of the capacitive element 100a can be appropriately set according to the film thicknesses of the insulator 280, the insulator 274, and the insulator 281. Therefore, a semiconductor device with a high degree of design freedom can be provided. This is possible.

[0368] Also, it is preferable to use an insulator 130 with a high dielectric constant. For example, an insulator containing one or both of the oxides of aluminum and hafnium can be used. As the insulator containing one or both of the oxides of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. are preferably used. As the insulator containing one or both of the oxides of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. are preferably used. As the insulator containing one or both of the oxides of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. are preferably used. As the insulator containing one or both of the oxides of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. are preferably used.

[0369] Also, the insulator 130 may have a laminated structure. For example, two or more layers may be selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. to form a laminated structure. For example, by the ALD method, it is preferable to form hafnium oxide, aluminum oxide, and hafnium oxide in this order to form a laminated structure. The film thicknesses of hafnium oxide and aluminum oxide are each 0.5 nm or more and 5 nm or less. By adopting such a laminated structure, a capacitor element 100a with a large capacitance value and a small leakage current can be obtained. Also, the insulator 130 may have a laminated structure. For example, two or more layers may be selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. to form a laminated structure. For example, by the ALD method, it is preferable to form hafnium oxide, aluminum oxide, and hafnium oxide in this order to form a laminated structure. The film thicknesses of hafnium oxide and aluminum oxide are each 0.5 nm or more and 5 nm or less. By adopting such a laminated structure, a capacitor element 100a with a large capacitance value and a small leakage current can be obtained. Also, the insulator 130 may have a laminated structure. For example, two or more layers may be selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. to form a laminated structure. For example, by the ALD method, it is preferable to form hafnium oxide, aluminum oxide, and hafnium oxide in this order to form a laminated structure. The film thicknesses of hafnium oxide and aluminum oxide are each 0.5 nm or more and 5 nm or less. By adopting such a laminated structure, a capacitor element 100a with a large capacitance value and a small leakage current can be obtained. Also, the insulator 130 may have a laminated structure. For example, two or more layers may be selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. to form a laminated structure. For example, by the ALD method, it is preferable to form hafnium oxide, aluminum oxide, and hafnium oxide in this order to form a laminated structure. The film thicknesses of hafnium oxide and aluminum oxide are each 0.5 nm or more and 5 nm or less. By adopting such a laminated structure, a capacitor element 100a with a large capacitance value and a small leakage current can be obtained. Also, the insulator 130 may have a laminated structure. For example, two or more layers may be selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. to form a laminated structure. For example, by the ALD method, it is preferable to form hafnium oxide, aluminum oxide, and hafnium oxide in this order to form a laminated structure. The film thicknesses of hafnium oxide and aluminum oxide are each 0.5 nm or more and 5 nm or less. By adopting such a laminated structure, a capacitor element 100a with a large capacitance value and a small leakage current can be obtained. Also, the insulator 130 may have a laminated structure. For example, two or more layers may be selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. to form a laminated structure. For example, by the ALD method, it is preferable to form hafnium oxide, aluminum oxide, and hafnium oxide in this order to form a laminated structure. The film thicknesses of hafnium oxide and aluminum oxide are each 0.5 nm or more and 5 nm or less. By adopting such a laminated structure, a capacitor element 100a with a large capacitance value and a small leakage current can be obtained. Also, the insulator 130 may have a laminated structure. For example, two or more layers may be selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. to form a laminated structure. For example, by the ALD method, it is preferable to form hafnium oxide, aluminum oxide, and hafnium oxide in this order to form a laminated structure. The film thicknesses of hafnium oxide and aluminum oxide are each 0.5 nm or more and 5 nm or less. By adopting such a laminated structure, a capacitor element 100a with a large capacitance value and a small leakage current can be obtained. Also, the insulator 130 may have a laminated structure. For example, two or more layers may be selected from silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. to form a laminated structure. For example, by the ALD method, it is preferable to form hafnium oxide, aluminum oxide, and hafnium oxide in this order to form a laminated structure. The film thicknesses of hafnium oxide and aluminum oxide are each 0.5 nm or more and 5 nm or less. By adopting such a laminated structure, a capacitor element 100a with a large capacitance value and a small leakage current can be obtained.

[0370] Note that the conductor 110 or the conductor 120 may have a laminated structure. For example, the conductor 110 or the conductor 120 may have a laminated structure of a conductive material mainly composed of titanium, titanium nitride, tantalum, or tantalum nitride and a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 110 or the conductor 120 may have a single-layer structure or a laminated structure of three or more layers. Note that the conductor 110 or the conductor 120 may have a laminated structure. For example, the conductor 110 or the conductor 120 may have a laminated structure of a conductive material mainly composed of titanium, titanium nitride, tantalum, or tantalum nitride and a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 110 or the conductor 120 may have a single-layer structure or a laminated structure of three or more layers. Note that the conductor 110 or the conductor 120 may have a laminated structure. For example, the conductor 110 or the conductor 120 may have a laminated structure of a conductive material mainly composed of titanium, titanium nitride, tantalum, or tantalum nitride and a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 110 or the conductor 120 may have a single-layer structure or a laminated structure of three or more layers. Note that the conductor 110 or the conductor 120 may have a laminated structure. For example, the conductor 110 or the conductor 120 may have a laminated structure of a conductive material mainly composed of titanium, titanium nitride, tantalum, or tantalum nitride and a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 110 or the conductor 120 may have a single-layer structure or a laminated structure of three or more layers. Note that the conductor 110 or the conductor 120 may have a laminated structure. For example, the conductor 110 or the conductor 120 may have a laminated structure of a conductive material mainly composed of titanium, titanium nitride, tantalum, or tantalum nitride and a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 110 or the conductor 120 may have a single-layer structure or a laminated structure of three or more layers.

[0371] Also, in the opening for forming the capacitive element 100a, it is preferable to form the insulator 140 inside the conductor 120. Here, as the insulator 140, an insulator that can be used for the insulator 281 may be used. Also, it is preferable that the upper surface of the insulator 140 is substantially flush with the upper surface of the conductor 120. However, it is not limited to this. For example, the opening may be filled by increasing the film thickness of the conductor 120, or the insulator 150 may be formed in a state where an opening is formed inside the conductor 120 to fill the opening. The insulator 140 may be formed using an insulator that can be used for the insulator 281. Also, it is preferable that the upper surface of the insulator 140 is substantially flush with the upper surface of the conductor 120. However, it is not limited to this. For example, the opening may be filled by increasing the film thickness of the conductor 120, or the insulator 150 may be formed in a state where an opening is formed inside the conductor 120 to fill the opening. The insulator 140 may be formed using an insulator that can be used for the insulator 281. Also, it is preferable that the upper surface of the insulator 140 is substantially flush with the upper surface of the conductor 120. However, it is not limited to this. For example, the opening may be filled by increasing the film thickness of the conductor 120, or the insulator 150 may be formed in a state where an opening is formed inside the conductor 120 to fill the opening. The insulator 140 may be formed using an insulator that can be used for the insulator 281. Also, it is preferable that the upper surface of the insulator 140 is substantially flush with the upper surface of the conductor 120. However, it is not limited to this. For example, the opening may be filled by increasing the film thickness of the conductor 120, or the insulator 150 may be formed in a state where an opening is formed inside the conductor 120 to fill the opening. The insulator 140 may be formed using an insulator that can be used for the insulator 281. Also, it is preferable that the upper surface of the insulator 140 is substantially flush with the upper surface of the conductor 120. However, it is not limited to this. For example, the opening may be filled by increasing the film thickness of the conductor 120, or the insulator 150 may be formed in a state where an opening is formed inside the conductor 120 to fill the opening. The insulator 140 may be formed using an insulator that can be used for the insulator 281. Also, it is preferable that the upper surface of the insulator 140 is substantially flush with the upper surface of the conductor 120. However, it is not limited to this. For example, the opening may be filled by increasing the film thickness of the conductor 120, or the insulator 150 may be formed in a state where an opening is formed inside the conductor 120 to fill the opening.

[0372] [Structure of Cell Array] Next, an example of a cell array in which the above cells are arranged in a matrix or matrix form will be described with reference to FIGS. 19 to 21. The description will be made with reference to FIGS. 19 to 21.

[0373] FIG. 19 is a circuit diagram showing one form in which the cells shown in FIG. 18 are arranged in a matrix form. FIG. 20 is a schematic diagram showing a cross-sectional structure in the vicinity of the cell 600 shown in the circuit diagram of FIG. 19 and the cell 601 adjacent to the cell 600. FIG. 21 is a schematic diagram showing the layout of the wiring WL, the wiring BL, and the oxide 230 in the circuit diagram shown in FIG. 19. In FIGS. 19 to 21, the extending direction of the wiring BL is defined as the x direction, the extending direction of the wiring WL is defined as the y direction, and the direction perpendicular to the xy plane is defined as the z direction. Note that FIGS. 19 and 21 show an example in which three cells are arranged in a 3×3 manner, but the present embodiment is not limited to this, and the number and arrangement of memory cells or wirings included in the cell array may be set as appropriate. Also, in the top view of FIG. 21, for clarity of the drawing, some elements shown in FIG. 19 are omitted. FIG. 20 is a schematic diagram showing a cross-sectional structure in the vicinity of the cell 600 shown in the circuit diagram of FIG. 19 and the cell 601 adjacent to the cell 600. FIG. 21 is a schematic diagram showing the layout of the wiring WL, the wiring BL, and the oxide 230 in the circuit diagram shown in FIG. 19. In FIGS. 19 to 21, the extending direction of the wiring BL is defined as the x direction, the extending direction of the wiring WL is defined as the y direction, and the direction perpendicular to the xy plane is defined as the z direction. Note that FIGS. 19 and 21 show an example in which three cells are arranged in a 3×3 manner, but the present embodiment is not limited to this, and the number and arrangement of memory cells or wirings included in the cell array may be set as appropriate. Also, in the top view of FIG. 21, for clarity of the drawing, some elements shown in FIG. 19 are omitted. FIG. 20 is a schematic diagram showing a cross-sectional structure in the vicinity of the cell 600 shown in the circuit diagram of FIG. 19 and the cell 601 adjacent to the cell 600. FIG. 21 is a schematic diagram showing the layout of the wiring WL, the wiring BL, and the oxide 230 in the circuit diagram shown in FIG. 19. In FIGS. 19 to 21, the extending direction of the wiring BL is defined as the x direction, the extending direction of the wiring WL is defined as the y direction, and the direction perpendicular to the xy plane is defined as the z direction. Note that FIGS. 19 and 21 show an example in which three cells are arranged in a 3×3 manner, but the present embodiment is not limited to this, and the number and arrangement of memory cells or wirings included in the cell array may be set as appropriate. Also, in the top view of FIG. 21, for clarity of the drawing, some elements shown in FIG. 19 are omitted. In FIGS. 19 to 21, the extending direction of the wiring BL is defined as the x direction, the extending direction of the wiring WL is defined as the y direction, and the direction perpendicular to the xy plane is defined as the z direction. Note that FIGS. 19 and 21 show an example in which three cells are arranged in a 3×3 manner, but the present embodiment is not limited to this, and the number and arrangement of memory cells or wirings included in the cell array may be set as appropriate. Also, in the top view of FIG. 21, for clarity of the drawing, some elements shown in FIG. 19 are omitted. In FIGS. 19 to 21, the extending direction of the wiring BL is defined as the x direction, the extending direction of the wiring WL is defined as the y direction, and the direction perpendicular to the xy plane is defined as the z direction. Note that FIGS. 19 and 21 show an example in which three cells are arranged in a 3×3 manner, but the present embodiment is not limited to this, and the number and arrangement of memory cells or wirings included in the cell array may be set as appropriate. Also, in the top view of FIG. 21, for clarity of the drawing, some elements shown in FIG. 19 are omitted. In FIGS. 19 to 21, the extending direction of the wiring BL is defined as the x direction, the extending direction of the wiring WL is defined as the y direction, and the direction perpendicular to the xy plane is defined as the z direction. Note that FIGS. 19 and 21 show an example in which three cells are arranged in a 3×3 manner, but the present embodiment is not limited to this, and the number and arrangement of memory cells or wirings included in the cell array may be set as appropriate. Also, in the top view of FIG. 21, for clarity of the drawing, some elements shown in FIG. 19 are omitted. In FIGS. 19 to 21, the extending direction of the wiring BL is defined as the x direction, the extending direction of the wiring WL is defined as the y direction, and the direction perpendicular to the xy plane is defined as the z direction. Note that FIGS. 19 and 21 show an example in which three cells are arranged in a 3×3 manner, but the present embodiment is not limited to this, and the number and arrangement of memory cells or wirings included in the cell array may be set as appropriate. Also, in the top view of FIG. 21, for clarity of the drawing, some elements shown in FIG. 19 are omitted. In FIGS. 19 to 21, the extending direction of the wiring BL is defined as the x direction, the extending direction of the wiring WL is defined as the y direction, and the direction perpendicular to the xy plane is defined as the z direction. Note that FIGS. 19 and 21 show an example in which three cells are arranged in a 3×3 manner, but the present embodiment is not limited to this, and the number and arrangement of memory cells or wirings included in the cell array may be set as appropriate. Also, in the top view of FIG. 21, for clarity of the drawing, some elements shown in FIG. 19 are omitted.

[0374] As shown in FIG. 19, the transistors 200a and 200b constituting the cell One of the source and the drain is electrically connected to a common wiring BL (BL01, BL02, BL03). Also, the wiring BL is electrically connected to one of the sources and drains of the transistors 200a and 200b included in the cells 600 arranged in the x direction. On the other hand, the first gate of the transistor 200a and the first gate of the transistor 200b that constitute the cell 600 are each electrically connected to different wirings WL (WL01 to WL06). Also, these wirings WL are electrically connected to the first gate of the transistor 200a and the first gate of the transistor 200b included in the cells 600 arranged in the y direction, respectively.

[0375] One electrode of the capacitor element 100a and one electrode of the capacitor element 100b included in the cell 600 are electrically connected to the wiring PL. For example, the wiring PL may be formed to extend in the y direction.

[0376] Also, a second gate BG may be provided for the transistors 200a and 200b included in each cell 600. The threshold value of the transistor can be controlled by the potential applied to the BG. The BG is connected to the transistor 400, and the potential applied to the BG can be controlled by the transistor 400.

[0377] For example, as shown in FIG. 20, the conductor 160 can be extended in the x direction to function as the wiring BL, the conductor 260 can be extended in the y direction to function as the wiring WL, and the conductor 120 can be extended in the y direction to function as the wiring PL. Also, the conductor 203 can be extended in the y direction to function as a wiring connected to the BG. ​​​​​​​​​​​​

[0378] Also, as shown in FIG. 20, as one electrode of the capacitive element 100b included in the cell 600 the conductor 120 that functions also serves as one electrode of the capacitive element 100a included in the cell 601. Preferably, it is configured in this way. Also, although not shown, the conductor 120 that functions as one electrode of the capacitive element 100a included in the cell 600 also serves as one electrode of the capacitive element of the cell adjacent to the left side of the cell 600. The same configuration applies to the cell on the right side of the cell 601. Therefore, a cell array can be configured. By configuring the cell array in this way, the interval between adjacent cells can be reduced, so that the projected area of the cell array can be reduced and high integration becomes possible.

[0379] Also, as shown in FIG. 21, by arranging the oxide 230 and the wiring WL in a matrix, the semiconductor device of the circuit diagram shown in FIG. 19 can be formed. Here, it is preferable that the wiring BL is provided in a layer different from the wiring WL and the oxide 230. In particular, by providing the capacitive element 100a and the capacitive element 100b in a lower layer than the wiring BL, a layout in which the long side direction of the oxide 230 and the wiring BL are substantially parallel can be realized. Therefore, the layout of the cell can be simplified, the degree of freedom in design is improved, and the process cost can be reduced.

[0380] Also, in FIG. 21, the oxide 230 and the wiring WL are provided such that the long side of the oxide 230 is substantially orthogonal to the extending direction of the wiring WL, but it is not limited to this. For example, the long side of the oxide 230 is not orthogonal to the extending direction of the wiring WL, and the long side of the oxide 230 is in the extending direction of the wiring WL not orthogonal, and the long side of the oxide 230 is in the extending direction of the wiring WL It may be arranged in a layout inclined with respect to the direction. Preferably, the long side of the oxide 230 forms an angle with the wiring WL of 20° or more and 70° or less, preferably 30° or more and 60° or less In this way, the oxide 230 and the wiring WL may be provided.

[0381] Further, the cell array may be configured not only in a plane but also in a stacked structure. A plurality of cell arrays By stacking them, cells can be integrated and arranged without increasing the occupied area of the cell array That is, a 3D cell array can be configured.

[0382] As described above, according to one aspect of the present invention, a semiconductor device capable of miniaturization or high integration can be provided Or, according to one aspect of the present invention, a semiconductor device having good electrical characteristics can be provided Or, according to one aspect of the present invention, a semiconductor device with a small off-current can be provided Or, according to one aspect of the present invention, a semiconductor device with a large on-current can be provided Or, according to one aspect of the present invention, a highly reliable semiconductor device can be provided Or, according to one aspect of the present invention, a semiconductor device with reduced power consumption can be provided Or, according to one aspect of the present invention, a highly productive semiconductor device can be provided can be provided.

[0383] As described above, the configurations, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments can be used.

[0384] (Embodiment 3) In this embodiment, a form of a semiconductor device that functions as a memory device, which is different from the above embodiment, will be described with reference to FIGS. 22 and 23

[0385] ​ <Memory device 2> The memory device shown in FIG. 22 includes a transistor 300, a transistor 200, and a capacitor element 100. FIG. 22 is a cross-sectional view of the memory device in the channel length direction of the transistors 200 and 300. FIG. 23 shows a cross-sectional view of the transistor 300 in the channel width direction near the transistor 300. The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the transistor 200 has a small off-current, using it in the memory device makes it possible to retain the stored content for a long time. That is, it does not require a refresh operation or requires a very low frequency of refresh operation, so the power consumption of the memory device can be sufficiently reduced. In the memory device shown in FIG. 22, the wiring 1001 is electrically connected to the source of the transistor 300, and the wiring 1002 is electrically connected to the drain of the transistor 300. Also, the wiring 1003 is electrically connected to one of the source and drain of the transistor 200, the wiring 1004 is electrically connected to the top gate of the transistor 200, and the wiring 1006 is electrically connected to the bottom gate of the transistor 200. Then, the gate of the transistor 300 and the other of the source and drain of the transistor 200 are electrically connected to one of the electrodes of the capacitor element 100, and the wiring 1005 is electrically connected to the other of the electrodes of the capacitor element 100. The memory device shown in FIG. 22 has the characteristic that the potential of the gate of the transistor 300 can be held.

[0386] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the transistor 200 has a small off-current, using it in the memory device makes it possible to retain the stored content for a long time. That is, it does not require a refresh operation or requires a very low frequency of refresh operation, so the power consumption of the memory device can be sufficiently reduced. The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the transistor 200 has a small off-current, using it in the memory device makes it possible to retain the stored content for a long time. That is, it does not require a refresh operation or requires a very low frequency of refresh operation, so the power consumption of the memory device can be sufficiently reduced. In the memory device shown in FIG. 22, the wiring 1001 is electrically connected to the source of the transistor 300, and the wiring 1002 is electrically connected to the drain of the transistor 300. Also, the wiring 1003 is electrically connected to one of the source and drain of the transistor 200, th...

Claims

1. a first insulator having an opening; a first conductor having a region disposed within the opening and functioning as a gate electrode; a second insulator having an area disposed within the opening and contacting a bottom surface and a side surface of the first conductor; an oxide semiconductor having a region overlapping with the first conductor; a second conductor having a region in contact with the oxide semiconductor, the oxide semiconductor includes indium oxide; the oxide semiconductor has a region facing a bottom surface of the first conductor via a first region of the second insulator; the second conductor has a region corresponding to a side surface of the first conductor via a second region of the second insulator; the first insulator has a region facing a side surface of the first conductor via a third region of the second insulator; A semiconductor device, wherein the second region and the third region are thicker than the first region.

2. In claim 1, A third conductor is provided. the third conductor has a region facing a bottom surface of the first conductor via the first region.

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