Method for manufacturing a thin film transistor

Abstract

To provide a manufacturing method for a thin-film transistor capable of forming an insulating layer with good fixing charge density in a low-temperature process.SOLUTION: A manufacturing method for a thin-film transistor 1 includes a plasma treatment step in which a plasma treatment is performed on the surface of a semiconductor layer 5 using a mixture of gases including nitrogen and oxygen as process gases, and an insulating layer formation step in which an insulating layer (protective layer 8) is formed on the semiconductor layer after the plasma treatment by a plasma CVD method using a mixed gas including SiF4, nitrogen, oxygen, and hydrogen as a process gas.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a thin film transistor.

Background Art

[0002] In recent years, development of thin film transistors using an In-Ga-Zn-O-based (IGZO) oxide semiconductor as a semiconductor layer (channel layer) has been actively carried out. In this thin film transistor, various insulating layers such as a protective layer and a gate insulating layer made of a silicon film (SiN x ) or a silicon oxide film (SiO x ) are formed around the semiconductor layer. For example, Patent Document 1 describes forming an insulating layer made of a fluorine-containing silicon film on a semiconductor layer by a plasma CVD method using a mixed gas containing SiCl4 gas, SiF4 gas, and oxygen gas as a process gas.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the manufacturing method disclosed in Patent Document 1, since the insulating layer is formed by a low-temperature process of about 300°C, the positive fixed charge density in the insulating layer increases, so that the threshold voltage of the thin film transistor shifts in the negative direction and the reliability may decrease.

[0005] The present invention has been made in view of such problems, and the main object thereof is to provide a method for manufacturing a thin film transistor capable of forming an insulating layer having a good fixed charge density even in a low-temperature process.

Means for Solving the Problems

[0006] That is, the method for manufacturing a thin film transistor of the present invention includes a plasma treatment step of performing plasma treatment on the surface of a semiconductor layer using a mixed gas containing nitrogen and oxygen as a process gas, and a plasma CVD method using a mixed gas containing SiF4, nitrogen, oxygen, and hydrogen as a process gas to form an insulating layer on the semiconductor layer after the plasma treatment. It is characterized by comprising an insulating layer forming step. With such a manufacturing method, since the insulating layer is formed after the surface of the semiconductor layer is plasma-treated and activated, an insulating layer with a good fixed charge density can be formed even in a low-temperature process of, for example, 300°C or lower. Thereby, a thin film transistor with a high gate threshold voltage and excellent reliability can be manufactured.

[0007] As a specific embodiment of the insulating layer, a fluorine-containing silicon oxynitride film can be mentioned.

[0008] The insulating layer formed in the insulating layer forming step has a fixed charge density of 3×10 11 cm -2 or less, which is preferable.

[0009] If the flow rate of the oxygen gas supplied in the plasma treatment step is too high, the surface of the semiconductor layer may be overly oxidized, and it may be impossible to obtain an insulating layer with a good fixed charge density. Therefore, the ratio of the flow rate of the nitrogen gas to the total flow rate of the nitrogen gas and the oxygen gas supplied in the plasma treatment step is preferably 70% or more, more preferably 80% or more, and even more preferably 90% or more.

[0010] Also, it is preferable that the ratio of the flow rate of the nitrogen gas to the total flow rate of the nitrogen gas and the oxygen gas supplied in the plasma treatment step is the same as the ratio of the flow rate of the nitrogen gas to the total flow rate of the nitrogen gas and the oxygen gas supplied in the insulating layer forming step. By doing so, since the flow rate ratios of nitrogen gas and oxygen gas in the plasma treatment step and the insulating layer formation step are the same, it is possible to shift to the insulating layer formation step while stably maintaining the plasma generated in the plasma treatment step. As a result, the tact time can be shortened and the manufacturing cost can be reduced. In addition, since it is possible to shift to the insulating layer formation step while stably maintaining the plasma, physical adsorption of process gases such as SiF4 gas to the interface between the semiconductor layer and the insulating layer can be suppressed, and a high-quality interface with higher adhesion can be obtained.

[0011] As an aspect in which the effects of the present invention are more remarkable, examples include those in which the plasma treatment step and the insulating layer formation step are performed at 300°C or lower. At such a low temperature, a thin film transistor using a substrate with a low melting point such as resin can be manufactured. According to the manufacturing method of the present invention, a thin film transistor having an insulating layer with a good fixed charge density can be manufactured even in such a low temperature treatment.

[0012] As a specific aspect of the semiconductor layer, an example is one composed of In-Ga-Zn-O.

Effects of the Invention

[0013] According to the present invention configured as described above, it is possible to provide a method for manufacturing a thin film transistor capable of forming an insulating layer with a good fixed charge density even in a low temperature process.

Brief Description of the Drawings

[0014]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Mode for Carrying Out the Invention

[0015] Hereinafter, a thin film transistor according to an embodiment of the present invention and a method for manufacturing the same will be described.

[0016] <1. Thin Film Transistor> The thin film transistor 1 of this embodiment is a so-called bottom gate type TFT, and uses an oxide semiconductor for the channel. Specifically, as shown in FIG. 1, it has a substrate 2, a gate electrode 3, a gate insulating layer 4, a semiconductor layer 5, a source electrode 6 and a drain electrode 7, and a protective layer 8, and is formed in this order from the substrate 2 side. In this embodiment, the protective layer 8 corresponds to the "insulating layer" referred to in the claims. Hereinafter, each part will be described in detail.

[0017] The substrate 2 is made of an arbitrary material that can transmit light, and may be made of, for example, a resin material such as plastic (synthetic resin) such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), acrylic, polyimide, or a glass material.

[0018] The gate electrode 3 controls the carrier density in the semiconductor layer 5 by the gate voltage applied to the thin film transistor 1. This gate electrode 3 is made of an arbitrary material having high conductivity, and may be made of, for example, one or more metals selected from Si, Al, Mo, Cr, Ta, Ti, Pt, Au, Ag, etc. Further, it may be made of a conductive film of a metal oxide such as Al-Nd, Ag alloy, tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), In-Ga-Zn-O (IGZO). The gate electrode 3 may have a single layer structure or a laminated structure of two or more layers of these conductive films.

[0019] The gate insulating layer 4 is composed of any insulating material having high insulation properties, for example, SiO x , SiN x , SiON, Al2O3, Y2O3, Ta2O5, Hf2, etc., and may be an insulating film containing one or more oxides selected therefrom. The gate insulating layer 4 may have a single-layer structure or a laminated structure of two or more layers of these conductive films.

[0020] The semiconductor layer (channel layer) 5 allows the current flowing between the source electrode 6 and the drain electrode 7 to pass through. The semiconductor layer 5 of the present embodiment is made of an oxide semiconductor and contains, for example, at least one oxide of an element selected from In, Ga, Zn, Sn, Al, Ti, etc. as a main component. Specific examples of the material constituting the semiconductor layer 5 include, for example, In-Ga-Zn-O (IGZO), In-Al-Mg-O, In-Al-Zn-O, or In-Hf-Zn-O. This semiconductor layer 5 is composed of an amorphous oxide semiconductor film. Although the semiconductor layer 5 of the present embodiment has a single-layer structure, it is not limited thereto, and a laminated structure in which a plurality of layers having different compositions and crystallinities are stacked may be used.

[0021] The source electrode 6 and the drain electrode 7 are formed separately from each other so as to partially cover the surface of the semiconductor layer 5. The source electrode 6 and the drain electrode 7 are made of a material having high conductivity so as to function as electrodes, similarly to the gate electrode 3. The source electrode 6 and the drain electrode 7 may have a single-layer structure made of a single material, or a laminated structure in which a plurality of layers made of different materials are stacked.

[0022] The protective layer (passivation layer) 8 covers and protects the surface (channel region) of the semiconductor layer 5 exposed between the source electrode 6 and the drain electrode 7, and is made of an insulating material. The protective layer 8 is provided in contact with at least the surface of the semiconductor layer 5. The protective layer 8 of the present embodiment is provided so as to further cover the surfaces of the source electrode 6 and the drain electrode 7.

[0023] Specifically, this protective layer 8 is composed of a fluorine-containing silicon oxynitride film (SiON:F). The fixed charge density of this fluorine-containing silicon oxynitride film is 3×10 11 cm -2 or less, preferably 1×10 11 cm -2 or less.

[0024] On the protective layer 8, a second protective layer made of, for example, a fluorine-containing silicon oxide film (SiN:F), a fluorine-containing silicon oxide film (SiO:F), a silicon nitride film (SiNx), a silicon oxide film (SiOx), etc. may be further provided as needed.

[0025] <2. Manufacturing method of thin film transistor> Next, the manufacturing method of the thin film transistor 1 having the above-described structure will be described with reference to FIG. 2. The manufacturing method of the thin film transistor 1 of the present embodiment includes a gate electrode formation step, a gate insulating layer formation step, a semiconductor layer formation step, a source / drain electrode formation step, a plasma treatment step, and a protective layer formation step. In this embodiment, the protective layer formation step corresponds to the "insulating layer formation step" in the claims. Hereinafter, each step will be described.

[0026] (1) Gate electrode formation step First, as shown in FIG. 2(a), a substrate 2 made of a resin material such as PET is prepared, and a gate electrode 3 is formed on the surface of the substrate 2. The formation method of the gate electrode 3 is not particularly limited, and it may be formed by a known method such as a vacuum evaporation method.

[0027] (2) Gate insulating layer formation step Next, as shown in FIG. 2(b), a gate insulating layer 4 is formed so as to cover the surfaces of the substrate 2 and the gate electrode 3. The formation method of the gate insulating layer 4 is not particularly limited, and it may be formed by a known method.

[0028] (3) Semiconductor layer formation step Next, as shown in FIG. 2(c), a semiconductor layer 5 is formed on the gate insulating layer 4. This semiconductor layer 5 may be formed by a known method. For example, the semiconductor layer 5 may be formed by sputtering a conductive oxide sintered body such as InGaZnO as a target using inductively coupled plasma. Note that the present invention is not limited to this, and the semiconductor layer 5 made of an oxide semiconductor may be formed by other methods.

[0029] (4) Source and drain electrode formation step Next, as shown in FIG. 2(d), a source electrode 6 and a drain electrode 7 are formed on the semiconductor layer 5. The source electrode 6 and the drain electrode 7 can be formed by a known method using, for example, RF magnetron sputtering or the like. The source electrode 6 and the drain electrode 7 are formed so as to be spaced apart from each other on the surface of the semiconductor layer 5 and expose a part of the surface of the semiconductor layer 5.

[0030] (5) Plasma treatment step Next, before forming the protective layer 8 on the surface of the semiconductor layer 5, plasma treatment (pretreatment before film formation) is performed on the surface of the semiconductor layer 5. Specifically, this plasma treatment is performed using an inductively coupled plasma treatment apparatus 100 as illustrated in FIG. 3. Specifically, the plasma treatment apparatus 100 includes a vacuum container 20 having a processing chamber 10 formed inside thereof that is evacuated and into which a process gas G is introduced, an antenna 30 provided outside the processing chamber 10, and a high-frequency power source 40 that applies a high frequency (13.56 MHz) to the antenna 30. When a high frequency is applied from the high-frequency power source 40 to the antenna 30, a high-frequency magnetic field generated from the antenna 30 is formed in the processing chamber 10 to generate an induced electric field, whereby an inductively coupled plasma P is generated.

[0031] Specifically, in this step, a mixed gas containing at least nitrogen gas and oxygen gas is supplied into the processing chamber 10 as a process gas, and in this state, a high frequency is applied to the antenna 30 to generate an inductively coupled plasma. Here, the process gas to be supplied preferably has a ratio (N2 / N2+O2) of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas of 70% or more, more preferably 80% or more, and even more preferably 90% or more. The larger the flow rate ratio of nitrogen gas, the more preferable it is because the fixed charge density in the protective layer 8 to be formed later can be reduced. Also, this step is preferably performed at a low temperature with the substrate temperature being 150°C or higher and 300°C or lower. The processing time for performing the plasma treatment is not particularly limited, but from the viewpoint of further reducing the fixed charge density in the protective layer 8, it is preferably 15 seconds or more and 45 seconds or less. In addition, the RF power, the pressure during film formation, the absolute amount of the process gas, etc. may be appropriately set.

[0032] (6) Protective layer formation step After the plasma treatment step, as shown in FIG. 2(e), a protective layer 8 is formed so as to cover the surface of the semiconductor layer 5 exposed between the source electrode 6 and the drain electrode 7. The formation of this protective layer 8 is performed, for example, by using the plasma CVD method (chemical vapor deposition method) using the above-described plasma CVD apparatus 100. Here, the process proceeds to the protective layer formation step while maintaining the plasma generated in the processing chamber 10 of the plasma CVD apparatus 100 in the plasma treatment step.

[0033] Specifically, in this protective layer formation step, a mixed gas containing SiF4 (silicon tetrafluoride) gas, nitrogen gas, oxygen gas, and hydrogen gas is supplied into the processing chamber 10 as a process gas, and in this state, a high frequency is applied to the antenna 30 to generate an inductively coupled plasma. In the process gas to be supplied, the ratio (N2 / N2+O2) of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas is not particularly limited, but for example, it is preferably substantially the same as the flow rate ratio in the above-described plasma treatment step. Also, this step is preferably performed at a low temperature with the substrate temperature being 150°C or higher and 300°C or lower. In addition, the RF power, the pressure during film formation, the absolute amount of the process gas, etc. may be appropriately set.

[0034] Optionally, a second protective layer made of, for example, a fluorine-containing silicon oxide film (SiN:F), a fluorine-containing silicon oxide film (SiO:F), a silicon nitride film (SiNx), a silicon oxide film (SiOx), etc. may be formed on the protective layer 8. The formation of this protective layer can be carried out using a plasma CVD apparatus in the same manner as the protective layer 8.

[0035] (7) Heat treatment step Optionally, heat treatment may be performed in an atmosphere under atmospheric pressure containing oxygen. The temperature inside the furnace during the heat treatment is not particularly limited, for example, it is 150°C or higher and 300°C or lower. Also, the heat treatment time is not particularly limited, for example, it is 1 hour or longer and 3 hours or shorter.

[0036] As described above, the thin film transistor 1 of the present embodiment can be obtained.

[0037] <3. Effects of the present embodiment> In the manufacturing method of the thin film transistor 1 of the present embodiment configured as described above, after forming the semiconductor layer, the surface of the semiconductor layer 5 is plasma-treated and activated in the plasma treatment step, and the protective layer 8 is formed in that state. Therefore, even in a low-temperature process of 300°C or lower, a protective layer 8 with a good fixed charge density can be formed. As a result, a thin film transistor 1 with a high gate threshold voltage and excellent reliability can be manufactured.

[0038] Also, since the ratio of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas supplied in the plasma treatment step is the same as the ratio of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas supplied in the protective layer formation step, it is possible to shift to the protective layer formation step while stably maintaining the plasma generated in the plasma treatment step. As a result, the tact time can be shortened and the manufacturing cost can be reduced. Also, since it is possible to shift to the protective layer formation step while stably maintaining the plasma, physical adsorption of process gases such as SiF4 gas to the interface between the semiconductor layer 5 and the protective layer 8 can be suppressed, and a high-quality interface with higher adhesion can be obtained.

[0039] <4. Other Modified Embodiments> Note that the present invention is not limited to the above embodiments.

[0040] The thin film transistor 1 in the above embodiment was of a bottom gate type in which the gate electrode 3, the gate insulating layer 4, and the semiconductor layer 5 were laminated in this order from the substrate 2 side, but it is not limited to this. In other embodiments, as shown in FIG. 4, the thin film transistor 1 may be of a top gate type in which the semiconductor layer 5, the gate insulating layer 4, and the gate electrode 3 are laminated in this order from the substrate 2 side. In this case, the gate insulating layer 4 laminated on the semiconductor layer 5 corresponds to the "insulating layer" in the claims. In this case, the gate insulating layer 4 is preferably composed of a fluorine-containing silicon oxynitride film (SiON:F), a fluorine-containing silicon nitride film (SiN:F), a fluorine-containing silicon oxide film (SiO:F), a silicon nitride film (SiNx), a silicon oxide film (SiOx), etc., and its fixed charge density is 3×10 11 cm -2 It is preferably the following.

[0041] Also, when the thin film transistor 1 is of the top gate type, its manufacturing method is performed by performing the above-described semiconductor layer formation step, source / drain electrode formation step, plasma treatment step, gate insulating layer formation step, and gate electrode formation step in this order. In this case, the gate insulating layer formation step corresponds to the "insulating layer formation step" in the claims. Therefore, in this embodiment, the gate insulating layer formation step is performed by the plasma CVD method using a mixed gas of SiF4 (silicon tetrafluoride) gas, nitrogen gas, oxygen gas, and hydrogen gas as a process gas. The specific method is the same as the above-described protective layer formation step.

[0042] In the above embodiment, the semiconductor layer 5 was made of an oxide semiconductor, but it is not limited to this. In other embodiments, the semiconductor layer 5 may be composed of any semiconductor material such as amorphous Si or polycrystalline Si.

[0043] In the above embodiment, the protective layer 8 was a fluorine-containing silicon oxynitride film, but it is not limited thereto. In other embodiments, the protective layer 8 may be a film made of an insulating material such as a fluorine-containing silicon oxide film (SiN:F), a fluorine-containing silicon oxide film (SiO:F), a silicon nitride film (SiNx), or a silicon oxide film (SiOx).

[0044] Also, in the above embodiment, the plasma treatment step was performed after the semiconductor layer formation step and the source / drain electrode formation step, but it is not limited thereto. In other embodiments, the plasma treatment step may be performed after the semiconductor layer formation step and before the source / drain electrode formation step.

[0045] Needless to say, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit thereof.

Example

[0046] Hereinafter, the present invention will be described more specifically with reference to examples. The present invention is not limited by the following examples, and it is of course possible to make appropriate modifications within the range that conforms to the spirit of the above and below, and all of them are included in the technical scope of the present invention.

[0047] <Relationship between Plasma Treatment of Semiconductor Layer and Fixed Charge Density> The relationship between the plasma treatment of the surface of the semiconductor layer before forming the insulating layer and the fixed charge density of the formed insulating layer was evaluated.

[0048] (Sample Preparation) Specifically, in this example, after the surface of an n-type Si substrate was plasma-treated using the above-described plasma CVD apparatus, a fluorine-containing silicon oxynitride film was formed on the surface of the silicon substrate by plasma CVD, and then heat treatment was performed at 250°C for 60 minutes in an air atmosphere to produce a plurality of samples having an MIS structure.

[0049] For all samples, the plasma treatment on the silicon substrate was carried out using a plasma treatment apparatus with a G4 substrate size (680×880 mm), supplying a mixed gas containing nitrogen and oxygen as the process gas, with an RF power of 0.47 W / cm 2 , at a pressure during film formation of 6 Pa and a set temperature of 200 °C. Here, for each sample to be fabricated, the plasma treatment time (0 - 120 seconds) and the ratio of the nitrogen gas flow rate to the total flow rate of nitrogen gas and oxygen gas (0%, 96.7%) were changed. Also, for all samples, the film formation treatment of the insulating layer after plasma treatment was carried out using a plasma CVD apparatus, using a mixed gas of SiF4, N2, O2, and H2 as the source gas, with an RF power of 0.71 W / cm 2 , at a pressure during film formation of 6 Pa, a set temperature of 200 °C, and a gas flow rate of SiF4 / N2 / O2 / H2 = 200 / 1160 / 40 / 360 sccm.

[0050] (Measurement of fixed charge density) Next, the fixed charge density of each fabricated sample was measured. Specifically, aluminum-containing electrodes were formed in contact with the fluorine-containing silicon oxynitride film and the Si substrate respectively, and the fixed charge density of each sample was calculated by obtaining the flat band shift amount from CV measurement. The results are shown in Figure 5. As can be seen from Figure 5, the samples plasma-treated using a mixed gas with a nitrogen gas flow rate ratio of 96.7% in the process gas showed good fixed charge densities of 3×10 11 cm -2 or less. Furthermore, the samples with a plasma treatment time of 15 seconds to 45 seconds showed good fixed charge densities of 1×10 11 cm -2 or less.

Explanation of symbols

[0051] 1 ··· Thin film transistor 2 ··· Substrate 3 ··· Gate electrode 4 ··· Gate insulating layer 5 ··· Semiconductor layer 6 ··· Source electrode 7 ··· Drain electrode 8 ··· Protective layer

Claims

1. A plasma treatment step of performing plasma treatment on the surface of a semiconductor layer using a mixed gas containing nitrogen and oxygen as a process gas; SiF ４ An insulating layer forming step of forming an insulating layer on the semiconductor layer after the plasma treatment by plasma CVD using a mixed gas containing SiF4, nitrogen, oxygen, and hydrogen as a process gas; and A method for manufacturing a thin film transistor in which the fixed charge density of the insulating layer is 3 × 10^11 cm^−2 or less.

2. The method for manufacturing a thin film transistor according to claim 1, wherein the insulating layer is a fluorine-containing silicon oxynitride film.

3. The method for manufacturing a thin film transistor according to claim 1 or 2, wherein the ratio of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas supplied in the plasma treatment step is 90% or more.

4. The method for manufacturing a thin film transistor according to any one of claims 1 to 3, wherein the ratio of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas supplied in the plasma treatment step is the same as the ratio of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas supplied in the insulating layer forming step.

5. The method for manufacturing a thin film transistor according to any one of claims 1 to 4, wherein the plasma treatment step and the insulating layer forming step are performed at 300°C or lower.

6. The method for manufacturing a thin film transistor according to any one of claims 1 to 5, wherein the semiconductor layer is composed of In-Ga-Zn-O.

7. A plasma treatment step of performing plasma treatment on the surface of a semiconductor layer using a mixed gas containing nitrogen and oxygen as a process gas; An insulating layer forming step of forming an insulating layer on the semiconductor layer after the plasma treatment by plasma CVD using a mixed gas containing SiF4, nitrogen, oxygen, and hydrogen as a process gas; and A method for manufacturing a thin film transistor in which the ratio of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas supplied in the plasma treatment step is 90% or more.

8. A plasma treatment step of performing plasma treatment on the surface of a semiconductor layer using a mixed gas containing nitrogen and oxygen as a process gas, An insulating layer forming step of forming an insulating layer on the semiconductor layer after the plasma treatment by plasma CVD using a mixed gas containing SiF4, nitrogen, oxygen, and hydrogen as a process gas, comprising: A method for manufacturing a thin film transistor in which the ratio of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas supplied in the plasma treatment step is the same as the ratio of the flow rate of nitrogen gas to the total flow rate of nitrogen gas and oxygen gas supplied in the insulating layer forming step.

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