Light-emitting device and measuring device

Abstract

To provide a light-emitting device which allows for reducing the voltage of a signal for allowing a light-emitting element to emit light compared with light-emitting devices not equipped with emission control thyristors.SOLUTION: A light-emitting device is provided, comprising light-emitting units comprising a light-emitting elements having a thyristor function, a light-emission electrode configured to receive a first voltage for allowing the light-emitting units to emit light, and emission control thyristors for allowing emission of light by the light-emitting elements by a second voltage that is lower than the first voltage and set independently of the first voltage.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The present invention relates to a light-emitting device and a measuring device.

Background Art

[0002] Patent Document 1 describes an array of a large number of light-emitting elements in which a threshold voltage or a threshold current can be controlled by light from the outside, arranged one-dimensionally, two-dimensionally, or three-dimensionally, and at least a part of the light generated from each light-emitting element is incident on other light-emitting elements in the vicinity of each light-emitting element, and a clock line for applying a voltage or a current from the outside is connected to each light-emitting element.

[0003] Patent Document 2 describes a self-scanning type light-emitting device in which a light-emitting element having a pnpnpn six-layer semiconductor structure is configured, electrodes are provided on the p-type first layer and the n-type sixth layer at both ends, and the p-type third layer and the n-type fourth layer in the center, and the pn layer is made to have a light-emitting diode function, and the pnpn four layers are made to have a thyristor function.

[0004] Patent Document 3 describes a self-scanning type light source head including a substrate, a surface-emitting semiconductor laser disposed in an array on the substrate, and a thyristor as a switch element that selectively turns on and off the light emission of the surface-emitting semiconductor laser disposed on the substrate.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0006] In a method of measuring the three-dimensional shape of a measurement object by irradiating the measurement object with light from a light-emitting device and receiving the reflected light from the measurement object, it may be required to set a high voltage for emitting light in order to increase the light intensity from the light-emitting unit in the light-emitting device. On the other hand, the signal for permitting light emission to the light-emitting unit is required to be a voltage supplied by a GPIO (Global Parallel I / O) or the like that is lower than the voltage for causing the light-emitting unit to emit light and is set regardless of the voltage for causing the light-emitting unit to emit light. An object of the present invention is to provide a light-emitting device or the like that can lower the voltage of a signal for permitting light emission to a light-emitting element as compared with the case where a light-emitting permission thyristor is not provided.

Means for Solving the Problems

[0007] The invention according to claim 1 includes a light-emitting unit including a light-emitting element including the function of a thyristor, a light-emitting electrode to which a first voltage is applied for light emission to the light-emitting unit, a voltage lower than the first voltage, and a light-emitting permission thyristor that is set regardless of the first voltage and permits the light-emitting element to emit light by a second voltage , a substrate on which the light-emitting unit and the light-emission permission thyristor are commonly provided; and comprises , the light-emitting unit is composed of one or a plurality of the light-emitting elements, the light-emission permission thyristor is provided for each of the plurality of the light-emitting units, and on the substrate, the light-emission permission thyristor is provided between a member that supplies the second voltage provided outside the substrate and the light-emitting unit a light-emitting device. Claim 2 The invention according to claim [X] includes a terminal portion for supplying the second voltage for each of a plurality of the light-emitting permission thyristors provided for each of the plurality of the light-emitting units. The substrate has a first side surface and a second side surface facing each other, and a third side surface and a fourth side surface facing each other that connect the first side surface and the second side surface. The member for supplying the second voltage is provided on the first side surface side, and the terminal portion is provided on either one or both of the first side surface side of the substrate and the portions where the light-emitting permission thyristors are provided on the third side surface side and the fourth side surface side of the substrate. The light-emitting device according to claim [X]. 1 is the light-emitting device according to claim [X]. The invention according to claim 3 includes another terminal portion for supplying a reference voltage, and the other terminal portion is provided on the substrate. The light-emitting device according to claim [X]. 2 is the light-emitting device according to claim [X]. Claim 4The invention described in Claim 5 is characterized in that the light-emitting element includes a surface-emitting diode and a driving thyristor laminated on the surface-emitting diode, and the driving thyristor is turned on to cause the surface-emitting diode to emit light, and is the light-emitting device according to claim 1. 4 The invention described in Claim 6 is characterized in that the light-emitting permission thyristor is provided with a bipolar transistor connected thereto, and the bipolar transistor is connected to the driving thyristor, and when the light-emitting permission thyristor is turned on, the bipolar transistor is turned on to enable the driving thyristor to be turned on, and is the light-emitting device according to claim 4 Or 5 The invention described in Claim 7 is characterized in that the surface-emitting diode is a vertical cavity surface-emitting laser, and is the light-emitting device according to claim pole The invention described in claim 1 is characterized by comprising a supply power supply that is electrically connected to the light-emitting electrode and supplies a power supply voltage to the light-emitting permission thyristor. Claim 8 The invention described in 7 is a measuring device including the light-emitting device according to any one of claims 1 to

Advantages of the Invention

[0008] According to the invention described in claim 1, the voltage of the signal for permitting light emission to the light-emitting element can be made lower than in the case where no light-emitting permission thyristor is provided. Claim 2 According to the invention described in Claim 3 the connection between the light-emitting permission thyristor and the member for supplying the second voltage is facilitated as compared with the case where the terminal portion is provided on the fourth side surface side. Claim4 According to the invention described in , compared with the case where the surface-emitting diode and the driving thyristor are not stacked, the emission of the surface-emitting diode can be more easily controlled. Claim 5 According to the invention described in , compared with the case where the bipolar transistor is not provided, the light-emitting element can be controlled with a simple configuration. Claim 6 According to the invention described in , compared with the case where it is not a vertical cavity surface emitting laser, the light intensity can be increased. Claim 7 According to the invention described in , compared with the case where an electrode for supplying the power supply voltage to the emission permission thyristor is separately provided, the number of electrodes can be reduced. Claim 8 According to the invention described in , the three-dimensional shape can be measured.

Brief Description of the Drawings

[0009]

Figure 1

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Figure 14

Embodiments for Carrying Out the Invention

[0010] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. There is a measuring device for measuring the three-dimensional shape of an object to be measured (hereinafter referred to as 3D shape). Based on the so-called ToF (Time of Flight) method using the flight time of light, there is a device for measuring the three-dimensional shape. In the ToF method, the time from the timing when light is emitted from a light-emitting device provided in the measuring device to the timing when it is reflected by the object to be measured and received by a three-dimensional sensor (hereinafter referred to as 3D sensor) provided in the measuring device is measured. Then, the 3D shape of the object to be measured is specified from the measured time. Note that the object for measuring the 3D shape is referred to as the object to be measured. The three-dimensional shape may be referred to as a three-dimensional image. Also, measuring the three-dimensional shape may be referred to as three-dimensional measurement, 3D measurement, or 3D sensing.

[0011] Such a measuring device is applied to recognizing the object to be measured from the measured 3D shape. For example, it is mounted on a portable information processing device or the like and used for recognizing the face of a user attempting to access. That is, the 3D shape of the face of the accessed user is acquired, it is determined whether access is permitted, and the use of the own device (portable information processing device) is permitted only when the user is recognized as a user whose access is permitted. In addition, this measuring device is also applicable when continuously measuring the 3D shape of the object to be measured, such as in augmented reality (AR). In this case, the distance to the object to be measured is not a concern.

[0012] Such a measuring device can be applied to information processing devices such as personal computers (PCs) other than portable information processing devices.

[0013] Here, as an example, the information processing device is described as a portable information processing device, and it is described that the user is authenticated by recognizing the face captured as a 3D shape.

[0014] (Information Processing Device 1) FIG. 1 is a diagram showing an example of the information processing device 1. As described above, the information processing device 1 is, as an example, a portable information processing device. The information processing device 1 includes a user interface unit (hereinafter referred to as the UI unit) 2 and an optical device 3 for measuring the 3D shape. The UI unit 2 is integrated with, for example, a display device that displays information to the user and an input device through which instructions for information processing are input by the user's operation. The display device is, for example, a liquid crystal display or an organic EL display, and the input device is, for example, a touch panel.

[0015] The optical device 3 includes a light emitting device 4 and a 3D sensor 5. The light emitting device 4 irradiates light toward the object to be measured, which is the face in this example. The 3D sensor 5 acquires the light reflected back by the face. Here, the 3D shape is measured based on the so-called ToF method using the time of flight of light. Then, the face is recognized from the 3D shape. As described above, the 3D shape may be measured with an object other than the face as the object to be measured. The measuring device for measuring the 3D shape includes the light emitting device 4 and the 3D sensor 5.

[0016] The information processing apparatus 1 is a computer including a CPU, a ROM, a RAM, etc. Note that the ROM includes a non-volatile rewritable memory, such as a flash memory. Then, the programs and constants stored in the ROM are expanded in the RAM, and the information processing apparatus 1 operates and various information processes are executed by the CPU executing the programs.

[0017] FIG. 2 is a block diagram for explaining the configuration of the information processing apparatus 1. The information processing apparatus 1 includes an optical device 3, a measurement control unit 8, and a system control unit 9. The measurement control unit 8 controls the optical device 3 to measure a 3D shape. The measurement control unit 8 includes a 3D shape specifying unit 8A. The system control unit 9 controls the entire information processing apparatus 1 as a system. And the system control unit 9 includes a recognition processing unit 9A. And a UI unit 2, a speaker 9B, a two-dimensional camera (denoted as a 2D camera in FIG. 2), etc. are connected to the system control unit 9.

[0018] The 3D shape specifying unit 8A included in the measurement control unit 8 measures the 3D shape from the reflected light from the object to be measured and specifies the 3D shape of the object to be measured. The recognition processing unit 9A included in the system control unit 9 recognizes the object to be measured, here the face, from the 3D shape specified by the 3D shape specifying unit 8A. And it discriminates whether the recognized face is a user who is permitted to access or not.

[0019] In addition to the above-described light emitting device 4 and 3D sensor 5, the optical device 3 includes a drive unit 6, a permission signal generation unit 7, a wiring board 10, a light diffusing member 30, and a holding unit 40. The drive unit 6 supplies a current for light emission to the light emitting device 4 to drive the light emitting device 4. The permission signal generation unit 7 generates a signal for permitting light emission to the light emitting device 4. The light emitting device 4, the drive unit 6, the permission signal generation unit 7, the light diffusing member 30, and the holding unit 40 are arranged on the wiring board 10. And the light emitting device 4, the drive unit 6, and the permission signal generation unit 7 are connected by wirings provided on the wiring board 10.

[0020] The light diffusing member 30 is inserted into the path of the light emitted by the light emitting device 4 and irradiates the light emitted by the light emitting device 4 in the direction where irradiation is desired. For example, the light diffusing member 30 is held by a holding portion 40 provided on the wiring substrate 10 and covers the light emitting device 4. Note that the wiring substrate 10 may include a resistance element and a capacitance element in order to operate the light emitting device 4, the driving portion 6, and the permission signal generation portion 7. Further, the light emitting device 4 may be provided on a heat dissipation base material having a higher thermal conductivity than the wiring substrate 10. Examples of the heat dissipation base material include alumina (Al2O3) having a thermal conductivity of 20 to 30 W / m·K, silicon nitride (Si3N4) having a thermal conductivity of about 85 W / m·K, or aluminum nitride (AlN) having a thermal conductivity of 150 to 250 W / m·K, as compared with the thermal conductivity of about 0.4 W / m·K of an insulating layer called FR-4 used for the wiring substrate 10. Note that although the wiring substrate 10 is provided with wiring, the wiring substrate 10 may be a substrate without wiring. It is only necessary that the light emitting device 4, the driving portion 6, and the permission signal generation portion 7 are electrically connected to each other, and the substrate may be any substrate that holds the light emitting device 4, the driving portion 6, the permission signal generation portion 7, and the like.

[0021] FIG. 3 is a perspective view for explaining a state in which the light emitting device 4 divides and irradiates the irradiation region 100. In FIG. 3, in the portion of the light emitting device 4, the right direction on the paper surface is defined as the x direction, the upward direction on the paper surface is defined as the y direction, and the direction toward the irradiation region 100 is defined as the z direction.

[0022] The light emitting device 4 includes, as an example, 12 light emitting portions 22. The 12 light emitting portions 22 are collectively referred to as a light emitting portion 21. The 12 light emitting portions 22 are arranged in a matrix of 4 in the x direction and 3 in the y direction. These light emitting portions 22 may each emit light individually, or a plurality of them may emit light simultaneously. Further, all of these light emitting portions 22 may emit light simultaneously.

[0023] The irradiation area 100 is the range irradiated by the light emitted by the light-emitting device 4 in order to measure the 3D shape of the object to be measured. Here, each light-emitting unit 22 has a different irradiation range. That is, the light-emitting device 4 irradiates the irradiation area 100 in a divided manner. The light emitted by the light-emitting unit 22 passes through the light diffusion member 30 (see FIG. 2), whereby the irradiation direction and / or the spread of the light are set. Instead of the light diffusion member 30, an optical member such as a diffractive optical element (DOE) that changes the direction of the incident light to different directions and emits it, or a transparent member such as a condenser lens, a microlens, or a protective cover may be used.

[0024] FIG. 4 is a layout diagram for explaining the light-emitting device 4 to which the present embodiment is applied. The x-direction, y-direction, and z-direction in FIG. 4 are the same as those in FIG. 3. The light-emitting device 4 includes a substrate 80, a light-emitting portion 21, a terminal portion 23, a light emission permission portion 26, and a reference voltage terminal 28. The light-emitting portion 21 includes 12 light-emitting units 22. The terminal portion 23 receives a permission signal φf for permitting the light emission of the light-emitting unit 22 from the permission signal generation unit 7. The light emission permission portion 26 causes the light-emitting unit 22 to emit light when the terminal portion 23 receives the permission signal φf. The reference voltage terminal 28 is supplied with a reference voltage. Assuming that the reference voltage is the ground voltage GND, it is denoted as the reference voltage Vga (0V). The reference voltage terminal 28 is an example of another terminal portion.

[0025] The light-emitting portion 21, the terminal portion 23, the light emission permission portion 26, and the reference voltage terminal 28 are provided on the substrate 80 (see FIG. 11 described later). Here, the substrate 80 has a side surface 80a on the x-direction side, a side surface 80b on the -x direction side, an 80c on the +y direction side, and an 80d on the -y direction side. The side surface 80a is an example of the first side surface, the side surface 80b is an example of the second side surface, the side surface 80c is an example of the third side surface, and the side surface 80d is an example of the fourth side surface.

[0026] The light emitting section 21 includes, as an example, 12 light emitting units 22 arranged in a matrix of 4 in the x direction and 3 in the y direction. To distinguish each light emitting unit 22, they are denoted as light emitting units 22-1 to 22-12. The light emitting units 22-1 to 22-4, the light emitting units 22-5 to 22-8, and the light emitting units 22-9 to 22-12 are arranged in the x direction, respectively, and the arrangements of the light emitting units 22-1 to 22-4, the light emitting units 22-5 to 22-8, and the light emitting units 22-9 to 22-12 are arranged in the -y direction.

[0027] On the light emitting section 21 (on the z direction side), a light emitting electrode 72 is provided in common for all the light emitting units 22. The ±y direction sides of the light emitting electrode 72 are pad portions 72A and 72B to which wirings for supplying a current for light emission are connected. Wirings for supplying a power supply voltage VLD for supplying a current for light emission are connected to the pad portions 72A and 72B. Note that the light emitting electrode 72 shows only the frame so that the lower light emitting units 22 can be seen.

[0028] The terminal section 23 includes signal terminals 24 that receive a permission signal φf for permitting light emission for each light emitting unit 22 from the permission signal generation section 7. To distinguish the permission signal φf for each light emitting unit 22, the permission signal φf is denoted as permission signals φf1 to φf12, and to distinguish the signal terminals 24 for each light emitting unit, the signal terminals 24 are denoted as signal terminals 24-1 to 24-12. The terminal section 23 is collectively arranged on the +x direction side of the light emitting section 21.

[0029] The light emission permission section 26 includes permission circuits 27 for permitting light emission for each light emitting unit 22. To distinguish the permission circuits 27 for each light emitting unit 22, they are denoted as permission circuits 27-1 to 27-12. The light emission permission section 26 is provided between the light emitting section 21 and the terminal section 23.

[0030] The reference voltage terminal 28 is provided at the ends on the +x direction side and the -y direction side of the substrate 80. When the reference voltage terminal 28 is provided on the substrate 80, it becomes easy to supply the reference voltage Vga (0V) to the light emission permission section 26.

[0031] FIG. 5 is an example of a plan view of the light-emitting device 4 to which the present embodiment is applied. The x-direction, y-direction, and z-direction in FIG. 5 are the same as those in FIG. 4. FIG. 5 is a diagram for explaining the light-emitting device 4 whose layout is shown in FIG. 4 in more detail. In FIG. 5, some reference numerals are omitted.

[0032] The ○ marks shown in the light-emitting section 22 are light-emitting elements. That is, each light-emitting section 22 includes a plurality of light-emitting elements. Note that each light-emitting section 22 may include the same number of light-emitting elements or different numbers of light-emitting elements. The number of light-emitting elements included in the light-emitting section 22 may be one.

[0033] Each light-emitting section 22 of the light-emitting section 21 and each permission circuit 27 of the light-emission permission section 26 are connected by a wiring 25. In order to distinguish the wiring 25 for each light-emitting section 22, it is denoted as wirings 25-1 to 25-12. FIG. 5 shows a wiring 25-1 that connects the light-emitting section 22-1 and the permission circuit 27-1, a wiring 25-2 that connects the light-emitting section 22-2 and the permission circuit 27-2, and a wiring 25-3 that connects the light-emitting section 22-3 and the permission circuit 27-3, and the notations of the other wirings 25-4 to 25-12 are omitted.

[0034] The wiring 25 is provided along the light-emitting section 22 outside the light-emitting section 22. Thereby, light-emitting diodes LEDs can be provided at a higher density than in the case where the wiring is provided inside the light-emitting section 22, that is, on the surface.

[0035] Each permission circuit 27 of the light-emission permission section 26 and each signal terminal 24 of the terminal section 23 are connected. In FIG. 5, a wiring is drawn out from the signal terminal 24 and connected to the permission circuit 27.

[0036] A reference voltage line 73 to which a reference voltage is supplied and a power supply voltage line 74 to which a power supply voltage VLD is supplied are provided in the light-emission permission section 26. The reference voltage line 73 is connected to a reference voltage terminal 28. The power supply voltage line 74 is connected to a light-emitting electrode 72. As described above, the power supply voltage VLD is supplied to the light-emitting electrode 72.

[0037] The light emitting part 22 of the light emitting section 21 is connected to the permission circuit 27 of the light emission permission section 26. The permission circuit 27 of the light emission permission section 26 is connected to the signal terminal 24 of the terminal section 23. The light emitting part 22 of the light emitting section 21 emits light via the permission circuit 27 of the light emission permission section 26 according to the permission signal φf received by the signal terminal 24 of the terminal section 23.

[0038] FIG. 6 is a diagram for explaining the arrangement of the light emitting device 4, the driving section 6, and the permission signal generation section 7 on the wiring board 10. The light emitting device 4 shows a simplified layout diagram shown in FIG. 4. The x-direction, y-direction, and z-direction in FIG. 6 are the same as those in FIGS. 3 and 4. The driving section 6 is provided on the side surface 80b side (-x direction side) of the substrate 80 in the light emitting device 4, and the permission signal generation section 7 is provided on the side surface 80a (+x direction side) of the substrate 80. That is, the driving section 6 is provided on the light emitting section 21 side of the light emitting device 4. Thereby, the distance between the driving section 6 and the light emitting part 22 of the light emitting section 21 becomes short. Therefore, the inductance between the driving section 6 and the light emitting part 22 in the light emitting device 4 becomes small, and the rise time of the optical pulse becomes short.

[0039] The permission signal generation section 7 is provided on the terminal section 23 side of the light emitting device 4. Therefore, the distance between the permission signal generation section 7 and the terminal section 23 becomes short, and the connection becomes easy.

[0040] Furthermore, the pad portion 72A of the light-emitting electrode 72 is provided on the side surface 80c side (+y direction side) on the substrate 80, and the pad portion 72B is provided on the side surface 80d side (-y direction side) on the substrate 80. The wiring for supplying the power supply voltage VLD to the pad portions 72A and 72B is provided from the side surface where the drive unit 6 and the permission signal generation unit 7 are not provided. If the pad portions 72A and 72B are provided on the side of the terminal portion 23 or the side where the drive unit 6 is provided, the connection of the wiring to the pad portions 72A and 72B may be obstructed by the terminal portion 23 or the drive unit 6. That is, the wiring for supplying the power supply voltage VLD to the pad portions 72A and 72B is provided without being inhibited by the drive unit 6 and the permission signal generation unit 7. That is, compared with the case where the pad portions 72A and 72B are provided at the position where the terminal portion 23 or the drive unit 6 is provided, the connection to the pad portions 72A and 72B becomes easier.

[0041] The pad portion 72A is provided on the side surface 80c side, and the pad portion 72B is provided on the side surface 80d side. That is, the pad portions 72A and 72B are provided on the two opposing side surfaces of the substrate 80. However, either one of the pad portions 72A and 72B may be provided. By providing the pad portions 72A and 72B on the two side surfaces of the substrate 80, the current for light emission is supplied from both sides of the light-emitting electrode 72. Thereby, compared with the case where either one of the pad portions 72A and 72B is provided, the bias of the current supply to the light-emitting unit 22 is suppressed.

[0042] FIG. 7 is an equivalent circuit of the light-emitting device 4 to which the present embodiment is applied. In FIG. 7, in addition to the light-emitting device 4, the drive unit 6 and the measurement control unit 8 are shown together.

[0043] The light-emitting device 4 includes a light-emitting unit 21, a terminal unit 23, and a light emission permission unit 26. In FIG. 7, three light-emitting units 22 (light-emitting units 22-1, 22-2, 22-3) in the light-emitting unit 21, three permission circuits 27 (permission circuits 27-1, 27-2, 27-3) connected to the three light-emitting units 22, and signal terminals 24 (signal terminals 24-1, 24-2, 24-3) connected to the three permission circuits 27 are shown. The following will be described in order.

[0044] As described in the light-emitting unit 22-1, each light-emitting unit 22 includes a plurality of light-emitting diodes LED connected in series and drive thyristors S. Here, the light-emitting diode LED and the drive thyristor S are an example of a light-emitting element including a thyristor function. Note that the semiconductor layers constituting the light-emitting diodes LED in each light-emitting unit 22 are connected to each other. Similarly, the semiconductor layers constituting the drive thyristors S in each light-emitting unit 22 are connected to each other. Therefore, the drive thyristor S may operate as one drive thyristor S.

[0045] The light-emitting diode LED is preferably a surface-emitting diode that emits light in a direction perpendicular to the substrate 80. The surface-emitting diode is, for example, a vertical cavity surface emitting laser VCSEL (Vertical Cavity Surface Emitting Laser). Hereinafter, it will be described on the assumption that the light-emitting diode LED is a vertical cavity surface emitting laser VCSEL. The vertical cavity surface emitting laser VCSEL is a surface-emitting laser element in which a light-emitting layer serving as a light-emitting region is provided between a lower multilayer mirror and an upper multilayer mirror laminated on a substrate, and laser light is emitted in a direction perpendicular to the surface. The vertical cavity surface emitting laser VCSEL here has a λ resonator structure. Note that the surface-emitting diode may be another light-emitting device such as a laser diode other than the vertical cavity surface emitting laser VCSEL. Hereinafter, the vertical cavity surface emitting laser VCSEL may be referred to as VCSEL.

[0046] The light-emitting diode LED is a two-terminal semiconductor element including a cathode ([K]) and an anode ([A]). The drive thyristor S is a three-terminal semiconductor element including a cathode ([K]), an n-gate ([G1]), and an anode ([A]).

[0047] The anode ([A]) of the light-emitting diode LED is connected to the cathode ([K]) of the drive thyristor S. The cathodes ([K]) of the drive thyristors S are connected in parallel, and the gates ([G1]) of the drive thyristors S are connected in parallel. The cathode ([K]) of the light-emitting diode LED is connected in parallel. Specifically, the cathode ([K]) of the light-emitting diode LED is connected to the back electrode 90 provided on the back surface of the substrate 80 (see FIG. 11 described later).

[0048] The anode ([A]) of the drive thyristor S is connected to the light-emitting electrode 72. A power supply voltage VLD is applied to the light-emitting electrode 72.

[0049] Each permission circuit 27 includes a light-emission permission thyristor F, an npn bipolar transistor Tr, and resistors R1 and R2 as described in the permission circuit 27-1. The light-emission permission thyristor F is a four-terminal semiconductor element having a cathode ([K]), an n-gate ([G1]), a p-gate ([G2]), and an anode ([A]). The npn bipolar transistor Tr is a three-terminal semiconductor element having a collector ([C]), a base ([B]), and an emitter ([E]).

[0050] A reference voltage Vga (0V) is supplied to the cathode ([K]) and the n-gate ([G1]) of the light-emission permission thyristor F. The anode ([A]) of the light-emission permission thyristor F is connected to the signal terminal 24. A permission signal φf is supplied to the signal terminal 24. The p-gate ([G2]) of the light-emission permission thyristor F is connected to the base ([B]) of the npn bipolar transistor Tr. A reference voltage Vga (0V) is supplied to the emitter ([E]) of the npn bipolar transistor Tr. The collector ([C]) of the npn bipolar transistor Tr is connected to the n-gate ([G1]) of the drive thyristor S of the light-emitting unit 22 via the resistor R1. Also, the collector ([C]) of the npn bipolar transistor Tr is connected to the power supply voltage line 74 (see FIG. 5) via the resistor R2. A power supply voltage VLD is supplied to the power supply voltage line 74.

[0051] The drive unit 6 includes an MOS transistor 61 as an example of a drive element and a signal generation circuit 62. Note that the drive element may be an insulated gate bipolar transistor (IGBT) or the like.

[0052] The drain ([D]) of the MOS transistor 61 is connected to the cathode ([K]) of the light-emitting diode LED of the light-emitting unit 22. The drain ([D]) of the MOS transistor 61 is connected to the reference voltage line 71 of the reference voltage Vga (0V). The signal generation circuit 62 in the drive unit 6 supplies an On signal (On) for turning on the MOS transistor 61 and an Off signal (Off) for turning it off to the gate ([G]) of the MOS transistor 61.

[0053] The signal generation circuit 62 in the drive unit 6 supplies an On signal (On) for turning on the MOS transistor 61 and an Off signal (Off) for turning it off to the gate ([G]) of the MOS transistor 61.

[0054] The power supply voltage VLD and the reference voltage Vga (0V) are supplied from the measurement control unit 8. The drive unit 6 is controlled by the measurement control unit 8.

[0055] The driving method of the above light-emitting device 4 is so-called low-side driving. When it is desired to drive the light-emitting diode LED at a higher speed, it is preferable to perform low-side driving. Low-side driving refers to a configuration in which a drive element such as the MOS transistor 61 is positioned on the downstream side of the current path with respect to a driving target such as the light-emitting diode LED.

[0056] Hereinafter, the operation of the light-emitting device 4 will be described. (Drive thyristor S and light emission permission thyristor F) The drive thyristor S is a semiconductor element having three terminals: an anode ([A]), an n-gate ([G1]), and a cathode ([K]). The light-emission permission thyristor F is a semiconductor element having four terminals: a cathode ([K]), an n-gate ([G1]), a p-gate ([G2]), and an anode ([A]). As will be described later, the drive thyristor S and the light-emission permission thyristor F are formed by laminating an n-cathode layer 85, a p-gate layer 86, an n-gate layer 87, and a p-anode layer 88 made of GaAs, AlGaAs, AlAs, etc. (see FIG. 11 described later). That is, both the drive thyristor S and the light-emission permission thyristor F have an npnp structure. The drive thyristor S does not use a p-gate ([G2]), but the structure of the drive thyristor S is the same as that of the light-emission permission thyristor F. Hereinafter, the drive thyristor S and the light-emission permission thyristor F will be described as thyristors.

[0057] As an example, the forward voltage (diffusion potential) V of the pn junction between the p-type semiconductor layer (p-gate layer 86, p-anode layer 88) and the n-type semiconductor layer (n-cathode layer 85, n-gate layer 87) d will be described as 1.5V.

[0058] A voltage at which the thyristor can transition from the off state to the on state is applied between the anode ([A]) and the cathode ([K]) of the thyristor, but it is assumed that the thyristor is in the off state where no current is flowing. Note that the voltage V of the cathode ([K]) of the thyristor K is assumed to be the reference voltage Vga (0V). When the anode ([A]) and the n-gate ([G1]) are forward-biased, the thyristor transitions (turns on) from the off state to the on state where current flows. That is, when the voltage V of the n-gate ([G1]) G1 is lower than the voltage obtained by subtracting the forward voltage V from the voltage V of the anode ([A]) of the thyristor A (V d ), the thyristor turns on (V G1 < V A - V d ).

[0059] Also, for the thyristor, the voltage V of the anode ([A]) Ais a voltage V of n gates ([G1]) G1 to which a forward voltage V d is added, and when the voltage (V A > V G1 + V d ), the thyristor transitions from the off state to the on state (turns on).

[0060] For a thyristor in the on state, if a current that maintains the on state is supplied such that the voltage between the anode ([A]) and the cathode ([K]) is greater than the forward voltage V d , the on state is maintained. That is, when the cathode ([K]) is at the reference voltage Vga (0 V), if the voltage V A of the anode ([A]) is greater than the forward voltage V d , the on state is maintained (V A > V d ). And the voltage V G2 of the p gate ([G2]) becomes a voltage close to the voltage of the anode ([A]). Hereinafter, the voltage V G2 of the p gate ([G2]) will be described as being equal to the voltage of the anode ([A]) (V G2 = V A ). Hereinafter, to distinguish between the light emission permission thyristor F and the drive thyristor S, the voltage of the anode ([A]) will be distinguished as V FA , V SA . The same applies to other voltages.

[0061] Note that in a thyristor in the on state, if the voltage between the anode ([A]) and the cathode ([K]) becomes less than the forward voltage V d , the thyristor transitions from the on state to the off state (turns off). For a thyristor in the on state, even if the voltage V G1 of the gate ([G1]) is less than the voltage obtained by subtracting the forward voltage V A from the voltage V d of the anode ([A]), the thyristor does not turn off.

[0062] (npn bipolar transistor Tr) When the npn bipolar transistor Tr in the off state has a forward bias between the emitter ([E]) and the base ([B]), it transitions to the on state. Then, the voltage V of the collector ([C]) C becomes a voltage close to the voltage V of the emitter ([E]). The npn bipolar transistor Tr shown in Fig. 7 has the emitter ([E]) supplied with the reference voltage Vga (0V). Therefore, when the npn bipolar transistor Tr is in the on state, the voltage V of the collector ([C]) E becomes a voltage close to the reference voltage Vga (0V), which is the voltage V of the emitter ([E]). In the following, it will be described assuming that the voltage V of the collector ([C]) C becomes the reference voltage Vga (0V) (V E = 0V). C will be described as becoming the reference voltage Vga (0V) (V C = 0V).

[0063] (Light-emitting diode LED) The light-emitting diode LED is a semiconductor element having two terminals, an anode ([A]) and a cathode ([K]). Therefore, the light-emitting diode LED emits light when a voltage greater than the forward voltage V between the anode ([A]) and the cathode ([K]) is applied and a current that enables light emission flows. d

[0064] (Operations of the light-emitting unit 22 and the permission circuit 27) The operations of the light-emitting unit 22 and the permission circuit 27 will be described by the light-emitting unit 22-1 and the permission circuit 27-1. The n gate ([G1]) of the drive thyristor S of the light-emitting unit 22 is connected to the collector ([C]) of the npn bipolar transistor Tr of the permission circuit 27 via a resistor R1. The anode ([A]) of the drive thyristor S of the light-emitting unit 22 is applied with the power supply voltage VLD via the light-emitting electrode 72. The collector ([C]) of the npn bipolar transistor Tr of the permission circuit 27 is applied with the power supply voltage VLD via a resistor R2. The anode ([A]) of the light-emission permission thyristor F of the light-emitting unit 22 is connected to the signal terminal 24 and supplied with the permission signal φf.

[0065] ​Assume that the power supply voltage VLD is 5V and the permission signal φf is 0V. The 5V power supply voltage VLD is a value exceeding the forward voltage V of 1.5V. Assume that the drive thyristor S of the light emitting section 22, the npn bipolar transistor Tr of the permission circuit 27, and the light emission permission thyristor F are in the off state. And assume that the signal generation circuit 62 of the drive section 6 supplies an On signal to the MOS transistor 61. That is, the MOS transistor 61 is in the on state, and the cathode ([K]) of the light emitting diode LED connected via the MOS transistor 61 is at the reference voltage Vga (0V). d When the permission signal φf is 0V, since the voltage V at the anode ([A]) of the light emission permission thyristor F of the permission circuit 27 and the voltage V at the n gate ([G1]) are 0V, the light emission permission thyristor F maintains the off state. The n gate ([G1]) of the drive thyristor S of the light emitting section 22 has the power supply voltage VLD applied via the resistor R1 and the resistor R2. Since the voltage V at the anode ([A]) of the drive thyristor S and the voltage V at the n gate ([G1]) are the power supply voltage VLD, the drive thyristor S maintains the off state. And since no current flows through the drive thyristor S and the light emitting diode LED connected in series, the light emitting diode LED is in the non-light emitting state (non-emission state).

[0066] When the permission signal φf is 0V, since the voltage V at the anode ([A]) of the light emission permission thyristor F of the permission circuit 27 and the voltage V at the n gate ([G1]) are 0V, the light emission permission thyristor F maintains the off state. FA and the voltage V at the n gate ([G1]) FG1 are 0V, the light emission permission thyristor F maintains the off state. The n gate ([G1]) of the drive thyristor S of the light emitting section 22 has the power supply voltage VLD applied via the resistor R1 and the resistor R2. Since the voltage V at the anode ([A]) of the drive thyristor S and the voltage V at the n gate ([G1]) are the power supply voltage VLD, the drive thyristor S maintains the off state. And since no current flows through the drive thyristor S and the light emitting diode LED connected in series, the light emitting diode LED is in the non-light emitting state (non-emission state). SA and the voltage V at the n gate ([G1]) SG1 are the power supply voltage VLD, the drive thyristor S maintains the off state. And since no current flows through the drive thyristor S and the light emitting diode LED connected in series, the light emitting diode LED is in the non-light emitting state (non-emission state).

[0067] When the permission signal φf becomes a voltage exceeding 1.5V which is the forward voltage V d , the voltage V at the anode ([A]) of the light emission permission thyristor F FA becomes larger than the voltage V at the n gate ([G1]) FG1 (0V) by the forward voltage V d (V FA > V FG1 + V d ). As a result, the light emission permission thyristor F transitions (turns on) from the off state to the on state. Then, the voltage V at the p gate ([G2]) of the light emission permission thyristor F FG2 becomes Light-emission permission thyristor The voltage V of the anode ([A]) of F FA becomes. The voltage V FA is a voltage exceeding 1.5V which is the forward voltage V d (V FA >V d ), so the npn bipolar transistor Tr transitions from the off state to the on state. Then, the voltage V C of the collector ([C]) of the npn bipolar transistor Tr becomes the voltage of the emitter ([E]) (0V) (V C =0V).

[0068] The n - gate ([G1]) of the drive thyristor S is connected to the collector ([C]) of the npn bipolar transistor Tr via the resistor R1. When the voltage V C of the collector ([C]) of the npn bipolar transistor Tr becomes 0V, the voltage V SG1 of the n - gate ([G1]) of the drive thyristor S becomes 0V. The voltage V SA of the anode ([A]) of the drive thyristor S is the power supply voltage VLD (5V). Voltage V of the n gate ([G1]) SG1 is smaller than the voltage obtained by subtracting the forward voltage V from the voltage of the anode ([A]) V SA by a voltage smaller than the voltage obtained by subtracting the forward voltage V d (V SG1 <V A -V d ) is like this, so the drive thyristor S transitions from the off state to the on state (turns on). Then, current flows through the drive thyristor S and the light - emitting diode LED connected in series, and the light - emitting diode LED starts to emit light (lights up). Note that between the anode ([A]) and the cathode ([K]) of the light - emitting diode LED, 3.5V obtained by subtracting the forward voltage V d from the power supply voltage VLD is applied.

[0069] The permission signal φf, that is, the voltage V FA of the anode ([A]) of the light - emitting permission thyristor F becomes a voltage less than the forward voltage Vd (V FA <V d), the light-emission enable thyristor F transitions from the on state to the off state (turns off). On the other hand, the driving thyristor S has an anode ([A]) voltage V SA is the power supply voltage VLD. Therefore, the n-gate ([G1]) is connected to the anode ([A]) voltage V SA to forward voltage V d Even if the voltage drops below the voltage obtained by subtracting 1, the thyristor will not turn off. Therefore, the signal generating circuit 62 of the driving unit 6 supplies an Off signal to turn the MOS transistor 61 off, thereby cutting off the current flowing through the series-connected driving thyristor S and light-emitting diode LED. This turns the driving thyristor S off. No current flows through the light-emitting diode LED, and the light-emitting diode LED stops emitting light (goes out) and enters a non-light-emitting state.

[0070] In the above, the power supply voltage VLD is 5 V. The same applies when the power supply voltage VLD is 10 V. The voltage V of the n-gate ([G1]) of the light-emission enable thyristor F FG1 Since the reference voltage Vga (0V) is the enable signal φf, the forward voltage V d When the voltage exceeds 1.5 V, the light-emission enable thyristor F turns on. Then, the enable signal φf is forward-biased to the forward voltage V d When the voltage drops to or below 1.5 V, the light-emission enable thyristor F turns off and remains in the off state. In other words, regardless of the power supply voltage VLD, the enable signal φf is turned on by the forward voltage V d When the voltage is set to a voltage exceeding 1.5 V, which is the enable signal φf, the light-emission enable thyristor is turned on, and when the voltage is set to a voltage less than 1.5 V, the light-emission enable thyristor is turned off or maintained in the off state. Therefore, a GPIO (Global Parallel I / O) that outputs a voltage of 1.8 V, 3 V, 3.3 V, etc. can be used as the enable signal generating unit 7 that supplies the enable signal φf.

[0071] When the power supply voltage VLD is 5V, 3.5V is applied to the light-emitting diode LED. However, when the power supply voltage VLD is 10V, 8.5V is applied to the light-emitting diode LED. The greater the voltage applied to the light-emitting diode LED, the greater the light intensity. Therefore, the higher the voltage of the power supply voltage VLD, the better, and the voltage of the permission signal φf is required to be low. Thus, by providing the light emission permission unit 26, the voltage of the permission signal φf is set to a low voltage regardless of the power supply voltage VLD.

[0072] Here, the power supply voltage VLD is an example of the first voltage, and the voltage of the permission signal φf for shifting the light emission permission thyristor F to the on state is an example of the second voltage. As described above, the power supply voltage VLD, which is an example of the first voltage, is 5V, 10V, etc., and the voltage of the permission signal φf for shifting the light emission permission thyristor F, which is an example of the second voltage, to the on state is higher than the forward voltage V d which is 1.5V. Therefore, the second voltage is set lower than the first voltage. Also, the permission signal generation unit 7 is an example of a member that supplies the second voltage.

[0073] Note that at the right end of FIG. 7, a light-emitting diode LED with its anode ([A]) set to the reference voltage Vga (0V) is shown. As will be described later, the light emission permission unit 26 is provided on the light-emitting diode LED. For this reason, the anode ([A]) of the light-emitting diode LED is set to the reference voltage Vga (0V). Therefore, when the MOS transistor 61 of the drive unit 6 is in the on state, the back surface electrode 90, which is the cathode ([K]) of the light-emitting diode LED, becomes the reference voltage Vga (0V), so the light-emitting diode LED does not emit light.

[0074] FIG. 8 is an equivalent circuit of a light-emitting device 4' to which the present embodiment is not applied. In FIG. 8, in addition to the light-emitting device 4', a drive unit 6 and a measurement control unit 8 are shown together. The light-emitting device 4' does not include a light emission permission unit 26. A signal terminal 24 of a terminal unit 23 is connected to an n gate ([G1]) of a drive thyristor S of a light-emitting unit 22. A permission signal φf is supplied to the signal terminal 24. Since the other parts are the same as those of the light-emitting device 4 shown in FIG. 7, the same reference numerals are given and the description thereof is omitted.

[0075] In the light-emitting device 4', the voltage V of the anode ([A]) of the drive thyristor S SA is the power supply voltage VLD. Then, when the voltage V of the n gate ([G1]), which is the permission signal φf SG1 is smaller than the voltage obtained by subtracting the forward voltage V SA from the voltage V of the anode ([A]) (V d < V SG1 < V A - V d ), the drive thyristor S shifts from the off state to the on state (turns on). Therefore, when the power supply voltage VLD is 5V, in order to maintain the off state of the drive thyristor S, the voltage of the permission signal φf is required to be 3.5V or more. Also, when the power supply voltage VLD is 10V, in order to maintain the off state of the drive thyristor S, the voltage of the permission signal φf is required to be 8.5V or more. Therefore, it is difficult to apply GPIO (Global Parallel I / O) as the permission signal generation unit 7 of the light-emitting device 4'.

[0076] (Timing chart of the light-emitting device 4) FIG. 9 is a timing chart for explaining the operation of the light-emitting device 4. The horizontal axis represents the passage of time t in the order of times a to e. From the top, the power supply voltage VLD, the permission signals φf1 to φf8, the permission signals φf9 to φf12, the signal of the signal generation circuit 62 of the drive unit 6, the states of the light-emitting units 22-1 to 22-8, and the states of the light-emitting units 22-9 to 22-12 are shown. The permission signals φf1 to φf12 are signals that are switched between the H level and the L level. Here, the H level is a voltage exceeding the forward voltage Vd, and the L level is the reference voltage Vga (0V). Here, as an example, it is assumed that the permission signals φf1 to φf8 are maintained at the L level, and the permission signals φf9 to φf12 are simultaneously switched from the L level to the H level and then to the L level. Note that the permission signals φf1 to φf12 may each be set independently, or a plurality of them may be set simultaneously as described above. Also, all of the permission signals φf1 to φf12 may be set simultaneously.

[0077] At time a, the power supply voltage VLD is applied. The permission signals φf1 to φf12 are at the L level. Therefore, the light-emission permission thyristors F of the permission circuits 27-1 to 27-12 are in the off state. The signal generation circuit 62 of the drive unit 6 supplies an Off signal to the MOS transistor 61. Therefore, the MOS transistor 61 is in the off state. All of the drive thyristors S are in the off state, and all of the light-emitting diodes LED are in the non-light-emitting state.

[0078] At time b, the permission signals φf9 to φf12 transition from the L level to the H level. Then, the light-emission permission thyristors F of the permission circuits 27-9 to 27-12 turn on. Then, via the npn bipolar transistor Tr, the drive thyristors S of the light-emitting units 22-9 to 22-12 become in a state where the n gate ([G1]) becomes 0V and can transition from the off state to the on state. However, since the MOS transistor 61 of the drive unit 6 is in the off state, the drive thyristor S cannot transition to the on state.

[0079] At time c, the signal generation circuit 62 of the drive unit 6 supplies an On signal to the MOS transistor 61. Then, the power supply voltage VLD is applied to the series connection of the drive thyristor S and the light-emitting diode LED of the light-emitting units 22-9 to 22-12. Therefore, the drive thyristor S transitions from the off state to the on state, and the light-emitting diode LED starts to emit light (turns on).

[0080] At time d, the permission signals φf9 to φf12 transition from the H level to the L level. Then, the light-emission permission thyristor F in the permission circuits 27-9 to 27-12 turns off. However, the drive thyristor S of the light-emitting units 22-9 to 22-12 does not transition to the off state, and the light-emitting diode LED continues to emit light.

[0081] At time e, the signal generation circuit 62 of the drive unit 6 supplies an Off signal to the MOS transistor 61. Then, no current flows through the series connection of the drive thyristor S and the light-emitting diode LED of the light-emitting units 22-9 to 22-12, and the light-emitting diode LED stops emitting light (turns off).

[0082] As described above, the light-emitting device 4 is controlled. Note that the timing at which the permission signals φf9 to φf12 at time b transition from the H level to the L level and the timing at which the signal generation circuit 62 in the drive unit 6 at time c supplies the On signal to the MOS transistor 61 may be interchanged. In this case, the light-emitting diode LED starts to emit light at the timing when the permission signals φf9 to φf12 transition from the L level to the H level. Also, the timing at which the permission signals φf9 to φf12 at time d transition from the H level to the L level and the timing at which the signal generation circuit 62 in the drive unit 6 at time e supplies the Off signal to the MOS transistor 61 may be interchanged.

[0083] (Structure of the light-emitting device 4) The light-emitting device 4 is composed of a semiconductor material capable of emitting light. For example, the light-emitting device 4 is composed of a GaAs-based compound semiconductor. As shown in the cross-sectional view to be described later (see FIG. 11 to be described later), it is composed of a semiconductor layer stack in which a plurality of GaAs-based compound semiconductor layers are stacked on an n-type GaAs substrate 80. And the light-emitting device 4 is configured by separating the semiconductor layer stack into a plurality of island shapes. Note that the regions left in the island shape are called islands. Etching the semiconductor layer stack into an island shape to separate the elements is called mesa etching. The structures of the light-emitting unit 22 and the permission circuit 27 will be described in order below.

[0084] <Structure of the light-emitting unit 22> Each light-emitting unit 22 is configured by an island 301 in which semiconductor stacks are separated from each other. Note that the islands 301 corresponding to the light-emitting units 22-1, 22-2,... are denoted as islands 301-1, 301-2,....

[0085] FIG. 10 is an enlarged plan view of the light-emitting unit 22. FIG. 10 is an enlarged view of a part of the light-emitting unit 22-12 (island 301-12) in the light-emitting device 4 shown in FIG. 5. Hereinafter, the light-emitting unit 22-12 will be denoted as the light-emitting unit 22, and the island 301-12 will be denoted as the island 301 for explanation. Note that FIG. 10 also shows the island 302. The x direction, y direction, and z direction are the same as those in FIG. 5.

[0086] The island 301 includes a plurality of light-emitting diodes LED and a plurality of drive thyristors S. Here, four light-emitting diodes LED1 to LED4 and setting thyristors S1 to S4 surrounding the light-emitting diodes LED1 to LED4 respectively are labeled. First, focusing on the light-emitting diode LED1 and the setting thyristor S1 located at the lower right of the paper surface, the planar structure of the light-emitting unit 22 will be described. Note that without distinguishing between the light-emitting diode LED1 and the setting thyristor S1, they will be denoted as the light-emitting diode LED and the setting thyristor S for explanation. The same applies hereinafter.

[0087] In a light-emitting diode (LED), the circular portion in the center is the light-emitting aperture 341 of the LED. The drive thyristor S is in the region 311 (see FIG. 11 described later) of the p-type anode layer (hereinafter referred to as the p-anode layer; the same applies to others) 88 provided so as to surround the light-emitting aperture 341. And a p-ohmic electrode 321 is provided on the region 311. Further, outside thereof, six holes (trenches) 342 and six n-gate electrodes 331 are provided. The n-gate electrodes 331 are provided on an n-type gate layer (n-gate layer) 87 described later. Note that some of the n-gate electrodes 331 are connected to the n-gate electrodes 331 of adjacent LEDs. And the n-gate layer 87 is drawn out toward the light emission permission section 26 side (+x direction side), and an n-gate electrode 332 connected to a permission circuit 27 (permission circuit 27-12 in the case of the island 301-12) is provided at the end thereof. Note that the portion of the n-gate layer 87 drawn out toward the light emission permission section 26 side serves as a wiring 25 (here, wiring 25-12).

[0088] And, except for the light-emitting aperture 341, a light-emitting electrode 72 is provided to cover the light-emitting section 22. The light-emitting electrode 72 is connected to the p-ohmic electrode 321 provided on the region 311 through a through hole provided in an insulating layer 89 (see FIGS. 11(a) and 11(b) described later). Note that in FIG. 11, the light-emitting electrode 72 is indicated by a broken line.

[0089] The island 302 is provided so that the n-gate layer 87 is exposed, and an n-gate electrode 333 is provided on the exposed n-gate layer 87. One end portion of the n-gate electrode 333 in the island 302 is connected to the light-emitting electrode 72 through a through hole provided in the insulating layer 89. The other end portion of the n-gate electrode 333 in the island 302 is connected to a power supply voltage line 74 shown in FIG. 5. That is, the island 302 supplies the power supply voltage VLD to the power supply voltage line 74 through the n-gate layer 87 and the n-gate electrode 333. In this embodiment, the n-gate electrode 333 is an example of a supply electrode.

[0090] FIG. 11 is a cross-sectional view of the light-emitting part 22. FIG. 11(a) is a cross-sectional view taken along line XIA-XIA' in FIG. 10, and FIG. 11(b) is a cross-sectional view taken along line XIB-XIB' in FIG. 10. FIG. 11(a) is a cross-sectional view of a portion of two adjacent light-emitting diodes LED1 and LED2 sandwiching the n-gate electrode 331. FIG. 11(b) is a cross-sectional view of a portion of two adjacent light-emitting diodes LED3 and LED4 sandwiching the hole 342.

[0091] As shown in FIG. 11(a), in the light-emitting part 22, an n-type cathode layer (n-cathode layer) 81, a light-emitting layer 82, and a p-type anode layer (p-anode layer) 83 that constitute a light-emitting diode LED are laminated on an n-type GaAs substrate 80. That is, the light-emitting diode LED is configured with the laminated n-cathode layer 81 as the cathode, the light-emitting layer 82 as the light-emitting layer, and the p-anode layer 83 as the anode. Next, a tunnel junction layer 84 is laminated on the p-anode layer 83. Then, on the tunnel junction layer 84, an n-type cathode layer (n-cathode layer) 85, a p-type gate layer (p-gate layer) 86, an n-type gate layer (n-gate layer) 87, and a p-type anode layer (p-anode layer) 88 that constitute the driving thyristor S are laminated. That is, the driving thyristor S is configured with the laminated n-cathode layer 85 as the cathode, the p-gate layer 86 as the p-gate, the n-gate layer 87 as the n-gate, and the n-gate layer 87 as the anode. Here, the laminate of the n-cathode layer 81, the light-emitting layer 82, the p-anode layer 83, the tunnel junction layer 84, the n-cathode layer 85, the p-gate layer 86, the n-gate layer 87, and the n-gate layer 87 is a semiconductor layer laminate.

[0092] The light-emitting diode LED is configured by removing, by etching, the p-anode layer 88, the n-gate layer 87, the p-gate layer 86, the n-cathode layer 85, and the tunnel junction layer 84 of the driving thyristor S laminated on the upper side, so that the p-anode layer 83 is exposed. That is, light is emitted from the exposed p-anode layer 83. The exposed p-anode layer 83 is the light emission port 341.

[0093] The drive thyristor S is composed of an n cathode layer 85, a p gate layer 86, an n gate layer 87, and a p anode layer 88 remaining around the light-emitting port 341 of the light-emitting diode LED. On the substrate 80 side of the drive thyristor S, there are a tunnel junction layer 84, a p anode layer 83 constituting the light-emitting diode LED, a light-emitting layer 82, and an n cathode layer 81. That is, the light-emitting diode LED and the drive thyristor S are laminated via the tunnel junction layer 84 and are connected in series.

[0094] The tunnel junction layer 84 is provided between the p anode layer 83 of the light-emitting diode LED and the n cathode layer 85 of the drive thyristor S. That is, if the tunnel junction layer 84 is not provided, the p anode layer 83 of the light-emitting diode LED and the n cathode layer 85 of the drive thyristor S will be in a reverse bias state, so it is difficult for current to flow from the n cathode layer 85 of the drive thyristor S to the p anode layer 83 of the light-emitting diode LED. The tunnel junction layer 84 is a junction of a p ++ layer with a high concentration of p-type impurities on the p anode layer 83 side of the light-emitting diode LED and an n ++ layer with a high concentration of n-type impurities on the n cathode layer 85 side of the drive thyristor S. In the tunnel junction layer 84, since the width of the depletion region is narrow, electrons tunnel from the conduction band on the n ++ layer side to the valence band on the p ++ layer side in the reverse bias state. Therefore, it becomes easier for current to flow from the n cathode layer 85 of the drive thyristor S to the p anode layer 83 of the light-emitting diode LED.

[0095] And a p ohmic electrode 321 that makes an ohmic contact with the p anode layer 88 is formed on the p anode layer 88. The p ohmic electrode 321 is connected to the light-emitting electrode 72 through a through-hole formed in the insulating layer 89. Furthermore, an n gate electrode 331 that makes an ohmic contact with the n gate layer 87 exposed by removing a part of the p anode layer 88 by etching is formed. The n gate electrode 331 reduces the resistance of the exposed n gate layer 87. Note that the light-emitting electrode 72 and the n-gate electrode 331 are insulated from each other via an insulating layer 89.

[0096] As shown in FIG. 11(a), between the light-emitting apertures 341 of the light-emitting diodes LED1 and LED2 adjacent to each other with the n-gate electrode 331 interposed therebetween, the n-cathode layer 81, the light-emitting layer 82, the p-anode layer 83, the tunnel junction layer 84, the n-cathode layer 85, the p-gate layer 86, the n-gate layer 87, and the p-anode layer 88 that constitute the light-emitting diode LED and the drive thyristor S are continuous.

[0097] As shown in FIG. 11(b), the light-emitting apertures 341 of the light-emitting diodes LED3 and LED4 are adjacent to each other with a hole 342 interposed therebetween. The hole 342 is formed by removing the p-anode layer 88, the n-gate layer 87, the p-gate layer 86, the n-cathode layer 85, the tunnel junction layer 84, the p-anode layer 83, the light-emitting layer 82, and the n-cathode layer 81. Then, by oxidizing the current constriction layer included in the p-anode layer 83 through the hole 342, a current blocking portion β where current hardly flows is formed in a portion close to the hole 342. On the other hand, a portion far from the hole 342 remains without being oxidized. That is, the unoxidized portion becomes a current passage portion α where current flows. A plurality of holes 342 are provided at positions surrounding the light-emitting aperture 341 around the light-emitting aperture 341. Therefore, the current passage portion α is formed to be nearly circular. The light-emitting aperture 341 is provided corresponding to this current passage portion α. From this, even if the n-cathode layer 81, the p-anode layer 83, and the light-emitting layer 82 are continuously provided in the light-emitting portion 22, a light-emitting diode LED is constituted for each light-emitting aperture 341.

[0098] On the other hand, as shown in FIG. 9(a), the n-cathode layer 85, the p-gate layer 86, the n-gate layer 87, and the p-anode layer 88 that constitute the drive thyristor S are continuous between the light-emitting diodes LED. Therefore, the drive thyristor S operates for each light-emitting portion 22. Even if one drive thyristor S is provided for a plurality of light-emitting diodes LED in the light-emitting portion 22, it may be.

[0099] Between the light-emitting portions 22, that is, between the islands 301, the p-anode layer 88, n-gate layer 87, p-gate layer 86, n-cathode layer 85, tunnel junction layer 84, p-anode layer 83, light-emitting layer 82, and n-cathode layer 81 are removed, similar to the right end portions in FIGS. 8(a) and 8(b). That is, the p-anode layer 83, light-emitting layer 82, and n-cathode layer 81 that constitute the light-emitting portion 22 and the p-anode layer 88, n-gate layer 87, p-gate layer 86, and n-cathode layer 85 that constitute the drive thyristor S are discontinuous between the islands 301. Therefore, the light emission of each light-emitting portion 22 is controlled individually.

[0100] <Structure of the permission circuit 27> Each permission circuit 27 is composed of islands 303 and 304 that are separated from each other by being removed by etching up to the tunnel junction layer 84 within the semiconductor layer laminate. Note that the islands 303 corresponding to the permission circuits 27-1, 27-2,... are denoted as islands 303-1, 303-2,... and the island 304 is denoted as islands 304-1, 304-2,....

[0101] FIG. 12 is a plan view of the permission circuit 27. FIG. 12 shows the permission circuit 27-1 (islands 303-1, 304-1) in the light-emitting device 4 shown in FIG. 5. The islands 303-1 and 304-1 are denoted as islands 303 and 304 for explanation. The x-direction, y-direction, and z-direction are the same as in FIG. 5. Note that the wiring 25, reference voltage line 73, power supply voltage line 74, and connection line 75 are shown by broken lines, and the through holes provided in the insulating layer 89 for connecting to these wirings are shown by circles.

[0102] In the permission circuit 27, the power supply voltage line 74 and the reference voltage line 73 are provided in parallel in the y-direction (see FIG. 5). The power supply voltage VLD is supplied to the power supply voltage line 74, and the reference voltage Vga (0 V) is supplied to the reference voltage line 73. Although not shown, the reference voltage line 73 is connected to the reference voltage terminal 28 by an island similar to the island 302.

[0103] Island 303 extends in the x direction from the reference voltage line 73 side, then bends in the -y direction and is provided in the -x direction. That is, island 303 is provided in a C shape with its left and right reversed. The island 303 is provided with a light emission permission thyristor F and an npn bipolar transistor Tr.

[0104] The light emission permission thyristor F has a region 312 formed by the p anode layer 88 as the p anode. The p ohmic electrode 322 provided on the region 312 formed by the p anode layer 88 is connected to the signal terminal 24 (here, signal terminal 24-1) through a through hole provided in the insulating layer 89. On the -x direction side of the light emission permission thyristor F, an n gate electrode 334 is provided on the exposed n gate layer 87. At the end of the n gate electrode 334 on the -x direction side, it is connected to the reference voltage line 73.

[0105] The npn bipolar transistor Tr is provided on the -y direction side of the light emission permission thyristor F. The n gate layer 87 on the light emission permission thyristor F side serves as the emitter ([E]), and the n gate layer 87 on the -y direction side of the light emission permission thyristor F serves as the collector ([C]). And between the emitter ([E]) and the collector ([C]), the p gate layer 86 is exposed. The exposed p gate layer 86 serves as the base ([B]). An n gate electrode 335 is provided on the n gate layer 87 on the collector ([C]) side. On the other hand, an n gate electrode 336 is provided on the n gate layer 87 extending in the -x direction. The n gate electrode 336 is connected to the wiring 25 (here, wiring 25-1) through a through hole provided in the insulating layer 89. The n gate layer 87 between the n gate electrode 335 and the n gate electrode 336 serves as the resistor R1.

[0106] Resistor R2 is provided on island 304. The region 313 formed by the p-anode layer 88 of island 304 serves as resistor R2. p-ohmic electrodes 323 and 324 are provided at both ends of region 313 in the x direction. The p-ohmic electrode 323 on the x-direction side and the n-gate electrode 335 of island 303 are connected by connection line 75 through a through-hole provided in insulating layer 89. The p-ohmic electrode on the -x direction side is connected to power supply voltage line 74 through a through-hole provided in insulating layer 89, together with the n-gate electrode 337 provided on the exposed n-gate layer 87 of island 304.

[0107] Figure 13 is a cross-sectional view of the permission circuit 27. Figure 13(a) is a cross-sectional view taken along line XIIIA-XIIIA' of Figure 12, and Figure 13(b) is a cross-sectional view taken along line XIIIB-XIIIB' of Figure 12. In Figure 13(a), the right direction on the paper surface is the y direction, the surface direction of the paper is the x direction, and the upward direction of the paper is the z direction.

[0108] As shown in Figure 13(a), the light emission permission thyristor F has the n-cathode layer 85 on the tunnel junction layer 84 as the cathode ([K]), the p-gate layer 86 as the p-gate ([G2]), the n-gate layer 87 as the n-gate ([G1]), and the p a node layer 88 is configured as the p-anode ([A]). The npn bipolar transistor Tr is formed by etching so that the p-gate layer 86 is exposed. The npn bipolar transistor Tr is configured with the n-gate layer 87 as the emitter ([E]), the p-gate layer 86 as the base ([B]), and the n-gate layer 87 as the collector ([C]). That is, the n-gate layer 87, which is the n-gate ([G1]) of the light emission permission thyristor F, also serves as the emitter ([E]) of the npn bipolar transistor Tr. The p-gate layer 86, which is the p-gate ([G2]) of the light emission permission thyristor F, also serves as the base ([B]) of the npn bipolar transistor Tr.

[0109] As shown in FIG. 13(b), the n-gate electrode 334 on the n-gate layer 87 is connected to the reference voltage line 73. The n-gate ([G1]) of the light-emission permission thyristor F and the emitter ([E]) of the npn bipolar transistor Tr are set to 0V by the reference voltage line 73 to which the reference voltage Vga (0V) is supplied. Although not shown, the p-anode layer 83, which is the anode of the light-emitting diode LED of the permission circuit 27 (light-emission permission unit 26), is connected to the reference voltage Vga (0V).

[0110] FIG. 14 is another cross-sectional view of the permission circuit 27. FIG. 14(a) is a cross-sectional view taken along line XIVA-XIVA' of FIG. 12, and FIG. 14(b) is a cross-sectional view taken along line XIVB-XIVB' of FIG. 12. In FIG. 14(a), the right direction on the paper surface is the y direction, the surface direction of the paper is the x direction, and the upward direction of the paper is the z direction.

[0111] As shown in FIG. 14(a), the n-gate layer 87 between the n-gate electrodes 335 and 336 provided in the n-gate layer 87 is the resistor R1. As shown in FIG. 14(b), the p-anode layer 88 and the n-gate layer 87 between the p-ohmic electrodes 323 and 324 provided in the p-anode layer 88 are the resistor R2.

[0112] (Configuration of the semiconductor layer stack) The n-cathode layer 81, the light-emitting layer 82, and the p-anode layer 83 are semiconductor layers constituting the light-emitting diode LED, and the n-cathode layer 85, the p-gate layer 86, the n-gate layer 87, and the p-anode layer 88 are semiconductor layers constituting the drive thyristor S and the permission circuit 27. The following will be described in order.

[0113] <Substrate 80> The substrate 80 is described by taking n-type GaAs as an example, but it may also be p-type GaAs, intrinsic (i) GaAs without added impurities. Further, it may be InP, GaN, InAs, other III-V group, II-VI semiconductor substrates, sapphire, Si, Ge, etc. When the substrate is changed, the material monolithically laminated on the substrate uses a material that is substantially matched to the lattice constant of the substrate (including strained structures, strain relaxation layers, metamorphic growth). As an example, on an InAs substrate, InAs, InAsSb, GaInAsSb, etc. are used, on an InP substrate, InP, InGaAsP, etc. are used, on a GaN substrate or a sapphire substrate, GaN, AlGaN, InGaN are used, and on a Si substrate, Si, SiGe, GaP, etc. are used. However, when the substrate 80 is electrically insulating, it is necessary to separately provide an electrode for supplying a voltage to the n cathode layer 81. Further, when the semiconductor layer laminate excluding the substrate 80 is attached to another support substrate and the semiconductor layer laminate is provided on the other support substrate, it is not necessary for the support substrate to match the lattice constant.

[0114] <Semiconductor layers constituting the light-emitting diode LED> Here, the light-emitting diode LED is described as a VCSEL. The n cathode layer 81 constitutes an n-type bottom distributed Bragg reflector (DBR) in which AlGaAs layers with different Al compositions are alternately stacked. The light-emitting layer 82 is configured as an active region including a quantum well layer sandwiched between an upper spacer layer and a lower spacer layer. And the p anode layer 83 is configured as an upper distributed Bragg reflector in which AlGaAs layers with different Al compositions are alternately stacked. Hereinafter, the distributed Bragg reflector is denoted as DBR. The light output of one VCSEL is 4 mW to 8 mW, which is high compared to other laser diodes.

[0115] The n-type bottom DBR constituting the n cathode layer 81 is configured as a laminate in which an Al 0.9 Ga 0.1 As layer and a GaAs layer are paired. Each layer of the bottom DBR has a thickness of λ / 4n r(However, λ is the oscillation wavelength, and n r is the refractive index of the medium), and they are alternately stacked 40 cycles. As the carrier, silicon (Si), which is an n-type impurity, is doped. The carrier concentration is, for example, 3×10 18 cm -3 . The lower spacer layer constituting the light-emitting layer 82 is an undoped Al 0.6 Ga 0.4 As layer. The quantum well active layer is an undoped InGaAs quantum well layer and an undoped GaAs barrier layer. The upper spacer layer is an undoped Al 0.6 Ga 0.4 As layer. The p-type upper DBR constituting the p anode layer 83 is configured as a laminate in which a p-type Al 0.9 Ga 0.1 As layer and a GaAs layer are paired. Each layer of the upper DBR has a thickness of λ / 4n r and is alternately stacked 29 cycles. As the carrier, carbon (C), which is a p-type impurity, is doped. The carrier concentration is, for example, 3×10 18 cm -3 . A p-type AlAs current confinement layer is provided in the lowermost layer or inside the upper DBR 208.

[0116] p-type AlAs has a faster oxidation rate than AlGaAs, and the oxidation region is oxidized inward from the side surface of the hole 342. When Al is oxidized to form Al2O3, the electrical resistance increases, and the current blocking portion β is formed. As the current confinement layer, any material in which Al is oxidized to form Al2O3 as long as the Al impurity concentration is high in p-type AlGaA s na can be used. The current blocking portion β may be formed by implanting hydrogen ions (H + ) into a semiconductor layer such as AlGaAs (H + ion implantation).

[0117] <Tunnel junction layer 84> The tunnel junction layer 84 is a p ++layer and an n layer with a high concentration of n-type impurities added ++ layer. The n ++ layer and the p ++ layer have, for example, an impurity concentration of 1×10 20 / cm 3 and are at a high concentration. Note that the impurity concentration of a normal junction is in the range of 10 17 / cm 3 to 10 18 / cm 3 range. The combination of the p ++ layer and the n ++ layer (hereinafter referred to as the p ++ layer / n ++ layer.) includes, for example, p ++ GaAs / n ++ GaInP, p ++ AlGaAs / n ++ GaInP, p ++ GaAs / n ++ GaAs, p ++ AlGaAs / n ++ AlGaAs, p ++ InGaAs / n ++ InGaAs, p ++ GaInAsP / n ++ GaInAsP, p ++ GaAsSb / n ++ GaAsSb. Note that combinations with each other may also be used.

[0118] <Semiconductor Layers Constituting Drive SCR S and Permission Circuit 27> The n cathode layer 85 is, for example, n-type Al 18 / cm 3 GaAs with an impurity concentration of 1×10 0.9 . The Al composition may be changed within the range of 0 to 1. The p gate layer 86 is, for example, p-type Al 17 / cm 3 GaAs with an impurity concentration of 1×10 0.9 . The Al composition may be changed within the range of 0 to 1. The n gate layer 87 is, for example, n-type Al 17 / cm 3 GaAs with an impurity concentration of 1×10 0.9It is GaAs. The Al composition may be changed within the range of 0 to 1. The p anode layer 88 is, for example, p-type Al 18 / cm 3 GaAs with an impurity concentration of 1×10 0.9 It is GaAs. The Al composition may be changed within the range of 0 to 1.

[0119] <Manufacturing method of the light-emitting device 4> The light-emitting device 4 is manufactured as follows. On the substrate 80, an n cathode layer 81, a light-emitting layer 82, a p anode layer 83, a tunnel junction layer 84, an n cathode layer 85, a p gate layer 86, an n gate layer 87, and a p anode layer 88 are laminated in sequence. Next, the p anode layer 88, the n gate layer 87, the p gate layer 86, the n cathode layer 85, the tunnel junction layer 84, the p anode layer 83, the light-emitting layer 82, and the n cathode layer 81 are etched to form portions for separating between the light-emitting portions 22 and the light-emission permission portions 26 and holes 342.

[0120] Then, in an oxidizing atmosphere, the current constriction layer in the p anode layer 83 is oxidized from the side surface of the hole 342 to form a current blocking portion β.

[0121] Furthermore, a part of the p anode layer 88 is etched to expose the surface of the n gate layer 87. Then, p ohmic electrodes 321 and 322 are formed on the p anode layer 88, and n gate electrodes 331, 332, 333, 334, 335, 336, and 337 that are in ohmic contact with the n gate layer 87 are formed on the n gate layer 87. Note that the p ohmic electrodes 321 and 322 are composed of, for example, Au (AuZn) containing Zn that is in ohmic contact with p-type AlGaAs. The n gate electrodes 331, 332, 333, 334, 335, 336, and 337 are composed of, for example, Au (AuGe) containing Ge that is in ohmic contact with n-type AlGaAs.

[0122] Etch the insulating layer 89, p-anode layer 88, n-gate layer 87, p-gate layer 86, n-cathode layer 85, and tunnel junction layer 84 to form the light-emitting opening 341 and the islands 303 and 304. Next, form the insulating layer 89 on the front surface. And the insulating layer 89 is, for example, SiO2, SiN, etc. Then, form a through-hole in the insulating layer 89 of the portion of the p-ohmic electrode 321, and form the light-emitting electrode 72, the reference voltage line 73, the power supply voltage line 74, the connection line 75, and the signal terminal 24.

[0123] As described above, if the light-emitting diode LED and the driving thyristor S are stacked, the light emission of the light-emitting diode LED is controlled by shifting the driving thyristor S from the off state to the on state. That is, compared with the case where the light-emitting diode LED and the driving thyristor S are not stacked, the control of the light emission of the light-emitting diode LED becomes easier.

[0124] In the present embodiment, as an example of the light-emitting element, a light-emitting diode LED and a driving thyristor S connected in series are provided on the substrate 80 in this order. The driving thyristor S and the light-emitting diode LED may be stacked on the substrate 80 in this order. Also, in the present embodiment, the n-type substrate 80 is used, but a light-emitting device 4 with the opposite polarity may be configured as a p-type substrate. At this time, the light-emitting diode LED and the driving thyristor S connected in series may be provided on the substrate 80 in this order, or the driving thyristor S and the light-emitting diode LED may be stacked in this order.

[0125] Furthermore, in the present embodiment, the light-emitting diode LED and the driving thyristor S connected in series are taken as an example of the light-emitting element, but the driving thyristor may have a function of emitting light without using the light-emitting diode LED.

[0126] In this embodiment, the light-emitting unit 22 is configured such that the light-emitting elements (light-emitting diodes LED in this embodiment) of the same light-emitting unit 22 are adjacent to each other. By doing so, the configuration of the light-emitting unit 22 becomes easier. However, it is not necessary for the light-emitting elements to be arranged in a solid manner, and the light-emitting elements connected to the same signal terminal 24 of the terminal unit 23 may be regarded as one light-emitting unit 22.

[0127] In this embodiment, an example in which the light-emitting device 4 is utilized together with the 3D sensor 5 is shown, but it is not limited thereto. It may be applied to a light-emitting device used for optical transmission, and in that case, it may be combined with an optical transmission path. The light emission permitted by the permission signal φf may be put into the same optical transmission path or different optical transmission paths.

Explanation of Reference Numerals

[0128] 1... Information processing device, 2... User interface (UI) unit, 3... Optical device, 4, 4′... Light-emitting device, 5... Three-dimensional sensor (3D sensor), 6... Driving unit, 7... Permission signal generation unit, 8... Measurement control unit, 8A... 3D shape identification unit, 9... System control unit, 9A... Recognition processing unit, 10... Wiring board, 21... Light output unit, 22, 22-1 to 22-12... Light-emitting unit, 23... Terminal unit, 24, 24-1 to 24-12... Signal terminal, 25, 25-1 to 25-4... Wiring, 27, 27-1 to 27-12... Permission circuit, 28... Reference voltage terminal, 30... Light diffusion member, 40... Holding unit, 61... MOS transistor, 62... Signal generation circuit, 71... Reference voltage line, 72... Light-emitting electrode, 72A, 72B... Pad portion, 73... Reference voltage line, 74... Power supply voltage line, 75... Connection line, 80... n-type substrate, 81... n-type cathode layer (n cathode layer), 82... Light-emitting layer, 83... p-type anode layer (p anode layer), 84... Tunnel junction layer, 85... n-type cathode layer (n cathode layer), 86... p-type gate layer (p gate layer), 87... n-type gate layer (n gate layer), 88... p-type anode layer (p anode layer), 89... Insulating layer, 90... Back surface electrode, 100... Irradiation region, 341... Light output port, 342... Hole (trench), φf, φf1 to φf12... Permission signal, F... Light emission permission thyristor, LED... Light-emitting diode, S... Driving thyristor, Tr... npn bipolar transistor, VLD... Power supply voltage, Vd... Forward voltage (diffusion potential)

Claims

1. A light-emitting unit including a light-emitting element having a thyristor function; A light-emitting electrode to which a first voltage is applied for light emission to the light-emitting unit; A light-emission permission thyristor that is lower than the first voltage, is set regardless of the first voltage, and permits light emission of the light-emitting element by a second voltage; A substrate on which the light-emitting unit and the light-emission permission thyristor are provided in common; and The light-emitting unit is composed of one or a plurality of the light-emitting elements, The light-emission permission thyristor is provided for each of the plurality of light-emitting units, On the substrate, the light-emission permission thyristor is provided between a member that supplies the second voltage provided outside the substrate and the light-emitting unit. A light-emitting device.

2. Each of the plurality of light-emission permission thyristors provided for each of the plurality of light-emitting units includes a terminal portion that supplies the second voltage, The substrate has a first side surface and a second side surface that face each other, and a third side surface and a fourth side surface that face each other and connect the first side surface and the second side surface, The member that supplies the second voltage is provided on the first side surface side, The light-emitting device according to claim 1, wherein the terminal portion is provided on either one or both of the first side surface side of the substrate and a portion where the light-emission permission thyristors are provided on the third side surface side and the fourth side surface side of the substrate.

3. Further including another terminal portion that supplies a reference voltage, The light-emitting device according to claim 2, wherein the other terminal portion is provided on the substrate.

4. The light-emitting device according to claim 1, wherein the light-emitting element includes a surface-emitting diode and a driving thyristor that is laminated on the surface-emitting diode and causes the surface-emitting diode to emit light when turned on.

5. Including a bipolar transistor connected to the light-emission permission thyristor, The bipolar transistor is connected to the driving thyristor, and when the light-emission permission thyristor is turned on, the bipolar transistor is turned on so that the driving thyristor can be shifted to the on state. The light-emitting device according to claim 4.

6. The light-emitting device according to claim 4 or 5, wherein the surface-emitting diode is a vertical cavity surface emitting laser.

7. The light-emitting device according to claim 1, further comprising a supply electrode that is electrically connected to the light-emitting electrode and supplies a power supply voltage to the light-emission permission thyristor.

8. A light-emitting device according to any one of claims 1 to 7, a three-dimensional sensor that receives reflected light from a measurement object irradiated with light emitted from the light-emitting device, and a measurement device comprising the same.

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