Electrostatic chuck

Abstract

Provided is an electrostatic chuck capable of suppressing variations in the in-plane temperature distribution of a substrate during processing. 【Solution means】The electrostatic chuck 10 includes a dielectric substrate 100, a suction electrode 130 provided inside the dielectric substrate 100, and an RF electrode 140 provided inside the dielectric substrate 100. In a top view, the RF electrode 140 is provided in a range where the outer peripheral side end portion thereof is located inside the outer peripheral side end portion of the suction electrode 130.

Description

Technical Field

[0001] The present invention relates to an electrostatic chuck.

Background Art

[0002] For example, in a semiconductor manufacturing apparatus such as an etching apparatus, an electrostatic chuck is provided as a device for adsorbing and holding a substrate such as a silicon wafer to be processed. The electrostatic chuck includes a dielectric substrate provided with an adsorption electrode and a base plate for supporting the dielectric substrate, and these are joined to each other. When a voltage is applied to the adsorption electrode, an electrostatic force is generated, and the substrate placed on the dielectric substrate is adsorbed and held. The adsorption electrode may be formed on the surface of the dielectric substrate on the base plate side, but is often provided inside the dielectric substrate.

[0003] As described in Patent Document 1 below, an RF electrode may be incorporated inside the dielectric substrate in addition to the adsorption electrode. The RF electrode functions as one of a pair of opposing electrodes for generating plasma in a semiconductor manufacturing apparatus.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] When a process such as etching is performed on the substrate, Joule heat is generated in the RF electrode, which may increase the temperature of the surrounding members. That is, the RF electrode can be a heat source during processing. Conventionally, no specific consideration has been given to how to arrange the RF electrode, which is a heat source, in order to suppress the variation in the in-plane temperature distribution of the substrate during processing.

[0006] The present invention has been made in view of such problems, and an object thereof is to provide an electrostatic chuck capable of suppressing variations in the in-plane temperature distribution of a substrate during processing.

Means for Solving the Problems

[0007] In order to solve the above problems, the electrostatic chuck according to the present invention includes a dielectric substrate having a mounting surface on which an object to be adsorbed is placed, an adsorption electrode provided inside the dielectric substrate, and an RF electrode provided inside the dielectric substrate. When viewed from a direction perpendicular to the mounting surface, the RF electrode is provided in a range where the outer peripheral side end portion thereof is inside the outer peripheral side end portion of the adsorption electrode.

[0008] During processing such as etching, it is known that the temperature of the outer peripheral side portion of the substrate tends to be high. Therefore, in the electrostatic chuck having the above configuration, by housing the RF electrode, which is a heat source, in a range where the outer peripheral side end portion thereof is inside the outer peripheral side end portion of the adsorption electrode, it is possible to suppress the temperature rise in the outer peripheral side portion of the substrate. Thereby, it is possible to suppress variations in the in-plane temperature distribution of the substrate during processing more than before.

Effects of the Invention

[0009] According to the present invention, it is possible to provide an electrostatic chuck capable of suppressing variations in the in-plane temperature distribution of a substrate during processing.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Modes for Carrying Out the Invention

[0011] Hereinafter, this embodiment will be described with reference to the accompanying drawings. To facilitate understanding of the description, the same reference numerals are given to the same components in each drawing as much as possible, and redundant descriptions are omitted.

[0012] The electrostatic chuck 10 according to this embodiment adsorbs and holds a substrate W to be processed by electrostatic force inside a semiconductor manufacturing apparatus (not shown) such as an etching apparatus. The substrate W to be adsorbed is, for example, a silicon wafer. The electrostatic chuck 10 may be used in an apparatus other than a semiconductor manufacturing apparatus.

[0013] FIG. 1 schematically shows a cross-sectional view of the configuration of the electrostatic chuck 10 in a state where the substrate W is adsorbed and held. The electrostatic chuck 10 includes a dielectric substrate 100 and a base plate 200.

[0014] The dielectric substrate 100 is a substantially disk-shaped member made of a ceramic sintered body. The dielectric substrate 100 contains, for example, high-purity aluminum oxide (Al2O3), but may contain other materials. The purity, type, additives, etc. of the ceramics in the dielectric substrate 100 can be appropriately set in consideration of the plasma resistance required for the dielectric substrate 100 in a semiconductor manufacturing apparatus. The diameter of the dielectric substrate 100 is, for example, 290 to 300 mm. The thickness of the dielectric substrate 100 is, for example, 0.5 to 3.0 mm.

[0015] The upper surface 110 of the dielectric substrate 100 in FIG. 1 is the "mounting surface" on which the substrate W is mounted. Also, the lower surface 120 of the dielectric substrate 100 in FIG. 1 is the "surface to be joined" that is joined to the base plate 200 via the joining layer 300. The direction along the direction perpendicular to the surface 110 and the viewpoint when viewing the electrostatic chuck 10 from the surface 110 side will also be referred to as "top view" hereinafter.

[0016] An adsorption electrode 130 is embedded inside the dielectric substrate 100. The adsorption electrode 130 is a thin flat plate-shaped layer formed of a metal material such as tungsten, for example, and is arranged parallel to the surface 110. As the material of the adsorption electrode 130, in addition to tungsten, molybdenum, platinum, palladium, etc. may also be used. When a voltage is applied to the adsorption electrode 130 from the outside through a power supply path (not shown), an electrostatic force is generated between the surface 110 and the substrate W, whereby the substrate W is adsorbed and held. As the configuration of the above power supply path, various known configurations can be adopted. The adsorption electrode 130 may be provided only one as a so-called "unipolar" electrode as in this embodiment, or may be provided two as a so-called "bipolar" electrode. The depth of the position where the adsorption electrode 130 is arranged, that is, the distance from the bottom surface 116 (described later) to the adsorption electrode 130 is, for example, 0.1 to 0.5 mm.

[0017] Inside the dielectric substrate 100, in addition to the above adsorption electrode 130, an RF electrode 140 is also embedded. The RF electrode 140 is provided as one of a pair of opposing electrodes for generating plasma in a semiconductor manufacturing apparatus. The other of the opposing electrodes is provided at a position above the electrostatic chuck 10 in the semiconductor manufacturing apparatus. When a high-frequency alternating voltage is applied between these opposing electrodes, plasma is generated above the substrate W and is used for processes such as film formation and etching on the substrate W.

[0018] The RF electrode 140 is a thin flat plate-like layer formed of a metal material such as tungsten, similar to the adsorption electrode 130. As the material of the RF electrode 140, in addition to tungsten, molybdenum, platinum, palladium, etc. may also be used. The RF electrode 140 is embedded at a position closer to the surface 120 side than the adsorption electrode 130. The RF electrode 140 is arranged parallel to the surface 110, similar to the adsorption electrode 130. The RF electrode 140 is a single electrode that is substantially circular in a top view. The center of the RF electrode 140 in the top view coincides with the center of the dielectric substrate 100. The distance from the adsorption electrode 130 to the RF electrode 140 is, for example, 0.2 to 2 mm. The distance from the RF electrode 140 to the surface 120 is, for example, 0.1 to 2.5 mm.

[0019] As shown in FIG. 1, a space SP is formed between the dielectric substrate 100 and the substrate W. When processes such as etching are performed in the semiconductor manufacturing apparatus, helium gas for temperature adjustment is supplied from the outside to the space SP through a gas hole (not shown). By interposing helium gas between the dielectric substrate 100 and the substrate W, the thermal resistance between the two is adjusted, and thereby the temperature of the substrate W is maintained at an appropriate temperature. Note that the gas for temperature adjustment supplied to the space SP may be a gas of a type different from helium.

[0020] A seal ring 111 and dots 112 are provided on the surface 110 which is the placement surface, and the above-mentioned space SP is formed around these.

[0021] The seal ring 111 is a wall that partitions the space SP at the outermost peripheral position. The seal ring 111 is an annular protrusion formed on the surface 110 side. The tip (the upper end in FIG. 1) of the seal ring 111 is a part of the surface 110 and abuts on the substrate W. The tip of the seal ring 111 can be said to be the outermost peripheral portion of the surface 110 which is the placement surface.

[0022] A plurality of seal rings 111 may be provided so as to divide the space SP. With such a configuration, it becomes possible to individually adjust the pressure of the helium gas in each space SP and to make the surface temperature distribution of the substrate W during processing closer to uniform.

[0023] In FIG. 1, the portion marked with the reference numeral "116" is the bottom surface of the space SP. Hereinafter, this portion will also be referred to as the "bottom surface 116". The seal ring 111 is formed as a result of digging down a part of the surface 110 to the position of the bottom surface 116 together with the dots 112 described below.

[0024] The dots 112 are circular protrusions protruding from the bottom surface 116. A plurality of dots 112 are provided and are arranged substantially evenly and dispersedly on the mounting surface of the dielectric substrate 100. The tip of each dot 112 forms a part of the surface 110 and abuts against the substrate W. By providing a plurality of such dots 112, the deflection of the substrate W is suppressed.

[0025] The base plate 200 is a substantially disk-shaped member that supports the dielectric substrate 100. The base plate 200 is formed of a metal material such as aluminum, for example. The base plate 200 is joined to the surface 120 of the dielectric substrate 100 via a joining layer 300. Among the base plate 200, the upper surface 210 in FIG. 1 is a "surface to be joined" that is joined to the dielectric substrate 100.

[0026] The joining layer 300 is a layer provided between the dielectric substrate 100 and the base plate 200 and joins the two. The joining layer 300 is obtained by curing an adhesive made of an insulating material. In the present embodiment, a silicone adhesive is used as the adhesive. However, the joining layer 300 may be obtained by curing another type of adhesive. In any case, as the material of the joining layer 300, it is preferable to use a material having as high a thermal conductivity as possible so that the thermal resistance between the dielectric substrate 100 and the base plate 200 is reduced.

[0027] An insulating film may be formed on the surface of the base plate 200. As the insulating film, for example, an alumina film formed by spraying can be used. By covering the surface of the base plate 200 with the insulating film, the dielectric breakdown voltage of the base plate 200 can be increased.

[0028] The base plate 200 has a support portion 201 and a flange portion 202. The support portion 201 is an upper portion of the base plate 200 in FIG. 1, and is a substantially cylindrical portion that directly supports the dielectric substrate 100 from below. The diameter of the support portion 201, that is, the diameter of the surface 210, may be the same as the diameter of the dielectric substrate 100, or may be slightly smaller than the diameter of the dielectric substrate 100. The diameter of the support portion 201 is, for example, 290 to 300 mm. Also, the thickness of the support portion 201, that is, the protruding amount of the support portion 201 toward the upper side in FIG. 1 (the protruding amount from the flange portion 202) is, for example, 3 to 15 mm.

[0029] The flange portion 202 is a lower portion of the base plate 200 in FIG. 1. The shape of the flange portion 202 is substantially cylindrical, and its central axis coincides with the central axis of the support portion 201. The diameter of the flange portion 202 is larger than the diameter of the support portion 201. The protruding amount of the flange portion 202 from the outer surface of the support portion 201 (that is, the protruding amount in the radial direction) is, for example, 20 to 30 mm. The thickness of the flange portion 202 is, for example, 25 to 40 mm. The overall thickness of the base plate 200 including the support portion 201 and the flange portion 202 is, for example, 30 to 40 mm.

[0030] When the substrate W is processed in the semiconductor manufacturing apparatus, a focus ring (not shown) is installed on the upper surface 203 of the flange portion 202. The focus ring is an annular and plate-like member formed of an insulating material such as quartz, and is installed for the purpose of adjusting the plasma distribution during processing. Substantially the entire dielectric substrate 100 and the support portion 201 are surrounded from the outer peripheral side by the focus ring.

[0031] Inside the base plate 200, a refrigerant flow path 250 for passing refrigerant is formed. When a process such as etching is performed in the semiconductor manufacturing apparatus, refrigerant is supplied from the outside to the refrigerant flow path 250, and thereby the base plate 200 is cooled. The heat generated in the substrate W during the process is transmitted to the refrigerant through the helium gas in the space SP, the dielectric substrate 100, and the base plate 200, and is discharged to the outside together with the refrigerant.

[0032] Incidentally, it is known that during a process such as etching, the temperature of the outer peripheral side portion of the substrate W tends to be high. Therefore, in the electrostatic chuck 10 of the present embodiment, various improvements described below are made to suppress the above-described local temperature rise and make the in-plane temperature distribution of the substrate W during the process as uniform as possible.

[0033] As shown in FIG. 1, the refrigerant flow path 250 is routed not only in the portion of the base plate 200 directly below the substrate W but also in the portion outside the portion directly below the substrate W. The refrigerant passing through the outer portion cools a focus ring (not shown) directly above the upper surface 203, and the outer peripheral side portion of the substrate W is also cooled through these.

[0034] In the present embodiment, the diameter of the flange portion 202 is relatively large. By enlarging the flange portion 202 and forming the refrigerant flow path 250 so as to extend over substantially the entire thereof and circulating the refrigerant, it is possible to suppress the temperature rise of the outer peripheral side portion of the substrate W.

[0035] FIG. 2 shows in an enlarged and detailed manner the configuration of the outer peripheral side end portion of the dielectric substrate 100 and the vicinity thereof in the electrostatic chuck 10 of FIG. 1. The dotted line DL1 shown in FIG. 2 represents the position of the outer peripheral side end portion of the adsorption electrode 130. The dotted line DL2 represents the position of the outer peripheral side end portion of the RF electrode 140. Incidentally, the “outer peripheral side end portion” of the adsorption electrode 130 refers to the portion where the smallest circle among the circles including the entire adsorption electrode 130 in a top view overlaps with the adsorption electrode 130. The “outer peripheral side end portion” of the RF electrode 140 is defined in the same manner.

[0036] In order to prevent dielectric breakdown, it is preferable to ensure a distance of about 0.1 mm to 3 mm from the outer peripheral side end portion (dotted line DL1) of the adsorption electrode 130 to the outer surface of the dielectric substrate 100. Further, it is preferable to ensure a distance of about 0.1 mm to 5 mm from the outer peripheral side end portion (dotted line DL2) of the RF electrode 140 to the outer surface of the dielectric substrate 100. Within the range satisfying the above conditions, it is preferable that the diameter of the outer peripheral side end portion of the RF electrode 140 is smaller than the diameter of the outer peripheral side end portion of the adsorption electrode 130. In other words, it is preferable that the RF electrode 140 is provided in a range where its outer peripheral side end portion (dotted line DL1) is inside the outer peripheral side end portion (dotted line DL2) of the adsorption electrode 130 in a top view.

[0037] When the substrate W is being processed, Joule heat may be generated in the RF electrode 140, which may increase the temperature of the surrounding members. That is, the RF electrode 140 can be a heat source during processing. Therefore, in the present embodiment, as described above, the RF electrode 140 is housed in a range where its outer peripheral side end portion is inside the outer peripheral side end portion of the adsorption electrode 130. By housing the RF electrode 140, which is a heat source, in the above range, it is possible to suppress the temperature rise in the outer peripheral portion of the substrate W. As a result, the variation in the in-plane temperature distribution of the substrate W during processing can be suppressed more than before.

[0038] The diameter of the outer peripheral side end portion of the adsorption electrode 130 is larger than the inner peripheral side diameter of the seal ring 111 and smaller than the outer peripheral side diameter of the seal ring 111. For this reason, in a top view, a part of the seal ring 111 overlaps with the adsorption electrode 130. When the seal ring 111 and the adsorption electrode 130 overlap each other in a top view, the adsorption force on the seal ring 111 increases, and the seal ring 111 and the substrate W adhere tightly with a strong force. As a result, the thermal resistance between the seal ring 111 and the substrate W decreases, so that the temperature rise of the substrate W directly above the seal ring 111 can be suppressed. As a result, the variation in the in-plane temperature distribution of the substrate W during processing can be further suppressed.

[0039] Further, the entire sealing ring 111, rather than a part thereof, may be configured to overlap the suction electrode 130 in a top view. In this case, the diameter of the outer peripheral side of the sealing ring 111 may be made smaller than the diameter of the dielectric substrate 100 and smaller than the diameter of the outer peripheral side end portion of the suction electrode 130.

[0040] As described above, the present embodiment has been described with reference to specific examples. However, the present disclosure is not limited to these specific examples. Those obtained by appropriately making design changes by those skilled in the art to these specific examples are also included in the scope of the present disclosure as long as they have the features of the present disclosure. Each element included in each of the above-described specific examples, and its arrangement, conditions, shape, etc. are not limited to those illustrated and can be changed as appropriate. Each element included in each of the above-described specific examples can be combined as appropriate as long as no technical contradiction occurs.

Description of Reference Numerals

[0041] 10: Electrostatic chuck 100: Dielectric substrate 110: Surface 111: Sealing ring 130: Suction electrode 140: RF electrode

Claims

1. A dielectric substrate having a mounting surface on which a silicon wafer is placed; an attraction electrode provided inside the dielectric substrate, the outer circumferential end of the attraction electrode being provided in a range inside the outer circumferential end of the mounting surface; an RF electrode provided inside the dielectric substrate, the RF electrode being provided in a range in which an outer peripheral end of the RF electrode is located inside an outer peripheral end of the mounting surface; When viewed from a direction perpendicular to the placement surface, The electrostatic chuck is characterized in that the RF electrode is provided in a range in which an outer circumferential end portion thereof is located inside an outer circumferential end portion of the attraction electrode.

2. a seal ring, which is an annular protrusion whose tip is a part of the mounting surface, is formed on the dielectric substrate; When viewed from a direction perpendicular to the placement surface, 2. The electrostatic chuck according to claim 1, wherein at least a portion of said seal ring overlaps with said attraction electrode.

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