Protection Circuit for Secondary Battery and Semiconductor Device

Abstract

To simplify the output of power source voltage by preparing separately a circuit for outputting at least two or more power sources because the power source voltage is different depending on the circuit used for a device.SOLUTION: A node in which a charge is held by electrically connecting a transistor using an oxide semiconductor and a capacitor (also called a capacitor element) is formed. A transistor in which a reset signal is applied to a gate of the transistor to switch from an off state to an on state, and the node is reset in the on state is provided. A circuit configuration that generates and uses a potential more than or equal to a potential of a simple power source can be realized.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a semiconductor device using an oxide semiconductor and a method for manufacturing the same. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, as a technical field of one aspect of the present invention disclosed in the present specification more specifically, semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, lighting devices, power storage devices, memory devices, imaging devices, methods of operating them, or methods of manufacturing them can be cited as an example.

[0002] Note that in the present specification, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices.

Background Art

[0003] Techniques for constructing transistors using metal oxides formed on a substrate have attracted attention. For example, techniques for using transistors using zinc oxide or In-Ga-Zn-based oxides as switching elements of pixels of display devices are disclosed in Patent Document 1 and Patent Document 2.

[0004] In addition, a storage device having a configuration in which a transistor having an extremely low off-current is used for a memory cell is disclosed in Patent Document 3.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0006] Depending on the circuit, the required power supply voltage is different. Therefore, in order to output at least two or more power supplies, it is necessary to separately prepare a circuit for outputting different voltages. Therefore, one of the problems is to unify the output of the power supply voltage. If this problem can be solved, the circuit configuration can be simplified, the number of terminals can be reduced, and the manufacturing cost can be reduced.

[0007] Another problem is to simplify the circuit. Another problem is to reduce the number of required elements and the required layout area.

[0008] Another problem is to provide a memory control method for writing data into a memory cell using a memory controller that controls a plurality of memory cells.

[0009] Another problem is to provide a memory system including a memory cell and a memory controller that suppresses circuit complexity, large area, and increase in power consumption.

Means for Solving the Problems

[0010] Provided is a circuit configuration that generates and uses a potential higher than the potential of a single power supply by adding a circuit element for generating capacitive coupling without using a level shifter or a voltage generation circuit (boosting circuit) and without causing circuit complexity.

[0011] A transistor using an oxide semiconductor and a capacitor (also called a capacitive element) are electrically connected to form a node for holding electric charge, and a reset signal is applied to the gate of the transistor to switch from an off state to an on state, and a transistor for resetting the node in the on state is provided.

[0012] Specifically, a circuit is configured using a first transistor, a second transistor, and a third transistor using an oxide semiconductor, a first capacitive element, and a second capacitive element.

[0013] The circuit configuration disclosed in this specification includes a first transistor and a second transistor electrically connected to a data line, a memory controller electrically connected to the gates of the first transistor and the second transistor, a third transistor that can be switched from an off state to an on state by a reset signal applied to the gate and resets the first node in the on state, and a first capacitor element and a second capacitor element connected in series. One of the source or drain of the second transistor is electrically connected to the data line, one of the source or drain of the third transistor is electrically connected to one electrode of the first capacitor element, the other electrode of the first capacitor element is electrically connected to one of the source or drain of the first transistor, one of the source or drain of the first capacitor element is electrically connected to one of the source or drain of the second transistor, the other electrode of the first capacitor element is electrically connected to one electrode of the second capacitor element, there is a second node between the first capacitor element and the second capacitor element, and the first node and the second node hold different potentials.

[0014] In the above configuration, the first capacitor element has a larger capacitance value than the second capacitor element. It is also one of the features that voltage regulation is possible by the second capacitor element.

[0015] Also, even if there is only one capacitive element, it can be configured as the circuit of the present invention. The configuration includes a first transistor, a second transistor, a third transistor, and a capacitive element. One of the source or drain of the first transistor is electrically connected to one of the source or drain of the second transistor. The other of the source or drain of the second transistor is electrically connected to one of the source or drain of the third transistor. One of the source or drain of the third transistor is electrically connected to one electrode of the capacitive element. The other electrode of the capacitive element is electrically connected to the other of the source or drain of the first transistor. One electrode of the capacitive element is electrically connected to the other of the source or drain of the second transistor. The reset line is electrically connected to the gate of the second transistor. The data line is electrically connected to one of the source or drain of the second transistor and also electrically connected to one of the source or drain of the third transistor. A node is formed at the connection point between the other electrode of the capacitive element and the other of the source or drain of the first transistor, which is a memory circuit.

[0016] For each of the above transistors, it is preferable to use, for example, a transistor (hereinafter referred to as an OS transistor) that uses a metal oxide for the channel formation region.

[0017] Specifically, it is preferable to apply an OS transistor to any one or all of the first transistor, the second transistor, and the third transistor.

[0018] In this specification and the like, the memory controller has a function of controlling one or more memory cell array units.

[0019] In this specification and the like, a node (also referred to as a potential holding node) refers to an element (such as wiring) that enables electrical connection of elements constituting a circuit. Therefore, a "node to which A is connected" refers to a wiring that is electrically connected to A and can be regarded as having the same potential as A. Even if one or more elements that enable electrical connection (such as switches, transistors, capacitive elements, inductors, resistive elements, diodes, etc.) are arranged between A and the node connected by the wiring, as long as they have the same potential as A, that wiring can be regarded as a node to which A is connected.

Effects of the Invention

[0020] Without using a level shifter or a voltage generation circuit (boosting circuit), different potentials can be applied to the gates of transistors in one circuit and the gates of transistors in another circuit, respectively. By adopting this circuit configuration, an increase in the circuit area can be suppressed, and power consumption can be reduced.

Brief Description of the Drawings

[0021]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

MODE FOR CARRYING OUT THE INVENTION

[0022] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, it is easily understood by those skilled in the art that the present invention is not limited to the following description, and its forms and details can be variously changed. Further, the present invention is not construed as being limited to the description of the embodiments shown below.

[0023] (Embodiment 1) In this embodiment, a memory circuit, which is an aspect of the present invention, will be described with reference to the drawings.

[0024] FIG. 1 shows a circuit configuration capable of writing different potentials to a first circuit 21 and a second circuit 22 respectively. The circuit configuration shown in FIG. 1 has at least transistors M1, M2, and M3 and is composed of two capacitive elements (capacitors) C0 and C1. Specifically, by capacitive coupling, a potential higher than the potential supplied from a single power source can be written to the second circuit 22. Note that the detailed driving method will be described in detail in Embodiment 2. Also, since the configuration of FIG. 1 can hold different potentials at potential holding nodes NC0 and NC1 respectively, a potential can be supplied to the first circuit 21 without separately providing a level shifter or a voltage generation circuit (boosting circuit).

[0025] FIG. 2 is shown as a comparative example. The circuit configuration shown in FIG. 2 is a configuration capable of holding an analog potential at a potential holding node NCa for a long time by using an OS transistor with a small off-leakage current for M1.

[0026] In FIG. 2, assuming a circuit driven by a single power source, since the maximum gate write potential of M1 is Vc, only Vc - Vth, which is lower by the threshold value, can be written to the potential holding node NCa. Therefore, with the circuit configuration shown in FIG. 2, a potential higher than Vc - Vth cannot be written. Thus, in order to write a potential higher than Vc - Vth, it is necessary to add a level shifter or a voltage generation circuit (boosting circuit) to the circuit configuration shown in FIG. 2, and in that case, there are drawbacks such as an increase in circuit area and an increase in power consumption.

[0027] Note that in the circuit configuration shown in FIG. 2, similar to M1, by using an OS transistor with a small off-leakage current for M2, it is possible to hold an analog potential at a potential holding node NCb for a long time. Similar to the potential holding node NCa, a potential higher than the potential supplied from a single power source cannot be written to the potential holding node NCb.

[0028] Thus, the circuit configuration of FIG. 1 can obtain an effect equivalent to or greater than that in the case where a level shifter or a voltage generation circuit (boosting circuit) is separately provided in FIG. 2, just by adding the transistor M3 as compared with FIG. 2.

[0029] (Embodiment 2) In the present embodiment, a memory circuit and a driving method thereof according to an aspect of the present invention will be described with reference to the drawings.

[0030] FIG. 3A shows an example of a memory circuit according to an aspect of the present invention, which is a configuration obtained by deleting the memory controller 23 and the first circuit 21 from the circuit shown in FIG. 1 of Embodiment 1 and generalizing it. FIG. 3A shows a memory circuit having a first transistor 101, a second transistor 102, a third transistor 103, a capacitance element C1, and a capacitance element C0. Note that the fourth transistor 104 represents one of the transistors of another circuit, and the potential of the potential holding node NC0 is held by connecting to the gate of the fourth transistor 104.

[0031] An example of an operation of writing a potential equal to or higher than Vc to the potential holding node NC0 in FIG. 3A will be described using the timing chart shown in FIG. 3B.

[0032] First, an operation of writing data “V1” to the potential holding node NC0 will be described. Here, detailed changes due to the circuit configuration, operation timing, etc. in the distribution, coupling, or loss of potential are not considered.

[0033] At time T1, the potential of the wiring reset is set to “H” to turn on the transistor M3 (third transistor 103), and the potential holding node NC1 becomes “V0”.

[0034] At time T2, the potential of wiring W0 is set to “H”, and transistor M1 (first transistor 101) is turned on so that “Vc - Vth” is supplied to potential holding node NC0. Let Vc - Vth be V1. When an analog potential between V1 and Vc is supplied from the data line, since the maximum gate write potential of transistor M1 is Vc, Vc - Vth, which is lower by the threshold value, is written to NC0.

[0035] At time T3, the potential of wiring W0 is set to “L” to turn off transistor M1. At time T4, the potential of wiring reset is set to “L”. Between time T3 and time T4, “V1 = Vc - Vth” is held at potential holding node NC0.

[0036] At time T5, the potential of wiring W1 is set to “H” to turn on transistor M2 (second transistor 102). “V2” is supplied from the data line to potential holding node NC1. Due to capacitive coupling, the potential of potential holding node NC0 rises by V’2 = e1 / (e1 + e0)×V2 from V1 and becomes V1 + V’2. (Here, let the capacitance of C1 be e1 and the capacitance of C0 be e0.) By adjusting the capacitance ratio of capacitive element C1 and capacitive element C0, it is possible to adjust the writable potential range. Note that V1 + V’2 is larger than Vc as shown in FIG. 3B.

[0037] At time T6, by setting the W1 signal to Low, transistor M2 is turned off. At this time, V1 + V’2 is held at potential holding node NC0. Also, V2 is held at potential holding node NC1.

[0038] As described above, a circuit configuration capable of writing a potential equal to or higher than Vc to potential holding node NC0 can be realized.

[0039] Also, FIG. 4 is a modified example of FIG. 3A, and shows a case where a circuit in which a gate is further connected to potential holding node NC1, and can be said to have a configuration similar to that of FIG. 1. Furthermore, if W1 and W0 are respectively connected to memory controller 23, the configuration of FIG. 1 can be obtained.

[0040] (Embodiment 3) In this embodiment, as an application example of a circuit using a memory circuit which is an aspect of the present invention, an example of applying it to a protection circuit for a secondary battery will be described with reference to the drawings.

[0041] FIG. 5 is an example of a block diagram showing an example of a management system for a secondary battery.

[0042] In FIG. 5, a charge control circuit 14 electrically connected to the secondary battery 13 has a cutoff switch 12 composed of two transistors between the charge control circuit 14 and the secondary battery 13. The cutoff switch 12 may use a power transistor (also called a power MOS), an N-channel MOSFET, or a P-channel MOSFET, and other materials such as SiC, GaN, and gallium oxide can be used.

[0043] The battery protection circuit 11 includes at least a memory circuit 15, a control circuit 16, a comparison circuit 18, a cutoff switch 12, a charge overcurrent detection circuit 17, and an overdischarge current detection circuit 19. In FIG. 5, the circuit group surrounded by a dotted line is regarded as one IC chip.

[0044] The memory circuit 15 uses the memory circuit shown in FIG. 3A or FIG. 4. The charge overcurrent detection circuit 17 or the overdischarge current detection circuit 19 corresponds to the fourth transistor 104 shown in FIG. 3A or the first circuit 21 and the second circuit 22 shown in FIG. 4, respectively. By using the memory circuit 15, a potential equal to or higher than the potential supplied from a single power source (here, the output voltage of the secondary battery 13) can be written to the charge overcurrent detection circuit 17 and the overdischarge current detection circuit 19.

[0045] When the memory circuit 15 is not used, a level shifter and a voltage generation circuit (boost circuit) need to be provided separately, which may lead to an increase in the circuit area. Also, when the charge control circuit 14 is configured to include a level shifter and a voltage generation circuit (boost circuit), and a terminal for inputting the signal to the battery protection circuit 11 is newly provided on one IC chip (battery protection circuit 11), if the required voltage differs for each circuit, the number of terminals will increase.

[0046] By adopting the configuration shown in FIG. 5, it is possible to prevent an increase in the occupied area of the circuit and suppress an increase in the number of terminals.

[0047] The battery protection circuit 11 uses a comparison circuit 18 to compare with the previous voltage, detects a micro short circuit that causes a large difference, and stops charging by turning off the cutoff switch 12 by the control circuit 16.

[0048] Instantaneous voltage fluctuations can be detected by the battery protection circuit 11. The battery protection circuit 11 can be said to be a simple protection circuit that stops charging immediately if there is an abnormality even if the cause of the sudden change in the charging voltage is unknown.

[0049] In this embodiment, an example is shown in which the battery protection circuit 11 is one IC chip and the charge control circuit 14 is one IC chip, but it is not particularly limited, and the battery protection circuit 11 and the charge control circuit 14 may be one IC chip. In that case, for a circuit that requires a voltage higher than the output voltage of the secondary battery 13 in the charge control circuit 14, by using the memory circuit 15, a potential higher than the potential supplied from a single power source can be written. As a result, a significant reduction in the area occupied by the circuit can be achieved.

[0050] (Embodiment 4) In this embodiment, a transistor configuration applicable to the semiconductor device described in the above embodiment will be described. As an example, a configuration in which transistors having different electrical characteristics are stacked will be described. By adopting such a configuration, the degree of freedom in designing the semiconductor device can be increased. In addition, by stacking transistors having different electrical characteristics, the integration degree of the semiconductor device can be increased.

[0051] A part of the cross-sectional structure of the semiconductor device is shown in FIG. 6. The semiconductor device shown in FIG. 6 includes a transistor 550, a transistor 500, and a capacitor 600. FIG. 8A is a cross-sectional view of the transistor 500 in the channel length direction, FIG. 8B is a cross-sectional view of the transistor 500 in the channel width direction, and FIG. 8C is a cross-sectional view of the transistor 550 in the channel width direction. For example, the transistor 500 corresponds to the fourth transistor 104 shown in the above embodiment, and the transistor 550 corresponds to any one of the first transistor 101, the second transistor 102, and the third transistor 103. The capacitor 600 corresponds to the capacitor C1.

[0052] The transistor 500 is an OS transistor. The transistor 500 has an extremely small off-current. Therefore, it is possible to hold the data voltage or charge written to the memory node via the transistor 500 for a long time. That is, since the refresh operation frequency of the memory node is reduced or the refresh operation is not required, the power consumption of the semiconductor device can be reduced.

[0053] In FIG. 6, the transistor 500 is provided above the transistor 550, and the capacitor 600 is provided above the transistor 550 and the transistor 500.

[0054] The transistor 550 is provided on the substrate 311 and has a semiconductor region 313 composed of a conductor 316, an insulator 315, and a part of the substrate 311, a low-resistance region 314a that functions as a source region or a drain region, and a low-resistance region 314b.

[0055] As shown in FIG. 8C, for the transistor 550, the upper surface and the side surfaces in the channel width direction of the semiconductor region 313 are covered with a conductor 316 via an insulator 315. In this way, by making the transistor 550 a Fin type, the effective channel width is increased, thereby improving the on characteristics of the transistor 550. In addition, since the contribution of the electric field of the gate electrode can be increased, the off characteristics of the transistor 550 can be improved.

[0056] Note that the transistor 550 may be either a p-channel type transistor or an n-channel type transistor.

[0057] In the region where the channel of the semiconductor region 313 is formed, the region in the vicinity thereof, the source region, or the drain region, i.e., the low-resistance regions 314a and 314b, etc., it is preferable to include a semiconductor such as a silicon-based semiconductor, and it is more preferable to include single-crystalline silicon. Alternatively, it may be formed of a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), etc. A configuration using silicon in which stress is applied to the crystal lattice and the effective mass is controlled by changing the lattice spacing may also be used. Alternatively, by using GaAs and GaAlAs, etc., the transistor 550 may be made a HEMT.

[0058] The low-resistance regions 314a and 314b include, in addition to the semiconductor material applied to the semiconductor region 313, an element that imparts n-type conductivity such as arsenic or phosphorus, or an element that imparts p-type conductivity such as boron.

[0059] As the conductor 316 that functions as a gate electrode, a conductive material such as a semiconductor material such as silicon, a metal material, an alloy material, or a metal oxide material that includes an element that imparts n-type conductivity such as arsenic or phosphorus, or an element that imparts p-type conductivity such as boron can be used.

[0060] Since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use materials such as titanium nitride or tantalum nitride for the conductor. Further, in order to achieve both conductivity and embedding property, it is preferable to use a metal material such as tungsten or aluminum as a laminate for the conductor, and in particular, using tungsten is preferable in terms of heat resistance.

[0061] The transistor 550 may be formed using an SOI (Silicon on Insulator) substrate or the like.

[0062] Also, as the SOI substrate, a SIMOX (Separation by Implanted Oxygen) substrate formed by implanting oxygen ions into a mirror-polished wafer and then heating it at a high temperature to form an oxide layer at a certain depth from the surface and eliminating the defects generated in the surface layer, or a smart cut method of splitting a semiconductor substrate by utilizing the growth by heat treatment of microvoids formed by hydrogen ion implantation, an SOI substrate formed using the ELTRAN method (registered trademark: Epitaxial Layer Transfer), etc. may be used. The transistor formed using a single crystal substrate has a single crystal semiconductor in the channel formation region.

[0063] Note that the transistor 550 shown in FIG. 6 is an example and is not limited to its configuration, and an appropriate transistor may be used according to the circuit configuration and driving method. For example, when the semiconductor device is a unipolar circuit with only OS transistors (meaning transistors of the same polarity such as only n-channel type transistors), as shown in FIG. 7, the configuration of the transistor 550 may be the same as the configuration of the transistor 500. Details of the transistor 500 will be described later.

[0064] Over the transistor 550, an insulator 320, an insulator 322, an insulator 324, and an insulator 326 are sequentially laminated and provided.

[0065] As the insulators 320, 322, 324, and 326, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, etc. may be used.

[0066] In addition, in this specification, silicon oxynitride refers to a material having an oxygen content higher than that of nitrogen in its composition, and silicon nitride oxide refers to a material having a nitrogen content higher than that of oxygen in its composition. Also, in this specification, aluminum oxynitride refers to a material having an oxygen content higher than that of nitrogen in its composition, and aluminum nitride oxide refers to a material having a nitrogen content higher than that of oxygen in its composition.

[0067] The insulator 322 may have a function as a planarization film that planarizes a step generated by a transistor 550 or the like provided below it. For example, the upper surface of the insulator 322 may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like to enhance flatness.

[0068] In addition, for the insulator 324, it is preferable to use a film having a barrier property that prevents hydrogen and impurities from diffusing from the substrate 311 or the transistor 550 or the like into the region where the transistor 500 is provided.

[0069] As an example of a film having a barrier property against hydrogen, for example, silicon nitride formed by a CVD method can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 500 and the transistor 550. Specifically, the film that suppresses the diffusion of hydrogen is a film having a small amount of hydrogen desorption.

[0070] The amount of hydrogen desorption can be analyzed using, for example, temperature-programmed desorption gas analysis (TDS). For example, the amount of hydrogen desorption from the insulator 324 is such that in the TDS analysis, in the range where the surface temperature of the film is from 50°C to 500°C, the desorption amount converted to hydrogen atoms, per unit area of the insulator 324, is 10×10 15 atoms / cm 2 or less, preferably 5×10 15 atoms / cm 2 or less.

[0071] Note that the insulator 326 preferably has a lower dielectric constant than the insulator 324. For example, the relative dielectric constant of the insulator 326 is preferably less than 4, more preferably less than 3. Also, for example, the relative dielectric constant of the insulator 326 is preferably 0.7 times or less, more preferably 0.6 times or less, that of the insulator 324. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced.

[0072] In addition, conductors 328, 330, etc. that are connected to the capacitor 600 or the transistor 500 are embedded in the insulators 320, 322, 324, and 326. Note that the conductors 328 and 330 have the function of plugs or wirings. Also, conductors having the function of plugs or wirings may be given the same reference numeral when a plurality of configurations are grouped together. In this specification, etc., a wiring and a plug connected to the wiring may be an integral body. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.

[0073] As the material of each plug and wiring (conductors 328, 330, etc.), a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used singly or in a laminated form. It is preferable to use a high melting point material such as tungsten or molybdenum that combines heat resistance and conductivity, and it is preferable to use tungsten. Alternatively, it is preferably formed of a low-resistance conductive material such as aluminum or copper. By using a low-resistance conductive material, the wiring resistance can be lowered.

[0074] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. 6, the insulator 350, the insulator 352, and the insulator 354 are sequentially stacked and provided. Further, a conductor 356 is formed on the insulator 350, the insulator 352, and the insulator 354. The conductor 356 has a function as a plug connected to the transistor 550 or a wiring. Note that the conductor 356 can be provided using the same material as the conductor 328 and the conductor 330.

[0075] Note that, for example, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 350 as in the case of the insulator 324. Further, the conductor 356 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 350 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0076] Note that, as the conductor having a barrier property against hydrogen, for example, tantalum nitride or the like may be used. Further, by laminating tantalum nitride and tungsten having high conductivity, diffusion of hydrogen from the transistor 550 can be suppressed while maintaining the conductivity as a wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen is in contact with the insulator 350 having a barrier property against hydrogen.

[0077] A wiring layer may be provided on the insulator 354 and the conductor 356. For example, in FIG. 6, the insulator 360, the insulator 362, and the insulator 364 are sequentially stacked and provided. Further, a conductor 366 is formed on the insulator 360, the insulator 362, and the insulator 364. The conductor 366 has a function as a plug or a wiring. Note that the conductor 366 can be provided using the same material as the conductor 328 and the conductor 330.

[0078] For example, similar to the insulator 324, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 360. Further, the conductor 366 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 360 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and the diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0079] A wiring layer may be provided on the insulator 364 and the conductor 366. For example, in FIG. 6, the insulator 370, the insulator 372, and the insulator 374 are sequentially stacked and provided. Further, the conductor 376 is formed in the insulator 370, the insulator 372, and the insulator 374. The conductor 376 has a function as a plug or a wiring. The conductor 376 can be provided using the same materials as the conductor 328 and the conductor 330.

[0080] For example, similar to the insulator 324, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 370. Further, the conductor 376 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 370 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and the diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0081] A wiring layer may be provided on the insulator 374 and the conductor 376. For example, in FIG. 6, the insulator 380, the insulator 382, and the insulator 384 are sequentially stacked and provided. Further, the conductor 386 is formed in the insulator 380, the insulator 382, and the insulator 384. The conductor 386 has a function as a plug or a wiring. The conductor 386 can be provided using the same materials as the conductor 328 and the conductor 330.

[0082] Note that, for example, as with the insulator 324, it is preferable to use an insulator having a barrier property against hydrogen for the insulator 380. Further, the conductor 386 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 380 having a barrier property against hydrogen. With this configuration, the transistor 550 and the transistor 500 can be separated by a barrier layer, and the diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0083] In the above, the wiring layer including the conductor 356, the wiring layer including the conductor 366, the wiring layer including the conductor 376, and the wiring layer including the conductor 386 have been described, but the semiconductor device according to the present embodiment is not limited thereto. The number of wiring layers similar to the wiring layer including the conductor 356 may be three or less, or may be five or more.

[0084] On the insulator 384, an insulator 510, an insulator 512, an insulator 514, and an insulator 516 are sequentially stacked and provided. It is preferable to use a material having a barrier property against oxygen or hydrogen for any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516.

[0085] For example, for the insulator 510 and the insulator 514, it is preferable to use a film having a barrier property against hydrogen or impurities from, for example, the substrate 311 or the region where the transistor 550 is provided to the region where the transistor 500 is provided. Therefore, the same material as that of the insulator 324 can be used.

[0086] As an example of a film having a barrier property against hydrogen, silicon nitride formed by CVD can be used. Here, when hydrogen diffuses into a semiconductor device having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor device may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 500 and the transistor 550.

[0087] Further, as a film having a barrier property against hydrogen, for example, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 510 and the insulator 514.

[0088] In particular, aluminum oxide has a high blocking effect of not allowing the film to permeate both oxygen and impurities such as hydrogen and moisture that are factors causing fluctuations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent the mixing of impurities such as hydrogen and moisture into the transistor 500 during and after the manufacturing process of the transistor. In addition, it is possible to suppress the release of oxygen from the oxide constituting the transistor 500. Therefore, it is suitable for use as a protective film for the transistor 500.

[0089] Further, for example, the same materials as those of the insulator 320 can be used for the insulator 512 and the insulator 516. In addition, by applying a material having a relatively low dielectric constant to these insulators, the parasitic capacitance generated between the wirings can be reduced. For example, a silicon oxide film, a silicon oxynitride film, or the like can be used as the insulator 512 and the insulator 516.

[0090] In addition, conductors 518 and conductors (for example, conductor 503) constituting the transistor 500 are embedded in the insulator 510, the insulator 512, the insulator 514, and the insulator 516. Note that the conductor 518 functions as a capacitor 600, a plug connected to the transistor 550, or a wiring. The conductor 518 can be provided using the same materials as those of the conductor 328 and the conductor 330.

[0091] In particular, the conductor 518 in the region in contact with the insulator 510 and the insulator 514 is preferably a conductor having barrier properties against oxygen, hydrogen, and water. With this configuration, the transistor 550 and the transistor 500 can be separated by a layer having barrier properties against oxygen, hydrogen, and water, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0092] Above the insulator 516, the transistor 500 is provided.

[0093] As shown in FIGS. 8A and 8B, the transistor 500 includes a conductor 503 disposed so as to be embedded in the insulator 514 and the insulator 516, an insulator 520 disposed on the insulator 516 and the conductor 503, an insulator 522 disposed on the insulator 520, an insulator 524 disposed on the insulator 522, an oxide 530a disposed on the insulator 524, an oxide 530b disposed on the oxide 530a, conductors 542a and 542b disposed apart from each other on the oxide 530b, an insulator 580 disposed on the conductors 542a and 542b and having an opening formed by overlapping between the conductor 542a and the conductor 542b, an insulator 545 disposed on the bottom surface and the side surface of the opening, and a conductor 560 disposed on the formation surface of the insulator 545.

[0094] Also, as shown in FIGS. 8A and 8B, it is preferable that an insulator 544 is disposed between the oxide 530a, the oxide 530b, the conductor 542a, and the conductor 542b and the insulator 580. Also, as shown in FIGS. 8A and 8B, the conductor 560 preferably includes a conductor 560a provided inside the insulator 545 and a conductor 560b provided so as to be embedded inside the conductor 560a. Also, as shown in FIGS. 8A and 8B, it is preferable that an insulator 574 is disposed on the insulator 580, the conductor 560, and the insulator 545.

[0095] In the present specification and the like, the oxide 530a and the oxide 530b may be collectively referred to as the oxide 530.

[0096] Note that in the transistor 500, a configuration is shown in which two layers of the oxide 530a and the oxide 530b are laminated in a region where a channel is formed and in its vicinity. However, the present invention is not limited to this. For example, a single layer of the oxide 530b or a laminated configuration of three or more layers may be provided.

[0097] Also, in the transistor 500, the conductor 560 is shown as a two-layer laminated configuration, but the present invention is not limited to this. For example, the conductor 560 may have a single-layer configuration or a laminated configuration of three or more layers. Also, the transistor 500 shown in FIGS. 6, 7, and 8A is an example, and the present invention is not limited to its configuration. An appropriate transistor may be used according to the circuit configuration, driving method, and the like.

[0098] Here, the conductor 560 functions as a gate electrode of the transistor, and the conductors 542a and 542b function as a source electrode or a drain electrode, respectively. As described above, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductor 542a and the conductor 542b. The arrangement of the conductor 560, the conductor 542a, and the conductor 542b is self-aligned with respect to the opening of the insulator 580. That is, in the transistor 500, the gate electrode can be self-alignedly arranged between the source electrode and the drain electrode. Therefore, the conductor 560 can be formed without providing an alignment margin, and the occupied area of the transistor 500 can be reduced. As a result, miniaturization and high integration of the semiconductor device can be achieved.

[0099] Furthermore, since the conductor 560 is self-alignedly formed in the region between the conductors 542a and 542b, the conductor 560 does not have a region that overlaps with the conductor 542a or the conductor 542b. Thereby, the parasitic capacitance formed between the conductor 560 and the conductors 542a and 542b can be reduced. Thus, the switching speed of the transistor 500 can be improved, and it can have high frequency characteristics.

[0100] The conductor 560 may function as a first gate (also referred to as a top gate) electrode. Also, the conductor 503 may function as a second gate (also referred to as a bottom gate) electrode. In that case, by changing the potential applied to the conductor 503 independently without linking it to the potential applied to the conductor 560, the threshold voltage of the transistor 500 can be controlled. In particular, by applying a negative potential to the conductor 503, it is possible to increase the threshold voltage of the transistor 500 and reduce the off-current. Therefore, applying a negative potential to the conductor 503 can make the drain current smaller when the potential applied to the conductor 560 is 0V than when no negative potential is applied.

[0101] The conductor 503 is arranged to overlap with the oxide 530 and the conductor 560. Thereby, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected, and the channel formation region formed in the oxide 530 can be covered.

[0102] In this specification and the like, a configuration of a transistor in which a channel formation region is electrically surrounded by the electric fields of a pair of gate electrodes (a first gate electrode and a second gate electrode) is called a surrounded channel (S-channel) configuration. Also, the S-channel configuration disclosed in this specification and the like is different from the Fin type configuration and the planar type configuration. By adopting the S-channel configuration, the resistance to the short-channel effect can be enhanced, in other words, a transistor in which the short-channel effect is less likely to occur can be obtained.

[0103] Further, the conductor 503 has the same configuration as the conductor 518. A conductor 503a is formed in contact with the inner walls of the openings of the insulator 514 and the insulator 516, and a conductor 503b is further formed inside. Note that in the transistor 500, a configuration in which the conductor 503a and the conductor 503b are laminated is shown, but the present invention is not limited to this. For example, the conductor 503 may be provided in a single-layer or a laminated configuration of three or more layers.

[0104] Here, it is preferable to use a conductive material in which the conductor 503a has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the above impurities are difficult to permeate). Or, it is preferable to use a conductive material in which the conductor 503a has a function of suppressing the diffusion of oxygen (at least one of, for example, oxygen atoms and oxygen molecules) (the above oxygen is difficult to permeate). Note that in this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of any one or all of the above impurities or the above oxygen.

[0105] For example, by having the function of suppressing the diffusion of oxygen in the conductor 503a, it is possible to suppress the oxidation of the conductor 503b and the decrease in conductivity.

[0106] Further, when the conductor 503 also serves as a wiring, it is preferable to use a highly conductive material mainly composed of tungsten, copper, or aluminum for the conductor 503b. Note that in the present embodiment, the conductor 503 is illustrated as a laminate of the conductor 503a and the conductor 503b, but the conductor 503 may have a single-layer configuration.

[0107] The insulator 520, the insulator 522, and the insulator 524 have a function as a second gate insulating film.

[0108] Here, it is preferable to use an insulator 524 in contact with the oxide 530 that contains more oxygen than the oxygen that satisfies the stoichiometric composition. Such oxygen is likely to be released from the film by heating. In this specification and the like, oxygen released by heating may be referred to as "excess oxygen". That is, it is preferable that a region containing excess oxygen (also referred to as an "excess oxygen region") is formed in the insulator 524. By providing such an insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies (V O : also referred to as oxygen vacancy) in the oxide 530 can be reduced, and the reliability of the transistor 500 can be improved. When hydrogen enters the oxygen vacancies in the oxide 530, such defects (hereinafter, may be referred to as V O H) may function as donors and generate electrons that are carriers. Also, a part of the hydrogen may combine with oxygen that binds to metal atoms to generate electrons that are carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have normally-on characteristics. Also, since hydrogen in the oxide semiconductor is likely to move due to stresses such as heat and an electric field, if the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may deteriorate. In one aspect of the present invention, it is preferable to reduce V O H in the oxide 530 as much as possible to make it highly pure intrinsic or substantially highly pure intrinsic. In this way, to obtain an oxide semiconductor in which V O H is sufficiently reduced, it is important to remove impurities such as moisture and hydrogen in the oxide semiconductor (also referred to as "dehydration" or "dehydrogenation treatment"), and to supply oxygen to the oxide semiconductor to compensate for oxygen vacancies (also referred to as "oxygen addition treatment"). By using an oxide semiconductor in which V O H is sufficiently reduced in the channel formation region of the transistor, stable electrical characteristics can be imparted.

[0109] As the insulator having an excess oxygen region, specifically, it is preferable to use an oxide material in which a part of oxygen is desorbed by heating. The oxide that desorbs oxygen by heating means that in TDS (Thermal Desorption Spectroscopy) analysis, the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 or more, and it is an oxide film. Note that the surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or more and 700°C or less, or 100°C or more and 400°C or less.

[0110] Further, the insulator having the excess oxygen region and the oxide 530 may be subjected to any one or a plurality of treatments such as heat treatment, microwave treatment, or RF treatment in contact with each other. By performing such treatment, water or hydrogen in the oxide 530 can be removed. For example, in the oxide 530, a reaction in which the bond of VoH is broken occurs, in other words, a reaction of "V O H→Vo+H" occurs, and dehydrogenation can be performed. A part of the hydrogen generated at this time may be combined with oxygen to form H2O and removed from the oxide 530 or the insulator in the vicinity of the oxide 530. Also, a part of the hydrogen may be gettered by the conductor 542a and / or 542b.

[0111] In addition, the microwave treatment is preferably performed using, for example, a device having a power source for generating high-density plasma or a device having a power source for applying RF to the substrate side. For example, by using a gas containing oxygen and high-density plasma, high-density oxygen radicals can be generated, and by applying RF to the substrate side, the oxygen radicals generated by the high-density plasma can be efficiently introduced into the oxide 530 or the insulator near the oxide 530. Further, the microwave treatment may be performed at a pressure of 133 Pa or more, preferably 200 Pa or more, and more preferably 400 Pa or more. Further, as the gas introduced into the apparatus for performing the microwave treatment, for example, oxygen and argon are used, and the oxygen flow ratio (O2 / (O2+Ar)) is 50% or less, preferably 10% or more and 30% or less.

[0112] In addition, during the manufacturing process of the transistor 500, it is preferable to perform a heat treatment in a state where the surface of the oxide 530 is exposed. The heat treatment may be performed, for example, at 100°C or higher and 450°C or lower, more preferably 350°C or higher and 400°C or lower. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, the heat treatment is preferably performed in an oxygen atmosphere. Thereby, oxygen can be supplied to the oxide 530 to reduce the oxygen deficiency (V O ). The heat treatment may also be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to supplement the desorbed oxygen after heat treatment in an atmosphere of nitrogen gas or an inert gas. Alternatively, after heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas, heat treatment may be continuously performed in an atmosphere of nitrogen gas or an inert gas.

[0113] By subjecting the oxide 530 to an oxygen addition treatment, the oxygen vacancies in the oxide 530 can be repaired with the supplied oxygen, that is, the reaction of "Vo + O → null" can be promoted. Furthermore, by reacting the supplied oxygen with the hydrogen remaining in the oxide 530, the hydrogen can be removed (dehydrated) as H2O. As a result, the hydrogen remaining in the oxide 530 can be prevented from recombining with the oxygen vacancies to form V O H can be suppressed.

[0114] Also, when the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen (for example, oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate).

[0115] It is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen and impurities, so that the oxygen in the oxide 530 does not diffuse to the insulator 520 side. Also, the conductor 503 can be prevented from reacting with the oxygen in the insulator 524 and the oxide 530.

[0116] The insulator 522 is preferably a single layer or a laminate of an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material for the insulator functioning as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0117] In particular, it is preferable to use an insulator containing one or both of oxides of aluminum and hafnium, which is an insulating material having a function of suppressing diffusion of impurities and oxygen (oxygen is difficult to permeate). As the insulator containing one or both of oxides of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the oxide 530 and the incorporation of impurities such as hydrogen from the peripheral portion of the transistor 500 into the oxide 530.

[0118] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. The above insulator may be used by laminating silicon oxide, silicon oxynitride, or silicon nitride.

[0119] Also, the insulator 520 is preferably thermally stable. For example, silicon oxide and silicon oxynitride are suitable because they are thermally stable. Further, by combining the insulator of the high-k material with silicon oxide or silicon oxynitride, an insulator 520 having a laminated structure that is thermally stable and has a high relative dielectric constant can be obtained.

[0120] In the transistors 500 of FIGS. 8A and 8B, the insulator 520, the insulator 522, and the insulator 524 are shown as the second gate insulating film having a three-layer laminated structure. However, the second gate insulating film may have a single-layer, two-layer, or four-layer or more laminated structure. In that case, it is not limited to a laminated structure made of the same material, and a laminated structure made of different materials may also be used.

[0121] The transistor 500 uses a metal oxide that functions as an oxide semiconductor for the oxide 530 including the channel formation region. For example, as the oxide 530, a metal oxide such as an In-M-Zn oxide (element M is selected from one or more of aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc.) may be used.

[0122] The formation of the metal oxide that functions as an oxide semiconductor may be performed by a sputtering method or an ALD (Atomic Layer Deposition) method. Note that the metal oxide that functions as an oxide semiconductor will be described in detail in other embodiments.

[0123] Also, as the metal oxide that functions as the channel formation region in the oxide 530, it is preferable to use one having a band gap of 2 eV or more, preferably 2.5 eV or more. Thus, by using a metal oxide with a large band gap, the off-current of the transistor can be reduced.

[0124] The oxide 530 has the oxide 530a under the oxide 530b, so that the diffusion of impurities from the composition formed below the oxide 530a to the oxide 530b can be suppressed.

[0125] Incidentally, the oxide 530 preferably has a laminated structure of a plurality of oxide layers with different atomic ratios of each metal atom. Specifically, in the metal oxide used for the oxide 530a, the atomic ratio of the element M in the constituent elements is preferably larger than the atomic ratio of the element M in the constituent elements in the metal oxide used for the oxide 530b. Further, in the metal oxide used for the oxide 530a, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 530b. Also, in the metal oxide used for the oxide 530b, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 530a.

[0126] Moreover, it is preferable that the energy of the lower end of the conduction band of the oxide 530a is higher than the energy of the lower end of the conduction band of the oxide 530b. In other words, it is preferable that the electron affinity of the oxide 530a is smaller than the electron affinity of the oxide 530b.

[0127] Here, at the junction of the oxide 530a and the oxide 530b, the energy level of the lower end of the conduction band changes smoothly. In other words, it can also be said that the energy level of the lower end of the conduction band at the junction of the oxide 530a and the oxide 530b changes continuously or is continuously joined. To achieve this, it is advisable to lower the density of defect energy levels in the mixed layer formed at the interface between the oxide 530a and the oxide 530b.

[0128] Specifically, by having a common element (as the main component) other than oxygen in the oxide 530a and the oxide 530b, a mixed layer with a low density of defect energy levels can be formed. For example, when the oxide 530b is an In-Ga-Zn oxide, an In-Ga-Zn oxide, a Ga-Zn oxide, gallium oxide, etc. may be used as the oxide 530a.

[0129] At this time, the main path of the carrier becomes the oxide 530b. By configuring the oxide 530a as described above, the density of defect energy levels at the interface between the oxide 530a and the oxide 530b can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the transistor 500 can obtain a high on-current.

[0130] On the oxide 530b, a conductor 542a and a conductor 542b that function as a source electrode and a drain electrode are provided. As the conductor 542a and the conductor 542b, a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, or an alloy containing the above-described metal element as a component, or an alloy combining the above-described metal elements, etc. are preferably used. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. Further, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel are preferable because they are conductive materials that are difficult to oxidize or materials that maintain conductivity even when absorbing oxygen. Furthermore, a metal nitride film such as tantalum nitride is preferable because it has a barrier property against hydrogen or oxygen.

[0131] In addition, in FIG. 8A, although the conductors 542a and 542b are shown in a single-layer configuration, they may also be in a stacked configuration of two or more layers. For example, a tantalum nitride film and a tungsten film may be stacked. Also, a titanium film and an aluminum film may be stacked. Further, a two-layer configuration in which an aluminum film is stacked on a tungsten film, a two-layer configuration in which a copper film is stacked on a copper-magnesium-aluminum alloy film, a two-layer configuration in which a copper film is stacked on a titanium film, or a two-layer configuration in which a copper film is stacked on a tungsten film may be used.

[0132] Also, a three-layer configuration in which a titanium film or a titanium nitride film is stacked with an aluminum film or a copper film on top of the titanium film or the titanium nitride film, and then a titanium film or a titanium nitride film is formed on top of that, a three-layer configuration in which a molybdenum film or a molybdenum nitride film is stacked with an aluminum film or a copper film on top of the molybdenum film or the molybdenum nitride film, and then a molybdenum film or a molybdenum nitride film is formed on top of that, etc. exist. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0133] Also, as shown in FIG. 8A, in the interface between the oxide 530 and the conductor 542a (conductor 542b) and in the vicinity thereof, regions 543a and 543b may be formed as low-resistance regions. At this time, region 543a functions as one of the source region or the drain region, and region 543b functions as the other of the source region or the drain region. Also, a channel formation region is formed in the region sandwiched between region 543a and region 543b.

[0134] By providing the conductor 542a (conductor 542b) in contact with the oxide 530, the oxygen concentration in region 543a (region 543b) may be reduced. Also, a metal compound layer containing the metal contained in the conductor 542a (conductor 542b) and the components of the oxide 530 may be formed in region 543a (region 543b). In such a case, the carrier density in region 543a (region 543b) increases, and region 543a (region 543b) becomes a low-resistance region.

[0135] The insulator 544 is provided to cover the conductor 542a and the conductor 542b, and suppresses the oxidation of the conductor 542a and the conductor 542b. At this time, the insulator 544 may be provided to cover the side surface of the oxide 530 and contact the insulator 524.

[0136] As the insulator 544, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, magnesium, etc. can be used. Further, as the insulator 544, silicon oxynitride or silicon nitride can also be used.

[0137] In particular, as the insulator 544, it is preferable to use aluminum oxide, hafnium oxide, aluminum, and an oxide containing hafnium (hafnium aluminate), etc., which are insulators containing one or both oxides of aluminum or hafnium. In particular, hafnium aluminate has higher heat resistance than a hafnium oxide film. Therefore, it is preferable because it is difficult to crystallize in the heat treatment in a later process. Note that when the conductor 542a and the conductor 542b are made of a material having oxidation resistance or the conductivity does not significantly decrease even when oxygen is absorbed, the insulator 544 is not an essential component. It may be appropriately designed according to the required transistor characteristics.

[0138] By having the insulator 544, it is possible to suppress impurities such as water and hydrogen contained in the insulator 580 from diffusing to the oxide 530b through the insulator 545. Further, oxidation of the conductor 560 can be suppressed by the excess oxygen of the insulator 580.

[0139] The insulator 545 functions as a first gate insulating film. The insulator 545 is preferably formed using an insulator that contains an excessive amount of oxygen and releases oxygen by heating, similar to the insulator 524 described above.

[0140] Specifically, silicon oxide with excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, and silicon oxide with pores can be used. In particular, silicon oxide and silicon oxynitride are preferred because they are stable against heat.

[0141] By providing an insulator containing excess oxygen as insulator 545, oxygen can be effectively supplied from insulator 545 to the channel formation region of oxide 530b. Also, similar to insulator 524, it is preferable that the concentration of impurities such as water or hydrogen in insulator 545 is reduced. The film thickness of insulator 545 is preferably 1 nm or more and 20 nm or less.

[0142] Further, in order to efficiently supply the excess oxygen possessed by insulator 545 to oxide 530, a metal oxide may be provided between insulator 545 and conductor 560. It is preferable that the metal oxide suppresses the diffusion of oxygen from insulator 545 to conductor 560. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of excess oxygen from insulator 545 to conductor 560 is suppressed. That is, it is possible to suppress a decrease in the amount of excess oxygen supplied to oxide 530. Also, oxidation of conductor 560 by excess oxygen can be suppressed. As the metal oxide, a material that can be used for insulator 544 may be used.

[0143] Note that insulator 545 may have a stacked structure, similar to the second gate insulating film. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. Therefore, by forming an insulator that functions as a gate insulating film into a stacked structure of a high-k material and a thermally stable material, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. Also, a stacked structure that is thermally stable and has a high relative dielectric constant can be formed.

[0144] The conductor 560 that functions as the first gate electrode is shown as a two-layer structure in FIGS. 8A and 8B, but it may be a single-layer structure or a laminated structure of three or more layers.

[0145] For the conductor 560a, it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N2O, NO, NO2), and copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). Since the conductor 560a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 560b by oxygen contained in the insulator 545 and the decrease in conductivity. As the conductive material having a function of suppressing the diffusion of oxygen, for example, it is preferable to use tantalum, tantalum nitride, ruthenium, or ruthenium oxide. Also, as the conductor 560a, an oxide semiconductor applicable to the oxide 530 can be used. In that case, by forming the conductor 560b by sputtering, the electrical resistance value of the conductor 560a can be decreased to make it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0146] Also, for the conductor 560b, it is preferable to use a conductive material mainly composed of tungsten, copper, or aluminum. Also, since the conductor 560b also functions as a wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. Also, the conductor 560b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0147] Insulator 580 is provided on conductor 542a and conductor 542b via insulator 544. Insulator 580 preferably has an excess oxygen region. For example, as insulator 580, it is preferable to have silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with pores, or resin. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, silicon oxide and silicon oxide with pores are preferable because an excess oxygen region can be easily formed in a subsequent process.

[0148] Insulator 580 preferably has an excess oxygen region. By providing insulator 580 that releases oxygen upon heating, oxygen in insulator 580 can be efficiently supplied to oxide 530. Note that it is preferable that the concentration of impurities such as water or hydrogen in insulator 580 is reduced.

[0149] The opening of insulator 580 is formed to overlap the region between conductor 542a and conductor 542b. Thereby, conductor 560 is formed to be embedded in the opening of insulator 580 and the region sandwiched between conductor 542a and conductor 542b.

[0150] When miniaturizing a semiconductor device, it is required to shorten the gate length, but it is necessary to prevent the conductivity of conductor 560 from decreasing. Therefore, if the film thickness of conductor 560 is increased, conductor 560 can have a high aspect ratio shape. In the present embodiment, since conductor 560 is provided to be embedded in the opening of insulator 580, even if conductor 560 has a high aspect ratio shape, it can be formed without collapsing conductor 560 during the process.

[0151] The insulator 574 is preferably provided in contact with the upper surface of the insulator 580, the upper surface of the conductor 560, and the upper surface of the insulator 545. By forming the insulator 574 by sputtering, an excess oxygen region can be provided in the insulator 545 and the insulator 580. Thereby, oxygen can be supplied from the excess oxygen region into the oxide 530.

[0152] For example, as the insulator 574, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used.

[0153] In particular, aluminum oxide has high barrier properties and can suppress the diffusion of hydrogen and nitrogen even in a thin film of 0.5 nm or more and 3.0 nm or less. Therefore, aluminum oxide formed by sputtering can function as an oxygen supply source and also as a barrier film for impurities such as hydrogen.

[0154] Also, it is preferable to provide an insulator 581 that functions as an interlayer film on the insulator 574. Similar to the insulator 524 and the like, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen in the film.

[0155] Also, the conductors 540a and 540b are arranged in the openings formed in the insulator 581, the insulator 574, the insulator 580, and the insulator 544. The conductors 540a and 540b are provided to face each other with the conductor 560 interposed therebetween. The conductors 540a and 540b have the same configuration as the conductors 546 and 548 described later.

[0156] An insulator 582 is provided on an insulator 581. It is preferable to use a material that is barrier - resistant to oxygen and hydrogen for the insulator 582. Therefore, the same material as that of the insulator 514 can be used for the insulator 582. For example, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 582.

[0157] In particular, aluminum oxide has a high blocking effect of not allowing the film to permeate both oxygen and impurities such as hydrogen and moisture that are factors causing fluctuations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent the intrusion of impurities such as hydrogen and moisture into the transistor 500 during and after the manufacturing process of the transistor. Also, it can suppress the release of oxygen from the oxides constituting the transistor 500. Therefore, it is suitable to be used as a protective film for the transistor 500.

[0158] Also, an insulator 586 is provided on the insulator 582. The same material as that of the insulator 320 can be used for the insulator 586. Further, by applying a material with a relatively low dielectric constant to these insulators, the parasitic capacitance generated between the wirings can be reduced. For example, as the insulator 586, a silicon oxide film, a silicon oxynitride film, etc. can be used.

[0159] Also, conductors 546, conductors 548, etc. are embedded in the insulator 520, insulator 522, insulator 524, insulator 544, insulator 580, insulator 574, insulator 581, insulator 582, and insulator 586.

[0160] The conductors 546 and conductors 548 have functions as plugs or wirings connected to the capacitor 600, the transistor 500, or the transistor 550. The conductors 546 and conductors 548 can be provided using the same materials as those of the conductors 328 and conductors 330.

[0161] Also, after forming the transistor 500, an opening may be formed so as to surround the transistor 500, and an insulator having high barrier properties against hydrogen or water may be formed so as to cover the opening. By wrapping the transistor 500 with the above-described insulator having high barrier properties, it is possible to prevent moisture and hydrogen from entering from the outside. Alternatively, a plurality of transistors 500 may be collectively wrapped with an insulator having high barrier properties against hydrogen or water. When forming an opening so as to surround the transistor 500, for example, an opening reaching the insulator 522 or the insulator 514 is formed, and the above-described insulator having high barrier properties is formed so as to be in contact with the insulator 522 or the insulator 514. This is preferable because it can also serve as part of the manufacturing process of the transistor 500. As the insulator having high barrier properties against hydrogen or water, for example, the same material as the insulator 522 or the insulator 514 may be used.

[0162] Subsequently, a capacitor 600 is provided above the transistor 500. The capacitor 600 includes a conductor 610, a conductor 620, and an insulator 630.

[0163] Also, a conductor 612 may be provided on the conductor 546 and the conductor 548. The conductor 612 functions as a plug or wiring connected to the transistor 500. The conductor 610 functions as an electrode of the capacitor 600. Note that the conductor 612 and the conductor 610 can be formed simultaneously.

[0164] For the conductor 612 and the conductor 610, a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the above-described elements as components can be used. Alternatively, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon oxide can also be applied.

[0165] In the present embodiment, the conductor 612 and the conductor 610 are shown in a single-layer configuration, but the present invention is not limited to this configuration, and a laminated configuration of two or more layers may be used. For example, between a conductor having barrier properties and a conductor having high conductivity, a conductor having barrier properties and a conductor having high adhesion to the conductor having high conductivity may be formed.

[0166] The conductor 620 is provided so as to overlap the conductor 610 with the insulator 630 interposed therebetween. Note that as the conductor 620, a conductive material such as a metal material, an alloy material, or a metal oxide material can be used. It is preferable to use a high melting point material such as tungsten or molybdenum that achieves both heat resistance and conductivity, and it is particularly preferable to use tungsten. Further, when forming simultaneously with other components such as a conductor, Cu (copper), Al (aluminum), or the like, which is a low resistance metal material, may be used.

[0167] An insulator 640 is provided over the conductor 620 and the insulator 630. The insulator 640 can be provided using the same material as the insulator 320. Further, the insulator 640 may function as a planarization film that covers the uneven shape therebelow.

[0168] By using this configuration, in a semiconductor device using a transistor having an oxide semiconductor, miniaturization or high integration can be achieved.

[0169] As substrates that can be used in the semiconductor device according to one aspect of the present invention, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a metal substrate (for example, a stainless steel substrate, a substrate having a stainless steel foil, a tungsten substrate, a substrate having a tungsten foil, etc.), a semiconductor substrate (for example, a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, or a compound semiconductor substrate, etc.), an SOI (SOI: Silicon on Insulator) substrate, etc. can be used. Further, a plastic substrate having heat resistance capable of withstanding the processing temperature of the present embodiment may be used. Examples of the glass substrate include barium borosilicate glass, aluminosilicate glass, aluminoborosilicate glass, or soda lime glass. In addition, crystallized glass, etc. can be used.

[0170] Alternatively, as the substrate, a flexible substrate, a bonded film, paper containing a fibrous material, or a base film, etc. can be used. Examples of the flexible substrate, the bonded film, the base film, etc. include the following. For example, plastics represented by polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and polytetrafluoroethylene (PTFE). Alternatively, as an example, synthetic resins such as acrylic, etc. Alternatively, as an example, polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride, etc. Alternatively, as an example, polyamide, polyimide, aramid resin, epoxy resin, inorganic vapor deposition film, or papers, etc. In particular, by manufacturing a transistor using a semiconductor substrate, a single crystal substrate, or an SOI substrate, etc., a transistor with little variation in characteristics, size, or shape, high current capacity, and small size can be manufactured. When a circuit is configured with such a transistor, power consumption reduction of the circuit or high integration of the circuit can be achieved.

[0171] Further, a flexible substrate may be used as the substrate, and transistors, resistors, and / or capacitors may be directly formed on the flexible substrate. Alternatively, a release layer may be provided between the substrate and transistors, resistors, and / or capacitors. After partially or fully completing a semiconductor device on the release layer, the release layer can be separated from the substrate and used for transfer onto another substrate. At this time, transistors, resistors, and / or capacitors can be transferred onto substrates with poor heat resistance or flexible substrates. Note that for the above-described release layer, for example, a stacked structure of inorganic films such as a tungsten film and a silicon oxide film, a structure in which an organic resin film such as polyimide is formed on the substrate, a silicon film containing hydrogen, or the like can be used.

[0172] That is, a semiconductor device may be formed on a certain substrate and then transferred onto another substrate. As an example of the substrate onto which the semiconductor device is transferred, in addition to the substrate on which the above-described transistors can be formed, a paper substrate, a cellophane substrate, an aramid film substrate, a polyimide film substrate, a stone substrate, a wood substrate, a cloth substrate (including natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupra, rayon, recycled polyester), etc.), a leather substrate, or a rubber substrate, etc. By using these substrates, it is possible to manufacture a flexible semiconductor device, manufacture a semiconductor device that is difficult to break, impart heat resistance, reduce weight, or make it thinner.

[0173] By providing a semiconductor device on a flexible substrate, it is possible to suppress an increase in weight and provide a semiconductor device that is difficult to break.

[0174] <Modification Example 1 of Transistor> The transistor 500A shown in FIGS. 9A, 9B, and 9C is a modified example of the transistor 500 having the configuration shown in FIGS. 8A and 8B. FIG. 9A is a top view of the transistor 500A, FIG. 9B is a cross-sectional view of the transistor 500A in the channel length direction, and FIG. 9C is a cross-sectional view of the transistor 500A in the channel width direction. Note that in the top view of FIG. 9A, the description of some elements is omitted for clarity of the drawing. The configurations shown in FIGS. 9A, 9B, and 9C can also be applied to other transistors included in a semiconductor device according to an aspect of the present invention, such as the transistor 550.

[0175] The transistor 500A having the configuration shown in FIGS. 9A, 9B, and 9C is different from the transistor 500 having the configuration shown in FIGS. 8A and 8B in that it has the insulator 552, the insulator 513, and the insulator 404. Further, the transistor 500A is different from the transistor 500 having the configuration shown in FIGS. 8A and 8B in that the insulator 552 is provided in contact with the side surface of the conductor 540a and the insulator 552 is provided in contact with the side surface of the conductor 540b. Furthermore, the transistor 500A is different from the transistor 500 having the configuration shown in FIGS. 8A and 8B in that it does not have the insulator 520.

[0176] In the transistor 500A having the configuration shown in FIGS. 9A, 9B, and 9C, the insulator 513 is provided on the insulator 512. Also, the insulator 404 is provided on the insulator 574 and on the insulator 513.

[0177] In the transistor 500A having the configuration shown in FIGS. 9A, 9B, and 9C, the insulators 514, 516, 522, 524, 544, 580, and 574 are patterned, and the insulator 404 is configured to cover these. That is, the insulator 404 is in contact with the upper surface of the insulator 574, the side surface of the insulator 574, the side surface of the insulator 580, the side surface of the insulator 544, the side surface of the insulator 524, the side surface of the insulator 522, the side surface of the insulator 516, the side surface of the insulator 514, and the upper surface of the insulator 513, respectively. Thereby, the oxide 530 and the like are isolated from the outside by the insulator 404 and the insulator 513.

[0178] The insulators 513 and 404 preferably have a high function of suppressing the diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, etc.) or water molecules. For example, as the insulators 513 and 404, it is preferable to use silicon nitride or silicon oxynitride, which are materials with high hydrogen barrier properties. Thereby, since the diffusion of hydrogen or the like into the oxide 530 can be suppressed, the deterioration of the characteristics of the transistor 500A can be suppressed. Therefore, the reliability of the semiconductor device according to one aspect of the present invention can be enhanced.

[0179] The insulator 552 is provided in contact with the insulators 581, 404, 574, 580, and 544. The insulator 552 preferably has a function of suppressing the diffusion of hydrogen or water molecules. For example, as the insulator 552, it is preferable to use an insulator such as silicon nitride, aluminum oxide, or silicon oxynitride, which is a material with high hydrogen barrier properties. In particular, since silicon nitride is a material with high hydrogen barrier properties, it is suitable for use as the insulator 552. By using a material with high hydrogen barrier properties as the insulator 552, the diffusion of impurities such as water or hydrogen from the insulator 580 or the like through the conductors 540a and 540b into the oxide 530 can be suppressed. Also, the absorption of oxygen contained in the insulator 580 by the conductors 540a and 540b can be suppressed. As described above, the reliability of the semiconductor device according to one aspect of the present invention can be enhanced.

[0180] <Modification Example 2 of Transistor> A configuration example of the transistor 500B will be described with reference to FIGS. 10A, 10B, and 10C. FIG. 10A is a top view of the transistor 500B. FIG. 10B is a cross-sectional view of the L1-L2 portion indicated by the dashed line in FIG. 10A. FIG. 10C is a cross-sectional view of the W1-W2 portion indicated by the dashed line in FIG. 10A. In the top view of FIG. 10A, the description of some elements is omitted for clarity of the drawing.

[0181] Transistor 500B is a modified example of transistor 500 and is a transistor that can be replaced with transistor 500. Therefore, to avoid repeating the explanation, mainly the differences between transistor 500B and transistor 500 will be described.

[0182] The conductor 560 that functions as the first gate electrode has the conductor 560a and the conductor 560b on the conductor 560a. It is preferable to use a conductive material for the conductor 560a that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. Alternatively, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0183] Since the conductor 560a has a function of suppressing the diffusion of oxygen, the material selectivity of the conductor 560b can be improved. That is, by having the conductor 560a, oxidation of the conductor 560b can be suppressed, and a decrease in conductivity can be prevented.

[0184] Further, it is preferable to provide the insulator 544 so as to cover the upper surface and the side surface of the conductor 560 and the side surface of the insulator 545. Note that the insulator 544 may be made of an insulating material that has a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen. For example, it is preferable to use aluminum oxide or hafnium oxide. In addition, for example, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon oxynitride, or silicon nitride can also be used.

[0185] By providing the insulator 544, oxidation of the conductor 560 can be suppressed. Also, by having the insulator 544, diffusion of impurities such as water and hydrogen that the insulator 580 has into the transistor 500B can be suppressed.

[0186] Since the conductor 560 overlaps with a part of the conductor 542a and a part of the conductor 542b in the transistor 500B, the parasitic capacitance is likely to be larger than that of the transistor 500. Therefore, the operating frequency tends to be lower than that of the transistor 500. However, since the process of providing an opening in the insulator 580 and filling the conductor 560, the insulator 545, etc. is unnecessary, the productivity is high compared to the transistor 500.

[0187] The configurations, structures, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, structures, methods, etc. shown in other embodiments and examples.

[0188] (Embodiment 5) In this embodiment, an oxide semiconductor, which is a kind of metal oxide, will be described.

[0189] The metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. In addition to these, it is preferable that aluminum, gallium, yttrium, tin, etc. are contained. Further, one or more kinds selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. may be contained.

[0190] <Classification of Crystal Structure> First, the classification of the crystal structure in the oxide semiconductor will be described with reference to FIG. 11A. FIG. 11A is a diagram for explaining the classification of the crystal structure of an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0191] As shown in FIG. 11A, oxide semiconductors are roughly classified into "Amorphous", "Crystalline", and "Crystal". Further, "Amorphous" includes completely amorphous. Further, "Crystalline" includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite). Note that single crystal, poly crystal, and completely amorphous are excluded from the classification of "Crystalline". Further, "Crystal" includes single crystal and poly crystal.

[0192] Note that the structure within the thick frame shown in FIG. 11A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). That is, the structure can be rephrased as a structure that is energetically unstable "Amorphous" and is completely different from "Crystal".

[0193] Note that the crystal structure of a film or a substrate can be evaluated using an X-ray diffraction (XRD) spectrum. Here, FIG. 11B shows the XRD spectrum obtained by grazing-incidence XRD (GIXD) measurement of a CAAC-IGZO film classified as "Crystalline". Note that the GIXD method is also called the thin film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by the GIXD measurement shown in FIG. 11B will be simply referred to as the XRD spectrum. Note that the composition of the CAAC-IGZO film shown in FIG. 11B is in the vicinity of In:Ga:Zn = 4:2:3 [atomic ratio]. Further, the thickness of the CAAC-IGZO film shown in FIG. 11B is 500 nm.

[0194] As shown in FIG. 11B, in the XRD spectrum of the CAAC-IGZO film, peaks indicating distinct crystallinity are detected. Specifically, in the XRD spectrum of the CAAC-IGZO film, a peak indicating c-axis orientation is detected near 2θ = 31°. As shown in FIG. 11B, the peak near 2θ = 31° is asymmetric about the angle at which the peak intensity was detected.

[0195] Also, the crystal structure of the film or substrate can be evaluated by the diffraction pattern (also referred to as the nano-beam electron diffraction pattern) observed by the nano-beam electron diffraction method (NBED). The diffraction pattern of the CAAC-IGZO film is shown in FIG. 11C. FIG. 11C is a diffraction pattern observed by NBED in which the electron beam is incident parallel to the substrate. Note that the composition of the CAAC-IGZO film shown in FIG. 11C is near In:Ga:Zn = 4:2:3 [atomic ratio]. Also, in the nano-beam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0196] As shown in FIG. 11C, in the diffraction pattern of the CAAC-IGZO film, a plurality of spots indicating c-axis orientation are observed.

[0197] [Structure of Oxide Semiconductor] Note that when focusing on the crystal structure, oxide semiconductors may be classified differently from FIG. 11A. For example, oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. Also, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductor), amorphous oxide semiconductors, and the like.

[0198] Here, details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.

[0199] [CAAC-OS] CAAC-OS is an oxide semiconductor having a plurality of crystal regions, and the c-axes of the plurality of crystal regions are oriented in a specific direction. Here, the specific direction means the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. Also, a crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, a crystal region is also a region where the lattice arrangements are aligned. Further, CAAC-OS has a region where a plurality of crystal regions are connected in the a-b plane direction, and this region may have strain. Here, strain refers to a portion where the direction of the lattice arrangement changes between a region where the lattice arrangements are aligned and another region where the lattice arrangements are aligned in a region where a plurality of crystal regions are connected. That is, CAAC-OS is an oxide semiconductor in which the c-axis is oriented and there is no obvious orientation in the a-b plane direction.

[0200] Each of the plurality of crystal regions is composed of one or more minute crystals (crystals having a maximum diameter of less than 10 nm). When a crystal region is composed of one minute crystal, the maximum diameter of the crystal region is less than 10 nm. Also, when a crystal region is composed of a number of minute crystals, the size of the crystal region may be about several tens of nm.

[0201] Also, in an In-M-Zn oxide (where the element M is one or more selected from aluminum, gallium, yttrium, tin, titanium, etc.), CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter, In layer) and a layer containing the element M, zinc (Zn), and oxygen (hereinafter, (M,Zn) layer) are laminated. Here, indium and the element M are mutually substitutable. Therefore, the (M,Zn) layer may contain indium. Also, the In layer may contain the element M. Note that the In layer may also contain Zn. The layered structure is observed as a lattice image, for example, in a high-resolution TEM image.

[0202] When performing structural analysis on a CAAC-OS film using, for example, an XRD apparatus, in an Out-of-plane XRD measurement using a θ / 2θ scan, a peak indicating c-axis orientation is detected at 2θ = 31° or in its vicinity. Note that the position (the value of 2θ) of the peak indicating c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.

[0203] Also, for example, in the electron diffraction pattern of a CAAC-OS film, a plurality of bright spots (spots) are observed. Note that one spot and another spot are observed at point-symmetric positions with the spot of the incident electron beam transmitted through the sample (also referred to as the direct spot) as the center of symmetry.

[0204] When observing the crystal region from the above specific direction, the lattice arrangement within the crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. Also, in the above distortion, there may be a lattice arrangement such as a pentagon or a heptagon. Note that in CAAC-OS, even in the vicinity of the distortion, a clear grain boundary cannot be confirmed. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is presumably because CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the interatomic bond distance changes due to the substitution of metal atoms.

[0205] Note that a crystal structure in which a clear grain boundary is confirmed is called a so-called polycrystal. Grain boundaries can become recombination centers and are likely to cause a decrease in the on-current of a transistor and a decrease in the field-effect mobility due to the capture of carriers. Therefore, CAAC-OS in which no clear grain boundary is confirmed is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of a transistor. Note that for forming CAAC-OS, a configuration having Zn is preferable. For example, In-Zn oxide and In-Ga-Zn oxide are preferable because they can suppress the generation of grain boundaries more than In oxide.

[0206] CAAC-OS is an oxide semiconductor with high crystallinity and no distinct grain boundaries being confirmed. Thus, it can be said that in CAAC-OS, a decrease in electron mobility due to grain boundaries is unlikely to occur. Also, since the crystallinity of an oxide semiconductor may decrease due to, for example, the incorporation of impurities or the generation of defects, CAAC-OS can also be said to be an oxide semiconductor with few impurities and defects (such as oxygen deficiencies). Therefore, the physical properties of an oxide semiconductor having CAAC-OS are stable. For this reason, an oxide semiconductor having CAAC-OS is heat-resistant and highly reliable. Also, CAAC-OS is stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when CAAC-OS is used for an OS transistor, it becomes possible to expand the degree of freedom in the manufacturing process.

[0207] [nc-OS] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In other words, nc-OS has minute crystals. Note that since the size of the minute crystals is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystals are also referred to as nano-crystals. Also, nc-OS has no regularity in the crystal orientation among different nano-crystals. Therefore, no orientation is observed in the entire film. Thus, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or an amorphous oxide semiconductor. For example, when structural analysis is performed on an nc-OS film using an XRD apparatus, no peak indicating crystallinity is detected in the out-of-plane XRD measurement using θ / 2θ scan. Also, when electron beam diffraction (also referred to as limited field electron beam diffraction) using an electron beam with a probe diameter larger than the nano-crystals (for example, 50 nm or more) is performed on an nc-OS film, a diffraction pattern such as a halo pattern is observed. On the other hand, when electron beam diffraction (also referred to as nano-beam electron beam diffraction) using an electron beam with a probe diameter close to or smaller than the size of the nano-crystals (for example, 1 nm or more and 30 nm or less) is performed on an nc-OS film, an electron beam diffraction pattern in which a plurality of spots are observed within a ring-shaped region centered on a direct spot may be obtained.

[0208] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has a loose or low-density region. That is, the a-like OS has lower crystallinity compared to the nc-OS and the CAAC-OS. Also, the a-like OS has a higher hydrogen concentration in the film compared to the nc-OS and the CAAC-OS.

[0209] [[Constitution of Oxide Semiconductor]] Next, the details of the above-described CAC-OS will be explained. Note that the CAC-OS relates to the material constitution.

[0210] [CAC-OS] The CAC-OS is, for example, a configuration of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof. In the following, in the metal oxide, one or more metal elements are unevenly distributed, and a region having the metal element is in a state of being mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or in the vicinity thereof, which is also referred to as a mosaic state or a patch state.

[0211] Furthermore, the CAC-OS is a configuration in which the material is separated into a first region and a second region to form a mosaic state, and the first region is distributed in the film (hereinafter, also referred to as a cloud state). That is, the CAC-OS is a composite metal oxide having a configuration in which the first region and the second region are mixed.

[0212] Here, the atomic number ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. Also, the second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. Also, the second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0213] Specifically, the above-mentioned first region is a region mainly composed of indium oxide, indium zinc oxide, etc. Also, the above-mentioned second region is a region mainly composed of gallium oxide, gallium zinc oxide, etc. That is, the above-mentioned first region can be rephrased as a region mainly composed of In. Also, the above-mentioned second region can be rephrased as a region mainly composed of Ga.

[0214] Note that there may be cases where no clear boundary can be observed between the above-mentioned first region and the above-mentioned second region.

[0215] For example, in the CAC-OS in the In-Ga-Zn oxide, it can be confirmed by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) that the region mainly composed of In (the first region) and the region mainly composed of Ga (the second region) are unevenly distributed and have a mixed structure.

[0216] When using CAC-OS in a transistor, the conductivity caused by the first region and the insulating property caused by the second region act complementarily, enabling the function of switching (turning on / off) to be imparted to the CAC-OS. That is, CAC-OS has a conductive function in part of the material and an insulating function in part of the material, and has a semiconductor function as a whole. By separating the conductive function and the insulating function, both functions can be enhanced to the maximum extent. Therefore, by using CAC-OS in a transistor, a high on-current (I on )、high field-effect mobility (μ), and good switching operation can be realized.

[0217] Oxide semiconductors have various structures, each with different characteristics. The oxide semiconductor of one aspect of the present invention may have two or more of amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, CAC-OS, nc-OS, and CAAC-OS.

[0218] <Transistor having an oxide semiconductor> Subsequently, the case of using the above oxide semiconductor in a transistor will be described.

[0219] By using the above oxide semiconductor in a transistor, a transistor with high field-effect mobility can be realized. Also, a highly reliable transistor can be realized.

[0220] For a transistor, it is preferable to use an oxide semiconductor with a low carrier concentration. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 or less, preferably 1×10 15 cm -3 or less, more preferably 1×10 13 cm -3 or less, still more preferably 1×10 11 cm -3 or less, even more preferably 1×10 10 cm -3 less than, and 1×10 -9 cm-3 The above is the case. When reducing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be decreased and the density of defect levels may be decreased. In this specification and the like, the fact that the impurity concentration is low and the density of defect levels is low is referred to as highly pure intrinsic or substantially highly pure intrinsic. Note that an oxide semiconductor with a low carrier concentration may be referred to as a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor.

[0221] In addition, since an oxide semiconductor film that is highly pure intrinsic or substantially highly pure intrinsic has a low density of defect levels, the density of trap levels may also be low.

[0222] In addition, the charge trapped in the trap levels of the oxide semiconductor takes a long time to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap levels may have unstable electrical characteristics.

[0223] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In addition, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0224] <Impurity> Here, the influence of each impurity in the oxide semiconductor will be described.

[0225] In the oxide semiconductor, when silicon or carbon, which is one of the group 14 elements, is contained, defect levels are formed in the oxide semiconductor. For this reason, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (the concentration obtained by secondary ion mass spectrometry (SIMS)) are 2×10 18 atoms / cm 3 or less, preferably 2×10 17atoms / cm 3 Shall be as follows.

[0226] In addition, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have normally-on characteristics. For this reason, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0227] In the oxide semiconductor, when nitrogen is contained, electrons as carriers are generated, the carrier concentration increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Or, in the oxide semiconductor, when nitrogen is contained, trap levels may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the oxide semiconductor obtained by SIMS is set to less than 5×10 19 atoms / cm 3 preferably less than 5×10 18 atoms / cm 3 or less, more preferably 1×10 18 atoms / cm 3 or less, even more preferably 5×10 17 atoms / cm 3 or less.

[0228] In addition, hydrogen contained in the oxide semiconductor may react with oxygen bonded to metal atoms to form water, thereby forming oxygen vacancies. When hydrogen enters these oxygen vacancies, electrons, which are carriers, may be generated. Also, a part of the hydrogen may bond with oxygen bonded to metal atoms to generate electrons, which are carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that hydrogen in the oxide semiconductor be reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is less than 1×10 20 atoms / cm 3 , preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , even more preferably less than 1×10 18 atoms / cm 3 .

[0229] By using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor, stable electrical characteristics can be imparted.

[0230] The configurations, structures, methods, etc. shown in this embodiment can be used in appropriate combination with those shown in other embodiments and examples.

[0231] (Embodiment 6) In this embodiment, an example of mounting the secondary battery and its protection circuit described in the previous Embodiment 3 on an electronic device will be described with reference to FIGS. 12 and 13. Note that the secondary battery module has at least a secondary battery and a protection circuit.

[0232] First, an example of mounting a secondary battery, which is one aspect of the present invention, and its protection circuit on a small electronic device will be described with reference to FIGS. 12A to 12C.

[0233] FIG. 12A shows an example of a mobile phone. The mobile phone 2100 includes, in addition to a display unit 2102 incorporated in a housing 2101, operation buttons 2103, an external connection port 2104, a speaker 2105, a microphone 2106, and the like. Note that the mobile phone 2100 has a secondary battery 2107 and its protection circuit.

[0234] The mobile phone 2100 can execute various applications such as mobile phone calls, e-mails, text viewing and creation, music playback, Internet communication, and computer games.

[0235] In addition to time setting, the operation buttons 2103 can have various functions such as power on / off operations, wireless communication on / off operations, execution and cancellation of the silent mode, and execution and cancellation of the power saving mode. For example, the functions of the operation buttons 2103 can be freely set by an operating system incorporated in the mobile phone 2100.

[0236] Also, the mobile phone 2100 can execute communication-standardized short-range wireless communication. For example, it can communicate with a wireless headset to make hands-free calls.

[0237] The mobile phone 2100 is provided with an external connection port 2104 and can directly exchange data with other information terminals via a connector. Charging can also be performed via the external connection port 2104. Note that the charging operation may be performed by wireless power supply without using the external connection port 2104.

[0238] The mobile phone 2100 preferably has a sensor. As the sensor, for example, it is preferable to mount a human body sensor such as a fingerprint sensor, a pulse sensor, a body temperature sensor, or a touch sensor, a pressure sensor, an acceleration sensor, or the like.

[0239] Figure 12B is a perspective view of a device also called a tobacco-containing smoking device (electronic cigarette). In Figure 12B, the electronic cigarette 2200 has a heating element 2201, a secondary battery 2204 that supplies power to the heating element 2201, and its protection circuit. When a stick 2202 is inserted into this, the stick 2202 is heated by the heating element 2201. To enhance safety, a protection circuit that prevents overcharging and over-discharging of the secondary battery is electrically connected to the secondary battery. The secondary battery 2204 shown in Figure 12B has external terminals so that it can be connected to a charging device. Since the secondary battery 2204 becomes the tip portion when held, it is desirable that the total length is short and the weight is light. The protection circuit according to one aspect of the present invention connected to the secondary battery is highly safe, so that it is possible to provide a small and lightweight electronic cigarette 2200 that can be safely used for a long time over a long period.

[0240] Figure 12C is an unmanned aerial vehicle 2300 having a plurality of rotors 2302. The unmanned aerial vehicle 2300 has a secondary battery 2301 and a protection circuit for the secondary battery, which are one aspect of the present invention, a camera 2303, and an antenna (not shown). The unmanned aerial vehicle 2300 can be remotely operated via the antenna. Since the secondary battery and its protection circuit are highly safe, they can be safely used for a long time over a long period, and are suitable as the secondary battery and its protection circuit mounted on the unmanned aerial vehicle 2300.

[0241] Next, an example of mounting a secondary battery and its protection circuit, which are one aspect of the present invention, on a vehicle will be described with reference to Figures 12D, 12E, and 13.

[0242] Figure 12D is an electric two-wheeler 2400 using a protection circuit for a secondary battery according to one aspect of the present invention. The electric two-wheeler 2400 includes a secondary battery 2401, a display unit 2402, and a handle 2403. The secondary battery 2401 can supply electricity to a motor that provides power. The display unit 2402 can display the remaining amount of the secondary battery 2401, the speed of the electric two-wheeler 2400, the horizontal state, and the like.

[0243] FIG. 12E shows an example of an electric bicycle using a secondary battery and its protection circuit according to an aspect of the present invention. The electric bicycle 2500 includes a battery pack 2502. The battery pack 2502 has a protection circuit for a secondary battery according to an aspect of the present invention.

[0244] The battery pack 2502 can supply electricity to a motor that assists the driver. Also, the battery pack 2502 can be removed from the electric bicycle 2500 and carried around. Further, the battery pack 2502 and the electric bicycle 2500 may have a display unit that can display the remaining battery level and the like.

[0245] As shown in FIG. 13A, a secondary battery module 2602 having a plurality of secondary batteries 2601 may be mounted on a hybrid vehicle (HV), an electric vehicle (EV), a plug-in hybrid vehicle (PHV), or other electronic devices.

[0246] FIG. 13B shows an example of a vehicle on which the secondary battery module 2602 is mounted. The vehicle 2603 is an electric vehicle that uses an electric motor as a power source for running. Or it is a hybrid vehicle that can appropriately select and use an electric motor and an engine as power sources for running. The vehicle 2603 that uses an electric motor has a plurality of ECUs (Electronic Control Units), and the ECUs perform engine control and the like. The ECU includes a microcomputer. The ECU is connected to a CAN (Controller Area Network) provided in the electric vehicle. The CAN is one of the serial communication standards used as an in-vehicle LAN. By using the protection circuit according to an aspect of the present invention, a vehicle with high safety and a long cruising range can be realized.

[0247] The secondary battery can not only drive an electric motor (not shown), but also supply power to a light-emitting device such as a headlight and a room light. Also, the secondary battery can supply power to a display device and a semiconductor device such as a speedometer, a tachometer, and a navigation system that the vehicle 2603 has.

[0248] The vehicle 2603 can be charged by receiving power supply from an external charging facility through a plug-in method, a non-contact power supply method, or the like to a secondary battery.

[0249] FIG. 13C shows a state in which the vehicle 2603 is being charged from a ground-mounted charging device 2604 via a cable. When charging, the charging method, the connector specifications, etc. may be appropriately performed in a predetermined manner such as CHAdeMO (registered trademark) or Combo. For example, by a plug-in technique, the secondary battery module 2602 mounted on the vehicle 2603 can be charged by power supply from the outside. Charging can be performed by converting AC power into DC power via a conversion device such as an AC-DC converter. The charging device 2604 may be provided in a house as shown in FIG. 13C, or may be a charging station provided in a commercial facility.

[0250] Also, although not shown, a power receiving device can be mounted on the vehicle, and power can be supplied non-contact from a power transmission device on the ground for charging. In the case of this non-contact power supply method, by incorporating a power transmission device in a road or an outer wall, charging can be performed not only while the vehicle is stopped but also while it is running. Also, using this non-contact power supply method, power may be transmitted and received between vehicles. Furthermore, a solar cell may be provided on the exterior of the vehicle to charge the secondary battery when the vehicle is stopped or running. For such non-contact power supply, an electromagnetic induction method or a magnetic field resonance method can be used.

[0251] Also, the house shown in FIG. 13C has a power storage system 2612 having a protection circuit for a secondary battery, which is one aspect of the present invention, and a solar panel 2610. The power storage system 2612 is electrically connected via the solar panel 2610, wiring 2611, etc. Also, the power storage system 2612 and the ground-mounted charging device 2604 may be electrically connected. The power obtained by the solar panel 2610 can be charged to the power storage system 2612. Also, the power stored in the power storage system 2612 can be charged to the secondary battery module 2602 of the vehicle 2603 via the charging device 2604.

[0252] The electric power stored in the power storage system 2612 can also supply power to other electronic devices in the house. Therefore, even when power supply from the commercial power source cannot be received due to a power outage or the like, by using the power storage system 2612 according to one aspect of the present invention as an uninterruptible power supply, it becomes possible to use electronic devices.

[0253] This embodiment can be used in appropriate combination with other embodiments.

Description of Reference Numerals

[0254] 11: Battery protection circuit, 12: Switch for interruption, 13: Secondary battery, 14: Charge control circuit, 15: Memory circuit, 16: Control circuit, 17: Overcharge current detection circuit, 18: Comparison circuit, 19: Over-discharge current detection circuit, 21: First circuit, 22: Second circuit, 23: Memory controller, 101: First transistor, 102: Second transistor, 103: Third transistor, 104: Fourth transistor, 311: Substrate, 313: Semiconductor region, 314a: Low-resistance region, 314b: Low-resistance region, 315: Insulator, 316: Conductor, 320: Insulator, 322: Insulator, 324: Insulator, 326: Insulator, 328: Conductor, 330: Conductor, 350: Insulator, 352: Insulator, 354: Insulator, 356: Conductor, 360: Insulator, 362: Insulator, 364: Insulator, 366: Conductor, 370: Insulator, 372: Insulator, 374: Insulator, 376: Conductor, 380: Insulator, 382: Insulator, 384: Insulator, 386: Conductor, 404: Insulator, 500: Transistor, 500A: Transistor, 500B: Transistor, 503: Conductor, 503a: Conductor, 503b: Conductor, 510: Insulator, 512: Insulator, 513: Insulator, 514: Insulator, 516: Insulator, 518: Conductor, 520: Insulator, 522: Insulator, 524: Insulator, 530: Oxide, 530a: Oxide, 530b: Oxide, 540a: Conductor, 540b: Conductor, 542: Conductor, 542a: Conductor, 542b: Conductor, 543a: Region, 543b: Region, 544: Insulator, 545: Insulator, 546: Conductor, 548: Conductor, 550: Transistor, 552: Insulator, 560: Conductor, 560a: Conductor, 560b: Conductor, 574: Insulator, 580: Insulator, 581: Insulator, 582: Insulator, 586: Insulator, 600: Capacitance, 610: Conductor, 612: Conductor, 620: Conductor, 630: Insulator, 640: Insulator, 2100: Mobile phone, 2101: Housing, 2102: Display unit, 2103: Operation button, 2104: External connection port, 2105: Speaker, 2106: Microphone, 2107: Secondary battery, 2200: Electronic cigarette, 2201: Heating element, 2202: Stick, 2204: Secondary battery, 2300: Unmanned aerial vehicle, 2301: Secondary battery, 2302: Rotor, 2303: Camera, 2400: Electric two-wheeler, 2401: Secondary battery, 2402: Display unit, 2403: Handle,2500: Electric bicycle, 2502: Battery pack, 2601: Secondary battery, 2602: Secondary battery module, 2603: Vehicle, 2604: Charging device, 2610: Solar panel, 2611: Wiring, 2612: Energy storage system

Claims

1. a control circuit, a memory circuit electrically connected to the control circuit, a comparison circuit electrically connected to the memory circuit, a charging overcurrent detection circuit electrically connected to the memory circuit, and an overdischarging current detection circuit electrically connected to the memory circuit; the memory circuit includes a first transistor, a second transistor, a third transistor, and a capacitor; one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to one of the source and the drain of the third transistor; one of a source and a drain of the third transistor is electrically connected to one electrode of the capacitance element; the other electrode of the capacitance element is electrically connected to the other of the source and drain of the first transistor; one electrode of the capacitance element is electrically connected to the other of the source and the drain of the second transistor; a node is formed by a connection point between the other electrode of the capacitive element and the other of the source or drain of the first transistor.

2. a control circuit, a memory circuit electrically connected to the control circuit, a comparison circuit electrically connected to the memory circuit, a charging overcurrent detection circuit electrically connected to the memory circuit, and an overdischarging current detection circuit electrically connected to the memory circuit; the memory circuit includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor; one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to one of the source and the drain of the third transistor; one of a source and a drain of the third transistor is electrically connected to one electrode of the first capacitance element; the other electrode of the first capacitance element is electrically connected to the other of the source and the drain of the first transistor; one electrode of the first capacitance element is electrically connected to the other of the source and the drain of the second transistor; the other of the source and the drain of the first transistor is electrically connected to one electrode of the second capacitance element; a node is formed by a connection point between the other electrode of the first capacitance element, one electrode of the second capacitance element, and the other of the source or drain of the first transistor.

3. In claim 1 or 2, A protection circuit for a secondary battery, comprising the memory circuit, the comparison circuit, the charging overcurrent detection circuit, and the overdischarging current detection circuit as an IC chip.

4. In claim 1 or 2, The first transistor, the second transistor, and the third transistor each have a metal oxide in which a channel formation region is formed, a first insulator on the metal oxide, a second insulator having an area in contact with the bottom and side surfaces of an opening in the first insulator, and a conductor arranged on the formation surface of the second insulator.

5. In any one of claims 1 to 4, The charging overcurrent detection circuit or the overdischarging current detection circuit is electrically connected to the node.

6. a control circuit, a memory circuit electrically connected to the control circuit, a comparison circuit electrically connected to the memory circuit, a charging overcurrent detection circuit electrically connected to the memory circuit, and an overdischarging current detection circuit electrically connected to the memory circuit; the memory circuit includes a first transistor, a second transistor, a third transistor, and a capacitor; one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to one of the source and the drain of the third transistor; one of a source and a drain of the third transistor is electrically connected to one electrode of the capacitance element; the other electrode of the capacitance element is electrically connected to the other of the source and drain of the first transistor; one electrode of the capacitance element is electrically connected to the other of the source and the drain of the second transistor; a node is formed by a connection point between the other electrode of the capacitive element and the other of the source or drain of the first transistor.

7. a control circuit, a memory circuit electrically connected to the control circuit, a comparison circuit electrically connected to the memory circuit, a charging overcurrent detection circuit electrically connected to the memory circuit, and an overdischarging current detection circuit electrically connected to the memory circuit; the memory circuit includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor; one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; the other of the source and the drain of the second transistor is electrically connected to one of the source and the drain of the third transistor; one of a source and a drain of the third transistor is electrically connected to one electrode of the first capacitance element; the other electrode of the first capacitance element is electrically connected to the other of the source and the drain of the first transistor; one electrode of the first capacitance element is electrically connected to the other of the source and the drain of the second transistor; the other of the source and the drain of the first transistor is electrically connected to one electrode of the second capacitance element; a node is formed by a connection point between the other electrode of the first capacitance element, one electrode of the second capacitance element, and the other of the source or drain of the first transistor.

8. In claim 6 or 7, A semiconductor device including the memory circuit, the comparison circuit, the charging overcurrent detection circuit, and the overdischarging current detection circuit as an IC chip.

9. In claim 6 or 7, a first transistor, a second transistor, and a third transistor each having a metal oxide in which a channel formation region is formed, a first insulator on the metal oxide, a second insulator having a region in contact with a bottom and side surfaces of an opening in the first insulator, and a conductor arranged on a formation surface of the second insulator.

10. In any one of claims 6 to 9, the charging overcurrent detection circuit or the overdischarging current detection circuit is electrically connected to the node.

Images