A grinding composition and a method of using the same
The polishing composition with a nitride removal rate reducing agent and specific pH range addresses the challenge of high silicon nitride removal rates in CMP, achieving low defects and high selectivity for silicon oxide, enhancing semiconductor manufacturing efficiency.
Patent Information
- Application Number
- JP2021179817
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-11-06
- Filing Date
- 2021-11-02
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2041-11-02
AI Technical Summary
Conventional chemical mechanical polishing (CMP) slurries struggle with high silicon nitride removal rates and low selectivity between silicon oxide and silicon nitride, leading to defects and inefficiencies in semiconductor manufacturing processes like shallow trench isolation (STI).
A polishing composition comprising an abrasive, a nitride removal rate reducing agent, an acid or base, and water, with a pH range of 2 to 6.5, which includes a hydrophobic and hydrophilic moiety separated by alkylene oxide groups, and optionally a metal corrosion inhibitor, to achieve low silicon nitride removal rates and high selectivity for silicon oxide.
The composition provides minimal silicon nitride loss, low silicon oxide dishing, and reduced defects, ensuring high yield and planarity in semiconductor substrates, compatible with various abrasives and polishing conditions, and suitable for both FEOL and BEOL processes.
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Abstract
Description
Technical Field
[0001] Cross - Reference to Related Applications This application claims priority from U.S. Patent Application No. 17 / 091,260, filed on November 6, 2020, the content of which is hereby incorporated by reference in its entirety.
Background Art
[0002] The semiconductor industry is constantly driven to improve chip performance through further miniaturization of devices through process and integration innovations. Chemical mechanical polishing / planarization (CMP) is a powerful technique that enables many complex integration schemes at the transistor level, thereby facilitating improved chip density.
Summary of the Invention
Problems to be Solved by the Invention
[0003] Transistors are generally fabricated in the Front End of Line (FEOL) transistor fabrication steps. The FEOL material stack typically includes multiple stacks of metal gates and dielectric materials. Electrical insulation of the billions of active devices in each integrated circuit is a goal in the FEOL and can be achieved using a shallow trench isolation (STI) process. A part of the STI process is shown in FIG. 1 for demonstration purposes. As can be seen from FIG. 1, prior to the STI CMP process, a thermal silicon oxide film and SiN can be deposited on silicon (e.g., a silicon wafer) (FIG. 1(a)), and then these can be etched away to form trenches / insulation and "active" non-trench regions (to form transistor-containing regions) (FIG. 1(b)). Thereafter, these trench / insulation regions can be filled by depositing silicon oxide (e.g., TEOS) in the trenches (e.g., by plasma enhanced chemical vapor deposition (PECVD)) such that the active non-trench regions are insulated from each other by the silicon oxide in the trenches (FIG. 1(c)). Thereafter, the "over-deposited / excess" silicon oxide on the active non-trench regions can be selectively removed while maintaining the silicon oxide in the shallow trenches (FIG. 1(d)). The selective removal of silicon oxide is achieved by a shallow trench isolation (STI) chemical mechanical polishing / planarization (CMP) process, in which a CMP slurry composition (e.g., the CMP slurry composition described in the present disclosure) having a high material removal rate (MRR) selectivity of silicon oxide with respect to silicon nitride (e.g., SiN) is used to remove silicon oxide at a high rate, and preferably the silicon nitride (step-on layer) is substantially not removed. After the above STI CMP step, etching can be used to expose the silicon to complete the insulation and prevent adjacent transistors formed in the active non-trench regions (plural) from contacting each other, thereby preventing a short circuit in the electrical circuit.
[0004] Dielectric films widely used in STI are silicon nitride (e.g., SiN), silicon oxide (e.g., TEOS: tetraethyl orthosilicate), polysilicon (P-Si), silicon carbonitride (e.g., SiCN), and low-k / ultra-low k dielectric films (e.g., SiCOH). By introducing high-k metal gate technology at 45 nm and FinFET technology in 22 nm chip manufacturing, SiN, TEOS, SiCN, and P-Si films in FEOL have begun to be used more frequently and in more applications. In addition, in the Back End of Line (BEOL), it has been shown that the resistivity of conventional barrier materials (e.g., Ta / TaN or Ti / TiN) does not scale down efficiently for advanced sub-10 nm manufacturing nodes, so these barrier materials can be replaced with dielectrics such as SiN, TEOS, SiCN, and P-Si for various BEOL material stacks. Therefore, for both FEOL and BEOL, these dielectric films can be used as etch stop layers, capping materials, spacer materials, additional liners, diffusion / passivation barriers, hard masks, and / or stop-on layers.
[0005] Generally, dielectric films are used much more extensively in advanced semiconductor manufacturing. From the perspective of CMP, these assemblies incorporating dielectrics require polishing compositions (slurries) that act on / abrade and / or stop on these films, such as slurries that can remove SiN but not TEOS / P-Si (stop on), or slurries that can remove TEOS / p-Si but not SiN (stop on).
[0006] The present disclosure relates to a stable aqueous slurry that can achieve a very low polishing / removal rate for stop-on films (e.g., silicon nitride films, and related silicon and nitrogen-based films such as SiCN (silicon carbonitride)), and can selectively polish a wide range of materials (e.g., oxides such as silicon oxide) while achieving very low defects and surface roughness on these stop-on films. For example, the polishing compositions described in the present disclosure polish silicon oxide (e.g., SiO2) at a relatively high material removal rate (MRR), and can stop-on or polish at a very low rate for silicon nitride (e.g., SiN) or related films (e.g., tungsten and cobalt). For example, silicon oxides that can be removed with the polishing compositions described in the present disclosure include TEOS, thermal oxides (TOX) (e.g., produced by oxidation of bare silicon induced by an autoclave), silicon oxides formed by plasma PVD (plasma enhanced PVD) deposition (e.g., high density plasma or high aspect ratio plasma), silicon oxides formed by CVD deposition with post-plasma surface hardening, carbon-doped silicon oxides (SiOC), and silicon oxides formed by liquid application of an oxide precursor and subsequent curing induced by light or heat. In some examples, the target film to be removed at a high MRR may be a metal or a metal oxide or a metal nitride rather than a silicon oxide dielectric. General examples of metals, metal oxides, and metal nitrides include, for metals, copper, cobalt, ruthenium, aluminum, titanium, tungsten, and tantalum, for metal oxides, hafnium oxide, titanium oxide, aluminum oxide, zirconium oxide, and tantalum oxide, and, for nitrides of ruthenium, aluminum, titanium, tungsten, and tantalum. In such a case, the stop-on / low removal rate film can still be a silicon nitride film, and the polishing composition containing the nitride removal rate reducer according to the present disclosure can be used to achieve the desired selectivity.
Means for Solving the Problems
[0007] More specifically, the present disclosure relates to a polishing composition comprising an abrasive, a nitride removal rate reducing agent, an acid or a base, water, and optionally a metal corrosion inhibitor. The pH of the polishing composition described in the present disclosure can be in the range of 2 to 6.5, more specifically in the range of 2 to 4.5. The composition of the present disclosure can be diluted (e.g., at the point of use) to form a polishing composition without performance degradation. The present disclosure also discusses a method of polishing a semiconductor substrate using the polishing composition.
[0008] In one aspect, embodiments disclosed in the present disclosure relate to a polishing composition comprising at least one abrasive, at least one nitride removal rate reducing agent, an acid or a base, and water. The nitride removal rate reducing agent includes a hydrophobic portion containing a C4 - C40 hydrocarbon group and a hydrophilic portion containing at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group, and a phosphonate group, and the hydrophobic portion and the hydrophilic portion are separated by 0 to 10 alkylene oxide groups. The polishing composition has a pH in the range of about 2 to about 6.5.
[0009] In another aspect, embodiments disclosed in the present disclosure are a polishing composition comprising at least one abrasive, at least one nitride removal rate reducing agent comprising a hydrophobic portion and a hydrophilic portion, an acid or a base, and water, wherein the polishing composition has a pH of about 2 to about 6.5, and the polishing composition has a ratio of the removal rate of silicon oxide to the removal rate of silicon nitride of about 3:1 or more during polishing of a patterned wafer comprising at least one silicon nitride pattern overlaid with at least silicon oxide (and optionally other materials, e.g., metals or dielectrics).
[0010] In yet another aspect, embodiments disclosed in the present disclosure are polishing compositions comprising at least one abrasive, at least one nitride removal rate reducer comprising a hydrophobic portion and a hydrophilic portion, an acid or a base, and water, wherein the polishing composition has a pH of about 2 to about 6.5, and when polishing a patterned wafer comprising at least a silicon nitride pattern overlaid with at least silicon oxide with the polishing composition (wherein polishing exposes the silicon nitride pattern on the patterned wafer), the dishing of the silicon oxide is less than about 1000 angstroms, relating to the polishing composition.
[0011] In yet another aspect, embodiments disclosed in the present disclosure are polishing compositions comprising at least one abrasive, at least one nitride removal rate reducer comprising a hydrophobic portion and a hydrophilic portion, an acid or a base, and water, wherein the polishing composition has a pH of about 2 to about 6.5, and when polishing a patterned wafer comprising at least a silicon nitride pattern overlaid with at least silicon oxide with the polishing composition (wherein polishing exposes the silicon nitride pattern on the patterned wafer), the erosion of the silicon nitride is less than about 500 angstroms, relating to the polishing composition.
[0012] In yet another aspect, embodiments disclosed in the present disclosure relate to a method comprising applying the polishing composition described in the present disclosure to a substrate having at least silicon nitride and at least silicon oxide on a surface of the substrate; and contacting a pad with the surface of the substrate and moving the pad in relation to the substrate.
[0013] By synergistically using the abrasive, the nitride removal rate reducer, the optional dishing reducer, and the optional metal rust inhibitor in the same composition, unique advantages not seen in currently available slurries are provided. Among other things, these advantages include the following:
[0014] 1. The compositions described in the present disclosure can achieve a very low silicon nitride (e.g., SiN) removal rate. Excellent silicon nitride protection can be achieved by a judicious selection and formulation / addition amount (loading) of the silicon nitride removal rate reducer. Further, as demonstrated in the present disclosure, the low silicon nitride removal rate is observed for both blanket wafers (i.e., wafers containing only a silicon nitride film) and patterned wafers (i.e., wafers containing a silicon nitride film etched in a pattern and other films, e.g., TEOS).
[0015] 2. Due to the very low silicon nitride removal rate described above, minimal silicon nitride loss can be obtained, thereby obtaining a very low silicon nitride erosion on the patterned wafer after polishing.
[0016] 3. The composition can achieve a low silicon oxide dishing / step height. Dishing, metal surface roughness, and removal rate can be adjusted by a judicious selection and addition amount (loading) / concentration of a metal corrosion inhibitor and / or a dishing reducer.
[0017] 4. The composition is compatible with a wide range of abrasives. By particle modification, the zeta potential of the abrasive can be adjusted to further regulate the removal rate of the target film. Anionic abrasives, cationic abrasives, and neutral abrasives can all form a stable slurry having a higher silicon oxide removal rate and a relatively lower silicon nitride removal rate.
[0018] 5. The composition can form a slurry containing high-purity colloidal silica as an abrasive. This enables the production of a slurry having a low trace metal count and a low large particle count compared to wafers polished with conventionally used ceria abrasives (which generally produce a large number of defects on the polished wafers), which leads to a reduced number of defects on the polished wafers. In addition, the composition described in the present disclosure can address certain demerits of conventional silica-based STI CMP compositions, such as its high silicon nitride removal rate and low removal selectivity between silicon oxide and silicon nitride.
[0019] 6. The composition produces a low nitride removal rate over a variety of polishing conditions. For example, the silicon nitride removal rate remains low in both hard polishing pads (e.g., polyurethane-based pads) and soft polishing pads (e.g., polymeric pads with a low Shore D hardness value). In addition, it has been observed that the downforce and speed do not have a recognizable effect on the silicon nitride removal rate, which is a good CMP property since the stop-on-film behavior is non-Prestonian. The fact that the composition of the present disclosure shows little variation in the removal rate as a function of pressure and speed results in very good topography and high yield after polishing patterned wafers. In the language of the art, the composition of the present disclosure results in low values for silicon oxide dishing and step height, as well as low values for erosion / loss of silicon nitride.
[0020] The polishing compositions and concentrates described in this disclosure contrast with currently available modern slurries in that they provide performance sustenance in current generation integrated circuit substrates while at the same time exhibiting significant advantages for next generation substrates and integration schemes. The compositions of the present disclosure can successfully and efficiently remove various metal layers and dielectric layers with very high selectivity as compared to the removal of silicon nitride layers. The compositions can be used for shallow trench isolation (STI) processes, self-aligned contact processes, or other processes where a very low silicon nitride material removal rate is desired.
Brief Description of the Drawings
[0021]
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Modes for Carrying Out the Invention
[0022] The present disclosure relates to a polishing composition and a method of polishing a semiconductor substrate using the same. In some embodiments, the present disclosure relates to selectively polishing a silicon oxide surface as compared to a silicon nitride surface. Selectively polishing silicon oxide as compared to silicon nitride is a very important process in semiconductor manufacturing and is commonly performed in the shallow trench isolation (STI) process. Conventionally, STI polishing compositions (slurries) have achieved the necessary polishing performance (e.g., selectivity) in the STI process using ceria abrasives, because compositions using silica abrasives have not functioned properly heretofore (e.g., high silicon nitride removal rate). However, ceria abrasives are known to impart a high defect rate and a high scratch rate when used in polishing compositions due to their "inorganic and hard" nature. Furthermore, ceria-based polishing compositions have a shorter shelf life (e.g., lower storage capability, shorter usable period, and earlier expiration date), a shorter pot life (e.g., activity after opening the container and / or activity in a holding tank or distribution loop) than silica-based polishing compositions, and ceria has a greater price instability than silica. In addition, ceria contains rare earth metals and is more expensive than silica. The compositions according to the present disclosure enable the use of a softer silica abrasive than a ceria abrasive for STI slurries. The silica-containing polishing composition can provide a polished wafer surface with a very low defect rate while providing very good selectivity in the material removal rate (MRR) of silicon oxide (e.g., TEOS) as compared to silicon nitride (e.g., SiN). For this reason, the polishing composition according to the present application can increase the device yield of the wafer as compared to conventional polishing compositions using ceria abrasives.
[0023] The polishing composition described in the present disclosure may include (a) an abrasive, (b) a nitride removal rate reducing agent, (c) an acid or a base, (d) water, and optionally (e) a metal rust inhibitor and / or (f) a dishing reducing agent (e.g., an anionic dishing reducing agent). The polishing composition may have a pH of about 2 or more and about 6.5 or less. The polishing composition of the present disclosure can have high selectivity for the polishing of a dielectric or a metal as compared to the polishing of silicon nitride. The present disclosure also provides a method of using the polishing composition for polishing a semiconductor substrate. In particular, the present disclosure provides a method of polishing a dielectric or a metal with high selectivity as compared to silicon nitride.
[0024] In one or more embodiments, the at least one (e.g., two or three) abrasives is selected from a cationic abrasive, a substantially neutral abrasive, and an anionic abrasive. In one or more embodiments, the at least one abrasive is selected from the group consisting of alumina, silica, titania, ceria, zirconia, their co-formed products, coated abrasives, surface-modified abrasives, and mixtures thereof. In some embodiments, the at least one abrasive does not include ceria.
[0025] In one or more embodiments, the abrasive is a silica-based abrasive, e.g., an abrasive selected from the group consisting of colloidal silica, fumed silica, and mixtures thereof. In one or more embodiments, the abrasive has a surface modified by an organic group and / or a non-silica-based inorganic group. For example, a cationic abrasive may include a terminal group of formula (I): -O m -X-(CH2) n -Y (I) wherein m is an integer from 1 to 3, n is an integer from 1 to 10, X is Al, Si, Ti, or Zr, and Y is a cationic amino or thiol group. As another example, an anionic abrasive may include a terminal group of formula (I): -O m -X-(CH2) n -Y (I) Here, m is an integer from 1 to 3, n is an integer from 1 to 10, X is Al, Si, Ti, or Zr, and Y is an acid group. In some embodiments, the at least one abrasive is present in the polishing composition described in the present disclosure in an amount of about 0.05 wt% or more (e.g., about 0.1 wt% or more, about 0.5 wt% or more, about 1 wt% or more, about 2 wt% or more, about 3 wt% or more, or about 5 wt% or more) to about 20 wt% or less (e.g., about 15 wt% or less, about 10 wt% or less, about 8 wt% or less, about 6 wt% or less, about 4 wt% or less, or about 2 wt% or less) based on the total weight of the composition.
[0026] In one or more embodiments, the abrasive described in the present disclosure may have an average particle size of about 1 nm or more (e.g., about 5 nm or more, about 10 nm or more, about 20 nm or more, about 40 nm or more, about 50 nm or more, about 60 nm or more, about 80 nm or more, or about 100 nm or more) to about 1000 nm or less (e.g., about 800 nm or less, about 600 nm or less, about 500 nm or less, about 400 nm or less, or about 200 nm or less). In the present disclosure, the average particle size (MPS) is determined by dynamic light scattering technology.
[0027] In one or more embodiments, the at least one (e.g., two or three distinct) nitride removal rate reducing agent includes a hydrophobic moiety containing a C4 - C40 hydrocarbon group (e.g., containing an alkyl group and / or an alkenyl group), and a hydrophilic moiety containing at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group, and a phosphonate group. In one or more embodiments, the hydrophobic moiety and the hydrophilic moiety are separated by 0 to 10 (e.g., 1, 2, 3, 4, 5, 6, 7, 8, or 9) alkylene oxide groups (e.g., where n may be 1, 2, 3, or 4, -(CH2) nThey are separated by an (O-group). In one or more embodiments, in the nitride removal rate reducer, the hydrophobic portion and the hydrophilic portion are separated by 0 alkylene oxide groups. Without wishing to be bound by theory, the alkylene oxide groups in the nitride removal rate reducer cause slurry stability problems, and in some embodiments, it is considered not preferable for there to be alkylene oxide groups in the nitride removal rate reducer in order to increase the silicon nitride removal rate.
[0028] In one or more embodiments, the nitride removal rate reducer has a hydrophobic portion containing a hydrocarbon group having 4 or more carbon atoms (e.g., 6 or more carbon atoms (C6), 8 or more carbon atoms (C8), 10 or more carbon atoms (C10), 12 or more carbon atoms (C12), 14 or more carbon atoms (C14), 16 or more carbon atoms (C16), 18 or more carbon atoms (C18), 20 or more carbon atoms (C20), or 22 or more carbon atoms (C22)) and / or 40 or fewer carbon atoms (e.g., 38 or fewer carbon atoms (C38), 36 or fewer carbon atoms (C36), 34 or fewer carbon atoms (C34), 32 or fewer carbon atoms (C32), 30 or fewer carbon atoms (C30), 28 or fewer carbon atoms (C28), 26 or fewer carbon atoms (C26), 24 or fewer carbon atoms (C24), or 22 or fewer carbon atoms (C22)). The hydrocarbon groups referred to in this disclosure refer to groups containing only carbon atoms and hydrogen atoms, and may include both saturated groups (e.g., linear, branched, or cyclic alkyl groups) and unsaturated groups (e.g., linear, branched, or cyclic alkenyl groups; linear, branched, or cyclic alkynyl groups; or aromatic groups (e.g., phenyl or naphthyl)). In one or more embodiments, the hydrophilic portion of the nitride removal rate reducer contains at least one group selected from phosphate groups and phosphonate groups. The term "phosphonate group" is expressly intended to include phosphonic acid groups.
[0029] In one or more embodiments, the nitride removal rate reducer is selected from the group consisting of naphthalene sulfonic acid-formalin condensate, lauryl phosphate, myristyl phosphate, stearyl phosphate, octadecylphosphonic acid, oleyl phosphate, behenyl phosphate, octadecyl sulfate, lacceryl phosphate, ores-3 phosphate, and ores-10 phosphate.
[0030] In one or more embodiments, the nitride removal rate reducer is included in the polishing composition described in the present disclosure in an amount of about 0.1 ppm or more (e.g., about 0.5 ppm or more, about 1 ppm or more, about 5 ppm or more, about 10 ppm or more, about 25 ppm or more, about 50 ppm or more, about 75 ppm or more, or about 100 ppm or more) to about 1000 ppm or less (e.g., about 900 ppm or less, about 800 ppm or less, about 700 ppm or less, about 600 ppm or less, about 500 ppm or less, or about 250 ppm or less) based on the total weight of the composition.
[0031] In one or more embodiments, the polishing composition described in the present disclosure optionally further comprises at least one (e.g., two or three) dishing reducing agent (e.g., an anionic dishing reducing agent). In one or more embodiments, the at least one dishing reducing agent is a compound comprising at least one group selected from the group consisting of a hydroxy group, a sulfate group, a phosphonate group, a phosphate group, a sulfonate group, an amine group, a nitrate group, a nitrite group, a carboxylate group, and a carbonate group. In one or more embodiments, the at least one dishing reducing agent is at least one selected from the group consisting of polysaccharides and substituted polysaccharides. In one or more embodiments, the at least one dishing reducing agent is at least one selected from the group consisting of carrageenan, xanthan gum, hydroxypropyl cellulose, methyl cellulose, ethyl cellulose, hydroxypropyl methyl cellulose, and carboxymethyl cellulose. In one or more embodiments, the at least one nitride removal rate reducing agent and the at least one dishing reducing agent are chemically distinct from each other.
[0032] In one or more embodiments, the dishing reducing agent is included in the polishing composition described in the present disclosure in an amount of about 0.1 ppm or more (e.g., about 0.5 ppm or more, about 1 ppm or more, about 5 ppm or more, about 10 ppm or more, about 25 ppm or more, about 50 ppm or more, about 75 ppm or more, or about 100 ppm or more) to about 1000 ppm or less (e.g., about 900 ppm or less, about 800 ppm or less, about 700 ppm or less, about 600 ppm or less, or about 500 ppm or less) based on the total weight of the composition.
[0033] In one or more embodiments, the polishing composition described in the present disclosure optionally further comprises at least one (e.g., two or three) metal rust inhibitor. In one or more embodiments, the at least one metal rust inhibitor is a compound containing at least one group selected from the group consisting of a hydroxy group, a sulfate group, a phosphonate group, a phosphate group, a sulfonate group, an amine group, a nitrate group, a nitrite group, a carboxylate group, and a carbonate group. In one or more embodiments, the at least one metal rust inhibitor is at least one selected from the group consisting of an amino acid, a phosphonate surfactant, a phosphate surfactant, a sulfate surfactant, a sulfonate surfactant, a glucamide surfactant, an azole, an imide, an oxazole, a thiourea, and a Schiff base.
[0034] In one or more embodiments, the at least one metal rust inhibitor may be selected from substituted or unsubstituted benzotriazoles. Preferred classes of substituted benzotriazoles include benzotriazoles substituted with at least one substituent selected from the group consisting of an alkyl group, an aryl group, a halogen group, an amino group, a nitro group, an alkoxy group, and a hydroxy group. Substituted benzotriazoles also include those fused with one or more aryl (e.g., phenyl) or heteroaryl groups.
[0035] Suitable benzotriazoles for use as rust inhibitors include benzotriazole (BTA), 1-hydroxybenzotriazole, 5-phenylthiol-benzotriazole, 5-chlorobenzotriazole, 4-chlorobenzotriazole, 5-bromobenzotriazole, 4-bromobenzotriazole, 5-fluorobenzotriazole, 4-fluorobenzotriazole, naphthotriazole, tolyltriazole, 5-phenyl-benzotriazole, 5-nitrobenzotriazole, 4-nitrobenzotriazole, 2-(5-amino-pentyl)-benzotriazole, 1-amino-benzotriazole, 5-methylbenzotriazole, benzotriazole-5-carboxylic acid, 4-methylbenzotriazole, 4-ethylbenzotriazole, 5-ethylbenzotriazole, 4-propylbenzotriazole, 5-propylbenzotriazole, 4-isopropylbenzotriazole, 5-isopropylbenzotriazole, 4-n-butylbenzotriazole, 5-n-butylbenzotriazole, 4-isobutylbenzotriazole, 5-isobutylbenzotriazole, 4-pentylbenzotriazole, 5-pentylbenzotriazole, 4-hexylbenzotriazole, 5-hexylbenzotriazole, 5-methoxybenzotriazole, 5-hydroxybenzotriazole, dihydroxypropylbenzotriazole, 1-[N,N-bis(2-ethylhexyl)aminomethyl]-benzotriazole, 5-t-butylbenzotriazole, 5-(1’,1’-dimethylpropyl)-benzotriazole, 5-(1’1’3’-trimethylbutyl)benzotriazole, 5-n-octylbenzotriazole, and 5-(1’1’3’3’-tetramethylbutyl)benzotriazole.
[0036] In one or more embodiments, the at least one metal rust inhibitor may be selected from amino acids. Examples of such amino acids include glycine, alanine, histidine, glycine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, and tyrosine.
[0037] In one or more embodiments, the at least one metal rust inhibitor can be selected from C4-C10 phosphates and C4-C10 phosphonates. Examples of such phosphates include hexyl phosphate, hexyl ethyl phosphate, 2-ethylhexyl phosphate, butyl phosphate, triethyl phosphate, octyl phosphate, and decyl phosphate. Examples of the phosphonates include butylphosphonic acid, hexylphosphonic acid, octylphosphonic acid, and phosphonic acid.
[0038] In one or more embodiments, the at least one metal rust inhibitor is at least one selected from the group consisting of benzotriazole, histidine, glycine, hexyl phosphate, hexyl ethyl phosphate, 2-ethylhexyl phosphate, and alkyl-aryl sulfonic acid (such as dodecylbenzenesulfonic acid). In one or more embodiments, the at least one metal rust inhibitor is chemically distinct from the at least one nitride removal rate reducer, the acid, and / or the base described in the present disclosure.
[0039] In one or more embodiments, the metal rust inhibitor is present in the polishing composition described in the present disclosure in an amount of about 0.1 ppm or more (such as, about 0.5 ppm or more, about 1 ppm or more, about 5 ppm or more, about 10 ppm or more, about 25 ppm or more, about 50 ppm or more, about 75 ppm or more, or about 100 ppm or more) to about 1 wt% or less (such as, about 0.8 wt% or less, about 0.6 wt% or less, about 0.5 wt% or less, about 0.4 wt% or less, about 0.2 wt% or less, about 0.1 wt% or less, about 0.05 wt% or less, or about 0.02 wt% or less) based on the total weight of the composition. Without wishing to be bound by theory, it is believed that including a metal rust inhibitor in the polishing composition described in the present disclosure results in very low defects and very low surface roughness on a stop-on film (such as a SiN film).
[0040] In one or more embodiments, the acid is selected from the group consisting of formic acid, acetic acid, malonic acid, citric acid, propionic acid, malic acid, adipic acid, succinic acid, lactic acid, oxalic acid, hydroxyethylidene diphosphonic acid, 2-phosphono-1,2,4-butanetricarboxylic acid, aminotrimethylene phosphonic acid, hexamethylenediamine tetra(methylene phosphonic acid), bis(hexamethylene)triamine phosphonic acid, aminoacetic acid, peracetic acid, potassium acetate, phenoxyacetic acid, glycine, bicine, diglycolic acid, glyceric acid, tricine, alanine, histidine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, tyrosine, benzoic acid, nitric acid, sulfuric acid, sulfurous acid, phosphoric acid, phosphonic acid, hydrochloric acid, periodic acid, and mixtures thereof.
[0041] In one or more embodiments, the base is selected from the group consisting of potassium hydroxide, sodium hydroxide, cesium hydroxide, ammonium hydroxide, triethanolamine, diethanolamine, monoethanolamine, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, lithium hydroxide, imidazole, triazole, aminotriazole, tetrazole, benzotriazole, tolyltriazole, pyrazole, isothiazole, and mixtures thereof.
[0042] In one or more embodiments, the acid or base may be present in the polishing composition described in the present disclosure in an amount of about 0.01 wt% or more (e.g., about 0.05 wt% or more, about 0.1 wt% or more, about 0.5 wt% or more, or about 1 wt% or more) to about 10 wt% or less (e.g., about 8 wt% or less, about 6 wt% or less, about 5 wt% or less, about 4 wt% or less, or about 2 wt% or less) based on the total weight of the composition. For example, the acid or base can be added in an amount sufficient to adjust the pH of the polishing composition to a desired value.
[0043] In one or more embodiments, the water may be present (as a liquid medium or carrier) in the polishing composition described in the present disclosure in an amount of about 50 wt% or more (e.g., about 55 wt% or more, about 60 wt% or more, about 65 wt% or more, about 70 wt% or more, or about 75 wt% or more) to about 99.9 wt% or less (e.g., about 99.5 wt% or less, about 99 wt% or less, about 97 wt% or less, about 95 wt% or less, or about 90 wt% or less) based on the total weight of the composition.
[0044] In one or more embodiments, the polishing composition described in the present disclosure may have a pH of about 2 or more (e.g., about 2.5 or more, about 3 or more, about 3.5 or more, or about 4 or more) to about 6.5 or less (e.g., about 6 or less, about 5.5 or less, about 5 or less, or about 4.5 or less). Without wishing to be bound by theory, it is believed that polishing compositions having a pH above 6.5 may have the potential to reduce the silicon oxide / silicon nitride removal rate selectivity and may have stability issues.
[0045] In one or more embodiments, the polishing composition described in the present disclosure substantially does not contain one or more specific ingredients such as an organic solvent, a pH adjuster (e.g., an acid or a base), an amine, an alkali base (e.g., an alkali hydroxide), a fluorine-containing compound (e.g., a fluoride compound or a fluorinated compound (e.g., a fluorinated polymer / surfactant)), a silicon-containing compound such as a silane (e.g., an alkoxysilane), a nitrogen-containing compound (e.g., an amino acid, an amine, or an imine (e.g., amidines such as 1,8-diazabicyclo[5.4.0]-7-undecene (DBU) and 1,5-diazabicyclo[4.3.0]nona-5-ene (DBN))), a salt (e.g., a halide salt or a metal salt), a polymer (e.g., a nonionic, cationic, or anionic polymer, or a polymer other than a dishing reducer), a surfactant (e.g., a cationic surfactant, anionic surfactant, nonionic surfactant, or a surfactant other than a nitride removal rate reducer), a plasticizer, an oxidizing agent (e.g., H2O2), a quaternary ammonium compound (e.g., a salt such as a tetraalkylammonium salt and a hydroxide such as tetramethylammonium hydroxide), a corrosion inhibitor (e.g., an azole or a non-azole corrosion inhibitor), an electrolyte (e.g., a polymer electrolyte), and / or a specific abrasive (e.g., a ceria abrasive, a nonionic abrasive, a surface-modified abrasive, or a negatively / positively charged abrasive). Examples of the halide salt that may be excluded from the polishing composition include an alkali metal halide (e.g., sodium halide or potassium halide) or ammonium halide (e.g., ammonium chloride), which may be chloride, bromide, or iodide. In the present disclosure, an ingredient that the polishing composition "substantially does not contain" refers to an ingredient that is not intentionally added to the polishing composition. In some embodiments, in the polishing composition described in the present disclosure, one or more of the ingredients that are substantially not contained in the polishing composition may be about 1000 ppm or less (e.g., about 500 ppm or less, about 250 ppm or less, about 100 ppm or less, about 50 ppm or less, about 10 ppm or less, about 1 ppm or less).In some embodiments, the polishing composition described in the present disclosure may not contain any one or more of the above components.
[0046] In one or more embodiments, for the polishing composition described in the present disclosure, the ratio of the removal rate of silicon oxide (e.g., TEOS) to the removal rate of silicon nitride (i.e., removal rate selectivity) is at least about 3:1, or at least about 4:1, or at least about 5:1, or at least about 10:1, or at least about 25:1, or at least about 50:1, or at least about 60:1, or at least about 75:1, or at least about 100:1, or at least about 150:1, or at least about 200:1, or at least about 250:1, or at least about 300:1, or at least about 500:1, or at least about 750:1, or at least about 1000:1, or at least about 5000:1. In one or more embodiments, the above ratio is also applicable when measuring the removal rate in the case of polishing either a blanket wafer or a patterned wafer (i.e., a wafer including at least a silicon nitride pattern, with at least silicon oxide covering the silicon nitride pattern (and optionally other materials such as metal and dielectric covering it)).
[0047] In one or more embodiments, when polishing a patterning wafer (which may include at least a silicon nitride pattern covered thereon with at least silicon oxide) with the polishing composition (e.g., until the silicon nitride pattern on the patterning wafer is exposed by polishing), silicon oxide (e.g., TEOS) dishing of about 1000 angstroms or less, or about 500 angstroms or less, or 375 angstroms or less, or 250 angstroms or less, or 200 angstroms or less, or 100 angstroms or less, or 50 angstroms or less, and / or about 0 angstroms or more occurs. In one or more embodiments, when polishing a patterning wafer (which may include at least a silicon nitride pattern covered thereon with at least silicon oxide) with the polishing composition (e.g., until the silicon nitride pattern on the patterning wafer is exposed by polishing), silicon nitride erosion of about 500 angstroms or less, or about 400 angstroms or less, or about 300 angstroms or less, or about 250 angstroms or less, or about 200 angstroms or less, or about 100 angstroms or less, or about 75 angstroms or less, or about 65 angstroms or less, or about 50 angstroms or less, or about 32 angstroms or less, and / or about 0 angstroms or more occurs.
[0048] In one or more embodiments, when polishing a patterned wafer using the polishing composition according to the present disclosure, the planarization efficiency (i.e., the quotient obtained by dividing the amount of change in the silicon oxide step height by the amount of silicon oxide removed during polishing and multiplying the result by 100) is about 14% or more (e.g., about 20% or more, 30% or more, 38% or more, 40% or more, 46% or more, 50% or more, 60% or more, 70% or more, or 74% or more), and about 100% or less (e.g., about 99.9% or less, about 99% or less, about 95% or less, about 90% or less, about 80% or less, about 70% or less, or about 60% or less). In one or more embodiments, when polishing a patterned wafer using the polishing composition according to the present disclosure (e.g., a composition containing a silica abrasive and a nitride removal rate reducer), the total defect count on a patterned wafer having a diameter of 12 inches (i.e., about 300 mm) is 175 or less (e.g., 170 or less, 160 or less, 150 or less, 125 or less, 100 or less, 75 or less, 50 or less, 25 or less, 10 or less, or 5 or less). In the description of the present disclosure, the defects to be counted are those having a size of about 90 nm or more.
[0049] In one or more embodiments, the present disclosure relates to a polishing method that may include applying a polishing composition according to the present disclosure to a substrate (e.g., a wafer) having at least silicon nitride and silicon oxide on a substrate surface; and contacting a pad with the surface of the substrate and moving the pad in relation to the substrate. In some embodiments, when the substrate includes at least a silicon nitride pattern covered thereon with at least silicon oxide (e.g., silicon oxide in which other materials such as silicon-based dielectrics (e.g., silicon carbide, etc.), metals, metal oxides, metal nitrides, etc. are present), the method can remove at least a portion of the silicon oxide (e.g., the silicon oxide on the active non-trench region) to expose the silicon nitride. The terms "silicon nitride" and "silicon oxide" as described in the present disclosure are expressly intended to include both non-doped versions and doped versions of silicon nitride and / or silicon oxide. For example, in one or more embodiments, the silicon nitride and silicon oxide may each independently be doped with at least one dopant selected from carbon, nitrogen (in the case of silicon oxide), oxygen, hydrogen, or any other known dopant for silicon nitride or silicon oxide. Some examples of types of silicon oxide films include, by way of example, TEOS (tetraethyl orthosilicate), SiOC, SiOCN, SiOCH, SiOH, and SiON. Some examples of types of silicon nitride films include, by way of example, SiN (pure silicon nitride), SiCN, SiCNH, and SiNH.
[0050] In one or more embodiments, the method according to the present disclosure using a polishing composition may further include one or more additional steps for manufacturing a semiconductor device from a substrate treated with the polishing composition. For example, the method may include one or more of the following steps before the polishing method: (1) depositing silicon oxide (e.g., thermally oxidized silicon) on a substrate (e.g., a silicon wafer) to form a silicon oxide layer; (2) depositing silicon nitride on the silicon oxide layer to form a silicon nitride layer; (3) etching the substrate to form trenches and non-trench regions; and (4) depositing silicon oxide on the etched substrate to fill the trenches with silicon oxide. As another example, the method may include at least one additional step after the polishing method, the additional step being, for example, etching the substrate (e.g., removing silicon nitride and silicon oxide) to expose silicon and / or a silicon oxide or other heterogeneous film on the wafer substrate.
Example
[0051] Examples are provided to further illustrate the capabilities of the polishing compositions and methods of the present disclosure. The given examples are not intended to limit and should not be construed as limiting the scope of the present disclosure. All percent values described are by weight (wt%) unless otherwise noted. The nitride removal rate reducers described in the examples were obtained from various suppliers and in some cases may contain minor amounts of similar compounds having shorter or longer carbon chain lengths than those described in the tables below. The carbon chain lengths described in the tables identify the majority component of the nitride removal rate reducer.
[0052] Example 1: Demonstration of Nitride Stop In this example, the polishing compositions used in Samples 1A to 1F mainly contained 3 w / w% of a neutral colloidal silica abrasive, malonic acid as a pH adjuster, a nitride removal rate reducer (if present), and water as a liquid carrier. The pH of the polishing composition was 2.3. An Applied Materials Mirra CMP polisher was used at a downforce of 2 psi and a flow rate of 175 mL / min to polish a 200 mm blanket wafer with a silicon oxide (TEOS) film and a 200 mm blanket wafer with a silicon nitride (SiN) film.
[0053] Table 1; TEOS removal rate and SiN removal rate for each type of surfactant that reduces the nitride removal rate [Table 1] "EO" refers to ethylene oxide and "RR" refers to the removal rate.
[0054] The results in Table 1 show that the control polishing composition (without a nitride removal rate reducer) had a removal rate selectivity of 8 between silicon oxide and silicon nitride, and this value was too low for most applications that require a low rate for silicon nitride. However, when a nitride removal rate reducer was added, the silicon nitride removal rate of the polishing composition decreased to only 1 Å / min, and the removal rate selectivity increased to 868.
[0055] Example 2: Demonstration of the pH range and different abrasive surface charges In this example, the polishing compositions used in Samples 2A to 2I contained 3 w / w% colloidal silica abrasive, an organic acid as a pH adjuster, n-octadecylphosphonic acid, and water as a liquid carrier. n-Octadecylphosphonic acid is representative of the class of nitride removal rate reducing agents described in the present disclosure. Further, in this example, as shown in Table 2, the charge of the colloidal silica was varied by using neutral silica, cationic silica, and anionic silica. The pH of the polishing composition was varied from about 2.25 to about 4.25. An Applied Materials Mirra CMP polisher was used at a downforce of 2 psi and a flow rate of 175 mL / min against a Dow VP6000 pad to polish 200 mm blanket wafers with a silicon oxide (TEOS) film and 200 mm blanket wafers with a silicon nitride (SiN) film.
[0056] Table 2; TEOS removal rate and SiN removal rate for each pH for three types of silica [Table 2]
[0057] As shown in Table 2, the nitride removal rate reducing agent was able to adjust the silicon nitride removal rate in the pH range of about 2.25 to about 4.25 using neutral silica, cationic silica, and anionic silica. The robust nitride rate reduction by the system that is independent of the surface charge of the silica abrasive is surprising. For example, cationic abrasives are generally thought to be incompatible with anionic nitride removal rate reducing agents. In contrast, in this system, the slurry remained stable and the nitride removal rate reducing agent remained active.
[0058] Conventionally, the silicon nitride removal rate when using an anionic abrasive is generally very high (about 400 Å / min) and difficult to control. Significantly, the nitride removal rate reducer described in the present disclosure was able to significantly reduce the silicon nitride removal rate. This type of system can be useful when a high removal rate for films that are well polished by anionic abrasives (e.g., silicon carbide films) and a low removal rate for TEOS and silicon nitride are desired.
[0059] Example 3: Demonstration of the effects of the chain length and head type of the nitride removal rate reducer In this example, the polishing compositions used in Samples 3A - 3L contained 3 w / w% colloidal silica abrasive, malonic acid as a pH adjuster, the nitride removal rate reducer shown in Table 3, and water as a liquid carrier. The pH of the polishing composition was 2.25. Specifically, the nitride removal rate reducers used in Samples 3A - 3L contained the head types and hydrophobes described in Table 3 but did not contain alkylene oxide groups. Additionally, the nitride removal rate reducers used in Samples 3I, 3J, and 3K contained mixtures of surfactants in which lauryl / myristyl phosphate, stearyl phosphate, and lauroyl phosphate were the predominate components, respectively.
[0060] An Applied Materials Mirra CMP polisher was used at a downforce of 2 psi and a flow rate of 175 mL / min against a Dow VP6000 pad to polish 200 mm blanket wafers with a silicon oxide (TEOS) film and 200 mm blanket wafers with a silicon nitride (SiN) film.
[0061]
Table 3
[0062] As shown in Table 3, the size of the hydrophobic structure in the nitride removal rate reducer plays an important role in determining the efficiency of the reduction of the silicon nitride rate. Table 3 shows that among the agents tested, a chain length of 12 or more functioned best for efficient nitride stop under the test conditions. A carbon chain length of 12 or more in the nitride removal rate reducer (see Samples 3D, 3E, 3F, 3G, 3I, 3J, 3K, and 3L in Table 3) ensures a low SiN RR (typically less than 5 Å / min) and produces a high selectivity ratio of TEOS:SiN RR for the blanket film (greater than 250). Thus, such a polishing composition is ideally suited for STI CMP processes where a high selectivity ratio of silicon oxide to silicon nitride is desired.
[0063] Example 4: Demonstration of the Influence of Downforce In this example, the polishing compositions used in Samples 4A - 4C contained 3 w / w% colloidal silica abrasive, an organic acid as a pH adjuster, n - octadecylphosphonic acid, and water as a liquid carrier. The pH of the polishing composition was between 2 and 6.5. An Applied Materials Mirra CMP polisher was used at downforces of 2, 3, and 4 psi and a flow rate of 175 mL / min against a Dow IC1010 pad to polish 200 mm high - density plasma (HDP) silicon oxide - coated wafers, 200 mm tetraethylorthosilicate oxide (TEOS) - coated wafers, 200 mm borophosphosilicate glass (BPSG) - coated wafers, and 200 mm silicon nitride - coated wafers.
[0064] Table 4; HDP, TEOS, BPSG, and SiN Removal Rates per Downforce [Table 4]
[0065] As shown in Table 4, the silicon oxide films (HDP, TEOS, and BPSG) exhibit Prestonian behavior, while the silicon nitride removal rate exhibits non-Prestonian behavior and remained well-controlled regardless of the applied pressing force. In terms of CMP representation, the Prestonian behavior of the removal rate suggests that as the polishing pressure and / or angular velocity / rpm (revolutions per minute) of the polisher increases, the polishing rate also increases linearly. For high-speed target films, Prestonian behavior is desirable (here, silicon oxide films). Non-Prestonian behavior suggests that the polishing rate does not appreciably change even when the pressure or speed changes. Non-Prestonian behavior is somewhat desirable for stop-on films (here, SiN). As seen in Table 4, the removal rate of the silicon oxide film increases linearly / Prestonianly with the increase in the pressing force (for example, when the pressing force is increased from 2 to 3 and then to 4 psi pressure, the TEOS RR increases from 1835 to 2324 and then to 3140 Å / min). Conversely, the SiN (stop-on film) removal rate does not appreciably change even when the pressure increases (that is, when the pressing force is increased from 2 to 3 and then to 4 psi pressure, the SiN RR varies from 4 to 2 and then to 1 Å / min). In addition, this example demonstrates that the polishing composition has similar behavior in the films of the silicon oxide family defined above. For further clarity, in Table 4, we described three examples of silicon oxide films, HDP, TEOS, and BPSG. The polishing composition of the present disclosure works very effectively to provide a high material removal rate in all of various types of silicon oxide films. Similar experiments using examples of various types of silicon nitride films (SiN, SiCN, etc.) showed slurry stop behavior similar to that achieved in the SiN film described in Table 4. For simplicity in Table 4, only the rates for the SiN film are described.
[0066] Example 5: Demonstration of the Influence of the Pad In this example, the polishing compositions used in Samples 5A to 5C contained 3 w / w% colloidal silica abrasive, an organic acid as a pH adjuster, a nitride removal rate reducer, and water as a liquid carrier. The pH of the polishing composition was between 2 and 6.5. An Applied Materials Mirra CMP polisher was used at a downforce of 2 psi and a flow rate of 175 mL / min against a Dow VP6000 pad or a Fujibo H800 pad to polish 200 mm blanket wafers with a tetraethyl orthosilicate (TEOS) oxide film and 200 mm blanket wafers with a silicon nitride (SiN) film.
[0067] Table 5; TEOS Removal Rate and SiN Removal Rate for Each Pad and Nitride Removal Rate Reducer
Table 5
[0068] As shown in Table 5, the nitride removal rate reducer has an impact on silicon nitride protection. With the Dow VP6000 pad having a medium hardness, all samples (5A - 5C) provided effective nitride protection as evidenced by low SiN removal rates and high TEOS / SiN removal rate selectivity. However, with the softer Fujibo H800 pad, only the samples containing a nitride removal rate reducer with a long-chain saturated hydrophobic structure (5A, 5B) provided an effective nitride stop. Thus, this example demonstrates that the polishing compositions of the present disclosure work effectively with all types of polishing pads. Further, this example suggests a tendency for increased nitride protection when the nitride removal rate reducer contains a longer hydrophobic structure, is more saturated, and / or is more hydrophobic.
[0069] Example 6: Demonstration of the Effect of Rust Inhibitors In this example, the polishing compositions used in Samples 6a - 6g contained 2.25 w / w% colloidal silica abrasive, an organic acid as a pH adjuster, a nitride removal rate reducer, and water as a liquid carrier. Samples 6b - 6g also contained a metal corrosion inhibitor. The pH of all samples was 3.0. An Applied Materials Mirra CMP polisher was used at a downforce of 2 psi and a flow rate of 175 mL / min against a Fujibo H804 pad to polish 200 mm blanket wafers with tetraethylorthosilicate (TEOS) oxide film, 200 mm blanket wafers with silicon nitride (SiN) film, and 200 mm blanket wafers with tungsten (W) film. Additionally, cobalt (Co) coupons were placed in the samples heated to 60 °C for 30 minutes to measure the static etch rate (SER).
[0070] Table 6; TEOS Removal Rate and SiN Removal Rate per Pad and Nitride Removal Rate Reducer
Table 6
[0071] As shown in Table 6, the metal corrosion inhibitor has an impact on the tungsten removal rate. Specifically, this example demonstrates that lower tungsten removal rates were achieved when an azole compound (6b), amino acids (6c, 6d), short-chain phosphate surfactants (6e, 6f), and sulfonic acid surfactants (6g) were used as metal corrosion inhibitors.
[0072] Typically, cobalt has a high static etching rate in acidic solutions. This example demonstrates that the addition of the metal corrosion inhibitor described in the present disclosure significantly reduced the cobalt static etching rate.
[0073] Example 7: Demonstration of Concentrates In this example, the polishing compositions used in Samples 7A - 7C included a concentrate corresponding to a formulation in use containing 3 w / w% neutral colloidal silica abrasive, an organic acid and / or potassium hydroxide as a pH adjuster, n - octadecylphosphonic acid, and water as a liquid carrier. The single - pot solution contained all the components necessary for polishing, while the two - part system contained all components except the organic acid. The mean particle size (MPS) is a reliable indicator of slurry stability. In an unstable system, the particles aggregated over time, causing a measurable MPS growth. The MPS was measured using a Malvern tool with dynamic light scattering technology. The slurry was stored in an oven set at 60 °C and measured every 7 days. According to the Arrhenius relationship for the accelerated aging test, over the entire 21 - day test run, it corresponded approximately to one year of aging at room temperature. In other words, if the slurry was held at 60 °C for 21 days and the MPS of the silica did not grow appreciably, the slurry could be certified to have a one - year real - time shelf life / expiration date.
[0074] Table 7; Accelerated Aging (60 °C) of Slurry Concentrates
Table 7
[0075] As shown in Table 7, all formulations were stable throughout the entire test run. Stability in the acidic region of neutral silica is typically difficult to achieve. The single - pot solution was stable at a pH of about 2 to about 6.5 at 2× concentration (selected data shown in Table 7) and other concentration levels (e.g., up to 3×, 4×, and 10× concentration) (not shown in the table). In the two - part solution (7C), all components except the acid could be more highly concentrated and remained stable (remained stable up to ×10). At the time of use, acid and water were added to reconstruct the slurry before running it on the polishing tool.
[0076] Example 8: Demonstration of Removal Rate Selectivity for Patterned Wafers In this example, the polishing compositions used in Samples 8A, 8B, and 8C containing colloidal silica abrasive and the nitride removal rate reducing agents shown in Tables 1, 3, and 5 were used to polish a 200 mm STI patterned wafer in which the patterned silicon nitride was filled with high density silicon oxide as shown in FIG. 2. The patterns in the silicon nitride were of a variety of pitches and densities with a wide array of line space, square, checker, and mesh arrays being placed across the entire wafer surface.
[0077] Polishing was performed on an Applied Materials 200 mm Mirra polishing tool equipped with a Dow VP6000 pad and a 3M A165 CIP1 conditioning disk using a wafer back pressure of 2 psi. The polishing time was varied based on in-situ endpoint detection by both motor torque and red laser (650 nm) absorbance. The features in both of these endpoint signals indicating removal of silicon oxide in the active lines of the film stack and exposure of the underlying silicon nitride could be observed during polishing. The removal rate of the patterned silicon oxide was calculated based on dividing the amount of material removed prior to exposure of the silicon nitride by the polishing time. On the other hand, the removal rate of the patterned silicon nitride was calculated by dividing the amount of material removed by the time since the silicon nitride was exposed to the polishing composition. At the completion of polishing, the wafers were cleaned using a Fujifilm Wako 8901 post-CMP cleaning chemistry in a 200 mm on-track post-CMP cleaning tool (obtained from Lam Research company). Film thickness measurements for all wafers (e.g., film thickness measurements for removal rate determination) were measured using a KLA Tencor F5X ellipsometer.
[0078]
Table 8
[0079] From the data shown in Table 8, the high selectivity between the silicon oxide material removal rate and the silicon nitride material removal rate previously observed in the blanket wafer is also observed in the patterned wafer including silicon oxide (top) and silicon nitride (bottom). As can be seen in Table 8, for Sample 8A, the selectivity of silicon oxide to silicon nitride varies from 86 to 190 depending on the pattern size, density, and pitch. For Sample 8B, the selectivity of silicon oxide to silicon nitride is 54, and for Sample 8C, the selectivity is 4. Table 8 only gives an exemplary example of the performance of the patterned wafer. In our in-house experiments, it has been observed that the selectivity ratio in the patterned test wafer varies from 3 (this value is considered satisfactory for the patterned wafer) to about 1000 depending on the complexity of the film. Furthermore, the selectivity of the polishing composition containing the nitride removal rate reducer described herein exceeds the selectivity of many of the previously presented, legacy, industry-standard, commercially available, ceria-based STI polishing compositions.
[0080] Example 9: Demonstration of Dishing and Erosion of Patterned Wafers In this example, a pattern-formed wafer similar to that used in Example 8 was measured with an atomic force microscope tool from Park Systems to quantify silicon oxide dishing / step height and silicon nitride erosion / loss at the endpoint. The polishing compositions used in Samples 9A and 9B contained the nitride removal rate reducers shown in Tables 1, 3, and 5, and the stack was used to polish the pattern-formed wafer shown in FIG. 2. The results of silicon oxide dishing / step height and silicon nitride erosion / loss are shown in Table 9. The planarization efficiency (PE) is reported as a percentage, which is equal to the change in the step height of the silicon oxide divided by the amount of oxide removed during polishing and multiplied by 100 (to convert to a percentage).
[0081] Table 9; Pattern-Formed Wafer Dishing and Erosion
Table 9
[0082] As can be seen from Table 9, silicon oxide dishing and silicon nitride erosion are very small. Typically, very small numbers are preferred for dishing and erosion. The dishing number and the erosion number represent the flatness of the final topography of the patterned wafer after CMP polishing. And since these numbers are indicators of the separation between the peaks and valleys of the films on a wafer containing multiple film types in the patterned wafer, it is desirable for these numbers to be small (in Å). The smaller the number, the smaller the separation between the peak and the valley, suggesting that the wafer surface is flatter, and this flatness is the overall goal of the CMP process step in semiconductor manufacturing. Ideally, it is preferred that the values of dishing and erosion be 0 (suggesting a completely flat wafer surface). However, conventionally, on a patterned wafer which is an actual device / product, these numbers are generally in the range of several hundreds of Å or several thousands of Å. Therefore, the data shown in Table 9 indicates that the polishing composition provides unique / unusual performance in terms of very low dishing values and very low erosion values, and thus very good topography of the patterned wafer. As can be seen from Table 9, the silicon oxide dishing can be as low as 35 Å or as high as 375 Å. The erosion number is 30 Å at the low end and 74 Å at the high end, so the SiN erosion is much better than the dishing. Again, these are representative examples, and in our experiments, we also observed dishing numbers and erosion numbers as high as 1000 Å and as low as 1 Å, but these are still satisfactory for the purposes of the present invention and acceptable to semiconductor manufacturers.
[0083] Regarding the planarization efficiency (PE), the larger the number, the better the result. Ideally, 100% PE is desired, because this means that the entire wafer is already planarized and flat, that is, there is no step height between the peaks and valleys. From the data in Table 9, it can be seen that the PE varies widely from a low value of 14% to 74%. Therefore, these polishing compositions provide good planarization efficiency on the patterned wafers.
[0084] Again, the data shown in Table 9 also shows that the polishing compositions presented in the present disclosure outperform the oxide dishing, silicon nitride erosion, and planarization efficiency of the state-of-the-art, commercially available, ceria-based STI polishing compositions.
[0085] Example 10: Demonstration of Defectivity of Patterned Wafers after Polishing In this example, the defectivity of patterned wafers similar to those used in Examples 8 and 9 was measured using a KLA AIT XUV defect counter tool with a commercially available ceria-based STI formulation and Composition 8A described in Example 8 (which is a silica-based polishing composition containing a nitride removal rate reducer). The wafer map of the wafer polished with Composition 8A is shown in Figure 3. The wafer map of the wafer polished with the commercially available ceria-based STI polishing composition is shown in Figure 4.
[0086] As demonstrated in FIG. 4, due to the relative hardness and size of the abrasive, the ceria-based formulation was prone to severe arc-shaped scratches and numerous defects spreading across the entire wafer (total defect count exceeding 10,000). Upon closer examination of the defects, it was shown that there were many macro and micro scratches with numerous residues, many of which were considered to be overall device killing defects. However, FIG. 3 shows that the polishing composition 8A containing high-purity colloidal silica as the abrasive has significantly fewer scratches than the ceria-based composition (FIG. 4). In fact, the silica polishing composition is nearly "defect-free" and exhibits a normal surface. The total defect count is approximately 175 for defects sized 90 nm or greater. Defects are important for the final device yield and the production of salable chips. In the patterned wafer shown in FIG. 4, assume that there are 1000 dies (each square) per patterned wafer. Each die with a defect may not be salable if the defect is a device killer defect. Therefore, since the ceria-based polishing composition shows a large number of defects, the yield of salable chips per wafer is low. On the other hand, in the case of the polishing composition of the present disclosure, the defects are significantly fewer, and the yield of salable chips per wafer is significantly higher.
[0087] Therefore, the low defect level obtained using the polishing composition of the present disclosure is highly attractive to semiconductor companies. This is because the low defect level increases the top and bottom lines of their revenues. From a technical perspective, ceria abrasives are inorganic in nature (e.g., lanthanide cerium metal-based oxides), generally harder and larger in size than silica abrasives, and thus tend to cause a large number of scratches and defects on the wafer surface. Conversely, colloidal silica abrasives are organic in nature (silicon non-metal-based oxides in colloidal dispersion form), generally soft, and therefore do not produce scratches or defects during polishing.
[0088] Those skilled in the art have not been able to develop a silica-based STI polishing composition having satisfactory removal selectivity of silicon oxide compared to silicon nitride. As described in the present disclosure, the inventors have found a synergistic combination of silica and a silicon nitride removal rate reducer that can supply a silica-based STI polishing composition to the industry. In addition, the invention described in the present disclosure is applicable to abrasives other than silica (e.g., alumina, titania, etc.).
[0089] Although the present disclosure has been described with reference to the examples described herein, it should be understood that other modifications and variations are possible without departing from the spirit and scope of the disclosure as defined in the appended claims.
[0090] Example 11: Demonstration of Improved Defectivity of Rust Inhibitor In this example, a silicon nitride (SiN) blanket wafer was polished with a slurry containing 1.5 w / w% colloidal silica abrasive, an organic acid as a pH adjuster, n-octadecylphosphonic acid, a rust inhibitor (described in the following table), and water as a liquid carrier. At the end of polishing, the wafer was cleaned with a 200 mm on-track post-CMP cleaning tool (obtained from Lam Research company) using Fujifilm Wako 8901 post-CMP cleaning chemistry. The particle defect count was measured with a KLA AIT XUV defect counter tool.
[0091] Table 10; Total Defect Count on Silicon Nitride Blanket Wafer
Table 10
[0092] As shown in Table 10, the addition of the rust inhibitor reduces the total defect count by 50 - 88%. This example demonstrates that short-chain (C6 - C8) and medium-chain (C12) anionic surfactants can effectively reduce the total defect count on the SiN film after polishing. The reduction of defectivity after CMP is extremely important for obtaining a high device yield. This example shows the effectiveness of the rust inhibitor in improving the yield. [1] At least one abrasive; A hydrophobic moiety containing a C4-C40 hydrocarbon group, and A hydrophilic moiety containing at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group, and a phosphonate group, wherein the hydrophobic moiety and the hydrophilic moiety are separated by 0 to 10 alkylene oxide groups; At least one nitride removal rate reducing agent; At least one metal rust inhibitor different from the at least one nitride removal rate reducing agent, wherein the metal rust inhibitor includes an amino acid, a phosphonate surfactant, a phosphate surfactant, a sulfate surfactant, a sulfonate surfactant, a glucamide surfactant, an azole, an imide, an oxazole, a thiourea, or a Schiff base; An acid or a base; and Water; A polishing composition comprising the above and having a pH in the range of about 2 to about 6.5. [2] The polishing composition according to [1] above, wherein the at least one metal rust inhibitor includes benzotriazole, histidine, glycine, hexyl phosphate, hexyl ethyl phosphate, 2-ethylhexyl phosphate, or dodecylbenzene sulfonic acid. [3] The polishing composition according to [1] above, wherein the at least one metal rust inhibitor is present in an amount of about 0.1 ppm to about 1% by weight based on the composition. [4] The polishing composition according to [1] above, wherein the hydrophobic moiety contains a C12-C32 hydrocarbon group. [5] The polishing composition according to [4] above, wherein the hydrophobic moiety contains a C16-C22 hydrocarbon group. [6] The polishing composition according to [1] above, wherein the hydrophilic moiety contains a phosphate group or a phosphonate group. [7] The polishing composition according to [1] above, wherein the at least one nitride removal rate reducing agent is selected from the group consisting of naphthalene sulfonic acid-formalin condensate, lauryl phosphate, myristyl phosphate, stearyl phosphate, octadecylphosphonic acid, oleyl phosphate, behenyl phosphate, octadecyl sulfate, lacceryl phosphate, ores-3 phosphate, and ores-10 phosphate. [8] The polishing composition according to [1], wherein the at least one nitride removal rate reducing agent has 0 alkylene oxide groups separating the hydrophobic portion and the hydrophilic portion. [9] The polishing composition according to [1], wherein the at least one nitride removal rate reducing agent is present in an amount of about 0.1 ppm to about 1000 ppm based on the composition.
[10] The polishing composition according to [1], wherein the ratio of the removal rate of silicon oxide to the removal rate of silicon nitride is about 3:1 or more.
[11] The polishing composition according to [1], wherein the ratio of the removal rate of silicon oxide to the removal rate of silicon nitride is about 100:1 or more.
[12] The polishing composition according to [1], wherein the at least one abrasive is selected from the group consisting of a cationic abrasive, a substantially neutral abrasive, and an anionic abrasive.
[13] The polishing composition according to
[12] , wherein the at least one abrasive is selected from the group consisting of alumina, silica, titania, ceria, zirconia, their co-formed products, coated abrasives, surface-modified abrasives, and mixtures thereof.
[14] The polishing composition according to [1], wherein the at least one abrasive is present in an amount of about 0.05 wt% to about 20 wt% based on the composition.
[15] The composition according to [1], wherein the acid is selected from the group consisting of formic acid, acetic acid, malonic acid, citric acid, propionic acid, malic acid, adipic acid, succinic acid, lactic acid, oxalic acid, hydroxyethylidene diphosphonic acid, 2-phosphono-1,2,4-butanetricarboxylic acid, aminotrimethylene phosphonic acid, hexamethylenediamine tetra(methylene phosphonic acid), bis(hexamethylene)triamine phosphonic acid, aminoacetic acid, peracetic acid, potassium acetate, phenoxyacetic acid, glycine, bicine, diglycolic acid, glyceric acid, tricine, alanine, histidine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, tyrosine, benzoic acid, nitric acid, sulfuric acid, sulfurous acid, phosphoric acid, phosphonic acid, hydrochloric acid, periodic acid, and mixtures thereof.
[16] The base is selected from the group consisting of potassium hydroxide, sodium hydroxide, cesium hydroxide, ammonium hydroxide, triethanolamine, diethanolamine, monoethanolamine, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, lithium hydroxide, imidazole, triazole, aminotriazole, tetrazole, benzotriazole, tolyltriazole, pyrazole, isothiazole, and mixtures thereof, and the composition according to [1] above.
[17] Applying the polishing composition according to [1] above to a substrate having at least silicon nitride and at least silicon oxide on the surface of the substrate; and, Bringing a pad into contact with the surface of the substrate and moving the pad in relation to the substrate, A method comprising.
[18] The method according to
[17] above, wherein at least one of the silicon nitride and the silicon oxide is doped with at least one dopant selected from the group consisting of carbon, nitrogen, oxygen, and hydrogen.
[19] The method according to
[18] above, further comprising forming a semiconductor device from the substrate.
Claims
1. At least one abrasive; A hydrophobic moiety containing a C12 - C40 hydrocarbon group, And a hydrophilic moiety containing at least one group selected from the group consisting of a sulfinite group, a sulfate group, a sulfonate group, a carboxylate group, a phosphate group, and a phosphonate group, Wherein the hydrophobic moiety and the hydrophilic moiety are separated by 0 to 10 alkylene oxide groups, At least one nitride removal rate reducing agent; At least one metal rust inhibitor different from the at least one nitride removal rate reducing agent, where the metal rust inhibitor includes an amino acid, a phosphonate surfactant, a phosphate surfactant, a sulfate surfactant, a sulfonate surfactant, a glucamide surfactant, an imide, a thiourea, or a Schiff base; An acid or a base; and Water; Containing, Having a pH in the range of 2 to 6.5, A polishing composition in which the polishing rate of the polishing composition with respect to tungsten and / or cobalt is suppressed.
2. The polishing composition according to claim 1, wherein the at least one metal rust inhibitor includes histidine, glycine, hexyl phosphate, hexyl ethyl phosphate, 2 - ethylhexyl phosphate, or dodecylbenzenesulfonic acid.
3. The polishing composition according to claim 1, wherein the at least one metal rust inhibitor is present in an amount of 0.1 ppm to 1 wt% with respect to the polishing composition.
4. The polishing composition according to claim 1, wherein the hydrophobic moiety contains a C12 - C32 hydrocarbon group.
5. The polishing composition according to claim 4, wherein the hydrophobic moiety contains a C16 - C22 hydrocarbon group.
6. The polishing composition according to claim 1, wherein the hydrophilic moiety contains a phosphate group or a phosphonate group.
7. The polishing composition according to claim 1, wherein the at least one nitride removal rate reducing agent is selected from the group consisting of naphthalenesulfonic acid - formalin condensate, lauryl phosphate, myristyl phosphate, stearyl phosphate, octadecylphosphonic acid, oleyl phosphate, behenyl phosphate, octadecyl sulfate, lacceryl phosphate, ores - 3 phosphate, and ores - 10 phosphate.
8. The polishing composition according to claim 1, wherein the at least one nitride removal rate reducing agent has 0 alkylene oxide groups separating the hydrophobic portion and the hydrophilic portion.
9. The polishing composition according to claim 1, wherein the at least one nitride removal rate reducing agent is present in an amount of 0.1 ppm to 1000 ppm with respect to the polishing composition.
10. The polishing composition according to claim 1, wherein the ratio of the removal rate of silicon oxide to the removal rate of silicon nitride is 3:1 or more.
11. The polishing composition according to claim 1, wherein the ratio of the removal rate of silicon oxide to the removal rate of silicon nitride is 100:1 or more.
12. The polishing composition according to claim 1, wherein the at least one abrasive is selected from the group consisting of a cationic abrasive, a substantially neutral abrasive, and an anionic abrasive.
13. The polishing composition according to claim 12, wherein the at least one abrasive is selected from the group consisting of alumina, silica, titania, ceria, zirconia, their co-formed products, coated abrasives, surface-modified abrasives, and mixtures thereof.
14. The polishing composition according to claim 1, wherein the at least one abrasive is present in an amount of 0.05 wt% to 20 wt% with respect to the polishing composition.
15. The acid is formic acid, acetic acid, malonic acid, citric acid, propionic acid, malic acid, adipic acid, succinic acid, lactic acid, oxalic acid, hydroxyethylidene diphosphonic acid, 2-phosphono-1,2,4-butanetricarboxylic acid, aminotrimethylene phosphonic acid, hexamethylenediamine tetra(methylene phosphonic acid), bis(hexamethylene)triamine phosphonic acid, aminoacetic acid, peracetic acid, potassium acetate, phenoxyacetic acid, glycine, bicine, diglycolic acid, glyceric acid, tricine, alanine, histidine, valine, phenylalanine, proline, glutamine, aspartic acid, glutamic acid, arginine, lysine, tyrosine, benzoic acid, nitric acid, sulfuric acid, sulfurous acid, phosphoric acid, phosphonic acid, hydrochloric acid, periodic acid, and mixtures thereof, and the polishing composition according to claim 1.
16. The base in the polishing composition according to claim 1 is selected from the group consisting of potassium hydroxide, sodium hydroxide, cesium hydroxide, ammonium hydroxide, triethanolamine, diethanolamine, monoethanolamine, tetrabutylammonium hydroxide, tetramethylammonium hydroxide, lithium hydroxide, imidazole, triazole, aminotriazole, tetrazole, benzotriazole, tolytriazole, pyrazole, isothiazole, and mixtures thereof.
17. The at least one metal rust inhibitor includes histidine, glycine, hexyl phosphate, hexyl ethyl phosphate, 2-ethylhexyl phosphate, or dodecylbenzenesulfonic acid. The at least one nitride removal rate reducer in the polishing composition according to claim 1 is selected from the group consisting of naphthalenesulfonic acid-formalin condensate, lauryl phosphate, myristyl phosphate, stearyl phosphate, octadecylphosphonic acid, oleyl phosphate, behenyl phosphate, octadecyl sulfate, lacceryl phosphate, ores-3 phosphate, and ores-10 phosphate.
18. Applying the polishing composition according to claim 1 to a substrate having at least silicon nitride and at least silicon oxide on a surface of the substrate; and Bringing a pad into contact with the surface of the substrate and moving the pad in relation to the substrate. A method comprising the above steps.
19. In the method according to claim 18, at least one of the silicon nitride and the silicon oxide is doped with at least one dopant selected from the group consisting of carbon, nitrogen, oxygen, and hydrogen.
20. The method according to claim 19 further includes forming a semiconductor device from the substrate.
Citation Information
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