Battery pack

Abstract

In a configuration in which secondary batteries are connected in parallel, excessive current flowing between the secondary batteries is suppressed. [Solution] A secondary battery protection circuit that protects a secondary battery from overcharging by blocking a charging path between an electrode of the secondary battery and a terminal of a load and charger using a charging control transistor inserted in series in the charging path, and protects the secondary battery from over-discharging by blocking the discharging path using a discharging control transistor inserted in series in the discharging path between the electrode and the terminal, and comprises a potential difference detection circuit that outputs a potential difference detection signal in accordance with the potential difference between the electrode and the terminal, and a potential difference control circuit that, when the overcharging is detected by the overcharge detection circuit or the over-discharging is detected by the over-discharge detection circuit, feeds back the potential difference detection signal to the control terminal of the charging control transistor or the discharge control transistor to control the potential difference.

Description

Technical Field

[0001] The present disclosure relates to a secondary battery protection circuit, a battery pack, a battery system, and a secondary battery protection method.

Background Art

[0002] Conventionally, a battery pack incorporating a secondary battery protection integrated circuit that protects a secondary battery from over-discharge or the like by turning off a transistor inserted in series in the current path between the negative electrode of the secondary battery and the minus terminal connected to the ground of the load or charger is known (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in a configuration in which a plurality of battery packs each including a secondary battery are connected in parallel, when returning from a protection operation state against overcharge or over-discharge, an excessive current may occur between the secondary batteries of the battery packs connected in parallel.

[0005] The present disclosure provides a secondary battery protection circuit, a battery pack, a battery system, and a secondary battery protection method capable of suppressing an excessive current flowing between secondary batteries in a configuration in which secondary batteries are connected in parallel.

Means for Solving the Problems

[0006] In one aspect of the present disclosure, A secondary battery protection circuit that protects a secondary battery from overcharging by interrupting a charging path by a charging control transistor inserted in series in a charging path between an electrode of the secondary battery, a load, and a terminal of a charger, and protects the secondary battery from overdischarging by interrupting the discharging path by a discharging control transistor inserted in series in a discharging path between the electrode and the terminal, comprising: an overcharge detection circuit that detects overcharging of the secondary battery; an overdischarge detection circuit that detects overdischarging of the secondary battery; a potential difference detection circuit that outputs a potential difference detection signal according to a potential difference between the electrode and the terminal; a potential difference control circuit that feeds back the potential difference detection signal to a control terminal of the charging control transistor or the discharging control transistor to control the potential difference when the overcharging is detected by the overcharge detection circuit or the overdischarging is detected by the overdischarge detection circuit. A secondary battery protection circuit is provided.

Advantages of the Invention

[0007] According to one aspect of the present disclosure, in a configuration in which secondary batteries are connected in parallel, an excessive current flowing between the secondary batteries can be suppressed.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

Figure 19

Embodiments for Carrying Out the Invention

[0009] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0010] <First Embodiment> FIG. 1 is a diagram showing a configuration example of a battery system according to the first embodiment. FIG. 1 shows a configuration example in which a load 90 and a charger 91 are connected to a battery system 301 according to the first embodiment. The battery system 301 shown in FIG. 1 includes a plurality (two in this example) of battery packs 100 and 200 connected in parallel. Since the battery pack 200 has the same configuration as the battery pack 100, the description of the configuration of the battery pack 200 will be omitted by referring to the description of the battery pack 100.

[0011] The battery pack 100 includes a secondary battery 70 and a battery protection device 80 built therein.

[0012] The secondary battery 70 is an example of a rechargeable battery. The secondary battery 70 supplies power to a load 90 connected to terminals PP and PM. The secondary battery 70 can be charged by a charger 91 connected to terminals PP and PM. Specific examples of the secondary battery 70 include lithium-ion batteries and lithium polymer batteries. The battery packs 100 and 200 may be built in the load 90 or externally attached.

[0013] Load 90 is an example of a load that uses the secondary battery 70 of the battery packs 100 and 200 as a power source. Specific examples of load 90 include electronic devices such as mobile phones, smartphones, and tablets. Load 90 is not limited to these devices.

[0014] The battery protection device 80 is an example of a secondary battery protection device that operates using the secondary battery 70 as a power source, and protects the secondary battery 70 from overcharging, overdischarging, etc. by controlling the charging and discharging of the secondary battery 70. The battery protection device 80 includes a terminal PP, a terminal PM, a terminal BP, a terminal BM, a switch circuit 3, and a battery protection circuit 10.

[0015] Terminal PP is an example of a positive load terminal, to which the high-potential power terminals of load 90 and charger 91 are connected. Terminal PM is an example of a negative load terminal, to which the low-potential power terminals of load 90 and charger 91 are connected. Terminal BP is an example of a battery positive terminal, which is connected to the positive electrode 71 of the secondary battery 70. Terminal BM is an example of a battery negative terminal, which is connected to the negative electrode 72 of the secondary battery 70.

[0016] Terminal BP and terminal PP are connected by a positive-side current path 9a. The positive-side current path 9a is a power path between terminal BP and terminal PP, through which a charging current or a discharging current flows. The positive-side current path 9a is an example of a charging / discharging current path between the positive electrode 71 of the secondary battery 70 and terminal PP.

[0017] Terminal BM and terminal PM are connected by a negative-side current path 9b. The negative-side current path 9b is a current path between terminal BM and terminal PM, through which a charging current or a discharging current flows. The negative-side current path 9b is an example of a charging / discharging current path between the negative electrode 72 of the secondary battery 70 and terminal PM.

[0018] The switch circuit 3 is inserted in series into the negative-side current path 9b between the terminal BM and the terminal PM. The switch circuit 3 includes, for example, a charge control transistor 1 and a discharge control transistor 2, and is a series circuit in which the charge control transistor 1 and the discharge control transistor 2 are connected in series. The charge control transistor 1 is an example of a charge path cutoff section that cuts off the charge path of the secondary battery 70, and the discharge control transistor 2 is an example of a discharge path cutoff section that cuts off the discharge path of the secondary battery 70. In the case of FIG. 1, the charge control transistor 1 cuts off the current path 9b through which the charging current of the secondary battery 70 flows, and the discharge control transistor 2 cuts off the current path 9b through which the discharge current of the secondary battery 70 flows. The transistors 1 and 2 are switching elements that switch the conduction / non-conduction of the current path 9b and are inserted in series into the current path 9b. The transistors 1 and 2 are, for example, N-channel type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

[0019] The charge control transistor 1 has a parasitic diode 1a between the drain and the source, with the direction opposite to the direction of the charging current of the secondary battery 70 as the forward direction. The charge control transistor 1 is a switching element inserted in series into the current path 9b such that the forward direction of the parasitic diode 1a of the charge control transistor 1 coincides with the direction in which the discharge current of the secondary battery 70 flows.

[0020] The discharge control transistor 2 has a parasitic diode 2a between the drain and the source, with the direction opposite to the direction of the discharge current of the secondary battery 70 as the forward direction. The discharge control transistor 2 is a switching element inserted in series into the current path 9b such that the forward direction of the parasitic diode 2a of the discharge control transistor 2 coincides with the direction in which the charging current of the secondary battery 70 flows.

[0021] The battery protection circuit 10 is an example of a secondary battery protection circuit. The battery protection circuit 10 operates with the secondary battery 70 as a power source. The battery protection circuit 10 is, for example, an integrated circuit (IC) that operates with the battery voltage (also referred to as "cell voltage") between the positive electrode 71 and the negative electrode 72 of the secondary battery 70.

[0022] The battery protection circuit 10 protects the secondary battery 70 from over-discharge and the like by controlling the switch circuit 3. For example, the battery protection circuit 10 protects the secondary battery 70 from abnormal charging (such as overcharging, overcurrent in the charging direction (charging overcurrent), etc.) by turning off the charging control transistor 1. On the other hand, the battery protection circuit 10 protects the secondary battery 70 from abnormal discharging (such as over-discharging, overcurrent in the discharging direction (discharging overcurrent), etc.) by turning off the discharging control transistor 2.

[0023] The battery protection circuit 10 includes, for example, a charging control terminal (terminal CO), a discharging control terminal (terminal DO), a monitoring terminal (terminal VM), a power supply terminal (terminal VDD), and a ground terminal (terminal VSS). These terminals are external connection terminals for connecting the internal circuit of the battery protection circuit 10 to the outside of the battery protection circuit 10.

[0024] The terminal CO is connected to the gate (control terminal) of the charging control transistor 1 and outputs a signal for turning on and off the charging control transistor 1. The terminal DO is connected to the gate (control terminal) of the discharging control transistor 2 and outputs a signal for turning on and off the discharging control transistor 2.

[0025] The terminal VM is used for monitoring the potential of the terminal PM and is connected to the terminal PM. The terminal VM is used, for example, by a detection circuit in the battery protection circuit 10 to monitor the presence or absence of connection of the load 90 or the charger 91, and is connected to the minus-side current path 9b between the transistors 1, 2 and the terminal PM.

[0026] The terminal VDD is the power supply terminal of the battery protection circuit 10 and is connected to the positive electrode 71 of the secondary battery 70 and the plus-side current path 9a. The terminal VSS is the ground terminal of the battery protection circuit 10 and is connected to the negative electrode 72 of the secondary battery 70 and the minus-side current path 9b. The terminal VSS is connected to the minus-side current path 9b between the transistors 1, 2 and the terminal BM.

[0027] The battery protection circuit 10 monitors the power supply voltage Vd between the terminal VDD and the terminal VSS. When the battery protection circuit 10 detects a power supply voltage Vd higher than a predetermined overcharge detection voltage VDET1, it turns off the charge control transistor 1. When the battery protection circuit 10 detects a power supply voltage Vd lower than a predetermined overcharge recovery voltage VRET1, it turns on the charge control transistor 1. When the battery protection circuit 10 detects a power supply voltage Vd lower than a predetermined overdischarge detection voltage VDET2, it turns off the discharge control transistor 2. When the battery protection circuit 10 detects a power supply voltage Vd higher than a predetermined overdischarge recovery voltage VRET2, it turns on the discharge control transistor 2.

[0028] Next, the operation when both battery packs 100 and 200 return from the overcharged state will be described.

[0029] For the sake of convenience of explanation, in the battery pack 100, the battery protection circuit 10, the charge control transistor 1, and the discharge control transistor 2 are defined as IC1, SW1, and SW2, respectively. Similarly, in the battery pack 200, the battery protection circuit 10, the charge control transistor 1, and the discharge control transistor 2 are defined as IC2, SW3, and SW4, respectively. Also, in the battery pack 100, Bat1 and B1- represent the secondary battery 70 of the battery pack 100 and the terminal BM of the battery pack 100, respectively. In the battery pack 200, Bat2 and B2- represent the secondary battery 70 of the battery pack 200 and the terminal BM of the battery pack 200, respectively.

[0030] FIG. 2 is a diagram illustrating waveforms when both battery packs 100 and 200 return from the overcharged state in a configuration in which a battery protection circuit according to a comparative form is applied to the battery protection circuits 10 of both battery packs 100 and 200. Note that FIG. 2 shows waveforms with the terminal PP as the 0-volt reference.

[0031] When the secondary batteries 70 of both battery packs 100 and 200 are overcharged and a power supply voltage Vd higher than a predetermined overcharge detection voltage VDET1 is detected, IC1 turns off SW1 and IC2 turns off SW3.

[0032] When returning the overcharged battery packs 100 and 200 to the normal state, it is necessary to discharge the secondary battery 70 of the battery pack 100 via the diode 1a of SW1 and discharge the secondary battery 70 of the battery pack 200 via the diode 1a of SW3. In the overcharged state where both SW1 and SW3 are off, each secondary battery 70 can be discharged via its respective diode 1a. However, when the battery voltage drops and the secondary battery 70 of the battery pack 200 returns from overcharge first, only SW3 turns on. Discharge starts only for the secondary battery 70 of the returned battery pack 200, and the secondary battery 70 of the overcharged battery pack 100 cannot be discharged via the diode 1a of SW1.

[0033] As the discharge progresses further and the output voltage of the battery pack 200 drops, the secondary battery 70 of the overcharged battery pack 100 can also be discharged via the diode 1a of SW1. As a result, the voltage of the secondary battery 70 of the battery pack 100 also drops, and when the power supply voltage Vd lower than the overcharge return voltage VRET1 is detected by IC1, IC1 turns off SW1, and the secondary battery 70 of the battery pack 100 returns from overcharge.

[0034] At this time, there is a potential difference due to diode discharge between the battery voltage of the previously returned battery pack 200 and the battery voltage of the subsequently returned battery pack 100. Therefore, when the battery pack 100 returns from overcharge, an excessive current Ip1 is generated between the battery pack 100 and the battery pack 200. For example, assuming the total resistance between the batteries is 50 mΩ and the forward voltage VF of the diode is 0.7 V, the current value of the current Ip1 flowing from the terminal PM of the battery pack 200 to the terminal PM of the battery pack 100 is about 14 A.

[0035] On the one hand, FIG. 3 is a diagram showing a configuration example of the battery protection circuit 10A according to the first embodiment. FIG. 4 is a diagram illustrating waveforms when both battery packs 100 and 200 return from an overcharged state in a configuration where the battery protection circuit 10A according to the first embodiment is applied to the battery protection circuits 10 of both battery packs 100 and 200. Note that FIG. 4 shows waveforms with the terminal PP as the 0-volt reference.

[0036] The battery protection circuit 10A controls the charging control transistor 1 in the saturation region so that the potential difference between the terminal B1- and the terminal PM becomes constant in the direction of the discharge current from when the power supply voltage Vd exceeds the overcharge detection voltage VDET1 until it returns to a state lower than the overcharge return voltage VRET1. As a result, when the battery pack 100 returns from the overcharged state after the battery pack 200 has returned from the overcharged state, the difference in battery voltage between the battery pack 200 and the battery pack 100 can be reduced, so that the current Ip1 between the batteries at the time of return can be suppressed. For example, if the total resistance between the batteries is 50 mΩ and the potential difference constantly controlled by the differential amplifier 21 is 50 mV, the current value of the current Ip1 can be suppressed to about 1 A.

[0037] When an overcharged state where the power supply voltage Vd is higher than the overcharge detection voltage VDET1 is detected, the battery protection circuit 10A maintains a constant value (for example, 50 mV) for the difference obtained by subtracting the potential of the terminal VSS from the potential of the terminal VM, and causes a current in the discharge direction to flow through the charging control transistor 1. Thereby, the discharge of the secondary battery 70 can be promoted.

[0038] FIG. 5 is a diagram illustrating waveforms when one of the battery packs 100 returns from an overcharged state in a configuration where a battery protection circuit according to a comparative form is applied to the battery protection circuits 10 of both battery packs 100 and 200. Note that FIG. 5 shows waveforms with the terminal PP as the 0-volt reference.

[0039] When only the secondary battery 70 of the battery pack 100 is overcharged and a power supply voltage Vd higher than a predetermined overcharge detection voltage VDET1 is detected, the IC1 turns off the SW1 (the IC2 maintains the SW3 on).

[0040] When returning the overcharged battery pack 100 to the normal state, it is necessary to discharge the secondary battery 70 of the battery pack 100 via the diode 1a of SW1. Similar to the case of returning from both overcharged states, when the output voltage of the battery pack 200 is lower than the battery voltage of the battery pack 100 by the forward voltage of the diode, and the power supply voltage Vd of the battery pack 100 is lower than the overcharge return voltage VRET1, the battery pack 100 returns.

[0041] Therefore, when the battery pack 100 returns from the overcharged state, since the potential difference due to diode discharge is between the battery pack 100 and the battery pack 200, an excessive current Ip1 is generated between the battery packs at the time of overcharge return.

[0042] On the other hand, FIG. 6 is a diagram illustrating waveforms when one of the battery packs 100 returns from the overcharged state in a configuration where the battery protection circuit 10A according to the first embodiment is applied to the battery protection circuits 10 of both the battery packs 100 and 200. Note that FIG. 6 shows waveforms with the terminal PP as the 0 V reference.

[0043] The battery protection circuit 10A of the battery pack 100 controls the charging control transistor 1 in the saturation region so that the potential difference between the terminal BM and the terminal PM becomes constant in the direction of the discharge current from when the power supply voltage Vd exceeds the overcharge detection voltage VDET1 until it returns to a state lower than the overcharge return voltage VRET1. Thereby, when the battery pack 100 returns from the overcharged state, the difference in battery voltage between the battery pack 200 and the battery pack 100 can be reduced, and thus the current Ip1 between the batteries at the time of return can be suppressed.

[0044] Next, the operation when both the battery packs 100 and 200 return from the over-discharged state will be described.

[0045] FIG. 7 is a diagram illustrating waveforms when both battery packs 100 and 200 return from an over-discharged state in a configuration where a battery protection circuit according to a comparative form is applied to the battery protection circuits 10 of both battery packs 100 and 200. Note that FIG. 7 shows waveforms with the terminal PP as the 0 V reference.

[0046] When the secondary batteries 70 of both battery packs 100 and 200 are over-discharged and a power supply voltage Vd lower than a predetermined over-discharge detection voltage VDET2 is detected, IC1 turns off SW2 and IC2 turns off SW4.

[0047] When returning the over-discharged battery packs 100 and 200 to the normal state, it is necessary to charge the secondary battery 70 of battery pack 100 via the diode 2a of SW2 and charge the secondary battery 70 of battery pack 200 via the diode 2a of SW4. In the over-discharged state where both SW2 and SW4 are off, each secondary battery 70 can be charged via its respective diode 2a. However, when the battery voltage rises and the secondary battery 70 of battery pack 200 returns from over-discharge first, only SW4 turns on. Charging starts only for the secondary battery 70 of the returned battery pack 200, and the secondary battery 70 of the over-discharged battery pack 100 cannot be charged via the diode 2a of SW2.

[0048] As charging further progresses and the output voltage of battery pack 200 rises, the secondary battery 70 of the over-discharged battery pack 100 can also be charged via the diode 1a of SW2. Thereby, the voltage of the secondary battery 70 of battery pack 100 also rises, and when a power supply voltage Vd higher than the over-discharge return voltage VRET2 is detected by IC1, IC1 turns off SW2 and the secondary battery 70 of battery pack 100 returns from over-discharge. Even when the charger 91 is connected, the output voltage of the battery pack rises.

[0049] At this time, there is a potential difference due to diode discharge between the battery voltage of the battery pack 200 that returned first and the battery voltage of the battery pack 100 that returned later. Therefore, when the battery pack 100 returns from over-discharge, an excessive current Ip2 is generated between the battery pack 100 and the battery pack 200. For example, assuming the total resistance between the batteries is 50 mΩ and the forward voltage VF of the diode is 0.7 V, the current value of the current Ip2 flowing from the terminal PM of the battery pack 100 to the terminal PM of the battery pack 200 is about 14 A.

[0050] On the other hand, FIG. 8 is a diagram showing a configuration example of the battery protection circuit 10A according to the first embodiment. FIG. 9 is a diagram illustrating waveforms when both battery packs 100 and 200 return from the over-discharge state in a configuration in which the battery protection circuit 10A according to the first embodiment is applied to the battery protection circuits 10 of both battery packs 100 and 200. Note that FIG. 9 shows waveforms with the terminal PP as the 0 V reference.

[0051] The battery protection circuit 10A controls the discharge control transistor 2 in the saturation region so that the potential difference between the terminal B1- and the terminal PM becomes constant in the direction of the charging current from the time the power supply voltage Vd falls below the over-discharge detection voltage VDET2 until it returns to a state higher than the over-discharge recovery voltage VRET2. As a result, when the battery pack 100 returns from the over-discharge state after the battery pack 200 has returned from the over-discharge state, the difference in battery voltage between the battery pack 200 and the battery pack 100 can be reduced, so that the current Ip2 between the batteries at the time of return can be suppressed. For example, assuming the total resistance between the batteries is 50 mΩ and the potential difference constantly controlled by the differential amplifier 31 is 50 mV, the current value of the current Ip2 can be suppressed to about 1 A.

[0052] When an over-discharge state where the power supply voltage Vd is lower than the over-discharge detection voltage VDET2 is detected, the battery protection circuit 10A passes a charging-direction current through the discharge control transistor 2 while maintaining the difference obtained by subtracting the potential of the terminal VM from the potential of the terminal VSS at a constant value (for example, 50 mV). Thereby, the charging of the secondary battery 70 can be promoted.

[0053] FIG. 10 is a diagram illustrating waveforms when one of the battery packs 100 returns from an over-discharged state in a configuration where a battery protection circuit according to a comparative form is applied to the battery protection circuits 10 of both the battery packs 100 and 200. Note that FIG. 10 shows waveforms with the terminal PP as the 0 V reference.

[0054] When only the secondary battery 70 of the battery pack 100 is over-discharged and a power supply voltage Vd lower than a predetermined over-discharge detection voltage VDET2 is detected, IC1 turns off SW2 (IC2 maintains SW4 on).

[0055] When returning the over-discharged battery pack 100 to the normal state, it is necessary to charge the secondary battery 70 of the battery pack 100 via the diode 2a of SW2. Similar to the case of returning from the over-discharged state of both, when the output voltage of the battery pack 200 is higher than the battery voltage of the battery pack 100 by the forward voltage of the diode and the power supply voltage Vd of the battery pack 100 becomes higher than the over-discharge return voltage VRET2, the battery pack 100 returns.

[0056] Therefore, when the battery pack 100 returns from the over-discharged state, since there is a potential difference corresponding to the diode discharge between the battery pack 100 and the battery pack 200, an excessive current Ip2 is generated between the battery packs at the time of over-discharge return.

[0057] On the other hand, FIG. 11 is a diagram illustrating waveforms when one of the battery packs 100 returns from an over-discharged state in a configuration where the battery protection circuit 10A according to the first embodiment is applied to the battery protection circuits 10 of both the battery packs 100 and 200. Note that FIG. 11 shows waveforms with the terminal PP as the 0 V reference.

[0058] The battery protection circuit 10A of the battery pack 100 controls the discharge control transistor 2 in the saturation region so that the potential difference between the terminal BM and the terminal PM becomes constant in the direction of the charging current flow from when the power supply voltage Vd falls below the over-discharge detection voltage VDET2 until it returns to a state higher than the over-discharge recovery voltage VRET2. As a result, when the battery pack 100 returns from the over-discharged state, the difference in battery voltage between the battery pack 200 and the battery pack 100 can be reduced, so that the current Ip2 between the batteries at the time of return can be suppressed.

[0059] FIG. 12 is a diagram showing in more detail a configuration example of the battery protection circuit 10A according to the first embodiment. The battery protection circuit 10A includes an overcharge detection circuit 41, an overcharge recovery detection circuit 42, an over-discharge detection circuit 43, an over-discharge recovery detection circuit 44, and an overcurrent detection circuit 45.

[0060] When the power supply voltage Vd higher than a predetermined overcharge detection voltage VDET1 is detected, the overcharge detection circuit 41 outputs an overcharge detection signal indicating that the power supply voltage Vd higher than the overcharge detection voltage VDET1 is detected. Further, when the power supply voltage Vd lower than a predetermined overcharge recovery voltage VRET1 is detected, the overcharge recovery detection circuit 42 outputs an overcharge recovery detection signal indicating that the power supply voltage Vd lower than the overcharge recovery voltage VRET1 is detected. The overcharge detection voltage VDET1 is a threshold for overcharge detection, and the overcharge recovery voltage VRET1 is a threshold for overcharge recovery detection. The overcharge recovery voltage VRET1 is set to a voltage value lower than the overcharge detection voltage VDET1.

[0061] When the power supply voltage Vd lower than a predetermined over-discharge detection voltage VDET2 is detected, the over-discharge detection circuit 43 outputs an over-discharge detection signal indicating that the power supply voltage Vd lower than the over-discharge detection voltage VDET2 is detected. Further, when the power supply voltage Vd higher than a predetermined over-discharge recovery detection voltage VRET2 is detected, the over-discharge recovery detection circuit 44 outputs an over-discharge recovery detection signal indicating that the power supply voltage Vd higher than the over-discharge recovery detection voltage VRET2 is detected. The over-discharge detection voltage VDET2 is a threshold for over-discharge detection, and the over-discharge recovery detection voltage VRET2 is a threshold for over-discharge recovery detection. The over-discharge recovery detection voltage VRET2 is set to a voltage value higher than the over-discharge detection voltage VDET2.

[0062] The over-current detection circuit 45 monitors the monitoring voltage VI which is the voltage between the terminal VM and the terminal VSS, and detects an over-current flowing between the terminal PM and the terminal BM.

[0063] The over-current detection circuit 45 includes a discharge over-current detection circuit that outputs a discharge over-current detection signal indicating that a discharge over-current is detected when the monitoring voltage VI higher than a predetermined discharge over-current detection voltage VDET3 is detected. The over-current detection circuit 45 includes a discharge over-current recovery detection circuit that outputs a discharge over-current recovery detection signal indicating that no discharge over-current is flowing when the monitoring voltage VI lower than a predetermined discharge over-current recovery voltage VRET3 is detected. The discharge over-current detection voltage VDET3 is a threshold for discharge over-current detection, and the discharge over-current recovery voltage VRET3 is a threshold for discharge over-current recovery detection.

[0064] The over-current detection circuit 45 includes a charge over-current detection circuit that outputs a charge over-current detection signal indicating that a charge over-current is detected when the monitoring voltage VI lower than a predetermined charge over-current detection voltage VDET4 is detected. The over-current detection circuit 45 includes a charge over-current recovery detection circuit that outputs a charge over-current recovery detection signal indicating that no charge over-current is flowing when the monitoring voltage VI higher than a predetermined charge over-current recovery voltage VRET4 is detected. The charge over-current detection voltage VDET4 is a threshold for charge over-current detection, and the charge over-current recovery voltage VRET4 is a threshold for charge over-current recovery detection.

[0065] The battery protection circuit 10A includes a differential amplifier 21, a differential amplifier 31, a first potential difference control circuit 20, and a second potential difference control circuit 30.

[0066] The differential amplifier 21 is an example of a first potential difference detection circuit, and outputs a first potential difference detection signal b1 according to the potential difference Δ1 between the terminal BM and the terminal PM (between the terminal VSS and the terminal VM). The differential amplifier 31 is an example of a second potential difference detection circuit, and outputs a second potential difference detection signal b2 according to the potential difference Δ2 between the terminal BM and the terminal PM (between the terminal VSS and the terminal VM).

[0067] When overcharge is detected by the overcharge detection circuit 41, the first potential difference control circuit 20 feeds back the first potential difference detection signal b1 to the control terminal of the charge control transistor 1, and controls the potential difference Δ1 so that a current in the direction of discharging the secondary battery 70 flows through the charge control transistor 1. Thereby, as described above, in the overcharged state, the potential difference Δ1 can be controlled to a value lower than the forward voltage of the diode 1a, so that the excessive current Ip1 at the time of the above return can be suppressed.

[0068] When overdischarge is detected by the overdischarge detection circuit 43, the second potential difference control circuit 30 feeds back the second potential difference detection signal b2 to the control terminal of the discharge control transistor 2, and controls the potential difference Δ2 so that a current in the direction of charging the secondary battery 70 flows through the discharge control transistor 2. Thereby, as described above, in the overdischarged state, the potential difference Δ2 can be controlled to a value lower than the forward voltage of the diode 2a, so that the excessive current Ip2 at the time of the above return can be suppressed.

[0069] The battery protection circuit 10A includes a charging control circuit 22 and a first switching circuit 23. When overcharging is not detected by the overcharge detection circuit 41, the charging control circuit 22 outputs a charging control signal a1 for controlling the charging control transistor 1 to the control terminal of the charging control transistor 1. When overcharging is detected by the overcharge detection circuit 41, the first switching circuit 23 switches the signal output to the control terminal of the charging control transistor 1 from the charging control signal a1 to the first potential difference detection signal b1. Thereby, when overcharging is not detected, the charging control circuit 22 can control the charging control transistor 1 to be turned on or off by the charging control signal a1.

[0070] When the recovery of overcharging is detected by the overcharge recovery detection circuit 42, the first switching circuit 23 switches the signal output to the control terminal of the charging control transistor 1 from the first potential difference detection signal b1 to the charging control signal a1. Thereby, when recovering from overcharging, the charging control circuit 22 can control the charging control transistor 1 to be turned on or off by the charging control signal a1.

[0071] When charging overcurrent is detected by the overcurrent detection circuit 45, the first switching circuit 23 outputs a charging control signal a1 for turning off the charging control transistor 1 to the control terminal of the charging control transistor 1. Thereby, the charging control circuit 22 can cut off the charging overcurrent by the charging control signal a1.

[0072] The battery protection circuit 10A includes a discharging control circuit 32 and a second switching circuit 33. When overdischarging is not detected by the overdischarge detection circuit 43, the discharging control circuit 32 outputs a discharging control signal a2 for controlling the discharging control transistor 2 to the control terminal of the discharging control transistor 2. When overdischarging is detected by the overdischarge detection circuit 43, the second switching circuit 33 switches the signal output to the control terminal of the discharging control transistor 2 from the discharging control signal a2 to the second potential difference detection signal b2. Thereby, when overdischarging is not detected, the discharging control circuit 32 can control the discharging control transistor 2 to be turned on or off by the discharging control signal a2.

[0073] When the return from over-discharge is detected by the over-discharge return detection circuit 44, the second switching circuit 33 switches the signal output to the control terminal of the discharge control transistor 2 from the second potential difference detection signal b2 to the discharge control signal a2. Thereby, when returning from over-discharge, the discharge control circuit 32 can control the discharge control transistor 2 to be turned on or off by the discharge control signal a2.

[0074] When the discharge over-current is detected by the over-current detection circuit 45, the second switching circuit 33 outputs a discharge control signal a2 for turning off the discharge control transistor 2 to the control terminal of the discharge control transistor 2. Thereby, the discharge control circuit 32 can cut off the discharge over-current by the discharge control signal a2.

[0075] The battery protection circuit 10A includes a charger connection detection circuit 50 that detects the connection of the charger 91, and a control circuit 46 connected to the charger connection detection circuit 50. The charger connection detection circuit 50 has, for example, a resistor 51, a switch 52, and a monitor circuit 53. When over-discharge is detected by the over-discharge detection circuit 43, the control circuit 46 turns on the switch 52 based on the output of the discharge control circuit 32, thereby pulling up the terminal VM to the potential of the terminal VDD via the resistor 51. Thereby, if the terminal PP and the terminal PM are open, the potential of the terminal VM is fixed to the potential of the terminal VDD, and when the charger 91 is connected between the terminal PP and the terminal PM, the potential of the terminal VM drops by the output voltage of the charger 91 compared to the potential of the terminal VDD. The charger connection detection circuit 50 detects the presence or absence of the connection of the charger 91 by monitoring this potential change at the terminal VM by the monitor circuit 53.

[0076] When the connection of the charger 91 is detected by the charger connection detection circuit 50 and the return from over-discharge is detected by the over-discharge return detection circuit 44, the control circuit 46 turns off the switch 52 to release the pull-up of the terminal VM to the terminal VDD.

[0077] The monitor circuit 53 has an input section that can be pulled up to the potential of the terminal VDD by the switch 52. The monitor circuit 53 is, for example, a CMOS (Complementary Metal Oxide Semiconductor) inverter circuit.

[0078] When the charger 91 is connected between the terminal PP and the terminal PM, the potential of the terminal VM drops below the potential of the terminal VSS. As a result, the input section of the CMOS inverter of the monitor circuit 53 changes from a high level to a low level, and the output section of the CMOS inverter of the monitor circuit 53 changes from a low level to a high level. The control circuit 46 detects that the output of the CMOS inverter of the monitor circuit 53 changes from a low level to a high level, thereby detecting the connection of the charger 91.

[0079] Next, the operations of the differential amplifiers 21 and 31 will be described in more detail.

[0080] FIG. 13 is a diagram showing an example of the activation conditions of the differential amplifier. In a state where no charge abnormality and no discharge abnormality are detected (normal state), neither of the differential amplifiers 21 and 31 is used (off state). In a state where overcharge is detected (overcharge state), the differential amplifier 31 is not used (off state), and the differential amplifier 21 is used (on state). In this overcharge state, the potential difference Δ1 between the terminal BM and the terminal PM is controlled by the feedback of the differential amplifier 21. In the over-discharge state 1 (a state where over-discharge is detected and the connection of the charger is detected or there is an output from another battery pack), the differential amplifier 21 is not used (off state), and the differential amplifier 31 is used (on state). In the over-discharge state 1, the potential difference Δ2 between the terminal BM and the terminal PM is controlled by the feedback of the differential amplifier 31. In the over-discharge state 2 (a state where over-discharge is detected in all battery packs connected in parallel (standby state)), neither of the differential amplifiers 21 and 31 is used (off state).

[0081] FIG. 14 is a diagram for explaining the operation of a differential amplifier that controls a charge control transistor in an overcharged state. The differential amplifier 21 includes a non-inverting input section connected to a terminal VM (terminal PM), an inverting input section connected to a potential higher than a constant voltage Va (for example, +50 mV) than a terminal VSS (terminal BM), and an output section connected to a terminal CO connected to a control terminal of the charge control transistor 1.

[0082] With such a configuration, when the potential of the terminal PM tends to be higher than (terminal BM + constant voltage Va), the differential amplifier 21 increases the output voltage applied to the control terminal of the charge control transistor 1. As a result, since the input / output impedance of the charge control transistor 1 operating in the saturation region decreases, negative feedback for reducing the potential of the terminal PM can be applied. Therefore, the differential amplifier 21 can control the potential difference between the terminal PM and the terminal BM to the constant voltage Va while causing a current in the direction of discharging the secondary battery 70 (from the terminal PM to the terminal BM) to flow through the charge control transistor 1.

[0083] On the other hand, when the potential of the terminal PM becomes lower than (terminal BM + constant voltage Va), the differential amplifier 21 decreases the output voltage applied to the control terminal of the charge control transistor 1, so the input / output impedance of the charge control transistor 1 increases. As a result, the charge control transistor 1 transitions to an off state. Therefore, the differential amplifier 21 can block the current in the direction of charging the secondary battery 70 (from the terminal BM to the terminal PM) by turning off the charge control transistor 1.

[0084] FIG. 15 is a diagram for explaining the operation of a differential amplifier that controls a discharge control transistor in an overdischarged state. The differential amplifier 31 includes a non-inverting input section connected to a terminal VSS (terminal BM), an inverting input section connected to a potential higher than a constant voltage Vb (for example, +50 mV) than a terminal VM (terminal PM), and an output section connected to a terminal DO connected to a control terminal of the discharge control transistor 2.

[0085] With such a configuration, when the potential of terminal PM tends to be lower than (terminal BM - fixed voltage Vb), differential amplifier 31 increases the output voltage applied to the control terminal of discharge control transistor 2. As a result, since the input / output impedance of discharge control transistor 2 operating in the saturation region decreases, negative feedback for increasing the potential of terminal PM can be applied. Therefore, differential amplifier 31 can control the potential difference between terminal BM and terminal PM to the fixed voltage Vb while causing a current in the direction of charging secondary battery 70 (from terminal BM to terminal PM) to flow through discharge control transistor 2.

[0086] On the other hand, when the potential of terminal PM becomes higher than (terminal BM - fixed voltage Vb), differential amplifier 31 decreases the output voltage applied to the control terminal of discharge control transistor 2, so the input / output impedance of discharge control transistor 2 increases. As a result, discharge control transistor 2 transitions to the off state. Therefore, differential amplifier 31 can block the current in the direction of discharging secondary battery 70 (from terminal PM to terminal BM) by turning off discharge control transistor 2.

[0087] FIG. 16 is a diagram illustrating the state transition of the secondary battery protection circuit according to the first embodiment. FIG. 16 will be described with reference to FIG. 12.

[0088] The normal state is a state in which overcharge and over-discharge are not detected. In the normal state, charge control circuit 22 selects charge control signal a1 as the signal output to terminal CO by first switching circuit 23 and outputs a high-level charge control signal a1 for turning on charge control transistor 1 to terminal CO. Also, in the normal state, discharge control circuit 32 selects discharge control signal a2 as the signal output to terminal DO by second switching circuit 33 and outputs a high-level discharge control signal a2 for turning on discharge control transistor 2 to terminal DO.

[0089] In the normal state, when overcharge is detected by the overcharge detection circuit 41 (when an overcharge detection signal is output), the operating state of the battery protection circuit 10A transitions from the normal state to the overcharge state. The overcharge state is a state in which overcharge is detected by the overcharge detection circuit 41 (a state in which an overcharge detection signal is output). In the overcharge state, the charge control circuit 22 selects the first potential difference detection signal b1 as the signal output to the terminal CO by the first switching circuit 23, and outputs the first potential difference detection signal b1 that operates the charge control transistor 1 in the saturation region to the terminal CO. On the other hand, in the overcharge state, the discharge control circuit 32 performs the same operation as in the normal state.

[0090] In the overcharge state, when overcharge recovery is detected by the overcharge recovery detection circuit 42 (when an overcharge recovery detection signal is output), the operating state of the battery protection circuit 10A returns from the overcharge state to the normal state.

[0091] In the normal state, when overdischarge is detected by the overdischarge detection circuit 43 (when an overdischarge detection signal is output), the operating state of the battery protection circuit 10A transitions from the normal state to the overdischarge state. The overdischarge state is a state in which overdischarge is detected by the overdischarge detection circuit 43 (a state in which an overdischarge detection signal is output). In the overdischarge state, the discharge control circuit 32 selects the second potential difference detection signal b2 as the signal output to the terminal DO by the second switching circuit 33, and outputs the second potential difference detection signal b2 that operates the discharge control transistor 2 in the saturation region to the terminal DO. On the other hand, in the overdischarge state, the charge control circuit 22 performs the same operation as in the normal state. Also, in the overdischarge state, the control circuit 46 pulls up the terminal VM to the potential of the terminal VDD by turning on the switch 52 of the charger connection detection circuit 50.

[0092] When it transitions to the over-discharge state, since the charger 91 should not be connected at the time of the transition, the battery protection circuit 10A transitions to the standby state and shuts down the over-discharge recovery detection circuit 44. For example, in the over-discharge state, if the state where the connection of the charger 91 is not detected by the charger connection detection circuit 50 continues for a predetermined time or more, the operating state of the battery protection circuit 10A transitions from the over-discharge state to the standby state.

[0093] In the standby state, the discharge control circuit 32 selects the discharge control signal a2 as the signal output to the terminal DO by the second switching circuit 33, and outputs the low-level discharge control signal a2 that turns off the discharge control transistor 2 to the terminal DO. On the other hand, in the standby state, the charge control circuit 22 operates in the same manner as in the over-discharge state.

[0094] When the connection of the charger 91 is detected by the charger connection detection circuit 50 in the standby state, the standby state is released and the over-discharge recovery detection circuit 44 is activated, and the operating state of the battery protection circuit 10A transitions from the standby state to the over-discharge state. When transitioning from the standby state to the over-discharge state, the second potential difference control circuit 30 and the over-discharge recovery detection circuit 44 operate. As a result, in the over-discharge state, the feedback operation in the saturation region of the discharge control transistor 2 by the second potential difference detection signal b2 becomes possible, and the detection of over-discharge recovery becomes possible. When the over-discharge recovery is detected by the over-discharge recovery detection circuit 44 (when the over-discharge recovery detection signal is output), the operating state of the battery protection circuit 10A returns from the over-discharge state to the normal state.

[0095] <Second Embodiment> FIG. 17 is a diagram showing in more detail a configuration example of the battery protection circuit 10B according to the second embodiment. The battery protection circuit 10B according to the second embodiment differs from the battery protection circuit 10A according to the first embodiment in that the secondary battery 70 is protected by the charge control transistor 1 and the discharge control transistor 2 inserted in series in the current path 9a. In the second embodiment, the description of the same configuration and effects as in the first embodiment is omitted by referring to the above description.

[0096] In the second embodiment, the transistors 1 and 2 are, for example, P-channel MOSFETs. The battery protection circuit 10B includes, for example, a charge control terminal (terminal CO), a discharge control terminal (terminal DO), a monitoring terminal (terminal VP), a power supply terminal (terminal VDD), and a ground terminal (terminal VSS).

[0097] The terminal VP is used to monitor the potential of the terminal PP and is connected to the terminal PP. The terminal VP is used, for example, by a charger connection detection circuit 50 in the battery protection circuit 10B to monitor the presence or absence of connection of the load 90 or the charger 91, and is connected to the plus-side current path 9a between the transistors 1 and 2 and the terminal PP.

[0098] The overcurrent detection circuit 45 monitors a monitoring voltage VI, which is the voltage between the terminal VP and the terminal VDD, to detect an overcurrent flowing between the terminal PP and the terminal BP.

[0099] A state in which the discharge of the secondary battery 70 is stopped by turning off the discharge control transistor 2 and the terminal VP is pulled down to the terminal VSS terminal by turning on the switch 52 is defined as a pull-down state pd. In the pull-down state pd, the potential of the terminal VP has decreased to the potential of the terminal VSS due to the turning on of the switch 52. When a charger 91 is connected between the terminal PP and the terminal PM in this pull-down state pd, the potential of the terminal VP rises above the potential of the terminal VDD. Therefore, when the monitoring circuit 53 detects that the potential of the terminal VP has risen above a predetermined reference potential Vvp in the pull-down state pd, the charger connection detection circuit 50 can determine that the charger 91 is connected.

[0100] FIG. 18 is a diagram for explaining the operation of a differential amplifier that controls a charge control transistor in an overcharged state. The differential amplifier 21 has a non-inverting input section connected to the terminal VP (terminal PP), an inverting input section connected to a potential lower than the terminal VDD (terminal BP) by a fixed voltage Va (for example, +50 mV), and an output section connected to a terminal CO connected to the control terminal of the charge control transistor 1.

[0101] With such a configuration, when the potential of terminal PP tends to be lower than (terminal BP - fixed voltage Va), the differential amplifier 21 reduces the output voltage applied to the control terminal of the charge control transistor 1. As a result, since the input-output impedance of the charge control transistor 1 operating in the saturation region decreases, negative feedback that raises the potential of terminal PP can be applied. Therefore, the differential amplifier 21 can control the potential difference between terminal BP and terminal PP to the fixed voltage Va while causing a current in the direction of discharging the secondary battery 70 (from terminal BP to terminal PP) to flow through the charge control transistor 1.

[0102] On the other hand, when the potential of terminal PP becomes higher than (terminal BP - fixed voltage Va), the differential amplifier 21 increases the output voltage applied to the control terminal of the charge control transistor 1, so the input-output impedance of the charge control transistor 1 increases. As a result, the charge control transistor 1 transitions to the OFF state. Therefore, the differential amplifier 21 can block the current in the direction of charging the secondary battery 70 (from terminal PP to terminal BP) by turning off the charge control transistor 1.

[0103] FIG. 19 is a diagram for explaining the operation of a differential amplifier that controls a discharge control transistor in an over-discharged state. The differential amplifier 31 includes an inverting input section connected to terminal VDD (terminal BP), a non-inverting input section connected to a potential lower than the fixed voltage Vb (for example, +50 mV) than terminal VP (terminal PP), and an output section connected to terminal DO connected to the control terminal of the discharge control transistor 2.

[0104] With such a configuration, when the potential of terminal PP tends to be higher than (terminal BP + fixed voltage Vb), the differential amplifier 31 reduces the output voltage applied to the control terminal of the discharge control transistor 2. As a result, since the input-output impedance of the discharge control transistor 2 operating in the saturation region decreases, negative feedback that lowers the potential of terminal PP can be applied. Therefore, the differential amplifier 31 can control the potential difference between terminal PP and terminal BP to the fixed voltage Vb while causing a current in the direction of charging the secondary battery 70 (from terminal PP to terminal BP) to flow through the discharge control transistor 2.

[0105] On the other hand, when the potential at terminal PP becomes lower than (terminal BP + fixed voltage Vb), the differential amplifier 31 increases the output voltage applied to the control terminal of the discharge control transistor 2. As a result, the input / output impedance of the discharge control transistor 2 increases. Consequently, the discharge control transistor 2 transitions to the OFF state. Therefore, the differential amplifier 31 can block the current in the direction of discharging the secondary battery 70 (from terminal BP to terminal PP) by turning off the discharge control transistor 2.

[0106] As described above, the secondary battery protection circuit, battery pack, battery system, and secondary battery protection method have been explained by way of embodiments. However, the present invention is not limited to the above embodiments. Various modifications and improvements such as combinations or substitutions with part or all of other embodiments are possible within the scope of the present invention.

[0107] Also, for example, the arrangement positions of the charge control transistor 1 and the discharge control transistor 2 may be mutually replaced with respect to the illustrated positions. Further, the switch circuit 3 may be incorporated in the battery protection circuit 10.

Description of Reference Numerals

[0108] 1 Charge control transistor 2 Discharge control transistor 3 Switch circuit 10, 10A, 10B Battery protection circuit 20 First potential difference control circuit 21 Differential amplifier 22 Charge control circuit 23 First switching circuit 30 Second potential difference control circuit 31 Differential amplifier 32 Discharge control circuit 33 Second switching circuit 41 Overcharge detection circuit 42 Overcharge recovery detection circuit 43 Overdischarge detection circuit 44 Overdischarge recovery detection circuit 45 Overcurrent detection circuit 46 Control circuit 50 Charger connection detection circuit 70 Secondary battery 80 Battery protection device 100, 200 Battery pack 301 Battery system

Claims

1. A first secondary battery, a first charging path between the electrodes of the first secondary battery and the terminals of the load and the charger, a first secondary battery protection circuit for controlling the potential of the first charging path, a second secondary battery, a second charging path between the electrodes of the second secondary battery and the terminals of the load and the charger, a second secondary battery protection circuit for controlling the potential of the second charging path, and having, the first secondary battery and the second secondary battery are connected in parallel so as to connect the first charging path and the second charging path, When the first secondary battery protection circuit detects overcharging or overdischarging, the first secondary battery protection circuit performs first control so that the potential of the terminal and the potential of the electrode in the first charging path have a certain difference. Battery pack.

2. A first charging control transistor inserted into the first charging path, and a second charging control transistor inserted into the second charging path, and further having, The first secondary battery protection circuit inputs a voltage that is a certain value lower from the terminal of the first charging path or the electrode of the first charging path to the control terminal of the first charging control transistor. The battery pack according to claim 1.

3. When the second secondary battery protection circuit detects overcharging during the first control, When the first secondary battery protection circuit and the second secondary battery protection circuit return from overcharging, the first control is released. The battery pack according to claim 1.

4. The battery pack according to claim 3, wherein the first secondary battery protection circuit detects overcharging during the first control.

5. When the second secondary battery protection circuit detects overdischarging during the first control, When the first secondary battery protection circuit and the second secondary battery protection circuit return from overdischarging, the first control is released. The battery pack according to claim 1.

6. The battery pack according to claim 5, wherein the first secondary battery protection circuit detects overdischarging during the first control. ​

Images