Optoelectronic device and method for processing the same

Abstract

The optoelectronic device (1) includes a stack including an n-doped layer (10) having a peripheral sidewall region, and an active region layer (11, 12, 13) deposited on the n-doped layer (10), the active region layer (11, 12, 13) having a central first portion (25) and a peripheral second portion (17). A p-doped layer (14) is disposed on the active region layer, the peripheral second portion including a p-type dopant that produces quantum well intermixing in the peripheral second portion (17). Additionally, a thin n-doped surface layer (20) on the peripheral sidewall extends from the n-doped layer (10) substantially toward the top of the p-doped layer (14), thereby forming an artificial pn junction that is substantially parallel to the peripheral sidewall region and at least partially within the peripheral second portion and the p-doped layer (14).

Description

Technical Field

[0001] The present invention relates to optoelectronic devices and a method for processing the same.

Background Art

[0002] In the latest displays and various other applications, small optoelectronic devices with a side end length of several tens of micrometers or less are used. Since the surface area of this device is very small, it causes unique problems in obtaining sufficient luminance with a small current. So-called non-radiative recombination is a related problem, and in order to limit heat generation with a risk of damage and increase the current flowing through the device, it is necessary to minimize it.

[0003] Recently, various measures have been implemented to reduce non-radiative recombination, but it is still desired to improve the efficiency of small optoelectronic devices and a method for processing the same.

[0004] During the manufacture of small and ultra-small optoelectronic devices, mesa structures are defined and created to separate various optoelectronic components from each other. Along these mesa structures, the device can be separated. In small and ultra-small devices, the area between the surrounding mesa and the periphery of the mesa itself reduces the area / periphery ratio. That is, the edge portions of the optoelectronic components are relatively large compared to the surrounding area.

[0005] As a result, due to crystal damage, surface effects and other effects, a relatively large amount of non-radiative recombination centers are generated along the edge portions. Therefore, the quantum efficiency given by the ratio of radiative recombination / non-radiative recombination decreases. In order to counter the above effects, it has been proposed to increase the efficiency of ultra-small InGaAlP optoelectronic devices or LEDs and achieve quantum well intermixing (QWI) by diffusing Zn.

[0006] Such QWIs occur in areas belonging to the outer area of the optoelectronic device defined in subsequent process steps. The QWI enlarges the bandgap of the quantum well in this outer area near the edge of the mesa and the sidewalls of the device, preventing charge carriers in the QW from reaching the outer device surface near the quantum well, thereby improving the efficiency of the ultra-small InGaAlP LED.

[0007] However, in the outer region of the optoelectronic device, by diffusing Zn into what was previously the n-region, a new unwanted pn junction is created again near the mesa structure between the Zn-diffused region and the n-doped region. At the mesa surface of this parasitic pn junction, charge carriers recombine non-radiatively (also referred to as non-radiative recombination NRR), so this parasitic pn junction reduces the efficiency of the ultra-small InGaAlP LED.

[0008] Therefore, the object of the present disclosure is to reduce these effects and improve the efficiency of optoelectronic devices.

Summary of the Invention

[0009] The inventors recognized that the parasitic pn junction formed by the p-type dopant can also cause non-radiative recombination NRR, especially in this peripheral area near the surface of the mesa structure, in order to generate QWI. Therefore, the inventors propose to fabricate an additional very thin n-doped layer on the outer surface of the device. This layer can extend from the n-doped layer to cover the QWI area from the beginning to the end of the p-doped layer, creating an artificial pn junction at the interface between the n-doped layer on one side and the p-doped layer and the QWI area on the other side.

[0010] Such a layer can be realized with an additional diffusion step that introduces an n-type dopant at a concentration exceeding that of the previous p-type dopant used in QWI. The resulting artificial pn junction has several advantages over the previous structure. For one, now the pn junction is embedded within the material (except for a very small area) and does not reach the surface with its many NRR centers. Furthermore, the pn junction formed by this additional diffusion step has a larger bandgap than the central unmixed active region, so the central pn junction is first opened in the forward direction. Additionally, the n-doped surface layer is relatively thin compared to the surrounding layers as already mentioned. As a result, charge carriers encounter a large sheet resistance as they pass through the thin surface layer. The artificial pn junction is located further away from the central n-doped region, meaning that charge carriers can only pass through the thin n-doped surface layer or the cladding layer. Due to the larger resistance, the current flowing through the thin surface layer to the artificial pn junction is significantly reduced and can be almost ignored. In any case, many NRR centers are far from the charge carriers, and only a very small part of the already small current reaches the pn junction close to the remaining NRR centers. Therefore, the structure with NRR driven by the artificially created pn junction will contribute to radiative recombination in the central region and bring about an improvement.

[0011] This structure is useful for small optoelectronic devices based on GaN, AlGaN, InGaAlP material systems, or any system where QWI intermixing is used to prevent charge carriers from reaching the surface area of the mesa structure that defines the device.

[0012] Some aspects of the present invention relate to optoelectronic devices. The device is a laminate having a peripheral sidewall region, and includes an n-doped layer, and an active region layer deposited on the n-doped layer, the active region layer having a central first portion and a peripheral second portion. A p-doped layer is disposed on the active region layer. Further, the peripheral second portion includes an additional p-type dopant that causes quantum well intermixing in the peripheral second portion. Finally, a thin n-doped surface layer is provided on the peripheral sidewall extending substantially from the n-doped layer toward the upper portion of the p-doped layer. The thin n-doped surface layer is substantially parallel to the peripheral sidewall and forms an artificial pn junction that is also disposed at least partially inside the peripheral second portion and the p-doped layer.

[0013] As a result, the sidewall surface becomes n-doped, and such doping covers the p-doped layer and the QWI mixing area of the active region. As described above, the artificial pn junction provided by the n-doped surface layer of the sidewall of the device has a large sheet resistance and conducts only a very small parasitic current. The area of the pn junction on the device surface is further reduced compared to the relatively large area of the QWI mixing surface region on the sidewall in conventional devices. Finally, the pn junction includes a larger bandgap compared to the bandgap of the active region.

[0014] In some aspects, the thin n-doped surface layer includes a thickness in the range of 10 nm to 250 nm, particularly in the range of 50 nm to 150 nm. Thus, this thickness is very small compared to the active region. The quantum effect can direct the electrons to smaller dimensions as the electrons pass through the surface layer, thereby further reducing the current passing through this area. In some aspects, the p-type dopant that causes QWI may extend at least partially close to or even into the n-doped layer, thereby creating an unwanted pn junction. This pn junction may surround the central portion and have a lateral width of at least 500 nm.

[0015] The pn junction formed by the p-type dopant and the n-doped layer can extend laterally up to the surface sidewalls of the device. The n-type surface layer according to the proposed principle covers this area and prevents the formation of pn junctions on the surface of the sidewalls.

[0016] Another aspect relates to the different dopants and materials used to generate the QWI and the n-type surface layer. In some aspects, the p-type dopant includes Zn and the n-doped surface layer includes Te or Se. In some further aspects, the n-doped surface layer also includes a p-type dopant that is a residue of a previous processing step. However, the n-type dopant is at a higher concentration than the p-type dopant.

[0017] Another aspect relates to a method of manufacturing an optoelectronic device according to the proposed principle. After providing a carrier substrate, an n-doped layer is deposited on the carrier substrate. This process can include several preparatory steps such as smoothing the surface and adding a sacrificial layer for a subsequent re-bonding process.

[0018] In the next step, an active region layer is formed by depositing layers of different materials and / or different dopant concentrations on the n-doped layer. The active region layer can include one or more quantum wells. Thus, when depositing the active region layer, one or more layers of different material compositions are deposited on the n-doped layer, resulting in one or more layers that form different bandgaps.

[0019] After forming the active region, a p-doped layer is deposited on the active region layer. Next, a first structural mask is formed on the p-doped layer, and a first area is defined within the active region below the first structured mask. The above first area is intended to form the active zone of the optoelectronic device in a later step.

[0020] In the next step, a p-type dopant is diffused into a part of the active region layer surrounding the first area. The p-type dopant may contain Zn. The diffusion of the dopant into the active region layer causes quantum well intermixing in a second area adjacent to the first area. After the diffusion process, a second structured mask covering the first area within the active region and a part of the second area adjacent to the first area is deposited on the p-doped layer. Next, an adjacent mesa structure is formed in the part of the second area, whereby sidewalls extending from the first n-type doped layer across the pn junction between the first n-type doped layer and the p-type doped region to the p-type doped layer can be exposed. Thus, the mesa structure exposes the side surface of the device within the second area of the device, which is the part where the p-type dopant is diffused.

[0021] According to the proposed principle, a thin n-type surface layer extending from the first n-doped layer to substantially the surface of the p-doped layer is created on the sidewalls. An artificial pn junction is created by a thin surface layer separated from the surface of the sidewalls. Specifically, the thin layer covers the QWI area on the sidewalls of the mesa structure.

[0022] Thereafter, the resulting mesa structure can be re-bonded onto a temporary carrier to gain access to the n-doped layer. To protect the semiconductor material, an n-contact can be made and an insulating layer can be deposited. In some embodiments, the first structured mask may already contain a conductive material that will be used later for the p-contact. Similarly, additional highly doped current distribution layers may be provided in both the n-doped layer and the p-doped layer.

[0023] In some other embodiments, the active region layer includes an undoped layer or a slightly n-doped layer on the n-doped layer before depositing the active layer region structure. This layer can be deposited before forming the active layer region. In some other embodiments, depositing the p-doped layer includes depositing an undoped layer or a slightly p-doped layer on the active region layer before depositing the p-doped layer.

[0024] For various dopants, one or more of the following elements, tellurium, silicon, selenium, magnesium, and zinc can be used. Those skilled in the art may notice the use of other suitable elements or combinations of elements. The deposition of the material of the doped layer or the undoped layer can be carried out by MBE, MOCVD, MOVPE, ion deposition, and other suitable processes.

[0025] Other aspects relate to further parameters during various deposition processes. In some aspects, diffusing a p-type dopant can include several steps. In the first step, the dopant is deposited on the p-doped layer at a first temperature. Then, the dopant is diffused into the p-doped layer at a second temperature that is at least partially higher than the first temperature. This can provide better control of the diffusion depth.

[0026] In some other aspects, depositing a second structured mask includes depositing a mask layer, particularly an SiO2 layer, on the p-doped layer and optionally on the first structured mask. Then, the second mask on the p-doped layer is structured such that elements of the structured mask are removed in the projection of a second area surrounding a first area.

[0027] In some other aspects, a mesa structure is formed, for example, by etching a p-doped layer that includes a dopant, an active layer region, and a part of an n-doped region to form one or more cavities. These cavities can surround the device material and thus form a mesa structure. In some aspects, the sidewalls of the cavities are inclined with respect to the bottom of the n-doped layer in the mesa structure. In this case, the device may form a frustum of a pyramid.

[0028] Some other aspects relate to the formation of a thin surface layer on the sidewalls of the device. An n-type dopant, particularly Te or Se, can be provided to the sidewalls at a first temperature. In the next step, the deposited n-type dopant is diffused into the sidewall surface at a second temperature. Here, the concentration of the deposited dopant is selected such that after diffusing the deposited dopant into the sidewall surface, the sidewall includes a thin n-type surface layer. In the case of the diffusion process, the second temperature may be higher than the first temperature for at least some time.

[0029] The deposition process can include various approaches. For example, the n-type dopant can be evaporated or sputtered onto the sidewall surface at a first temperature. Alternatively, the n-type dopant can be deposited onto the sidewall surface at a first temperature by metalorganic chemical vapor deposition. Further alternatively, ion deposition may be used to implant the n-type dopant into the sidewalls.

[0030] Further aspects and embodiments according to the proposed principles will become apparent in connection with the various embodiments and examples described in detail in relation to the accompanying drawings.

Brief Description of the Drawings

[0031]

Figure 1

Figure 2

Figure 3

Figure 4

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Figure 6

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Figure 8

Mode for Carrying Out the Invention

[0032] The following embodiments and examples disclose different aspects according to the proposed principle and combinations thereof. The embodiments and examples are not necessarily to scale. Similarly, different elements may be enlarged or reduced for emphasis. It is self-evident that the individual aspects of the embodiments and examples shown in the figures can be combined with each other without contradiction to the principle according to the present invention without further explanation. Some aspects show regular structures or forms. It should be noted that in practice, there may be slight differences from or deviations from the ideal form without contradiction to the concept of the present invention.

[0033] Furthermore, the individual drawings and aspects are not necessarily shown in the correct size, and the ratios between the individual elements do not necessarily have to be essentially correct. Some aspects are emphasized by showing them enlarged. However, terms such as "above", "upper", "below", "larger", "smaller", etc. are correctly represented with respect to the elements in the figure. Therefore, such relationships between the elements can be inferred based on the figure.

[0034] The expression "deposited on ~" does not mean direct deposition, but rather indicates a general direction. Thus, depositing the first layer on the second layer may mean direct deposition, but may also mean deposition with one or more additional layers in between. The expression "doped layer" is not limited to a constant dopant concentration, but also includes a dopant gradient, abrupt change, or any other dopant profile along the growth direction. A "p-type" or "n-type" dopant is a dopant that results in the corresponding p-doped or n-doped region. Note that in general, without departing from the proposed principle, it is possible not only to reverse the growth direction, but also to exchange the type of dopant.

[0035] FIG. 1 shows an optoelectronic device, a conventional optoelectronic device in which non-radiative recombination of charge carriers is reduced due to quantum well intermixing (QWI).

[0036] The device includes a body as a stack having layers 10, 11-13, and 14. Layer 10 includes an n-doped material, for example, GaN, GaInN, AlGaInN, or a similar material system. The n-doped layer 10 is electrically contacted using an n-contact 16. The optoelectronic device also includes a quantum well structure as an active region including layers 11, 12, and 13 overlapping each other at their respective centers. Layer 11 disposed between the quantum well layer 12 and the n-doped layer 10 is an intrinsic layer of the same substrate as the n-doped layer 10. The quantum well layer 12 can include one or more quantum wells stacked on top of each other. A second intrinsic layer 13 is disposed on the quantum well layer 12. Similar to the first intrinsic layer, the second intrinsic layer includes the same substrate as the p-doped layer 13, and a p-contact 15 is deposited on this p-doped layer 13.

[0037] The optoelectronic device according to FIG. 1 includes a very small light-emitting surface area and can include a side end length in the range of several μm, for example, 3 μm to 15 μm. Therefore, the outer peripheral portion along the side wall of the device at the height of or near the height of the active area is relatively large compared to the main area. As a result, non-radiative recombination can occur near the side wall of the device in area 22 due to lattice mismatch, impurities, or other effects.

[0038] Therefore, a conventional device implements quantum well intermixing 17, as exemplified in the peripheral area close to the non-radiative recombination center 22. The quantum well intermixing 17 is achieved by additional p-type dopants diffused into the area surrounding the central area 25 where radiative recombination of the optoelectronic device takes place.

[0039] However, as indicated by the lightning symbol, the p-doped area 17 and the n-doped layer 10 form a residual pn junction, which is partially within the material of the optoelectronic device but also extends laterally around the device at the surface represented by the lightning symbol. The non-radiative recombination center is generally reduced by the quantum well intermixing area 17, but in particular, the residual pn junction near the side wall generates new centers of non-radiative recombination. As a result, although improvement is achieved by quantum well intermixing, the newly generated center 22 newly forms an artificial pn junction, which will further degrade the performance of the optoelectronic device. This artificial pn junction may include a bandgap larger than that of the central active region including the quantum well layer 12, but nevertheless can cause non-radiative recombination.

[0040] In order to further reduce the amount of non-radiative recombination, the inventors propose depositing an additional small-scale n-doped layer extending from the n-doped layer 10 across the quantum well mixing region 17 to the p-doped layer 14 on the sidewalls of the optoelectronic device. Each embodiment of such an optoelectronic device is illustrated in FIG. 2 using its structure. The thin n-doped surface layer 20 covers the sidewalls of the optoelectronic device and extends from the n-doped layer 10 to the upper surface of the p-doped layer 14. As a result, an artificial pn junction is created that extends from the n-doped layer towards the upper surface of the p-doped layer 14, thereby crossing the quantum mixing area 17. However, the created pn junction is here embedded within the material of the optoelectronic device itself. At the upper surface of the p-doped layer, the artificial pn junction extends to the surface, and thus, non-radiative recombination centers 22 are formed on the upper surface of the p-doped layer.

[0041] Unlike the previous embodiments, the thin n-doped surface layer 21 has several advantages over conventional solutions. For one, the surface area exposed to or mainly involved in non-radiative recombination is significantly smaller compared to conventional embodiments. Additionally, the thin surface layer 21 has a relatively large surface resistance, and as a result, the current flowing through the pn junction is extremely small. In this regard, it should be noted that the pn junction created by the thin surface layer and the p-doped material has a wider bandgap than the multiple quantum well layer 12. This larger bandgap, combined with the larger surface resistance of the thin surface layer 21, reduces the current flowing through the artificial pn junction to a very low level, specifically, further reducing the number of charge carriers reaching the upper surface with non-radiative recombination centers at the upper surface of the p-doped layer 14.

[0042] Figure 3 illustrates a more detailed example according to some aspects of the proposed principle. In this embodiment, the n-doped layer 10 contains Te as a dopant at the interface of the quantum well mixing region 17, which is generated by the p-type dopant, i.e., Zn. A thin surface layer containing an n-doped material layer is deposited on the surface of the sidewall of the mesa structure. The thin surface layer covers the non-radiative recombination centers at the pn junction interface between the Te-doped layer 10 and the Zn-doped area. The n-doped material layer 20 contains Te as a dopant and has a higher doping concentration compared to the quantum well intermixing dopant 18. The thickness x of the thin surface layer 20 ranges from several tens of nanometers to about 300 nm - 700 nm and is significantly smaller than the quantum well mixing area. The distance d between the thin layer 20 and the quantum well mixing area 17 of the active region 25 of the optoelectronic device provided here by the multiple quantum well layer 12 can be significantly larger and can range from about 100 nm to 1.5 μm.

[0043] Figures 4 to 8 illustrate various steps of the manufacturing method according to the proposed principle.

[0044] In Figure 4, an optoelectronic device is disposed on a substrate 9. For the purpose of manufacturing on the substrate 9, a first n-doped layer 10a is deposited. The n-doped layer 10a can contain one or more sacrificial layers (not explicitly shown herein) for subsequent re-bonding steps and can further contain layers with different concentrations of dopants. In this embodiment, Te is used as the dopant, but other dopants suitable for each substrate can also be used. The n-doped layer 10a contains a high n-doped current distribution layer.

[0045] On the n-doped layer 10a, a first intrinsic layer 11 containing the same base material as the layer 10a is deposited. This deposition can be carried out in successive steps by growing the base material (using MOCVD or MOVPE or other suitable deposition processes) and adjusting each Te dopant to an appropriate concentration. Next, a multiple quantum well layer 12 is deposited and arranged on the intrinsic layer 11, followed by a second intrinsic layer 13. The second intrinsic layer 13 contains the same base material as the following p-doped layer 14. The p-doped layer 14 may include, for example, one or more additional layers suitable for current distribution. Similar to the deposition of the layers 10a and 11, MOVCD, MOVPE or other suitable processes are used, and the respective dopant concentrations are adjusted to deposit the layers 13 and the p-doped layer 14.

[0046] An existing laminate can be manufactured and processed using various deposition methods such as MOCVD, MOVPE, etc. After depositing the p-doped layer 14, a first structured mask is placed on the upper surface of the p-doped layer 14. For this purpose, a layer of GaAs is deposited on the p-doped layer 14, and subsequently, the gallium arsenide material is structured so as to remain covering the area of the multiple quantum well layer 12 that will later form the active region. As a result, the GaAs layer 15a functions as a mask.

[0047] The structured GaAs mask 15a can also be used as a p-contact in a later step and is highly doped to reduce its surface resistance. After structuring the GaAs mask 15a, in a first step, a p-type dopant 18, Zn18 in this example, is deposited on the exposed surface of the p-doped layer 14 at a first temperature. Subsequently, the Zn dopant 18 is diffused into the p-doped layer 14 at a second temperature higher than the first temperature, thereby creating additional dopants in the area surrounding the active region. This diffusion process, together with an optional annealing step at yet another temperature that follows, generates an area 17 where quantum well intermixing occurs. The quantum well mixing area surrounds the active region 25.

[0048] The enclosed region 25 includes portions of the intrinsic layer 13, the quantum well layer 12, and the second intrinsic layer 11. Further, as illustrated in FIG. 4, the dopant concentration will at least partially diffuse into the n-doped layer region 10a, thereby resulting in at least an extension of the intrinsic portion and, in some cases, creating an artificial pn junction between the n-doped layer 10a and the quantum well mixing area 17.

[0049] In FIG. 5, the p-type contact 15 is further processed by depositing a transparent conductive material such as ITO as layer 15b on the GaAs contact layer 15a.

[0050] Next, according to FIG. 6, a second structured mask 23 is provided over a portion of the surface of the optoelectronic device covering the p-contact 15 and over the peripheral portion of the adjacent p-doped layer 14. The hard mask 23 can include SiO2 or other suitable materials that are resistant to subsequent mesa structuring steps as illustrated in FIG. 6.

[0051] During the mesa structuring step, an etching process is applied, thereby removing a portion of the quantum well mixing area 17, the n-doped layer 14, and the n-doped layer 10a, resulting in exposing the side edges of the optoelectronic device from the top of the p-doped layer 14 to the n-doped layer 10a. As a result, the optoelectronic device includes sidewalls that expose the quantum well mixing area 17 adjacent to the active region layer. Further, as shown herein, the sidewalls may be inclined, although the inclination may depend on the manufacturing method and etching steps implemented.

[0052] In the subsequent step, next, an n-type dopant is deposited on the sidewalls and then diffused into the sidewalls of the optoelectronic device and the sidewalls of its mesa structure. Te or any other suitable n-type dopant is used. The diffusion process will change the dopant concentration within the surface proximity area, resulting in a thin n-doped surface layer 20 that extends from the n-doped layer 10a across the quantum well mixing area 17 to the hard mask on the surface of the p-doped layer 14. The concentration of the n-type dopant is selected such that the conductivity type within the quantum well mixing area 17 and the conductivity type within the p-doped layer 14 at the surface change from a p-type material to an n-type material. As a result, an artificial pn junction is created at the interface between the thin surface layer 20 on one side and the quantum well mixing area 17 and the p-doped layer 14 on the other side. This pn junction is embedded within the material of the optoelectronic device. The bandgap of this artificially created pn junction is larger than the bandgap within the quantum well layer 12. Furthermore, since the thickness of the surface layer 20 is extremely small, a high surface resistance is generated for the charge carriers that may move into the active region of the pn junction.

[0053] Therefore, the residual current flowing through the artificially created pn junction is very small compared to the current flowing through the quantum well layer 12. Furthermore, according to the proposed principle, any non-radiative recombination centers move from the interface between the sidewalls and the quantum well mixing area 17 and the n-doped layer 10a to the upper surface of the p-doped layer 14. That is, the centers are located considerably farther away from the active region than in the conventional solution without a thin surface layer. Due to the inclination of the sidewalls, the non-radiative recombination area is smaller than in the conventional solution. Furthermore, due to the high surface resistance, only a very small current flows through the artificially created pn junction, and even less current reaches the non-radiative recombination centers at the top.

[0054] Figure 8 illustrates further method steps according to the proposed principle. The optoelectronic device is reattached to a carrier 9a which is a temporary support, and attached to the carrier 9a. In a subsequent step, the mesa structure is opened and the material of the n-doped layer 10a is removed until the optoelectronic device is separated. After separation of the optoelectronic device, a contact 16 is applied to the surface of the n-doped layer 10.

Explanation of Signs

[0055] 1 Optoelectronic device 9, 9a Carrier substrate 10 n-doped layer 10a n-doped layer 11 Intrinsic layer 12 Active region, quantum well 13 Intrinsic layer 14 p-doped layer 15 p-contact 15a First structured mask, contact layer 15b Conductive layer 16 n-contact 17 QWI area 18 p-type dopant diffusion region 18’ Gaseous p-type dopant 20 n-doped surface layer 21, 22 Non-radiative recombination center 23 Structured mask of 2 30 Cavity, mesa structure

Claims

1. A method for processing an optoelectronic device, comprising: - providing a carrier substrate; - depositing an n-doped layer on the carrier substrate; - depositing an active region layer on the n-doped layer; - depositing a p-doped layer on the active region layer; - forming a first structured mask on the p-doped layer and defining a first area within the active region layer below the first structured mask; - diffusing a p-type dopant into the active region layer, thereby causing quantum well intermixing in a second area adjacent to the first area; - depositing a second structured mask on the p-doped layer to cover the first area in the active region layer and a portion of the second area adjacent to the first area; - forming a mesa structure adjacent to the portion of the second area, the mesa structure extending to the n-doped layer, thereby exposing the pn junction between the n-doped layer and the region where the p-type dopant is diffused along its sidewalls; - fabricating a thin n-type surface layer on the sidewalls that extends from the n-doped layer substantially to the surface of the p-doped layer.

2. The method according to claim 1, wherein the first structured mask comprises a conductive material.

3. The method according to claim 1 or 2, wherein the step of depositing the active region layer comprises depositing a quantum well or multiple quantum well layer structure.

4. The method according to any one of claims 1 to 3, wherein depositing the active region layer comprises depositing an undoped layer or a slightly n-doped layer on the n-doped layer before depositing the active region layer structure.

5. The method according to any one of claims 1 to 4, wherein depositing the p-doped layer comprises depositing an undoped layer or a slightly p-doped layer on the active region layer before depositing the p-doped layer.

6. The dopant for the n-doped layer is selected from the group consisting of: - tellurium, - silicon, - selenium, and the dopant for the p-doped layer is selected from the group consisting of: - magnesium, - zinc, The method according to any one of claims 1 to 5.

7. Diffusing the p-type dopant is ​ - depositing a dopant for the p-doped layer on the p-doped layer at a first temperature; - diffusing the dopant for the p-doped layer into the p-doped layer at a second temperature that is at least partially higher than the first temperature, the method according to any one of claims 1 to 6.

8. Depositing a second structured mask comprises - depositing a mask layer on the p-doped layer and on the first structured mask; - structuring the second structured mask on the p-doped layer such that a region above the second area surrounding the first area is removed, the method according to any one of claims 1 to 7.

9. Forming a mesa structure comprises - etching a material of the p-doped layer including a dopant for the p-doped layer, the active region layer, and a part of the n-doped layer to form one or more cavities for constructing the mesa structure, wherein side walls of the cavities are inclined with respect to a bottom of the n-doped layer in the mesa structure, the etching, the method according to any one of claims 1 to 8.

10. Fabricating a thin n-type surface layer on the side walls comprises - depositing an n-type dopant on the side walls; - diffusing the deposited n-type dopant on the side wall surface, wherein a concentration of the deposited dopant is selected such that after diffusing the deposited dopant on the side wall surface, the side walls include a thin n-type surface layer, the diffusing, the method according to any one of claims 1 to 9.

11. The depositing step comprises - depositing the n-type dopant on the side wall surface at a first temperature by vapor deposition or sputtering; or - depositing the n-type dopant on the side wall surface at a first temperature by metalorganic chemical vapor deposition; and - diffusing the n-type dopant into the side wall surface at a second temperature that is at least partially higher than the first temperature, the method according to claim 10.

12. - a laminate having a peripheral side wall region, comprising - an n-doped layer; - an active region layer deposited on the n-doped layer, the active region layer having a central first part and a peripheral second part; - a p-doped layer disposed on the active region layer; comprising, the laminate, wherein the second portion of the periphery comprises a p-type dopant that causes quantum well intermixing in the second portion of the periphery; - a thin n-doped surface layer on the sidewall of the periphery, extending substantially upward from the n-doped layer toward the upper portion of the p-doped layer, and thus forming an artificial pn junction substantially parallel to the sidewall region of the periphery and at least partially internally of the second portion of the periphery and the p-doped layer; an optoelectronic device comprising.

13. The optoelectronic device according to claim 12, wherein the thin n-doped surface layer has a thickness in the range of 10 nm to 250 nm, particularly in the range of 50 nm to 150 nm.

14. The optoelectronic device according to claim 12 or 13, wherein the p-type dopant extends at least partially near or into the n-doped layer to form an artificial pn junction surrounding the central first portion.

15. The optoelectronic device according to any one of claims 12 to 14, wherein the second portion of the periphery has a lateral width of at least 500 nm.

16. The optoelectronic device according to any one of claims 12 to 15, wherein the p-type dopant comprises Zn and the n-doped surface layer comprises Te.

17. The optoelectronic device according to any one of claims 12 to 15, wherein the n-doped surface layer comprises the p-type dopant and an n-type dopant having a higher concentration than the p-type dopant.

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