Method for manufacturing Ga2O3 single crystal substrate and AlxGa(1-x)N semiconductor laminate

Abstract

To realize a Ga2O3-based single crystal substrate for obtaining a high-quality and homogeneous semiconductor film without occurring a crack and a peeling in a semiconductor layer and the Ga2O3-based single crystal substrate even when an AlxGa(1-x)N(0≤x≤1)-based semiconductor is laminated on the Ga2O3-based single crystal substrate, and to provide a manufacturing method of the Ga2O3-based single crystal substrate, and an AlxGa(1-x)N-based optical semiconductor device and an AlxGa(1-x)N-based power semiconductor device using the Ga2O3-based single crystal substrate.SOLUTION: A Ga2O3-based single crystal substrate has a principal plane warpage of -50 μm or more and 50 μm or less (including 0 μm). A manufacturing method of the Ga2O3-based single crystal substrate-processes a Ga2O3-based single crystal grown by a single crystal growth method of an induction heating scheme to produce the Ga2O3-based single crystal with a principal plane warpage of -50 μm or more and 50 μm or less (including 0 μm).SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a Ga2O3-based single crystal substrate and a method for manufacturing a Ga2O3-based single crystal substrate.

Background Art

[0002] Conventionally, attempts have been made to develop various electronic devices such as light emitting diodes (LEDs) and field effect transistors (FETs) by laminating an Al x Ga (1-x) N (0≦x≦1) - based semiconductor on a Ga2O3-based single crystal substrate (see, for example, Patent Document 1).

[0003] According to Patent Document 1, by first laminating a low-temperature AlN buffer layer on a Ga2O3-based single crystal substrate, a nitride semiconductor layer and the like are laminated on the buffer layer, making it possible to create various device structures.

[0004] However, in reality, when a low-temperature AlN buffer layer and then an Al x Ga (1-x) N-based semiconductor layer are laminated on a Ga2O3-based single crystal substrate, since the thermal expansion coefficient and lattice constant are different between the Ga2O3-based single crystal substrate and the Al x Ga (1-x) N-based semiconductor layer, when returning to room temperature during or after the semiconductor lamination, the Al x Ga (1-x) N-based semiconductor layer and the Ga2O3-based single crystal substrate warp, and cracks and peeling occur in the semiconductor layer and the substrate, often making it impossible to laminate a high-quality and homogeneous Al x Ga (1-x) N-based semiconductor layer.

[0005] Therefore, according to Patent Document 2, by laminating an interface resistance reduction layer and then a stress relaxation layer on a low-temperature AlN buffer layer, and laminating an Al x Ga (1-x) N-based semiconductor layer on the stress relaxation layer, cracks in the semiconductor layer can be effectively suppressed.x Ga (1-x) It is said that an N-based semiconductor can be obtained.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0007] However, even with the method described in Patent Document 2, cracks and peeling still remained, and it was insufficient. In addition, the increase in new semiconductor lamination processes such as an interface resistance reduction layer and a stress relaxation layer is not desirable because the lamination process becomes complicated.

[0008] At present, the technology for laminating semiconductors on a Ga2O3-based single crystal substrate is still in the research and development stage. In semiconductor lamination technology, generally, the crystal system to which the single crystal belongs is one of the most important basic elements. Currently, the main semiconductor single crystal substrates used in various semiconductor devices include, for example, Si substrates, GaAs substrates, SiC(4H) substrates, sapphire substrates, etc. Their crystal systems are cubic, cubic, hexagonal, and trigonal, respectively, all of which are crystal systems with high symmetry and weak cleavage properties. In contrast, the new crystal Ga2O3-based single crystal belongs to the monoclinic crystal system with low symmetry, and also shows extremely strong cleavage properties, making cracks and peeling very likely to occur. Therefore, there was a possibility that the conventional semiconductor lamination technology would not work.

[0009] The present invention has been made in view of the above problems, and Al on a Ga2O3-based single crystal substrate x Ga (1-x)Even when an N (0≦x≦1) - type semiconductor is laminated, cracks or peeling do not occur in the semiconductor layer or the Ga2O3 - based single - crystal substrate, and a high - quality and homogeneous semiconductor film can be obtained. The realization of a Ga2O3 - based single - crystal substrate, a method for manufacturing the Ga2O3 - based single - crystal substrate, and an Al x Ga (1-x) N - type optical semiconductor device and an Al x Ga (1-x) N - type power semiconductor device are provided.

Means for Solving the Problems

[0010] As a result of intensive studies by the present inventors, it has been found that the above problems are solved by the present invention of the following [1] to

[18] .

[0011] 〔1〕A Ga2O3 - based single - crystal substrate having a warp amount of the main surface of - 50 μm or more and 50 μm or less (including 0 μm).

[0012] 〔2〕The Ga2O3 - based single - crystal substrate according to the above [1], having a circular planar shape, a circular diameter of 24 mm or more and 160 mm or less, and a thickness of 0.1 mm or more and 2.0 mm or less.

[0013] 〔3〕The Ga2O3 - based single - crystal substrate according to the above [1], having a rectangular planar shape, a long side of the rectangle of 15 mm or more and 150 mm or less, and a thickness of 0.1 mm or more and 2.0 mm or less.

[0014] 〔4〕The Ga2O3 - based single - crystal substrate according to the above [3], wherein the rectangle is a square and at least one or more corners are chipped.

[0015] 〔5〕The Ga2O3 - based single - crystal substrate according to any one of the above [1] to [4], wherein the main surface is any one of the (100) plane, (010) plane, (001) plane, (-201) plane, and (101) plane.

[0016] [6] A Ga2O3-based single crystal substrate according to any one of [1] to [4] above, wherein the main surface is a plane inclined at an angle of 7° or less (excluding 0°) with respect to any one of the (100) plane, the (010) plane, the (001) plane, the (-201) plane, and the (101) plane.

[0017] [7] A Ga2O3-based single crystal substrate according to any one of the above [1] to [6], wherein the main surface is a (100) plane or a plane inclined at an angle of 7° or less from the (100) plane, and at least one end face is provided which is perpendicular to the main surface and parallel to the b-axis or inclined at an angle of 5° or less from the b-axis.

[0018] [8] The main surface is other than the (100) surface or the (100 )Surface The Ga2O3-based single crystal substrate according to any one of the above [1] to [6], further comprising at least one end face other than a face inclined within a range of 7° or less from the main surface, which is perpendicular to the main surface and parallel to a line of intersection between the main surface and the (100) plane, or inclined within a range of 5° from a parallel direction.

[0019] [9] The dislocation density of the above-mentioned main surface is 0 / cm 2 More than 1×10 5 pieces / cm 2 The Ga2O3-based single crystal substrate according to any one of the above [1] to [8],

[0020]

[10] The Ga2O3-based single crystal substrate according to any one of the above [1] to [9], containing one or more elements of Group 14 elements or Group 17 elements as n-type dopants in a range of 0.02 mol % or more and 0.15 mol % or less in total.

[0021]

[11] A Ga2O3-based single crystal substrate according to any one of the above [1] to [9], containing a p-type dopant selected from Group 1 elements, Group 2 elements, and Group 15 elements, or one or more elements of Fe, Cu, and Zn in a total amount within the range of 0.02 mol% to 0.15 mol%.

[0022]

[12] Al on the main surface x Ga (1-x)The Ga2O3 single crystal substrate according to any one of the above [1] to

[11] , on which an N (0≦X≦1) - type semiconductor layer is formed.

[0023] 〔13〕The Ga2O3 single crystal substrate according to any one of the above [1] to

[11] , on which a Ga2O3 epitaxial layer or an AlGaN epitaxial layer is laminated and formed on the main surface.

[0024] 〔14〕The Ga2O3 single crystal substrate according to

[13] above, wherein the thickness of the Ga2O3 epitaxial layer or the AlGaN epitaxial layer is 1 nm or more and 50 μm or less.

[0025] 〔15〕The Ga2O3 single crystal substrate according to

[13] or

[14] above, wherein the surface roughness Ra of the Ga2O3 epitaxial layer or the AlGaN epitaxial layer is 3 nm or less.

[0026] 〔16〕A method for manufacturing a Ga2O3 single crystal substrate, which is processed from a Ga2O3 single crystal grown by a single crystal growth method of an induction heating method, and the warp amount of the main surface is -50 μm or more and 50 μm or less (including 0 μm).

[0027] 〔17〕The method for manufacturing a Ga2O3 single crystal substrate according to

[16] above, wherein the growth direction of the Ga2O3 single crystal is any one of the a - axis, b - axis, and c - axis directions, or a direction inclined within a range of 7° or less with respect to any one of the a - axis, b - axis, and c - axis directions (however, 0° is not included).

[0028] 〔18〕The method for manufacturing a Ga2O3 single crystal substrate according to

[16] or

[17] above, wherein a Ga2O3 epitaxial layer or an AlGaN epitaxial layer is formed on at least the main surface of the entire surface of the Ga2O3 single crystal substrate.

Advantages of the Invention

[0029] When the Ga2O3 single crystal substrate of the present invention is used as a base substrate, Al x Ga (1-x)Cracks and peeling that occur during the stacking process of N-based semiconductors can be eliminated, and warping during stacking can be significantly suppressed, enabling a uniform temperature distribution within the substrate plane. Therefore, high-quality and homogeneous Al x Ga (1-x) It has been found that N-based semiconductor stacked films can be grown. Therefore, for example, Al x Ga (1-x) N-based ultraviolet LEDs, which are a type of optical semiconductor device, can be fabricated with high quality, and more ultraviolet LED elements can be obtained from a single substrate, thereby increasing the yield. Furthermore, it becomes possible to fabricate ultraviolet LEDs on larger substrates, improving productivity. Similarly, the same applies to power semiconductor devices.

Brief Description of the Drawings

[0030]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0031] In the present embodiment, the Ga2O3-based refers to β-type Ga2O3 or β-Ga2O3 containing Al. When Al is included, the composition ratio is (Al 1-x Gax ) It is a crystal of 2O3 (0 < X ≤ 1).

[0032] As an example of a method for growing a Ga2O3-based single crystal from which the substrate 16 or 21 is cut out, the EFG (Edge-defined Film-fed Growth) method can be mentioned. FIG. 1 is a schematic cross-sectional view showing the structure of a growth apparatus 1 for a Ga2O3-based single crystal using the EFG method. Note that the crystal growth method is not limited to the EFG method, and the CZ (Czochralski) method, the Bridgman method, or the Flux method may also be used.

[0033] As shown in FIG. 1, inside the growth apparatus 1, there is a crucible 3 for filling the raw material of the Ga2O3-based single crystal, and a die 5 provided with a slit 5A is installed in the crucible 3. A lid 6 is placed on the upper surface of the crucible 3 except for the part of the die 5.

[0034] Here, the Ga2O3 raw material to be used is Ga2O3 with a high purity of 5N (99.999%) or more, preferably 6N (99.9999%) or more, and with a higher bulk density. Also, various additives may be added to the raw material according to the desired physical property values (e.g., electrical resistivity, carrier type, carrier density, mobility, transmittance, dislocation density, etc.) of the Ga2O3-based single crystal substrate. For example, as an n-type dopant, one or more elements among Group 14 and 17 elements are added. Or, as a p-type dopant, one or more elements among Group 1, 2, 15 elements and Fe, Cu, Zn are added.

[0035] It becomes a high temperature of about 1800 °C or higher, which is the melting point of β-Ga2O3. The crucible 3, die 5, lid 6, etc. exposed to the melt or vapor of Ga2O3 are made of a high melting point material that is less likely to react with the melt or vapor of Ga2O3 and has a heat resistance of more than about 1800 °C. Currently, iridium is most suitable, so iridium is used. Therefore, the growth atmosphere needs to be an inert atmosphere containing 100 Vol.% of an inert gas such as argon, nitrogen, carbon dioxide, or an inert atmosphere containing up to about 10 Vol.% of oxygen. It may be pressurized to suppress the evaporation of the raw material from the crucible 3.

[0036] The crucible 3 is induction-heated to a predetermined temperature by a heater unit 9 composed of an induction heating coil, the raw material in the crucible 3 melts, and the melt rises through the slit 5A due to capillary action.

[0037] Here, as for the heating method in crystal growth, there is generally resistance heating as used in the CZ method crystal growth of Si single crystals. However, in the case of Ga2O3-based single crystal growth, induction heating is more suitable. This is because Ga2O3 has a property that it easily sublimates and evaporates at high temperatures. In the case of crystal growth by resistance heating where the temperature of the entire hot zone has to be raised to a high temperature, sublimation and decomposition evaporation occur from the seed crystal and the grown crystal during growth. As a result, those crystals become thinner and thinner, and at worst, all the crystals sublime, decompose, evaporate, and disappear. Consequently, the yield of crystal growth decreases or crystal growth becomes impossible. On the other hand, in the case of induction heating, only iridium parts such as the crucible 3 and the lid 6 are heated to a high temperature by local heating, so the crystal is relatively easy to cool, and sublimation and decomposition evaporation from the crystal part are suppressed to an almost negligible level. Also, in the case of induction heating, since there is no unnecessary heating, sublimation and evaporation from the crucible 3 are also relatively suppressed. As a result, the yield of crystal growth and the raw material utilization efficiency are improved. Furthermore, reduction of the power consumption required for heating can also be achieved.

[0038] First, the seed crystal 10 located above the slit 5A is lowered and brought into partial contact with the die upper surface part 5B where the melt 2 is exposed. Then, by pulling up the seed crystal 10 at a predetermined speed, crystallization starts from the melt contact part of the seed crystal 10. Note that the pulling-up direction becomes the crystal growth direction.

[0039] While raising the seed crystal 10 while making it as hot as possible and adjusting the pulling-up speed, a thin neck part is created (necking 13a) for removing dislocations in the crystal. Specifically, at a growth temperature of 1800 °C or higher, the thickness of the neck part is made to be about half or less of the cross-sectional area in contact with the die upper surface part 5B in the seed crystal 10. Note that in principle of crystal growth, in order to obtain a single crystal with few dislocations, it is preferable that the seed crystal has as few dislocations as possible.

[0040] Next, the rising speed of the seed crystal holder 11 is set to a predetermined speed, and the growth temperature is decreased at a predetermined rate, and crystal growth is performed so that the Ga2O3 single crystal 13 expands at a constant angle θ in the width direction of the die 5 with the seed crystal 10 as the center (spreading 13b). In order to grow a single crystal without twins and with high crystallinity, it is preferable to make the change in the growth temperature as small as possible and to increase θ° little by little and expand it slowly. If θ° is increased, the atoms in the melt will be arranged and crystallized rapidly, so that more twins will occur. Specifically, when it is 30° or less, twins will disappear and a single crystal with high crystallinity can be grown.

[0041] However, regardless of the magnitude of θ, when the impurity concentration in the single crystal is 0.02 mol% or more, twins do not occur. When the impurity concentration is lower than 0.02 mol%, twins occur. When the impurity concentration is higher than 0.15 mol%, although twins do not occur, the crystallinity deteriorates. Therefore, the impurity concentration is preferably 0.15 mol% or less.

[0042] When the Ga2O3 single crystal 13 spreads to the full width of the die 5, subsequently, a portion (straight barrel portion 13c) having the same width shape as the full width of the die 5 is pulled up to an appropriate length. For example, when manufacturing a 2-inch substrate, it is pulled up at 10 mm / hr for about 55 mm. By growing the above-mentioned necking, spreading, and straight barrel portion, the dislocation density of the Ga2O3 single crystal 13 can be made 1.0×10 5 pieces / cm 2 or less.

[0043] The lifting surface orientation can be set in various ways according to the surface orientation of the main surface. The lifting direction is any one of the a-axis, b-axis, and c-axis directions that are likely to crystallize during crystal growth and are less likely to cause cracks, peeling, or chipping during substrate processing, or any direction inclined within a range of 7° or less with respect to each axis. As the main surface 15 of the substrate 16 or 21, it is possible to form a semiconductor layer with high quality and good surface morphology on the main surface 15, and it is suitable for fabricating a device structure such as an ultraviolet LED. Any one of the (100) plane, (010) plane, (001) plane, (101) plane, (-201) plane, and a plane inclined within an angular range of 7° or less (excluding 0°) with respect to any one of the (100) plane, (010) plane, (001) plane, (101) plane, (-201) plane is preferred.

[0044] Next, a method for processing the crystal-grown Ga2O3 single crystal 13 into a circular Ga2O3 single crystal substrate 16 as shown in FIG. 3 or a rectangular shape 21 as shown in FIG. 4 will be described. For example, a slicing machine, a core drill, an ultrasonic processing machine, etc. are used to perform cutting processing into a circular or rectangular shape to produce a circular substrate or a rectangular substrate of a predetermined size.

[0045] Then, the substrate end face is shaped using an end face grinding machine.

[0046] Also, before and after the above cutting process, an orifla (orientation flat) may be formed on the substrate 16 or 21 as necessary.

[0047] Regarding the above orifla, when the main surface is the (100) plane or a plane inclined within a range of 7° or less from the (100) plane, the end face perpendicular to the main surface and parallel to the b-axis or inclined within a range of 5° from the b-axis is provided as the orifla. When the main surface is other than the (100) plane or a plane inclined within a range of 7° or less from the (100) plane, an end face inclined within a range of 5° from a direction parallel or parallel to the intersection line between the main surface and the (100) plane is provided.

[0048] Then, as shown in Fig. 3(b), one or more orifices may be provided with respect to the main surface.

[0049] In addition, when the rectangular substrate is square, as shown in Fig. 4(b), the end face of the portion with a notch may be used as the orifice, and one or more notched portions may be provided.

[0050] By fabricating the orifice in the above crystal orientation, it is possible to prevent cracks, chipping, and peeling from occurring in the substrate during processing, and at the same time, the crystal orientation of the substrate can be simply specified.

[0051] Next, one side of the fabricated substrate 16 or 21 is used as the main surface 15, and lapping and polishing processes such as polishing are performed on the main surface 15 to make the main surface 15 super flat. Also, polishing is performed on the back surface 19 as required for the shape, etc., and at the same time, the thickness of the substrate 16 or 21 is adjusted. Silicon carbide or alumina is used as the abrasive grains for lapping. For polishing, chemical mechanical polishing is used, and colloidal silica is used as the CMP abrasive grains.

[0052] As described above, the surface roughness Ra of the main surface 15 becomes 3.0 nm or less, and the surface roughness Ra of the back surface 19 becomes the required roughness, which is 0.1 nm or more.

[0053] After the above polishing process, dirt such as silica adhering to the substrate is removed, and in order to remove and adjust residual processing strain and form a clean oxide layer on the substrate surface, after organic cleaning with acetone or the like, hydrofluoric acid cleaning and further RCA cleaning are all or partially performed.

[0054] Furthermore, in the above substrate processing step, heat treatment for the purpose of removing residual thermal strain, residual processing strain, coloring, and improving electrical properties, which is common for those skilled in the art of substrate processing fields such as Si, GaAs, and sapphire single crystals, is appropriately carried out. As the atmosphere gas for the heat treatment, any one of nitrogen, carbon dioxide, argon, oxygen, and air may be used, and they may be appropriately combined, except for reducing gases such as hydrogen gas that have an effect of roughening the substrate surface. The processing temperature is 500°C to 1600°C, preferably 700 to 1400°C. Also, it may be pressurized.

[0055] Note that the shape of the substrate in the planar direction is a square shape, a circular shape, or a square shape or a circular shape provided with an orifice.

[0056] And, even when an Al x Ga (1-x) N-based semiconductor film is laminated on the substrate, cracks and peeling do not occur. For the purpose of precisely controlling the shape, and at the same time, ensuring the rigidity as a self-supporting substrate and having a strength such that no inconvenience occurs during handling, and further preventing the occurrence of cracks, peeling, and chipping, in the case of the square shape, the long side is preferably 15 mm or more and 150 mm or less, and in the case of each circular shape, the diameter φ is preferably 25 mm or more and φ160 mm or less.

[0057] For the same reason as above, the thickness of the substrate is preferably 0.10 mm or more and 2.0 mm or less.

[0058] As described above, by the substrate processing including the heat treatment and substrate cleaning of the substrate 16 or 21, the warpage amount of the main surface 15 is within the above range. Note that internal modification processing by laser on the substrate may be performed as necessary to achieve the above warpage amount.

[0059] Here, the warpage amount is defined such that its absolute value is the value of SORI (in accordance with SEMI standards) and it has a ± sign representing the direction of warpage. The ± sign is obtained from the cross-sectional view of the SORI measurement result or BOW measurement, etc. When the center position of the substrate surface is above the reference plane, it is + (convex shape), and when it is below the reference plane, it is - (concave shape).

[0060] The above SORI and BOW are obtained using a flatness measuring device. For example, a measuring device using an optical interference method (manufactured by NIDEK) is used. The measurement is as follows.

[0061] First, the least-squares plane based on all the height data on the main surface 15 becomes the reference plane S.

[0062] As shown in FIG. 5, SORI is the sum of the vertical distances (absolute values) from the reference plane S on the surface in a state where the back surface of the substrate 16 or 21 is adsorbed and fixed at one to three points (non-adsorption) by an adsorption chuck (not shown). Since SORI is the sum of the vertical distances to the highest point and the lowest point both being absolute values, SORI is always a positive value. Let the vertical distance from the reference plane S to the highest point be A and the vertical distance from the reference plane S to the lowest point be B, then SORI is defined by Equation (1) below.

[0063]

Equation

[0064] Therefore, for example, in the case of FIG. 5, the warpage amount is -(|A| + |B|).

[0065] Note that the SORI value is the same as the so-called PV (Peak to Valley) value when the least-squares plane on the main surface 15 is used as the reference plane.

[0066] As shown in FIG. 6, BOW is the value obtained by adding the absolute values of the distance between the point (excluding the center C) with the largest absolute value having a sign different from that of the substrate center C on the surface and the center C in a state where the back surface of the substrate 16 is adsorbed at one to three points (non-adsorption), and attaching the sign of the center C. Note that the upper side of the reference plane S is the positive side and the lower side is the negative side. In FIG. 6, since the center C is located below the reference plane S, BOW is a negative value.

[0067] The dislocation density of the substrate 16 or 21 cut out from the single crystal grown by the above EFG method and processed into a substrate is 1.0×10 5 pieces / cm 2 or less. When a semiconductor layer is laminated on such a low-dislocation-density substrate 16 or 21 to fabricate, for example, an LED, the luminous efficiency and device lifetime can be increased. Also, for example, if the low-dislocation-density substrate 16 or 21 is used for a power device, the power conversion efficiency and device lifetime can be improved.

[0068] The above dislocation density is measured by a transmission electron microscope (TEM). Also, since the density of dot-like etch pits when the substrate is etched corresponds to the dislocation density, it may be evaluated by etching.

[0069] Next, a method by metal organic chemical vapour deposition (MOCVD) as an example of semiconductor lamination on the main surface 15 of the substrate 16 or 21 will be described. Note that the lamination method is not limited to the MOCVD method, and it may be grown by a molecular beam epitaxy (MBE) method, a pulse laser deposition (PLD) method, a hydride vapour phase epitaxy (HVPE) method, etc. In order to obtain a high-quality Al x Ga (1-x) N semiconductor laminated film, first, an Al x Ga (1-x) N buffer layer is grown at a growth temperature of 500 to 900 °C to a thickness of 1 to 200 nm.

[0070] Next, an Al x Ga (1-x) N semiconductor layer is grown, for example, at 800 to 1100 °C to a thickness of 100 µm or less, and the temperature is lowered after the growth is completed.

[0071] After reaching near room temperature, Al x Ga(1-x) Take out the Ga2O3 single crystal substrate with the N-based semiconductor laminated thereon, and perform quality evaluation of cracks and delamination using visual inspection and an optical microscope.

[0072] According to the above form, when a Ga2O3 single crystal substrate with the warp amount of the main surface within the above range is used as the base substrate, Al x Ga (1-x) It is possible to eliminate cracks and delamination generated during the lamination stage of the N-based semiconductor. At the same time, since the warp during lamination can be suppressed to a small level, the temperature distribution within the substrate surface can be made uniform, so that high-quality and homogeneous Al x Ga (1-x) N-based semiconductor lamination can be grown.

[0073] Therefore, for example, it becomes possible to fabricate high-quality Al x Ga (1-x) N-based ultraviolet LEDs, which are a type of optical semiconductor device, and more ultraviolet LED elements can be obtained from a single substrate, thus increasing the yield. Furthermore, since it becomes possible to fabricate ultraviolet LEDs on a larger-sized substrate, productivity is improved. Also, the same applies to semiconductor devices for power use.

[0074] On the contrary, when a Ga2O3 single crystal substrate with a warp amount outside the above range is used as the base substrate, Al x Ga (1-x) Cracks and delamination occur during the lamination stage of the N-based semiconductor. Also, since the warp during lamination becomes large and the temperature distribution within the substrate surface becomes non-uniform, it becomes impossible to grow a high-quality and homogeneous Al x Ga (1-x) N-based semiconductor laminated film.

[0075] In addition, a Ga2O3-based epitaxial layer or an AlxGa(1-x)N-based epitaxial layer may be laminated and formed on the entire surface or at least the main surface 15 of the substrates 16 and 21 by methods such as MOCVD method or HVPE method. When the Ga2O3-based epitaxial layer is laminated and formed, by laminating 50 μm or less on the main surface 15, crystal defects are reduced and the Ra value becomes smaller than the surface roughness Ra of the main surface 15. Thereby, higher-quality Al x Ga(1-x) It becomes possible to stack and form N layers on the upper Ga2O3-based epitaxial layer. In the case of an AlxGa(1-x)N-based epitaxial layer, by stacking 1 nm or more, the resistance of the Ga2O3-based single crystal substrate to the hydrogen carrier gas, which is essential for normal nitride-based semiconductor growth, is improved, and deterioration of the substrate is suppressed. Therefore, the desired high-quality Al x Ga (1-x) N-based semiconductor layer can be grown on the Ga2O3-based single crystal substrate. And, not only the Al x Ga (1-x) N-based semiconductor layer, but also a high-quality Al x Ga (1-x) N-based semiconductor laminate including the substrates 16 and 21 can be obtained.

[0076] Furthermore, instead of the above Al x Ga (1-x) N-based epitaxial layer, the surfaces of the substrates 16 and 21 may be nitrided.

[0077] Examples according to the present invention will be described below, but the present invention is not limited only to the following examples.

[0078] (Example 1) The Ga2O3-based single crystal substrates according to Samples 1 to 7 of this example were cut out by a core drill from a single crystal grown by b-axis pulling by the EFG method and formed. The common conditions for each of Samples 1 to 7 of the examples are as follows. The shape of the substrate in the plane direction is circular with one orifice surface shown in FIG. 3 provided, the Ga2O3-based single crystal forming the substrate is a β-Ga2O3 single crystal, Si is doped and contained at 0.05 mol%. Further, the diameter of the Ga2O3-based single crystal substrate is φ2 inches, the main surface is a (101) surface with an off-angle of 0.0°, the thickness is 0.70 mm, and the dislocation density of the main surface is 4x10 4 pieces / cm 2 and is twin-free.

[0079] After heat-treating the substrate after cutting, the outer shape of the substrate was shaped using a surface grinding machine. Then, only lapping or lapping and polishing were performed on the back surface of the substrate in the same manner as the main surface. And lapping and polishing were performed on the main surface of the substrate. After polishing, organic cleaning, hydrofluoric acid cleaning, and RCA cleaning were carried out.

[0080] By changing the processing conditions (polishing, heat treatment, substrate cleaning, internal modification processing) applied to the main surface and the back surface for each example sample, the warpage amounts of the Ga2O3 single crystal substrates of each example sample were formed as shown in Table 1.

[0081]

Table 1

[0082] (Comparative Example 1) Also, as comparative example samples 1 to 2, the warpage amounts of the Ga2O3 single crystal substrates were processed in the same manner as in Example 1 and formed as shown in Table 2.

[0083]

Table 2

[0084] On the main surfaces of the Ga2O3 single crystal substrates of example samples 1 to 7 and comparative example samples 1 to 2, an AlN buffer layer was grown at 550 °C to a thickness of 3 nm by the MOCVD method, and then a crystal of Si-doped n-type Al0.4Ga0.6N composition was grown at 1050 °C to a thickness of 4 μm. Then, the temperature was lowered, and after reaching room temperature, the samples were taken out of the apparatus. When X-ray diffraction (XRD) measurement of the Al0.4Ga0.6N film was performed, the entire main surface of each sample was the (0001) plane and epitaxial growth had occurred. As a result of quality evaluation, it was confirmed that no cracks or peeling occurred in either the Al0.4Ga0.6N layer or the Ga2O3 single crystal substrate in Examples 1 to 7.

[0085] On the other hand, in all comparative example samples 1 to 2, Al 0.4 Ga 0.6It was confirmed that either cracks or peeling occurred in the N-layer or Ga2O3 single crystal substrate.

[0086] (Example 2) The Ga2O3 single crystal substrates according to Example Samples 8 to 14 were cut out and formed into a rectangle of 20 mm × 30 mm by a slicing machine from single crystals grown by pulling up along the b-axis by the EFG method. The common conditions for each of Example Samples 8 to 14 are as follows. The shape of the substrate in the plane direction is all rectangular, the Ga2O3 single crystal forming the substrate is a β-Ga2O3 single crystal, and Si is doped and contained at 0.05 mol%. Further, the main surface of the Ga2O3 single crystal substrate is a (101) plane with an off-angle of 0.0°, the thickness is 0.70 mm, and the dislocation density of the main surface is 4x10 4 pieces / cm 2 and is twin-free.

[0087] Then, the warpage amount of the Ga2O3 single crystal substrate was processed in the same manner as in Example 1 and formed as shown in Table 3.

[0088]

Table 3

[0089] (Comparative Example 2) Also, as Comparative Example Samples 3 to 4, the warpage amount of the Ga2O3 single crystal substrate was processed in the same manner as in Example 2 and formed as shown in Table 4.

[0090]

Table 4

[0091] On the main surfaces of each of the Ga2O3 single crystal substrates of Example Samples 8 to 14 and Comparative Example Samples 3 to 4, an AlN buffer layer and then an n-type Al 0.4 Ga 0.6 N crystal was grown, and the sample was taken out after cooling. Al 0.4 Ga 0.6From the X-ray diffraction (XRD) measurement of the N film, it was confirmed that the entire main surface of each sample was the (0001) plane and epitaxial growth had occurred. As a result of quality evaluation, in Examples 8 to 14, Al 0.4 Ga 0.6 Neither cracks nor peeling were observed in the N layer or the Ga2O3 single crystal substrate.

[0092] On the other hand, in all Comparative Example samples 3 to 4, either cracks or peeling occurred in the n-type Al 0.4 Ga 0.6 N layer or the Ga2O3 single crystal substrate.

[0093] As described above, from Examples 1, 2 and Comparative Examples 1, 2, when the substrate 16 or 21 with the warpage amount in the range of -50 μm or more and +50 μm or less was used as the underlying substrate when laminating the system semiconductor, cracks and peeling could be eliminated. At the same time, since the in-plane temperature distribution of the substrate during lamination could be made uniform, a high-quality and homogeneous Al x Ga (1-x) N system semiconductor laminated film could be grown. Al x Ga (1-x) N system semiconductor laminated film could be grown.

[0094] (Example 3) Among the samples of Example 1, a sample having the same conditions as Sample 4 in which no cracks or peeling occurred was replicated, and a vertical ultraviolet LED, which is an optical device, was fabricated.

[0095] The laminated structure of the vertical ultraviolet LED 23 is, for example, as shown in FIG. 7. First, on the above n-type Al 0.4 Ga 0.6 N layer 25, an InAl 0.4 Ga 0.6 N layer 26, which is an Si-doped n-type cladding layer, is grown at 1000 °C to a thickness of 25 nm by the MOCVD method. In is added to improve the luminous efficiency, and its composition ratio is less than 1%.

[0096] Next, as the light-emitting layer, in order to aim for an emission wavelength of 300 nm, InAl 0.5 Ga 0.5 N barrier layer 27 is grown at 1050 °C for 6 nm, and InAl 0.3 Ga 0.7 N quantum well layer 28 is grown at 1050 °C for 2 nm, and a multilayer structure in which the barrier layer and the quantum well layer are grown alternately is grown in three layers as shown in FIG. 7.

[0097] Next, a Mg-doped p-type InAl 0.6 Ga 0.4 N electron blocking layer 29 is grown at 1050 °C for 20 nm.

[0098] Next, a Mg-doped p-type InAl 0.5 Ga 0.5 N cladding layer 30 is grown at 1050 °C for 20 nm.

[0099] Next, a Mg-doped p-type InAl 0.3 Ga 0.7 N contact layer 31 is grown at 1000 °C for 10 nm.

[0100] Next, as the p-side electrode 32, a Ni / Al laminated structure that forms an ohmic contact and highly reflects ultraviolet light coming from the light-emitting layer is formed on the p-type contact layer 31.

[0101] Also, as the n-side electrode 33, a Ti / Au laminated structure that forms an ohmic contact with the Ga2O3-based single crystal substrate 16 and highly transmits ultraviolet light coming from the light-emitting layer side is formed.

[0102] By applying electricity to the above n-side electrode 33 and p-side electrode 32, ultraviolet light was emitted from the n-side electrode 33 side of this ultraviolet LED 23.

[0103] By using the Ga2O3 single crystal substrate 16 with the warpage amount within a predetermined range, the vertical UV LED 23 that could not be realized on the sapphire substrate could be realized with high quality without causing cracks or peeling. Furthermore, since it became possible to fabricate the vertical UV LED 23 on a larger-sized substrate, the productivity could be improved.

[0104] (Example 4) Among the samples of Example 1, a sample having the same conditions as Sample 5 where no cracks or peeling occurred was replicated, and a vertical metal-insulator-semiconductor field effect transistor (MISFET) which is a high-breakdown-voltage power device was fabricated.

[0105] As an example, the stacked structure of the vertical MISFET 34 is as shown in FIG. 8. First, in the above n-type Al 0.4 Ga 0.6 In the N layer 25, N is ion-implanted using an ion implantation apparatus to form a p-type region 35.

[0106] Next, an n+-type region 36 is formed by ion-implanting Si into the above p-type region 35.

[0107] On the upper parts of the above p-type region 35 and the above n+ region 36, a source electrode 37 is formed in a Ti / Al stacked structure by a vapor deposition apparatus as shown in FIG. 8. Also, on the upper parts of the above n-Al 0.4 Ga 0.6 N layer 25, the above p-type region 35, and the above n+-type region 36, Al2O3 which is a gate insulator 38 is formed by a vapor deposition apparatus, and a gate electrode 39 is formed of Al on the gate insulator 38.

[0108] On the other hand, a drain electrode 40 is formed in a Ti / Al stacked structure on the Ga2O3 single crystal side to complete.

[0109] By using the substrate 16 with the warpage amount range within -50 μm or more and +50 μm or less in this way, Al x Ga(1-x) N A high-voltage vertical MISFET 34 with stacked semiconductors can be fabricated without cracks or peeling. Furthermore, it becomes possible to fabricate the vertical MISFET 34 on a large-sized substrate, improving productivity.

[0110] Although the invention made by the present inventors has been specifically described above, the present invention is not limited to the embodiments and examples described above, and many modifications are possible by those having ordinary knowledge in the art within the technical idea of the present invention.

[0111] The scope of the present invention is determined by the broadest interpretation permitted by the claims and their equivalents to the maximum extent permitted by law, and is not limited or restricted by the detailed description given above.

Explanation of Reference Numerals

[0112] 1 Growth apparatus 2 Melt containing Ga2O3 3 Crucible 4 Support base 5 Die 5A Slit 5B Die upper surface portion 6 Lid 7 Thermocouple 8 Heat insulating material 9 Heater section 10 Seed crystal 11 Seed crystal holder 12 Shaft 13 Ga2O3 single crystal 13a Neck portion or necking 13b Spreading 13c Straight body portion 14 First orientation flat surface 15 Main surface of Ga2O3 single crystal substrate 16, 21 Ga2O3 single crystal substrates 17 Second orientation flat surface 19 Back surface of Ga2O3 single crystal substrate Plane of 20 Ga2O3 single crystal Region near the peripheral part in a circular Ga2O3 single crystal substrate 23 Vertical UV LED 24 AlN buffer layer 25 n-type Al 0.4 Ga 0.6 N layer 26 InAl 0.4 Ga 0.6 N layer 27 InAl 0.5 Ga 0.5 N barrier layer 28 InAl 0.3 Ga 0.7 N quantum well layer 29 Mg-doped p-type InAl 0.6 Ga 0.4 N electron blocking layer 30 Mg-doped p-type InAl 0.5 Ga 0.5 N cladding layer 31 Mg-doped p-type InAl 0.3 Ga 0.7 N contact layer 32 p-side electrode 33 n-side electrode 34 Vertical MISFET 35 p-type region 36 n+-type region 37 Source electrode 38 Gate insulator 39 Gate electrode 40 Drain electrode A Vertical distance from the reference plane S to the highest point of a Ga2O3 single crystal substrate B Vertical distance from the reference plane S to the lowest point of a Ga2O3 single crystal substrate C Center of the main surface of a Ga2O3 single crystal substrate S Least squares plane on the main surface of a Ga2O3 single crystal substrate t Thickness of a Ga2O3 single crystal substrate θ Spreading angle

Claims

Claim 1 The planar shape of the substrate is circular or square, when the planar shape is circular, the diameter of the circular shape is 24 mm or more and 160 mm or less, when the planar shape is square, the long side of the square shape is 15 mm or more and 150 mm or less, the warp amount of the main surface is -50 μm or more and 50 μm or less (including 0 μm), contains Si as an n-type dopant element in the range of 0.02 mol% or more and 0.15 mol% or less, and Al is provided on the main surface x Ga (1-x) A GaN (0 ≦ X ≦ 1) - based semiconductor layer is formed 2 O 3 single crystal substrate of the O - based Claim 2 The Ga described in claim 1, having a planar shape that is circular, with the diameter of the circular shape being 24 mm or more and 160 mm or less, and the thickness being 0.1 mm or more and 2.0 mm or less 2 O 3 -based single crystal substrate. Claim 3 The Ga 2 O 3 -based single crystal substrate according to claim 1, having a rectangular planar shape, with the long side of the rectangle being 15 mm or more and 150 mm or less, and the thickness being 0.1 mm or more and 2.0 mm or less. Claim 4 The Ga single crystal substrate according to claim 3, wherein the square shape is a square and at least one or more corners are missing. 2 O 3 system single crystal substrate. Claim 5 The Ga 2 O 3 -based single crystal substrate according to any one of claims 1 to 4, wherein the main surface is any one of (100), (010), (001), and (101) planes. Claim 6 For any of the (100) plane, (010) plane, (001) plane, and (101) plane, a plane inclined within a range of 7° or less (excluding 0°) is the main plane, and the Ga 2 O 3 -based single crystal substrate according to any one of claims 1 to 4. Claim 7 The main surface is a (100) surface or a surface inclined within a range of 7° or less from the (100) surface, and at least one end surface perpendicular to the main surface and parallel to the b-axis or inclined within a range of 5° is provided. The Ga 2 O 3 -based single crystal substrate according to any one of claims 1 to 4. Claim 8 The main surface is other than the (100) surface or other than a surface inclined within a range of 7° or less from the (100) surface, and at least one end surface that is perpendicular to the main surface and inclined within a range of 5° from parallel or the parallel direction with respect to the intersection line between the main surface and the (100) surface is provided. The Ga 2 O 3 -based single crystal substrate according to any one of claims 1 to 4. Claim 9 The dislocation density of the main surface is 0 pieces / cm 2 or more and 1×10 5 pieces / cm 2 or less. The Ga 2 O 3 -based single crystal substrate according to any one of claims 1 to 8. Claim 10 between the main surface and the Al x Ga (1-x) N (0 ≤ X ≤ 1) - based semiconductor layer, a Ga 2 O 3 - based epitaxial layer or an AlGaN - based epitaxial layer is laminated and formed. The Ga 2 O 3 - based single - crystal substrate according to any one of claims 1 to 9. Claim 11 The above-mentioned Ga 2 O 3 Based on the epitaxial layer or the thickness of the above-mentioned AlGaN-based epitaxial layer is 1 nm or more and 50 μm or less. The Ga 2 O 3 Based single crystal substrate. Claim 12 The foregoing Ga 2 O 3 -based epitaxial layer, or the surface roughness Ra of the foregoing AlGaN-based epitaxial layer is 3 nm or less, and the Ga 2 O 3 -based single crystal substrate according to claim 10 or 11. Claim 13 A Ga single crystal grown by a single crystal growth method of an induction heating method 2 O 3 system single crystal is processed from a substrate to produce a Ga 2 O 3 system single crystal substrate, and The foregoing Ga 2 O 3 system single-crystalline substrate includes forming an Al x Ga (1-x) N-based semiconductor layer on the main surface thereof, The above-mentioned Ga 2 O 3 The planar shape of the system single-crystalline substrate is circular or rectangular, and when the planar shape is circular, the diameter of the circular shape is 24 mm or more and 160 mm or less, when the planar shape is square, the long side of the square shape is 15 mm or more and 150 mm or less, The above-mentioned Ga 2 O 3 The warp amount of the main surface of the system single crystal substrate is -50 μm or more and 50 μm or less (including 0 μm), The foregoing Ga 2 O 3 -series single crystal substrate contains Si, which is an n-type dopant element, in a range of 0.02 mol% or more and 0.15 mol% or less, and Al x Ga (1-x) Manufacturing method of AlGaN-based semiconductor laminate. Claim 14 The above-mentioned Ga 2 O 3 The direction of growing the system single crystal is any one of the a-axis, b-axis, and c-axis directions, or a direction inclined within a range of 7° or less with respect to any one of the a-axis, b-axis, and c-axis directions (however, 0° is not included). The manufacturing method of the Al x Ga (1-x) N-based semiconductor laminate according to claim 13. Claim 15 The foregoing Ga 2 O 3 On the main surface of the single crystal substrate of the system, Ga 2 O 3 Further includes laminating and forming an epitaxial layer of the system or an AlGaN-based epitaxial layer, The above-mentioned Ga 2 O 3 On the epitaxial layer of the series or the AlGaN-based epitaxial layer, the above-mentioned Al x Ga (1-x) The method for manufacturing an Al x Ga (1-x) N-based semiconductor laminate according to any one of claims 13 or 14, wherein an N-based semiconductor layer is formed.

Images