Vertical-cavity surface-emitting laser having independent definitions of current confinement and optical confinement

Abstract

To provide VCSELs having independent definition of index or light and current confinement.SOLUTION: A Vertical Cavity Surface-Emitting Laser has a body including a vertical stack of semiconductor layers one on top of the other including a current confinement layer having an area of low resistance to current flow defined by an area of high resistance to current flow, whereupon vertical current flow in the stack of semiconductor layers is directed by the area of high resistance to current flow of the current confinement layer through the area of low resistance to current flow of the current confinement layer. A separate light confinement layer is disposed below or above the current confinement layer. The light confinement layer includes one or more protrusions or recesses disposed below or above the area of low resistance to current flow of the current confinement layer.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure describes a vertical-cavity surface-emitting laser (VCSEL) that includes optical mode selection or optical confinement separately from current confinement.

Background Art

[0002] Conventionally, VCSELs with oxide apertures have an effective refractive index contrast of about 1-2%, thus providing an induced waveguide that efficiently confines the optical mode. In these prior art VCSELs, the oxide aperture is used to define both current confinement and refractive index or optical confinement. When single-mode operation is required, it is found that the oxide aperture needs to be reduced to 4 μm or less, which is difficult to achieve reproducibly.

[0003] To provide mode selectivity, additional mode selection elements may be used at the top of the VCSEL device. In one example, a small metal aperture may be introduced at the top of the VCSEL device to filter out unwanted higher-order modes (see Ueki et al., "Single-Transverse-Mode 3.4-mW Emission of Oxide-Confined 780-nm VCSELs", IEEE Photonics Technology. Letters, vol.11, no.12, pp.1539~1541, 1999). In another example, the "mode filtering" approach may involve providing a surface relief on the top surface of the VCSEL device within the emission region. With this technique, VCSELs with single-mode power up to 6.5 mW have been reported (see Haglund et al., "High-Power Single Transverse and Polarization Mode VCSEL for Silicon Photonics Integration", Vol.27, No.13, Optics Express 18892, 2019). As yet another example, there have been those that utilize impurity-induced disordering of the top distributed Bragg reflector (DBR) mirror to suppress higher-order modes by reducing reflectivity. This resulted in VCSELs emitting single-mode power of ~10 mW (see Su et al., "High-power single-mode vertical-cavity surface-emitting lasers using strain controlled disorder-defined apertures", Appl.Phys.Lett.119, 241101, 2021). All of these methods rely on introducing optical losses for higher-order modes.

[0004] As yet another example, for instance, there has been one that customizes the mode shape by designing refractive index confinement by etching a photonic crystal-like structure into an epitaxial layer (see Siriani et al., "Mode Control in Photonic Crystal Vertical-Cavity Surface-Emitting Lasers and Coherent Arrays", IEEE Journal of Selected Topics in Quantum Electronics, Vol. 15, No. 3, pp. 909-917, 2009). Although this latter approach relies on a different principle, loss is still introduced due to the roughness of the deep hole vertical etching. In addition, the geometries that can be realized with this approach are limited. Another limitation to this approach is that, similar to the case of conventional oxide VCSELs, the region that defines current confinement also defines the profile of the refractive index or the light guiding region.

[0005] Mode control in VCSELs is very important in many applications. In some cases, single-mode or few-mode operation is beneficial and, in some cases, necessary. This applies, for example, to optical communications where the presence of multiple optical modes deteriorates the relative noise due to linewidth broadening or increases the optical dispersion. In other cases, such as when a VCSEL is used as a projection light source in a sensing application, higher-order mode operation is beneficial in order to have a uniform energy distribution across the emission angle. In both cases, the degree of freedom to define the optical modes can be an advantage in achieving the required performance.

[0006] In a conventional oxide aperture VCSEL, the oxide aperture defines a refractive index confinement region along with current confinement. This process is simple, but this approach has limitations. That is, for example, in order to promote single-mode operation, a very small mode volume cannot be defined, or there are variations in the oxidation depth, which also affects the mode shape and the wafer yield. In addition, the magnitude of the refractive index contrast between the emission region and the surroundings is substantially fixed by the difference in refractive index between the oxidized and non-oxidized portions of the oxide aperture formed in the AlGaAs layer, which is a material commonly used in the manufacture of oxide aperture VCSELs.

Summary of the Invention

Problems to be Solved by the Invention

[0007] Therefore, it is desirable to provide a VCSEL having independent definition of refractive index confinement or optical confinement and current confinement.

Means for Solving the Problems

[0008] For example, a VCSEL is disclosed herein in which refractive index, mode, or optical confinement and current confinement are defined independently by an epitaxial growth process that provides freedom in defining the refractive index or the guiding geometry of light, such that mode control is addressed very flexibly. In one example, a patterned mode selection layer, also referred to herein as a light confinement layer, is introduced during the growth of the epitaxial layer used to form the patterned mode selection layer. This layer is then patterned by lithography, then the remaining epitaxial growth is performed, and finally the remaining portions of the VCSEL are fabricated by conventional manufacturing processes. As used herein, the terms "refractive index", "mode", "light", and "optical" may be used interchangeably when used with the term "confinement".

[0009] In the VCSEL fabricated in this way, current confinement and optical confinement can be made completely independent of each other, thereby enabling a wider design freedom and design robustness. By patterning the mode or the optical confinement layer, it is possible to define both the mode size of light emission, the mode order, and the refractive index contrast. With a properly considered design, for example, by forming an oxidation aperture wider than the mode confinement region, changes in the current confinement layer do not directly affect the optical mode shape, thus leading to robust mode shaping. This also has the only drawback that one or more additional lithography steps and the addition of an upper surface growth process are required, but it realizes a further degree of freedom in design. Other parts of the VCSEL manufacturing process may remain unchanged, thus ensuring compatibility with existing manufacturing techniques.

[0010] More specifically, a VCSEL is disclosed herein that includes a body having a vertical stack of semiconductor layers overlapping each other. The stack of semiconductor layers includes a current confinement layer that includes a low current resistance region defined by a high current resistance region, and the vertical current flow in the stack of semiconductor layers is guided by the high current resistance region of the current confinement layer to pass through the low current resistance region of the current confinement layer. An optical confinement layer is disposed or arranged below or above the current confinement layer. The optical confinement layer includes a protrusion or a recess disposed or arranged below or above the low current resistance region of the current confinement layer.

Brief Description of the Drawings

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Figure 1

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Figure 12A

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Figure 19

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Figure 20

DETAILED DESCRIPTION OF THE INVENTION

[0033] Here, various non-limiting examples will be described with reference to the accompanying drawings. In the drawings, like reference numerals correspond to like or functionally equivalent elements.

[0034] Hereinafter, for the purpose of explanation, terms such as "end", "upper side", "lower side", "right", "left", "vertical", "horizontal", "top", "bottom", "lateral direction", "longitudinal direction", and their derivatives are related to the examples oriented in the drawings. However, it should be understood that those examples can assume various alternative deformations and step orders, unless otherwise explicitly stated. Also, it should be understood that the specific examples shown in the accompanying drawings and described in the following specification are merely exemplary examples or aspects of the present disclosure. Therefore, the specific examples or aspects disclosed in this specification should not be construed as limiting.

[0035] Referring to FIG. 1, one non-limiting embodiment or exemplary VCSEL according to the principle of the present disclosure includes a body 2 including a vertical stack 4 of semiconductor layers, such as, but not limited to, layers of GaAs, AlGaAs, AlInGaAsP, InGaAs, InP, or InAlGaN grown or deposited overlapping each other, for example, by chemical vapor deposition (CVD) or molecular beam epitaxy (MBE). The stack 4 of semiconductor layers includes, from the bottom to the top of the body 2, a substrate 6, a lower distributed Bragg reflection device (DBR) mirror layer 8, including an active region 12 layer10. It may include a light confinement layer 14, an intermediate layer 16, a current confinement layer 18, and an upper DBR mirror layer 20. By continuous growth of the upper DBR mirror layer 20, an optional cap layer may be formed or defined as part of the upper DBR mirror layer 20.

[0036] As used herein in connection with the DBR mirror layers 8 and 20, the terms "first", "lower", "second", and "upper" are used solely for purposes of explanation, illustration, and clarity and should not be construed in a limiting sense. Additionally, the terms "lower" and "upper", when used in connection with the DBR mirror layers 8 and 20, are used solely in relation to the orientation shown in the figures and should not be construed in a limiting sense. Further, herein, solely for purposes of explanation, illustration, and clarity, one of the DBR mirror layers may be referred to as the first DBR mirror layer and the other DBR mirror layer may be referred to as the second DBR mirror layer, and should not be construed in a limiting sense.

[0037] The first electrical contact 24 may be disposed in electrical contact with the upper surface of the upper DBR mirror layer 20. In one example, the first electrical contact 24 may be in a ring shape including an opening O for the passage of light generated by the operation of the VCSEL. However, this should not be construed in a limiting sense as the first electrical contact 24 can be of any suitable and / or desirable shape or geometry that allows the light generated by the operation of the VCSEL (discussed below) to exit the upper surface of the upper DBR mirror layer 20.

[0038] The second electrical contact 25 may, in one example, be disposed in electrical contact with the bottom surface of the substrate layer 6 opposite the lower DBR mirror layer 8. In another example, the second electrical contact 25 shown in dashed lines in FIG. 1 may be disposed on the side of the body 2 in electrical contact with the substrate 6. As used herein, the terms "first" and "second", when used in connection with the contacts 24 and 25, are used solely for purposes of explanation, illustration, and clarity and should not be construed in a limiting sense.

[0039] Similarly, in yet another example shown by a dashed line in FIG. 1, the second electrical contact 25 may be disposed on the upper surface of the upper DBR mirror layer 20, for example, proximate or adjacent to the first electrical contact 24. In this example, the second electrical contact 25 may be electrically separated from the upper surface of the upper DBR mirror layer 20, for example, by an oxide layer, and may be electrically connected to the substrate layer 6 through the body 4 or through a conductor (not particularly shown) disposed on the side of the body 4.

[0040] Regardless of where the second electrical contact 25 is or may be disposed, the first electrical contact 24 is in electrical contact only with the upper surface of the cap layer 22, and the second electrical contact 26 is in electrical contact only with the substrate layer 6. An electrical bias may be applied to the body 4 through the first and second electrical contacts 24 and 25. Due to this electrical bias, a current 22 (shown by a dashed-dotted line in FIG. 1) may flow in the body 4 between the substrate layer 6 and the first electrical contact 24.

[0041] including the substrate 6, the lower DBR mirror layer 8, and the active region 12 layer Details regarding the growth or fabrication of one or more of 10, the upper DBR mirror layer 20, and / or the first and second electrical contacts 24 and 25 are known in the art and are not described herein for the sake of brevity. Additionally, details regarding the growth or fabrication of one or more of the optical confinement layer 14, the intermediate layer 16, and / or the current confinement layer 18 are known in the art and are not described herein for the sake of brevity, except as may be necessary for the purposes of this description.

[0042] In one example, the current confinement layer 18 may include a low current resistance region 26 defined by a high current resistance region 28, such that the flow of current in the body 4 is directed or confined by the high current resistance region 28 to pass through the low current resistance region 26. In one non-limiting example, the high current resistance region 28 surrounds the low current resistance region 26 of the current confinement layer 18, such that the flow of current in the body 4 is directed by the high current resistance region 28 to pass through the low current resistance region 26.

[0043] In one example, the resistance per unit area of the high current resistance region 28, e.g., ohms-cm 2 is at least 10 times greater than the resistance per unit area of the low current resistance region 26. In one example, the low current resistance region 26 may have a resistance of 10 -3 ohm-cm 2 or less, and the high current resistance region 28 may have a resistance of 0.1 ohm-cm 2 or more. However, this should not be construed in a limiting sense.

[0044] In one particular non-limiting example shown in FIGS. 1 and 2A-2B, the low current resistance region 26 may be circular, defined by the inner diameter of the ring-shaped high current resistance region 28. However, since the use of other shapes or geometries for one or both of the low current resistance region 26 and / or the high current resistance region 28 is also contemplated, these shapes or geometries should not be construed in a limiting sense.

[0045] In one example, the high current resistance region 28 may be formed or defined, for example, by oxidation or implantation or growth of a region of the current confinement layer 18 that will define the high current resistance region 28. In this example, the low current resistance region 26 is a region of the current confinement layer 18 that is not oxidized or implanted.

[0046] In the exemplary VCSEL shown in FIG. 1, the optical confinement layer 14 may be disposed below the current confinement layer 18 or below an intermediate layer 16 disposed or arranged below the current confinement layer 18. In one example, the optical confinement layer 14 may include or define one or more protrusions or ridges 30 disposed or arranged below and aligned with the low-current resistance region 26 of the current confinement layer 18 at its top surface 29.

[0047] In the non-limiting example shown in FIGS. 2A-2B, the protrusion or ridge 30 of the optical confinement layer 14 may be circular and may be aligned or coaxial with the circular low-current resistance region 26 of the current confinement layer 18. However, this should not be construed in a limiting sense, as the protrusion or ridge 30 of the optical confinement layer 14 can have any suitable and / or desirable shape or geometry (described in more detail below), and / or the low-current resistance region 26 of the current confinement layer 18 can have any suitable and / or desirable shape or geometry that can be the same as or different from the shape or geometry of the protrusion or ridge 30 of the optical confinement layer 14.

[0048] In one example, patterning of the optical confinement layer 14 creates two regions or cavities. That is, a main region or main cavity vertically aligned with the protrusion or ridge 30, and a secondary region or secondary cavity vertically aligned with the region of the optical confinement layer 14 not vertically aligned with the protrusion or ridge 30, i.e., the region surrounding the protrusion or ridge 30. The resonance wavelengths of light in the main and secondary regions are different and may be equal to λ0 and λ1, respectively. The difference between these wavelengths defines the effective refractive index confinement of the optical confinement layer 14 that determines the optical mode. In particular, the effective refractive index confinement (ΔN) is given by the following. ΔN / N0=(λ1 - λ0) / λ0 In the formula, N0 is the effective refractive index in the main region. ΔN defines the lateral optical modes supported along with a given shape or geometry of the optical confinement layer 14, e.g., the maximum size of the light guiding pattern L in FIG. 1, for single optical mode operation. In FIG. 1, the dimensions of the current confinement region D, i.e., the low current resistance region 26 of the current confinement layer 18, and the dimensions of the light guiding pattern L, i.e., the dimensions of the protrusion or bump 30, are independent. FIG. 1 also shows a vertical region (unmarked) between D and L that can introduce additional step refractive indices that can be considered during the design of the VCSEL, but this is not described herein for the sake of brevity.

[0049] In FIG. 1, the refractive index contrast increases as the value of the height H of the protrusion or bump 30 is higher. In one example, when stronger optical confinement is desired, a higher value of H (H may be <λ0 / 4) is desired, thereby promoting higher order optical modes and / or a smaller optical mode volume. When the dimension of H is much smaller than the dimension of D, the optical mode may be affected by the refractive index step between the low current resistance region 26 and the high current resistance region 28 of the current confinement layer 18.

[0050] During the use of the VCSEL shown in FIG. 1, due to the electrical bias applied to the first and second electrical contacts 24 and 25, a current 22 flows vertically or substantially vertically between the substrate layer 6 and the first electrical contact 24 in the body 4. This flow of the current 22 in the body 4 is guided or confined by the high current resistance region 28 of the current confinement layer 18 to flow through the low current resistance region 26. This current 22 also layerIt flows through the active region 12 of 10, and the active region 12 emits light 32 (indicated by the ellipse in the main body 4 and the arrow emerging from the upper surface of the upper DBR mirror layer 20) accordingly. This emitted light 32 flows through the low-current resistance region 26 of the current confinement layer 18 due to the refractive index difference between the main region of the light confinement layer 14 aligned with the protrusion or bulge 30 and the secondary region of the light confinement layer 14 not aligned with the protrusion or bulge 30, and is guided or confined to emerge from the top surface of the upper DBR mirror layer 20 above the protrusion or bulge 30 and the low-current resistance region 26 of the current confinement layer 18.

[0051] However, the shape or geometry of the light confinement layer 14 shown in FIGS. 2A - 2B is one non-limiting example of the shape or geometry that the light confinement layer 14 having one or more protrusions or bulges 30 can have. For example, as shown in FIGS. 3A - 3B, the light confinement layer 14 may include a ring-shaped protrusion or bulge 30. In another example shown in FIGS. 4A - 4B, the light confinement layer 14 may include at least a pair of horizontally arranged circular protrusions or bulges 30. In another example shown in FIGS. 5A - 5B, the light confinement layer 14 may include a circular protrusion or bulge 30 on which a ring-shaped protrusion or bulge 30' can be included.

[0052] In yet another example shown in FIG. 6A, the light confinement layer 14 may include a protrusion or bulge 30 in the form of a spiral staircase step or spiral staircase with a series of steps 34A - 34J, and the series of steps 34A - 34J has a height that increases or decreases as the step rotates around the central axis 36. The protrusion or bulge 30 in the form of a spiral staircase step or spiral staircase shown in FIG. 6A may be useful for generating an orbital angular momentum mode (OAM) (see R. Kumar et al., IEEE Phot. Tech. Lett., vol. 33, no. 16, pp. 824 - 827, 2021).

[0053] In yet another example shown in FIG. 6B, the optical confinement layer may include a protrusion or a bulge 30 having an irregular shape with a plurality of regions 38A-38C of different heights. However, the shape or geometry of the optical confinement layer 14 shown in FIGS. 2A-6B should not be construed in a limiting sense, as it is contemplated that the optical confinement layer 14 may have any suitable and / or desirable shape or geometry that is considered desirable for the VCSEL to emit light 32 having a desired shape, geometry, and / or mode for a particular application.

[0054] Referring to FIGS. 7-12B and continuing to refer to FIGS. 1-6B, other non-limiting embodiments or exemplary VCSELs according to the principles of the present disclosure may be similar to the exemplary VCSELs shown in FIGS. 1-6B and described above, except for one exception. The exception is that instead of the top surface 29 of the optical confinement layer 14 including one or more protrusions or bulges 30 and / or 30', the optical confinement layer 14 of the VCSELs shown in FIGS. 7-12B may include one or more recesses or cavities 40 and / or 40' in the top surface 29 of the optical confinement layer 14. The operating principles of the VCSELs shown in FIGS. 1-6B and described above are applicable to the operating principles of the VCSELs shown in FIGS. 7-12B, respectively, and will not be further described herein to avoid unnecessary duplication.

[0055] Generally, the use of one or more recesses or cavities 40 on the top surface 29 of the optical confinement layer 14, as opposed to the use of one or more protrusions or bulges 30, may affect the shape, geometry, and / or mode of the light 32 emerging from the top surface of the upper DBR mirror layer 20. In other words, for example, for the VCSELs shown in FIGS. 1 and 7, the light 32 emerging from the top surface of the upper DBR mirror layer 20 may have different shapes, geometries, and / or modes (usable for different applications) due to the presence of one or more recesses or cavities 40 and / or 40' on the top surface 29 of the optical confinement layer 14 of the VCSEL shown in FIG. 7, as opposed to the presence of one or more protrusions or bulges 30 and / or 30' on the top surface 29 of the optical confinement layer 14 of the VCSEL shown in FIG. 1.

[0056] However, the shape or geometry of the optical confinement layer 14 shown in FIGS. 8A-8B is one non-limiting example of the shape or geometry that the optical confinement layer 14 including one or more recesses or cavities 40 may have. In the example shown in FIGS. 9A-9B, the optical confinement layer 14 may include a ring-shaped recess or cavity 40. In another example shown in FIGS. 10A-10B, the optical confinement layer 14 may include at least a pair of horizontally arranged circular recesses or cavities 40. In another example shown in FIGS. 11A-11B, the optical confinement layer 14 may include a circular recess or cavity 40 including an additional ring-shaped recess or cavity 40' on its top surface 42.

[0057] In yet another example shown in FIG. 12A, the optical confinement layer 14 may include a recess or cavity 40 in the form of a spiral staircase step or spiral staircase with a series of steps 44A-44J, and the series of steps 44A-44J increases or decreases in height as the steps rotate around the central axis 46. The recess or cavity 40 in the form of a spiral staircase step or spiral staircase shown in FIG. 12A may be useful for generating an orbital angular momentum mode (OAM) (see R. Kumar et al., IEEE Phot. Tech. Lett., vol. 33, no. 16, pp. 824-827, 2021).

[0058] In yet another example shown in FIG. 12B, the optical confinement layer may include a recess or cavity 40 having an irregular shape with a plurality of regions 48A-48C of different heights. However, since it is conceivable that the optical confinement layer 14 may have any suitable and / or desirable shape or geometry that is considered desirable for the VCSEL to emit light 32 having a desired shape, geometry, and / or mode for a particular application, the shape or geometry of the optical confinement layer 14 shown in FIGS. 8A-12B should not be construed in a limiting sense.

[0059] Referring to FIG. 13, another non-limiting embodiment or exemplary VCSEL according to the principles of the present disclosure may be similar to the exemplary VCSEL shown in FIG. 1 and described above, except. One exception may include that in the VCSEL shown in FIG. 13, the intermediate layer 16 shown in FIG. 1 is omitted or does not exist. Another exception is that due to the absence of the intermediate layer 16, the protrusion or ridge 30 of the optical confinement layer 14 extends or protrudes at least into the current confinement layer 18, and a corresponding protrusion or ridge is formed in the current confinement layer 18 (particularly in the low-current resistance region 26 of the current confinement layer 18), and optionally extends or protrudes to the bottom of the upper DBR mirror layer 20 and is surrounded by a portion of the low-current resistance region 26 of the current confinement layer 18 surrounded by the high-current resistance region 28 of the current confinement layer 18. In one example, the upper surface of the upper DBR mirror layer 20 may be flat or may include a protrusion or ridge (of the same height or smaller) compared to the corresponding protrusion or ridge of the current confinement layer 18.

[0060] The protrusions or bulges 30 of the optical confinement layer 14 in FIG. 13 may have any shape or geometry that is suitable and / or desirable for the VCSEL to emit light 32 having a desired shape, geometry, and / or mode for a particular application. Non-limiting examples of such shapes or geometries may include, for example, an optical confinement layer 14 having one or more protrusions or bulges 30 and / or 30' as shown in any one or more of FIGS. 2A - 6B. Thus, the shape of the protrusion or bulge 30 shown in FIG. 13 should not be construed in a limiting sense.

[0061] Referring to FIG. 14, another non-limiting embodiment or exemplary VCSEL according to the principles of the present disclosure may be similar to the exemplary VCSEL shown in FIG. 7 and described above, except. One exception may include that in the VCSEL shown in FIG. 14, the intermediate layer 16 shown in FIG. 7 is omitted or does not exist. Another exception may include that due to the absence of the intermediate layer 16, a portion of the low-current resistance region 26 of the current confinement layer 18 extends or protrudes into the recess or cavity 40 of the optical confinement layer 14, such that the portion of the low-current resistance region 26 is surrounded by the portion of the optical confinement layer 14 surrounding the recess or cavity 40 of the optical confinement layer 14. In one example, the upper surface of the upper DBR mirror layer 20 may be flat or may include a recess or cavity (of the same height or smaller) compared to the corresponding recess or cavity of the optical confinement layer 14.

[0062] The recess or cavity 40 in the optical confinement layer 14 of FIG. 14 may have any shape or geometry that is suitable and / or desirable for the VCSEL to emit light 32 having a desired shape, geometry, and / or mode for a particular application. Non-limiting examples of such shapes or geometries may include, for example, an optical confinement layer 14 having one or more recesses or cavities 40 and / or 40' as shown in any one or more of FIGS. 8A - 12B. Thus, the shape of the recess or cavity 40 shown in FIG. 14 should not be construed in a limiting sense.

[0063] Referring to FIG. 15 and continuing to refer to FIGS. 1 - 6B, another non-limiting embodiment or exemplary VCSEL according to the principles of the present disclosure, in one example, one or more protrusions or ridges 30, 30', 34 and / or 38 on the top surface 29 of the optical confinement layer 14 may result in one or more corresponding protrusions or ridges (not shown in FIGS. 1 - 6B for simplicity) formed during its growth on top of the optical confinement layer 14 in some or all of the following layers. That is, the protrusions or ridges 51 of the intermediate layer 16, the protrusions or ridges 50 of the current confinement layer 18 (especially the low current resistance region 26 of the current confinement layer 18), and / or the protrusions or ridges 54 (shown by dashed lines) of the upper DBR mirror layer 20. In another example, the intermediate layer 16, the current confinement layer 18, and the upper DBR mirror layer 20 may have protrusions or ridges that gradually decrease in size (with respect to height H) above one or more protrusions or ridges 30, 30', 34 and / or 38 on the top surface 29 of the optical confinement layer 14. This includes, in one example, that the upper surface of the upper DBR mirror layer 20 is flat and / or, optionally, the top surface of the current confinement layer 18 is flat. However, these examples should not be construed in a limiting sense because the upper surfaces of the respective layers above the protrusions or ridges 30, 30', 34 and / or 38 on the top surface 29 of the optical confinement layer 14 may have protrusions or ridges or may be flat as shown in FIGS. 1, 2A, 3A, 4A, and 5A.

[0064] Referring to FIG. 16 and continuing to refer to FIGS. 7 - 12B, in one example, another non - limiting embodiment or exemplary VCSEL according to the principles of the present disclosure may include that one or more recesses or cavities 40 and / or 40' on the top surface 29 of the optical confinement layer 14 result in one or more corresponding recesses or cavities 40 and / or 40' (not shown in FIGS. 7 - 12B for simplicity) formed during its growth on top of the optical confinement layer 14 in some or all of the following layers. That is, the recess or cavity 53 of the intermediate layer 16, the recess or cavity 52 of the current confinement layer 18 (particularly the low - current - resistance region 26 of the current confinement layer 18), and / or the recess or cavity 55 (shown by dashed lines) of the upper DBR mirror layer 20. In another example, the intermediate layer 16, the current confinement layer 18, and the upper DBR mirror layer 20 may have recesses or cavities that gradually become smaller above (with respect to height H) one or more recesses or cavities 40 and / or 40' on the top surface 29 of the optical confinement layer 14. This includes, in one example, that the upper surface of the upper DBR mirror layer 20 is flat and / or, optionally, the top surface of the current confinement layer 18 is flat. However, since the upper surfaces of each layer above one or more recesses or cavities 40 and / or 40' on the top surface 29 of the optical confinement layer 14 may have recesses or cavities or may be flat as shown in FIGS. 7, 8A, 9A, 10A, and 11A, these examples should not be construed in a limiting sense.

[0065] Referring to FIG. 17, another non-limiting embodiment or exemplary VCSEL according to the principles of the present disclosure is similar to the exemplary VCSEL shown in FIG. 1, except that the positions of the optical confinement layer 14 and the current confinement layer 18 in FIG. 1 are reversed in FIG. 17, such that in FIG. 17 the optical confinement layer 14 is above the intermediate layer 16 above the current confinement layer 18. As shown in FIG. 17, the upper surface of the upper DBR mirror layer 20 above the protrusion or bulge 30 of the optical confinement layer 14 may be flat (as shown by the solid line), or may include an optional protrusion or bulge 54 (shown by the dashed line) above the protrusion or bulge 30 of the optical confinement layer 14 due to the growth of the upper DBR mirror layer 20 on the optical confinement layer 14 including the protrusion or bulge 30.

[0066] Referring to FIG. 18, another non-limiting embodiment or exemplary VCSEL according to the principles of the present disclosure is similar to the exemplary VCSEL shown in FIG. 7, except that the positions of the optical confinement layer 14 and the current confinement layer 18 in FIG. 7 are reversed in FIG. 18, such that in FIG. 18 the optical confinement layer 14 is above the intermediate layer 16 above the current confinement layer 18. As shown in FIG. 18, the upper surface of the upper DBR mirror layer 20 above the recess or cavity 40 of the optical confinement layer 14 may be flat (as shown by the solid line), or may include an optional recess or cavity 55 (shown by the dashed line) above the recess or cavity 40 of the optical confinement layer 14 due to the growth of the upper DBR mirror layer 20 on the optical confinement layer 14 including the recess or cavity 40.

[0067] Referring to FIG. 19, another non-limiting embodiment or exemplary VCSEL according to the principles of the present disclosure is similar to the exemplary VCSEL shown in FIG. 17, except that the intermediate layer 16 is omitted, such that the upper surface of the current confinement layer 18 is in contact with the bottom surface of the optical confinement layer 14.

[0068] Referring to FIG. 20, another non-limiting embodiment or exemplary VCSEL according to the principles of the present disclosure is similar to the exemplary VCSEL shown in FIG. 18, except that the intermediate layer 16 is omitted, and as a result, the upper surface of the current confinement layer 18 is in contact with the bottom surface of the optical confinement layer 14.

[0069] Finally, herein, the light 32 is described and illustrated as emerging upward from the upper surface of the upper DBR mirror layer 20. However, in one example, each of the non-limiting embodiments or exemplary VCSELs shown and described herein may be modified such that the upper DBR layer 20 has a higher reflectivity than the lower DBR layer 8, such that the light 32 is reflected by the upper DBR layer 20 through the stack 4 of semiconductor layers and may exit downward through the substrate layer 6 remaining at the bottom of the stack 4 of semiconductor layers.

[0070] In this example, the second electrical contact 25 may be arranged to be in electrical contact with the bottom surface of the substrate layer 6 and may be formed to have an opening O', similar to the opening O shown by the dashed line in FIGS. 1, 7, and 13-20, to allow the light 32 passing downward through the substrate layer 6 to exit from the bottom surface of the substrate layer 6 through the opening O'. In one example, the first electrical contact 24 may be arranged on the upper surface of the stack 4 of semiconductor layers, for example, on the upper surface of the upper DBR mirror layer 20, and the opening O thereof may be omitted.

[0071] In another example, the second electrical contact 25 may be disposed on a side portion of the body 2 in electrical contact with the substrate 6 as shown by the dashed lines in FIGS. 1, 7, and 13 - 20. In yet another example, the second electrical contact 25 may be disposed on the upper surface of the stack 4 of semiconductor layers, i.e., on the upper surface of the upper DBR mirror layer 20, proximate or adjacent to the first electrical contact 24 as shown by the dashed lines in FIGS. 1, 7, and 13 - 20. In this latter example, the second electrical contact 25 may be electrically separated from the upper surface of the stack 4 of semiconductor layers, for example, by an oxide layer, and may be electrically connected to the substrate layer 6 through the body 4 or through a conductor (not particularly shown) disposed on a side portion of the body 4.

[0072] Based on what is considered to be the presently most practical and preferred example, the present disclosure has been described in detail for illustrative purposes. However, such details are for illustrative purposes only, and the present disclosure is not limited to the disclosed examples. On the contrary, it is intended to cover modifications and equivalent configurations that fall within the spirit and scope of the appended claims. For example, it should be understood that the present disclosure assumes that, to the extent possible, one or more features of any example may be combined with one or more features of any other example.

Claims

1. A vertical cavity surface emitting laser, comprising: a main body having a stack of semiconductor layers overlapping each other in the vertical direction ; The stack of semiconductor layers includes: a first distributed Bragg reflector mirror layer; a current confinement layer including a low current resistance region defined by a high current resistance region, wherein the flow of current in the vertical direction in the stack of semiconductor layers is guided by the high current resistance region of the current confinement layer to pass through the low current resistance region of the current confinement layer, and the current confinement layer is a flat current confinement layer; an optical confinement layer disposed below or above the current confinement layer, the optical confinement layer including a protrusion or a recess disposed below or above the low current resistance region of the current confinement layer, respectively; a second distributed Bragg reflector mirror layer ; When the optical confinement layer has the protrusion, it further includes a ring-shaped protrusion formed on the circular protrusion; When the optical confinement layer has the recess, it further includes a ring-shaped recess formed on the circular recess; The protrusion or the recess of the optical confinement layer is disposed in alignment with the low current resistance region of the current confinement layer; A vertical cavity surface emitting laser in which current flows through each layer of the stack of semiconductor layers overlapping each other in the vertical direction when the vertical cavity surface emitting laser is used.

2. The vertical cavity surface emitting laser according to claim 1, wherein the high current resistance region of the current confinement layer surrounds the low current resistance region of the current confinement layer.

3. The vertical cavity surface emitting laser according to claim 1, wherein the low current resistance region of the current confinement layer is circular.

4. The vertical cavity surface emitting laser according to claim 3, wherein the protrusion or the recess of the optical confinement layer is coaxial with the circular current confinement layer.

5. The vertical cavity surface emitting laser according to claim 1, wherein the current confinement layer includes an oxidized or implanted semiconductor layer.

6. The vertical cavity surface emitting laser according to claim 5, wherein the high current resistance region of the current confinement layer includes an oxidized or implanted semiconductor layer.

7. The vertical cavity surface emitting laser according to claim 1, comprising a layer including an active region.

8. The vertical cavity surface emitting laser according to claim 7, further comprising an intermediate layer between the current confinement layer and the optical confinement layer.

9. The stack of semiconductor layers includes: a substrate layer below the stack of semiconductor layers; a first contact on a side of the stack of semiconductor layers opposite to the substrate layer; further comprising a second contact on a side of the substrate layer opposite to the stack of semiconductor layers, or on a side portion of the body, or on a side of the stack of semiconductor layers opposite to the substrate layer; The vertical cavity surface emitting laser according to claim 7, wherein the first contact is in electrical contact only with a side of the stack of semiconductor layers opposite to the substrate layer, and the second contact is in electrical contact only with a side of the substrate layer opposite to the stack of semiconductor layers. **Claim 10** The vertical cavity surface emitting laser according to claim 8, wherein when the light confinement layer includes the protruding portion, the intermediate layer includes a concave portion aligned with the protruding portion of the light confinement layer.

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