Crystalline Oxide Film and Semiconductor Device

Abstract

To provide a crystalline oxide film excellent in crystal quality having a warp and a crack suppressed.SOLUTION: A crystalline oxide film having at least a first crystal axis and a second crystal axis contains a metal oxide deposited on a crystal substrate that contains the first crystal axis and the second crystal axis, has the linear expansion coefficient in the first crystal axis direction smaller than that in the second crystal axis direction, and has a crystal growth surface sloping at least in the second crystal axis direction from the surface parallel to the second crystal axis direction. The crystalline oxide film has the linear expansion coefficient in the first crystal axis direction smaller than that in the second crystal axis direction and the principal surface sloping at least in the second crystal axis direction from the surface parallel to the second crystal axis direction.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a crystalline oxide film useful for a semiconductor device and a semiconductor device using the crystalline oxide film.

Background Art

[0002] Conventionally, when crystal growth is performed on a different substrate, there have been problems such as cracks, lattice defects, and warpage. To address this problem, measures such as matching the lattice constant and thermal expansion coefficient of the substrate and the film have been studied. Also, when mismatches occur, film formation techniques such as ELO have been studied.

[0003] Patent Document 1 describes a method of forming a buffer layer on a different substrate and growing a zinc oxide-based semiconductor layer in a crystalline state on the buffer layer. Patent Document 2 describes forming a mask of nanodots on a different substrate and then forming a single crystal semiconductor material layer. Non-Patent Document 1 describes a technique for growing GaN in a crystalline state on sapphire via GaN nanocolumns. Non-Patent Document 2 describes a technique for growing GaN in a crystalline state on Si(111) using a periodic SiN intermediate layer to reduce defects such as pits.

[0004] However, in any of these techniques, it has been difficult to obtain a high-quality epitaxial film because the film formation rate is poor, cracks, dislocations, warpage, etc. occur in the substrate, and dislocations and cracks occur in the epitaxial film. There have also been problems in increasing the diameter of the substrate and thickening the epitaxial film.

[0005] In addition, as a next-generation switching element capable of achieving high breakdown voltage, low loss, and high heat resistance, semiconductor devices using gallium oxide (Ga2O3) with a large bandgap have attracted attention, and their application to power semiconductor devices such as inverters is expected. Moreover, due to its wide bandgap, application as a light-emitting and light-receiving device such as an LED or a sensor is also expected. According to Non-Patent Document 1, the bandgap of this gallium oxide can be controlled by forming a mixed crystal with indium, aluminum, or a combination thereof, and it constitutes a very attractive material system as an InAlGaO-based semiconductor. Here, the InAlGaO-based semiconductor refers to In X Al Y Ga Z O3 (0 ≦ X ≦ 2, 0 ≦ Y ≦ 2, 0 ≦ Z ≦ 2, X + Y + Z = 1.5 to 2.5), and it can be viewed as the same material system containing gallium oxide.

[0006] However, since the metastable phase of gallium oxide is the β-gallia structure, it is difficult to form a crystalline film with a corundum structure without using a special film-forming method, and there are still many problems in terms of crystal quality and the like. In contrast, several studies are currently being conducted on the formation of a crystalline semiconductor having a corundum structure. Recently, as described in Non-Patent Document 4, growing a gallium oxide film with a corundum structure by ELO or the like has been studied. According to the method described in Non-Patent Document 4, it is possible to obtain a high-quality gallium oxide film with a corundum structure. However, when actually examining the crystal film, there is a tendency for facet growth, and there are also problems such as dislocations and cracks caused by this facet growth. For application to semiconductor devices, it was still not satisfactory enough. Non-Patent Document 5 describes forming an α-Ga2O3 film on an m-plane sapphire substrate. However, the α-Ga2O3 film formed by the method described in Non-Patent Document 5 has problems such as uneven warpage in each crystal axis direction and cracks occurring when thickened, and it was not sufficiently satisfactory for large-area formation and application to semiconductor devices. Therefore, a film-forming method capable of suppressing warpage and cracks and a crystalline oxide film with improved warpage and cracks have been eagerly awaited.

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Patent Document 2

Non-Patent Documents

[0008]

Non-Patent Document 1

Non-Patent Document 2

Non-Patent Document 3

Non-Patent Document 4

Non-Patent Document 5

Summary of the Invention

Problems to be Solved by the Invention

[0009] An object of the present invention is to provide a crystalline oxide film with warpage and cracks suppressed.

Means for Solving the Problems

[0010] As a result of intensive studies to achieve the above object, the present inventors have found that a crystalline oxide film containing a metal oxide and including at least a first crystal axis and a second crystal axis, wherein the linear expansion coefficient in the first crystal axis direction is smaller than the linear expansion coefficient in the second crystal axis direction, and the main surface is a surface inclined at least in the second crystal axis direction from a plane parallel to the second crystal axis direction, has reduced warpage and cracks, and have found that such a crystalline oxide film can solve the above-described conventional problems at once. Further, after obtaining the above findings, the present inventors have completed the present invention through further studies.

[0011] That is, the present invention relates to the following inventions. [1] A crystalline oxide film containing a metal oxide and including at least a first crystal axis and a second crystal axis, wherein the linear expansion coefficient in the first crystal axis direction is smaller than the linear expansion coefficient in the second crystal axis direction, and the main surface is a surface inclined at least in the second crystal axis direction from a plane parallel to the second crystal axis direction. [2] The crystalline oxide film according to claim 1, wherein the metal oxide contains gallium. [3] The crystalline oxide film according to [1] or [2] above, wherein the metal oxide has a corundum structure. [4] The crystalline oxide film according to [2] above, wherein the metal oxide contains indium, rhodium, or iridium in addition to gallium. [5] The crystalline oxide film according to [2] above, wherein the metal oxide contains indium and / or aluminum in addition to gallium. [6] The crystalline oxide film according to any one of [1] to [5] above, having a film thickness of 2.5 μm or more. [7] The crystalline oxide film according to any one of [1] to [6] above, containing a dopant. [8] The crystalline oxide film according to any one of [1] to [7] above, wherein the ratio of the warpage amount in the second crystal axis direction to the warpage amount in the first crystal axis direction is 3 or less. [9] The crystalline oxide film according to any one of [1] to [8] above, wherein the angle of the inclination is within the range of 3° to 25°.

[10] The crystalline oxide film according to any one of [1] to [9] above, wherein the angle of the inclination is within the range of 3° to 10°.

[11] The crystalline oxide film according to any one of [1] to

[10] above, which has a corundum structure and a main surface inclined at least in a second crystal axis direction from the m plane.

[12] The crystalline oxide film according to

[11] above, wherein the second crystal axis direction is the c-axis direction.

[13] A semiconductor device including at least the crystalline oxide film according to any one of [1] to

[12] above and an electrode.

[14] A power conversion device using the semiconductor device according to

[13] above.

[15] A control system using the semiconductor device according to

[13] above.

Advantages of the Invention

[0012] In the crystalline oxide film of the present invention, warping and cracking are reduced.

Brief Description of the Drawings

[0013]

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Embodiments for Carrying Out the Invention

[0014] The crystalline oxide film of the present invention contains a metal oxide and is a crystalline oxide film including at least a first crystal axis and a second crystal axis, wherein the linear expansion coefficient in the first crystal axis direction is smaller than the linear expansion coefficient in the second crystal axis direction, and the main surface is a surface inclined at least in the second crystal axis direction from a plane parallel to the second crystal axis direction. The main surface only needs to be inclined at least in the second crystal axis direction, and may be inclined in other crystal axis directions (for example, the first crystal axis direction, etc.) in addition to the second crystal axis direction. The "crystal axis" is a coordinate axis derived from the crystal structure to systematically indicate symmetry with respect to crystal planes and rotations. The "linear thermal expansion coefficient" is measured in accordance with JIS R 3102 (1995). The "main surface" is the surface having the largest area of the crystalline oxide film and is usually the surface that becomes the surface of the crystalline oxide film. In an embodiment of the present invention, it is preferable that the main surface is a surface inclined at least in the second crystal axis direction from the m plane because a crystalline oxide film with more uniform warping in the crystal axis direction can be obtained. In this case, it is preferable that the second crystal axis direction is the c-axis direction. Further, a surface inclined at least in the second crystal axis direction from a plane parallel to the second crystal axis means, for example, when the crystalline oxide film has a corundum structure, a surface inclined at least in the c-axis direction from the m plane, a surface inclined at least in the c-axis direction from the a plane, and the like. In an embodiment of the present invention, it is preferable that the crystalline oxide film has a corundum structure and the main surface of the crystalline oxide film is a surface inclined at least in the c-axis direction from the m plane. The angle of the inclination is not particularly limited as long as it does not impede the object of the present invention. In an embodiment of the present invention, the angle of the inclination may be positive or negative. In an embodiment of the present invention, the angle of the inclination is preferably in the range of 3° to 25°, and more preferably in the range of 3° to 10° because a crystalline oxide film having better electrical characteristics can be obtained while suppressing warping and cracking.

[0015] The crystalline oxide film is not particularly limited as long as it contains a metal oxide and does not inhibit the object of the present invention. In an embodiment of the present invention, the crystalline oxide film preferably contains the metal oxide as a main component, more preferably contains a metal oxide containing gallium as a main component, and most preferably contains gallium oxide and its mixed crystals as a main component. Further, the crystal structure and the like of the metal oxide are not particularly limited. Examples of the crystal structure of the metal oxide include a corundum structure, a β-gallia structure, a hexagonal crystal structure (for example, an ε-type structure, etc.), an orthorhombic crystal structure (for example, a κ-type structure, etc.), a cubic crystal structure, or a tetragonal crystal structure. In an embodiment of the present invention, it is preferable that the crystalline oxide film contains a metal oxide having a corundum structure as a main component. The metal oxide is not particularly limited as long as it does not inhibit the object of the present invention, but in an embodiment of the present invention, it preferably contains gallium. Further, in an embodiment of the present invention, the metal oxide preferably contains one or more metals of the 4th to 6th periods of the periodic table other than gallium in addition to gallium, and more preferably contains indium, rhodium, or iridium in addition to gallium. Further, in an embodiment of the present invention, it is preferable that the metal oxide contains indium and / or aluminum in addition to gallium. Examples of the metal oxide containing gallium include α-Ga2O3 or its mixed crystals. A crystalline oxide film containing such a preferable metal oxide as a main component can have more excellent crystallinity and heat dissipation properties, and can also have more excellent semiconductor properties. The "main component" means that in the composition ratio of the crystalline oxide film, the metal oxide is contained in an amount of 50% or more, preferably 70% or more, and more preferably 90% or more. For example, when the metal oxide is α-Ga2O3, it is sufficient that α-Ga2O3 is contained at a ratio such that the atomic ratio of gallium in the metal elements of the crystalline oxide film is 0.5 or more. In an embodiment of the present invention, the atomic ratio of gallium in the metal elements of the crystalline oxide film is preferably 0.7 or more, and more preferably 0.8 or more. The crystalline oxide film may be a single crystal film or a polycrystalline film.In addition, the crystalline oxide film may be any of an insulating film, a semiconductor film, or a conductive film, but in an embodiment of the present invention, it is preferably a semiconductor film. Further, the film thickness of the crystalline oxide film is not particularly limited, but in an embodiment of the present invention, it is preferably 2.5 μm or more, and more preferably 5 μm or more. According to the above-described preferred embodiment of the present invention, even such a thick film can obtain the crystalline oxide film in which warpage and cracks are suppressed while maintaining electrical characteristics.

[0016] The crystalline oxide film may contain a dopant. The dopant is not particularly limited as long as it does not inhibit the object of the present invention. It may be an n-type dopant or a p-type dopant. Examples of the n-type dopant include tin, germanium, silicon, titanium, zirconium, vanadium, or niobium. The concentration of the dopant may be appropriately set. Specifically, for example, about 1×10 16 / cm 3 ~1×10 22 / cm 3 is acceptable. Also, the concentration of the dopant may be, for example, about 1×10 17 / cm 3 or less at a low concentration. Further, according to an embodiment of the present invention, the dopant may be contained at a high concentration of about 1×10 20 / cm 3 or more.

[0017] The crystalline oxide film can be obtained, for example, by the following suitable film formation method. That is, using a crystal substrate including at least a first crystal axis and a second crystal axis, and having a surface inclined at least in the second crystal axis direction from a plane parallel to the second crystal axis direction as a crystal growth surface, the crystalline oxide film can be obtained by epitaxial crystal growth.

[0018] <Crystal substrate> The crystalline substrate is not particularly limited as long as it does not inhibit the object of the present invention, and it may be a known substrate. It may be an insulator substrate, a conductive substrate, or a semiconductor substrate. It may be a single crystal substrate or a polycrystalline substrate. Examples of the crystalline substrate include a substrate containing a crystalline material having a corundum structure as a main component. The "main component" means a component containing 50% or more, preferably 70% or more, and more preferably 90% or more of the crystalline material in terms of the composition ratio in the substrate. Examples of the crystalline substrate having a corundum structure include a sapphire substrate and a gallium oxide α-type substrate.

[0019] In an embodiment of the present invention, the crystalline substrate is preferably a sapphire substrate. Examples of the sapphire substrate include a c-plane sapphire substrate, an m-plane sapphire substrate, an a-plane sapphire substrate, and an r-plane sapphire substrate. In an embodiment of the present invention, the sapphire substrate is preferably a sapphire substrate having a crystal growth surface that is a surface inclined at least in the c-axis direction from the m-plane or a sapphire substrate having a crystal growth surface that is a surface inclined at least in the c-axis direction from the a-plane, and more preferably a sapphire substrate having a crystal growth surface that is a surface inclined at least in the c-axis direction from the m-plane. In an embodiment of the present invention, the angle of inclination may be positive or negative. In an embodiment of the present invention, the angle of inclination is preferably in the range of 3° to 25°, and more preferably in the range of 3° to 10° because the crystalline oxide film having better electrical characteristics can be obtained while suppressing warping and cracking. The thickness of the crystalline substrate is not particularly limited, but is usually 10 μm to 20 mm, and more preferably 10 to 1000 μm. Suitable shapes of the crystalline substrate include, for example, polygonal shapes such as triangles, quadrilaterals (e.g., rectangles or trapezoids), pentagons, or hexagons, U-shaped, inverted U-shaped, L-shaped, or C-shaped.

[0020] In the embodiments of the present invention, other layers such as a buffer layer and a stress relaxation layer may be provided on the crystal substrate. Examples of the buffer layer include a layer made of a metal oxide having the same crystal structure as the crystal structure of the crystal substrate or the crystalline oxide film. Examples of the stress relaxation layer include an ELO mask layer.

[0021] The means for epitaxial crystal growth is not particularly limited as long as it does not inhibit the object of the present invention, and may be a known means. Examples of the epitaxial crystal growth means include, for example, CVD method, MOCVD method, MOVPE method, mist CVD method, mist epitaxy method, MBE method, HVPE method, pulse growth method, or ALD method. In the embodiments of the present invention, the epitaxial crystal growth means is preferably the mist CVD method or the mist epitaxy method.

[0022] In the mist CVD method or the mist epitaxy method, a raw material solution containing a metal is atomized (atomization step), the droplets are suspended, and the obtained atomized droplets are transported to the vicinity of the crystal substrate with a carrier gas (transport step), and then the atomized droplets are thermally reacted (film formation step).

[0023] (Raw material solution) The raw material solution contains at least gallium as a film-forming raw material, and is not particularly limited as long as it can be atomized, and may contain an inorganic material or an organic material. The metal may be a simple metal or a metal compound, and is not particularly limited as long as it does not inhibit the object of the present invention. Examples of the metal include one or more metals selected from gallium (Ga), iridium (Ir), indium (In), rhodium (Rh), aluminum (Al), gold (Au), silver (Ag), platinum (Pt), copper (Cu), iron (Fe), manganese (Mn), nickel (Ni), palladium (Pd), cobalt (Co), ruthenium (Ru), chromium (Cr), molybdenum (Mo), tungsten (W), tantalum (Ta), zinc (Zn), lead (Pb), rhenium (Re), titanium (Ti), tin (Sn), magnesium (Mg), calcium (Ca), and zirconium (Zr). In an embodiment of the present invention, it is preferable that the metal contains at least gallium. Further, in an embodiment of the present invention, it is preferable that the metal contains one or more metals of the 4th to 6th periods of the periodic table in addition to gallium, and more preferably contains indium, rhodium, or iridium. Further, in an embodiment of the present invention, it is also preferable that the metal contains indium and / or aluminum in addition to gallium. By using such a preferable metal, the crystalline oxide film that can be more suitably used in a semiconductor device or the like can be formed.

[0024] In an embodiment of the present invention, as the raw material solution, a solution or dispersion in which the metal is dissolved or dispersed in an organic solvent or water in the form of a complex or a salt can be preferably used. Examples of the form of the complex include acetylacetonate complex, carbonyl complex, ammine complex, hydride complex, and the like. Examples of the form of the salt include organometallic salts (such as metal acetates, metal oxalates, metal citrates, etc.), metal sulfide salts, metal nitrate salts, metal phosphate salts, metal halide salts (such as metal chloride salts, metal bromide salts, metal iodide salts, etc.).

[0025] The solvent of the raw material solution is not particularly limited as long as it does not inhibit the object of the present invention, and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solvent of an inorganic solvent and an organic solvent. In an embodiment of the present invention, it is preferable that the solvent contains water.

[0026] In addition, additives such as hydrohalic acids and oxidants may be mixed into the raw material solution. Examples of the hydrohalic acid include hydrobromic acid, hydrochloric acid, hydroiodic acid, and the like. Examples of the oxidant include peroxides such as hydrogen peroxide (H2O2), sodium peroxide (Na2O2), barium peroxide (BaO2), benzoyl peroxide (C6H5CO)2O2, hypochlorous acid (HClO), perchloric acid, nitric acid, ozone water, organic peroxides such as peracetic acid and nitrobenzene, and the like.

[0027] The raw material solution may contain a dopant. The dopant is not particularly limited as long as it does not inhibit the object of the present invention. Examples of the dopant include n-type dopants or p-type dopants such as tin, germanium, silicon, titanium, zirconium, vanadium, or niobium. The concentration of the dopant is usually about 1×10 16 / cm 3 ~1×10 22 / cm 3 and may be such, or the concentration of the dopant may be set to a low concentration of, for example, about 1×10 17 / cm 3 or less. Further, according to an embodiment of the present invention, the dopant may be contained at a high concentration of about 1×10 20 / cm 3 or more.

[0028] (Atomization step) The atomization process involves preparing a raw material solution containing a metal, atomizing the raw material solution, suspending the droplets, and generating atomized droplets. The blending ratio of the metal is not particularly limited, but is preferably 0.0001 mol / L to 20 mol / L with respect to the entire raw material solution. The atomization means is not particularly limited as long as it can atomize the raw material solution and may be a known atomization means. However, in an embodiment of the present invention, an atomization means using ultrasonic vibration is preferably used. The mist used in the present invention floats in the air. For example, it is more preferably a mist that does not spray like a spray, has an initial velocity of zero, floats in space, and can be conveyed as a gas. The droplet size of the mist is not particularly limited and may be droplets on the order of several mm, but is preferably 50 μm or less, and more preferably 1 to 10 μm.

[0029] (Transportation Process) In the transportation process, the atomized droplets are transported to the substrate by the carrier gas. The type of carrier gas is not particularly limited as long as it does not inhibit the object of the present invention. For example, oxygen, ozone, inert gas (such as nitrogen and argon), or reducing gas (such as hydrogen gas and forming gas) are preferably cited as suitable examples. Also, the type of carrier gas may be one type, but may also be two or more types. A diluted gas with a changed carrier gas concentration (such as a 10-fold diluted gas) may be further used as the second carrier gas. Also, the supply location of the carrier gas may not be only one location, but may be two or more locations. The flow rate of the carrier gas is not particularly limited, but is preferably 1 LPM or less, and more preferably 0.1 to 1 LPM.

[0030] (Film Formation Process) In the film formation step, the atomized droplets are reacted to form a film on the crystal substrate. The reaction is not particularly limited as long as it is a reaction in which a film is formed from the atomized droplets. However, in an embodiment of the present invention, a thermal reaction is preferable. The thermal reaction only needs to be such that the atomized droplets react with heat, and the reaction conditions and the like are not particularly limited as long as they do not inhibit the object of the present invention. In this step, the thermal reaction is usually carried out at a temperature equal to or higher than the evaporation temperature of the solvent of the raw material solution, but preferably at a temperature not too high, and more preferably 650 ° C or lower. Further, the thermal reaction may be carried out in any atmosphere of under vacuum, under a non-oxygen atmosphere, under a reducing gas atmosphere, and under an oxygen atmosphere as long as it does not inhibit the object of the present invention. Further, the thermal reaction may be carried out under any conditions of atmospheric pressure, under pressure, and under reduced pressure. In an embodiment of the present invention, it is preferable to carry out the reaction under atmospheric pressure because the calculation of the evaporation temperature becomes easier and the equipment and the like can be simplified. Further, the film thickness can be set by adjusting the film formation time.

[0031] Hereinafter, a film forming apparatus 19 suitably used in an embodiment of the present invention will be described with reference to the drawings. The film forming apparatus 19 in FIG. 1 includes a carrier gas source 22a that supplies a carrier gas, a flow rate regulating valve 23a for regulating the flow rate of the carrier gas sent out from the carrier gas source 22a, a carrier gas (dilution) source 22b that supplies a carrier gas (dilution), a flow rate regulating valve 23b for regulating the flow rate of the carrier gas (dilution) sent out from the carrier gas (dilution) source 22b, a mist generation source 24 that stores a raw material solution 24a, a container 25 that contains water 25a, an ultrasonic vibrator 26 attached to the bottom surface of the container 25, a film forming chamber 30, a quartz supply pipe 27 that connects the mist generation source 24 to the film forming chamber 30, and a hot plate (heater) 28 installed in the film forming chamber 30. A substrate 20 is installed on the hot plate 28.

[0032] Then, as shown in FIG. 1, the raw material solution 24a is accommodated in the mist generation source 24. Next, using the substrate 20, it is placed on the hot plate 28, and the hot plate 28 is operated to raise the temperature in the film formation chamber 30. Next, the flow rate control valves 23 (23a, 23b) are opened to supply the carrier gas from the carrier gas sources 22 (22a, 22b) into the film formation chamber 30. After sufficiently replacing the atmosphere in the film formation chamber 30 with the carrier gas, the flow rate of the carrier gas and the flow rate of the carrier gas (for dilution) are adjusted respectively. Next, the ultrasonic vibrator 26 is vibrated, and the vibration is propagated to the raw material solution 24a through the water 25a, thereby atomizing the raw material solution 24a to generate atomized droplets 24b. These atomized droplets 24b are introduced into the film formation chamber 30 by the carrier gas, transported to the substrate 20, and then, under atmospheric pressure, the atomized droplets 24b undergo a thermal reaction in the film formation chamber 30 to form a film on the substrate 20.

[0033] Also, it is preferable to use the mist CVD apparatus (film formation apparatus) 19 shown in FIG. 2. The mist CVD apparatus 19 in FIG. 2 includes a susceptor 21 on which the substrate 20 is placed, a carrier gas supply means 22a for supplying a carrier gas, a flow rate control valve 23a for adjusting the flow rate of the carrier gas sent out from the carrier gas supply means 22a, a carrier gas (for dilution) supply means 22b for supplying a carrier gas (for dilution), a flow rate control valve 23b for adjusting the flow rate of the carrier gas sent out from the carrier gas (for dilution) supply means 22b, a mist generation source 24 in which the raw material solution 24a is accommodated, a container 25 into which the water 25a is put, an ultrasonic vibrator 26 attached to the bottom surface of the container 25, a supply pipe 27 made of a quartz tube with an inner diameter of 40 mm, a heater 28 installed in the peripheral portion of the supply pipe 27, and an exhaust port 29 for discharging the mist, droplets, and exhaust gas after the thermal reaction. The susceptor 21 is made of quartz, and the surface on which the substrate 20 is placed is inclined from the horizontal plane. By fabricating both the supply pipe 27 serving as the film formation chamber and the susceptor 21 from quartz, it is possible to suppress the mixing of impurities derived from the apparatus into the film formed on the substrate 20. This mist CVD apparatus 19 can be handled in the same manner as the above-described film formation apparatus 19.

[0034] By using the above-described preferred film-forming apparatus, the crystalline oxide film can be more easily formed on the crystal growth surface of the crystal substrate. Note that the crystalline oxide film is usually formed by epitaxial crystal growth.

[0035] According to the above-described preferred film-forming method, the crystalline oxide film with improved non-uniformity of warpage for each crystal axis direction can be obtained. More specifically, the crystalline oxide film in which the ratio of the warpage amount in the second crystal axis direction to the warpage amount in the first crystal axis direction is 3 or less can be obtained. In an embodiment of the present invention, the ratio of the warpage amounts can be made 2 or less by setting the angle of the inclination to a preferable angle (for example, 6° to 10°). In an embodiment of the present invention, the lower limit of the ratio of the warpage amounts is preferably 0.4 or more. The warpage amount refers to the shortest distance between the shortest straight line passing through the points at both ends of the film and the apex of the concave or convex, and can be measured, for example, using a shape measuring device using a laser. Further, according to the above-described preferred film-forming method, the crystalline oxide film with more reduced cracks can be obtained. More specifically, for example, even when the film thickness is 2.5 μm or more (preferably 5 μm or more), at least 2 mm 2 In the area of the above, the crystalline oxide film substantially free of cracks can be obtained. Also, in an embodiment of the present invention, even when the film thickness is 10 μm or more, at least 2 mm 2 In the area of the above, the crystalline oxide film substantially free of cracks can be obtained.

[0036] The crystalline oxide film is useful for semiconductor devices, particularly power devices. Examples of semiconductor devices formed using the crystalline oxide film include transistors such as MIS and HEMT, TFTs, Schottky barrier diodes using semiconductor-metal junctions, JBSs, PN or PIN diodes combined with other P layers, and light emitting and receiving elements. In an embodiment of the present invention, the crystalline oxide film can be used for a semiconductor device by being separated from the crystal substrate as desired.

[0037] Further, the semiconductor device is suitably applicable to both a lateral element (lateral device) in which an electrode is formed on one side of a semiconductor layer and a vertical element (vertical device) having electrodes on both the front and back sides of the semiconductor layer. However, in an embodiment of the present invention, it is preferably used for a vertical device among them. Suitable examples of the semiconductor device include, for example, a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a metal semiconductor field effect transistor (MESFET), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a static induction transistor (SIT), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED).

[0038] Hereinafter, a preferred example of the semiconductor device when the crystalline oxide film of the present invention is applied to an n-type semiconductor layer (such as an n+-type semiconductor or an n−-type semiconductor layer) will be described with reference to the drawings. However, the present invention is not limited to these examples.

[0039] FIG. 3 shows an example of a Schottky barrier diode (SBD) according to an embodiment of the present invention. The SBD in FIG. 3 includes an n−-type semiconductor layer 101a, an n+-type semiconductor layer 101b, a Schottky electrode 105a, and an ohmic electrode 105b.

[0040] The materials of the Schottky electrode and the ohmic electrode may be known electrode materials. Examples of the electrode materials include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, or Ag, or alloys thereof, metal oxide conductive films such as tin oxide, zinc oxide, rhenium oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), organic conductive compounds such as polyaniline, polythiophene, or polypyrrole, or mixtures and laminates thereof.

[0041] The formation of the Schottky electrode and the ohmic electrode can be performed by known means such as, for example, vacuum evaporation or sputtering. More specifically, for example, when forming a Schottky electrode using two types of the first metal and the second metal among the metals, a layer made of the first metal and a layer made of the second metal are laminated, and patterning using a photolithography technique is performed on the layer made of the first metal and the layer made of the second metal.

[0042] When a reverse bias is applied to the SBD of FIG. 3, a depletion layer (not shown) spreads in the n-type semiconductor layer 101a, so that a high-breakdown-voltage SBD is obtained. When a forward bias is applied, electrons flow from the ohmic electrode 105b to the Schottky electrode 105a. The SBD using the semiconductor structure in this way is excellent for high breakdown voltage and high current, has a fast switching speed, and is also excellent in breakdown voltage and reliability.

[0043] (HEMT) FIG. 4 shows an example of a high electron mobility transistor (HEMT) according to an embodiment of the present invention. The HEMT of FIG. 4 includes an n-type semiconductor layer 121a having a wide bandgap, an n-type semiconductor layer 121b having a narrow bandgap, an n+-type semiconductor layer 121c, a semi-insulating layer 124, a buffer layer 128, a gate electrode 125a, a source electrode 125b, and a drain electrode 125c.

[0044] (MOSFET) An example of the case where the semiconductor device of the present invention is a MOSFET is shown in FIG. 5. The MOSFET of FIG. 5 is a trench-type MOSFET and includes an n−-type semiconductor layer 131a, n+-type semiconductor layers 131b and 131c, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c.

[0045] (JFET) FIG. 6 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+-type semiconductor layer 141b, a second n+-type semiconductor layer 141c, a gate electrode 145a, a source electrode 145b, and a drain electrode 145c.

[0046] (IGBT) FIG. 7 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+-type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.

[0047] (LED) FIG. 8 shows an example when the semiconductor device of the present invention is a light emitting diode (LED). The semiconductor light emitting element in FIG. 8 includes an n-type semiconductor layer 161 on a second electrode 165b, and a light emitting layer 163 is laminated on the n-type semiconductor layer 161. Then, a p-type semiconductor layer 162 is laminated on the light emitting layer 163. On the p-type semiconductor layer 162, a light transmissive electrode 167 that transmits light generated by the light emitting layer 163 is provided, and a first electrode 165a is laminated on the light transmissive electrode 167. Note that the semiconductor light emitting element in FIG. 8 may be covered with a protective layer except for the electrode portions.

[0048] Examples of the material of the light transmissive electrode include conductive materials of oxides containing indium (In) or titanium (Ti). More specifically, for example, In2O3, ZnO, SnO2, Ga2O3, TiO2, CeO2, or a mixed crystal of two or more of these or those doped with these can be mentioned. By providing these materials by known means such as sputtering, a light transmissive electrode can be formed. Further, after forming the light transmissive electrode, heat annealing may be performed for the purpose of making the light transmissive electrode transparent.

[0049] According to the semiconductor light-emitting device of FIG. 8, with the first electrode 165a as the positive electrode and the second electrode 165b as the negative electrode, a current is passed through the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161 via both of them, so that the light-emitting layer 163 emits light.

[0050] As materials for the first electrode 165a and the second electrode 165b, for example, metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd or Ag, or alloys thereof, metal oxide conductive films such as tin oxide, zinc oxide, rhenium oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), organic conductive compounds such as polyaniline, polythiophene or polypyrrole, or mixtures thereof, etc. can be mentioned. The film formation method of the electrode is not particularly limited, and it can be formed on the substrate according to a method appropriately selected from among wet methods such as printing method, spraying method, coating method, etc., physical methods such as vacuum evaporation method, sputtering method, ion plating method, etc., chemical methods such as CVD, plasma CVD method, etc., considering the suitability with the above materials.

[0051] In addition, another aspect of the light-emitting device is shown in FIG. 9. In the light-emitting device of FIG. 9, an n-type semiconductor layer 161 is laminated on a substrate 169, and the second electrode 165b is laminated on a part of the semiconductor layer exposed surface of the n-type semiconductor layer 161 exposed by cutting out a part of the p-type semiconductor layer 162, the light-emitting layer 163, and a part of the n-type semiconductor layer 161.

[0052] FIG. 10 shows a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The semiconductor device of FIG. 10 includes a semiconductor region (semiconductor layer) 3, a barrier electrode 2 provided on the semiconductor region and capable of forming a Schottky barrier with the semiconductor region, and a barrier height adjustment layer provided between the barrier electrode 2 and the semiconductor region 3 and capable of forming a Schottky barrier having a barrier height greater than the barrier height of the Schottky barrier of the barrier electrode 2 with the semiconductor region 3. Note that the barrier height adjustment layer 1 is embedded in the semiconductor region 3. In an embodiment of the present invention, it is preferable that the barrier height adjustment layer is provided at regular intervals, and it is more preferable that the barrier height adjustment regions are respectively provided between both ends of the barrier electrode and the semiconductor region. With such a preferred embodiment, the JBS is configured to be excellent in thermal stability and adhesion, have a further reduced leakage current, and have more excellent semiconductor characteristics such as breakdown voltage. Note that the semiconductor device of FIG. 10 includes an ohmic electrode 4 on the semiconductor region 3.

[0053] The forming means of each layer of the semiconductor device of FIG. 10 is not particularly limited as long as it does not inhibit the object of the present invention, and may be a known means. For example, after film formation by a vacuum evaporation method, a CVD method, a sputtering method, various coating techniques, etc., means of patterning by a photolithography method, or means of directly patterning using a printing technique or the like can be mentioned.

[0054] FIG. 11 shows a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The semiconductor device of FIG. 11 is different from the semiconductor device of FIG. 10 in that a guard ring 5 is provided at the outer peripheral portion of the barrier electrode. By configuring in this way, a semiconductor device excellent in semiconductor characteristics such as breakdown voltage can be obtained. In the embodiment of the present invention, by embedding a part of the guard ring 5 in the surface of the semiconductor region (semiconductor layer) 3 respectively, the breakdown voltage can be made more effective and better. Furthermore, by using a metal with a high barrier height for the guard ring, the guard ring can be provided industrially advantageously in combination with the formation of the barrier electrode, and can be formed without deteriorating the on-resistance and without significantly affecting the semiconductor region.

[0055] Normally, a material with a high barrier height is used for the guard ring. Examples of the material used for the guard ring include, for example, a conductive material with a barrier height of 1 eV or more, and it may be the same as the electrode material. Also, the shape of the guard ring is not particularly limited, and examples include a square shape, a circular shape, a U shape, an L shape, or a strip shape. The number of guard rings is not particularly limited either, but preferably it is 3 or more, more preferably 6 or more.

[0056] (MOSFET) FIG. 12 shows a preferred example of a metal-oxide-semiconductor field-effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+-type semiconductor layer 131b, a second n+-type semiconductor layer 131c, a p-type semiconductor layer 132, a p+-type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. Note that the p+-type semiconductor layer 132a may be a p-type semiconductor layer and may be the same as the p-type semiconductor layer 132. Note that the p-type semiconductor may be the same material as the n-type semiconductor and contain a p-type dopant, or may be a different p-type semiconductor.

[0057] The above-described crystalline oxide film or semiconductor device of the present invention can be applied to a power conversion device such as an inverter or a converter in order to exhibit the above-described functions. More specifically, it can be applied as a diode incorporated in an inverter or a converter, or a switching element such as a thyristor, a power transistor, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), etc. FIG. 13 is a block configuration diagram showing an example of a control system using the semiconductor device according to an embodiment of the present invention, and FIG. 14 is a circuit diagram of the same control system, which is a control system particularly suitable for mounting on an electric vehicle (Electric Vehicle).

[0058] As shown in FIG. 13, the control system 500 includes a battery (power source) 501, a boost converter 502, a buck converter 503, an inverter 504, a motor (drive target) 505, and a drive control unit 506, and these are mounted on an electric vehicle. The battery 501 is composed of a storage battery such as a nickel-hydrogen battery or a lithium-ion battery, stores electric power by charging at a charging station or regenerative energy during deceleration, etc., and can output a DC voltage required for the operation of the driving system and the electrical equipment system of the electric vehicle. The boost converter 502 is a voltage conversion device equipped with a chopper circuit, for example, and can boost a DC voltage of, for example, 200V supplied from the battery 501 to, for example, 650V by the switching operation of the chopper circuit and output it to the driving system such as a motor. The buck converter 503 is also a voltage conversion device equipped with a chopper circuit, but can output a DC voltage of, for example, 200V supplied from the battery 501 to the electrical equipment system including a power window, a power steering, or in-vehicle electrical equipment, etc. by stepping it down to about 12V, for example.

[0059] The inverter 504 converts the DC voltage supplied from the boost converter 502 into a three-phase AC voltage by means of a switching operation and outputs it to the motor 505. The motor 505 is a three-phase AC motor that constitutes the driving system of the electric vehicle, and is rotationally driven by the three-phase AC voltage output from the inverter 504. The rotational driving force is transmitted to the wheels of the electric vehicle via a transmission (not shown).

[0060] On the other hand, using various sensors (not shown), measured values such as the rotational speed, torque, and depression amount of the accelerator pedal (accelerator amount) of the wheels are measured from the electric vehicle during running, and these measurement signals are input to the drive control unit 506. At the same time, the output voltage value of the inverter 504 is also input to the drive control unit 506. The drive control unit 506 has the function of a controller equipped with an arithmetic unit such as a CPU (Central Processing Unit) and a data storage unit such as a memory. By generating a control signal using the input measurement signals and outputting it to the inverter 504 as a feedback signal, the switching operation by the switching elements is controlled. As a result, the AC voltage applied by the inverter 504 to the motor 505 is instantaneously corrected, enabling the accurate execution of the driving control of the electric vehicle and realizing the safe and comfortable operation of the electric vehicle. Note that it is also possible to control the output voltage to the inverter 504 by applying the feedback signal from the drive control unit 506 to the boost converter 502.

[0061] FIG. 14 shows a circuit configuration excluding the step-down converter 503 in FIG. 13, that is, a circuit configuration showing only the configuration for driving the motor 505. As shown in the figure, the semiconductor device of the present invention is used for switching control by being adopted in the boost converter 502 and the inverter 504 as, for example, a Schottky barrier diode. In the boost converter 502, it is incorporated into a chopper circuit to perform chopper control, and in the inverter 504, it is incorporated into a switching circuit including an IGBT to perform switching control. Note that the output of the battery 501 is interposed with an inductor (such as a coil) to stabilize the current, and a capacitor (such as an electrolytic capacitor) is interposed between each of the battery 501, the boost converter 502, and the inverter 504 to stabilize the voltage.

[0062] Also, as shown by the dotted line in FIG. 14, an arithmetic unit 507 composed of a CPU (Central Processing Unit) and a storage unit 508 composed of a non-volatile memory are provided in the drive control unit 506. The signal input to the drive control unit 506 is given to the arithmetic unit 507, and a feedback signal for each semiconductor element is generated by performing necessary calculations. The storage unit 508 temporarily holds the calculation results by the arithmetic unit 507, accumulates physical constants, functions, etc. necessary for drive control in the form of a table, and appropriately outputs them to the arithmetic unit 507. The arithmetic unit 507 and the storage unit 508 can adopt known configurations, and their processing capabilities, etc. can also be arbitrarily selected.

[0063] As shown in FIGS. 13 and 14, in the control system 500, diodes, thyristors which are switching elements, power transistors, IGBTs, MOSFETs, etc. are used for the switching operations of the boost converter 502, the buck converter 503, and the inverter 504. By using gallium oxide (Ga2O3), particularly corundum-type gallium oxide (α-Ga2O3) as the material for these semiconductor elements, the switching characteristics are significantly improved. Furthermore, by applying the semiconductor device and the like according to the present invention, extremely good switching characteristics can be expected, and further miniaturization and cost reduction of the control system 500 can be realized. That is, each of the boost converter 502, the buck converter 503, and the inverter 504 can be expected to have the effects of the present invention, and the effects of the present invention can be expected in any one of these, or any combination of two or more of them, or in any form including the drive control unit 506. Note that the above-described control system 500 can be applied not only to the control system of an electric vehicle for the semiconductor device of the present invention, but also to control systems for all applications such as boosting and bucking the power from a DC power source and converting the power from DC to AC. It is also possible to use a power source such as a solar cell as the battery.

[0064] FIG. 15 is a block configuration diagram showing another example of a control system employing the semiconductor device according to an embodiment of the present invention, and FIG. 16 is a circuit diagram of the control system, which is a control system suitable for mounting on infrastructure devices and home appliances that operate with power from an AC power source.

[0065] As shown in FIG. 15, the control system 600 inputs the power supplied from an external three-phase AC power supply (power supply) 601, and has an AC / DC converter 602, an inverter 604, a motor (object to be driven) 605, and a drive control unit 606, and these can be mounted on various devices (described later). The three-phase AC power supply 601 is, for example, a power generation facility (thermal power plant, hydroelectric power plant, geothermal power plant, nuclear power plant, etc.) of an electric power company, and its output is supplied as an AC voltage while being stepped down through a substation. Also, for example, it is installed in a building or a neighboring facility in the form of a self-generator and supplied through a power cable. The AC / DC converter 602 is a voltage conversion device that converts an AC voltage into a DC voltage, and converts an AC voltage of 100V or 200V supplied from the three-phase AC power supply 601 into a predetermined DC voltage. Specifically, it is converted into a desired DC voltage generally used, such as 3.3V, 5V, or 12V, by voltage conversion. When the object to be driven is a motor, conversion to 12V is performed. It is also possible to employ a single-phase AC power supply instead of the three-phase AC power supply, and in that case, the same system configuration can be achieved by using a single-phase input AC / DC converter.

[0066] The inverter 604 converts the DC voltage supplied from the AC / DC converter 602 into a three-phase AC voltage by a switching operation and outputs it to the motor 605. The motor 604 has a different form depending on the control object. When the control object is a train, it is a three-phase AC motor for driving wheels, when it is factory equipment, it is for driving pumps and various power sources, and when it is home electric appliances, it is for driving compressors, etc. It is rotationally driven by the three-phase AC voltage output from the inverter 604, and transmits the rotational driving force to a drive object (not shown).

[0067] In addition, for example, in home appliances, there are many drive targets that can directly receive the DC voltage output from the AC / DC converter 302 (such as personal computers, LED lighting devices, video devices, audio devices, etc.). In such cases, the inverter 604 is not required in the control system 600. As shown in Fig. 15, a DC voltage is supplied from the AC / DC converter 602 to the drive target. In this case, for example, a 3.3V DC voltage is supplied to a personal computer, and a 5V DC voltage is supplied to an LED lighting device.

[0068] On the other hand, using various sensors (not shown), measured values such as the rotation speed and torque of the drive target, or the temperature and flow rate of the surrounding environment of the drive target are measured, and these measurement signals are input to the drive control unit 606. At the same time, the output voltage value of the inverter 604 is also input to the drive control unit 606. Based on these measurement signals, the drive control unit 606 gives a feedback signal to the inverter 604 and controls the switching operation of the switching elements. As a result, the AC voltage applied by the inverter 604 to the motor 605 is instantaneously corrected, enabling the accurate execution of the operation control of the drive target and realizing the stable operation of the drive target. Also, as described above, when the drive target can be driven by a DC voltage, it is also possible to perform feedback control on the AC / DC converter 602 instead of feeding back to the inverter.

[0069] FIG. 16 shows the circuit configuration of FIG. 15. As shown in the figure, the semiconductor device of the present invention is used for switching control by being adopted in, for example, an AC / DC converter 602 and an inverter 604 as a Schottky barrier diode. The AC / DC converter 602 uses, for example, a circuit configured by arranging Schottky barrier diodes in a bridge shape, and performs DC conversion by converting and rectifying the negative voltage component of the input voltage into a positive voltage. In the inverter 604, it is incorporated into the switching circuit of the IGBT to perform switching control. Note that an inductor (such as a coil) is interposed between the three-phase AC power supply 601 and the AC / DC converter 602 to stabilize the current, and a capacitor (such as an electrolytic capacitor) is interposed between the AC / DC converter 602 and the inverter 604 to stabilize the voltage.

[0070] Also, as shown by the dotted line in FIG. 16, an arithmetic unit 607 composed of a CPU and a storage unit 608 composed of a non-volatile memory are provided in the drive control unit 606. The signal input to the drive control unit 606 is given to the arithmetic unit 607, and a feedback signal for each semiconductor element is generated by performing necessary calculations. The storage unit 608 temporarily holds the calculation results by the arithmetic unit 607, accumulates physical constants, functions, etc. necessary for drive control in the form of a table, and appropriately outputs them to the arithmetic unit 607. The arithmetic unit 607 and the storage unit 608 can adopt known configurations, and their processing capabilities, etc. can also be arbitrarily selected.

[0071] Even in such a control system 600, similar to the control system 500 shown in FIGS. 13 and 14, diodes and switching elements such as thyristors, power transistors, IGBTs, MOSFETs, etc. are used for the rectifying operation and switching operation of the AC / DC converter 602 and the inverter 604. By using gallium oxide (Ga2O3), particularly corundum-type gallium oxide (α-Ga2O3) as the material for these semiconductor elements, the switching characteristics are improved. Furthermore, by applying the semiconductor film and semiconductor device according to the present invention, extremely good switching characteristics can be expected, and further miniaturization and cost reduction of the control system 600 can be achieved. That is, each of the AC / DC converter 602 and the inverter 604 can be expected to have the effects of the present invention, and the effects of the present invention can be expected in any one of these, or in a combination, or in a form including the drive control unit 606.

[0072] In addition, although the motor 605 is illustrated as the drive target in FIGS. 15 and 16, the drive target is not necessarily limited to a mechanically operating one, and many devices that require an AC voltage can be targeted. In the control system 600, it can be applied as long as it inputs power from an AC power source and drives the drive target, and can be mounted for drive control of devices such as infrastructure devices (for example, power facilities, communication facilities, traffic control devices, water and sewage treatment facilities, system devices, labor-saving devices, trains, etc.) and home appliances (for example, refrigerators, washing machines, personal computers, LED lighting devices, video devices, audio devices, etc.).

[0073] (Example 1) 1. Film-forming apparatus In this example, the film-forming apparatus 19 shown in FIG. 1 was used.

[0074] 2. Preparation of raw material solution 10% by volume of hydrobromic acid (HBr) was added to an aqueous solution of 0.1 M gallium bromide (GaBr3) to obtain a raw material solution.

[0075] 3. Film-forming preparation The raw material solution 24a obtained in 2. above was accommodated in the mist generation source 24. Next, as the substrate 20, a sapphire substrate having a buffer layer laminated on the surface and having a main surface inclined 3° in the c-axis direction from the m-plane was used, and it was placed on the hot plate 28. The hot plate 28 was operated to raise the substrate temperature to 630°C. Next, the flow control valves 23a and 23b were opened, and carrier gas was supplied into the film forming chamber 30 from the carrier gas supply means 22a and 22b which are carrier gas sources. After sufficiently replacing the atmosphere in the film forming chamber 30 with the carrier gas, the flow rate of the carrier gas was adjusted to 0.6 L / min. Nitrogen was used as the carrier gas.

[0076] 4. Film Formation Next, the ultrasonic oscillator 26 was vibrated at 2.4 MHz, and the vibration was propagated to the raw material solution 24a through the water 25a, thereby atomizing the raw material solution 24a to generate mist (atomized droplets) 24b. This mist 24b was introduced into the film forming chamber 30 through the supply pipe 27 by the carrier gas. Under atmospheric pressure at 630°C, the mist underwent a thermal reaction on the substrate 20, and a film was formed on the substrate 20. The film formation time was 1 hour. When the obtained film was identified using an X-ray diffractometer, it was found to be an α-Ga2O3 single crystal film.

[0077] (Examples 2 - 9) As Examples 2 - 9, crystalline oxide films were obtained in the same manner as in Example 1, except that film formation was performed under the conditions shown in Table 1 respectively. When the obtained films were identified using an X-ray diffractometer, all of them were α-Ga2O3 single crystal films.

[0078]

Table 1

[0079] (Comparative Examples 1 - 6) As Comparative Examples 1 - 6, crystalline oxide films were obtained in the same manner as in Example 1, except that film formation was performed under the conditions shown in Table 2 respectively. When the obtained films were identified using an X-ray diffractometer, all of them were α-Ga2O3 single crystal films.

[0080] [Table 2]

[0081] (Evaluation) For the crystalline oxide films obtained in Examples 1 to 9 and Comparative Examples 1 to 6, the film thickness, warp, and presence or absence of cracks were confirmed. The results are shown in Table 3. The measurement of warp was performed using a surface shape measurement system DYVOCE (manufactured by Kanzaki Seiki Co., Ltd., model number: DY-3000-039). The crack generation rate was calculated by dividing the crystalline oxide film into 152 sections and checking the presence or absence of cracks in each section. The warp measurement results of Example 2, Example 5, Example 8, Comparative Example 2, Comparative Example 5, and Comparative Example 6 are shown in Fig. 17. As is clear from Table 3 and Fig. 17, it can be seen that the warp in the crystal axis direction of the Example products is more uniform than that of the Comparative Example products. In addition, the absolute value of the warp amount of the Example products is reduced compared to the Comparative Example products, and furthermore, even when the film thickness is increased (for example, 5 μm or more, preferably 10 μm or more), there are substantially no cracks over an area of at least 2 mm 2 or more.

[0082] [Table 3]

[0083] (Examples 10 to 12) As Examples 10 to 12, a sapphire substrate having a crystal growth surface which is a surface inclined 20° in the c-axis direction from the m-plane was used as the substrate, and a crystalline oxide film was obtained in the same manner as in Examples 1 to 3, respectively. When the obtained films were identified using an X-ray diffractometer, all of them were α-Ga2O3 single crystal films. Further, for the obtained films, the film thickness, warpage, and crack generation rate were examined in the same manner as in Examples 1 to 9. The results are shown in Table 4. As is clear from Table 4, it can be seen that the products of this example have a ratio of the warpage amount in the c-axis direction to the a-axis direction within the range of 0.4 or more and less than 3, and the warpage in each crystal axis direction is more uniform. Note that the products of this example have substantially no cracks over an area of at least 2 mm 2 even when the film thickness is increased (for example, 5 μm or more, preferably 10 μm or more).

[0084] (Examples 13 to 14) As Examples 13 to 14, a sapphire substrate having a crystal growth surface which is a surface inclined 25° in the c-axis direction from the m-plane was used as the substrate, and a crystalline oxide film was obtained in the same manner as in Examples 1 and 2, respectively. When the obtained films were identified using an X-ray diffractometer, all of them were α-Ga2O3 single crystal films. Further, for the obtained films, the film thickness, warpage, and crack generation rate were examined in the same manner as in Examples 1 to 9. The results are shown in Table 4. As is clear from Table 4, it can be seen that the products of this example have a ratio of the warpage amount in the c-axis direction to the a-axis direction within the range of 0.4 or more and less than 3, and the warpage in each crystal axis direction is more uniform. Note that the products of this example have substantially no cracks over an area of at least 2 mm 2 even when the film thickness is increased (for example, 5 μm or more, preferably 10 μm or more).

[0085] [Table 4]

[0086] (Hall effect measurement) Except for performing doping, crystalline oxide films were obtained in the same manner as in Examples 1 to 14. When the obtained films were identified using an X-ray diffractometer, all of them were α-Ga2O3 single crystal films. Further, regarding the obtained films, when the film thickness, warp, and crack generation rate were examined in the same manner as in Examples 1 to 9, it was found that, as in Examples 1 to 14, warping and cracks could be suppressed even when the film thickness was increased. Further, when Hall effect measurement was performed on the obtained films, it was found that all of the samples of the examples had a mobility of 5 cm 2 / V·s or more and had excellent electrical characteristics. Also, it was found that the samples of the examples with an inclination angle of 3° to 10° were about twice as excellent in mobility as the samples of the examples with inclination angles of 20° and 25°. From this result, it was found that when the main surface is a surface inclined by at least 3° to 10° in the c-axis direction from the m-plane, semiconductor characteristics can be further improved while suppressing warping and cracks.

Industrial Applicability

[0087] The crystalline oxide film of the present invention can be used in various fields such as semiconductors (for example, compound semiconductor electronic devices, etc.), electronic component and electrical equipment parts, optical and electrophotographic related devices, and industrial members. In particular, it is useful for semiconductor devices and their members.

Explanation of Symbols

[0088] 1 Barrier height adjustment layer 2 Barrier electrode 3 Semiconductor region (semiconductor layer) 4 Ohmic electrode 5 Guard ring 19 Mist CVD apparatus (film forming apparatus) 20 Substrate 21 Susceptor 22a Carrier gas supply means 22b Carrier gas (dilution) supply means 23a Flow rate regulating valve 23b Flow rate regulating valve 24 Mist generation source 24a Raw material solution 25 containers 25a water 26 ultrasonic vibrator 27 supply pipe 28 heater 29 exhaust port 30 film formation chamber 101a n-type semiconductor layer 101b n+-type semiconductor layer 102 p-type semiconductor layer 103 semi-insulating layer 104 insulating layer 105a Schottky electrode 105b ohmic electrode 121a n-type semiconductor layer with a wide bandgap 121b n-type semiconductor layer with a narrow bandgap 121c n+-type semiconductor layer 123 p-type semiconductor layer 124 semi-insulating layer 125a gate electrode 125b source electrode 125c drain electrode 128 buffer layer 131a n-type semiconductor layer 131b first n+-type semiconductor layer 131c second n+-type semiconductor layer 132 p-type semiconductor layer 132a p+-type semiconductor layer 134 gate insulating film 135a gate electrode 135b source electrode 135c drain electrode 141a n-type semiconductor layer 141b first n+-type semiconductor layer 141c second n+-type semiconductor layer 145a gate electrode 145b source electrode 145c drain electrode 151 n-type semiconductor layer 151a n-type semiconductor layer 151b n+-type semiconductor layer 152 p-type semiconductor layer 154 Gate insulating film 155a Gate electrode 155b Emitter electrode 155c Collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 Light-emitting layer 165a First electrode 165b Second electrode 167 Transparent electrode 169 Substrate 500 Control system 501 Battery (power supply) 502 Boost converter 503 Buck converter 504 Inverter 505 Motor (object to be driven) 506 Drive control unit 507 Arithmetic unit 508 Memory unit 600 Control system 601 Three-phase AC power supply (power supply) 602 AC / DC converter 604 Inverter 605 Motor (object to be driven) 606 Drive control unit 607 Arithmetic unit 608 Memory unit

Claims

1. A crystalline oxide film comprising a metal oxide containing gallium and including at least a first crystal axis and a second crystal axis, wherein a linear expansion coefficient in the first crystal axis direction is smaller than a linear expansion coefficient in the second crystal axis direction, a main surface is a surface inclined at least in the second crystal axis direction from a plane parallel to the second crystal axis direction, and an angle of the inclination is in a range of 3° to 25°.

2. The crystalline oxide film according to claim 1, wherein the metal oxide has a corundum structure.

3. The crystalline oxide film according to claim 1 or 2, wherein the metal oxide contains indium, rhodium or iridium in addition to gallium.

4. The crystalline oxide film according to claim 1 or 2, wherein the metal oxide contains indium and / or aluminum in addition to gallium.

5. The crystalline oxide film according to any one of claims 1 to 4, wherein a film thickness is 2.5 μm or more.

6. The crystalline oxide film according to any one of claims 1 to 5, which contains a dopant.

7. The crystalline oxide film according to any one of claims 1 to 6, wherein a ratio of a warpage amount in the second crystal axis direction to a warpage amount in the first crystal axis direction is 3 or less.

8. The crystalline oxide film according to any one of claims 1 to 7, wherein the angle of the inclination is in a range of 3° to 10°.

9. The crystalline oxide film according to any one of claims 1 to 8, which has a corundum structure and a main surface is a surface inclined at least in the second crystal axis direction from an m plane.

10. The crystalline oxide film according to claim 9, wherein the second crystal axis direction is a c-axis direction.

11. A semiconductor device comprising at least the crystalline oxide film according to any one of claims 1 to 10 and an electrode.

12. A power conversion device using the semiconductor device according to claim 11.

13. A control system using the semiconductor device according to claim 11.

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