Ceramic electronic component, method for manufacturing the same, and circuit board

Abstract

To provide a ceramic electronic component in which an external electrode including a sintering base layer and a plating layer can be formed suitably on a ceramic element body.SOLUTION: A ceramic electronic component includes a ceramic element body and a pair of external electrodes. The ceramic element body includes a pair of end surfaces and a side surface connecting the pair of end surfaces. The side surface includes a pair of end part regions adjacent to the pair of end surfaces, and an intermediate region existing between the pair of end part regions. The pair of external electrodes includes a pair of base layers covering the pair of end surfaces and the pair of end part regions in the side surface, and having an external surface whose difference in surface roughness Ra from the intermediate region of the side surface is 40 nm or less, and a pair of plating layers covering the external surface of the pair of base layers and including a pair of extension regions extending from the external surface of the pair of base layers to the intermediate region of the side surface. Preferably, the contact angle of the pair of extension parts on the intermediate region of the side surface is acute.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present invention relates to a ceramic electronic component having a pair of external electrodes, a method for manufacturing the same, and a circuit board.

Background Art

[0002] Patent Document 1 discloses a multilayer ceramic capacitor having an external electrode including an underlayer and a plating layer. In the method for manufacturing the multilayer ceramic capacitor described in Patent Document 1, an underlayer is formed by baking a conductive paste on a ceramic body, and a plating layer is formed on the underlayer by a wet plating method.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in a multilayer ceramic capacitor configured to provide a plating layer to a ceramic body via an underlayer as described above, defects are likely to occur in the plating layer. In contrast, the inventor of the present application has found that by performing a specific pretreatment on a ceramic body on which an underlayer is formed, it is possible to reduce the occurrence of defects in the plating layer.

[0005] In view of the above circumstances, an object of the present invention is to provide a ceramic electronic component, a method for manufacturing the same, and a circuit board capable of favorably forming an external electrode including an underlayer and a plating layer on a ceramic body.

Means for Solving the Problems

[0006] To achieve the above object, a ceramic electronic component according to one embodiment of the present invention includes a ceramic body and a pair of external electrodes. The above ceramic body includes a pair of end faces and side faces connecting the pair of end faces, and the side faces are composed of a pair of end regions adjacent to the pair of end faces and an intermediate region located between the pair of end regions. The pair of external electrodes cover the pair of end faces and the pair of end regions of the side faces, and have a pair of base layers with an outer surface having a difference in surface roughness Ra of 10 nm or more and 40 nm or less with respect to the intermediate region of the side faces, and cover the outer surfaces of the pair of base layers, and extend from the outer surfaces of the pair of base layers to the intermediate region of the side faces so as to contact and include a pair of plating layers each having a pair of extending regions. upper The contact angle of the pair of extending portions with respect to the intermediate region of the side face is according to the difference in the surface roughness Ra an acute angle forming .

[0007] In this ceramic electronic component, the extending portions of the plating layer extend from the outer surface of the base layer to the intermediate region of the side face of the ceramic body. In such a configuration, by keeping the difference in surface roughness Ra between the outer surface of the base layer and the intermediate region of the side face of the ceramic body small, the contact angle of the extending portion of the plating layer with respect to the intermediate region of the side face of the ceramic body can be made small. Thereby, peeling of the external electrode starting from the extending portion of the plating layer can be suppressed.

[0008] The base layer may contain nickel as a main component. The base layer may contain a ceramic component. The difference in surface roughness Ra between the outer surfaces of the pair of base layers and the intermediate region of the side face may be 30 nm or less. The surface roughness Ra of the outer surface of the base layer may be 10 nm or more and less than 200 nm. The surface roughness Ra of the intermediate region may be 10 nm or more and less than 150 nm.

[0009] In the method for manufacturing a ceramic electronic component according to one embodiment of the present invention, a composite sintered body including a ceramic body including a pair of end faces and side faces connecting the pair of end faces, and a pair of base layers that extend from the pair of end faces into the side faces and are spaced apart from each other on the side faces is produced. The composite sintered body is subjected to blast polishing. The outer surfaces of the pair of base layers are coated on the composite sintered body subjected to the blast polishing by a wet plating method. and has a pair of extending portions extending so as to contact the side surface from the outer surfaces of the pair of base layers A pair of plating layers are formed.

[0010] In this configuration, by subjecting the composite sintered body composed of the ceramic body and the base layer to blast polishing, the outer surfaces of the base layers can be uniformly ground. As a result, since the metal oxides generated on the outer surfaces of the base layers during firing or the like are removed, a plating layer can be formed on the outer surfaces of the base layers without unevenness. Further, by using blast polishing, the difference in surface roughness Ra between the outer surface of the base layer and the intermediate region of the side surface of the ceramic body can be kept small, so that a configuration capable of suppressing the peeling of the external electrodes can be obtained.

[0011] In the step of performing the blast polishing, the composite sintered body is subjected to the blast polishing so that the difference in surface roughness Ra between the outer surfaces of the pair of base layers and the region between the pair of base layers on the side surface is 10 nm or more and 40 nm or less. The step of forming the pair of plating layers is The contact angle of the pair of extending portions with respect to the side surface is forming the pair of plating layers so as to form an acute angle according to the difference in the surface roughness Ra . Producing the composite sintered body may include co-firing the ceramic body and the pair of base layers.

[0012] A circuit board according to one embodiment of the present invention includes the multilayer ceramic electronic component, a board body, a pair of terminals, and solder. The pair of terminals are provided on the board body. The solder joins the pair of external electrodes and the pair of terminals.

Advantages of the Invention

[0013] It is possible to provide a ceramic electronic component, a method for manufacturing the same, and a circuit board, which can favorably form an external electrode including an underlayer and a plating layer on a ceramic body.

Brief Description of the Drawings

[0014]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Embodiments for Carrying Out the Invention

[0015] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings show an X-axis, a Y-axis, and a Z-axis that are orthogonal to each other as appropriate. The X-axis, Y-axis, and Z-axis are common throughout the drawings.

[0016] [Basic Configuration of Multilayer Ceramic Capacitor 10] Figs. 1 to 4 are diagrams showing a multilayer ceramic capacitor 10 according to an embodiment of the present invention. Fig. 1 is a perspective view of the multilayer ceramic capacitor 10. Fig. 2 is a cross-sectional view taken along line A-A' of Fig. 1. Fig. 3 is a cross-sectional view taken along line B-B' of Fig. 1. Fig. 4 is a cross-sectional view taken along line C-C' of Fig. 1.

[0017] The multilayer ceramic capacitor 10 includes a ceramic body 11, a first external electrode 14, and a second external electrode 15. The multilayer ceramic capacitor 10 can be formed in various sizes according to its use and the like. As an example, the dimensions along the X-axis, Y-axis, and Z-axis can be 1.0 mm, 0.5 mm, and 0.5 mm, respectively.

[0018] The ceramic body 11 is configured as a hexahedron having an outer surface including a pair of end faces E, a pair of first side faces S1, and a pair of second side faces S2. In the ceramic body 11, a pair of end faces E extending parallel to the Y-Z plane are connected along the X-axis direction by the first side faces S1 extending parallel to the X-Y plane and the second side faces S2 extending parallel to the X-Z plane.

[0019] Both the end face E and the side faces S1, S2 of the ceramic body 11 are configured as flat surfaces. The flat surface according to the present embodiment may not be strictly planar as long as it is recognized as flat when viewed as a whole, and includes, for example, a surface having minute unevenness on the surface or a gentle curved shape existing within a predetermined range.

[0020] Each of the external electrodes 14, 15 covers both end faces E of the ceramic body 11 and faces each other in the X-axis direction with the ceramic body 11 interposed therebetween. The external electrodes 14, 15 wrap around from each end face E of the ceramic body 11 to the first side faces S1 and the second side faces S2 and are spaced apart from each other in the X-axis direction on the first side faces S1 and the second side faces S2.

[0021] The ceramic body 11 is formed of a dielectric ceramic. The ceramic body 11 has a plurality of first internal electrodes 12 and second internal electrodes 13 covered with a dielectric ceramic. The plurality of internal electrodes 12 and 13 are both in the form of sheets extending along the X-Y plane and are alternately arranged along the Z-axis direction.

[0022] That is, in the ceramic body 11, an opposing region is formed in which the internal electrodes 12 and 13 face each other in the Z-axis direction with a ceramic layer interposed therebetween. The first internal electrode 12 is drawn out from the opposing region to one end face E and is connected to the first external electrode 14. The second internal electrode 13 is drawn out from the opposing region to the other end face E and is connected to the second external electrode 15.

[0023] With such a configuration, in the multilayer ceramic capacitor 10, when a voltage is applied between the first external electrode 14 and the second external electrode 15, a voltage is applied to the plurality of ceramic layers in the opposing region of the internal electrodes 12 and 13. As a result, in the multilayer ceramic capacitor 10, charges corresponding to the voltage between the first external electrode 14 and the second external electrode 15 are stored.

[0024] In the ceramic body 11, a dielectric ceramic with a high dielectric constant is used to increase the capacitance of each ceramic layer between the internal electrodes 12 and 13. Examples of the dielectric ceramic with a high dielectric constant include materials having a perovskite structure containing barium (Ba) and titanium (Ti), typified by barium titanate (BaTiO3).

[0025] Note that the dielectric ceramic may also be of a composition system such as strontium titanate (SrTiO3), calcium titanate (CaTiO3), magnesium titanate (MgTiO3), calcium zirconate (CaZrO3), calcium zirconate titanate (Ca(Zr,Ti)O3), barium zirconate (BaZrO3), titanium oxide (TiO2), etc.

[0026] [Detailed Configuration of Multilayer Ceramic Capacitor 10] The multilayer ceramic capacitor 10 according to this embodiment has a configuration capable of stably forming good external electrodes 14 and 15 on the ceramic body 11. As a result, in the external electrodes 14 and 15 according to this embodiment, good connectivity to the internal electrodes 12 and 13 can be easily obtained, and good solder wettability during mounting can be easily ensured.

[0027] Specifically, in the multilayer ceramic capacitor 10, the first external electrode 14 has a first underlayer 14a and a first plating layer 14b, and the second external electrode 15 has a second underlayer 15a and a second plating layer 15b. The underlayers 14a and 15a are configured as sintered films of a conductor, and the plating layers 14b and 15b are configured as wet plating films of a metal.

[0028] The underlayers 14a and 15a are adjacent to the end face E and the side faces S1 and S2 of the ceramic body 11 and constitute the innermost layers of the external electrodes 14 and 15. In the external electrodes 14 and 15, by providing the underlayers 14a and 15a, a more reliable connection to the internal electrodes 12 and 13 at the end face E of the ceramic body 11 can be obtained.

[0029] As shown in FIGS. 2 and 3, the side faces S1 and S2 of the ceramic body 11 are composed of a pair of end regions P1 located at both ends in the X-axis direction and an intermediate region P2 located between the pair of end regions P1. The pair of end regions P1 are covered with the underlayers 14a and 15a, and the intermediate region P2 is not covered with the underlayers 14a and 15a.

[0030] The plating layers 14b and 15b cover the ceramic body 11 from above the underlayers 14a and 15a and constitute the outermost layers of the external electrodes 14 and 15. In the multilayer ceramic capacitor 10, by providing the plating layers 14b and 15b having higher solder wettability than the underlayers 14a and 15a as the outermost layers of the external electrodes 14 and 15, it becomes possible to easily mount.

[0031] The plating layers 14b and 15b cover the entire outer surface Q of the base layers 14a and 15a, and further have extending portions 14b1 and 15b1 that extend inward in the X-axis direction beyond the base layers 14a and 15a. The extending portions 14b1 and 15b1 of the plating layers 14b and 15b are in direct contact with the intermediate region P2 on the side surfaces S1 and S2 of the ceramic element body 11.

[0032] FIG. 5 is a partial cross-sectional view showing an enlarged view of the extending portions 14b1 and 15b1 of the plating layers 14b and 15b and the vicinity thereof in the multilayer ceramic capacitor 10. In the multilayer ceramic capacitor 10, since the external electrodes 14 and 15 have a common configuration, for convenience of explanation, the reference numerals for the external electrodes 14 and 15 are shown simultaneously in FIG. 5.

[0033] In the multilayer ceramic capacitor 10, the difference ΔRa in surface roughness Ra between the outer surface Q of the base layers 14a and 15a and the intermediate region P2 on the side surfaces S1 and S2 of the ceramic element body 11 is small. Specifically, ΔRa is preferably 40 nm or less, and more preferably 30 nm or less. Note that if ΔRa is small, the magnitude relationship of the surface roughness Ra on each surface may be arbitrary.

[0034] With this configuration, in the multilayer ceramic capacitor 10, the contact angle θ shown in FIG. 5, which is defined as the angle formed by the surface of the extending portions 14b1 and 15b1 with respect to the intermediate region P2 on the side surfaces S1 and S2 of the ceramic element body 11, becomes small. Specifically, the contact angle θ of the extending portions 14b1 and 15b1 is preferably an acute angle.

[0035] In the external electrodes 14 and 15, by making the contact angle θ of the extending portions 14b1 and 15b1 an acute angle, an external force in a direction to peel the extending portions 14b1 and 15b1 from the intermediate region P2 on the side surfaces S1 and S2 of the ceramic element body 11 is less likely to be applied. For this reason, in the extending portions 14b1 and 15b1, the joining to the intermediate region P2 on the side surfaces S1 and S2 of the ceramic element body 11 is less likely to be hindered.

[0036] As a result, in the multilayer ceramic capacitor 10, peeling of the external electrodes 14 and 15 starting from the extending portions 14b1 and 15b1 can be prevented. Therefore, in the multilayer ceramic capacitor 10, occurrence of problems such as a decrease in moisture resistance due to peeling of the external electrodes 14 and 15 can be prevented, and high reliability can be obtained.

[0037] The surface roughness Ra of the intermediate region P2 of the side surfaces S1 and S2 of the ceramic body 11 can be measured, for example, in a region exposed without being covered by the plating layers 14b and 15b in the ceramic body 11.

[0038] Also, the surface roughness Ra of the outer surface Q of the base layers 14a and 15a can be measured, for example, by peeling off the plating layers 14b and 15b. For peeling of the plating layers 14b and 15b, for example, a plating stripping solution can be used. More specifically, by stirring the plating stripping solution in which the multilayer ceramic capacitor 10 is immersed, the plating layers 14b and 15b can be peeled off to expose the base layers 14a and 15a.

[0039] A laser microscope can be used to measure the surface roughness Ra of the intermediate region P2 of the side surfaces S1 and S2 of the ceramic body 11 and the outer surface Q of the base layers 14a and 15a. Also, the measurement of the surface roughness Ra can be performed, for example, in a predetermined rectangular region (250 μm × 250 μm) on each surface.

[0040] On the outer surface Q of the base layers 14a and 15a, it is preferable that the surface roughness Ra is 10 nm or more and less than 200 nm over the entire region, and more preferably 30 nm or more and less than 150 nm. Thereby, in the multilayer ceramic capacitor 10, plating layers 14b and 15b with a uniform thickness are likely to be formed over the entire region of the outer surface Q of the base layers 14a and 15a.

[0041] Further, in the intermediate region P2 between the side surfaces S1 and S2 of the ceramic body 11, the surface roughness Ra is preferably 10 nm or more and less than 150 nm, and more preferably 20 nm or more and less than 120 nm. Thereby, the contact angles θ of the extending portions 14b1 and 15b1 with respect to the intermediate region P2 of the side surfaces S1 and S2 of the ceramic body 11 are more likely to remain small.

[0042] The base layers 14a and 15a are typically formed mainly of Ni (nickel). However, the main components of the base layers 14a and 15a may be, for example, Cu (copper), Pd (palladium), Ag (silver), etc. In the present embodiment, the main component means the component having the highest content ratio.

[0043] Also, the base layers 14a and 15a preferably contain a ceramic component in order to enhance the bonding property to the ceramic body 11. The ceramic component contained in the base layers 14a and 15a is typically a dielectric ceramic of the same composition system as the ceramic body 11, but may be other ceramics as necessary.

[0044] Furthermore, in the multilayer ceramic capacitor 10, unevenness is likely to occur in the plating layers 14b and 15b due to the presence of a metal oxide with low conductivity on the outer surface Q of the base layers 14a and 15a. Therefore, it is preferable that there is little metal oxide on the outer surface Q of the base layers 14a and 15a.

[0045] The plating layers 14b and 15b may have a single-layer structure composed of a single plating film or a laminated structure composed of a plurality of plating films. As an example, the plating layers 14b and 15b can have a laminated structure in which a Cu (copper) film, a Ni (nickel) film, and a Sn (tin) film are laminated in this order from the outer surface Q side of the base layers 14a and 15a.

[0046] [Method for manufacturing the multilayer ceramic capacitor 10] FIG. 6 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor 10 according to the present embodiment. FIGS. 7 to 11 are diagrams showing the manufacturing process of the multilayer ceramic capacitor 10. Hereinafter, the method for manufacturing the multilayer ceramic capacitor 10 will be described with reference to FIGS. 7 to 11 as appropriate along FIG. 6.

[0047] (Step S01: Fabrication of ceramic body) In step S01, an unfired ceramic body 111 shown in FIG. 7 is fabricated. The unfired ceramic body 111 can be obtained, for example, by laminating a plurality of ceramic sheets in the Z-axis direction and thermocompression bonding them. By previously printing a conductive paste with a predetermined pattern on the ceramic sheet, unfired internal electrodes 112 and 113 can be arranged.

[0048] The ceramic sheet is an unfired dielectric green sheet formed by shaping a ceramic slurry into a sheet. The ceramic sheet is formed into a sheet shape using, for example, a roll coater or a doctor blade. The components of the ceramic slurry are adjusted so that a ceramic body 11 with a predetermined composition can be obtained.

[0049] (Step S02: Formation of base layer) In step S02, unfired base layers 114a and 115a are formed on the unfired ceramic body 111 fabricated in step S01. Thereby, a composite green compact 111a shown in FIG. 8 is obtained. The base layers 114a and 115a can be formed, for example, by applying a conductive paste to the ceramic body 111.

[0050] In the composite green compact 111a, for example, by mixing ceramic powder into the conductive paste, the base layers 114a and 115a can be made to contain a ceramic component. Thereby, high bondability of the base layers 14a and 15a to the ceramic body 11 in the fired composite sintered body 11a can be obtained.

[0051] (Step S03: Firing) In step S03, the composite green compact 111a obtained in step S02 is fired. As a result, the composite green compact 111a is sintered, and the composite sintered body 11a shown in FIG. 9 is obtained. The firing of the composite green compact 111a can be performed, for example, in a reducing atmosphere or in an atmosphere with a low oxygen partial pressure. The firing conditions of the composite green compact 111a can be determined as appropriate.

[0052] In step S03, the ceramic base body 111 that constitutes the composite green compact 111a and the base layers 114a and 115a connected to the internal electrodes 112 and 113 exposed on the end face E of the ceramic base body 111 are simultaneously fired. As a result, in the fired composite sintered body 11a, good connectivity between the internal electrodes 12 and 13 and the base layers 14a and 15a can be obtained.

[0053] More specifically, the internal electrodes 112 and 113 and the base layers 114a and 115a mainly composed of metal start to shrink at an earlier stage than the ceramics that constitute the ceramic base body 111. However, the internal electrodes 112 and 113 and the base layers 114a and 115a connected at the unfired stage shrink integrally, making it easier to maintain their connection even after sintering.

[0054] Therefore, in the multilayer ceramic capacitor 10, the connection between the internal electrodes 12 and 13 and the external electrodes 14 and 15 can be ensured. As a result, in the multilayer ceramic capacitor 10, a decrease in capacitance due to a poor connection between the internal electrodes 12 and 13 and the external electrodes 14 and 15, and an increase in equivalent series resistance (ESR) are less likely to occur.

[0055] (Step S04: Blasting and Polishing) In step S04, the composite sintered body 11a obtained in step S03 is subjected to blasting and polishing. In blasting and polishing, fine abrasive is sprayed onto the composite sintered body 11a to grind the outer surface Q of the base layers 14a and 15a and the intermediate region P2 of the side surfaces S1 and S2 of the ceramic base body 11 that constitute the outer surface of the composite sintered body 11a.

[0056] The abrasive used in the blasting and polishing apparatus M only needs to have a sufficiently high hardness with respect to the composite sintered body 11a, and can be formed of, for example, zirconia, alumina, or the like. Further, the particle size of the abrasive only needs to be sufficiently small with respect to the composite sintered body 11a, and can be, for example, in the range of 10 μm to 1200 μm.

[0057] The inventor of the present application has found that blasting and polishing is very excellent as a pretreatment applied to the composite sintered body 11a in order to form the plating layers 14b and 15b. That is, by subjecting the composite sintered body 11a to blasting and polishing, the entire outer surface of the composite sintered body 11a can be made into a state suitable for forming good plating layers 14b and 15b.

[0058] More specifically, in blasting and polishing, by spraying a large amount of fine abrasives with small individual energies, the impact applied to the outer surface of the composite sintered body 11a can be made uniform. For this reason, in blasting and polishing, regardless of the workability of the surface to be treated, uneven shapes can be flattened, that is, the surface roughness Ra can be reduced.

[0059] Therefore, in the blasting and polishing of the composite sintered body 11a, for the surfaces to be treated where the workability of the outer surface Q of the base layers 14a and 15a mainly composed of metal and the intermediate region P2 between the side surfaces S1 and S2 of the ceramic body 11 mainly composed of ceramics are greatly different, the surface roughness Ra can be reduced simultaneously.

[0060] For this reason, by blasting and polishing the composite sintered body 11a, the difference ΔRa in the surface roughness Ra between the outer surface Q of the base layers 14a and 15a and the intermediate region P2 between the side surfaces S1 and S2 of the ceramic body 11 can be reduced. That is, in the multilayer ceramic capacitor 10, a configuration with a small ΔRa can be realized by using blasting and polishing.

[0061] In addition, in the case of abrasive blasting of the composite sintered body 11a, the metal oxides generated on the outer surface Q of the base layers 14a and 15a during firing or the like can be uniformly removed. As a result, the conductivity is improved on the outer surface Q of the base layers 14a and 15a, so that it becomes possible to uniformly deposit a metal by the wet plating method.

[0062] The surface roughness Ra on the outer surface of the composite sintered body 11a and the difference ΔR in the surface roughness Ra can be adjusted according to the conditions of abrasive blasting. Examples of the conditions of abrasive blasting include the type and particle size of the abrasive, the projection amount and projection speed of the abrasive, and the processing time. Note that the abrasive blasting in step S04 may be either dry or wet, and any known technique can be applied as necessary.

[0063] Here, barrel polishing and chemical polishing, which are typical polishing techniques used in the manufacturing process of the multilayer ceramic capacitor 10, will be described. In barrel polishing and chemical polishing, the entire outer surface of the composite sintered body 11a cannot be made suitable for forming good plating layers 14b and 15b as in the abrasive blasting according to the present embodiment.

[0064] That is, in barrel polishing, since the composite sintered bodies 11a collide with each other, a large impact is unevenly applied to the outer surface of the composite sintered body 11a. For this reason, in barrel polishing, the difference ΔRa in the surface roughness Ra is likely to be large between the outer surface Q of the base layers 14a and 15a with greatly different workabilities and the intermediate region P2 between the side surfaces S1 and S2 of the ceramic body 11.

[0065] In chemical polishing, the outer surface of the composite sintered body 11a is dissolved. On the outer surface Q of the base layers 14a and 15a, the surface roughness Ra is likely to increase due to the amplification of the uneven shape by dissolution. As a result, unevenness is likely to occur in the plating layers 14b and 15b formed on the outer surface Q of the base layers 14a and 15a.

[0066] Also, in chemical polishing, the metal oxides formed on the outer surfaces Q of the base layers 14a and 15a during firing or the like can be dissolved and removed. However, in chemical polishing, along with the dissolution of the metal oxides, the dissolution of the ceramic body 11 also progresses, so that the outer shape defect and the life defect of the multilayer ceramic capacitor 10 are likely to occur.

[0067] (Step S05: Plating layer formation) In step S05, plating layers 14b and 15b are provided on the composite sintered body 11a that has been subjected to blast polishing in step S04. For the formation of the plating layers 14b and 15b, an electrolytic or electroless wet plating method is used. Thereby, the external electrodes 14 and 15 are completed, and the multilayer ceramic capacitor 10 shown in FIGS. 1 to 4 is obtained.

[0068] FIG. 10 is a diagram showing the process of step S05. On the outer surfaces Q of the highly conductive base layers 14a and 15a, the growth of the plating layers 14b and 15b is promoted. Also, on the outer surfaces Q of the base layers 14a and 15a, there is no unevenness in conductivity and the surface roughness Ra is small over the whole, so the growth of the plating layers 14b and 15b proceeds uniformly.

[0069] On the other hand, in the intermediate region P2 between the side surfaces S1 and S2 of the ceramic body 11 with low conductivity, it is difficult to form the plating layers 14b and 15b. For this reason, in most of the regions extending to the center in the X-axis direction in the intermediate region P2 between the side surfaces S1 and S2 of the ceramic body 11, the plating layers 14b and 15b are not formed.

[0070] However, also in the intermediate region P2 between the side surfaces S1 and S2 of the ceramic body 11, attracted by the precipitation of metal on the outer surface Q of the base layers 14a and 15a, metal precipitation occurs at both ends in the X-axis direction adjacent to the base layers 14a and 15a. Thereby, the extending portions 14b1 and 15b1 of the plating layers 14b and 15b are formed.

[0071] In particular, in this embodiment, in the intermediate region P2 between the side surfaces S1 and S2 of the ceramic element 11, the outer surfaces Q of the base layers 14a and 15a have a similar surface roughness Ra, that is, they have a similar smoothness. Therefore, the intermediate region P2 between the side surfaces S1 and S2 of the ceramic element 11, together with the outer surfaces Q of the base layers 14a and 15a, constitutes a series of smooth surfaces.

[0072] For this reason, in the intermediate region P2 between the side surfaces S1 and S2 of the ceramic element 11, due to the growth tendency of the plating layers 14b and 15b on the outer surfaces Q of the base layers 14a and 15a, the growth of the extending portions 14b1 and 15b1 at both ends in the X-axis direction is promoted. As a result, the contact angle θ of the extending portions 14b1 and 15b1 becomes smaller.

[0073] [Examples and Comparative Examples] As examples and comparative examples of the present invention, 100 samples of the multilayer ceramic capacitor 10 with different differences ΔRa in surface roughness R were produced by changing the polishing conditions by the same manufacturing method as described above. For each configuration of the multilayer ceramic capacitor 10, the configurations other than the surface roughness Ra were made common.

[0074] For each configuration, the presence or absence of defects such as unevenness and peeling in the plating layers 14b and 15b was evaluated, and the number of samples in which defects occurred in the plating layers 14b and 15b was counted. FIG. 11 is a graph showing this result, and for each configuration, a plot with the difference ΔRa in surface roughness R on the horizontal axis and the defect rate of the plating layers 14b and 15b on the vertical axis is shown.

[0075] As shown in FIG. 11, for the configurations where the difference ΔRa in surface roughness R was 40 nm or less, no defects occurred in the plating layers 14b and 15b. On the other hand, for the configurations where the difference ΔRa in surface roughness Ra exceeded 40 nm, a tendency was observed that as the difference ΔRa in surface roughness R increased, more defects occurred in the plating layers 14b and 15b.

[0076] Also, in a configuration where the difference ΔRa in surface roughness Ra is 30 nm or less, it was found that particularly high solder wettability can be obtained and the plating layers 14b and 15b can be formed even better. Further, in a configuration where the difference ΔRa in surface roughness Ra is 30 nm or less, in the ceramic body 11 during the formation process of the plating layers 14b and 15b, since the stress applied to the end regions P1 and the intermediate region P2 of the side surfaces S1 and S2 becomes equal, it was found that cracks are less likely to occur.

[0077] Incidentally, in order to make the difference ΔRa in surface roughness Ra less than 10 nm nm, it is necessary to increase the processing time of the blast polishing or improve the accuracy of the polishing conditions such as the particle size of the abrasive, which is accompanied by a significant increase in the manufacturing cost. For this reason, it is preferable to set the difference ΔRa in surface roughness Ra to 10 nm nm or more.

[0078] [Other Embodiments] As described above, the embodiments of the present invention have been described, but the present invention is not limited only to the above-described embodiments, and it goes without saying that various modifications can be made.

[0079] For example, the present invention is applicable not only to multilayer ceramic capacitors but also to all ceramic electronic components having a configuration provided with a pair of external electrodes. Examples of the ceramic electronic components to which the present invention is applicable include chip varistors, chip thermistors, multilayer inductors, etc. in addition to multilayer ceramic capacitors.

[0080] In addition, a circuit board according to the present invention can be configured using the ceramic electronic component according to the present invention. As an example, the circuit board 200 shown in FIG. 12 includes the multilayer ceramic capacitor 10 according to the above embodiment, a substrate body 201, a pair of terminals 202, and solder 203. The pair of terminals 202 are provided on the substrate body 201. The external electrodes 14 and 15 of the multilayer ceramic capacitor 10 are joined to the pair of terminals 202 via the solder 203, respectively. In the circuit board 200, since the plating layers 14b and 15b of the external electrodes 14 and 15 have high solder wettability, more reliable joinability via the solder 203 between the external electrodes 14 and 15 and the pair of terminals 202 can be obtained.

Explanation of Reference Numerals

[0081] 10... Multilayer ceramic capacitor 11... Ceramic element body 12, 13... Internal electrodes 14, 15... External electrodes 14a, 15a... Underlayer 14b, 15b... Plating layer 14b1, 15b1... Extended portion E... End face S1, S2... Side faces P1... End region of side face P2... Intermediate region of side face Q... Outer surface of underlayer

Claims

1. A ceramic element including a pair of end faces and side faces connecting the pair of end faces, the side faces being composed of a pair of end regions adjacent to the pair of end faces and an intermediate region located between the pair of end regions; A pair of base layers covering the pair of end faces and the pair of end regions of the side faces, having an outer surface with a difference in surface roughness Ra of 10 nm or more and 40 nm or less with respect to the intermediate region of the side faces, and a pair of plating layers covering the outer surfaces of the pair of base layers and having a pair of extending portions extending from the outer surfaces of the pair of base layers so as to contact the intermediate region of the side faces; Comprising; The contact angle of the pair of extending portions with respect to the intermediate region of the side faces forms an acute angle corresponding to the difference in surface roughness Ra; A ceramic electronic component.

2. The ceramic electronic component according to Claim 1, wherein the base layer contains nickel as a main component; A ceramic electronic component.

3. The ceramic electronic component according to Claim 1 or 2, wherein the base layer contains a ceramic component; A ceramic electronic component.

4. The ceramic electronic component according to any one of Claims 1 to 3, wherein the difference in surface roughness Ra between the outer surfaces of the pair of base layers and the intermediate region of the side faces is 30 nm or less; A ceramic electronic component.

5. The ceramic electronic component according to any one of Claims 1 to 4, wherein the surface roughness Ra of the outer surface of the base layer is 10 nm or more and less than 200 nm; A ceramic electronic component.

6. The ceramic electronic component according to any one of Claims 1 to 5, wherein the surface roughness Ra of the intermediate region is 10 nm or more and less than 150 nm; A ceramic electronic component.

7. A composite sintered body including a ceramic element including a pair of end faces and side faces connecting the pair of end faces, and a pair of base layers that wrap around from the pair of end faces to the side faces and are spaced apart from each other on the side faces is produced; The composite sintered body is subjected to blast polishing; The outer surfaces of the pair of base layers of the composite sintered body subjected to the blast polishing are coated by a wet plating method, and a pair of plating layers having a pair of extending portions extending from the outer surfaces of the pair of base layers so as to contact the side faces are formed. The step of performing the blast polishing is to perform the blast polishing on the composite sintered body such that the difference in surface roughness Ra between the outer surfaces of the pair of base layers and the region between the pair of base layers on the side surfaces is 10 nm or more and 40 nm or less. The step of forming the pair of plating layers is to form the pair of plating layers such that the contact angle of the pair of extending portions with respect to the side surfaces forms an acute angle corresponding to the difference in surface roughness Ra. A method for manufacturing a ceramic electronic component.

8. A method for manufacturing a ceramic electronic component according to Claim 7, wherein fabricating the composite sintered body includes co-firing the ceramic body and the pair of base layers. A method for manufacturing a ceramic electronic component.

9. A ceramic body including a pair of end faces and a side surface connecting the pair of end faces, the side surface being composed of a pair of end regions adjacent to the pair of end faces and an intermediate region located between the pair of end regions, a pair of external electrodes including a pair of base layers covering the pair of end faces and the pair of end regions of the side surface and having an outer surface with a difference in surface roughness Ra of 10 nm or more and 40 nm or less with respect to the intermediate region of the side surface, and a pair of plating layers covering the outer surfaces of the pair of base layers and having a pair of extending portions extending from the outer surfaces of the pair of base layers to contact the intermediate region of the side surface, a substrate body, a pair of terminals provided on the substrate body, solder for joining the pair of external electrodes and the pair of terminals, and comprising the contact angle of the pair of extending portions with respect to the intermediate region of the side surface forms an acute angle corresponding to the difference in surface roughness Ra. A circuit board.

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