Printed circuit board

Abstract

To provide a printed circuit board, capable of securing a margin in an exposure process, and also capable of improving circuit integration density.SOLUTION: The present invention relates to a printed circuit board including an insulating layer and a circuit layer disposed on the insulating layer. The circuit layer includes a first circuit pattern and a second circuit pattern. Each of the first and second circuit patterns has a first side surface, a second side surface opposing the first side surface, and a top surface connected to tips of the first and second side surfaces, on a cross section. The first side surface of the first circuit pattern and the first side surface of the second circuit pattern are arranged to face each other. A height of the first side surface of the first circuit pattern is greater than a height of the second side surface of the first circuit pattern, and a height of the first side surface of the second circuit pattern is greater than a height of the second side surface of the second circuit pattern.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a printed circuit board.

Background Art

[0002] Recently, in the electronic component industry, in order to support 5G high-speed communication and artificial intelligence, highly integrated PCBs (Printed Circuit Boards) have been demanded. Microcircuit technology is an important technology for highly integrated PCBs, and in the current industry, research and development for reducing the line and space of circuit patterns is actively underway.

[0003] Generally, circuit formation methods realized in the PCB field include SAP (Semi Additive Process), MSAP (Modified Semi Additive Process), TT (Tenting), etc. However, such plating processes have limitations in reducing the line and space of circuit patterns as much as desired due to the process margins of the exposure process and isotropic etching (wet etching).

Summary of the Invention

Problems to be Solved by the Invention

[0004] One of several objects of the present invention is to provide a printed circuit board capable of ensuring a margin in the exposure process.

[0005] Another one of several objects of the present invention is to provide a printed circuit board capable of improving circuit integration.

Means for Solving the Problems

[0006] One of several solutions proposed through the present invention is to use a spacer method and an anisotropic etching process to realize a pair of fine circuit patterns arranged adjacent to each other such that one side of each faces the other.

[0007] For example, a printed circuit board according to an example proposed by the present invention includes a first insulating layer and a first circuit layer disposed on the first insulating layer. The first circuit layer includes first and second circuit patterns. The first and second circuit patterns each have, in cross-section, a first side surface, a second side surface opposite to the first side surface, and a top surface connected to the respective tips of the first and second side surfaces. The first side surfaces of the first and second circuit patterns are arranged to face each other, and the height of the first side surface of each of the first and second circuit patterns may be higher than the height of the second side surface of each of the first and second circuit patterns.

[0008] For example, a printed circuit board according to another example proposed by the present invention includes a first insulating layer and a first circuit layer disposed on the first insulating layer. The first circuit layer includes first and second circuit patterns arranged in a pair such that their side surfaces face each other, and a third circuit pattern disposed independently of the first and second circuit patterns. The third circuit pattern may have a larger line width than each of the first and second circuit patterns.

Effects of the Invention

[0009] One of the effects of the present invention is that it is possible to provide a printed circuit board capable of ensuring a margin in the exposure process.

[0010] Another one of the effects of the present invention is that it is possible to provide a printed circuit board capable of improving the circuit integration degree.

Brief Description of the Drawings

[0011]

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Best Mode for Carrying Out the Invention

[0012] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. The shape, size, etc. of elements in the drawings can be exaggerated or reduced for a clearer explanation.

[0013] FIG. 1 is a block diagram schematically showing an example of an electronic device system. Referring to FIG. 1, the electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are also coupled to other electronic components described later to form various signal lines 1090.

[0014] Examples of the chip-related components 1020 include memory chips such as volatile memories (e.g., DRAM), non-volatile memories (e.g., ROM), and flash memories; application processor chips such as central processors (e.g., CPU), graphics processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). However, the invention is not limited thereto, and other forms of chip-related components may be included. Further, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the above-described chips.

[0015] Examples of the network-related component 1030 include, but are not limited to, Wi-Fi (registered trademark) (such as the IEEE 802.11 family), WiMAX (such as the IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM (registered trademark), GPS, GPRS, CDMA, TDMA, DECT, Bluetooth (registered trademark), 3G, 4G, 5G, and any other wireless and wired protocols specified for those and later generations. In addition to these, any of a number of other wireless or wired standards and protocols may also be included. Also, the network-related component 1030 can be provided in the form of a package in combination with the chip-related component 1020.

[0016] Examples of the other component 1040 include, but are not limited to, high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (Low Temperature Co-Firing Ceramics), EMI (Electro Magnetic Interference) filters, MLCC (Multi-Layer Ceramic Condensers), etc. In addition to these, passive components in the form of chip components used for various other applications may also be included. Also, the other component 1040 can be provided in the form of a package in combination with the chip-related component 1020 and / or the network-related component 1030.

[0017] Depending on the type of the electronic device 1000, the electronic device 1000 can include other electronic components that are physically and / or electrically connected or not connected to the main board 1010. Examples of other electronic components include, for example, a camera 1050, an antenna 1060, a display 1070, a battery 1080, etc. However, it is not limited thereto, and it may be an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a CD (compact disk), a DVD (digital versatile disk), etc. Also, needless to say, other components used for various purposes according to the type of the electronic device 1000 may be included in addition to these.

[0018] The electronic device 1000 can be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an Automotive, etc. However, it is not limited thereto, and needless to say, it may be any other electronic device that processes data in addition to these.

[0019] FIG. 2 is a perspective view schematically showing an example of an electronic device. Referring to FIG. 2, the electronic device may be, for example, a smartphone 1100. Inside the smartphone 1100, a main board 1110 is accommodated, and various electronic components 1120 are physically and / or electrically connected to such main board 1110. Also, a camera module 1130 and / or a speaker 1140 etc. are accommodated inside. Some of the electronic components 1120 can be the chip-related components described above, and for example, may be an electronic component package 1121 in which a plurality of electronic components are mounted on a package substrate, but is not limited thereto. On the other hand, the electronic device is not necessarily limited to the smartphone 1100, and as described above, it goes without saying that it may be other electronic devices.

[0020] FIG. 3 is a cross-sectional view schematically showing an example of a printed circuit board. Referring to FIG. 3, a printed circuit board 100A according to an example includes an insulating layer 111 and a circuit layer 121 disposed on the insulating layer 111. The circuit layer 121 includes a first circuit pattern 121a and a second circuit pattern 121b. The first circuit pattern 121a has, in cross-section, a first side surface 121a1, a second side surface 121a2 opposite to the first side surface 121a1, and a top surface 121a3 connected to the respective tips of the first and second side surfaces 121a1, 121a2. The second circuit pattern 121b also has, in cross-section, a first side surface 121b1, a second side surface 121b2 opposite to the first side surface 121b1, and a top surface 121b3 connected to the respective tips of the first and second side surfaces 121b1, 121b2. The first circuit pattern 121a and the second circuit pattern 121b can form a pair of approximately symmetric fine circuit portions 121ab, and the circuit layer 121 can include a plurality of such fine circuit portions 121ab.

[0021] In the microcircuit portion 121ab, the first circuit pattern 121a and the second circuit pattern 121b can be arranged such that their respective first side surfaces 121a1 and 121b1 face each other. The first circuit pattern 121a can have a round shape in which the height of the first side surface 121a1 is higher than the height of the second side surface 121a2, and the height of the top surface 121a3 gradually decreases from the tip of the first side surface 121a1 to the tip of the second side surface 121a2. The second circuit pattern 121b can also have a round shape in which the height of the first side surface 121b1 is greater than the height of the second side surface 121b2, and the height of the top surface 121b3 gradually decreases from the tip of the first side surface 121b1 to the tip of the second side surface 121b2.

[0022] The insulating layer 111 can have a groove portion 111g between the microcircuit portions 121ab. Such a groove portion 111g may not be formed between the first circuit pattern 121a and the second circuit pattern 121b of each microcircuit portion 121ab. Thus, the groove portion 111g may be recessed toward the lower surface of the insulating layer 111 with respect to the upper surface of the insulating layer 111 between the first circuit pattern 121a and the second circuit pattern 121b of each microcircuit portion 121ab.

[0023] As can be understood from the steps described later, the microcircuit portion 121ab including the first circuit pattern 121a and the second circuit pattern 121b having such a structure can be formed through a spacer process and an anisotropic etching process. In this case, as described later, even if the photosensitive material is exposed with the line-to-space ratio in a one-to-many relationship, as a result, a fine circuit pattern in which the lines and spaces are approximately one-to-one can be realized, so that a margin for the exposure process can be ensured. Thereby, the circuit integration degree can be improved.

[0024] Hereinafter, with reference to the accompanying drawings, the components of the printed circuit board 100A according to an example will be further described.

[0025] As the material of the insulating layer 111, an insulating material can be used. As the insulating material, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, and those containing an inorganic filler such as silica and / or a reinforcing material such as glass fiber in these resins can be used. For example, CCL (Copper Clad Laminate), PPG (Prepreg), ABF (Ajinomoto Build-up Film), etc. can be used. However, it is not limited thereto, and in addition to such non-photosensitive insulating materials, a photosensitive insulating material such as PID (Photo Imageable Dielectric) can also be used. If necessary, an inorganic material such as ceramic can also be used as the material of the insulating layer 111.

[0026] As the material of the circuit layer 121, a metal material can be used. As the metal material, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof can be used. For example, the first and second circuit patterns 121a, 121b can contain copper (Cu). The fine circuit portions 121ab of the circuit layer 121, that is, the first and second circuit patterns 121a, 121b can each perform various functions according to the design. For example, it can include a ground pattern, a power pattern, a signal pattern, etc. These patterns can each have a linear shape. For example, the first and second circuit patterns 121a, 121b can each be linear, and in the drawing, a cross-section may be shown such that the line widths of such linear first and second circuit patterns 121a, 121b and the intervals between the lines, that is, the line and space, are shown.

[0027] FIG. 4 and FIG. 5 are process diagrams schematically showing an example of the manufacture of the printed circuit board of FIG. 3. Referring to FIG. 4, first, an insulating layer 111 is provided. Next, a patterned dry film 210 is disposed on the insulating layer 111. The dry film 210 can contain a photosensitive material. The dry film 210 can be patterned such that the ratio of the line x1 to the space x2 is approximately a one-to-many relationship, for example, about 1:3. Next, a pattern plating layer 121p is formed so as to cover the patterned dry film 210 on the insulating layer 111. The pattern plating layer 121p can be formed through an isotropic plating process such as electroless plating.

[0028] Referring to FIG. 5, next, an anisotropic etching process is performed. The anisotropic etching process can be performed using a dry etching process. As the anisotropic etching process proceeds, a plurality of fine circuit portions 121ab each including a pair of first and second circuit patterns 121a and 121b are formed. At this time, groove portions 111g can be formed in the region of the insulating layer 111 between the fine circuit portions 121ab where the dry film 210 does not exist. Next, when the dry film 210 is peeled off, the first and second circuit patterns 121a and 121b having a line-to-space ratio of approximately 1:1, and the fine circuit portion 121ab including the same can be obtained. Through a series of processes, the printed circuit board 100A according to the above-described example can be manufactured.

[0029] FIG. 6 is a cross-sectional view schematically showing another example of a printed circuit board. Referring to FIG. 6, a printed circuit board 100B according to another example is different from the printed circuit board 100A described above in that the circuit layers 121 and 122 are composed of multiple layers. For electrical connection between such multi-layer circuit layers 121 and 122, the circuit layers 121 and 122 further include pad patterns 121vp and 122vp respectively, and via patterns 131 and 132 connected to the pad patterns 121vp and 122vp are formed in the respective insulating layers 111 and 112. For example, a printed circuit board 100B according to another example can include a first insulating layer 111, a first circuit layer 121 disposed on the first insulating layer 111, a first via pattern 131 penetrating the first insulating layer 111, a second insulating layer 112 disposed on the first insulating layer 111 and covering the first circuit layer 121, a second circuit layer 122 disposed on the second insulating layer 112, and a second via pattern 132 penetrating the second insulating layer 112. At this time, the first circuit layer 121 can include first and second circuit patterns 121a and 121b and a first pad pattern 121vp, and the second circuit layer 122 can include third and fourth circuit patterns 122a and 122b and a second pad pattern 122vp. The first via pattern 131 can be connected to the first pad pattern 121vp, and the second via pattern 132 can be connected to the first and second pad patterns 121vp and 122vp.

[0030] In the process described below, the second pad pattern 122vp can be characterized by including a first region R1 that integrates without a boundary with the second via pattern 132, and a second region R2 that surrounds the first region R1 and has a boundary with the first region R1. Similarly, the first pad pattern 121vp can also have such first and second regions in relation to the first via pattern 131. The first and second circuit patterns 121a, 121b can form a pair of approximately symmetric first fine circuit portions 121ab. A first groove portion 111g1 can be formed in the first insulating layer 111 between the first fine circuit portions 121ab. Additionally, a second groove portion 111g2 can be formed in the first insulating layer 111 between the first pad patterns 121vp, and a third groove portion 111g3 can be formed in the first insulating layer 111 between the first fine circuit portion 121ab and the first pad pattern 121vp. Similarly, the third and fourth circuit patterns 122a, 122b can form a pair of approximately symmetric second fine circuit portions 122ab. A fourth groove portion 112g1 can be formed in the second insulating layer 112 between the second fine circuit portions 122ab. Additionally, a fifth groove portion 112g2 can be formed in the second insulating layer 112 between the second pad patterns 122vp, and a sixth groove portion 112g3 can be formed in the second insulating layer 112 between the second fine circuit portion 122ab and the second pad pattern 122vp. The shapes and arrangements of the first and second circuit patterns 121a, 121b are as described above, and the shapes and arrangements of the third and fourth circuit patterns 122a, 122b are similar.

[0031] Hereinafter, with reference to the accompanying drawings, the components of a printed circuit board 100B according to another example will be further described.

[0032] As the materials for the first and second insulating layers 111 and 112, insulating materials can be used. As the insulating materials, thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, and those containing inorganic fillers such as silica and / or reinforcing materials such as glass fibers in these resins, for example, CCL, PPG, ABF, etc. can be used. However, it is not limited thereto, and in addition to such non-photosensitive insulating materials, photosensitive insulating materials such as PID can also be used. If necessary, inorganic materials such as ceramics can also be used as the materials for the first and second insulating layers 111 and 112.

[0033] As the materials for the first and second circuit layers 121 and 122, metal materials can be used. As the metal materials, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof can be used. For example, the first and second circuit patterns 121a and 121b and the first pad pattern 121vp can contain copper (Cu). Also, the third and fourth circuit patterns 122a and 122b and the second pad pattern 122vp can also contain copper (Cu). The first and second fine circuit portions 121ab and 122ab of the first and second circuit layers 121 and 122, that is, the first and second circuit patterns 121a and 121b and the third and fourth circuit patterns 122a and 122b can each perform various functions according to the design. For example, it can include a ground pattern, a power pattern, a signal pattern, etc. These patterns can each have a linear shape. For example, the first and second circuit patterns 121a and 121b and the third and fourth circuit patterns 122a and 122b can each be linear. In the drawing, a cross-section may be shown such that the line widths and the intervals between the lines of such linear first and second circuit patterns 121a and 121b and third and fourth circuit patterns 122a and 122b, that is, the lines and spaces, are shown. On the other hand, the first and second pad patterns 121vp and 122vp can also be pad patterns for various purposes, such as a ground pad pattern, a power pad pattern, a signal pad pattern, etc.

[0034] As the materials for the first and second via patterns 131 and 132, a metal material can be used. As the metal material, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof can be used. For example, the first and second via patterns 131 and 132 can contain copper (Cu). The first and second via patterns 131 and 132 can each include signal vias, ground vias, power vias, etc. according to the design. The first and second via patterns 131 and 132 can be in a form filled with a metal material. The first and second via patterns 131 and 132 can have a tapered shape.

[0035] Figures 7 to 9 are process diagrams schematically showing an example of manufacturing the printed circuit board of Figure 6. Referring to Figure 7, first, the first circuit layer 121 and the first via pattern 131 are formed on the first insulating layer 111, and the second insulating layer 112 is formed on the first insulating layer 111. Since the method of forming the first circuit layer 121 and the first via pattern 131 is the same as the method of forming the second circuit layer 122 and the second via pattern 132 described later, a detailed description is omitted. Then, a via hole 112vh for exposing the first pad pattern 121vp is formed in the second insulating layer 112. The via hole 112vh may be formed by a mechanical drill and / or a laser drill, etc. according to the material of the second insulating layer 112, or may be formed by a photolithography process, etc. Next, a dry film 310 for via pads having an opening 310ph for exposing the via hole 112vh is formed on the second insulating layer 112. The dry film 310 for via pads can contain a photosensitive material. Next, an electrolytic plating, etc. is used to fill the via hole 112vh of the second insulating layer 112 and the opening 310ph of the dry film 310 for via pads to form a via plating layer 132p.

[0036] Referring to FIG. 8, next, the driver film 310 for the via pad is peeled off. Next, the patterned driver film 220 is disposed on the second insulating layer 112. The driver film 220 can contain a photosensitive material. As described above, the driver film 220 can be patterned such that the ratio of line to space is approximately one-to-many, for example, about 1:3. Next, a pattern plating layer 122p is formed so as to cover the patterned driver film 220 on the second insulating layer 112. The pattern plating layer 122p can be formed through an isotropic plating process such as electroless plating.

[0037] Referring to FIG. 9, next, an anisotropic etching process is performed. The anisotropic etching process can be performed using a dry etching process. As the anisotropic etching process proceeds, a plurality of fine circuit portions 122ab each including a pair of third and fourth circuit patterns 122a, 122b are formed. Also, a plurality of second pad patterns 122vp are formed. In addition, a second via pattern 132 is formed. The second pad pattern 122vp can include a part of the via plating layer 132p and a part of the pattern plating layer 122p. Fourth to sixth groove portions 112g1, 112g2, 112g3 can be formed in the region of the second insulating layer 112 between the fine circuit portions 122ab where the driver film 220 does not exist, in the region of the second insulating layer 112 between the second pad patterns 122vp, and in the region of the second insulating layer 112 between the fine circuit portion 122ab and the second pad pattern 122vp. Next, when the driver film 220 is peeled off, the third and fourth circuit patterns 122a, 122b in which the line and space are approximately 1:1, and the fine circuit portion 122ab including the same can be obtained. Through a series of processes, the printed circuit board 100B according to another example described above can be manufactured.

[0038] FIG. 10 is a cross-sectional view schematically showing another example of the printed circuit board. Referring to FIG. 10, a printed circuit board 100C according to another example is different from the printed circuit board 100A according to the above-described example in that the circuit layer 121 further includes a third pad pattern 121c in addition to the first and second circuit patterns 121a and 121b. As described above, the first and second circuit patterns 121a and 121b are arranged such that their sides face each other to form a pair of fine circuit portions 121ab, and the third circuit pattern 121c is arranged independently of this. The third circuit pattern 121c is a circuit pattern formed through a plating process such as general SAP or MSAP, and has a larger line width and height than each of the first and second circuit patterns 121a and 121b, which are fine circuit patterns.

[0039] In the process described later, since the first and second circuit patterns 121a and 121b can include only an isotropic plating layer such as electroless plating, they are characterized in that they are arranged without a seed layer. On the other hand, since the third circuit pattern 121c can include an electrolytic plating layer formed on the isotropic plating layer, it can include a seed layer S. That is, the number of metal layers constituting the third circuit pattern 121c may be larger than the number of metal layers constituting each of the first and second circuit patterns 121a and 121b. The first and second circuit patterns 121a and 121b can form a pair of fine circuit portions 121ab, and the circuit layer 121 can include a plurality of fine circuit portions 121ab. Also, the circuit layer 121 can include a plurality of third circuit patterns 121c. The interval between the first and second circuit patterns 121a and 121b of each of the plurality of fine circuit portions 121ab may be smaller than the interval between the plurality of third circuit patterns 121c, and the interval between the plurality of fine circuit portions 121ab may also be smaller than the interval between the plurality of third circuit patterns 121c. A first groove portion 111g1 can be formed in the insulating layer 111 between the fine circuit portions 121ab. Also, a second groove portion 111g2 can be formed in the insulating layer 111 between the third circuit patterns 121c, and a third groove portion 111g3 can be formed in the insulating layer 111 between the fine circuit portion 121ab and the third circuit pattern 121c. The shapes and arrangements of the first and second circuit patterns 121a and 121b are as described above.

[0040] Hereinafter, with reference to the attached drawings, the components of the printed circuit board 100C according to another example will be further described.

[0041] As the material of the circuit layer 121, a metal material can be used. As the metal material, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof can be used. For example, the first and second circuit patterns 121a and 121b and the third circuit pattern 121c can contain copper (Cu). The first and second circuit patterns 121a and 121b and the third circuit pattern 121c of the circuit layer 121 can each perform various functions according to the design. For example, it can include a ground pattern, a power pattern, a signal pattern, etc. These patterns can each have a form such as a line or a pad. For example, the first and second circuit patterns 121a and 121b and the third circuit pattern 121c can each be in a line shape. In the drawing, a cross-section may be shown such that the line widths and the intervals between the lines of such line-shaped first and second circuit patterns 121a and 121b and the third circuit pattern 121c, that is, the lines and the spaces, are shown.

[0042] FIG. 11 and FIG. 12 are process diagrams schematically showing an example of the manufacture of the printed circuit board of FIG. 10. Referring to FIG. 11, first, an insulating layer 111 is provided. After disposing a patterned first dry film 210 on the insulating layer 111, a first patterned plating layer 121p1 is formed to cover the first dry film 210. The detailed description of this is as described above. Next, a second dry film 320 having an opening 320ph is disposed on the first patterned plating layer 121p1. The second dry film 320 can also contain a photosensitive material. Next, a second patterned plating layer 121p2 is formed by filling the opening 320ph of the second dry film 320 through electrolytic plating or the like. At this time, the first patterned plating layer 121p1 can function as a seed layer.

[0043] Referring to FIG. 12, next, the second dry film 320 is peeled off. Next, an anisotropic etching process is performed. The anisotropic etching process can be performed using a dry etching process. As the anisotropic etching process progresses, a plurality of fine circuit portions 121ab each including a pair of first and second circuit patterns 121a and 121b are formed. Also, a plurality of third circuit patterns 121c each including a seed layer S are formed. At this time, first to third groove portions 111g1, 111g2, and 111g3 can be formed in the regions of the insulating layer 111 between the fine circuit portions 121ab where the first dry film 210 does not exist, the regions of the insulating layer 111 between the third circuit patterns 121c, and the regions of the insulating layer 111 between the fine circuit portions 121ab and the third circuit patterns 121c, respectively. Next, when the first dry film 210 is peeled off, the first and second circuit patterns 121a and 121b, and the fine circuit portions 121ab including the same, with a line-to-space ratio of approximately 1:1, can be obtained. Through a series of processes, the printed circuit board 100C according to another example described above can be manufactured.

[0044] FIG. 13 is a cross-sectional view schematically showing another example of a printed circuit board. Referring to FIG. 13, a printed circuit board 100D according to another example is different from the printed circuit board 100C according to another example described above in that the circuit layers 121 and 122 are composed of multiple layers. For electrical connection between such multiple circuit layers 121 and 122, via patterns 131 and 132 are formed in the respective insulating layers 111 and 112. For example, the printed circuit board 100D according to another example can include a first insulating layer 111, a first circuit layer 121 disposed on the first insulating layer 111, a first via pattern 131 penetrating the first insulating layer 111, a second insulating layer 112 disposed on the first insulating layer 111 and covering the first circuit layer 121, a second circuit layer 122 disposed on the second insulating layer 112, and a second via pattern 132 penetrating the second insulating layer 112. At this time, the first circuit layer 121 can include first and second circuit patterns 121a, 121b and a third circuit pattern 121c, and the second circuit layer 122 can include fourth and fifth circuit patterns 122a, 122b and a sixth circuit pattern 122c. The first via pattern 131 can be connected to the third circuit pattern 121c, and the second via pattern 132 can be connected to the third and sixth circuit patterns 121c, 122c.

[0045] In the processes described below, at least one of the third circuit patterns 121c can be integrated with the first via pattern 131 and can include the first seed layer S1. Similarly, at least one of the sixth circuit patterns 122c can be integrated with the second via pattern 132 and can include the second seed layer S2. The first and second circuit patterns 121a and 121b can form a pair of approximately symmetric first microcircuit portions 121ab. A first groove portion 111g1 can be formed in the first insulating layer 111 between the first microcircuit portions 121ab. Additionally, a second groove portion 111g2 can be formed in the first insulating layer 111 between the third circuit patterns 121c, and a third groove portion 111g3 can be formed in the first insulating layer 111 between the first microcircuit portion 121ab and the third circuit pattern 121c. Similarly, the fourth and fifth circuit patterns 122a and 122b can form a pair of approximately symmetric second microcircuit portions 122ab. A fourth groove portion 112g1 can be formed in the second insulating layer 112 between the second microcircuit portions 122ab. Additionally, a fifth groove portion 112g2 can be formed in the second insulating layer 112 between the sixth circuit patterns 122c, and a sixth groove portion 112g3 can be formed in the second insulating layer 112 between the second microcircuit portion 122ab and the sixth circuit pattern 122c. The shapes and arrangements of the first to third circuit patterns 121a, 121b, and 121c are as described above, and the shapes and arrangements of the fourth to sixth circuit patterns 122a, 122b, and 122c are the same.

[0046] Hereinafter, with reference to the accompanying drawings, the components of a printed circuit board 100D according to another example will be further described.

[0047] As the materials for the first and second insulating layers 111 and 112, insulating materials can be used. As the insulating materials, thermosetting resins such as epoxy resins, thermoplastic resins such as polyimides, and those containing inorganic fillers such as silica and / or reinforcing materials such as glass fibers in these resins can be used. For example, CCL, PPG, ABF, etc. can be used. However, it is not limited thereto, and in addition to such non-photosensitive insulating materials, photosensitive insulating materials such as PID can also be used. If necessary, inorganic materials such as ceramics can also be used as the materials for the first and second insulating layers 111 and 112.

[0048] As the materials for the first and second circuit layers 121 and 122, metal materials can be used. As the metal materials, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof can be used. For example, the first and second circuit patterns 121a and 121b and the third circuit pattern 121c can contain copper (Cu). Also, the fourth and fifth circuit patterns 122a and 122b and the sixth circuit pattern 122c can also contain copper (Cu). The first and second circuit patterns 121a and 121b and the third circuit pattern 121c, and also the fourth and fifth circuit patterns 122a and 122b and the sixth circuit pattern 122c can each perform various functions according to the design. For example, they can include a ground pattern, a power pattern, a signal pattern, etc. These patterns can each have a form such as a line or a pad. For example, the first and second circuit patterns 121a and 121b and the third circuit pattern 121c, and also the fourth and fifth circuit patterns 122a and 122b and the sixth circuit pattern 122c can each be linear. In the drawing, a cross-section may be shown such that the line widths and the intervals between the lines, that is, the lines and spaces of such linear first and second circuit patterns 121a and 121b and the third circuit pattern 121c, and also the fourth and fifth circuit patterns 122a and 122b and the sixth circuit pattern 122c are shown.

[0049] As the material of the first and second via patterns 131 and 132, a metal material can be used. As the metal material, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof can be used. For example, the first and second via patterns 131 and 132 can contain copper (Cu). The first and second via patterns 131 and 132 can each include a signal via, a ground via, a power via, etc., according to the design. The first and second via patterns 131 and 132 can be in a form filled with a metal material. The first and second via patterns 131 and 132 can have a tapered shape.

[0050] Figs. 14 to 17 are process diagrams schematically showing an example of manufacturing the printed circuit board of Fig. 13. Referring to Fig. 14, first, a patterned first dry film 210 is disposed on the first insulating layer 111. The description of the first dry film 210 is as described above. Also, a first via hole 111vh is formed in the first insulating layer 111. The first via hole 111vh can be formed by a mechanical drill and / or a laser drill, etc., according to the material of the first insulating layer 111, or can be formed by a photolithography process, etc. Next, a first patterned plating layer 121p1 is formed on the first insulating layer 111 so as to cover the first dry film 210. The first patterned plating layer 121p1 can also be disposed on the wall surface of the first via hole 111vh. The first patterned plating layer 121p1 can be formed through an isotropic plating process such as electroless plating. Next, a second dry film 320 having an opening 320ph is disposed on the first patterned plating layer 121p1. The second dry film 320 can also contain a photosensitive material.

[0051] Referring to FIG. 15, next, the second pattern plating layer 121p2 is formed by filling the opening 320ph of the second dry film 320 through electrolytic plating or the like. The second pattern plating layer 121p2 can also fill the first via hole 111vh. At this time, the first pattern plating layer 121p1 can function as a seed layer. Next, the second dry film 320 is peeled off. Next, an anisotropic etching process is performed. The anisotropic etching process can be performed using a dry etching process.

[0052] Referring to FIG. 16, when the anisotropic etching process progresses, a plurality of fine circuit portions 121ab each including a pair of first and second circuit patterns 121a, 121b are formed. Also, a plurality of third circuit patterns 121c including the seed layer S are formed. In addition, a first via pattern 131 connected to the third circuit pattern 121c is formed. At this time, in the region of the first insulating layer 111 between the fine circuit portions 121ab where the first dry film 210 does not exist, the region of the first insulating layer 111 between the third circuit patterns 121c, and the region of the first insulating layer 111 between the fine circuit portion 121ab and the third circuit pattern 121c, first to third groove portions 111g1, 111g2, 111g3 can be formed respectively. Next, when the first dry film 210 is peeled off, the first and second circuit patterns 121a, 121b, and the fine circuit portion 121ab including the same, with a line-to-space ratio of approximately 1:1, can be obtained. Next, a second insulating layer 112 is formed on the first insulating layer 111.

[0053] Referring to FIG. 17, next, a second via hole 112vh is formed in the second insulating layer 112. The second via hole 112vh may be formed by a mechanical drill and / or a laser drill, etc., according to the material of the second insulating layer 112, or may be formed by a photolithography process, etc. Next, a patterned third dry film 220 is disposed on the second insulating layer 112. The description of the third dry film 220 is the same as the description of the first dry film 210 described above. Next, the process described with reference to FIGS. 14 to 16 is repeated. Through a series of processes, the printed circuit board 100D according to another example described above can be manufactured.

[0054] FIG. 18 is a cross-sectional view schematically showing another example of a printed circuit board. The printed circuit board 100E according to another example is different from the printed circuit board 100A according to the above-described example in that the top surfaces of the first and second circuit patterns 121a and 121b each have an inflection point. Such an inflection point can be formed by performing an etching process on a part of the top surfaces of the first and second circuit patterns 121a and 121b. For example, the top surface of the first circuit pattern 121a can have a first top surface 121a3-1 whose height gradually increases from the tip of the first side surface described above to the inflection point, and a second top surface 121a3-2 whose height gradually decreases from the inflection point to the tip of the second side surface described above. Also, the top surface of the second circuit pattern 121b can have a first top surface 121b3-1 whose height gradually increases from the tip of the first side surface described above to the inflection point, and a second top surface 121b3-2 whose height gradually decreases from the inflection point to the tip of the second side surface described above. The rest is as described above.

[0055] FIG. 19 is a cross-sectional view schematically showing another example of a printed circuit board. Another example of the printed circuit board 100F is different from the printed circuit board 100B according to the above-described example in that the top surfaces of the first and second circuit patterns 121a and 121b and the third and fourth circuit patterns 122a and 122b each have an inflection point. Such an inflection point can be formed by performing an etching process on a part of the top surfaces of the first and second circuit patterns 121a and 121b and the third and fourth circuit patterns 122a and 122b. For example, the top surface of the first circuit pattern 121a can have a first top surface 121a3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 121a3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. Also, the top surface of the second circuit pattern 121b can have a first top surface 121b3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 121b3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. The rest is as described above. Similarly, the top surface of the third circuit pattern 122a can have a first top surface 122a3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 122a3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. Also, the top surface of the fourth circuit pattern 122b can have a first top surface 122b3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 122b3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. The rest is as described above.

[0056] FIG. 20 is a cross-sectional view schematically showing another example of the printed circuit board. Another example of the printed circuit board 100G is different from the printed circuit board 100C according to the above-described example in that the top surfaces of the first and second circuit patterns 121a and 121b each have an inflection point. Such an inflection point can be formed by performing an etching process on a part of the top surfaces of the first and second circuit patterns 121a and 121b. For example, the top surface of the first circuit pattern 121a can have a first top surface 121a3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 121a3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. Also, the top surface of the second circuit pattern 121b can have a first top surface 121b3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 121b3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. The rest is as described above.

[0057] FIG. 21 is a cross-sectional view schematically showing another example of the printed circuit board. A printed circuit board 100H according to another example is different from the printed circuit board 100D according to the above-described example in that the top surfaces of the first and second circuit patterns 121a and 121b and the fourth and fifth circuit patterns 122a and 122b each have an inflection point. Such an inflection point can be formed by performing an etching process on a part of the top surfaces of the first and second circuit patterns 121a and 121b and the fourth and fifth circuit patterns 122a and 122b. For example, the top surface of the first circuit pattern 121a can have a first top surface 121a3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 121a3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. Also, the top surface of the second circuit pattern 121b can have a first top surface 121b3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 121b3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. The rest is as described above. Similarly, the top surface of the fourth circuit pattern 122a can have a first top surface 122a3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 122a3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. Also, the top surface of the fifth circuit pattern 122b can have a first top surface 122b3-1 in which the height from the tip of the first side surface described above to the inflection point gradually increases, and a second top surface 122b3-2 in which the height from the inflection point to the tip of the second side surface described above gradually decreases. The rest is as described above.

[0058] FIG. 22 is a cross-sectional view schematically showing an example of an electronic component package. Referring to FIG. 22, an example of an electronic component package 500 includes a package substrate 450, a connection structure 480 disposed within the package substrate 450, and a plurality of electronic components 410, 420 disposed on the package substrate 450 and electrically connected to each other via the connection structure 480. The package substrate 450 may be a known BGA (Ball Grid Array) substrate. The connection structure 480 may be a substrate having a microcircuit, and at least one of the above-described printed circuit boards 100A to 100H can be applied to such a substrate. Each of the plurality of electronic components 410, 420 may be a logic chip or a memory chip. Thus, the above-described printed circuit boards 100A to 100H can be applied to substrates that require microcircuits.

[0059] In the present invention, expressions such as "side portion" and "side surface" are used, for convenience, to mean the left / right direction or the surface in that direction with reference to the drawing, and expressions such as "upper side", "upper portion", and "upper surface" are used, for convenience, to mean the upper direction or the surface in that direction with reference to the drawing, and expressions such as "lower side", "lower portion", and "lower surface" are used, for convenience, to mean the lower direction or the surface in that direction. In addition, "located on the side portion, upper side, upper portion, lower side, or lower portion" is used as a concept that includes not only the case where the target component is in direct contact with the reference component and the corresponding direction of the component, but also the case where the target component is located in the corresponding direction of the component and is not in direct contact. However, this is for the convenience of explanation and defines the direction, and the scope of the claims is not particularly limited by the description of the direction, and concepts such as the upper / lower concept can change at any time.

[0060] In the present invention, the term "connected" includes not only the case of direct connection but also the case of indirect connection via an adhesive layer or the like. Further, the term "electrically connected" includes both the case of physical connection and the case of non-connection. Note that expressions such as "first" and "second" are used to distinguish one component from another component, and do not limit the order and / or importance of the corresponding components. In some cases, without departing from the scope of the present invention, the first component can be named the second component, and similarly, the second component can be named the first component.

[0061] The expressions "one example" or "another example" used in the present invention do not mean the same embodiment, but are provided to emphasize and explain each different unique feature. However, the above-provided one example does not exclude the combination with the features of another example. For example, even if a matter described in a specific one example is not described in another example, it can be understood as an explanation related to another example as long as there is no explanation contrary to or conflicting with that matter in another example.

[0062] Note that the terms used in the present invention are only described for the purpose of explaining an example and are not intended to limit the present invention. At this time, the singular expression includes the plural unless the context clearly indicates a different meaning. The content of the present invention includes the following items. [Item 1] A first insulating layer, and A first circuit layer disposed on the first insulating layer, including A first and a second circuit pattern arranged in a pair such that their sides face each other, and a third circuit pattern arranged independently of the first and second circuit patterns, The third circuit pattern has a larger line width than each of the first and second circuit patterns, a printed circuit board. [Item 2] The third circuit pattern has a greater height than each of the first and second circuit patterns, the printed circuit board according to Item 1. [Item 3] The first and second circuit patterns are arranged without a seed layer, The third circuit pattern includes a seed layer, the printed circuit board according to Item 1 or 2. [Item 4] The first and second circuit patterns form a pair of fine circuit parts, The circuit layer includes a plurality of the fine circuit parts, The circuit layer includes a plurality of the third circuit patterns, the printed circuit board according to any one of Items 1 to 3. [Item 5] The interval between the first and second circuit patterns of each of the plurality of fine circuit parts is smaller than the interval between the plurality of third circuit patterns, and the interval between the plurality of fine circuit parts is smaller than the interval between the plurality of third circuit patterns, the printed circuit board according to Item 4. [Item 6] A second insulating layer disposed on the first insulating layer and covering the first circuit layer, and A second circuit layer disposed on the second insulating layer, further including A fourth and a fifth circuit pattern arranged in a pair such that their sides face each other, and a sixth circuit pattern arranged independently of the fourth and fifth circuit patterns, The sixth circuit pattern has a larger line width than each of the fourth and fifth circuit patterns, the printed circuit board according to any one of Items 1 to 5. [Item 7] Further including a via pattern penetrating the second insulating layer, The third and sixth circuit patterns are connected via the via pattern, The sixth circuit pattern integrates with the via pattern without a boundary, the printed circuit board according to Item 6.

Claims

1. a first insulating layer, a first circuit layer disposed on the first insulating layer, and the first circuit layer includes first and second circuit patterns, the first and second circuit patterns each have, in a cross-section, a first side surface, a second side surface opposite to the first side surface, and a top surface connected to respective tips of the first and second side surfaces, the first side surfaces of the first and second circuit patterns are arranged to face each other, and a height of the first side surfaces of the first and second circuit patterns is higher than a height of the second side surfaces of the first and second circuit patterns, the first and second circuit patterns constitute a pair of fine circuit portions, the first circuit layer includes a plurality of the fine circuit portions, the first insulating layer between the plurality of fine circuit portions is exposed, a printed circuit board.

2. A first insulating layer, a first circuit layer disposed on the first insulating layer, and the first circuit layer includes first and second circuit patterns, the first and second circuit patterns each have, in a cross-section, a first side surface, a second side surface opposite to the first side surface, and a top surface connected to respective tips of the first and second side surfaces, the first side surfaces of the first and second circuit patterns are arranged to face each other, and a height of the first side surfaces of the first and second circuit patterns is higher than a height of the second side surfaces of the first and second circuit patterns, the first and second circuit patterns constitute a pair of fine circuit portions, the first circuit layer includes a plurality of the fine circuit portions, the first insulating layer has groove portions between the plurality of fine circuit portions, a printed circuit board.

3. The groove portion recesses toward a lower surface of the first insulating layer with reference to an upper surface of the first insulating layer between the first and second circuit patterns, the printed circuit board according to claim 2.

4. The top surfaces of the first and second circuit patterns each have a round shape in which a height gradually decreases from a tip of the first side surface of the first and second circuit patterns to a tip of the second side surface of the first and second circuit patterns, the printed circuit board according to any one of claims 1 to 3.

5. The top surfaces of the first and second circuit patterns each have an inflection point, The top surfaces of the first and second circuit patterns each have a first top surface with a height that gradually increases from the tip of the first side surface of each of the first and second circuit patterns to the inflection point of each of the first and second circuit patterns, and a second top surface with a height that gradually decreases from the inflection point of each of the first and second circuit patterns to the tip of the second side surface of each of the first and second circuit patterns. The printed circuit board according to any one of claims 1 to 3.

6. A first insulating layer, A first circuit layer disposed on the first insulating layer, The first circuit layer includes first and second circuit patterns, The first and second circuit patterns each have, in cross-section, a first side surface, a second side surface opposite to the first side surface, and a top surface connected to the tips of the first and second side surfaces respectively. The first side surfaces of the first and second circuit patterns are arranged to face each other, and the height of the first side surface of each of the first and second circuit patterns is higher than the height of the second side surface of each of the first and second circuit patterns. A second insulating layer disposed on the first insulating layer and covering the first circuit layer, A second circuit layer disposed on the second insulating layer, The second circuit layer includes third and fourth circuit patterns, The third and fourth circuit patterns each have, in cross-section, a first side surface, a second side surface opposite to the first side surface, and a top surface connected to the tips of the first and second side surfaces respectively. The first side surfaces of the third and fourth circuit patterns are arranged to face each other, The height of the first side surface of each of the third and fourth circuit patterns is greater than the height of the second side surface of each of the third and fourth circuit patterns. The printed circuit board.

7. Further including a via pattern penetrating the second insulating layer, The first and second circuit layers each further include first and second pad patterns, The first and second pad patterns are connected via the via pattern, The second pad pattern includes a first region that integrates with the via pattern without a boundary, and a second region that surrounds the first region and has a boundary with the first region. The printed circuit board according to claim 6.

8. The printed circuit board according to any one of claims 1 to 7, wherein the first and second circuit patterns each contain a metal material.

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