Display device

Abstract

To provide a semiconductor device including a capacitor element with larger charge capacity without reducing an opening ratio.SOLUTION: A capacitor element includes a transistor including a semiconductor film with a light-transmitting property, and a dielectric film provided between a pair of electrodes. The pair of electrodes and the dielectric film are formed of a material with a light-transmitting property. One of the pair of electrodes uses a semiconductor film formed on the same surface as the semiconductor film of the transistor. As the dielectric film forming the capacitor element, a gate insulating film is used. The other of the pair of electrodes is formed using a semiconductor film with a light-transmitting property or a conductive film with a light-transmitting property.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The invention disclosed in this specification and the like relates to a semiconductor device.

[0002] In this specification, a semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics. This includes transistors, semiconductor circuits, memory devices, imaging devices, display devices, electro-optical devices and electronic equipment, all of which can be said to be semiconductor devices.

Background Art

[0003] In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widely popular. In a display device such as a flat panel display, a transistor as a switching element, a liquid crystal element electrically connected to the transistor, and a capacitor element connected in parallel with the liquid crystal element are provided in pixels arranged in the row direction and the column direction. .

[0004] As the semiconductor material constituting the semiconductor film of the transistor, silicon semiconductors such as amorphous (non-crystalline) silicon or poly (polycrystalline) silicon are widely used.

[0005] In addition, metal oxides showing semiconductor characteristics (hereinafter referred to as oxide semiconductors) are semiconductor materials applicable to the semiconductor film of transistors. For example, technologies for fabricating transistors using zinc oxide or In-Ga-Zn-based oxide semiconductors are disclosed (see Patent Document 1 and Patent Document 2).

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

[0007] The capacitance element has a pair of electrodes and a dielectric film between the pair of electrodes. One electrode is a gate electrode, a source electrode, a drain electrode, or the like that constitutes a transistor. In many cases, the light-shielding layer is formed of a conductive film having a light-shielding property.

[0008] In addition, the larger the capacitance value of the capacitance element, the more the liquid crystal of the liquid crystal element will change when an electric field is applied. The period during which the molecular orientation can be kept constant can be extended. In a display device, being able to extend this period reduces the number of times image data is rewritten. This makes it possible to reduce power consumption.

[0009] In order to increase the charge capacity of the capacitance element, the area occupied by the capacitance element is increased. However, there is a way to increase the area where the pair of electrodes overlap. In a display device, a conductive film having a light-shielding property is used to increase the area where a pair of electrodes overlap. If the area of the film is increased, the aperture ratio of the pixel decreases, and the display quality of the image deteriorates.

[0010] In view of the above, one aspect of the present invention is to provide a liquid crystal display device having a high aperture ratio and an increased charge capacity. An object of the present invention is to provide a semiconductor device including a capacitor that can be used for a semiconductor device. [Means for solving the problem]

[0011] One aspect of the present invention is a semiconductor device provided with a transistor and a capacitive element having translucency. Specifically, a pair of electrodes and a dielectric film constituting the capacitive element are formed of a material having translucency. At least one of the pair of electrodes is formed of a semiconductor film having translucency. Also, the other of the pair of electrodes constituting the capacitive element is formed using a conductive film having translucency or a semiconductor film having translucency.

[0012] The semiconductor film having translucency can be formed using an oxide semiconductor. Since the oxide semiconductor has a large energy gap of 3.0 eV or more and a high transmittance for visible light, it is so.

[0013] The capacitive element having translucency can be manufactured by using the materials constituting the transistor and the manufacturing process. For example, one electrode of the capacitive element can utilize the process of forming the semiconductor film of the transistor, and the dielectric film of the capacitive element can utilize the process of forming the gate insulating film of the transistor. When a part of the semiconductor film formed in the process of forming the semiconductor film of the transistor is made to function as an electrode of the capacitive element, it is preferable to increase the conductivity of the semiconductor film. For example, it is preferable to add one or more selected from the elements of boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and rare gas elements to the semiconductor film. Note that, as a method of adding the above elements to the semiconductor film, there are an ion implantation method or an ion doping method, etc., and the above elements can also be added by exposing the semiconductor film to a plasma containing the above elements.

[0014]

[0015] Also, when the oxide semiconductor film functions as an electrode of a capacitive element, a nitride insulating film may be provided in contact with the oxide semiconductor film. By the nitride insulating film and the oxide semiconductor film being in contact, the defect levels (interface levels) at the interface between the nitride insulating film and the oxide semiconductor film, or nitrogen contained in the nitride insulating film diffuses into the oxide semiconductor film, resulting in an increase in the conductivity of the oxide semiconductor film.

[0016] From the above, in the capacitive element, by adopting a structure in which the nitride insulating film is in contact with the semiconductor film, processes of adding elements that increase conductivity, such as ion implantation or ion doping, to the semiconductor film can be omitted, improving the yield of the semiconductor device and reducing the manufacturing cost.

[0017] When the semiconductor film functions as an electrode of a capacitive element, the conductivity of the semiconductor film is 10 S / cm or more and 1000 S / cm or less, preferably 100 S / cm or more and 1000 S / cm or less.

[0018] With the above configuration, since the capacitive element has translucency, it can be formed largely (in a large area) in a region other than where the transistor in the pixel is formed. Therefore, a semiconductor device with an increased charge capacity while increasing the aperture ratio can be obtained. As a result, a semiconductor device with excellent display quality can be obtained.

[0019] Also, in the capacitive element, since the dielectric film uses the insulating film constituting the transistor, it can have the same laminated structure as the insulating film. For example, when the insulating film provided on the gate electrode of the transistor has a laminated structure of a nitride insulating film and an oxide insulating film, the dielectric film of the capacitive element can have a laminated structure of a nitride insulating film and an oxide insulating film. ​

[0020] Note that when the semiconductor film of the transistor is an oxide semiconductor film and the stacked structure of the nitride insulating film and the oxide insulating film is used as the insulating film provided on the gate electrode, the oxide insulating film preferably has the property of permeating nitrogen, that is, has a barrier property against nitrogen. By doing so, it is possible to suppress the diffusion of one or both of nitrogen and hydrogen into the oxide semiconductor film which is the semiconductor film of the transistor, and it is possible to suppress the variation in the electrical characteristics of the transistor.

[0021] In the above, a semiconductor device which is one aspect of the present invention includes a scanning line electrically connected to the gate electrode of the transistor, and a capacitance line extending in a direction parallel to the scanning line and provided on the same surface as the scanning line. One electrode of the capacitance element is electrically connected to the transistor by a conductive film which can be formed when forming the source electrode or the drain electrode of the transistor.

[0022] The other electrode of the capacitance element is electrically connected to the capacitance line. Further, the capacitance line connected to the other electrode of the capacitance element can be provided in contact with a part of the capacitance line along the outer periphery of the electrode.

[0023]

[0023]

[0024]

[0024] One aspect of the present invention has a transistor including a semiconductor film having translucency in a channel formation region, and a capacitance element in which a dielectric film is provided between a first electrode and a second electrode. A semiconductor film formed on the same surface as the semiconductor film having translucency of the stud functions as a first electrode. The second electrode is formed below the gate insulating film of the transistor, and a region where the first electrode and the second electrode overlap in the gate insulating film is used as a dielectric film. A semiconductor device is characterized by this.

[0025] One aspect of the present invention includes a transistor including a semiconductor film having translucency in a channel formation region, a first electrode, and a capacitor element provided with a dielectric film between the first electrode and the second electrode. In the capacitor element, the first electrode, the second electrode, and the dielectric film are formed of a material having translucency, and a semiconductor film formed on the same surface as the semiconductor film having translucency of the transistor functions as the first electrode. The dielectric film has a laminated structure of a nitride insulating film and an oxide insulating film, and the second electrode is formed in contact with the nitride insulating film. A semiconductor device is characterized by this.

[0026] The first electrode has a region having a higher conductivity than the channel formation region of the semiconductor film having translucency of the transistor. The first electrode is electrically connected to the pixel electrode, and the potential of the second electrode is higher than the potential of the pixel electrode. It is characterized by this.

[0027] Note that a manufacturing method for manufacturing a semiconductor device according to one aspect of the present invention is also included in one aspect of the present invention.

Effect of the Invention

[0028] According to one aspect of the present invention, it is possible to provide a semiconductor device having a capacitor element that increases the charge capacity while increasing the aperture ratio.

Brief Description of the Drawings

[0029]

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Embodiments for Carrying Out the Invention

[0030] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention Without being limited to the following description, those skilled in the art can easily understand that the form and details can be changed in various ways. Also, the present invention should not be construed as being limited to the description of the embodiments shown below.

[0031] In the configuration of the present invention described below, the same reference numerals are commonly used for the same parts or parts having the same function among different drawings, and the repeated description thereof is omitted. Also, when referring to parts having the same function, the hatching pattern is the same, and there are cases where no reference numerals are particularly assigned.

[0032] In each of the drawings described in this specification, the size, film thickness, or area of each component may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0033] In this specification and the like, ordinal numbers such as first, second, etc. are used for convenience and do not indicate the process order or lamination order. Also, in this specification and the like, they do not indicate unique names as matters for specifying the invention.

[0034] Also, the functions of "source" and "drain" in the present invention may be interchanged when the direction of current changes in the circuit operation. For this reason, in this specification, the terms "source" and "drain" can be used interchangeably.

[0035] Also, voltage refers to the potential difference between two points, and potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in the electrostatic field at a certain point. However, generally, the potential difference between the potential at a certain point and the reference potential (for example, ground potential) This is simply referred to as potential or voltage, and potential and voltage are often used synonymously. Therefore, unless otherwise specified in this specification, potential may be read as voltage, or voltage may be read as potential.

[0036] In this specification, "parallel" means a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, cases of -5° or more and 5° or less are also included. Also, "perpendicular" means a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, cases of 85° or more and 95° or less are also included.

[0037] (Embodiment 1) In this embodiment, a semiconductor device, which is an aspect of the present invention, will be described with reference to the drawings. Note that in this embodiment, a semiconductor device, which is an aspect of the present invention, will be described by taking a liquid crystal display device as an example.

[0038] <Configuration of Semiconductor Device> FIG. 1(A) shows a diagram illustrating a configuration example of a semiconductor device. The semiconductor device shown in FIG. 1(A) includes a pixel portion 100, a scanning line driving circuit 104, a signal line driving circuit 106, m scanning lines 107 that are each arranged in parallel or substantially parallel and whose potential is controlled by the scanning line driving circuit 104, and n signal lines 109 that are each arranged in parallel or substantially parallel and whose potential is controlled by the signal line driving circuit 106. Further, the pixel portion 100 has a plurality of pixels 101 arranged in a matrix. Also, along the scanning line 107, there are capacitance lines 115 (not shown in FIG. 1(A)) that are each arranged in parallel or substantially parallel. Note that the capacitance lines 115 may be each arranged in parallel or substantially parallel along the signal line 109.

[0039] Each scanning line 107 corresponds to any one of the pixels 101 arranged in m rows and n columns in the pixel section 100. Each signal line 109 is electrically connected to n pixels 101 arranged in a row. , m pixels 101 arranged in any one of the columns of the pixels 101 arranged in m rows and n columns. Both m and n are integers equal to or greater than 1. Each capacitance line 115 is electrically connected to , n pixels 101 arranged in any one of the rows among the pixels 101 arranged in m rows and n columns. The capacitance lines 115 are electrically connected to the signal lines 109. When the pixels 101 are arranged in approximately parallel rows and columns, one of the pixels 101 arranged in m rows and n columns It is electrically connected to m pixels 101 arranged in a column.

[0040] FIG. 1B is an example of a circuit diagram of a pixel 101 included in the semiconductor device shown in FIG. In the pixel 101 shown in FIG. 1B, the gate electrode is electrically connected to the scanning line 107, and the source A transistor 103 having an electrode electrically connected to a signal line 109 and a transistor The other electrode is electrically connected to the drain electrode of the capacitor 103, and supplies a constant potential. The capacitor element 105 electrically connected to the line 115 and the pixel electrode are connected to the drain of the transistor 103. The pixel electrode is electrically connected to one of the electrodes of the capacitor element 105 and the pixel electrode. The electrode (opposite electrode) of the liquid crystal element 108 is electrically connected to the wiring that supplies the common potential. And, it has.

[0041] The circuit diagram of the pixel 101 included in the semiconductor device shown in FIG. 1A is not limited to FIG. It can be illustrated as FIG. 1(C).

[0042] The liquid crystal element 108 controls the transmission or non - transmission of light by the optical modulation action of the liquid crystal sandwiched between the substrate on which the transistor 103 and the pixel electrode are formed and the substrate on which the counter electrode is formed. Note that the optical modulation action of the liquid crystal is controlled by an electric field applied to the liquid crystal (including an electric field in the horizontal direction, vertical direction, or diagonal direction). Next, a specific configuration example of the pixel 101 of the liquid crystal display device will be described. A top view of the pixel 101 is shown in FIG. 2. In FIG. 2, descriptions of some components such as the counter electrode and the liquid crystal element are omitted. In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). The transistor 103 is provided in the region where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least a semiconductor film 111 having a channel - forming region, a gate electrode, a gate insulating film (not shown in FIG. 2), a source electrode, and a drain electrode. In the scanning line 107, the region overlapping the semiconductor film 111 functions as the gate electrode of the transistor 103. In the signal line 109, the region overlapping the semiconductor film 111

[0043] Next, a specific configuration example of the pixel 101 of the liquid crystal display device will be described. A top view of the pixel 101 is shown in FIG. 2. In FIG. 2, descriptions of some components such as the counter electrode and the liquid crystal element are omitted. In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)).

[0044] In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). In FIG. 2, the scanning line 107 is provided extending in a direction substantially orthogonal to the signal line 109 (the left - right direction in the figure). The signal line 109 is provided extending in a direction substantially orthogonal to the scanning line 107 (the up - down direction in the figure). The capacitance line 115 is provided extending in a direction parallel to the scanning line 107. Note that the scanning line 107 and the capacitance line 115 are electrically connected to the scanning line driving circuit 104 (see FIG. 1(A)), and the signal line 109 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)).

[0045] The transistor 103 is provided in the region where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least a semiconductor film 111 having a channel - forming region, a gate electrode, a gate insulating film (not shown in FIG. 2), a source electrode, and a drain electrode. In the scanning line 107, the region overlapping the semiconductor film 111 functions as the gate electrode of the transistor 103. In the signal line 109, the region overlapping the semiconductor film 111 The transistor 103 is provided in the region where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least a semiconductor film 111 having a channel - forming region, a gate electrode, a gate insulating film (not shown in FIG. 2), a source electrode, and a drain electrode. In the scanning line 107, the region overlapping the semiconductor film 111 functions as the gate electrode of the transistor 103. In the signal line 109, the region overlapping the semiconductor film 111 The transistor 103 is provided in the region where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least a semiconductor film 111 having a channel - forming region, a gate electrode, a gate insulating film (not shown in FIG. 2), a source electrode, and a drain electrode. In the scanning line 107, the region overlapping the semiconductor film 111 functions as the gate electrode of the transistor 103. In the signal line 109, the region overlapping the semiconductor film 111 The transistor 103 is provided in the region where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least a semiconductor film 111 having a channel - forming region, a gate electrode, a gate insulating film (not shown in FIG. 2), a source electrode, and a drain electrode. In the scanning line 107, the region overlapping the semiconductor film 111 functions as the gate electrode of the transistor 103. In the signal line 109, the region overlapping the semiconductor film 111 The transistor 103 is provided in the region where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least a semiconductor film 111 having a channel - forming region, a gate electrode, a gate insulating film (not shown in FIG. 2), a source electrode, and a drain electrode. In the scanning line 107, the region overlapping the semiconductor film 111 functions as the gate electrode of the transistor 103. In the signal line 109, the region overlapping the semiconductor film 111 functions as the source electrode of the transistor 103. In the conductive film 113, the region overlapping with the semiconductor film 1 11 functions as the drain electrode of the transistor 103. Therefore, the gate electrode, the source electrode, and the drain electrode are sometimes denoted as the scanning line 107, the signal line 109, and the conductive film 113, respectively. Also, the scanning line 107 has ends located outside the ends of the semiconductor film in terms of the upper surface shape. For this reason, the scanning line 107 functions as a light-shielding film that blocks light from the backlight As a result, the semiconductor film 111 included in the transistor is not irradiated with light, and fluctuations in electrical characteristics can be suppressed. Moreover, by processing the oxide semiconductor under appropriate conditions, the off-current of the transistor can be extremely reduced.

[0046] Therefore, in one aspect of the present invention, the semiconductor film 111 uses an oxide semiconductor. Thereby, the power consumption of the semiconductor device can be reduced. In the present embodiment, the scanning line 107 includes the gate electrode 107a of the transistor 103, the signal line 109 includes the source electrode 109a of the transistor 103, and the conductive film 113

[0047] includes the drain electrode 113a of the transistor 103. The conductive film 113 is electrically connected to the pixel electrode 121 through the opening 117. In FIG. 2, the pixel electrode 121 is illustrated without hatching. Also, hereinafter, when indicating the gate electrode of the transistor, it may be described as the scanning line 107, and when indicating the source electrode of the transistor, it may also be described as the signal line 109. The pixel electrode 121 is electrically connected to the conductive film 113 through the opening 117. In FIG. 2, the pixel electrode 121 is illustrated without hatching. Also, hereinafter, when indicating the gate electrode of the transistor, it may be described as the scanning line 107, and when indicating the source electrode of the transistor, it may also be described as the signal line 109. The capacitor element 105 is provided in a region surrounded by the capacitor line 115 and the signal line 109 within the pixel 101.

[0048] The capacitor element 105 is provided in a region surrounded by the capacitor line 115 and the signal line 109 within the pixel 101. It is configured as follows. The capacitive element 105 is electrically connected to the capacitive line 115. The capacitive element 10 5 includes an electrode 122 formed of a conductive material having translucency, and a semiconductor film 1 formed between the semiconductor film 119 and a part of the same layer as the layer forming the gate insulating film 127 of the transistor 103 (not shown in FIG. 2). That is, the capacitive element 105 has translucency.

[0049] Since the electrode 122 and the semiconductor film 119 have translucency in this way, the capacitive element 105 can be formed large (with a large area) within the pixel 101. Therefore, a semiconductor device with an increased charge capacity can be obtained while increasing the aperture ratio. Generally, a capacitive element without translucency blocks light from a backlight or the like, which contributes to a decrease in the aperture ratio. Particularly in a high-resolution semiconductor device, for example, a liquid crystal display device with high resolution, since the occupied area of one pixel is small, it is difficult to achieve both ensuring a sufficient charge capacity and improving the aperture ratio. However, since the capacitive element 105 shown in this embodiment has translucency, the capacitive element can be provided at the opening of the pixel. Therefore, the aperture ratio can be increased while obtaining a sufficient charge capacity in each pixel. Typically, it can be suitably used for a high-resolution semiconductor device with a pixel density of 200 ppi or more, and further 300 ppi or more. Also, one aspect of the present invention can increase the aperture ratio even in a high-resolution display device. Therefore, the light of a light source device such as a backlight can be efficiently utilized, and the power consumption of the display device can be reduced. Since the capacitive element 105 shown in this embodiment has translucency, it is possible to form the capacitive element large within the pixel. Therefore, while increasing the aperture ratio, a sufficient charge capacity can be ensured. Since the capacitive element without translucency blocks light from a backlight or the like, it contributes to a decrease in the aperture ratio. Particularly in a high-resolution semiconductor device, for example, a liquid crystal display device with high resolution, since the occupied area of one pixel is small, it is difficult to achieve both ensuring a sufficient charge capacity and improving the aperture ratio. However, since the capacitive element 105 shown in this embodiment has translucency, the capacitive element can be provided at the opening of the pixel. Therefore, the aperture ratio can be increased while obtaining a sufficient charge capacity in each pixel. Typically, it can be suitably used for a high-resolution semiconductor device with a pixel density of 200 ppi or more, and further 300 ppi or more. Also, one aspect of the present invention can increase the aperture ratio even in a high-resolution display device. Therefore, the light of a light source device such as a backlight can be efficiently utilized, and the power consumption of the display device can be reduced. However, since the capacitive element 105 shown in this embodiment has translucency, the capacitive element can be provided at the opening of the pixel. Therefore, the aperture ratio can be increased while obtaining a sufficient charge capacity in each pixel. Since the capacitive element 105 shown in this embodiment has translucency, it is possible to form the capacitive element large within the pixel. Therefore, while increasing the aperture ratio, a sufficient charge capacity can be ensured. Therefore, while obtaining a sufficient charge capacity in each pixel, the aperture ratio can be increased. Typically, it can be suitably used for a high-resolution semiconductor device with a pixel density of 200 ppi or more, and further 300 ppi or more. Also, one aspect of the present invention can increase the aperture ratio even in a high-resolution display device. Therefore, the light of a light source device such as a backlight can be efficiently utilized, and the power consumption of the display device can be reduced. Also, one aspect of the present invention can increase the aperture ratio even in a high-resolution display device. Therefore, the light of a light source device such as a backlight can be efficiently utilized, and the power consumption of the display device can be reduced. In a high-resolution display device, since the aperture ratio can be increased, the light of a light source device such as a backlight can be efficiently utilized, and the power consumption of the display device can be reduced. Since the capacitive element 105 shown in this embodiment has translucency, it is possible to form the capacitive element large within the pixel. Therefore, while increasing the aperture ratio, a sufficient charge capacity can be ensured.

[0050] Since the capacitive element 105 shown in this embodiment has translucency, it is possible to form the capacitive element large within the pixel. Therefore, while increasing the aperture ratio, a sufficient charge capacity can be ensured. Therefore, while increasing the aperture ratio, a sufficient charge capacity can be ensured. is possible. As a result, a semiconductor device with excellent display quality can be obtained. Transparency As the semiconductor film 119 having

[0051] Next, the characteristics of a transistor using an oxide semiconductor will be described. Using an oxide semiconductor The transistor is an n-channel type transistor. Also, oxygen deficiency in the oxide semiconductor may generate carriers, which may reduce the electrical characteristics and reliability of the transistor There is a risk. For example, the threshold voltage of the transistor may vary in the negative direction, and when the gate voltage is 0V, a drain current may flow. Thus, a transistor in which a drain current flows when the gate voltage is 0V is called a normally-on characteristic. Note that A transistor that can be regarded as having no drain current flowing when the gate voltage is 0V is called a normally-off characteristic.

[0052] Therefore, when using an oxide semiconductor for the semiconductor film 111, it is preferable that defects contained in the oxide semiconductor film that is the semiconductor film 111, typically oxygen deficiency, are reduced as much as possible. For example The spin density (corresponding to the defect density contained in the oxide semiconductor film) with a g value of 1.93 by the electron spin resonance method in which the direction of the magnetic field is applied parallel to the film surface is preferably reduced to below the detection limit of the measuring instrument. By reducing defects contained in the oxide semiconductor film, typically oxygen deficiency, as much as possible The spin density (corresponding to the defect density contained in the oxide semiconductor film) with a g value of 1.93 by the electron spin resonance method in which the direction of the magnetic field is applied parallel to the film surface The defects contained in the oxide semiconductor film, typically oxygen deficiency, can be reduced as much as possible, so that the transistor 103 can be prevented from having a normally-on characteristic and the electrical characteristics and reliability of the semiconductor device can be improved.

[0053] The variation of the threshold voltage of the transistor in the negative direction is not only due to oxygen deficiency, but also due to the oxide semiconductor It may also be caused by hydrogen contained in the conductor (including hydrogen compounds such as water). Hydrogen contained in the oxide semiconductor reacts with oxygen bonded to the metal atom to form water, and defects (also called oxygen vacancies) are formed in the lattice from which oxygen has desorbed (or the portion from which oxygen has desorbed). In addition, when a part of hydrogen reacts with oxygen, electrons as carriers are generated. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics.

[0054] Therefore, when using an oxide semiconductor for the semiconductor film 111, it is preferable that the oxide semiconductor film of the semiconductor film 111 has as little hydrogen as possible. Specifically, in the semiconductor film 111, the hydrogen concentration obtained by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Sp ectrometry) is less than 5×10 atoms / cm 18 3 less than, preferably less than 1×10 atoms / cm 18 3 or less, more preferably less than 5×10 17 at oms / cm 3 or less, even more preferably less than 1×10 16 atoms / cm 3 or less.

[0055] In addition, for the semiconductor film 111, the concentration of alkali metal or alkaline earth metal obtained by secondary ion mass spectrometry is 1×10 atoms / cm 18 3 or less, preferably 2×10 16 atoms / cm 3 or less. Alkali metals and alkaline earth metals may generate carriers when bonded to the oxide semiconductor, increasing the off-current of the transistor 103. ​​​​​ sometimes occur.

[0056] In addition, when nitrogen is contained in the oxide semiconductor film which is the semiconductor film 111, carriers electrons are generated, the carrier density increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen tends to have normally-on characteristics. Therefore, in the oxide semiconductor film, it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen concentration is preferably 5×10 18 atoms / cm 3 or less.

[0057] In this way, by using an oxide semiconductor film in which impurities (such as hydrogen, nitrogen, alkali metal, or alkaline earth metal) are reduced as much as possible and made highly pure as the semiconductor film 111, it is possible to suppress the normally-on characteristics of the transistor 103, and the off-current of the transistor 103 can be extremely reduced. Therefore, a semiconductor device having good electrical characteristics can be manufactured . In addition, a semiconductor device with improved reliability can be manufactured.

[0058] Note that the fact that the off-current of a transistor using a highly purified oxide semiconductor film is low can be proven by various experiments. For example, even in an element where the channel width W is 1×10 μm and the channel length L 6 is 10μm, in the range where the voltage between the source electrode and the drain electrode (drain voltage) is 1 V to 10V, the off-current is below the measurement limit of a semiconductor parameter analyzer , that is, a characteristic of 1×10 A or less can be obtained. In this case, the off-current corresponding to the value divided by the channel width of the transistor is 100 zA / μm or less -13 . Understood. Also, a circuit that connects a capacitive element and a transistor and controls the charge flowing into or out of the capacitive element with the transistor was used to measure the off-current. In this measurement, an oxide semiconductor film with high purity was used in the channel formation region of the transistor, and the off-current of the transistor was measured from the change in the amount of charge per unit time of the capacitive element. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor was 3V, an even lower off-current of several tens yA / μm was obtained. Therefore, a transistor using an oxide semiconductor film with high purity has an extremely small off-current.

[0059]

[0060] Next, the cross-sectional views between the dashed-dotted lines A1 - A2 and B1 - B2 in FIG. 2 are shown in FIG. 3.

[0060] The cross-sectional structure of the pixel 101 of the liquid crystal display device is as follows. The liquid crystal display device includes an element portion formed on the substrate 102, an element portion formed on the substrate 150, and a liquid crystal layer sandwiched between the two element portions.

[0061] First, the structure of the element portion formed on the substrate 102 will be described. On the substrate 102, an electrode 122 that functions as one electrode of the capacitive element 105, a scanning line 107 that functions as the gate electrode of the transistor 103, and a capacitive line 115 provided on the same surface as the scanning line 107 are provided. A gate insulating film 127 is provided on the electrode 122, the scanning line 107, and the capacitive line 115. In FIG. 3, an example is shown in which the gate insulating film 127 is a laminate of a gate insulating film 127a and a gate insulating film 127b, but the gate insulating film 127 may be a single layer or a laminate of three or more layers.

[0062] ​​​​​​​​​ A semiconductor film 111 is provided on a region overlapping with the scanning line 107 of the gate insulating film 127. A semiconductor film 119 is provided on a region overlapping with the electrode 122 of the gate insulating film 127. The semiconductor film 119 can be formed simultaneously with the semiconductor film 111 using a part of the same layer as the semiconductor film 111. It can be formed.

[0063] On the semiconductor film 111 and on the gate insulating film 127, a signal line 109 that functions as a source electrode of the transistor 103 and a conductive film 11 3 that functions as a drain electrode of the transistor 103 are provided. The conductive film 113 is connected to the semiconductor film 119. On the gate insulating film 127, on the signal line 109, on the semiconductor film 111, on the conductive film 113, and on the semiconductor film 119, an insulating film 129, an insulating film 131 that function as a protective insulating film of the transistor 103 and an insulating film 132 are provided. An opening 117 reaching the conductive film 113 is provided in the insulating film 129, the insulating film 131, and the insulating film 132. On the opening 117 and on the insulating film 132 a pixel electrode 121 is provided. Also, an insulating film 158 that functions as an alignment film is provided on the pixel electrode 121 and the insulating film 132. Note that an underlayer insulating film may be provided between the substrate 102, the electrode 122, the scanning line 107, the capacitor line 115, and the gate insulating film 127. It may be provided.

[0064] In the capacitor element 105 in this configuration, one of the pair of electrodes is the electrode 122, and the other electrode is the semiconductor film 119, and the dielectric film provided between the pair of electrodes is the gate insulating film 12 7.

[0065] Details of the components of the above structure will be described below.

[0066] There are no major restrictions on the material of the substrate 102, etc., but it is necessary to have heat resistance to withstand the heat treatment performed in the manufacturing process of the semiconductor device. For example, there are glass substrates, ceramic substrates, plastic substrates, etc. As the glass substrate, an alkali-free glass substrate such as barium borosilicate glass, aluminoborosilicate glass or aluminosilicate glass may be used. Also, it is possible to use a substrate that does not have translucency such as a stainless steel alloy. In that case, it is preferable to provide an insulating film on the substrate surface. Note that a quartz substrate, a sapphire substrate, a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, an SOI (Silicon On Insulator) substrate, etc. can also be used as the substrate 102.

[0067] The electrode 122 can be formed using a conductive material having the same translucency as the pixel electrode 121 described later. Also, an oxide semiconductor material having the same translucency as the semiconductor film 111 described later can be used for the electrode 122. The thickness of the electrode 122 can be 5 nm or more and 300 nm or less, preferably 10 nm or more and 150 nm or less.

[0068] Since the scanning line 107 and the capacitor line 115 carry a large current, it is preferable to form them with a metal film. Typically, a single-layer structure or a laminated structure using a metal material such as molybdenum (Mo), titanium (Ti), tungsten (W), tantalum (Ta), aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scandium (Sc), etc. or an alloy material having these as main components is provided.

[0069] ​​​​​​​​​​​​​​​As an example of the scanning line 107 and the capacitance line 115, a single-layer structure using aluminum containing silicon, a two-layer structure in which titanium is laminated on aluminum, a two-layer structure in which titanium is laminated on titanium nitride, a two-layer structure in which tungsten is laminated on titanium nitride, a two-layer structure in which tungsten is laminated on tantalum nitride, a two-layer structure in which copper is laminated on a copper-magnesium-aluminum alloy, a three-layer structure in which copper is laminated on titanium nitride and tungsten is further formed thereon, etc. exist. A two-layer structure in which titanium is laminated on aluminum, a two-layer structure in which titanium is laminated on titanium nitride, a two-layer structure in which tungsten is laminated on titanium nitride, a two-layer structure in which tungsten is laminated on tantalum nitride, a two-layer structure in which copper is laminated on a copper-magnesium-aluminum alloy, a three-layer structure in which copper is laminated on titanium nitride and tungsten is further formed thereon, etc. exist. A two-layer structure in which tungsten is laminated on titanium nitride, a two-layer structure in which tungsten is laminated on tantalum nitride, a two-layer structure in which copper is laminated on a copper-magnesium-aluminum alloy, a three-layer structure in which copper is laminated on titanium nitride and tungsten is further formed thereon, etc. exist. A two-layer structure in which tungsten is laminated on tantalum nitride, a two-layer structure in which copper is laminated on a copper-magnesium-aluminum alloy, a three-layer structure in which copper is laminated on titanium nitride and tungsten is further formed thereon, etc. exist. A two-layer structure in which copper is laminated on a copper-magnesium-aluminum alloy, a three-layer structure in which copper is laminated on titanium nitride and tungsten is further formed thereon, etc. exist. There is.

[0070] In addition, as the material of the scanning line 107 and the capacitance line 115, a conductive material having translucency applicable to the pixel electrode 121 can be used. In addition, as the material of the scanning line 107 and the capacitance line 115, a conductive material having translucency applicable to the pixel electrode 121 can be used.

[0071] Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used. Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide containing nitrogen, an In-Sn-based oxide containing nitrogen, an In-Ga-based oxide containing nitrogen, an In-Zn-based oxide containing nitrogen, an Sn-based oxide containing nitrogen, an In-based oxide containing nitrogen, a metal nitride film (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volt) or more. When an oxide semiconductor is used for the semiconductor film 111 of the transistor 103, by using a metal oxide containing nitrogen as the scanning line 107 (gate electrode of the transistor 103), the threshold voltage of the transistor 103 can be varied in the positive direction, and a transistor having so-called normally-off characteristics can be realized. For example, when an In-Ga-Zn-based oxide containing nitrogen is used, an In-Ga-Zn-based oxide having a nitrogen concentration higher than that of the oxide semiconductor film of the semiconductor film 111, specifically, a nitrogen concentration of 7 atomic% or more can be used.

[0072] In the scanning line 107 and the capacitance line 115, it is preferable to use aluminum or copper, which are low-resistance materials. By using aluminum or copper, signal delay can be reduced and display quality can be improved. Note that aluminum has low heat resistance and is prone to defects due to hillock, whisker, or migration. To prevent the migration of aluminum, it is preferable to laminate a metal material with a melting point higher than that of aluminum, such as molybdenum, titanium, or tungsten, on the aluminum. Also, when using copper, to prevent defects due to migration and diffusion of copper elements, it is preferable to laminate a metal material with a melting point higher than that of copper, such as molybdenum, titanium, or tungsten.

[0073] The gate insulating film 127 is provided in a single-layer structure or a laminated structure using an insulating material such as silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or a Ga-Zn-based metal oxide. Note that in order to improve the interface characteristics with the oxide semiconductor film, which is the semiconductor film 111, it is preferable that at least the region in the gate insulating film 127 that contacts the semiconductor film 111 is formed of an oxide insulating film.

[0074] Also, by providing an insulating film having barrier properties against oxygen, hydrogen, water, etc. on the gate insulating film 127, diffusion of oxygen from the oxide semiconductor film, which is the semiconductor film 111, to the outside and intrusion of hydrogen, water, etc. from the outside into the oxide semiconductor film can be prevented. As the insulating film having barrier properties against oxygen, hydrogen, water, etc., aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, etc. There are yttrium, hafnium oxynitride, silicon nitride, etc.

[0075] Generally, a capacitive element is configured by sandwiching a dielectric between two opposing electrodes, and the smaller the thickness of the dielectric (the shorter the distance between the two opposing electrodes), and the larger the dielectric constant of the dielectric, the larger the capacitance value. However, if the dielectric is made thinner to increase the capacitance value of the capacitive element, the leakage current (hereinafter also referred to as "leakage current") generated between the two electrodes tends to increase, and moreover, the breakdown voltage of the capacitive element tends to decrease.

[0076] Not only the capacitive element 105, but also the portion where the gate electrode (scanning line 107), gate insulating film 127, and semiconductor film 111 of the transistor 103 overlap function as the capacitive element described above (hereinafter also referred to as "gate capacitance"). Note that a channel is formed in the region of the semiconductor film 111 that overlaps with the gate electrode via the gate insulating film 127. That is, the gate electrode and the channel formation region function as the two electrodes of the capacitive element, and the gate insulating film functions as the dielectric of the capacitive element. Although it is preferable that the capacitance value of the gate capacitance is large, if the gate insulating film 127 is made thinner to increase the capacitance value, problems such as the increase in the above-described leakage current and the decrease in the breakdown voltage tend to occur.

[0077] Therefore, as the gate insulating film 127, hafnium silicate (HfSiO x ), hafnium silicate having nitrogen (HfSi O x O y N z ), hafnium aluminum nitride having nitrogen (HfAl O x O y N z ), high-k materials such as hafnium oxide and yttrium oxide ​​​​​​When used, even if the gate insulating film 127 is thickened, the capacitance value between the gate electrode and the semiconductor film 111 can be ensured sufficiently.

[0078] For example, when a high-k material with a large dielectric constant is used as the gate insulating film 127, even if the gate insulating film 127 is thickened, a capacitance value equivalent to the case where silicon oxide is used for the gate insulating film 127 can be realized. Therefore, the leakage current generated between the gate electrode and the semiconductor film 111 can be reduced. In addition, the leakage current generated between a wiring formed using the same layer as the gate electrode and another wiring overlapping with the wiring can be reduced. Note that the gate insulating film 127 may have a laminated structure of a high-k material and the above other materials.

[0079] Also, the gate insulating film 127 preferably has the following laminated structure. As the first silicon nitride film, a silicon nitride film with a small defect amount is provided, and as the second silicon nitride film on the first silicon nitride film, a silicon nitride film with a small amount of hydrogen desorption and ammonia desorption is provided. On the second silicon nitride film, any of the insulating oxide films listed in the gate insulating film 127 is preferably provided.

[0080] As the second silicon nitride film, in the temperature-programmed desorption gas analysis method, the desorption amount of hydrogen molecules is less than 5× 10 21 molecules / cm 3 preferably less than 3×10 21 molecules / cm 3 more preferably less than 1×10 21 molecules / cm 3 and the desorption amount of ammonia molecules is less than 1×10 22 molecules / cm 3 preferably less than 5×10 21 molecules / cm 3 ​Hereinafter, more preferably 1×10 21 molecules / cm 3 or less, it is preferable to use a nitride insulating film. By using the first silicon nitride film and the second silicon nitride film as part of the gate insulating film 127, a gate insulating film 127 with a small amount of defects and a small amount of desorption of hydrogen and ammonia can be formed. As a result, the amount of hydrogen and nitrogen contained in the gate insulating film 127 moving into the semiconductor film 111 can be reduced. In a transistor using an oxide semiconductor, if there are trapping levels (also referred to as interface levels) at the interface between the oxide semiconductor film and the gate insulating film or in the gate insulating film, the threshold voltage of the transistor fluctuates, typically in the negative direction of the threshold voltage, and the subthreshold swing coefficient (S value), which indicates the gate voltage required for the drain current to change by one digit when the transistor is in the on state, increases. As a result, there is a problem that the electrical characteristics vary from transistor to transistor. Therefore, by using a silicon nitride film with a small amount of defects as the gate insulating film and by providing an oxide insulating film in the region in contact with the semiconductor film 111, the negative shift of the threshold voltage can be reduced and the increase in the S value can be suppressed.

[0081] In a transistor using an oxide semiconductor, if there are trapping levels (also referred to as interface levels) at the interface between the oxide semiconductor film and the gate insulating film or in the gate insulating film, the threshold voltage of the transistor fluctuates, typically in the negative direction of the threshold voltage, and the subthreshold swing coefficient (S value), which indicates the gate voltage required for the drain current to change by one digit when the transistor is in the on state, increases. As a result, there is a problem that the electrical characteristics vary from transistor to transistor. Therefore, by using a silicon nitride film with a small amount of defects as the gate insulating film and by providing an oxide insulating film in the region in contact with the semiconductor film 111, the negative shift of the threshold voltage can be reduced and the increase in the S value can be suppressed. The thickness of the gate insulating film 127 is preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, and even more preferably 50 nm or more and 250 nm or less. The semiconductor film 111 and the semiconductor film 119 are oxide semiconductor films, and the oxide semiconductor film can have an amorphous structure, a single crystal structure, or a polycrystalline structure. Also, the semiconductor film 111

[0082] The thickness of the gate insulating film 127 is preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, and even more preferably 50 nm or more and 250 nm or less.

[0083] The semiconductor film 111 and the semiconductor film 119 are oxide semiconductor films, and the oxide semiconductor film can have an amorphous structure, a single crystal structure, or a polycrystalline structure. Also, the semiconductor film 111 ​​​​​​ The thickness is 1 nm or more and 100 nm or less, preferably 1 nm or more and 50 nm or less, more preferably 1 nm or more and 30 nm or less, and even more preferably 3 nm or more and 20 nm or less.

[0084] As the oxide semiconductor applicable to the semiconductor film 111 and the semiconductor film 119, the energy gap is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. In this way, by using an oxide semiconductor with a wide energy gap, the off-current of the transistor 103 can be reduced.

[0085] The oxide semiconductor applicable to the semiconductor film 111 preferably contains at least indium (In) or zinc (Zn). Or, it preferably contains both In and Zn. Also, in order to reduce the variation in the electrical characteristics of the transistor using the oxide semiconductor, it preferably has one or more stabilizers together with them.

[0086] Examples of the stabilizer include gallium (Ga), tin (Sn), hafnium (Hf), aluminum (Al), or zirconium (Zr). Also, other stabilizers include lanthanoids such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), and the like.

[0087] Examples of the oxide semiconductor applicable to the semiconductor film 111 and the semiconductor film 119 include, for example, oxides As a semiconductor, it is an oxide containing indium oxide, tin oxide, zinc oxide, and two kinds of metals In-Zn-based oxides, Sn-Zn-based oxides, Al-Zn-based oxides, Zn-Mg-based oxides, Sn-Mg-based oxides, In-Mg-based oxides, In-Ga-based oxides, and an acid containing three kinds of metals oxide, the In-Ga-Zn-based oxide (also denoted as IGZO) containing In, Ga, and Zn, the In-Al-Zn-based acid oxide, the In-Sn-Zn-based oxide, the Sn-Ga-Zn-based oxide, the Al-Ga-Zn-based oxide oxide, the Sn-Al-Zn-based oxide, the In-Hf-Zn-based oxide, the In-Zr-Zn-based oxide oxide, the In-Ti-Zn-based oxide, the In-Sc-Zn-based oxide, the In-Y-Zn-based oxide, I n-La-Zn-based oxide, In-Ce-Zn-based oxide, In-Pr-Zn-based oxide, In -Nd-Zn-based oxide, In-Sm-Zn-based oxide, In-Eu-Zn-based oxide, In- Gd-Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-H o-Zn-based oxide, In-Er-Zn-based oxide, In-Tm-Zn-based oxide, In-Yb -Zn-based oxide, In-Lu-Zn-based oxide, and an oxide containing four kinds of metals, In-S n-Ga-Zn-based oxide, In-Hf-Ga-Zn-based oxide, In-Al-Ga-Zn-based oxide, In-Sn-Al-Zn-based oxide, In-Sn-Hf-Zn-based oxide, In-H f-Al-Zn-based oxide can be used.

[0088] Here, the In-Ga-Zn-based oxide means an oxide having In, Ga, and Zn as main components and the ratio of In, Ga, and Zn is not limited. Also, metal elements other than In, Ga, and Zn may be contained.

[0089] Also, as the oxide semiconductor, InMO3(ZnO) mIt is also possible to use a material represented by (m>0). Here, M represents one or a plurality of metal elements selected from Ga, Fe, Mn, and Co, or the element as the above stabilizer. Further, as the oxide semiconductor, it is also possible to use a material represented by In2SnO5(ZnO) n (n>0).

[0090] For example, it is possible to use an In-Ga-Zn-based metal oxide having an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Ga:Z n = 2:2:1 (= 2 / 5:2 / 5:1 / 5), or In:Ga:Zn = 3:1:2 (= 1 / 2:1 / 6:1 / 3). Alternatively, it is possible to use an In-Sn-Zn-based metal oxide having an atomic ratio of In:Sn:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), I n:Sn:Zn = 2:1:3 (= 1 / 3:1 / 6:1 / 2), or In:Sn:Zn = 2:1:5 (= 1 / 4:1 / 8:5 / 8). Note that the atomic ratio of the metal oxide includes a variation of plus or minus 20% of the above atomic ratio as an error. However, it is not limited to these, and those having an appropriate composition may be used according to the required semiconductor characteristics and electrical characteristics (field-effect mobility, threshold voltage, variation, etc.). Further, in order to obtain the required semiconductor characteristics, it is preferable to make the carrier density, impurity concentration, defect density, atomic ratio of the metal element and oxygen, interatomic distance, density, etc. appropriate. For example, a relatively high field-effect mobility can be easily obtained in an In-Sn-Zn -based oxide. However, even in an In-Ga-

[0091] Zn-based oxide, the field-effect mobility can be increased by reducing the defect density in the bulk.

[0092] ​​​​​​​ The signal line 109 that functions as the source electrode of the transistor 103 and the drain The conductive film 113 that functions as the electrode can be provided in a single-layer structure or a laminated structure using the same material as the scanning line 107 and the capacitive line 115.

[0093] The insulating film 129 that functions as the protective insulating film of the transistor 103, the insulating film 131, and the insulating Film 132 can apply the same material as the gate insulating film 127. In particular, it is preferable that the insulating film 1 29 and the insulating film 131 are oxide insulating films, and the insulating film 132 is a nitride insulating film. Also, by making the insulating film 132 a nitride insulating film, it is possible to suppress the intrusion of impurities such as hydrogen and water from the outside into the transistor 103 (especially the semiconductor film 111). Note that the insulating film 12 9 may not be provided.

[0094] Further, one or both of the insulating film 129 and the insulating film 131 are preferably oxide insulating films containing more oxygen than the stoichiometric composition. By doing so, it is possible to prevent the desorption of oxygen from the oxide semiconductor film and move the oxygen contained in the oxide insulating film to the oxide semiconductor film to fill the oxygen deficiency. For example, by using an oxide insulating film in which the amount of oxygen molecule release measured by temperature-programmed desorption spectroscopy (hereinafter referred to as TDS analysis) is 1.0× 10 molecules / cm or more, it is possible to fill the oxygen deficiency contained in the oxide semiconductor film. Note that in one or both of the insulating film 129 and the insulating film 131, an oxide insulating film in which a region (oxygen-excess region) containing more oxygen than the stoichiometric composition partially exists may be used, and at least in the region overlapping with the semiconductor film 111, acid 10 18 molecule / cm 3 or more, it is possible to fill the oxygen deficiency contained in the oxide semiconductor film. Note that in one or both of the insulating film 129 and the insulating film 131, an oxide insulating film in which a region (oxygen-excess region) containing more oxygen than the stoichiometric composition partially exists may be used, and at least in the region overlapping with the semiconductor film 111, acid contained in the oxide semiconductor film can be filled. Note that in one or both of the insulating film 129 and the insulating film 131, an oxide insulating film in which a region (oxygen-excess region) containing more oxygen than the stoichiometric composition partially exists may be used, and at least in the region overlapping with the semiconductor film 111, oxygen exists, and it is also acceptable that the oxide insulating film is present, and at least in the region overlapping with the semiconductor film 111, acid ​​​The existence of the oxygen-excess region prevents the desorption of oxygen from the oxide semiconductor film and moves the oxygen contained in the oxygen-excess region to the oxide semiconductor film to compensate for oxygen deficiency, making this possible.

[0095] When the insulating film 131 is an insulating oxide film containing more oxygen than the oxygen of the stoichiometric composition, the insulating film 129 is preferably an insulating oxide film that permeates oxygen. Note that in the insulating film 1 29, not all of the oxygen that enters the insulating film 129 from the outside moves through the insulating film 129, and there is also oxygen that remains in the insulating film 129. In addition, there is oxygen that is contained in the insulating film 129 in advance and moves from the insulating film 129 to the outside. Therefore, the insulating film 129 is preferably an insulating oxide film with a large oxygen diffusion coefficient.

[0096] In addition, since the insulating film 129 is in contact with the oxide semiconductor film that is the semiconductor film 111, it is preferably an insulating oxide film that not only allows oxygen to pass through but also reduces the interface states with the semiconductor film 111. For example, the insulating film 129 is preferably an insulating oxide film with a lower defect density in the film than the insulating film 131. Specifically, the spin density of g value = 2.001 (E ´-center) by electron spin resonance measurement is 3.0×10 17 spins / cm 3 or less, preferably 5.0×10 16 spins / cm 3 or less of the insulating oxide film. Note that the spin density of g value = 2.001 by electron spin resonance measurement corresponds to the abundance of dangling bonds contained in the insulating film 129.

[0097] The thickness of the insulating film 129 is 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less. ​​, preferably, it can be set to 10 nm or more and 30 nm or less. The thickness of the insulating film 131 is 3 0 nm or more and 500 nm or less, preferably 150 nm or more and 400 nm or less can be.

[0098] When the insulating film 132 is a nitride insulating film, it is preferable that one or both of the insulating film 129 and the insulating film 131 is an insulating film having a barrier property against nitrogen. For example, by forming a dense oxide insulating film, it can have a barrier property against nitrogen. Specifically, at 25 °C when using 0.5 wt% hydrofluoric acid, the etching rate is preferably an oxide insulating film of 10 nm / min or less.

[0099] In addition, when one or both of the insulating film 129 and the insulating film 131 are an oxide-nitride silicon or nitride oxide silicon-containing oxide insulating film, the nitrogen concentration obtained from SIMS is , above the SIMS detection limit and less than 3×10 20 atoms / cm 3 , preferably 1×10 18 atoms / cm 3 or more and 1×10 20 atoms / cm 3 or less is preferable. By doing so, the amount of nitrogen moving to the semiconductor film 111 included in the transistor 103 can be reduced. Also, by doing so, the amount of defects in the oxide insulating film itself containing nitrogen can be reduced.

[0100] As the insulating film 132, a nitride insulating film with a low hydrogen content may be provided. For such a nitride insulating film, for example, the amount of hydrogen molecule release measured by TDS analysis is 5.0×10 21 molecules / cm 3 ​is less than, preferably 3.0×10 21 molecules / cm 3 is less than, and further preferably 1.0×10 21 molecules / cm 3 is a nitride insulating film.

[0101] The insulating film 132 has a thickness capable of suppressing the intrusion of impurities such as hydrogen and water from the outside. For example, it can be 50 nm or more and 200 nm or less, preferably 50 nm or more and 150 nm or less and more preferably 50 nm or more and 100 nm or less.

[0102] The pixel electrode 121 is provided with a conductive material having translucency such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide.

[0103] Next, the structure of the element portion formed on the substrate 150 will be described. On the substrate 150, a light-shielding film 152 and an electrode (opposite electrode 154) provided to face the pixel electrode 121 are provided on the light-shielding film 152. In addition, an insulating film 156 that functions as an alignment film is provided on the opposite electrode 154.

[0104] The light-shielding film 152 suppresses light from the backlight or the outside from irradiating the transistor 103. The light-shielding film 152 can be formed using a material such as a metal or an organic resin containing a pigment. Note that the light-shielding film 152 is provided not only on the transistor 103 of the pixel 101 but also in regions other than the pixel portion 100 such as the scanning line drive circuit 104 and the signal line drive circuit 106 (see FIG. 1). ​

[0105] Note that a colored film having a function of transmitting light of a predetermined wavelength may be provided between adjacent light-shielding films 152. Further, an overcoat film may be provided between the light-shielding film 152 and the colored film and the counter electrode 154.

[0106] The counter electrode 154 is provided by appropriately using a conductive material having translucency as shown in the pixel electrode 121.

[0107] The liquid crystal element 108 includes a pixel electrode 121, a counter electrode 154, and a liquid crystal layer 160. Note that the liquid crystal layer 160 is sandwiched by an insulating film 158 that functions as an alignment film provided in the element portion of the substrate 102 and an insulating film 156 that functions as an alignment film provided in the element portion of the substrate 150. Further, the pixel electrode 121 and the counter electrode 154 overlap with each other with the liquid crystal layer 160 therebetween.

[0108] Here, the connection of each component included in the pixel 101 shown in the present embodiment will be described with reference to the circuit diagram shown in FIG. 1(C) and the cross-sectional view shown in FIG. 3.

[0109] FIG. 1(C) is an example of a detailed circuit diagram of the pixel 101 included in the semiconductor device shown in FIG. 1(A). As shown in FIGS. 1(C) and 3, the transistor 103 includes a scanning line 107 including a gate electrode 107a, a signal line 109 including a source electrode 109a, and a conductive film 113 including a drain electrode 113a.

[0110] In the capacitor element 105, an electrode 122 connected to the capacitor line 115 functions as one electrode. Further, a semiconductor film 119 connected to the conductive film 113 including the drain electrode 113a functions as the other electrode. Further, a gate insulating film provided between the semiconductor film 119 and the electrode 122 ​​​​​​​​​​​​ The edge film 127 functions as a dielectric film.

[0111] The liquid crystal element 108 is composed of a pixel electrode 121, a counter electrode 154, and a liquid crystal layer 160 provided between the pixel electrode 121 and the counter electrode.

[0112] In the capacitor element 105, the semiconductor film 119 has the same configuration as the semiconductor film 111 and can function as an electrode of the capacitor element 105. That is, by controlling the potential applied to the capacitor line 115, the semiconductor film 119 is made n-type, and the conductivity of the semiconductor film 119 is increased, so that the semiconductor film 119 can function as one electrode of the capacitor element. That is, the capacitor element 105 can function as a MOS capacitor. Specifically, the potential applied to the capacitor line 115 is set as follows. The potential of the pixel electrode 121 varies in the positive and negative directions in order to operate the liquid crystal element 108 (see Fig. 1(C)). In order to always make the semiconductor film 119 n-type, the potential of the capacitor line 115 needs to be always set higher than the threshold voltage of the capacitor element 105 (MOS capacitor) by at least the potential applied to the pixel electrode 121. Note that the dielectric film of the capacitor element 105 and the gate insulating film of the transistor 103 are the same insulating film. Therefore, the potential of the capacitor line 115 may be set higher than the potential applied to the pixel electrode 121 by at least the threshold voltage of the transistor 103. By doing so, the semiconductor film 119 is made n-type, and the conductivity of the semiconductor film 119 can be increased.

[0113] Also, the insulating film 129 provided on the semiconductor film 111 and the semiconductor film 119 allows oxygen to permeate. ​​​​​​​​​​​while reducing the interface states between the semiconductor film 111 and the semiconductor film 119, and an insulating oxide film and forming the insulating film 131 as an insulating oxide film containing an oxygen-excess region or an insulating oxide film containing more oxygen than the stoichiometric composition, oxygen can be easily supplied to a certain oxide semiconductor film, preventing the desorption of oxygen from the oxide semiconductor film, and moving the oxygen contained in the insulating film 131 to the oxide semiconductor film to fill the oxygen vacancies contained in the oxide semiconductor film. As a result, it is possible to suppress the transistor 103 from having a normally-on characteristic, and since the potential applied to the capacitor line 115 can be controlled so that the capacitor element 105 (MOS capacitor) is always in a conductive state, the electrical characteristics and reliability of the semiconductor device can be improved.

[0114] In addition, by using a nitride insulating film as the insulating film 132 provided on the insulating film 131, it is possible to suppress the intrusion of impurities such as hydrogen and water from the outside into the semiconductor film 111 and the semiconductor film 119. Furthermore, by providing a nitride insulating film with a low hydrogen content as the insulating film 132, it is possible to suppress fluctuations in the electrical characteristics of the transistor and the capacitor element 105 (MOS capacitor).

[0115] In addition, a capacitor element 105 can be formed large (with a large area) within the pixel 101. Therefore, it is possible to obtain a semiconductor device with an increased charge capacitance while increasing the aperture ratio. Also, by increasing the aperture ratio, it is possible to obtain a semiconductor device with good display quality.

[0116] In addition, in the semiconductor device according to one aspect of the present invention, by shielding the polarization axis of the polarizing member (polarizing substrate),​​​​​​​​​​​​​​ It is provided so as to be parallel to the film 152, and the display mode of the semiconductor device is set by applying a voltage in a state where the liquid crystal element 108 does not transmit the light of a light source device such as a backlight, and the normal -black is performed, so that the area where the light-shielding film 152 of the pixel 101 is provided can be reduced or eliminated. As a result, even when one pixel is small as in a high-resolution display device having a pixel density of 200 ppi or more, and further 300 ppi or more, the aperture ratio can be increased. Further, the aperture ratio can be further increased by using a capacitive element having translucency.

[0117] <Method for manufacturing a semiconductor device> Next, a method for manufacturing the element portion provided on the substrate 102 shown in the above semiconductor device will be described with reference to FIGS. 4 and 5.

[0118] First, an electrode 122 is formed on the substrate 102, a scanning line 107 and a capacitive line 115 are formed, and a gate insulating film 127 is formed so as to cover the electrode 122, the scanning line 107 and the capacitive line 115. A semiconductor film 111 is formed in a region overlapping the scanning line 107 of the gate insulating film 127, and a semiconductor film 119 is formed in a region overlapping the electrode 122 of the gate insulating film 127 (see FIG. 4(A)).

[0119] The electrode 122 is formed by forming a film made of a conductive material having the same translucency as the pixel electrode 121 listed above on the substrate 102, and forming a resist mask on the film by photolithography or inkjet method or the like, and selectively etching the film using the resist mask to form it. The processing of the film can be performed by one or both of dry etching and wet etching. After the etching is completed, the resist mask is removed. Also In addition, it is also possible to use a transparent oxide semiconductor material as the electrode 122.

[0120] Note that the process of forming an arbitrary-shaped resist mask on a conductive layer, an insulating layer, a semiconductor layer, etc. using a photolithography method is called a photolithography process. Generally, after the formation of the resist mask, an etching process, an ion implantation process, etc. are performed, and then the resist mask is often removed. Therefore, unless otherwise specified, the photolithography process referred to in this specification includes the formation of the resist mask to the removal of the resist mask.

[0121] In this embodiment, an oxide semiconductor with a thickness of 100 nm is formed on the substrate 102 as the electrode 122. After the formation of the electrode 122, a process of adding a dopant to the electrode 122 may be performed. By adding a dopant to the electrode 122, the oxide semiconductor can be made n-type, and the conductivity of the electrode 122 can be increased. The n-type oxide semiconductor can function as a conductive film. As dopants for increasing the conductivity, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and noble gas elements can be used. Note that as a method of adding the above elements to the electrode 122, there are an ion implantation method or an ion doping method, etc., and the above elements can also be added by exposing the electrode 122 to a plasma containing the above elements.

[0122] The scanning line 107 and the capacitance line 115 can be formed by forming a conductive film using the materials listed above, forming a mask on the conductive film, and processing using the mask. ​​​​​​​​​​​​​Various film formation methods such as vapor deposition method, CVD method, sputtering method, and spin coating method can be used. There is no particular limitation on the thickness of the conductive film, and it can be determined in consideration of factors such as the formation time and the desired resistivity. The mask can be, for example, a resist mask formed by a photolithography process. In addition, the processing of the conductive film can be performed by one or both of dry etching and wet etching.

[0123] The gate insulating film 127 can be formed using various film formation methods such as CVD method or sputtering method.

[0124] When applying gallium oxide to the gate insulating film 127, it can be formed using the MOCVD (Metal Organic Chemical Vapor Deposition) method.

[0125] When using an oxide semiconductor as the electrode 122, in order to increase the conductivity of the electrode 122, a nitride insulating film may be used in the region of the gate insulating film 127 in contact with the electrode 122. By performing heat treatment in a state where the electrode 122 and the nitride insulating film are in contact, nitrogen contained in the nitride insulating film can be moved to the electrode 122. Therefore, the step of adding a dopant can be omitted, and it is possible to reduce the manufacturing cost of the semiconductor device and improve the yield of the semiconductor device.

[0126] The semiconductor film 111 and the semiconductor film 119 can be formed by forming an oxide semiconductor film using the above-listed oxide semiconductor, forming a mask on the oxide semiconductor film, and processing using the mask. The oxide semiconductor film can be formed by sputtering method, coating method, pulsed laser It can be formed by using a vapor deposition method, a laser ablation method, etc. Using a printing method can directly form the element-isolated semiconductor films 111 and 119 on the gate insulating film 127. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape. When forming the oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. The sputtering gas can be appropriately used with a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas. Also, the target can be appropriately selected according to the composition of the oxide semiconductor film to be formed. The mask can be, for example, a resist mask formed by a photolithography process. Further, the processing of the oxide semiconductor film can be performed by one or both of dry etching and wet etching. The etching conditions (etching gas, etching solution, etching time, temperature, etc.) are appropriately set according to the material so that etching can be performed into a desired shape.

[0127] After forming the semiconductor films 111 and 119, a mask covering the semiconductor film 111 can be formed, and a dopant for n-type doping the semiconductor film 119 to increase the conductivity may be added. After forming the semiconductor films 111 and 119, a mask covering the semiconductor film 111 can be formed, and a dopant for n-type doping the semiconductor film 119 to increase the conductivity may be added. As the dopant for increasing the conductivity, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and noble gas elements can be used. As the method of adding the above elements to the semiconductor film 119, there are an ion implantation method, an ion doping method, etc., and the above elements can also be added by exposing the semiconductor film 119 to plasma containing the above elements. As the dopant for increasing the conductivity, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and noble gas elements can be used. As the method of adding the above elements to the semiconductor film 119, there are an ion implantation method, an ion doping method, etc., and the above elements can also be added by exposing the semiconductor film 119 to plasma containing the above elements. As the dopant for increasing the conductivity, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and noble gas elements can be used. As the method of adding the above elements to the semiconductor film 119, there are an ion implantation method, an ion doping method, etc., and the above elements can also be added by exposing the semiconductor film 119 to plasma containing the above elements. As the dopant for increasing the conductivity, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and noble gas elements can be used. As the method of adding the above elements to the semiconductor film 119, there are an ion implantation method, an ion doping method, etc., and the above elements can also be added by exposing the semiconductor film 119 to plasma containing the above elements. It can be added. The n-type oxide semiconductor can function as a conductive film.

[0128] After forming the semiconductor films 111 and 119, or after adding a dopant to increase the conductivity, heat treatment is preferably performed to dehydrogenate or dehydrate the oxide semiconductor films that are the semiconductor films 111 and 119. The temperature of the heat treatment is typically 150°C or higher and less than the substrate distortion point, preferably 200°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower. Note that the heat treatment may be performed on the oxide semiconductor film before processing the semiconductor films 111 and 119. In the heat treatment, the heat treatment apparatus is not limited to an electric furnace, and it may be an apparatus that heats the object to be treated by heat conduction or heat radiation from a medium such as heated gas. For example, RTA (Rapid Thermal Anneal) apparatuses such as GRTA (Gas Rapid Thermal Anneal) apparatuses and LRTA (Lamp Rapid Thermal Anneal) apparatuses can be used. The LRTA apparatus is an apparatus that heats the object to be treated by radiation of light (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, and high-pressure mercury lamps. The GRTA apparatus is an apparatus that performs heat treatment using high-temperature gas. The heat treatment is carried out in nitrogen, oxygen, ultra-dry air (air with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less), or a noble gas (argon, helium, etc.).

[0129] GRTA (Gas Rapid Thermal Anneal) apparatuses, LRTA (Lamp Rapid Thermal Anneal) apparatuses, etc. of RTA (Rapid Thermal Anneal) apparatuses can be used. The LRTA apparatus is an apparatus that heats the object to be treated by radiation of light (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, and high-pressure mercury lamps. The GRTA apparatus is an apparatus that performs heat treatment using high-temperature gas.

[0130] The heat treatment is carried out in nitrogen, oxygen, ultra-dry air (air with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less), or a noble gas (argon, helium, etc.). It may be carried out under the atmosphere of the above nitrogen, oxygen, ultra-dry air, or rare gas. It is preferable that hydrogen, water, etc. are not contained therein. After heating in an inert gas atmosphere, it may be heated in an oxygen atmosphere.

[0131] In addition, when a base insulating film is provided between the substrate 102, the scanning line 107, the capacitive line 115, and the gate insulating film 127, the base insulating film can be formed of silicon oxide, silicon oxynitride, silicon nitride, nitrided silicon, silicon oxynitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxynitride, etc. By forming the base insulating film with silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, etc., diffusion of impurities, typically alkali metals, water, hydrogen, etc. from the substrate 102 into the semiconductor film 111 can be suppressed. The base insulating film can be formed using a sputtering method or a CVD method.

[0132] Next, a signal line 109 that functions as a source electrode of the transistor 103 and a conductive film 113 that functions as a drain electrode of the transistor 103 are formed (see FIG. 4(B)).

[0133] The signal line 109 and the conductive film 113 can be formed by forming a conductive film using a material applicable to the signal line 109 and the conductive film 113, forming a mask on the conductive film, and processing using the mask. The mask and the processing can be performed in the same manner as the scanning line 107 and the capacitive line 115.

[0134] Next, the semiconductor film 111, the semiconductor film 119, the signal line 109, the conductive film 113, and the gate insulating ​​​​Form an insulating film 128 on the film 127, form an insulating film 130 on the insulating film 128, and form an insulating film 1 33 on the insulating film 130 (see Fig. 5(A)). Note that it is preferable to form the insulating film 128, the insulating film 13 0, and the insulating film 133 continuously. By doing so, it is possible to suppress the mixing of impurities at the respective interfaces of the insulating film 128, the insulating film 130, and the insulating film 133. It can be done.

[0135] The insulating film 128 can be formed by using various film-forming methods such as CVD method or sputtering method using a material applicable to the insulating film 129. The insulating film 130 can be formed by using a material applicable to the insulating film 131 . The insulating film 133 can be formed by using a material applicable to the insulating film 132 . It can be formed by using a material applicable to the insulating film 132.

[0136] When applying an insulating oxide film with fewer interface levels with the semiconductor film 111 to the insulating film 129, the insulating film 128 can be formed using the following formation conditions. Here, the case of forming a silicon oxide film or a silicon oxynitride film as the insulating oxide film will be described. The formation conditions are as follows: The substrate placed in the evacuated processing chamber of the plasma CVD apparatus is maintained at 180°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. A deposition gas containing silicon and an oxidizing gas of the raw material gas are introduced into the processing chamber, and the pressure in the processing chamber is set to 20 Pa or higher and 250 Pa or lower, more preferably 40 Pa or higher and 200 Pa or lower. High-frequency power is supplied to the electrode provided in the processing chamber. This is the condition. Typical examples of the deposition gas containing silicon include silane, disilane, trisilane, silicon fluoride rane, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. This is the condition.

[0137] Typical examples of the deposition gas containing silicon include silane, disilane, trisilane, silicon fluoride rane, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. Yes.

[0138] In addition, by setting the amount of the oxidizing gas with respect to the depositable gas containing silicon to 100 times or more, it is possible to reduce the hydrogen content contained in the insulating film 128 (insulating film 129) and reduce the dangling bonds contained in the insulating film 128 (insulating film 129). The oxygen migrating from the insulating film 130 (insulating film 131) may be trapped by the dangling bonds contained in the insulating film 128 (insulating film 129). Therefore, if the dangling bonds contained in the insulating film 128 (insulating film 129) are reduced, the oxygen contained in the insulating film 130 (insulating film 13 1) can be efficiently transferred to the semiconductor film 111 and the semiconductor film 119, and the oxygen vacancies contained in the oxide semiconductor film which is the semiconductor film 111 and the semiconductor film 119 can be filled. As a result, the amount of hydrogen mixed into the oxide semiconductor film can be reduced and the oxygen vacancies contained in the oxide semiconductor film can be reduced.

[0139] When the insulating film 131 is an insulating oxide film containing the above oxygen-excess region or an insulating oxide film containing more oxygen than the stoichiometric composition, the insulating film 130 can be formed using the following formation conditions. Here, the case of forming a silicon oxide film or a silicon oxynitride film as the insulating oxide film will be described. The formation conditions are such that a substrate placed in a vacuum-exhausted processing chamber of a plasma CVD apparatus is maintained at 180°C or higher and 260°C or lower, more preferably 18 0°C or higher and 230°C or lower. A raw material gas is introduced into the processing chamber to set the pressure in the processing chamber to 1 00 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower. An electrode provided in the processing chamber is supplied with 0.17 W / cm or more and 0.5 W / cm or more and 0.5 W / cm or more and 0.5 W / cm or more and 0.5 W / cm or more and 0.5 W / cm 2 or more and 0.5 W / cm2 The following are more preferred: Approximately 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power is supplied: do.

[0140] The source gas for the insulating film 130 may be a source gas that can be used for the insulating film 128 .

[0141] The conditions for forming the insulating film 130 are: high frequency power of the above power density in a processing chamber at the above pressure; By supplying the gas, the decomposition efficiency of the source gas in the plasma increases, the number of oxygen radicals increases, As the oxidation of the source gas progresses, the oxygen content in the insulating film 130 becomes higher than the stoichiometric composition. However, when the substrate temperature is set to the above temperature, the bond between silicon and oxygen becomes weak. As a result, the amount of oxygen in the stoichiometric composition is less than that of the oxygen in the stoichiometric composition. It is possible to form an oxide insulating film that contains a large amount of oxygen and from which part of the oxygen is released by heating. In addition, an insulating film 128 is provided on the semiconductor film 111. In the formation process, the insulating film 128 serves as a protective film for the semiconductor film 111. Even if the insulating film 130 is formed using high-density high-frequency power, damage to the semiconductor film 111 is not observed. can be suppressed.

[0142] In addition, by increasing the thickness of the insulating film 130, the amount of oxygen desorbed by heating can be increased. Therefore, it is preferable that the insulating film 130 is thicker than the insulating film 128. By providing the film 128, it is possible to improve the coverage even when the insulating film 130 is provided thick. Cut.

[0143] In the case where the insulating film 132 is a nitride insulating film with a low hydrogen content, the insulating film 133 is formed as follows. It can be formed using the conditions. Here, a silicon nitride film is formed as the nitride insulating film. The case of forming it will be described. The forming conditions are as follows: the substrate placed in the evacuated processing chamber of a plasma CVD apparatus is maintained at 80°C or higher and 400°C or lower, more preferably 200°C or higher and 370 °C or lower, a source gas is introduced into the processing chamber, and the pressure in the processing chamber is set to 100 Pa or higher and 2 50 Pa or lower, preferably 100 Pa or higher and 200 Pa or lower, and high-frequency power is supplied to the electrode provided in the processing chamber.

[0144] As the source gas for the insulating film 133, it is preferable to use a depositable gas containing silicon, nitrogen, and ammonia. Representative examples of the depositable gas containing silicon include silane, disilane , trisilane, silane fluoride, etc. Also, the flow rate of nitrogen is preferably 5 times or more and 50 times or less, more preferably 10 times or more and 50 times or less, relative to the flow rate of ammonia. Note that by using ammonia as the source gas, the decomposition of the depositable gas containing silicon and nitrogen can be promoted. This is because the energy generated by the dissociation and decomposition of ammonia by plasma energy or thermal energy contributes to the decomposition of the bonds of the depositable gas molecules containing silicon and the bonds of nitrogen molecules. By doing so, a silicon nitride film with a low hydrogen content and capable of suppressing the intrusion of impurities such as hydrogen and water from the outside can be formed.

[0145] At least after forming the insulating film 130, a heat treatment is performed to transfer the excess oxygen contained in the insulating film 128 or the insulating film 13 0 to the semiconductor film 111, and the oxide semiconductor that is the semiconductor film 111 ​​​​​​​​​It is preferable to compensate for the oxygen deficiency in the film. The heat treatment may be appropriately performed with reference to the details of the heat treatment for dehydrogenation or dehydration of the semiconductor film 111 and the semiconductor film 119. possible.

[0146] Next, an opening 117 reaching the conductive film 113 is formed in a region where the insulating film 128, the insulating film 130, and the insulating film 133 overlap the conductive film 113 (see FIG. 5(B)).

[0147] The opening 117 can be formed by forming a mask so that a part of the region where the insulating film 133 overlaps the conductive film 113 is exposed, and processing the insulating film 128, the insulating film 130, and the insulating film 133 using the mask. The mask and the processing can be performed in the same manner as the scanning line 107 and the capacitor line 115. possible.

[0148] Finally, by forming the pixel electrode 121, an element portion provided on the substrate 102 can be manufactured (see FIG. 3). The pixel electrode 121 can be formed by using the materials listed above, forming a conductive film in contact with the conductive film 113 through the opening 117, forming a mask on the conductive film, and processing using the mask. The mask and the processing can be performed in the same manner as the scanning line 107 and the capacitor line 115. possible.

[0149] Alternatively, the electrode 122 may be formed so as to extend along the scanning line 107. By forming the electrode 122 so as to extend along the scanning line 107, the formation of the capacitor line 115 can be omitted. possible.

[0150] <Modification 1> In the semiconductor device according to one aspect of the present invention, the shape of the transistor provided in the pixel is shown in FIG. ​​​​​​​​It is not limited to the shapes of the transistors shown in FIGS. 2 and 3, and can be changed as appropriate. For example, as shown in FIG. 6, in pixel 151, the transistor 153 may be a transistor in which the source electrode of the transistor 103 included in the signal line 109 is U-shaped (C-shaped, U-shaped, or horseshoe-shaped), and surrounds the conductive film 113 that functions as a drain electrode. By adopting such a shape, even if the area of the transistor is small, a sufficient channel width can be ensured, and the amount of drain current (also referred to as on-current) flowing when the transistor is conducting can be increased. In pixel 151 of FIG. 6, the configuration other than the transistor 1 53 is the same as that in FIG. 2. 〈Modification Example 2〉 In addition, in the semiconductor device which is one aspect of the present invention, the shape of the capacitance line 115 connected to the electrode 122 which is one of the electrodes constituting the capacitance element 105 can be changed as appropriate. For example, in order to reduce the contact resistance between the electrode 122 and the capacitance line 115, a part of the capacitance line 115 can be provided in contact along the outer periphery of the electrode

[0151] 122. A specific example of this configuration will be described with reference to FIGS. 7 to 9. Here, only the parts different from FIGS. 2 and 3 will be described. FIG. 7 is a top view of pixel 161 of this configuration, and FIG. 8 is a cross-sectional view between the dashed-dotted lines A1 - A2 and between the dashed-dotted lines B1 - B2 in FIG. 7. Further, FIG. 9 is a cross-sectional view between the dashed-dotted lines C1 - C2 in FIG. 7.

[0152] In pixel 161 of this configuration, the capacitance line 167 is provided in contact along the outer periphery of the electrode 122 (see FIG. 7). The capacitance line 167 functions as the gate electrode of the transistor 103.

[0153] ​​​​​Since it may be formed in the same formation process as the scanning line 107 and thus may have light-shielding properties, it is preferably formed in a loop shape. In the pixel 161 of FIG. 7, the other configurations are the same as those in FIG. 2. As shown in FIGS. 8 and 9, in the pixel 161 of this configuration, the capacitance line 167 is provided so as to cover the end portion of the electrode 122 of the capacitance element 165. By adopting such a configuration, the contact resistance between the electrode 122 and the capacitance line 167 is reduced, and charge can be efficiently supplied to the capacitance element 165.

[0154]

[0155] Also, in the configuration shown in FIGS. 7 to 9, although the capacitance line 167 is formed in a loop shape, a conductive film formed in the same formation process as the capacitance line 167 may be provided in contact with the outer periphery of the electrode 122 in a state separated from the capacitance line 167.

[0156] <Modification Example 3> Also, in the semiconductor device which is one aspect of the present invention, the configuration of the capacitance line can be appropriately changed. FIG. 10 shows a configuration in which the capacitance line is shared between adjacent pixels.

[0157] FIG. 10 is a top view of pixels 401_1 and 401_2 adjacent in the extending direction of the signal line 109. The pixels 401_1 and 401_2 have a different planar configuration of the capacitance line 115 from the pixel 101 shown in FIG. 2.

[0158] The scanning lines 107_1 and 107_2 shown in FIG. 10 are parallel to each other and are provided so as to extend in a direction substantially orthogonal to the signal line 109. Between the scanning lines 107_1 and 107_2, a capacitance line 115 is provided parallel to the scanning lines 107_1 and 107_2. ​​​​​​​​​​​​is provided. The capacitance line 115 is connected to a capacitance element 405_1 provided in the pixel 401_1 , and a capacitance element 405_2 provided in the pixel 401_2. The upper surface shapes of the pixels 401_1 and the arrangement positions of the components are symmetric with respect to the capacitance line 115 .

[0159] In the pixel 401_1, a transistor 103_1 and a capacitance element 405_1 connected to the transistor 103_1 are provided.

[0160] The transistor 103_1 is provided in a region where the scanning line 107_1 and the signal line 109 intersect . The transistor 103_1 includes at least a semiconductor film 111_1 having a channel formation region, a gate electrode, a gate insulating film (not shown in FIG. 10), a source electrode, and a drain electrode. In the scanning line 107_1, the region overlapping the semiconductor film 111_1 functions as the gate electrode of the transistor 103_1. In the signal line 109, the region overlapping the semiconductor film 111_1 functions as the source electrode of the transistor 103_1. In the conductive film 113_1, the region overlapping the semiconductor film 111_1 functions as the drain electrode of the transistor 103_1. The conductive film 113_1 and the pixel electrode 121_1 are connected at the opening 117_1.

[0161] The capacitance element 405_1 is electrically connected to the capacitance line 115. The capacitance element 405_1 is composed of a semiconductor film 119_1 formed of a light-transmissive oxide semiconductor, a light-transmissive electrode 122_1, and a part of the same layer as the layer forming the gate insulating film of the transistor 103_1 as a dielectric film (not shown in FIG. 10). That is, the capacitance element 405_1 is ​It has translucency.

[0162] In pixel 401_2, a transistor 103_2 and a capacitor element 405_2 connected to the transistor 103_2 are provided.

[0163] The transistor 103_2 is provided in a region where the scanning line 107_2 and the signal line 109 intersect. The transistor 103_2 includes at least a semiconductor film 111_2 having a channel formation region, a gate electrode, a gate insulating film (not shown in FIG. 10), a source electrode, and a drain electrode. In the scanning line 107_2, the region overlapping with the semiconductor film 111_2 functions as the gate electrode of the transistor 103_2. In the signal line 109, the region overlapping with the semiconductor film 111_2 functions as the source electrode of the transistor 103_2. In the conductive film 113_2, the region overlapping with the semiconductor film 111_2 functions as the drain electrode of the transistor 103_2. The conductive film 113_2 and the pixel electrode 121_2 are connected at the opening 117_2.

[0164] Similar to the capacitor element 405_1, the capacitor element 405_2 is electrically connected to the capacitor line 115. The capacitor element 405_2 is composed of a semiconductor film 119_2 formed of a translucent oxide semiconductor, a translucent electrode 122_2, and a part of the same layer as the layer forming the gate insulating film of the transistor 103_2 (not shown in FIG. 10) as a dielectric film. That is, the capacitor element 405_2 has translucency.

[0165] Note that the cross-sectional structures of the transistor 103_1 and the transistor 103_2, and the capacitor element 405_1 and the capacitor element 405_2 are the transistor 103 and the capacitor shown in FIG. 3 respectively.​​​​​​​​​​ Since it is the same as the element 105, it is omitted here.

[0166] In the top surface shape, a capacitance line is provided between two adjacent pixels, and by connecting the capacitance elements included in each pixel, it is possible to reduce the number of capacitance lines. As a result, it is possible to further increase the aperture ratio of the pixel as compared with the configuration in which a capacitance line is provided for each pixel. Furthermore, it is also possible to connect the electrodes 122_1 and 122_2 and form them as one electrode. Also, the capacitance line 115 may be omitted, and the electrodes 122_1 and 122_2 may be extended along the scanning lines 107_1 and 107_2. Furthermore, it is also possible to connect the electrodes 122_1 and 122_2 and form them as one electrode. Also, the capacitance line 115 may be omitted, and the electrodes 122_1 and 122_2 may be extended along the scanning lines 107_1 and 107_2.

[0167] Also, by using a semiconductor film formed in the same formation process as the semiconductor film of the transistor as one electrode of the capacitance element, it is possible to fabricate a semiconductor device having a capacitance element with an increased charge capacitance while increasing the aperture ratio. Also, by increasing the aperture ratio, a semiconductor device with good display quality can be obtained. Also, by using a semiconductor film formed in the same formation process as the semiconductor film of the transistor as one electrode of the capacitance element, it is possible to fabricate a semiconductor device having a capacitance element with an increased charge capacitance while increasing the aperture ratio. Also, by increasing the aperture ratio, a semiconductor device with good display quality can be obtained. Also, by using a semiconductor film formed in the same formation process as the semiconductor film of the transistor as one electrode of the capacitance element, it is possible to fabricate a semiconductor device having a capacitance element with an increased charge capacitance while increasing the aperture ratio. Also, by increasing the aperture ratio, a semiconductor device with good display quality can be obtained.

[0168] Also, since the oxide semiconductor film, which is the semiconductor film of the transistor, has a reduced oxygen deficiency and reduced impurities such as hydrogen and nitrogen, the semiconductor device according to one aspect of the present invention is a semiconductor device having good electrical characteristics. Also, since the oxide semiconductor film, which is the semiconductor film of the transistor, has a reduced oxygen deficiency and reduced impurities such as hydrogen and nitrogen, the semiconductor device according to one aspect of the present invention is a semiconductor device having good electrical characteristics. Also, since the oxide semiconductor film, which is the semiconductor film of the transistor, has a reduced oxygen deficiency and reduced impurities such as hydrogen and nitrogen, the semiconductor device according to one aspect of the present invention is a semiconductor device having good electrical characteristics. Also, since the oxide semiconductor film, which is the semiconductor film of the transistor, has a reduced oxygen deficiency and reduced impurities such as hydrogen and nitrogen, the semiconductor device according to one aspect of the present invention is a semiconductor device having good electrical characteristics.

[0169] Note that the configurations shown in this embodiment can be appropriately combined with the configurations shown in other embodiments and used. Note that the configurations shown in this embodiment can be appropriately combined with the configurations shown in other embodiments and used. Note that the configurations shown in this embodiment can be appropriately combined with the configurations shown in other embodiments and used.

[0170] Note that the configurations shown in this embodiment can be appropriately combined with the configurations shown in other embodiments and used. Note that the configurations shown in this embodiment can be appropriately combined with the configurations shown in other embodiments and used.

[0171] (Embodiment 2) The transistors 103 and 153 disclosed in the above embodiment are semiconductor films 11 The channel formation region of 1 is a channel etching type transistor that is exposed to the etching solution and etching gas used when forming the signal line 109 and the conductive film 113. However, the configuration applicable to the transistor 103 and the transistor 153 is not limited to the channel etching type. In this embodiment, an example of the configuration of the transistor applicable to the transistor 103 and the transistor 153 will be described with reference to FIG. 11. and is exposed to the etching solution and etching gas used when forming the signal line 109 and the conductive film 113. However, the configuration applicable to the transistor 103 and the transistor 153 is not limited to the channel etching type. In this embodiment, an example of the configuration of the transistor applicable to the transistor 103 and the transistor 153 will be described with reference to FIG. 11. In the transistor 183 shown in FIG. 11(A), a channel protection film 182 is formed on the semiconductor film 111, and the signal line 109 and the conductive film 113 are formed so as to overlap a part of the channel protection film 182.

[0172] The transistor 183 shown in FIG. 11(A) is a channel protection type transistor in which a channel protection film 182 is formed on the semiconductor film 111, and the signal line 109 and the conductive film 113 are formed so as to overlap a part of the channel protection film 182. By the channel protection film 182, the channel formation region of the semiconductor film 111 can be prevented from being exposed to the etching solution and etching gas used when forming the signal line 109 and the conductive film 113. Therefore, although the number of steps for forming the channel protection film 182 increases, the damage to the semiconductor film 111 when forming the signal line 109 and the conductive film 113 is reduced. By the channel protection film 182, the channel formation region of the semiconductor film 111 can be prevented from being exposed to the etching solution and etching gas used when forming the signal line 109 and the conductive film 113. Therefore, although the number of steps for forming the channel protection film 182 increases, the damage to the semiconductor film 111 when forming the signal line 109 and the conductive film 113 is reduced. By the channel protection film 182, the channel formation region of the semiconductor film 111 can be prevented from being exposed to the etching solution and etching gas used when forming the signal line 109 and the conductive film 113. Therefore, although the number of steps for forming the channel protection film 182 increases, the damage to the semiconductor film 111 when forming the signal line 109 and the conductive film 113 is reduced. By the channel protection film 182, the channel formation region of the semiconductor film 111 can be prevented from being exposed to the etching solution and etching gas used when forming the signal line 109 and the conductive film 113. Therefore, although the number of steps for forming the channel protection film 182 increases, the damage to the semiconductor film 111 when forming the signal line 109 and the conductive film 113 is reduced. By the channel protection film 182, the channel formation region of the semiconductor film 111 can be prevented from being exposed to the etching solution and etching gas used when forming the signal line 109 and the conductive film 113. Therefore, although the number of steps for forming the channel protection film 182 increases, the damage to the semiconductor film 111 when forming the signal line 109 and the conductive film 113 is reduced. By the channel protection film 182, the channel formation region of the semiconductor film 111 can be prevented from being exposed to the etching solution and etching gas used when forming the signal line 109 and the conductive film 113. Therefore, although the number of steps for forming the channel protection film 182 increases, the damage to the semiconductor film 111 when forming the signal line 109 and the conductive film 113 is reduced.

[0173] By providing the channel protection film 182, it is possible to reduce the leakage current between the source electrode and the drain electrode of the transistor. Also, it is possible to realize a transistor with good electrical characteristics. By providing the channel protection film 182, it is possible to reduce the leakage current between the source electrode and the drain electrode of the transistor. Also, it is possible to realize a transistor with good electrical characteristics. By providing the channel protection film 182, it is possible to reduce the leakage current between the source electrode and the drain electrode of the transistor. Also, it is possible to realize a transistor with good electrical characteristics.

[0174] The channel protection film 182 can be formed using the same material as the insulating film 129. In the transistor 183, by forming the channel protection film 182 using the same material as the insulating film 129, the formation of the insulating film 129 is omitted. In the transistor 183, by forming the channel protection film 182 using the same material as the insulating film 129, the formation of the insulating film 129 is omitted. In the transistor 183, by forming the channel protection film 182 using the same material as the insulating film 129, the formation of the insulating film 129 is omitted.

[0175] The transistor 190 shown in FIG. 11(B) has a configuration in which a signal line 109 and a conductive film 113 are formed on a gate insulating film 127, and a semiconductor film 111 is formed at a position in contact with a part of the gate insulating film 127, the signal line 109, and the conductive film 113 and overlapping with the scanning line 107. Since the semiconductor film 111 is formed after the formation of the signal line 109 and the conductive film 113, the semiconductor film 111 is not exposed to the etching solution or etching gas used during the formation of the signal line 109

[0176] and the conductive film 113. In addition, when the transistor 103 or the transistor 153 has the same configuration as the

[0177] transistor 190, the semiconductor film 119 is formed on the conductive film 113. The transistor 200 shown in FIG. 11(C) has a configuration in which a conductive film 135 is formed on the insulating film 132 of the transistor 103 or the transistor 153 disclosed in the above embodiment. The conductive film 135 is formed so as to overlap at least the channel formation region of the semiconductor film 111. The potential of the conductive film 135 can be a common potential, a GND potential, an arbitrary potential, or a floating state. By providing the conductive film 135, the amount of variation in the threshold voltage of the transistor 200 before and after a reliability test (for example, a BT (Bias Temperature) stress test) can be further reduced. By providing the conductive film 135, it is possible to prevent the electrical

[0178] characteristics of the transistor from fluctuating due to the influence of an external electric The gate electrode and the back gate electrode are disposed so as to sandwich the channel forming region of the semiconductor layer. The back gate electrode is formed of a conductive layer and can function in the same manner as the gate electrode. In addition, the threshold voltage of the transistor is controlled by controlling the potential of the back gate electrode. In addition, the conductive film 135 and the scanning line 107 (gate electrode) are connected to each other, and The conductive film 135 may function as a second gate electrode due to the potential.

[0179] The conductive film 135 is made of the same material and in the same manner as the scanning lines 107, the signal lines 109, the pixel electrodes 121, etc. The method can be carried out.

[0180] The transistor 183, the transistor 190, and the transistor 200 disclosed in this embodiment The structures of the transistors 103 and 153 disclosed in the above embodiments are In addition to the transistors constituting the scanning line driver circuit 101, the signal line driver circuit 102, It can also be applied to the transistors that make up 06.

[0181] Note that the structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. There can be.

[0182] (Embodiment 3) In this embodiment, the semiconductor device can be used for the transistor and the capacitor described in the above embodiment. One embodiment of an oxide semiconductor film that can be formed will be described.

[0183] Oxide semiconductor films are roughly classified into single-crystal oxide semiconductor films and non-single-crystal oxide semiconductor films. The single-crystal oxide semiconductor film includes an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, a polycrystalline oxide semiconductor film, and a polycrystalline oxide semiconductor film. Physical semiconductor film, CAAC-OS (C Axis Aligned Crystalline It refers to an oxide semiconductor film or the like.

[0184] An amorphous oxide semiconductor film is an oxide semiconductor film in which the atomic arrangement in the film is irregular and has no crystal component. Even in a minute region, it has no crystal part, and a typical example is an oxide semiconductor film having a completely amorphous structure throughout the film.

[0185] A microcrystalline oxide semiconductor film contains, for example, microcrystals (also referred to as nanocrystals) having a size of 1 nm or more and less than 10 nm. Therefore, the microcrystalline oxide semiconductor film has a higher regularity of atomic arrangement than the amorphous oxide semiconductor film. For this reason, the microcrystalline oxide semiconductor film is characterized by having a lower density of defect levels than the amorphous oxide semiconductor film.

[0186] The CAAC-OS film is one of the oxide semiconductor films having a plurality of crystal parts, and most of the crystal parts have a size that can be accommodated within a cube having a side length of less than 100 nm. Therefore, the crystal parts included in the CAAC-OS film also include cases where the side length is less than 10 nm, less than 5 nm, or less than 3 nm and can be accommodated within a cube. The CAAC-OS film is characterized by having a lower density of defect levels than the microcrystalline oxide semiconductor film. Hereinafter, a detailed description will be given of the CAAC-OS film.

[0187] When the CAAC-OS film is observed by a transmission electron microscope (TEM: Transmission Electron Microscope), a clear boundary between crystal parts, that is, a grain boundary (also referred to as a grain boundary), cannot be confirmed. Therefore, it can be said that the CAAC-OS film is less likely to cause a decrease in electron mobility due to grain boundaries.

[0188] The CAAC-OS film was observed by TEM from a direction approximately parallel to the sample surface (cross-sectional TEM observation ). As a result, it was confirmed that in the crystal part, the metal atoms are arranged in layers. The metal atoms in each layer have a shape that reflects the unevenness of the surface (also referred to as the formed surface) or the upper surface of the CAAC-OS film and are arranged parallel to the formed surface or the upper surface of the CAAC-OS film.

[0189] On the other hand, when the CAAC-OS film was observed by TEM from a direction approximately perpendicular to the sample surface (planar TE M observation), it was confirmed that in the crystal part, the metal atoms are arranged in a triangular or hexagonal shape. However, no regularity was found in the arrangement of the metal atoms among different crystal parts .

[0190] From the cross-sectional TEM observation and the planar TEM observation, it can be seen that the crystal part of the CAAC-OS film has orientation .

[0191] When structural analysis was performed on the CAAC-OS film using an X-ray diffraction (XRD: X-Ray Diffraction) device , for example, in the out-of-plane method analysis of the CAAC-OS film having crystals of InGaZnO4 , a peak may appear in the vicinity of a diffraction angle (2θ) of 31°. Since this peak is attributed to the (009) plane of the InGaZnO4 crystal , it can be confirmed that the crystal of the CAAC-OS film has c-axis orientation and the c-axis is oriented in a direction approximately perpendicular to the formed surface or the upper surface.

[0192] On the other hand, in the in-plane method analysis in which X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis, a peak may appear in the vicinity of 2θ = 56°. This peak ​​​​This is attributed to the (110) plane of the InGaZnO4 crystal. In the case of a semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is set as the axis (φ axis). When the sample is rotated and analyzed (φ scan), the crystal plane equivalent to the (110) plane is In contrast, in the case of the CAAC-OS film, the 2θ is set to 5 Even when the φ is fixed at around 6° and scanned, no clear peak appears.

[0193] From the above, it is concluded that the a-axis and b-axis orientations are inconsistent between different crystal regions in the CAAC-OS film. Although it is regular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. Therefore, the layered arrangement confirmed by the cross-sectional TEM observation mentioned above is consistent with the above. Each layer of aligned metal atoms is a plane parallel to the ab plane of the crystal.

[0194] The crystalline part is formed when the CAAC-OS film is formed or when a crystallization process such as a heat treatment is performed. As described above, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed or the surface on which the CAAC-OS film is formed. The orientation of the CAAC-OS film is parallel to the normal vector of the top surface. When the shape is changed by etching, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed. Or it may not be parallel to the normal vector of the upper surface.

[0195] The crystallinity of the CAAC-OS film may not be uniform. When the crystal part of the CAAC-OS film is formed by crystal growth from the vicinity of the top surface, The area near the surface may have a higher degree of crystallinity than the area near the surface to be formed. When impurities are added to a C-OS film, the crystallinity of the region where the impurities are added changes, resulting in partial Regions with different degrees of crystallinity may also be formed.

[0196] In addition, in the out-of-plane method of the CAAC-OS film having InGaZnO4 crystals in the analysis by, in addition to the peak around 2θ = 31°, a peak may also appear around 2θ = 36° . The peak around 2θ = 36° indicates that a part of the CAAC-OS film contains crystals without c-axis orientation . The CAAC-OS film preferably shows a peak around 2θ = 31° and does not show a peak around 2θ = 36°.

[0197] In addition, the oxide semiconductor film may be, for example, a laminated film having two or more of an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, and a CA AC-OS film.

[0198] Three methods can be cited as the method for forming CAAC-OS.

[0199] The first method is a method of forming an oxide semiconductor film with a film formation temperature of 100°C or higher and 450°C or lower, and forming crystal parts in which the c-axis of the crystal parts contained in the oxide semiconductor film is aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface.

[0200] The second method is a method of forming an oxide semiconductor film with a thin thickness and then performing a heat treatment at 200°C or higher and 700°C or lower, so that the c-axis of the crystal parts contained in the oxide semiconductor film is aligned in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface.

[0201] The third method is to form the first layer of the oxide semiconductor film with a thin thickness, then perform a heat treatment at 200°C or higher and 700°C or lower, and further form the second layer of the oxide semiconductor film, so that the oxide semiconductor The c-axis of the crystal part contained in the film is parallel to the normal vector of the surface to be formed or the normal vector of the surface. This is a method for forming crystal parts aligned in a direction.

[0202] A transistor in which CAAC-OS is applied to an oxide semiconductor film has small fluctuations in electrical characteristics due to irradiation with visible light or ultraviolet light. Therefore, a transistor using CAAC-OS for the oxide semiconductor film has good reliability.

[0203] In addition, CAAC-OS is preferably formed by a sputtering method using a polycrystalline oxide semiconductor sputtering target. When ions collide with the sputtering target, the crystal region contained in the sputtering target may cleave from the ab plane and peel off as flat plate-shaped or pellet-shaped sputtering particles having a plane parallel to the ab plane. In this case, the flat plate-shaped or pellet-shaped sputtering particles reach the film-forming surface while maintaining the crystal state, whereby CAAC-OS can be formed.

[0204] In addition, in order to form CAAC-OS, it is preferable to apply the following conditions.

[0205] By reducing the incorporation of impurities during film formation, it is possible to suppress the crystal state from being disrupted by impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film-forming chamber may be reduced. Also, the impurity concentration in the film-forming gas may be reduced. Specifically, a film-forming gas having a dew point of -80°C or lower, preferably -100°C or lower, is used.

[0206] In addition, by increasing the heating temperature of the film-forming surface during film formation (for example, the substrate heating temperature), the film-forming surface Migration of sputtering particles occurs after arrival. Specifically, the temperature of the film-forming surface is set to 100 °C or higher and 740 °C or lower, preferably 150 °C or higher and 500 °C or lower for film formation. By increasing the temperature of the film-forming surface during film formation, when flat or pellet-shaped sputtering particles reach the film-forming surface, migration occurs on the film-forming surface, and the flat surface of the sputtering particles adheres to the film-forming surface.

[0207] Also, it is preferable to reduce the plasma damage during film formation by increasing the oxygen ratio in the film-forming gas and optimizing the power. The oxygen ratio in the film-forming gas is 30 vol% or more, preferably 100 vol% .

[0208] As an example of the sputtering target, an In-Ga-Zn-O compound target is shown below.

[0209] InO X powder, GaO Y powder, and ZnO Z powder are mixed in a predetermined number of moles, and after pressure treatment, heat treatment is performed at a temperature of 1000 °C or higher and 1500 °C or lower to obtain a polycrystalline In-Ga- Zn-based metal oxide target. The pressure treatment may be performed while cooling, or may be performed while heating. Here, X, Y, and Z are arbitrary positive numbers. Here, the predetermined mole ratio is, for example, InO X powder, GaO Y powder, and ZnO Z powder are 2:2:1 , 8:4:3, 3:1:1, 1:1:1, 4:2:3, or 3:1:2. Note that the type of powder and the mole ratio of mixing can be appropriately changed depending on the sputtering target to be produced.

[0210] In addition, the oxide semiconductor film may have a structure in which a plurality of oxide semiconductor films are stacked. For example, the oxide semiconductor film may be a stack of a first oxide semiconductor film and a second oxide semiconductor film, and different metal oxides may be used for the first oxide semiconductor film and the second oxide semiconductor film. For example, one of an oxide containing two types of metals, an oxide containing three types of metals, and an oxide containing four types of metals may be used for the first oxide semiconductor film, and an oxide containing two types of metals different from those of the first oxide semiconductor film, an oxide containing three types of metals, and an oxide containing four types of metals may be used for the second oxide semiconductor film.

[0211] The oxide semiconductor film may have a two-layer structure, and the components of the first oxide semiconductor film and the second oxide semiconductor film may be the same, and the atomic ratios of both may be different. For example, the atomic ratio of the first oxide semiconductor film may be In:Ga:Zn = 3:1:2, and the atomic ratio of the second oxide semiconductor film may be In: Ga:Zn = 1:1:1. Also, the atomic ratio of the first oxide semiconductor film may be In: Ga:Zn = 2:1:3, and the atomic ratio of the second oxide semiconductor film may be In:Ga:Zn = 1 :3:2. Note that the atomic ratio of each oxide semiconductor film includes a fluctuation of plus or minus 20% of the above atomic ratio as an error.

[0212] At this time, of the first oxide semiconductor film and the second oxide semiconductor film, the atomic ratio of In and Ga in the oxide semiconductor film closer to the gate electrode (the channel side) may be In ≧ Ga. Also, the atomic ratio of In and Ga in the oxide semiconductor film farther from the gate electrode (the back channel side) may be In < Ga. With these stacked structures, a transistor with high field-effect mobility can be obtained. can be manufactured. On the other hand, the I of the oxide semiconductor film on the side close to the gate electrode (channel side) The atomic ratio of n and Ga is In < Ga, and the atomic ratio of In and Ga of the oxide semiconductor film on the back channel side is In ≧ Ga, so that the variation amount of the threshold voltage due to the change over time of the transistor and the reliability test can be reduced.

[0213] The first oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2 can be formed by a sputtering method using an oxide target with an atomic ratio of I n:Ga:Zn = 1:3:2. It can be formed with the substrate temperature at room temperature and using argon or a mixed gas of argon and oxygen as the sputtering gas. The second oxide semiconductor film with an atomic ratio of In:Ga:Zn = 3:1:2 can be formed in the same manner as the first oxide semiconductor film using an oxide target with an atomic ratio of In:Ga:Zn = 3:1:2.

[0214] Further, the oxide semiconductor film may have a three-layer structure, and the constituent elements of the first to third oxide semiconductor films may be the same, and the atomic ratios thereof may be different. The configuration in which the oxide semiconductor film has a three-layer structure will be described with reference to FIG. 12.

[0215] In the transistor shown in FIG. 12, the first oxide semiconductor film 199a, the second oxide semiconductor film 1 99b, and the third oxide semiconductor film 199c are laminated in this order from the gate insulating film 127 side. The materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are InM1 x Zn y O z (x ≧ 1, y > 1, z > 0, M1 = Ga, Hf, etc.) and can be expressed Use the following materials. However, when Ga is included in the materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c, if the proportion of Ga included is large, specifically, when it can be expressed by a material where X exceeds 10 in InM1ZnO, there is a risk of powder generation during film formation, which is unsuitable. When Ga is included in the materials constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 199c, if the proportion of Ga included is large, specifically, when it can be expressed by a material where X exceeds 10 in InM1ZnO, there is a risk of powder generation during film formation, which is unsuitable. M1 X Zn Y O Z When it can be expressed by a material where X exceeds 10 in InM1ZnO, there is a risk of powder generation during film formation, which is unsuitable. When it can be expressed by a material where X exceeds 10 in InM1ZnO, there is a risk of powder generation during film formation, which is unsuitable.

[0216] Also, the material constituting the second oxide semiconductor film 199b is a material that can be expressed by InM2ZnO (x≧1, y≧x, z>0, M2 = Ga, Sn, etc.). x Zn y O z (x≧1 , y≧x, z>0, M2 = Ga, Sn, etc.).

[0217] The lower end of the conduction band of the first oxide semiconductor film 199a and the lower end of the conduction band of the third oxide semiconductor film 199c are selected appropriately so that the lower end of the conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level to form a well - type structure. The lower end of the conduction band of the first oxide semiconductor film 199a and the lower end of the conduction band of the third oxide semiconductor film 199c are selected appropriately so that the lower end of the conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level to form a well - type structure. The lower end of the conduction band of the first oxide semiconductor film 199a and the lower end of the conduction band of the third oxide semiconductor film 199c are selected appropriately so that the lower end of the conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level to form a well - type structure. The lower end of the conduction band of the first oxide semiconductor film 199a and the lower end of the conduction band of the third oxide semiconductor film 199c are selected appropriately so that the lower end of the conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level to form a well - type structure.

[0218] In the oxide semiconductor film, silicon and carbon, which are one of the Group 14 elements, serve as donor supply sources. Therefore, when silicon or carbon is included in the oxide semiconductor film, the oxide semiconductor film becomes n - type. In the oxide semiconductor film, silicon and carbon, which are one of the Group 14 elements, serve as donor supply sources. Therefore, when silicon or carbon is included in the oxide semiconductor film, the oxide semiconductor film becomes n - type. Therefore, the concentration of each of silicon and carbon included in each oxide semiconductor film is 3×10 / cm or less, preferably 3×10 / cm or less. In particular, to prevent a large amount of Group 14 elements from mixing into the second oxide semiconductor film 199b, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are used to form a carrier path for the second oxide semiconductor film. The concentration of each of silicon and carbon included in each oxide semiconductor film is 3×10 / cm or less, preferably 3×10 / cm or less. In particular, to prevent a large amount of Group 14 elements from mixing into the second oxide semiconductor film 199b, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are used to form a carrier path for the second oxide semiconductor film. 18 / cm 3 The concentration of each of silicon and carbon included in each oxide semiconductor film is 3×10 / cm or less, preferably 3×10 / cm or less. In particular, to prevent a large amount of Group 14 elements from mixing into the second oxide semiconductor film 199b, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are used to form a carrier path for the second oxide semiconductor film. 17 / cm 3 The concentration of each of silicon and carbon included in each oxide semiconductor film is 3×10 / cm or less, preferably 3×10 / cm or less. In particular, to prevent a large amount of Group 14 elements from mixing into the second oxide semiconductor film 199b, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are used to form a carrier path for the second oxide semiconductor film. To prevent a large amount of Group 14 elements from mixing into the second oxide semiconductor film 199b, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are used to form a carrier path for the second oxide semiconductor film. To prevent a large amount of Group 14 elements from mixing into the second oxide semiconductor film 199b, the first oxide semiconductor film 199a and the third oxide semiconductor film 199c are used to form a carrier path for the second oxide semiconductor film. It is preferable to configure to sandwich or surround the semiconductor film 199b. That is, the first oxide semi- conductor film 199a and the third oxide semiconductor film 199c can also be called barrier films that prevent group 14 elements such as silicon and carbon from mixing into the second oxide semiconductor film 199b.

[0219] For example, the atomic ratio of the first oxide semiconductor film 199a can be In:Ga:Zn = 1:3:2, the atomic ratio of the second oxide semiconductor film 199b can be In:Ga:Zn = 3:1:2, and the atomic ratio of the third oxide semiconductor film 199c can be In:Ga:Zn = 1:1:1. Also, the third oxide semiconductor film 199c can be formed by a sputtering method using an oxide target with an atomic ratio of In:Ga:Zn = 1:1:1. Or, the first oxide semiconductor film 199a can be an oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2,

[0220] the second oxide semiconductor film 199b can be an oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:1:1 or In:Ga:Zn = 1:3:2, and the third oxide semiconductor film 199c can be an oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2, to form a three-layer structure. Since the constituent elements of the first oxide semiconductor film 199a to the third oxide semiconductor film 199c are the same, the second oxide semiconductor film 199b has fewer defect levels (trap levels) at the interface with the first oxide semiconductor film 199a. Specifically, the defect levels (trap levels) are

[0221] fewer than the defect levels at the interface between the gate insulating film 127 and the first oxide semiconductor film 199a. Therefore, due to the lamination of the oxide semiconductor films as described above, the transistor's defect levels are reduced. This results in the reduction of defect levels in the transistor. The amount of variation in the threshold voltage due to changes over time and reliability tests can be reduced.

[0222] Further, the lower conduction band edge of the first oxide semiconductor film 199a and the lower conduction band edge of the second oxide semiconductor film 199b is the deepest from the vacuum level compared to the lower conduction band edge of the third oxide semiconductor film 199c By appropriately selecting the materials of the first, second, and third oxide semiconductor films so as to form a well-type structure, it is possible to increase the field-effect mobility of the transistor and at the same time, reduce the amount of variation in the threshold voltage due to changes over time and reliability tests of the transistor. It is possible.

[0223] In addition, oxidesemiconductors with different crystallinities may be applied to the first oxide semiconductor film 199a to the third oxide semiconductor film 199c. That is, a configuration in which single-crystalline oxidesemiconductor, polycrystalline oxidesemiconductor, amorphous oxidesemiconductor, and CAAC-OS are appropriately combined may be used. Also, if an amorphous oxidesemiconductor is applied to any one of the first oxide semiconductor film 199a to the third oxide semiconductor film 199c, internal stress and external stress of the oxidesemiconductor film are relaxed, variations in the characteristics of the transistor are reduced, and the amount of variation in the threshold voltage due to changes over time and reliability tests of the transistor can be reduced. It is possible.

[0224] In addition, the second oxide semiconductor film 199b that can become at least a channel formation region is preferably CAAC -OS. Also, the oxidesemiconductor film on the back channel side, in this embodiment the third oxidesemiconductor film 199c is preferably amorphous or CAAC-OS. By adopting such a structure, the amount of variation in the threshold voltage due to changes over time and reliability tests of the transistor can be reduced.​​

[0225] Note that the configurations shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments.

[0226] (Embodiment 4) A semiconductor device (also referred to as a display device) having a display function can be fabricated using the transistor and capacitor elements shown as an example in the above embodiment. Further, part or all of the drive circuit including the transistor can be integrally formed on the same substrate as the pixel portion to form a system-on-panel. In this embodiment, an example of the display device using the transistor shown as an example in the above embodiment will be described with reference to FIGS. 13 to 15. Note that FIG. 14 is a cross-sectional view showing the cross-sectional configuration of the portion indicated by the one-dot chain line of M-N in FIG. 13(B). Note that in FIG. 14, only a part of the structure of the pixel portion is shown.

[0227] In FIG. 13(A), a sealing material 905 is provided so as to surround a pixel portion 902 provided on a first substrate 901, and is sealed by a second substrate 906. In FIG. 13(A), in a region different from the region surrounded by the sealing material 905 on the first substrate 901, a signal line drive circuit 903 formed of a single crystal semiconductor or a polycrystalline semiconductor on a separately prepared substrate, and a scanning line drive circuit 904 are mounted. Further, various signals and potentials supplied to the signal line drive circuit 903, the scanning line drive circuit 904, or the pixel portion 902 are supplied from an FPC (Flexible printed circuit) 918a or an FPC 918b.

[0228] In FIGS. 13(B) and 13(C), the pixel portion 902 provided on the first substrate 901​​​​​​​​​​​​​​ A sealing material 905 is provided so as to surround the signal line driving circuit 904 and the scanning line driving circuit 904. Also a second substrate 906 is provided over the pixel portion 902 and the scanning line driving circuit 904. Thus the pixel portion 902 and the scanning line driving circuit 904 are sealed together with the display element by the first substrate 901, the sealing material 905, and the second substrate 906. In FIGS. 13(B) and 13(C), a signal line driving circuit 903 formed of a single crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 905 on the first substrate 901. In FIGS. 13(B) and 13(C), various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from the FPC 918. In FIGS. 13(B) and 13(C), a signal line driving circuit 903 formed of a single crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 905 on the first substrate 901. In FIGS. 13(B) and 13(C), various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from the FPC 918. In FIGS. 13(B) and 13(C), a signal line driving circuit 903 formed of a single crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 905 on the first substrate 901. In FIGS. 13(B) and 13(C), various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from the FPC 918. In FIGS. 13(B) and 13(C), a signal line driving circuit 903 formed of a single crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 905 on the first substrate 901. In FIGS. 13(B) and 13(C), various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from the FPC 918. In FIGS. 13(B) and 13(C), a signal line driving circuit 903 formed of a single crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 905 on the first substrate 901. In FIGS. 13(B) and 13(C), various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from the FPC 918. In FIGS. 13(B) and 13(C), a signal line driving circuit 903 formed of a single crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 905 on the first substrate 901. In FIGS. 13(B) and 13(C), various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from the FPC 918. In FIGS. 13(B) and 13(C), a signal line driving circuit 903 formed of a single crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 905 on the first substrate 901. In FIGS. 13(B) and 13(C), various signals and potentials supplied to the signal line driving circuit 903, the scanning line driving circuit 904, or the pixel portion 902 are supplied from the FPC 918.

[0229] Also, FIGS. 13(B) and 13(C) show an example in which the signal line driving circuit 903 is separately formed and mounted on the first substrate 901, but the present invention is not limited to this configuration. The scanning line driving circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted. Also, FIGS. 13(B) and 13(C) show an example in which the signal line driving circuit 903 is separately formed and mounted on the first substrate 901, but the present invention is not limited to this configuration. The scanning line driving circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted. Also, FIGS. 13(B) and 13(C) show an example in which the signal line driving circuit 903 is separately formed and mounted on the first substrate 901, but the present invention is not limited to this configuration. The scanning line driving circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted. Also, FIGS. 13(B) and 13(C) show an example in which the signal line driving circuit 903 is separately formed and mounted on the first substrate 901, but the present invention is not limited to this configuration. The scanning line driving circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted.

[0230] Note that the connection method of the separately formed driving circuit is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, a TCP (Tape Carrier Package) method, or the like can be used. FIG. 13(A) is an example of mounting the signal line driving circuit 903 and the scanning line driving circuit 904 by the COG method, FIG. 13(B) is an example of mounting the signal line driving circuit 903 by the COG method, and FIG. 13(C) is an example of mounting the signal line driving circuit 903 by the TCP method. Note that the connection method of the separately formed driving circuit is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, a TCP (Tape Carrier Package) method, or the like can be used. FIG. 13(A) is an example of mounting the signal line driving circuit 903 and the scanning line driving circuit 904 by the COG method, FIG. 13(B) is an example of mounting the signal line driving circuit 903 by the COG method, and FIG. 13(C) is an example of mounting the signal line driving circuit 903 by the TCP method. Note that the connection method of the separately formed driving circuit is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, a TCP (Tape Carrier Package) method, or the like can be used. FIG. 13(A) is an example of mounting the signal line driving circuit 903 and the scanning line driving circuit 904 by the COG method, FIG. 13(B) is an example of mounting the signal line driving circuit 903 by the COG method, and FIG. 13(C) is an example of mounting the signal line driving circuit 903 by the TCP method. Note that the connection method of the separately formed driving circuit is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, a TCP (Tape Carrier Package) method, or the like can be used. FIG. 13(A) is an example of mounting the signal line driving circuit 903 and the scanning line driving circuit 904 by the COG method, FIG. 13(B) is an example of mounting the signal line driving circuit 903 by the COG method, and FIG. 13(C) is an example of mounting the signal line driving circuit 903 by the TCP method. Note that the connection method of the separately formed driving circuit is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, a TCP (Tape Carrier Package) method, or the like can be used. FIG. 13(A) is an example of mounting the signal line driving circuit 903 and the scanning line driving circuit 904 by the COG method, FIG. 13(B) is an example of mounting the signal line driving circuit 903 by the COG method, and FIG. 13(C) is an example of mounting the signal line driving circuit 903 by the TCP method. Note that the connection method of the separately formed driving circuit is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, a TCP (Tape Carrier Package) method, or the like can be used. FIG. 13(A) is an example of mounting the signal line driving circuit 903 and the scanning line driving circuit 904 by the COG method, FIG. 13(B) is an example of mounting the signal line driving circuit 903 by the COG method, and FIG. 13(C) is an example of mounting the signal line driving circuit 903 by the TCP method.

[0231] In addition, the display device includes a panel in a state where a display element is sealed, and a module in a state where an IC or the like including a controller is mounted on the panel.

[0232] Note that the display device in this specification refers to an image display device, a display device, or a light source (including a lighting device). Also, a module to which a connector, for example, an FPC or a TCP is attached , a module provided with a printed wiring board at the tip of the TCP, or a module in which an IC (integrated circuit) is directly mounted on a display element by the COG method are all included in the display device. It is assumed.

[0233] In addition, the pixel portion and the scanning line driving circuit provided on the first substrate have a plurality of transistors , and the transistors shown in the above embodiment can be applied.

[0234] As the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element), a light emitting element (also referred to as a light emitting display element) can be used. The light emitting element includes, in its category, an element whose luminance is controlled by current or voltage. Specifically, it includes an inorganic EL (Electro Luminescence) element, an organic EL element, etc. Also, a display medium such as electronic ink , whose contrast changes by an electrical action, can also be applied. In FIG. 14 , a cross-sectional view of a liquid crystal display device using a liquid crystal element as the display element is illustrated. The liquid crystal display device illustrated in FIG. 14 is a vertical electric field type liquid crystal display device, but it can also be applied to a horizontal electric field type liquid crystal

[0235] display device. The liquid crystal display device illustrated in FIG. 14 has connection terminal electrodes However, it is also possible. It has a connection terminal electrode 915 and a terminal electrode 916, and the connection terminal electrode 915 and the terminal electrode 916 are electrically connected to the terminals of the PC918 via an anisotropic conductive material 919.

[0236] The connection terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 is formed from the same conductive film as the source and drain electrodes of the transistors 910 and 911.

[0237] Also, the pixel portion 902 provided on the first substrate 901 and the scanning line driving circuit 904 each have a plurality of transistors, and illustrate the transistor 910 included in the pixel portion 902 and the transistor 911 included in the scanning line driving circuit 904. On the transistors 910 and 911, an insulating film 129, an insulating film 131, and an insulating film 924 corresponding to the insulating film 132 shown in Embodiment 1 are provided. Note that the insulating film 923 functions as an underlayer film. On the transistors 910 and 911, an insulating film 129, an insulating film 131, and an insulating film 924 corresponding to the insulating film 132 shown in Embodiment 1 are provided. Note that the insulating film 923 functions as an underlayer film.

[0238] A light-transmissive electrode 928 is formed on the insulating film 923 and is connected to the capacitance wiring 929. A gate insulating film 922 is formed on the electrode 928 and the capacitance wiring 929, and an oxide semiconductor film 927 is formed on the gate insulating film 922. The oxide semiconductor film 927 is connected to the drain electrode of the transistor 910.

[0239] In this embodiment, the transistors shown in the above embodiment can be applied as the transistors 910 and 911. Further, a capacitive element 926 is configured using the electrode 928, the gate insulating film 922, and the oxide semiconductor film 927. The capacitance wiring 929 is ​​​It is formed from the same conductive film as the gate electrodes of transistor 910 and transistor 911. Note that here, the capacitor element 926 is illustrated using the same configuration as the capacitor element 105 shown in Embodiment 1, but other capacitor elements can also be used.

[0240] Also, an example is shown in which a conductive film 917 is provided at a position overlapping the channel formation region of the oxide semiconductor film of transistor 911 for the drive circuit on the insulating film 924. In this embodiment, the conductive film 917 is formed of the same conductive film as the first electrode 930. By providing the conductive film 917 at a position overlapping the channel formation region of the oxide semiconductor film, the variation amount of the threshold voltage of transistor 911 before and after the reliability test can be further reduced. Also the potential of the conductive film 917 may be the same as or different from the gate electrode of transistor 911. For example, the potential of the conductive film 917 may be at GND, 0V, or in a floating state. The conductive film 917 can also function as a second gate electrode (back gate electrode). Also, by controlling the potential of the conductive film 917, the threshold voltage of transistor 911 can be controlled.

[0241] Also, the conductive film 917 also has a function of shielding an external electric field. That is, it has a function of preventing the external electric field from acting on the internal ( circuit portion including the transistor), especially an electrostatic shielding function against static electricity. Due to the shielding function of the conductive film 917, it is possible to prevent the electrical characteristics of the transistor from fluctuating due to the influence of an external electric field such as static electricity. Note that in FIG. 14, although the transistors included in the scanning line drive circuit are illustrated, those included in the signal line drive circuit are also included. The transistor can also have a structure in which a conductive film is provided at a position overlapping with the channel formation region of the oxide semiconductor film on the insulating film 924, similar to the transistor 911. It may be such a structure.

[0242] The transistor 910 provided in the pixel portion 902 is electrically connected to the display element and constitutes the display panel. The display element is not particularly limited as long as it can perform display, and various display elements can be used. It can be used.

[0243] The liquid crystal element 913, which is a display element, includes a first electrode 930, a second electrode 931, and a liquid crystal layer 908. Note that insulating films 932 and 933 that function as alignment films are provided so as to sandwich the liquid crystal layer 908. In addition, the second electrode 931 is provided on the second substrate 906 side, and the first electrode 930 and the second electrode 931 overlap via the liquid crystal layer 908. In addition, the second electrode 931 is provided on the second substrate 906 side, and the first electrode 930 and the second electrode 931 overlap via the liquid crystal layer 908. In addition, the second electrode 931 is provided on the second substrate 906 side, and the first electrode 930 and the second electrode 931 overlap via the liquid crystal layer 908. It is in such a configuration.

[0244] In the first electrode and the second electrode (also referred to as a pixel electrode, a common electrode, a counter electrode, etc.) to which a voltage is applied to the display element, the light extraction direction, the location where the electrode is provided, and the electrode pattern structure can be selected according to the light transmittance and reflectivity. In the first electrode and the second electrode (also referred to as a pixel electrode, a common electrode, a counter electrode, etc.) to which a voltage is applied to the display element, the light extraction direction, the location where the electrode is provided, and the electrode pattern structure can be selected according to the light transmittance and reflectivity. It is sufficient to select the light transmittance and reflectivity according to the light extraction direction, the location where the electrode is provided, and the electrode pattern structure.

[0245] The first electrode 930 and the second electrode 931 can be made of a light-transmissive conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, indium tin oxide added with silicon oxide, etc. In the first electrode and the second electrode (also referred to as a pixel electrode, a common electrode, a counter electrode, etc.) to which a voltage is applied to the display element, the light extraction direction, the location where the electrode is provided, and the electrode pattern structure can be selected according to the light transmittance and reflectivity. In the first electrode and the second electrode (also referred to as a pixel electrode, a common electrode, a counter electrode, etc.) to which a voltage is applied to the display element, the light extraction direction, the location where the electrode is provided, and the electrode pattern structure can be selected according to the light transmittance and reflectivity. In the first electrode and the second electrode (also referred to as a pixel electrode, a common electrode, a counter electrode, etc.) to which a voltage is applied to the display element, the light extraction direction, the location where the electrode is provided, and the electrode pattern structure can be selected according to the light transmittance and reflectivity. It is possible to use a light-transmissive conductive material such as indium tin oxide added with silicon oxide.

[0246] In addition, the first electrode 930 and the second electrode 931 are made of one or more of metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), etc., their alloys, or their metal nitrides. o), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb) , tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium( Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), etc., or one or more of their alloys or their metal nitrides can be used to form them. It is possible to form them using one or more of these materials. It is possible.

[0247] In addition, the spacer 935 is a columnar spacer obtained by selectively etching an insulating film, and is provided to control the distance (cell gap) between the first electrode 930 and the second electrode 931. Note that a spherical spacer may be used. It is provided to control the distance (cell gap) between the first electrode 930 and the second electrode 931. Note that a spherical spacer may be used. When a liquid crystal element is used as the display element, thermotropic liquid crystal, low molecular liquid crystal, high molecular liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions.

[0248] When a liquid crystal element is used as the display element, thermotropic liquid crystal, low molecular liquid crystal, high molecular liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. When a liquid crystal element is used as the display element, thermotropic liquid crystal, low molecular liquid crystal, high molecular liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions.

[0249] In addition, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases and is the phase that appears immediately before the transition from the cholesteric phase to the isotropic phase when the cholesteric liquid crystal is heated. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with a chiral agent is used for the liquid crystal layer to improve the temperature range. In addition, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases and is the phase that appears immediately before the transition from the cholesteric phase to the isotropic phase when the cholesteric liquid crystal is heated. In addition, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases and is the phase that appears immediately before the transition from the cholesteric phase to the isotropic phase when the cholesteric liquid crystal is heated. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with a chiral agent is used for the liquid crystal layer to improve the temperature range. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with a chiral agent is used for the liquid crystal layer to improve the temperature range.

[0250] The first substrate 901 and the second substrate 906 are fixed by a sealing material 925. The sealing The sealing material 925 can use organic resins such as thermosetting resins and photo-curing resins. Also, the sealing material 925 is in contact with the insulating film 924. Note that the sealing material 925 corresponds to the sealing material 905 shown in FIG. 13.

[0251] Also, in the liquid crystal display device, optical members (optical substrates) such as a black matrix (light-shielding film), a polarizing member, a retardation member, an antireflection member, etc. are provided as appropriate. For example, circular polarization by a polarizing substrate and a retardation substrate may be used. Also, a backlight, a side light, etc. may be used as the light source.

[0252] Also, since the transistor is easily damaged by static electricity, etc., it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably configured using a non-linear element.

[0253] FIG. 15 shows an example of forming, on the substrate 901, a common connection portion (pad portion) for electrically connecting to the second electrode 93 1 provided on the substrate 906 in the liquid crystal display device shown in FIG. 14.

[0254] The common connection portion is disposed at a position overlapping with the sealing material for bonding the substrate 901 and the substrate 906, and is electrically connected to the second electrode 931 through the conductive particles contained in the sealing material. Alternatively, a common connection portion may be provided at a location not overlapping with the sealing material (excluding the pixel portion), and a paste containing conductive particles may be separately provided from the sealing material so as to overlap the common connection portion to electrically connect to the second electrode 93 1.

[0255] FIG. 15(A) is a cross-sectional view of the common connection portion and corresponds to I-J in the top view shown in FIG. 15(B).

[0256] The common potential line 975 is provided on the gate insulating film 922 and is fabricated using the same material and the same process as the source electrode 971 or the drain electrode 973 of the transistor 910 shown in Fig. 15(A).

[0257] Also, the common potential line 975 is covered with the insulating film 924, and the insulating film 924 has a plurality of openings at positions overlapping the common potential line 975. These openings are fabricated using the same process as the contact hole that connects one of the source electrode 971 or the drain electrode 973 of the transistor 910 and the first electrode 930.

[0258] Also, the common potential line 975 and the common electrode 977 are connected at the opening. The common electrode 977 is provided on the insulating film 924 and is fabricated using the same material and the same process as the connection terminal electrode 915 and the first electrode 930 of the pixel portion.

[0259] In this way, the common connection portion can be fabricated in common with the fabrication process of the switching element of the pixel portion 902.

[0260] The common electrode 977 is an electrode that contacts the conductive particles contained in the sealing material and is electrically connected to the second electrode 931 of the substrate 906.

[0261] Also, as shown in Fig. 15(C), the common potential line 985 may be fabricated using the same material and the same process as the gate electrode of the transistor 910.

[0262] In the common connection portion shown in Fig. 15(C), the common potential line 985 is provided under the gate insulating film 922 and the insulating film 924, and the gate insulating film 922 and the insulating film 924 have a plurality of openings at positions overlapping the common potential line 985. The opening is the source electrode of the transistor 910 ​​​​​​​​​​​​ A contact hole that connects one of the source electrode 971 or the drain electrode 973 to the first electrode 930 is formed by etching the insulating film 924 in the same process as the contact hole and then selectively etching the gate insulating film 922.

[0263] Also, the common potential line 985 and the common electrode 987 are connected at the opening. The common electrode 987 is provided on the insulating film 924 and is formed of the same material and in the same process as the connection terminal electrode 915 and the first electrode 930 of the pixel portion.

[0264] As described above, by applying the transistor and the capacitor element shown in the above embodiment, a semiconductor device having a capacitor element with an increased charge capacitance while increasing the aperture ratio can be provided. In addition, a semiconductor device with good display quality can be obtained by increasing the aperture ratio.

[0265] Further, since the oxide semiconductor film, which is the semiconductor film of the transistor, has a reduced oxygen deficiency and reduced impurities such as hydrogen and nitrogen, the semiconductor device according to one aspect of the present invention is a semiconductor device having good electrical characteristics.

[0266] Note that the configurations shown in this embodiment can be appropriately combined with the configurations shown in other embodiments.

[0267] (Embodiment 5) A semiconductor device according to one aspect of the present invention can be applied to various electronic devices (including gaming machines). Examples of the electronic device include a television device (also referred to as a TV or a television receiver), a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio reproduction device, ​ Examples include gaming machines (such as pachinko machines and slot machines) and game cabinets. These electronic devices are shown in Fig. 16 as an example.

[0268] Fig. 16(A) shows a table 9000 having a display unit. The table 9000 has a display unit 9003 incorporated in a cabinet 9001, and the display unit 9003 can display an image. Note that a configuration is shown in which the cabinet 9001 is supported by four legs 9002. Also, the cabinet 9001 has a power cord 9005 for power supply.

[0269] The semiconductor device shown in any of the above embodiments can be used for the display unit 9003. Therefore, the display quality of the display unit 9003 can be improved. Also, the reliability of the display unit 900 3 can be increased.

[0270] The display unit 9003 has a touch input function. By touching a display button 9004 displayed on the display unit 9003 of the table 9000 with a finger or the like, screen operations and information input can be performed. Also, by enabling communication with or control of other household appliances, it can also be used as a control device for controlling other household appliances by screen operations. For example, if a semiconductor device having an image sensor function is used, the display unit 9003 can be provided with a touch input function.

[0271] Moreover, by means of a hinge provided on the cabinet 9001, the screen of the display unit 9003 can be set perpendicular to the floor and it can also be used as a television device. In a narrow room, installing a large-screen television device would narrow the free space, but with a table ​​​If a display unit is built in, the space of the room can be effectively utilized.

[0272] FIG. 16(B) shows a television apparatus 9100. The television apparatus 9100 has a display unit 9103 incorporated in a housing 9101, and the display unit 9103 can display an image. Here, a configuration is shown in which the housing 9101 is supported by a stand 9105.

[0273] The operation of the television apparatus 9100 can be performed by an operation switch provided in the housing 9101 or a separate remote control unit 9110. The operation keys 9109 provided on the remote control unit 9110 can be used to operate channels and volume, and can also operate the image displayed on the display unit 9103. Further, the remote control unit 9110 may be configured to include a display unit 9107 for displaying information output from the remote control unit 9110.

[0274] The television apparatus 9100 shown in FIG. 16(B) includes a receiver, a modem, etc. The television apparatus 9100 can receive general television broadcasts by a receiver, and can further be connected to a wired or wireless communication network via a modem to perform one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.

[0275] The semiconductor device shown in any of the above embodiments can be used for the display units 9103 and 9107. Therefore, the display quality of the television apparatus can be improved, and the reliability can be improved.

[0276] FIG. 16(C) is a computer, which includes a main body 9201, a housing 9202, a display unit 9203, a motherboard 9204, an external connection port 9205, a pointing device 9206, etc. .

[0277] The semiconductor device shown in any of the above embodiments can be used for the display unit 9203. Therefore, the display quality of the computer can be improved, and the reliability can be improved. .

[0278] FIGS. 17(A) and 17(B) are foldable tablet terminals. FIG. 17(A) shows the open state. The tablet terminal includes a housing 9630, a display unit 9631a, a display unit 9631b, a display mode switching switch 9034, a power switch 9035, a power saving mode switching switch 9036, a fastener 9033, an operation switch 9038.

[0279] The semiconductor device shown in any of the above embodiments can be used for the display unit 9631a and the display unit 9631b. Therefore, the display quality of the tablet terminal can be improved, and the reliability can be improved. .

[0280] A part of the display unit 9631a can be a touch panel area 9632a, and data can be input by touching the displayed operation keys 9638. Note that, as an example, in the display unit 9631a, a configuration in which half of the area has only a display function and the other half of the area has a touch panel function is shown, but it is not limited to this configuration. A configuration in which all areas of the display unit 9631a have a touch panel function may also be used. For example, the entire surface of the display unit 96 31a can be used to display keyboard buttons to form a touch panel, and the display unit 9631b can be used for display . only. It can be used as a screen.

[0281] Also, in the display unit 9631b, similar to the display unit 9631a, a part of the display unit 9631b can be set as the touch panel area 9632b. Also, when a finger or a stylus touches the position where the keyboard display switching button 9639 is displayed on the touch panel, keyboard buttons can be displayed on the display unit 9631b.

[0282] Also, simultaneous touch input can be performed on the touch panel area 9632a and the touch panel area 9632b.

[0283] Also, the display mode switching switch 9034 can select to switch the display orientation such as portrait or landscape, and switch between black-and-white display and color display. The power-saving mode switching switch 9036 can optimize the display brightness according to the amount of external light detected by the optical sensor built into the tablet terminal during use. The tablet terminal can have not only an optical sensor, but also other detection devices such as sensors for detecting inclination, such as a gyroscope and an acceleration sensor.

[0284] Also, in Fig. 17(A), an example where the display areas of the display unit 9631b and the display unit 9631a are the same is shown, but it is not particularly limited, and they may have different sizes, and the display quality may also be different. For example, one may be a display panel that can perform higher-definition display than the other.

[0285] Fig. 17(B) shows a closed state, and the tablet terminal includes a housing 9630 and a solar cell 96 33 and a charge / discharge control circuit 9634. Note that in FIG. As an example of 4, a configuration having a battery 9635 and a DC-DC converter 9636 It shows.

[0286] In addition, since the tablet device can be folded in half, the housing 9630 can be folded when not in use. Therefore, the display portions 9631a and 9631b can be protected, and thus the display portions 9631a and 9631b can be withstood. This makes it possible to provide a tablet terminal that is highly durable and reliable even from the perspective of long-term use.

[0287] In addition, the tablet terminals shown in Figs. 17(A) and 17(B) can store various information. Functions that display information (still images, videos, text images, etc.), calendars, dates, or times The function to display the information on the display, and the function to operate or edit the information displayed on the display. It has functions such as inputting characters, controlling processes using various software (programs), etc. It is possible.

[0288] The solar cell 9633 attached to the surface of the tablet terminal supplies power to the touch panel, The solar cell 9633 can be supplied to a display unit, a video signal processor, or the like. The battery 9635 can be efficiently charged by providing a battery charger on one or both sides of the housing 9630. The battery 9635 may be a lithium-ion battery. The use of such a device has the advantage of enabling miniaturization.

[0289] The configuration and operation of the charge / discharge control circuit 9634 shown in FIG. 17(B) will be described with reference to FIG. ) shows a block diagram and explains. In FIG. 17(C), a solar cell 9633, a battery 96 35. DCDC converter 9636, converter 9637, switches SW1 to SW3 The display unit 9631 is shown, and the battery 9635, DCDC converter 9636 , converter 9637, and switches SW1 to SW3 are located at positions corresponding to the charge / discharge control circuit 9634 shown in Fig. 17(B).

[0290] First, an example of the operation when power is generated by the solar cell 9633 due to external light will be described. . The power generated by the solar cell becomes a voltage for charging the battery 9635, and is stepped up or down by the DC DC converter 9636. When the power from the solar cell 9633 is used for the operation of the display unit 9631, switch SW1 is turned on, and the converter 9637 steps up or down to the voltage required for the display unit 9631. Also, when the display is not performed on the display unit 9631, SW1 can be turned off and SW2 can be turned on to charge the battery -9635.

[0291] Note that the solar cell 9633 is shown as an example of a power generation means, but is not particularly limited, and the battery 9635 may be charged by other power generation means such as a piezoelectric element (piezo element) or a thermoelectric conversion element (Peltier element). For example, a contactless power transmission module that wirelessly (non-contact) transmits and receives power for charging, or a configuration that combines other charging means may also be used.

[0292] Note that the configurations shown in this embodiment can be appropriately combined with the configurations shown in other embodiments and used.

Description of Reference Numerals

[0293] 100 Pixel portion​​​​ 101 pixels 102 substrate 103 transistor 104 scanning line drive circuit 105 capacitive element 106 signal line drive circuit 107 scanning line 108 liquid crystal element 109 signal line 111 semiconductor film 113 conductive film 115 capacitive line 117 opening 119 semiconductor film 121 pixel electrode 122 electrode 127 gate insulating film 128 insulating film 129 insulating film 130 insulating film 131 insulating film 132 insulating film 133 insulating film 135 conductive film 150 substrate 151 pixel 152 light shielding film 153 transistor 154 counter electrode 156 insulating film 158 insulating film 160 liquid crystal layer 161 pixel 165 capacitive element 167 capacitive line 182 channel protection film 183 transistor 190 transistor 200 transistor 901 substrate 902 pixel section 903 signal line drive circuit 904 scanning line drive circuit 905 sealing material 906 substrate 908 liquid crystal layer 910 transistor 911 transistor 913 Liquid crystal element 915 Connection terminal electrode 916 Terminal electrode 917 Conductive film 918 FPC 919 Anisotropic conductive material 922 Gate insulating film 923 Insulating film 924 Insulating film 925 Sealing material 926 Capacitor element 927 Oxide semiconductor film 928 Electrode 929 Capacitor wiring 930 Electrode 931 Electrode 932 Insulating film 933 Insulating film 935 Spacer 971 Source electrode 973 Drain electrode 975 Common potential line 977 Common electrode 985 Common potential line 987 Common electrode 9000 Table 9001 Housing 9002 Leg 9003 Display unit 9004 Display button 9005 Power cord 9033 Tool 9034 Switch 9035 Power switch 9036 Switch 9038 Operation switch 9100 Television device 9101 Housing 9103 Display unit 9105 Stand 9107 Display unit 9109 Operation key 9110 Remote control operation unit 9201 Main body 9202 Housing 9203 Display unit 9204 Keyboard 9205 External connection port 9206 Pointing device 9630 Housing 9631 Display unit 9633 Solar cell 9634 Charge and discharge control circuit 9635 Battery 9636 DCDC converter 9637 Converter 9638 Operation key 9639 Button 103_1 Transistor 103_2 Transistor 107_1 Scanning line 107_2 Scanning line 107a Gate electrode 109a Source electrode 111_1 Semiconductor film 111_2 Semiconductor film 113_1 Conductive film 113_2 Conductive film 113a Drain electrode 117_1 Opening 117_2 Opening 119_1 Semiconductor film 119_2 Semiconductor film 121_1 Pixel electrode 121_2 Pixel electrode 122_1 Electrode 122_2 Electrode 127a Gate insulating film 127b Gate insulating film 199a Oxide semiconductor film 199b Oxide semiconductor film 199c Oxide semiconductor film 401_1 Pixel 401_2 Pixel 405_1 Capacitor element 405_2 Capacitor element 918a FPC 918b FPC

Claims

1. A pixel having a transistor having a first oxide semiconductor layer as a channel, a capacitor element electrically connected to the transistor, a pixel electrode, and a first insulating layer, The first conductive layer has a region in contact with the upper surface of the first oxide semiconductor layer, The second conductive layer has a region in contact with the upper surface of the first oxide semiconductor layer, At least one of the first conductive layer and the second conductive layer has a region in contact with a side surface of the first oxide semiconductor layer, The pixel electrode has a region in contact with the upper surface of the second conductive layer, The first insulating layer has a region in contact with the upper surface of the first oxide semiconductor layer, The first oxide semiconductor layer has a region overlapping a third conductive layer having a function as a gate electrode of the transistor, The capacitor element has a second oxide semiconductor layer as one electrode, The first insulating layer has a region in contact with the upper surface of the second oxide semiconductor layer, The second oxide semiconductor layer has a region overlapping the pixel electrode, The second oxide semiconductor layer has a region forming a capacitance with a fourth conductive layer located under the second oxide semiconductor layer, In a part of the region where the second oxide semiconductor layer and the fourth conductive layer form a capacitance, the first insulating layer is in contact with the upper surface of the second oxide semiconductor layer, a display device.

2. A pixel having a transistor having a first oxide semiconductor layer as a channel, a capacitor element electrically connected to the transistor, a pixel electrode, and a first insulating layer, The first conductive layer has a region in contact with the upper surface of the first oxide semiconductor layer, The second conductive layer has a region in contact with the upper surface of the first oxide semiconductor layer, At least one of the first conductive layer and the second conductive layer has a region in contact with a side surface of the first oxide semiconductor layer, The pixel electrode has a region in contact with the upper surface of the second conductive layer, The first insulating layer has a region in contact with the upper surface of the first oxide semiconductor layer, The first oxide semiconductor layer has a region overlapping a third conductive layer having a function as a gate electrode of the transistor, The capacitor element has a second oxide semiconductor layer as one electrode, The first insulating layer has a region in contact with the upper surface of the second oxide semiconductor layer, The second oxide semiconductor layer has a region overlapping the pixel electrode and is not in contact with the pixel electrode, The second oxide semiconductor layer has a region that forms a capacitance with a fourth conductive layer located under the second oxide semiconductor layer. A display device, wherein in a part of the region where the second oxide semiconductor layer and the fourth conductive layer form a capacitance, the first insulating layer is in contact with the upper surface of the second oxide semiconductor layer. **Claim 3** A pixel having an organic EL element, a transistor having a first oxide semiconductor layer as a channel, a capacitance element electrically connected to the transistor, and a first insulating layer. The first conductive layer has a region in contact with the upper surface of the first oxide semiconductor layer. The second conductive layer has a region in contact with the upper surface of the first oxide semiconductor layer. At least one of the first conductive layer and the second conductive layer has a region in contact with a side surface of the first oxide semiconductor layer. One electrode of the organic EL element has a region in contact with the upper surface of the second conductive layer. The first oxide semiconductor layer is electrically connected to a first conductive layer having a function as one of a source electrode or a drain electrode of the transistor. The first oxide semiconductor layer is electrically connected to the organic EL element via a second conductive layer having a function as the other of the source electrode or the drain electrode of the transistor. The first insulating layer has a region in contact with the upper surface of the first oxide semiconductor layer. One electrode of the organic EL element has a region in contact with the upper surface of the second conductive layer. The first oxide semiconductor layer has a region overlapping a third conductive layer having a function as a gate electrode of the transistor. The capacitance element has a second oxide semiconductor layer as one electrode. The first insulating layer has a region in contact with the upper surface of the second oxide semiconductor layer. The second oxide semiconductor layer has a region overlapping one electrode of the organic EL element. The second oxide semiconductor layer has a region that forms a capacitance with a fourth conductive layer located under the second oxide semiconductor layer. A display device, wherein in a part of the region where the second oxide semiconductor layer and the fourth conductive layer form a capacitance, the first insulating layer is in contact with the upper surface of the second oxide semiconductor layer. **Claim 4** A pixel having an organic EL element, a transistor having a first oxide semiconductor layer as a channel, a capacitance element electrically connected to the transistor, and a first insulating layer. The first conductive layer has a region in contact with the upper surface of the first oxide semiconductor layer. The second conductive layer has a region in contact with the upper surface of the first oxide semiconductor layer. At least one of the first conductive layer and the second conductive layer has a region in contact with the side surface of the first oxide semiconductor layer. One electrode of the organic EL element has a region in contact with the upper surface of the second conductive layer. The first insulating layer has a region in contact with the upper surface of the first oxide semiconductor layer. The first oxide semiconductor layer has a region overlapping with a third conductive layer having a function as a gate electrode of the transistor. The capacitive element has a second oxide semiconductor layer as one electrode. The first insulating layer has a region in contact with the upper surface of the second oxide semiconductor layer. The second oxide semiconductor layer has a region overlapping with one electrode of the organic EL element and is not in contact with one electrode of the organic EL element. The second oxide semiconductor layer has a region forming a capacitance with a fourth conductive layer located under the second oxide semiconductor layer. In a part of the region where the second oxide semiconductor layer and the fourth conductive layer form a capacitance, the first insulating layer is in contact with the upper surface of the second oxide semiconductor layer, a display device.

5. In any one of Claims 1 to 4, a second insulating layer is provided between the first oxide semiconductor layer and the third conductive layer. The second insulating layer has a laminated structure of a silicon nitride layer and a silicon oxide layer, a display device.

6. In any one of Claims 1 to 5, the first oxide semiconductor layer contains In. the second oxide semiconductor layer contains In, a display device.

7. In any one of Claims 1 to 5, the first oxide semiconductor layer contains In and Zn. the second oxide semiconductor layer contains In and Zn, a display device.

8. In any one of Claims 1 to 5, the first oxide semiconductor layer contains In, Ga, and Zn. the second oxide semiconductor layer contains In, Ga, and Zn, a display device.

Images