System and method for controlling voltage waveform at a substrate during plasma processing

Abstract

To provide systems and methods for controlling a voltage waveform at a substrate during plasma processing.SOLUTION: Systems 300 for controlling a voltage waveform at a substrate during plasma processing include applying a shaped pulse bias waveform to a substrate support assembly 305, the substrate support assembly including an electrostatic chuck 311, a chucking pole 312, a substrate support surface 307, and a power electrode 313 separated from the substrate support surface by a dielectric material layer 314. The methods include the steps of capturing a voltage representative of a voltage at a substrate positioned on the substrate support surface and iteratively adjusting the shaped pulse bias waveform on the basis of the captured signal. In a plasma processing system, a thickness and a composition of the dielectric material layer separating the electrode and the substrate support surface can be selected such that a capacitance between the electrode and the substrate support surface is at least an order of magnitude greater than a capacitance between the substrate support surface and a plasma surface.SELECTED DRAWING: Figure 3

Description

Field

[0001] Embodiments of the present disclosure generally relate to systems and methods for plasma processing of substrates, and more particularly, to systems and methods for controlling voltage waveforms on a substrate during plasma processing of the substrate. Background

[0002] A typical reactive ion etching (RIE) plasma processing chamber includes an RF bias generator that supplies a radio frequency (RF) voltage to a "power electrode", more generally a metal base plate embedded in an "electrostatic chuck" (ESC) commonly referred to as a "cathode". FIG. 1A shows a plot of a typical RF voltage supplied to the power electrode in a typical processing chamber. The power electrode is capacitively coupled to the plasma of the processing system through a ceramic layer that is part of the ESC assembly. Due to the non-linear, diode-like nature of the plasma sheath, rectification of the applied RF electric field occurs, and a direct current (DC) voltage drop, i.e., a "self-bias", appears between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated towards the cathode and thus the etching anisotropy.

[0003] More specifically, the ion directionality, feature profile, and the selectivity of the mask and the stop layer are controlled by the ion energy distribution function (IEDF). In a plasma with an RF bias, the IEDF typically has two peaks at low and high energies and an ion population in between. FIG. 1B shows a plot of a typical IEDF depicted as ion energy distribution versus ion energy. As shown in FIG. 1B, the presence of an ion population between the two peaks of the IEDF reflects the fact that the voltage drop between the cathode and the plasma oscillates at the bias frequency (FIG. 1A). When using a lower frequency, e.g., 2 MHz RF bias generator to obtain a higher self-bias voltage, the energy difference between these two peaks can be quite large, and etching by ions at the low energy peak is more isotropic and may lead to curvature of the feature walls. Compared to high energy ions, low energy ions are less effective in reaching the corners at the bottom of the feature (e.g., due to charging effects), but the sputtering of the mask material is reduced. This is important in high aspect ratio etching applications (e.g., hard mask openings, etc.).

[0004] As the feature size continues to shrink and the aspect ratio increases, the feature profile control requirements become more stringent, while it becomes more desirable to have a properly controlled IEDF on the substrate surface during processing. Any IEDF can be constructed using a single-peak IEDF, including a two-peak IEDF with independently controlled peak heights and peak energies, which is very beneficial for high-precision plasma processing. To generate a single-peak IEDF, it is necessary to have a substantially constant voltage with respect to the plasma on the substrate surface, i.e., the sheath voltage that determines the ion energy. Assuming that the plasma potential (usually zero or close to ground potential in the processing plasma) is constant over time, it is necessary to maintain a substantially constant voltage on the substrate with respect to ground, i.e., the substrate voltage. Since the ion current is constantly charging the substrate surface, this cannot be achieved simply by applying a DC voltage to the power electrode. As a result, the total applied DC voltage will drop across the substrate and the ceramic part of the ESC (i.e., the chuck capacitance), rather than across the plasma sheath (i.e., the sheath capacitance). To overcome this, a special-shaped pulse bias scheme has been developed in which the applied voltage is shared between the chuck capacitance and the sheath capacitance (usually, the substrate capacitance is much larger than the sheath capacitance, so the inventors have ignored the voltage drop across the substrate). This scheme compensates for the ion current, thereby making it possible to keep the sheath voltage and the substrate voltage constant up to 90% of the maximum of each bias voltage cycle. More precisely, this bias scheme makes it possible to maintain a specific substrate voltage waveform, which can be described as a series of periodic short positive pulses on top of a negative DC offset. During each pulse, the substrate potential reaches the plasma potential and the sheath collapses in a short time, but for ~90% of each cycle, the sheath voltage remains constant and equal to the negative voltage jump at the end of each pulse, so the average ion energy is determined. Figure 2A shows a plot of the specially shaped pulse bias voltage waveform developed to generate this specific substrate voltage waveform and thereby keep the sheath voltage substantially constant.As shown in FIG. 2A, the shaped pulse bias waveform has two functions: (1) a positive jump 205 to remove excess charge accumulated on the chuck capacitance during the compensation phase, (2) a sheath voltage (V). SH ) value to set the negative jump 210 (V OUT ) - i.e., V OUT is shared between the chuck capacitance and sheath capacitance connected in series, determining (but typically larger than) the negative jump in the substrate voltage waveform. (3) A negative voltage ramp 215 is included to compensate for the ion current and keep the sheath voltage constant during this long "ion current compensation phase." When the specially shaped pulsed bias voltage waveform of Figure 2A is applied as a bias to the processing chamber, a single-peak IEDF is obtained, as described above and shown in Figure 2B.

[0005] However, the specially shaped pulse bias scheme has several drawbacks that limit its usefulness and complicate its use in commercial etch chambers. Specifically, for ion current compensation to function, the shaped pulse bias supply must have an ESC capacitance (C CK ) and stray capacitance (C STR ) value, which is determined by the chamber conditions and is therefore susceptible to a number of factors (e.g., thermal expansion of components, etc.). Furthermore, the value of the negative jump V in the pulse voltage waveform supplied to the power electrode OUT is shared between the ESC ceramic plate and the plasma sheath, like two capacitors connected in series, so the sheath capacitance (C SHIt is necessary to know the value of . Since the sheath capacitance depends on a number of parameters such as the chemical composition of the gas, the frequency and output of the RF source (via plasma density and temperature), the gas pressure, and the material of the substrate being etched, the evaluation of the sheath capacitance is particularly difficult. Currently, prior to actual processing, the sheath capacitance under a set of plasma conditions must be tabulated and a complete system calibration must be performed. This method is not only time-consuming and cumbersome, but also does not function accurately because the plasma is not completely reproducible. To generate a single-peak IEDF, it is necessary to maintain a predetermined voltage waveform on the substrate, and the negative voltage jump represents an almost constant sheath voltage and thus the average ion energy. C SH and C STR Since an accurate determination of is required, in a practical commercially available etching chamber, the current shaped pulse bias method is inefficient. Overview

[0006] A system and method for processing a substrate effectively provides a properly controlled single-peak ion energy distribution function, for example, during plasma etching processing, by maintaining a predetermined voltage waveform on the substrate. According to various embodiments of this principle, the voltage waveform on the substrate is maintained by capturing a signal (i.e., measuring the voltage with respect to ground) that represents the voltage on the substrate being processed (i.e., having the same waveform shape), and iteratively adjusting the shaped pulse bias waveform applied to each process chamber based on the captured signal. This is done until the desired pulse voltage waveform of the captured signal (and thus the substrate voltage) is achieved. In some embodiments, the value of the negative jump at the end of each pulse is equal to the target ion energy and the voltage between pulses is constant. In some embodiments, the signal representing the voltage on the substrate can be captured using a conductive lead wire in contact with the substrate. Alternatively or additionally, a capacitive circuit proximate to the substrate can be used to capture a signal representing the voltage on the substrate being processed (because all the information needed is contained in the shape of the captured pulse waveform rather than in the DC offset).

[0007] In other embodiments, a signal representing the voltage on the substrate can be captured using a conductive lead wire in contact with a ring of conductors surrounding the substrate. Alternatively or additionally, a capacitive circuit proximate to the conductive ring can be used to capture a signal representing the voltage on the substrate during processing.

[0008] According to an embodiment of the present principle, the target voltage waveform on the substrate is such that (1) during the negative jump (sheath formation) phase of the bias voltage waveform and the substrate voltage waveform, the change in voltage drop due to the chuck capacitance C CK is made negligible compared to the change in voltage drop due to the sheath capacitance C SH and (2) during the ion current compensation phase of the bias voltage waveform, it is maintained by making the current flowing through C STR negligible compared to the current flowing through C CK This is achieved by making the capacitance between the power electrode and the substrate much larger than the sheath capacitance and the floating capacitance, thus reducing the requirements for accurate determination. In some embodiments, this is achieved by selecting the thickness and composition of the dielectric layer such that the capacitance of the dielectric layer between the electrode and the substrate support surface is at least one order of magnitude larger than the capacitance between the substrate surface and the plasma within each processing chamber. Since the change in voltage drop across C CK is negligible compared to that across C SH the shape of the pulsed voltage waveform (i.e., the bias voltage waveform) of the signal applied to the power electrode approximately reproduces the shape of the substrate voltage waveform during the negative jump phase. Thus, as described in the above embodiments, the electrode voltage waveform can be used as a signal representing the substrate voltage waveform. That is, since the negative jump in the electrode voltage waveform is almost equal to the negative jump in the substrate voltage waveform, it can be used as a feedback signal to the shaping pulse bias supply to achieve the target sheath voltage drop and ion energy.

[0009] Alternatively or additionally, to satisfy the conditions (1) and (2) of paragraph 0008 above, the sheath capacitance C can be reduced by applying a voltage (bias) to the chucking electrode of the electrostatic chuck instead of the power electrode. SH and stray capacitance C STR is the chuck capacity C CK The shape of the bias voltage waveform is such that sheath formation (negative jump, V OUT ) phase as well as during the ion current compensation phase, the C due to the ion current must be CK The change in the voltage drop across the two terminals is a negative jump in the bias voltage, V OUT It is understood that the capacitance between the chucking electrode and the substrate support surface must be negligible compared to the capacitance between the chucking electrode and the substrate support surface. This is expected to be the case in many practical situations (for typical ion currents used in processing) since the capacitance between the chucking electrode and the substrate support surface is very large. The above methods and embodiments, as well as other possible embodiments, are described in further detail below.

[0010] In one embodiment, a method for controlling a voltage waveform at a substrate during plasma processing in a plasma processing chamber includes applying a shaped pulsed bias waveform to a substrate support in the plasma processing chamber, where the substrate support includes an electrostatic chuck, a chucking pole, a substrate support surface, and an electrode, capturing a signal representative of a voltage at a substrate disposed on the substrate support surface, and iteratively adjusting the shaped pulsed bias waveform based on the captured signal.

[0011] In one embodiment, the signal representative of the voltage at the substrate is acquired using a conductive lead in contact with at least a portion of the substrate. In another embodiment, the substrate support includes a conductor ring positioned above the electrode, and the signal representative of the voltage at the substrate is acquired using a conductive lead in contact with at least a portion of the conductor ring. In another embodiment, the signal representative of the voltage at the substrate is acquired using a coupling circuit proximate to the conductor ring or proximate to the substrate.

[0012] In another embodiment according to the present principles, a plasma processing system includes a substrate support defining a surface for supporting a substrate to be processed, where the substrate support includes an electrostatic chuck, chucking poles, and an electrode, and further includes a sensor for capturing a signal representative of a voltage at a substrate disposed on the substrate support surface, a bias supply for supplying a shaped pulsed bias waveform to the substrate support, and a controller for receiving the captured signal from the sensor and generating a control signal communicated to the bias supply for adjusting the shaped pulsed bias waveform based on the captured signal.

[0013] In one embodiment, the sensor includes a conductive lead in contact with at least a portion of the substrate. In another embodiment, the sensor includes a conductor ring disposed above the electrode. In another embodiment, the sensor includes a coupling circuit proximate to the substrate.

[0014] In another embodiment, the system includes a conductive lead in contact with at least a portion of the conductor ring. In another embodiment, the system includes a coupling circuit proximate to the conductor ring for transmitting the captured signal to the controller.

[0015] In another embodiment, the shaped pulsed bias waveform is applied to an electrode of the substrate support.In another embodiment, the shaped pulsed bias waveform is applied to a chucking pole.

[0016] In one embodiment, a plasma processing system includes a substrate support including an electrostatic chuck, a chucking pole, and an electrode defining a surface for supporting a substrate to be processed, where the electrode is separated from a substrate support surface by a dielectric layer, the system further includes a plasma disposed above the substrate support surface, and a shaped pulsed bias waveform generator that applies a shaped pulsed bias waveform to the electrode, where the thickness and composition of the dielectric layer are selected such that a capacitance of the dielectric layer between the electrode and the substrate support surface is at least an order of magnitude greater than a capacitance between the substrate support surface and the plasma.

[0017] In one embodiment, the dielectric layer comprises aluminum nitride having a thickness of about 3 to 5 millimeters. In at least one embodiment, a shaped pulse bias waveform is applied to the electrodes of the substrate support, and in another embodiment, the shaped pulse bias waveform is applied to the chucking pole of the substrate support. In some embodiments, the plasma processing system includes a coupling circuit for coupling a shaped pulse bias waveform and a clamp voltage to the substrate support.

[0018] Other and further embodiments of the present disclosure are described below.

Brief Description of the Drawings

[0019] The embodiments of the present disclosure, briefly summarized above and described in more detail below, can be understood by reference to the exemplary embodiments of the present disclosure shown in the accompanying drawings. However, the accompanying drawings merely illustrate typical embodiments of the present disclosure and should not be construed as limiting the scope, as the present disclosure may include other equally effective embodiments. [Figure 1A] A plot of a typical RF voltage supplied to the power electrode in a typical processing chamber is shown. [Figure 1B] A plot of a typical ion energy distribution function caused by an RF bias supplied to the processing chamber is shown. [Figure 2A] A plot of a previously determined special shaped pulse bias developed to keep the sheath voltage of the processing chamber constant is shown. [Figure 2B] A plot of a single peak ion energy distribution function caused by a special shaped pulse bias supplied to the processing chamber is shown. [Figure 3] A high-level schematic diagram of a system suitable for controlling the substrate voltage waveform during plasma processing according to various embodiments of the present principle is shown. [Figure 4] A high-level block diagram of a digitizer / controller suitable for use in the system of FIG. 3 according to one embodiment of the present principle is shown. [Figure 5]4 shows a plan view of an edge ring suitable for use in the system of FIG. 3, in accordance with an embodiment of the present principles; [Figure 6] 1 shows a functional block diagram of a method for controlling plasma processing according to an embodiment of the present principles; [Figure 7] 10 shows a graphical representation of the resulting substrate voltage waveform that is maintained in accordance with an embodiment of the present principles. [Figure 8] FIG. 1 shows a schematic diagram of a transformer coupling circuit for coupling clamping and bias voltages to a chucking pole in accordance with an embodiment of the present principles.

[0020] To facilitate understanding, the same reference numerals have been used, whenever possible, to indicate identical elements common to the figures. The figures may not be drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated in other embodiments without further description. DETAILED DESCRIPTION

[0021] Systems and methods are provided herein for controlling a substrate voltage waveform during plasma processing. The systems and methods of the present invention effectively provide a well-controlled, single-peak ion energy distribution function by maintaining a predetermined voltage waveform at a substrate, for example, during a plasma etch process. Embodiments effectively provide shaping of the voltage waveform to deliver monoenergetic ions without requiring complex modeling or accurate estimation of the plasma sheath capacitance. While embodiments of the present principles will be described primarily with respect to a particular shaped pulse bias, embodiments according to the present principles can be applied to and operate with virtually any bias.

[0022] FIG. 3 shows a high-level schematic diagram of a system 300 suitable for use in substrate processing in accordance with various embodiments of the present principles. The system 300 of FIG. 3 illustratively includes a substrate support assembly 305, a digitizer / controller 320, and a bias supply 330. In the embodiment of FIG. 3, the substrate support assembly 305 includes a support pedestal 302 and an electrostatic chuck (ESC) 311, which includes a chucking electrode 312 (commonly referred to as a chucking pole), which may be a metallic base plate or mesh embedded in the ESC. The ESC has a substrate support surface 307. The chucking electrode 312 is typically coupled to a chucking power supply (not shown), which electrostatically clamps the substrate to the support surface 307 when a voltage is applied. The chucking electrode 312 is embedded in a dielectric layer 314. The support assembly 305 further includes a power electrode 313 within the dielectric layer 314, which separates the power electrode 313 from the substrate support surface 307 of the substrate support assembly 305. In various embodiments, the dielectric layer 314 is formed from a ceramic material such as, for example, aluminum nitride (AlN) and has a thickness of about 5-7 mm, although other dielectrics and / or different layer thicknesses may be used. The substrate support assembly 305 of Figure 3 also typically includes an edge ring 350 provided to confine a plasma used during substrate processing or to protect the substrate from erosion by the plasma.

[0023] In various embodiments, the system 300 of FIG. 3 can include components of a plasma processing chamber (e.g., a SYM3®, DPS®, ENABLER®, ADVANTEDGE™, and AVATAR™ processing chamber, etc., available from Applied Materials, Inc., Santa Clara, Calif.). In the system 300 of FIG. 3, the substrate support assembly 305 illustratively includes an electrostatic chuck 311 for supporting the substrate, although the illustrated embodiment should not be construed as limiting. More specifically, in other embodiments in accordance with present principles, the substrate support assembly 305 in accordance with present principles can include a vacuum chuck, substrate holding clamps, etc. (not shown) for supporting the substrate for processing.

[0024] During operation, a substrate to be processed is placed on the surface of the substrate support assembly 305. Referring back to FIG. 3, a voltage (e.g., a shaped pulse bias) is supplied to the power electrode 313 by the bias supply 330. As described above, the nonlinearity of the plasma sheath rectifies the applied RF electric field, resulting in a direct current (DC) voltage drop, or "self-bias," between the cathode and the plasma. This voltage drop determines the average energy of the plasma ions accelerated toward the cathode. The ion directionality and feature profile are controlled by a well-controlled, single-peak ion energy distribution function (IEDF) (see FIG. 2B). To provide such a single-peak IEDF, the bias supply 330 supplies a specially shaped pulse bias (see FIG. 2A) to the power electrode 313. The applied voltage is shared between the chuck capacitance and the sheath capacitance, compensating for the ion current that constantly charges the surface of the cathode 311. The specially shaped pulse bias allows the sheath voltage to remain constant for up to 90% of the pulse cycle.

[0025] However, for the special shaped pulse bias to function as intended, several capacitance values must currently be known or estimated with some degree of accuracy, which can be very difficult to achieve. In particular, the shaped pulse bias waveform (FIG. 2A) requires that the total voltage supplied to the power electrode 313 be shared between the ESC chuck 311 and the sheath charge (called the "space charge sheath" or "sheath"), which forms in the space between the plasma and the ESC support surface or a substrate disposed thereon. The ESC capacitance C CK can be easily confirmed, but the stray capacitance (C STR ) and sheath capacity (C SH ) is known to vary unpredictably over time. For example, the value of stray capacitance C STR is determined by the conditions within the plasma processing chamber and is therefore affected by factors such as thermal expansion of the processing chamber components.

[0026] Functionally, the ESC and the sheath act as two capacitors connected in series, and since the input voltage waveform applied to one electrode of the ESC capacitor is controlled, it is necessary to know both capacitance values in order to determine how the total applied voltage is shared between the capacitors and how much voltage is applied to the sheath.

[0027] Therefore, the ability to obtain an accurate estimate of the sheath voltage drop in order to obtain a shaped pulse waveform is affected by the ability to accurately determine the sheath capacitance C SH Since the sheath capacitance is a complex function of the applied voltage and plasma parameters (e.g., species density, temperature, etc.), it is difficult to predict analytically.

[0028] The inventors have determined that the properties of the bulk plasma sustained in the processing chamber can also affect the plasma's response to the applied pulse. For example, the plasma density limits the fraction of charge injected into the sheath. Considering the above considerations, a proper evaluation of the sheath capacitance C SH must take into account at least the gas chemical composition, the frequency and output of the RF source (via plasma density and temperature), the gas pressure, and the composition of the substrate being processed. For at least the above reasons, the evaluation of the sheath capacitance is particularly difficult when the plasma conditions are considered not to be fully reproducible.

[0029] According to various embodiments of the present principle, in order to overcome the above drawbacks, the inventors propose to use a feedback signal representing the substrate voltage waveform to maintain the ion energy substantially constant during the processing of the substrate. The inventors have determined that, since the plasma potential is very low and substantially constant, an appropriate estimation of the sheath voltage can be represented by the negative jump of the pulsed voltage waveform at the substrate. More precisely, the substrate voltage waveform approximately reproduces the sheath voltage waveform, but the substrate voltage waveform has a positive DC offset equal to the plasma potential. Thus, in some embodiments according to the present principle, the inventors propose to monitor the signal representing the substrate voltage during the processing of the substrate and communicate the signal representing the substrate voltage to the digitizer / controller 320. Next, the digitizer / controller 320 determines a correction signal and communicates it to the bias supply unit 330 to adjust the shaped pulse bias supplied from the bias supply unit 330 to the power electrode 313 such that the sheath voltage represented by the substrate voltage is maintained constant and / or within an acceptable range of a predetermined voltage level during up to 90% of the shaped pulse bias cycle (during the ion current compensation phase following the negative voltage jump). The inventors have determined that in various embodiments, the ion energy or the sheath voltage can be kept constant within the noise level, and in one embodiment, the ion energy or the sheath voltage can be kept within 1 to 5% of a predetermined level, which is considered constant.

[0030] FIG. 4 shows a high-level block diagram of a digitizer / controller 320 suitable for use in the system 300 of FIG. 3. The digitizer / controller 320 of FIG. 4 includes, by way of example, a general-purpose computer processor that can be used within an industrial setting to control plasma processing in accordance with the present principles. The memory or computer-readable medium 410 of the digitizer / controller 320 may be one or more immediately available memories (e.g., random access memory (RAM), read-only memory (ROM), floppy disk, hard disk, or other form of local or remote digital storage, etc.). To support the processor in a conventional manner, a support circuit 420 is coupled to the CPU 430. These circuits include a cache, a power supply, a clock circuit, an input / output circuit, and subsystems, etc.

[0031] In various embodiments, the methods of the present invention disclosed herein may generally be stored in the memory 410 as software routines 440 that cause the process digitizer / controller 320 to execute the processes of the present principles when executed by the CPU 430 with the assistance of the I / O circuit 450. The software routines 440 may also be stored and / or executed by a second CPU (not shown) that is installed remotely from the hardware controlled by the CPU 430. Some or all of the methods of the present disclosure may also be executed in hardware. Thus, the present disclosure may be executed in software, or in hardware as an application-specific integrated circuit or other type of hardware embodiment, or in a combination of software and hardware, using a computer system. When executed by the CPU 430, the software routines 440 convert a general-purpose computer into a specific-purpose computer (digitizer / controller) 320 that controls a plasma processing chamber so that the methods disclosed herein are executed.

[0032] In one embodiment according to the present principles, and referring back to Figure 3, optional conductive leads (e.g., wires) 352 may be provided in the substrate support assembly 305 of Figure 3 to capture signals representative of the voltage at the substrate during processing. The optional conductive leads 352 in the substrate support assembly 305 are configured such that the conductive leads 352 contact at least a portion (e.g., the backside) of the substrate to be processed when the substrate is placed on the support pedestal 310. The conductive leads 352 may be used to communicate signals representative of the voltage captured at the substrate during processing to the digitizer / controller 320.

[0033] The digitizer / controller 320 evaluates the signals received from the conductive leads 352, and if the substrate voltage changes and / or is not within a predetermined voltage level tolerance, the digitizer / controller 320 determines a control signal to communicate to the bias supply 330, which adjusts the voltage being supplied to the power electrode 313 from the bias supply 330 to keep the substrate voltage constant and / or within a predetermined voltage level tolerance.

[0034] For example, Figure 7 shows a graphical representation of the resulting substrate voltage waveform maintained in accordance with one embodiment of the present principles. As shown in the embodiment of Figure 7, the principles of the present invention allow the voltage waveform at the substrate to be maintained constant over time, for example, during a plasma etch process. That is, as shown in Figure 7, the embodiments of the present principles described herein maintain constant ion energy during processing of the substrate.

[0035] In one embodiment, digitizer / controller 320 performs an iterative process to determine a control signal to communicate with the bias supply. For example, in one embodiment, if it determines that an adjustment to the received voltage is necessary, digitizer / controller 320 communicates a signal to bias supply 330 to adjust the voltage being supplied to power electrode 313 by bias supply 330. After the adjustment, digitizer / controller 320 re-evaluates the substrate voltage. If the voltage captured at the substrate becomes more consistent or is approaching a predetermined voltage level tolerance but requires further adjustment, digitizer / controller 320 communicates another control signal to bias supply 330 to adjust the voltage being supplied to power electrode 313 by bias supply 330 in the same direction. If, after the adjustment, the voltage captured at the substrate is no longer consistent or is further deviating from the predetermined voltage level, digitizer / controller 320 communicates another control signal to bias supply 330 to adjust the voltage being supplied to power electrode 313 by bias supply 330 in the opposite direction. Such adjustments can continue until the substrate voltage remains constant and / or within a predetermined voltage level tolerance. In one embodiment, the digitizer / controller 320 digitizes the voltage signal from the conductive leads 352 and communicates the digitized voltage signal to a bias supply to periodically adjust the shaped pulse bias waveform to maintain the substrate voltage constant and / or within a predetermined voltage level tolerance.

[0036] In other embodiments according to this principle, a signal representing the voltage in the substrate being processed can be captured using the edge ring 350 of the substrate support assembly 305 of FIG. 3. For example, in one embodiment, referring back to FIG. 3, in system 300, the edge ring 350 is used to sense a voltage measurement representing the voltage in the substrate being processed. In one embodiment according to this principle, the edge ring 350 is disposed directly above the power electrode 313 and is large enough to overlap the ends of the power electrode 313. Due to the composition and position of the edge ring 350, the edge ring 350 can be electrically or capacitively coupled to the substrate being processed to sense a signal representing the voltage in the substrate being processed, e.g., a signal within 5-7 percent of the actual voltage in the substrate.

[0037] The inventors experimentally determined this by placing a metal wafer serving as the substrate being processed on the ESC 311, measuring the voltage in the metal wafer, and comparing the voltage measurement in the metal wafer with the voltage measurement obtained using the edge ring 350 under the same conditions. The measurements were within 5-7 percent.

[0038] FIG. 5 shows a plan view of an edge ring 350 suitable for use in the system 300 of FIG. 3 according to one embodiment of this principle. In the embodiment of FIG. 5, the edge ring 350 illustratively surrounds the substrate support surface 307 of the substrate support assembly 305. The edge ring 350 illustratively includes an annular conductor layer 551. The edge ring 350 can optionally further include an annular dielectric layer (not shown) on which the annular conductor layer 551 is disposed. As shown in FIG. 5, there is a small gap, indicated by G, between the outer peripheral edge of the substrate support dielectric layer and / or the outer peripheral edge of the substrate (not shown) and the inner peripheral edge surface of the conductor layer 551 of the edge ring 350 and, optionally, the dielectric layer (not shown) thereunder. Thus, any coupling between the edge ring 350 and the substrate being processed is capacitive rather than galvanic.

[0039] In such an embodiment, referring back to FIG. 3, any conductive lead 353 is configured to contact at least a portion (e.g., the back side) of the edge ring 350. The conductive lead 353 can be used to communicate a signal representing the voltage in the substrate being processed to the digitizer / controller 320, and the signal is electrically and / or capacitively sensed by the edge ring 350.

[0040] The digitizer / controller 320 evaluates the signal indicating the substrate voltage received from the edge ring 350, and when the voltage changes and / or is not within the allowable range of a predetermined voltage level, as described above, the digitizer / controller 320 communicates a control signal to the pulse bias supply 330, and the pulse bias supply adjusts the voltage supplied from the pulse bias supply 330 to the power electrode 313 to keep the voltage in the substrate being processed constant and / or within the allowable range of a predetermined voltage level.

[0041] In other embodiments according to this principle, as described above, instead of using conductive leads, by providing an electrical coupling circuit or a capacitive coupling circuit (not shown), the voltage in the substrate being processed or the sensed voltage in the edge ring can be captured. In such an embodiment, the conductive leads (e.g., conductive leads 352, 353) do not need to contact the substrate being processed or the edge ring 350 to capture their respective voltage signals. Instead, an electrical coupling circuit or a capacitive coupling circuit (not shown) can be used to capture a signal representing the substrate voltage directly from the substrate being processed, or alternatively or additionally, a signal representing the substrate voltage captured from the edge ring that electrically or capacitively senses the voltage in the substrate being processed. In such an embodiment, as described above, the conductive leads can be used to communicate the respective signals from the respective coupling circuits to the digitizer / controller 320.

[0042] FIG. 6 shows a functional block diagram of a method 600 for controlling a substrate voltage waveform during plasma processing, according to one embodiment of the present principle. The process can start at 602, during which a shaped pulse bias waveform is applied to a substrate support in a plasma processing chamber. As described above, in one embodiment according to the present principle, the shaped pulse bias waveform is applied to the power electrode of the substrate support assembly. Next, the process 600 can proceed to 604.

[0043] At 604, a signal representative of the voltage at a substrate disposed on the substrate support assembly of the plasma processing chamber is captured. As described above, in one embodiment, the voltage at the substrate being processed is captured using conductive leads that contact a portion of the substrate being processed. In other embodiments, as described above, the edge ring senses a signal representative of the voltage at the substrate being processed, for example, via electrical coupling and / or capacitive coupling. Conductive leads that contact a portion of the edge ring capture a signal representative of the voltage at the substrate being processed. Next, the process 600 can proceed to 606.

[0044] At 606, the shaped pulse bias waveform is repeatedly adjusted based on the captured signal. As described above, in one embodiment, the captured signal representative of the voltage at the substrate being processed is communicated to a digitizer / controller. The digitizer / controller provides a control signal to the bias supply in response to the received voltage signal, and adjusts the bias waveform at the bias supply to cause the bias supply to adjust the shaped pulse bias waveform applied, for example, to the power electrode, so that the substrate voltage is kept constant and / or within an acceptable range of a predetermined voltage level. Next, the process 600 can be terminated.

[0045] According to other embodiments of the present principle, to overcome the need for complex modeling or accurate estimation of the plasma sheath capacitance C SH , chamber floating capacitance C STR , the inventors have found that (1) during the negative jump (sheath formation) phase of the bias voltage waveform and the substrate voltage waveform, the change in voltage drop due to the chuck capacitance C CK is caused by the sheath capacitance CSH Make it negligible compared to the change in voltage drop caused by (2) During the ion current compensation phase of the bias voltage waveform, C STR The current flowing through C CK Propose to make it negligible compared to the current flowing through C CK The change in voltage drop across both ends is C SH Since it is negligible compared to the voltage drop across both ends, the negative jump (i.e., the bias voltage waveform) of the pulse voltage waveform of the signal applied to the power electrode is approximately equal to the negative jump of the substrate voltage waveform (i.e., the sheath voltage drop and the value of the average ion energy). Therefore, to set the value of the negative jump of the bias voltage waveform that results in the target value of the sheath voltage drop, C SH An exact determination of is not necessary. Furthermore, during the ion current compensation phase, C STR The current flowing through C CK Is much smaller than the current flowing through C S So the total current flowing through the shaping pulse bias supply, the substrate current I CK Is approximately equal to the current flowing through C i Equal to the ion current I flowing into the substrate STR Therefore, to set the slope of the bias voltage ramp that results in a constant substrate voltage during the ion current compensation phase, C S An exact determination of is not necessary. This slope is always I CK / (C STR ) and if C CK >>C STR This slope is approximately equal to I S / C CK In one embodiment according to this principle, the composition and thickness of the dielectric layer between the power electrode and the substrate support surface are such that the chuck capacitance C CK Of the dielectric layer between the power electrode and the substrate support surface is the floating capacitance C STR And the sheath capacitance C SH3, with a shaped pulse bias applied to the power electrode, the ceramic thickness between the power electrode 313 and the substrate support surface can be selected to be about 0.3 mm. Alternatively, with a shaped pulse bias applied to the chucking electrode, the ceramic thickness between the power electrode 313 and the substrate support surface can be selected to be about 3-5 mm, and the ceramic thickness between the chucking electrode 312 and the substrate support surface 307 can be selected to be about 0.3 mm.

[0046] The shape of the bias voltage waveform is determined by sheath formation (negative jump, V OUT ) phase as well as during the ion current compensation phase, C due to the ion current is used to reproduce the shape of the substrate voltage waveform. CK The change in the voltage drop across the two terminals is a negative jump in the bias voltage, V OUT During this phase, the substrate voltage is kept constant, so C CK The rate of change of the voltage drop across it is the rate of change of the bias voltage I required to compensate for the ion current. i / C CK is equal to C CK >>C STR In the case of almost I S Therefore, during the ion current compensation phase of the bias voltage waveform, the total change in bias voltage is equal to I i * T / C CK where T is the duration of the ion current compensation phase. i * T / C CK is the negative jump V of the bias voltage waveform OUTWhen it is much smaller, during the compensation phase of the bias voltage waveform, the voltage ramp can be ignored and the pulse waveform requirements are simplified. In such an embodiment, as described in some of the above embodiments, the shape of the pulse voltage waveform (i.e., the bias voltage waveform) of the signal applied to the power electrode exactly reproduces the shape of the substrate voltage waveform, and during the ion current compensation phase, since this shape can be used as a feedback signal to maintain a predetermined (substantially constant) substrate voltage waveform, condition C CK >> C STR does not necessarily have to be satisfied.

[0047] In another embodiment according to this principle, in order to satisfy conditions (1) and (2) of paragraph 0044 above by making the sheath capacitance C CK and the floating capacitance C SH negligible compared to the chuck capacitance C STR the voltage from the bias supply is supplied to the chucking pole (e.g., a metal base plate or mesh embedded in an electrostatic chuck) rather than to the power electrode.

[0048] For example, referring back to the system 300 of FIG. 3, in one embodiment according to this principle, in order to make the voltage drop due to the chuck capacitance C CK negligible compared to the voltage drop due to the sheath capacitance C SH the voltage (bias) from the bias supply 330 is applied to the chucking electrode 312 of the electrostatic chuck 311 rather than to the power electrode 313. By applying the bias (e.g., a special waveform bias (FIG. 2A)) to the chucking electrode 312 rather than to the power electrode 313, the voltage drop across the chuck capacitance is very small, so the voltage amplitude measurable at the substrate surface substantially approximates the voltage amplitude of the pulse (i.e., does not vary by more than 0 - 5%) at any time during the application of the bias pulse.

[0049] In such an embodiment, it is important to maintain the thickness of the ceramic between the chucking electrode and the substrate support surface at a value that is at least one order of magnitude smaller than the thickness of the ceramic between the power electrode and the substrate support surface. For example, referring back to the system 300 of FIG. 3, in one embodiment where the dielectric layer 314 includes aluminum nitride, the thickness of the ceramic between the chucking electrode 312 and the substrate support surface 307 is about 0.3 mm, while the thickness of the ceramic between the base plate and the wafer is about 3 - 5 mm. Thus, the capacitance increases by at least a factor of 10.

[0050] In an embodiment of a plasma processing system in which a bias voltage is supplied to a chucking pole according to this principle, a DC clamp voltage on the order of -2 kV should also typically be considered to be supplied to the chucking pole. Since the required clamp current is extremely small, in some embodiments, the inventors propose insulating the high voltage DC supply using a large resistor (e.g., 1 MΩ) with a capacitor. The bias (e.g., shaped pulse waveform) can be coupled to the chucking pole using a blocking capacitor or a pulse transformer. For example, FIG. 8 shows a schematic diagram of a transformer coupling circuit 800 for coupling a clamp voltage and a bias voltage to a chucking pole according to one embodiment of this principle. The transformer coupling circuit 800 of FIG. 8 illustratively includes a voltage bias source 802, a clamp voltage source 804, two resistors R1 and R5, and three capacitors C2, C3, and C4. That is, FIG. 8 shows an example circuit that enables the use of a chucking pole for simultaneously applying both a shaped pulse bias and a chucking voltage. In other embodiments (not shown), the bias power supply and the clamp power supply can be integrated into one power supply that can output a desired integrated waveform.

[0051] The above embodiments according to this principle are not mutually exclusive. More specifically, in one embodiment, the chuck capacitance C of the substrate support according to this principle CK is, as described above, the sheath capacitance C SHIt can be made substantially larger, and the signal representing the sheath voltage can be used as a feedback signal for adjusting the shaped pulse bias waveform supplied by the bias supply so that the signal representing the sheath voltage remains constant and / or within an acceptable range of a predetermined voltage level during the ion current compensation phase.

[0052] In such an embodiment, according to this principle, the shaped pulse bias waveform from the bias supply is supplied to the metal base plate or mesh of the electrostatic chuck of the substrate support. Then, the voltage on the substrate being processed is captured and communicated to the controller. The controller determines a control signal to communicate to the bias supply to adjust the shaped pulse bias waveform supplied by the bias supply to the metal base plate or mesh of the electrostatic chuck so that the voltage captured on the substrate remains constant and / or within an acceptable range of a predetermined voltage level during the ion current compensation phase.

[0053] In another such embodiment, the thickness and composition of the dielectric layer separating the power electrode and the substrate support surface are selected such that the capacitance of the dielectric layer (chuck capacitance) is very large compared to the parasitic capacitance and the sheath capacitance. Then, the voltage is captured in the edge ring surrounding the substrate being processed and communicated to the controller. The controller determines a control signal to communicate to the bias supply to adjust the shaped pulse bias waveform supplied by the bias supply to the power electrode of the substrate support so that the voltage captured on the substrate remains constant and / or within an acceptable range of a predetermined voltage level during the ion current compensation phase.

[0054] In another such embodiment, the thickness and composition of the dielectric layer separating the power electrode and the substrate support surface are selected such that, as described above, the capacitance of the dielectric layer (chuck capacitance) is very large compared to the stray capacitance and the sheath capacitance. A voltage is then captured in the substrate being processed and communicated to the controller. The controller determines a control signal communicated to the bias supply to adjust the shaped pulse bias waveform supplied to the power electrode of the substrate support platen by the bias supply so that the voltage captured in the substrate remains constant and / or within an acceptable range of a predetermined voltage level during the ion current compensation phase.

[0055] In another such embodiment, in accordance with this principle, a shaped pulse bias waveform from the bias supply is supplied to the metal base plate or mesh of the electrostatic chuck of the substrate support platen. A voltage is captured in an edge ring surrounding the substrate being processed and communicated to the controller. The controller determines a control signal communicated to the bias supply to adjust the shaped pulse bias waveform supplied to the metal base plate or mesh of the electrostatic chuck by the bias supply so that the voltage captured in the substrate remains constant and / or within an acceptable range of a predetermined voltage level during the ion current compensation phase.

[0056] The foregoing is directed to embodiments of the present disclosure, but other and further embodiments of the present disclosure can be made without departing from the basic scope of the present disclosure.

Claims

1. A method for controlling a voltage waveform on a substrate during plasma processing in a plasma processing chamber, comprising: applying a shaped pulse bias waveform to a substrate support in the plasma processing chamber, the substrate support including an electrostatic chuck, a chucking pole, a substrate support surface, and an electrode, the electrode being separated from the substrate support surface by a dielectric layer, and plasma being disposed on the substrate support surface; capturing a signal representative of the voltage on a substrate disposed on the substrate support surface; iteratively adjusting the shaped pulse bias waveform based on the captured signal; and a method in which the thickness and composition of the dielectric layer are selected such that the capacitance of the dielectric layer between the electrode and the substrate support surface is at least one order of magnitude greater than the capacitance between the substrate support surface and the plasma.

2. The method according to claim 1, wherein a conductive lead wire in contact with at least a part of the substrate is used to capture a signal representative of the voltage on the substrate.

3. The substrate support includes a conductor ring disposed above an electrode that senses a signal representative of the voltage on the substrate, and the signal representative of the voltage on the substrate is captured using at least one of a conductive lead wire in contact with at least a part of the conductor ring or a coupling circuit proximate to the conductor ring. The method according to claim 1.

4. The method according to claim 1, wherein a coupling circuit proximate to the substrate is used to capture a signal representative of the voltage on the substrate.

5. The method according to claim 1, wherein the step of iteratively adjusting includes evaluating a captured signal representative of the voltage on the substrate and, in response to the evaluation, adjusting the shaped pulse bias waveform to maintain the voltage on the substrate constant or to generate a control signal applied to a bias supply to maintain the voltage within a tolerance of a predetermined voltage level.

6. The method according to claim 1, including applying the shaped pulse bias waveform to the electrode of the substrate support.

7. The method according to claim 1, including applying the shaped pulse bias waveform to the chucking pole.

8. A plasma processing system, comprising: A substrate support for supporting a substrate to be processed, the substrate support defining a surface for supporting the substrate and including an electrostatic chuck, a chucking pole, a substrate support surface, and an electrode, wherein the electrode is separated from the substrate support surface by a dielectric layer; a plasma disposed on the substrate support; a sensor for capturing a signal representing a voltage in a substrate disposed on the substrate support surface; a bias supply unit for supplying a shaped pulse bias waveform to the substrate support; a controller that receives the captured signal from the sensor and generates a control signal communicated to the bias supply unit to adjust the shaped pulse bias waveform based on the captured signal; and a plasma processing system, wherein the thickness and composition of the dielectric layer are selected such that the capacitance of the dielectric layer between the electrode and the substrate support surface is at least one order of magnitude greater than the capacitance between the substrate support surface and the plasma.

9. The plasma processing system according to claim 8, wherein the sensor includes a conductive lead wire in contact with at least a part of the substrate.

10. The plasma processing system according to claim 8, wherein the sensor includes a conductor ring disposed above the electrode.

11. The plasma processing system according to claim 10, further comprising a conductive lead wire in contact with at least a part of the conductor ring.

12. The plasma processing system according to claim 10, further comprising a coupling circuit proximate to the conductor ring for transmitting the captured signal to the controller.

13. The plasma processing system according to claim 8, wherein the sensor includes a coupling circuit proximate to the substrate.

14. The plasma processing system according to claim 8, wherein the shaped pulse bias waveform is applied to the electrode of the substrate support.

15. The plasma processing system according to claim 8, wherein the shaped pulse bias waveform is applied to the chucking pole of the substrate support.

16. A plasma processing system, comprising: a substrate support including an electrostatic chuck, a chucking pole, a substrate support surface, and an electrode, the substrate support defining a surface for supporting a substrate to be processed, wherein the electrode is separated from the substrate support surface by a dielectric layer; a plasma disposed above the substrate support surface; and a shaped pulse bias waveform generator for applying a shaped pulse bias waveform to the electrode. A plasma processing system, wherein the thickness and composition of the dielectric layer are selected such that the capacitance of the dielectric layer between the electrode and the substrate support surface is at least one order of magnitude greater than the capacitance between the substrate support surface and the plasma. **Claim 17** The plasma processing system according to claim 16, wherein the dielectric layer comprises aluminum nitride having a thickness of about 3 to 5 mm. **Claim 18** The plasma processing system according to claim 16, wherein the shaped pulse bias waveform is applied to the electrode of the substrate support. **Claim 19** The plasma processing system according to claim 16, wherein the shaped pulse bias waveform is applied to the chucking pole of the substrate support. **Claim 20** The plasma processing system according to claim 16, comprising a coupling circuit for coupling the shaped pulse bias waveform and the clamp voltage to the substrate support.

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