Composite component device and method for manufacturing the same

The composite component device with inverted layers and parallel processing addresses warpage and thermal damage issues in vertical stack SiP, ensuring high reliability and flexibility through stress cancellation and reduced thermal history.

JP7715143B2Active Publication Date: 2025-07-30MURATA MFG CO LTD

Patent Information

Application Number
JP2022205845
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-12-22
Publication Date
2025-07-30
Estimated Expiration
2042-12-22

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Patent Text Reader

Abstract

To provide a composite component device which can suppress occurrence of warpage.SOLUTION: A composite component device includes a plurality of laminated first composite component layers with built-in first electronic components. The first composite component layer includes an electronic component layer having a first main surface and a second main surface facing the first main surface, and a re-wiring layer provided on the first main surface. At least two of the plurality of first composite component layers constitute an inversion layer formed so that the second main surfaces face each other as a pair. The electronic component layer has a first electronic component, a first resin sealing part for sealing the first electronic component, a side wall part arranged so as to take the first electronic component, and an electronic component layer penetration via which penetrates through the side wall part and is electrically connected to the re-wiring layer. The first electronic component is directly bonded to the re-wiring layer.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present disclosure relates to a composite component device and a method for manufacturing the same.

Background Art

[0002] Conventionally, as a vertically stacked system-in-package structure, for example, there is a vertical stack system-in-package (vertical stack SiP) described in FIG. 10 of Japanese Patent Application Laid-Open No. 2018-514088 (Patent Document 1). This vertical stack SiP includes first to third molding compounds (125, 155, 185), first to third redistribution layers (130, 160, 190) disposed therebetween, and second to third level conductive pillars (140, 170) that electrically connect between the first to third redistribution layers (130, 160, 190). Dies (electronic components) (110, 142, 172) are respectively encapsulated in the molding compounds (125, 155, 185). In the second molding compound (155), a pair of dies (142) are stacked back to back.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, the present inventor has found the following problems in the vertical stack SiP as described above. That is, in the second molding compound (155) in which a pair of dies (142) are stacked back to back, the amount of resin increases due to the vertical stacking of the dies (142), and as a result, the internal stress in the second molding compound (155) increases, and there is a risk of warpage. In the manufacture of vertical stacked SiP, each molding compound is sequentially stacked and manufactured. Since heating is performed every time each molding compound is formed, heat in the package is difficult to be released, and the die (142) is likely to be thermally damaged. And since the thermal damage accumulates as it is, the die deteriorates and the component life is shortened, and there is a risk that the long-term reliability of the vertical stacked SiP decreases. Furthermore, since heating is performed every time each molding compound is formed as described above, the already formed molding compound is heated multiple times. As a result, the vertical stacked SiP may accumulate a thermal history and its long-term reliability may decrease.

[0005] Therefore, an object of the present disclosure is to provide a composite component device capable of suppressing the occurrence of warpage. Another object of the present disclosure is to provide a method for manufacturing a composite component device that suppresses the occurrence of warpage and has high long-term reliability.

Means for Solving the Problems

[0006] The inventor has intensively studied to solve the above problems, and in a composite component device including a plurality of first composite component layers, obtained the knowledge that the stress generated in the first composite component layer is offset by the stress generated in the adjacent first composite component layer. Based on such technical knowledge, the present disclosure having a plurality of first composite component layers with inverted layers facing each other in pairs was conceived. That is, the present disclosure includes the following aspects.

[0007] To solve the above problems, a composite component device according to an aspect of the present disclosure is A composite component device including a plurality of stacked first composite component layers each containing a first electronic component, The first composite component layer includes an electronic component layer having a first main surface and a second main surface facing the first main surface, and a redistribution layer provided on the first main surface, At least two of the plurality of first composite component layers form an inverted layer formed in pairs such that the second main surfaces face each other, The electronic component layer includes the first electronic component, a first resin encapsulation portion that encapsulates the first electronic component, a sidewall portion disposed so as to incorporate the first electronic component, and an electronic component layer through-via that penetrates the sidewall portion and is electrically connected to the redistribution layer. The first electronic component is directly bonded to the redistribution layer.

[0008] In the composite component device according to one aspect of the present disclosure, a plurality of first composite component layers are arranged in pairs so that the second main surfaces of the first composite component layers face each other to form an inversion layer. By forming the inversion layer with a pair of first composite component layers in this way, the resin encapsulation portion can be divided into two. Thereby, internal stress can be reduced, and the occurrence of warpage of the entire composite component device can be suppressed. Further, by using a pair of first composite component layers that form the inversion layer, the directions of the internal stresses generated in each first composite component layer in the inversion layer are likely to be exactly opposite to each other. As a result, the internal stresses in the inversion layer are likely to cancel each other out, and the occurrence of warpage of the entire composite component device is suppressed. Therefore, the composite component device according to this aspect can suppress the occurrence of warpage.

[0009] A method for manufacturing a bias in a composite component, which is another aspect of the present disclosure, is a method for manufacturing the above-described composite component device, an electronic component bonding step of bonding the first electronic component to the silicon base layer such that the component electrodes of the first electronic component contact the bottom surface of the silicon base layer having a lattice-shaped sidewall portion and bottom surface via an electronic component adhesive layer, an electronic component encapsulation step of encapsulating the first electronic component with resin to form a resin encapsulation portion, an electronic component layer precursor manufacturing step of removing the silicon base layer and the electronic component adhesive layer so as to expose the entire surface of the component electrode to produce an electronic component layer precursor, an electronic component layer precursor bonding step of bonding the electronic component layer precursors so that the main surfaces of the two electronic component layer precursors where the component electrodes are not exposed face each other to produce a pair of electronic component layer precursors, An electronic component layer through-via penetrating the side wall portions of the pair of electronic component layer precursors, and a reverse layer precursor manufacturing step of forming a rewiring layer on one main surface where the component electrodes of the pair of electronic component layer precursors are exposed to produce a reverse layer precursor, A reverse layer manufacturing step of forming a rewiring layer on the other main surface of the reverse layer precursor located on the opposite side of the one main surface to form a reverse layer, A lamination step of laminating the pair of separately manufactured electronic component layer precursors and one of the separately manufactured electronic component layer precursors on the rewiring layer of the reverse layer precursor, A wiring formation step of forming an electronic component layer through-via and a rewiring layer on the laminated pair of electronic component layer precursors and one of the laminated electronic component layer precursors comprising: The step combining the lamination step and the wiring formation step is executed 0 or more times.

[0010] In the manufacturing method of the composite component device according to this aspect, the electronic component layer precursors can be processed in parallel. Therefore, it is difficult for heat history to accumulate in the laminated reverse layer or composite component layer in the lamination step and the wiring formation step. Thereby, by suppressing thermal damage to the electronic components, deterioration of the electronic components can be suppressed. Therefore, the manufacturing method of the composite component device according to this aspect can provide a composite component device having high long-term reliability.

Effects of the Invention

[0011] According to the composite component device according to one aspect of the present disclosure, warpage can be suppressed. According to the manufacturing method of the composite component device according to another aspect of the present disclosure, a composite component device having high long-term reliability can be manufactured.

Brief Description of the Drawings

[0012]

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Modes for Carrying Out the Invention

[0013] Hereinafter, a composite component device according to an aspect of the present disclosure will be described in detail with reference to the illustrated embodiments. Note that the drawings include some schematic ones and may not reflect actual dimensions or ratios.

[0014] In the present disclosure, "contact" means that the target member physically touches another member directly (without an intervening member) or indirectly (with an intervening member). In the present disclosure, "bond" means that the target member is physically joined to another member directly (without an intervening member) or indirectly (with an intervening member). In the present disclosure, "adhere" means that the target member is physically connected to another member directly (without an intervening member) or indirectly (with an intervening member). In the present disclosure, "electrically connect" means that the target member is electrically conductive to another member directly (without an intervening member) or indirectly (with an intervening member).

[0015] <First Embodiment: Composite Component Device> The composite component device according to the first embodiment is a composite component device including a plurality of stacked first composite component layers each containing a first electronic component, wherein the first composite component layer includes an electronic component layer having a first main surface and a second main surface facing the first main surface, and a redistribution layer provided on the first main surface, at least two of the plurality of first composite component layers form an inversion layer formed in pairs such that the second main surfaces face each other, the electronic component layer has a first electronic component, a first resin encapsulation portion encapsulating the first electronic component, a side wall portion arranged to take in the first electronic component, and an electronic component layer through-via penetrating the side wall portion and electrically connected to the redistribution layer, the first electronic component is directly bonded to the redistribution layer.

[0016] [Operation Mechanism] The composite component device according to the first embodiment can suppress the occurrence of warpage. Although not bound by a specific theory, the reason is presumed as follows. In the composite component device according to the first embodiment, a plurality of first composite component layers form an inversion layer in which the second main surfaces of the first composite components face each other in pairs of two. By forming the inversion layer with a pair of first composite component layers in this way, the first resin sealing portion can be divided into two. As a result, the internal stress can be reduced, and the occurrence of warpage in the entire composite component device can be suppressed. In addition, by forming the inversion layer with a pair of first composite component layers, the directions of the internal stresses generated in each first composite component layer in the inversion layer are likely to be exactly opposite to each other. As a result, the internal stresses in the inversion layer are likely to cancel each other out, and the occurrence of warpage in the entire composite component device is suppressed. Therefore, the composite component device according to the first embodiment can suppress the occurrence of warpage.

[0017] Furthermore, the composite component device according to the first embodiment is also excellent in rigidity. Although not bound by a specific theory, the reason is presumed as follows. In the composite component device according to the first embodiment, a plurality of first composite component layers form an inversion layer in which the second main surfaces of the first composite components face each other in pairs of two. Further, the electronic component layer has side wall portions arranged so as to incorporate the first electronic components. For this reason, it is difficult to cause deformation (dimensional change: for example, expansion / contraction, bending, and torsion) with respect to internal stress. Therefore, the composite component device according to the first embodiment is excellent in rigidity.

[0018] [Configuration of the composite component device] The configuration of the composite component device according to the first embodiment will be described with reference to FIGS. 1, 2, and 3. FIG. 1 is a diagram schematically showing a cross section of the composite component device according to the first embodiment of the present disclosure. FIG. 2 is an enlarged view of part A in FIG. 1. FIG. 3 is a cross-sectional view taken along line I-I in FIG. 1.

[0019] As shown in FIG. 1, the composite component device 1 includes two stacked first composite component layers 100 and 200, and further includes one second composite component layer 900. In FIG. 1, the direction parallel to the thickness of the composite component device 1 is defined as the Z direction, the forward Z direction is the upper side, and the reverse Z direction is the lower side. In the cross-section of the composite component device 1 shown in FIG. 1, the direction perpendicular to the Z direction is defined as the X direction. The direction perpendicular to the cross-section of the composite component device 1 shown in FIG. 1 is defined as the Y direction.

[0020] [First composite component layer, inversion layer] Two adjacent first composite component layers 100 and 200 form an inversion layer 10 arranged in pairs such that the second main surfaces 112 and 212 face each other. In the inversion layer 10, since the first composite component layer 100 and the first composite component layer 200 face each other, even if internal stress is generated in each of the first composite component layers 100 and 200, the directions of the respective internal stresses are likely to be exactly opposite, and the internal stress in the inversion layer 10 is easily canceled out. As a result, the occurrence of warping in the entire composite component device 1 is suppressed.

[0021] From the perspective of further suppressing the occurrence of warping in the composite component device 1, in the inversion layer 10, the first composite component layer 100 and the first composite component layer 200 are preferably symmetric (line-symmetric) with respect to the adhesive layer 130 corresponding to their interface. For example, if at least one of the configurations of the first composite component layers 100 and 200 (more specifically, the electronic component layers 110 and 210, the redistribution layers 120 and 220, the first electronic components 113 and 213, the side wall portions 115 and 215, the first resin encapsulation portions 117 and 217, the through vias 119 and 219 of the electronic component layers, and the arrangement positions, numbers, types, dimensions, and shapes, etc. of the adhesive layer 130) are in a line-symmetric relationship with each other, the directions of the internal stresses generated in each of the first composite component layers 100 and 200 are likely to be exactly opposite, and the occurrence of warping is more suppressed.

[0022] From the perspective of further suppressing the warping of the composite component device 1, in the inversion layer 10, it is preferable that at least a part of the materials constituting the members of the first composite component layer 100 and the first composite component layer 200 is the same with respect to the adhesive layer 130 corresponding to the interface therebetween. For example, in addition to the configurations of the first composite component layers 100 and 200 being in a line-symmetric relationship with each other, if at least a part of the materials constituting the members (more specifically, the materials constituting the first electronic components 113 and 213, the side wall portions 115 and 215, the first resin encapsulation portions 117 and 217, the through vias 119 and 219 in the electronic component layer, and the adhesive layer 130) is the same with each other, the directions of the internal stresses generated in each of the first composite component layers 100 and 200 are likely to be exactly opposite, and the generation of warping is further suppressed.

[0023] The composite component device 1 includes two first composite component layers 100 and 200, but may include three or more first composite component layers. In the first embodiment, since the configuration of the first composite component layer 200 is substantially the same as that of the first composite component layer 100, hereinafter, the first composite component layer 100 will be taken as an example for description. However, the different parts will be described separately.

[0024] The first composite component layer 100 includes an electronic component layer 110 and a redistribution layer 120 provided on the first main surface 111 of the electronic component layer 110.

[0025] (Electronic component layer) The electronic component layer 110 has a first main surface 111 and a second main surface 112 facing the first main surface 111. The electronic component layer 110 is adhered (bonded) to the redistribution layer 120 on the first main surface 111, and is adhered to the second main surface 212 of the first composite component layer 200 via the adhesive layer 130 on the second main surface 112. The electronic component layer 210 has a first main surface 211 and a second main surface 212 facing the first main surface 211. The electronic component layer 210 is adhered to the redistribution layer 220 on the first main surface 211, and is adhered to the second main surface 112 of the first composite component layer 100 via the adhesive layer 130 on the second main surface 212. Here, as will be described later, the redistribution layers 120 and 220 are, for example, sheets or substrates of multilayer wiring layers, and have, for example, wiring (conductive wiring) and a dielectric film including an inorganic material (inorganic insulating material).

[0026] The electronic component layer 110 includes a first electronic component 113, a first resin encapsulation portion 117 that encapsulates the first electronic component 113, a side wall portion 115 disposed to incorporate the first electronic component 113, and an electronic component layer through-via 119 that penetrates the side wall portion 115 and is electrically connected to the redistribution layer 120.

[0027] The electronic component layer 110 can have a plurality of first electronic components 113 per layer. When the electronic component layer 110 has a plurality of first electronic components 113 per layer, the first composite component layer 100 can function as an electronic substrate alone in one layer. Therefore, the composite component device 1 according to the first embodiment can be made thinner. Further, when the electronic component layer 110 has a plurality of first electronic components 113 per layer, the plurality of first electronic components 113 (types) may be different.

[0028] -First Electronic Component- One or more first electronic components 113 can be arranged in the electronic component layer 110. The first electronic component 113 is encapsulated in the electronic component layer 110 by the first resin encapsulation portion 117. When there are a plurality of first electronic components 113 in the electronic component layer 110, those first electronic components 113 may be the same or different from each other. The thickness of the first electronic component 113 is, for example, 80 to 120 μm.

[0029] The first electronic component 113 is directly bonded to the redistribution layer 120. In other words, all the first electronic components 113 in the electronic component layer 110 are arranged in the electronic component layer 110 such that their first surfaces 113a are located on the side of the redistribution layer 120 with respect to the second surfaces 113b. The same applies to all the first electronic components 213 in the electronic component layer 210. Thus, since the wiring of the composite component device 1 is simple, not only two layers but also three or more layers of composite component layers can be stacked. That is, in the composite component device according to the present disclosure, since the multilayerization of the first composite component layer is facilitated, it is easy to adjust the number of layers according to the application, and the degree of freedom in design is high.

[0030] The first electronic component 113 is an electronic component in which one or more elements are integrated in a substance similar to the substance constituting the side wall portion 115, for example. The first electronic component 113 is an electronic component (small-sized electronic component) with a smaller size compared to the second electronic component 913 described later. The first electronic component 113 is relatively easy to miniaturize and lower in height in terms of its structure, and / or is generally an electronic component with a relatively large amount of heat generation. Examples of such a first electronic component 113 include active components (more specifically, CPU, GPU, LSI, etc.) and passive components (more specifically, capacitors (more specifically, low-capacitance capacitors, etc.), resistors, SAW, inductors, etc.).

[0031] The first electronic component 113 includes an electronic component main body portion 113c having a first surface 113a perpendicular to the thickness direction and a second surface 113b facing the first surface 113a, and a plurality of component electrodes 113d disposed on the first surface 113a and electrically connected to the redistribution layer 120. The first electronic component 113 further has an insulating portion 113e disposed between the plurality of component electrodes 113d.

[0032] The electronic component main body portion 113c includes, for example, ceramic or a semiconductor material (more specifically, silicon, etc.).

[0033] The component electrode 113d is directly joined to the redistribution layer 120 and is electrically connected to the redistribution layer 120. The component electrode 113d is, for example, Cu, Ni, Sn, Al, and alloys containing these as the conductive material. The thickness of the component electrode 113d is, for example, 1 μm to 30 μm, preferably 5 μm or less. The component electrode 113d can be thinned to a thickness of 1 to 5 μm. The thickness of the component electrode 113d can be, for example, 1 / 4 to 1 / 6 times the thickness of the electronic component main body portion 113c.

[0034] The insulating portion 113e functions as a layer that electrically insulates between the component electrodes 113d. The thickness of the insulating portion 113e is, for example, 1 to 30 μm, preferably 5 μm or less. The insulating portion 113e can be thinned to a thickness of 1 to 5 μm. The thickness of the insulating portion 113e can be, for example, 1 / 4 to 1 / 6 times the thickness of the electronic component main body portion 113c. The thickness of the insulating portion 113e may be the same as that of the component electrode 113d. In such a case, the surface of the insulating portion 113e and the surface of the component electrode 113d are flush.

[0035] -Resin encapsulation portion- The first resin encapsulation portion 117 encapsulates the first electronic component 113. The first resin encapsulation portion 117 contains a resin (for example, an epoxy resin) and can integrate the first electronic component 113 with the resin. Since the first electronic component 113 can be integrated with the resin, even when two or more first electronic components 113 have different dimensions and shapes from each other, the two or more first electronic components 113 can be arranged in the electronic component layer 110. Thereby, a highly flexible design becomes possible, and two or more first electronic components 113 can be combined according to the application. For example, the composite component device 1 can incorporate different types of first electronic components 113.

[0036] Examples of the epoxy resin constituting the first resin encapsulation portion 117 include thermosetting resins containing repeating units derived from benzocyclobutene (BCB) (more specifically, 1,3-divinyl-1,1,3,3-tetramethyldisiloxane-bis-benzocyclobutene (DVS-bis-BCB), etc.). Examples of commercially available epoxy resins include "CYCLOTENE" manufactured by Dow Chemical.

[0037] In the electronic component layers 110 and 210, the resins constituting the first resin encapsulation portions 117 and 217 may be the same as or different from each other. Here, being different from each other includes the case where a part is different. For example, in the second embodiment, there are three electronic component layers 110, 210, and 310. That the types of the above resins are different from each other includes the aspect that the resin constituting the first resin encapsulation portions 117 and 217 is different from the resin constituting the first resin encapsulation portion 317, and the aspect that the resin constituting the first resin encapsulation portion 117, the resin constituting the first resin encapsulation portion 217, and the resin constituting the first resin encapsulation portion 317 are different from each other.

[0038] When the types of the resins constituting the first resin encapsulation portions 117 and 217 are different from each other, for example, different functions (more specifically, high thermal conductivity (high heat dissipation), thermal expansibility, low moisture absorption, etc.) can be imparted to each of the first resin encapsulation portions 117 and 217 by making the constituent resins different for each composite component layer. For example, high thermal conductivity can be imparted to the first resin encapsulation portion 117, and low moisture absorption can be imparted to the first resin encapsulation portion 217. Examples of commercially available resins with high thermal conductivity include, for example, "CV8511" manufactured by Panasonic Corporation and "G780" manufactured by Sumitomo Bakelite Co., Ltd.

[0039] Note that the "thermal expansibility of the resin" as used herein refers to the property of the resin to expand in volume when heat is applied to the resin. Examples of physical property values indicating thermal expansibility include, for example, the linear expansion coefficient.

[0040] The first resin sealing portion 117 may further contain a filler from the viewpoint of improving the thermal conductivity (heat dissipation property) of the first resin sealing portion 117. Examples of the material of the filler for improving the thermal conductivity include inorganic materials. Examples of such inorganic materials include alumina (Al2O3), silicon oxide (SiO2), silicon nitride (Si3N4), boron nitride (BN), and aluminum nitride (AlN). Among these, aluminum nitride is preferable from the viewpoint of further improving the thermal conductivity of the first composite component layer 100. Examples of commercially available resins containing inorganic fillers include "R4507" (inorganic filler: SiO2) manufactured by Nagase ChemteX Corporation.

[0041] -Side wall portion- As shown in FIG. 2 in addition to FIG. 1, the side wall portion 115 is arranged so as to surround the first electronic component 113. More specifically, it is arranged around the electronic component layer 110 so as to surround the whole of one or more first electronic components 113. The electronic component layer through-hole 119 penetrates the inside of the side wall portion 115. The side wall portion 115 has a substantially rectangular shape in a cross-sectional view (ZX cross-section), is connected to the first composite component layer 200 via the adhesive layer 130 on its upper surface, and adheres to the rewiring layer 120 on its lower surface. The thickness of the side wall portion 115 is, for example, 50 to 150 μm.

[0042] The side wall portion 115 preferably contains a material (for example, an inorganic material) having a smaller linear expansion coefficient than the material (resin) of the first resin sealing portion 117. When the side wall portion 115 contains a material having a smaller linear expansion coefficient than the material of the first resin sealing portion 117, the volume in which the side wall portion 115 exists and the amount of the resin that shrinks in the first resin sealing portion 117 can be reduced, and thereby, the composite component device 1 can suppress the occurrence of warping.

[0043] The side wall portion 115 preferably consists substantially of silicon (Si) among the above inorganic materials. In this specification, "consisting substantially of" means that the object (in the above case, the side wall portion 115) is composed of a specific material (silicon in the above case) at a ratio of 95% by mass or more, 97% by mass or more, 99% by mass or more, or 100% by mass. When the side wall portion 115 consists substantially of silicon, silicon has excellent workability and can form a processed surface that accurately reflects the design. Therefore, for the electronic component layer through via 119 penetrating the side wall portion 115, it is possible to miniaturize the wiring width and reduce the connection resistance of the wiring. Thus, when the side wall portion consists substantially of silicon, the composite component device 1 according to the first embodiment has high reliability.

[0044] -Electronic component layer through via- The electronic component layer through via is provided so as to be substantially parallel to the stacking direction (Z direction) of the first composite component layers 100 and 200. More specifically, the electronic component layer through via 119 penetrates the electronic component layer 110 in the Z direction and further penetrates the adhesive layer 130. As shown in FIG. 2, the electronic component layer through via 119 has a conductive via 119a penetrating the adhesive layer 130 and a side wall through via 119b penetrating the side wall portion 115. The conductive via 119a electrically connects the electronic component layer through via 119 and the electronic component layer through via 219 of the first composite component layer 200. In a plane perpendicular to the thickness direction of the composite component device 1, the cross-sectional area of the conductive via 119a (cross-sectional area in the XY plane) is larger than the cross-sectional area of the side wall through via 119b. Therefore, the electrical connection between the electronic component layer through via 119 and the electronic component layer through via 219 is good, and the connection resistance between the first composite component layers 100 and 200 is reduced. Thus, the reliability of the composite component device 1 according to the first embodiment is further improved.

[0045] The electronic component layer through via 119 preferably consists substantially of copper. When the electronic component layer through via 119 consists substantially of copper, since copper is a good conductive material, the electrical resistance of the wiring is reduced.

[0046] Referring to FIG. 3 in addition to FIG. 1, the arrangement of the electronic component through vias 119 will be described. FIG. 3 is a cross-sectional view taken along line I-I in FIG. 1. A plurality of electronic component through vias 119 are provided so as to be arranged in an aligned manner surrounding the first electronic component 113 and the first resin encapsulation portion 117 in the XY cross-section of FIG. 3 (that is, a cross-section perpendicular to the stacking direction of the first composite component layers 100 and 200).

[0047] In this specification, the "aligned arrangement" refers to an arrangement in which the distances at equal intervals (hereinafter also referred to as "distance L1") are arranged on straight lines orthogonal to each other in a plan view. When there are a plurality of straight lines constituting the orthogonality, the plurality of parallel straight lines are adjacent to each other at a distance of distance L1.

[0048] Taking FIG. 3 as an example, the "aligned arrangement" will be described in detail. As shown in FIG. 3, a plurality of electronic component through vias 119 are provided so as to be arranged in an aligned manner surrounding the first resin encapsulation portion 117. On the upper side of the paper surface of FIG. 3, the plurality of electronic component through vias 119 are arranged at equal intervals of distance L1 on two straight lines parallel to the X direction. These two straight lines are adjacent to each other at the same distance as the distance L1 between adjacent electronic component through vias 119. The same applies to the plurality of electronic component through vias 119 on the lower side of the paper surface of FIG. 3. On the other hand, on the left side of the paper surface of FIG. 3, the plurality of electronic component through vias 119 are arranged at equal intervals of distance L1 on two straight lines parallel to the Y direction (orthogonal to the X direction). These two straight lines are adjacent to each other at the same distance as the distance L1 between adjacent electronic component through vias 119. The same applies to the plurality of electronic component through vias 119 on the right side of the paper surface of FIG. 3.

[0049] (Redistribution layer) The rewiring layer 120 is formed on the first main surface 111 of the electronic component layer 110. The rewiring layer 120 is electrically connected to the component electrode 113d of the first electronic component 113 and the through-hole via 119 of the electronic component layer. Since the rewiring layer 120 is directly bonded to the first electronic component 113 (component electrode 113d thereof), the length of the via wiring between the rewiring layer 120 and the component electrode 113d can be reduced. Therefore, the composite component device 1 according to the first embodiment can be miniaturized and thinned, and the electrical resistance of the via wiring can also be reduced.

[0050] The rewiring layer 120 is a multilayer wiring layer. The rewiring layer 120 has wiring (conductive wiring), a dielectric film substantially made of an insulating material, and conductive vias that electrically connect the wiring between different layers in the rewiring layer 120.

[0051] The wiring and the conductive vias contain a conductive material. The conductive material is, for example, Cu, Ag, and Au, and alloys containing them, among which Cu is preferable. The rewiring layer 120 can have a plurality of layers, for example, two or more layers of wiring and one or more layers of dielectric film. The thickness of one layer of wiring and one layer of dielectric film constituting the rewiring layer 120 is, for example, 1.5 μm to 5.0 μm. In this case, the thickness of the rewiring layer 120 is the value (unit: μm) obtained by multiplying the thickness of one layer (1.5 μm to 5.0 μm) by the total number of layers in the rewiring layer 120.

[0052] The dielectric film is composed of, for example, an inorganic insulating material or an organic insulating material as an insulating material, and is preferably substantially made of an inorganic insulating material or an organic insulating material. Examples of the inorganic insulating material include silicon oxide (SiO2) and silicon nitride (SiN, Si3N4). Examples of the organic insulating material include epoxy resin, silicone resin, polyester, polypropylene, polyimide, acrylonitrile-butadiene-styrene (ABS) resin, acrylonitrile-styrene (AS) resin, methacrylic resin, polyamide, fluororesin, liquid crystal polymer, polybutylene terephthalate, and polycarbonate.

[0053] When the rewiring layer 120 has a dielectric film (hereinafter also referred to as an "inorganic dielectric film") substantially made of an inorganic material (for example, an inorganic insulating material), compared with a dielectric film substantially made of an organic material (for example, an organic insulating material), the width (wiring width) of the wiring of the rewiring layer 120 can be miniaturized, and the composite component device 1 according to the first embodiment can be miniaturized. This is because the film surface roughness of the inorganic dielectric film is very small compared with the film surface roughness of the organic dielectric film. Therefore, in the lithography process for forming the wiring, the inorganic dielectric film has higher focus position accuracy than the organic dielectric film. More specifically, in the case of the inorganic dielectric film, focusing can be performed on the order of nanometers, while in the case of the organic dielectric film, focusing can be performed on the order of micrometers. The wiring of the rewiring layer 120 substantially made of the inorganic dielectric film can have a wiring width about 1 / 10 that of the wiring of the rewiring layer 120 including a dielectric film substantially made of an organic insulating material. As a result, the composite component device 1 can be miniaturized and made thinner. The line-and-space (L / S) of the rewiring layer 120 including a dielectric film substantially composed of an inorganic insulating material is, for example, 1 μm / 1 μm.

[0054] The thickness of the inorganic dielectric film is, for example, 0.1 to 2 μm. The inorganic dielectric film may be a multi-component film containing two or more components. The multi-component film may be a multi-layer film in which a plurality of layers are formed for each component. The layer structure of the multi-layer film is, for example, SiO2 (thickness 0.25 μm) / Si3N4 (thickness 0.1 μm) / SiO2 (thickness 0.25 μm) / Si3N4 (thickness 0.1 μm) in order from the side of the electronic component layer 110.

[0055] When the dielectric film is substantially made of an organic insulating material, the dielectric film can be formed at a reduced cost. This is because a dielectric film substantially made of an organic insulating material can be produced without using large-scale equipment such as a plasma chemical vapor deposition (PECVD) apparatus compared with a dielectric film substantially made of an inorganic insulating material. The line-and-space (L / S) of the rewiring layer 120 substantially made of an organic dielectric film is, for example, 10 μm / 10 μm. The thickness of the dielectric film is, for example, 1 to 20 μm.

[0056] (Adhesive layer) The adhesive layer 130 bonds between the first composite component layers 100 and 200. The material of the adhesive layer is, for example, a thermosetting resin.

[0057] [Second composite component layer] The composite component device 1 may further include a second composite component layer 900 as the outermost layer. The second composite component layer 900 is disposed on the first composite component layer 200 which is the uppermost layer of the stacked first composite component layers 100 and 200. The second composite component layer 900 has a second electronic component 913 and a second resin encapsulation portion 917 that encapsulates the second electronic component 913, and does not have a side wall portion.

[0058] In this specification, the "outermost layer" refers to a layer having a main surface that is exposed in the object. In FIG. 1, the second composite component layer 900 has a main surface that is exposed in the composite component device 1. Therefore, the second composite component layer 900 is the outermost layer. Note that although the second composite component layer 900 is adhered to the first composite component layer 200, it may be adhered to the first composite component layer 100 instead.

[0059] When the composite component device 1 further includes the second composite component layer 900 as the outermost layer, the generation of burrs (more specifically, cracks, chips, and chipping, etc.) is suppressed in the dicing process of the manufacturing method of the composite component device 1 described later. Therefore, in such a case, the composite component device 1 according to the first embodiment accurately reflects the design and has high reliability.

[0060] The suppression of burr generation is due to the following reasons. When the second composite component layer 900 is not provided, the mother assembly of the composite component device 1 is cut at the side wall portion 215 of the first composite component layer 200 disposed on the outermost layer. Since the side wall portion 215 is generally substantially composed of an inorganic substance (for example, Si), in the cutting of the side wall portion 215, there is a limit to reducing the generation of burrs even if the cutting conditions of the dicing process are adjusted. On the other hand, when the second composite component layer 900 is provided, the mother assembly of the composite component device 1 is cut at the second resin sealing portion 917 of the second composite component layer 900 disposed on the outermost layer. Since the second resin sealing portion 917 is generally substantially composed of a resin, in the cutting of the second resin sealing portion 917, the generation of burrs can be reduced by adjusting the cutting conditions of the dicing process.

[0061] The second electronic component 913 is electrically connected to the rewiring layer 220 of the first composite component layer 200 via a solder 940. The second electronic component 913 is an electronic component (a large-sized electronic component) having a larger size compared to the first electronic components 113 and 213. The second electronic component 913 is an electronic component that is relatively difficult to be miniaturized and made low-profile in terms of its structure and / or generally has a relatively large amount of heat generation. Examples of electronic components that are difficult to be miniaturized and made low-profile in terms of their structure include, for example, multilayer ceramic capacitors (MLCCs). Examples of electronic components that generally have a large amount of heat generation include, for example, inductors (more specifically, power inductors, etc.) and power ICs, etc.

[0062] [Method for manufacturing a composite component device] The manufacturing method of the composite component device 1 according to the first embodiment is an electronic component adhesion step of adhering a first electronic component to a silicon-based layer so that a component electrode of the first electronic component contacts the bottom surface of the silicon-based layer having a lattice-shaped side wall portion and bottom surface via an electronic component adhesion layer; an electronic component sealing step of sealing the first electronic component with a resin to form a resin sealing portion; an electronic component layer precursor manufacturing step of removing the silicon-based layer and the electronic component adhesion layer so as to expose the entire surface of the component electrode to produce an electronic component layer precursor; An electronic component layer precursor bonding step of bonding the electronic component layer precursors such that the main surfaces on which the component electrodes of the two electronic component layer precursors are not exposed face each other to produce a pair of electronic component layer precursors; An inverted layer precursor production step of producing an inverted layer precursor by forming a rewiring layer on the main surfaces of a pair of electronic component layer precursors through which an electronic component layer through-via penetrates the side wall portions and on the main surfaces on which the component electrodes of the pair of electronic component layer precursors are exposed; An inverted layer production step of forming a rewiring layer on the other main surface of the inverted layer precursor located on the opposite side of one main surface to form an inverted layer; A lamination step of laminating a separately produced pair of electronic component layer precursors and one of the separately produced electronic component layer precursors on the rewiring layer of the inverted layer precursor; A wiring formation step of forming an electronic component layer through-via and a rewiring layer on the laminated pair of electronic component layer precursors and one of the laminated electronic component layer precursors; comprising; The step combining the lamination step and the wiring formation step is executed 0 or more times.

[0063] The manufacturing method of the composite component device 1 according to the first embodiment further includes: An insulating portion formation step of forming an insulating portion between the component electrodes of the electronic component; A silicon base layer preparation step of preparing a silicon base layer having lattice-shaped side wall portions and bottom surface portions; A resin-sealed portion thinning step of thinning the first resin-sealed portion 117; A second composite component layer formation step of forming a second composite component layer; A dicing step of dicing into individual pieces; and may comprise.

[0064] Specifically, with reference to FIGS. 9A-9B and FIGS. 4A-4P, an example of a method for manufacturing the composite component device 1 will be described. FIGS. 9A-9B and FIGS. 4A-4P are diagrams for explaining the method for manufacturing the composite component device 1. The method for manufacturing the composite component device 1 according to the first embodiment includes an insulating portion forming step, a silicon base layer preparing step, an electronic component adhering step, an electronic component encapsulating step, a resin encapsulating portion thinning step, an electronic component layer precursor producing step, an electronic component layer precursor adhering step, an inversion layer precursor producing step, a second composite component layer forming step, an inversion layer producing step, and a dicing step. In this example, the combination of the lamination step and the wiring forming step is executed zero times.

[0065] In this manufacturing method, a mother integrated body in which the composite component device 1 is integrated is produced from the silicon base layer preparing step to the inversion layer producing step. FIGS. 4A-4H and FIGS. 4N-4P show portions corresponding to one composite component device 1 in the mother integrated body to be produced.

[0066] (Insulating Portion Forming Step) In the insulating portion forming step, as shown in FIGS. 9A-9B, an insulating portion 113e is formed between the component electrodes 113d of the first electronic component 113. Specifically, a coating film is formed so as to cover the component electrodes 113d of the first electronic component 113, and a planarization process is performed to form the insulating portion 113e between the component electrodes 113d of the first electronic component 113. As shown in FIG. 9A, a solution containing a resin and a solvent is applied using a spin coating method to form a coating film. Here, the lowest portion of the coating film is made higher than the highest portion of the component electrodes 113d. That is, the coating film is formed such that all of the plurality of component electrodes 113d are completely buried in the coating film. The coating layer is dried to form the insulating portion 113e. The insulating portion 113e before the subsequent planarization process preferably completely covers the component electrodes 113d.

[0067] In the planarization process, as shown in FIG. 9B, for example, using a surface planer and a grinder, the surfaces of the component electrodes 113d and the insulating portion 113e are ground and planarized to form the insulating portion 113e between the component electrodes 113d. As a result, the top surface of the component electrode 113d is exposed, and the top surfaces of the component electrode 113d and the insulating portion 113e are flush.

[0068] (Silicon Base Layer Preparation Step) In the silicon base layer preparation step, as shown in FIG. 4A, a silicon base layer 182 having lattice-shaped side wall portions 115 and a bottom surface portion is prepared. The silicon base layer 182 having lattice-shaped side wall portions 115 and a bottom surface portion specifically has a rectangular bottom surface portion in plan view and side wall portions 115 arranged in a lattice pattern so as to surround the rectangular bottom surface portion. One or more first electronic components 113 are adhered to the recess (or depression, or cavity) surrounded by these bottom surface portion and side wall portions 115 in the electronic component adhesion step described later.

[0069] The shape of the silicon base layer 182 may be cylindrical when viewed from above in plan view, but is not limited thereto. When the shape of the silicon base layer 182 is cylindrical, the thickness of the silicon base layer 182 is, for example, 775 μm (Si wafer diameter φ300 mm), 725 μm (φ200 mm), 675 μm (φ150 mm), and 525 μm (φ100 mm). Note that the silicon base layer preparation step may be performed before the insulating portion formation step. Both the silicon base layer 182 and the side wall portions 115 are substantially made of Si.

[0070] (Electronic Component Adhesion Step) In the electronic component bonding process, a plurality of component electrodes 113d of the first electronic component 113 are brought into contact with the bottom surface of the silicon base layer 182 having a lattice-shaped side wall portion 115 and a bottom surface portion via the electronic component bonding layer 172, and the first electronic component 113 is bonded to the silicon base layer 182. Specifically, in the electronic component bonding process, as shown in FIG. 4B, the component electrodes 113d and the insulating portions 113e are arranged (mounted) on the bottom surface portion of the silicon base layer 182 so as to be in contact with the silicon base layer 182 (bottom surface portion) via the electronic component bonding layer 172 (strictly speaking, the coating film of the adhesive). Next, the coating film of the adhesive is cured to form the electronic component bonding layer 172. In this way, the first electronic component 113 is bonded onto the silicon base layer 182.

[0071] The method of applying the coating film is, for example, spin coating. It is preferable to control the thickness of the coating film to be in the range of the thickness of the component electrode 113d of the first electronic component 113 to 10 μm and then apply it. The adhesive is, for example, a thermosetting resin. Such a thermosetting resin is, for example, a thermosetting resin containing a repeating unit derived from benzocyclobutene (BCB), and can be obtained by polymerizing, for example, 1,3-divinyl-1,1,3,3-tetramethyldisiloxane-bis-benzocyclobutene (DVS-bis-BCB). As a commercially available product, for example, "CYCLOTENE" manufactured by Dow Chemical is available.

[0072] The first electronic component 113 is disposed on the coating film using an apparatus equipped with a vacuum chamber. Specifically, an electronic component integrated wafer (a wafer integrating a plurality of the first electronic components 113) is bonded to a silicon base layer 182 (the silicon base layer 182 having a side wall portion 115). Pressure is applied bidirectionally along the stacking direction of the first electronic component 113 and heated. Specifically, the silicon base layer 182 is set on a lower stage in the vacuum chamber of the apparatus. The first electronic component 113 is vacuum-sucked (or depressurized-sucked) onto an upper stage in the vacuum chamber so that the component electrode 113d of the first electronic component 113 faces the coating film. In the alignment between the silicon base layer 182 and the electronic component integrated wafer, for example, recognition marks of the silicon base layer 182 are used. One or more first electronic components 113 are disposed on the coating film side of the silicon base layer 182. Pressure is applied bidirectionally and heated along the direction in which the upper and lower stages face each other.

[0073] The component electrode 113d and the insulating portion 113e face the silicon base layer 182 through the electronic component adhesive layer 172, and the electronic component integrated wafer is bonded onto the silicon base layer 182.

[0074] (Electronic component encapsulation process) In the electronic component encapsulation process, the first electronic component 113 is encapsulated with resin to form a first resin encapsulation portion 117. Specifically, in the electronic component encapsulation process, as shown in FIG. 4C, a liquid resin is applied onto the silicon base layer 182 on which the first electronic component 113 is mounted using a dispenser. Thereafter, the applied liquid resin is molded using a compression molding apparatus. Thereafter, for example, the liquid resin is cured using a hot air circulation oven. The heat treatment conditions for curing are, for example, a heating temperature of 150° C. and a heating time of 1 hour. Thereby, the first resin encapsulation portion 117 is formed.

[0075] (Resin encapsulation portion thinning process) The resin encapsulation part thinning process thins the first resin encapsulation part 117. In the resin encapsulation part thinning process, specifically, as shown in FIG. 4D, using a back grinder of the Si wafer, the first resin encapsulation part 117 is ground and thinned so that the top surface of the side wall part 115 is exposed. In the resin encapsulation part thinning process, the first resin encapsulation part 117 on the second surface 113b side of the first electronic component 113 is ground. Since the resin constituting the first resin encapsulation part 117 can cause warping of the first composite component layer 100 and thus the composite component device 1, the grinding amount of the first resin encapsulation part 117 is preferably as large as possible within a range where a certain strength can be maintained. However, in this process, the first resin encapsulation part 117 is not ground until the first electronic component 113 is exposed (for example, the first electronic component 113 is not ground). The thickness of the thinned first resin encapsulation part 117 is, for example, 50 to 150 μm.

[0076] (Fabrication Process of Electronic Component Layer Precursor) The fabrication process of the electronic component layer precursor fabricates the electronic component layer precursor by removing the silicon base layer 182 and the electronic component adhesive layer 172 so as to expose the entire surface of the component electrode 113d. In the fabrication process of the electronic component layer precursor, specifically, as shown in FIG. 4E, a first Si support (first silicon support) 184 is bonded to the first resin encapsulation part 117 and the side wall part 115. Specifically, the silicon base layer 182 described in the silicon base layer preparation process is separately prepared as the first Si support 184. Next, an adhesive layer 174 (strictly speaking, a coating film of an adhesive) is formed on the silicon base layer 182 by the method described in the electronic component bonding process. Then, the first resin encapsulation part 117 and the side wall part 115 are bonded onto the first Si support 184 so that the ground surfaces of the first resin encapsulation part 117 and the side wall part 115 come into contact with the coating film, and pressure is applied and heated. Thereby, the coating film of the adhesive is cured to form the adhesive layer 174, and the first Si support 184 is disposed via the adhesive layer 174 on the ground surfaces of the first resin encapsulation part 117 and the side wall part 115.

[0077] The purpose of providing the first Si support 184 is to prevent the occurrence of adverse effects (more specifically, a decrease in strength, etc.) due to the layers in the manufacturing process being thinner than conventional ones when removing the subsequent silicon base layer 182 and the electronic component adhesive layer 172. As shown in FIG. 4F, the silicon base layer 182 and the electronic component adhesive layer 172 are ground and removed using a back grinder of the Si wafer. In this way, the electronic component layer precursor 110' is fabricated. Note that the electronic component layer precursor 110' is obtained by removing the electronic component layer through vias 119 from the electronic component layer 110.

[0078] (Electronic Component Layer Precursor Adhesion Step) In the electronic component layer precursor adhesion step, as shown in FIG. 4H, the main surfaces 112', 212' of the two electronic component layer precursors 110', 210' where the component electrodes 113d, 213d are not exposed are made to face each other, and the electronic component layer precursors 110', 210' are adhered to fabricate a pair of electronic component layer precursors 10''. Note that the pair of electronic component layer precursors 10'' is obtained by removing the redistribution layers 119, 219 and the electronic component layer through vias 119, 219 from the inversion layer 10.

[0079] Specifically, first, as shown in FIG. 4G, the electronic component layer precursor 110' is arranged such that the main surface 112' is exposed. Specifically, a second Si support (second silicon support) 186 is bonded to the component electrode 113d and the insulating portion 113e via an adhesive layer 174. Thereafter, the first Si support 184 and the adhesive layer 174 are ground and removed.

[0080] Next, in the same manner as the electronic component layer precursor 110', an electronic component layer precursor 210' is fabricated. The main surfaces 112', 212' of the two electronic component layer precursors 110', 210' where the component electrodes 113d, 213d are not exposed are adhered to each other by an adhesive layer 130. Thereafter, the second Si support and the adhesive layer that supported the electronic component layer precursor 210' are ground and removed. Thereby, a pair of electronic component layer precursors 10'' is fabricated.

[0081] (Inversion Layer Precursor Fabrication Step) As shown in Fig. 4N, in the process of manufacturing the inversion layer precursor, an electronic component layer through-via 119, 219 penetrating the side wall portions 115, 215 of a pair of electronic component layer precursors 10'', and a rewiring layer 220 are formed on the main surface (corresponding to the first main surface 211 of the electronic component layer 210) where the component electrodes 213d of the pair of electronic component layer precursors 10'' are exposed, thereby manufacturing the inversion layer precursor 10'. Note that the inversion layer precursor 10' is obtained by removing the rewiring layer 120 from the inversion layer 10.

[0082] In the process of manufacturing the inversion layer precursor, the electronic component layer through-via 119, 219 and the rewiring layer 220 can be manufactured using a photolithography method. With reference to the enlarged cross-sectional view of part B in Fig. 4H, the manufacturing of the electronic component layer through-via 119, 219 and the rewiring layer 220 will be described.

[0083] Fig. 4I is an enlarged view of the part corresponding to part B in Fig. 4H. The same applies to Figs. 4J to 4M. As shown in Fig. 4J, a photoresist film 290 having a pattern corresponding to the pattern of the electronic component layer through-via 119, 219 in plan view is formed. In this state, exposure and development are performed, and as shown in Fig. 4K, the side wall portions 115, 215 and the adhesive layer 130 existing in the Z direction are selectively removed (etched) from the opening 290f of the photoresist film 290. The etching is performed using, for example, RIE (Reactive Ion Etching) and laser irradiation. Thereby, through-holes 115f, 215f, 130f are formed, and a part of the upper surface of the adhesive layer 174 is exposed. Here, the through-hole 130f of the adhesive layer 130 in the ZX cross-section has a substantially elliptical shape. This is because the material constituting the adhesive layer 130 is more easily etched than the material constituting the side wall portions 115, 215. Thereby, a conductive via 119a having a substantially elliptical shape is formed in the subsequent formation of the electronic component layer through-via. After the formation of the through-holes 115f, 215f, 130f, the photoresist film 290 is removed.

[0084] Next, electronic component layer through vias 119 and 219 are formed in the through holes 115f, 215f, and 130f. Specifically, as shown in FIG. 4L, the electronic component layer through vias 119 and 219 are formed in the through holes 115f, 215f, and 130f by electroplating. Using the dual damascene method (more specifically, the Cu dual damascene method), the electronic component layer through vias 119 and 219 are formed in the through holes 115f, 215f, and 130f by electrolytic plating (more specifically, electrolytic Cu plating). Thereby, the electronic component layers 110 and 210 are formed.

[0085] Next, the rewiring layer 220 is formed. In forming the rewiring layer 220, specifically, as shown in FIG. 4M, a dielectric film and wiring having a predetermined pattern are formed by the above-described photolithography method and etching to form the rewiring layer 220. FIG. 4M is an enlarged view of part C in FIG. 4N.

[0086] In forming the rewiring layer 220, for example, an inorganic dielectric film (thickness: 0.1 to 0.2 μm) can be formed using a chemical vapor deposition (CVD) method such as PECVD. One or more inorganic dielectric films may be formed. For example, when forming four layers of inorganic dielectric films, for example, SiO2: 0.25 μm / Si3N4: 0.1 μm / SiO2: 0.25 μm / Si3N4 0.1 μm can be used in order from the main surface 211' side where the component electrode 213d of the electronic component layer precursor 210' is exposed.

[0087] (Second composite component layer forming step) The second composite component layer forming step forms a second composite component layer. Specifically, as shown in FIG. 4O, the second electronic component 913 is electrically connected to the rewiring layer 220 by solder 940 in the second composite component layer forming step. Next, the second electronic component 913 is sealed to form a second resin sealing portion 917. Thereby, the second composite component layer 900 is formed.

[0088] (Inversion layer manufacturing step) In the inversion layer fabrication step, as shown in FIG. 4P, a redistribution layer 120 is formed on the other main surface (first main surface 111 of electronic component layer 110) of inversion layer precursor 10′ located opposite one main surface (corresponding to first main surface 211 of electronic component layer 210) of (a pair of electronic component layer precursors 10″), to fabricate inversion layer 10. Redistribution layer 120 can be formed in the same manner as redistribution layer 220 described in the inversion layer precursor fabrication step.

[0089] (dicing process) 4P, the second Si support 186 and the adhesive layer 174 are removed, and the mother integrated body is diced along the dashed lines to separate the mother integrated body, thereby producing the composite component device 1 according to the first embodiment.

[0090] Second Embodiment [Configuration of composite component devices] As shown in Fig. 5, the composite component device 1A according to the second embodiment differs from the composite component device 1 according to the first embodiment in that it further includes a first composite component layer 100 that does not form an inversion layer 10, and in the circuit patterns of the electronic component layer through-vias 119A, 219A, and 319A. This different configuration will be mainly explained below. In the second embodiment, the same reference numerals as those in the first embodiment have the same configuration as in the first embodiment, and therefore, explanations thereof will be omitted in principle.

[0091] The configuration of the composite component device according to the second embodiment will be described with reference to Fig. 5. Fig. 5 is a diagram schematically showing a cross section of a composite component device 1A according to the second embodiment of the present disclosure.

[0092] The inversion layer 10A is disposed at least on the central side in the stacking direction of the plurality of first composite component layers 100, 200, and 300. Here, "disposed on the central side" means being disposed in the middle of the total number of layers (the first composite component layers 100, 200, 300 and the second composite component layer 900) constituting the composite component device 1A, or being disposed including the middle layer. The inversion layer 10A is composed of the second and third first composite component layers 200 and 300 from the bottom of the composite component device 1A, which is the middle layer with a total number of layers of 4. Therefore, the inversion layer 10A is disposed on the central side of the composite component device 1A. In this case, since the inversion layer 10A where internal stress is easily canceled is disposed on the central side of the composite component device 1A, the occurrence of warping in the composite component device 1A as a whole is more suppressed.

[0093] In the second embodiment, the total number of layers is an even number. Here, taking the composite component device 1B according to the third embodiment (described later) where the total number of layers is an odd number as an example, the "disposition on the central side" will be further described. The composite component device 1B is composed of layers with a total number of layers of 5 (four first composite component layers 100 to 400 and one second composite component layer 900). Therefore, the inversion layer 10B is composed of the third and fourth first composite component layers 300 and 400 from the bottom including the first composite component layer 300 which is the middle layer. Thus, the inversion layer 10B is disposed on the central side in the composite component device 1B.

[0094] (First Composite Component Layer) The composite component device 1A according to the second embodiment further includes the first composite component layer 100 in addition to the inversion layer 10A composed of the first composite component layers 200 and 300. The first composite component layer 100 is joined to the rewiring layer 220 of the first composite component layer 200 via the adhesive layer 130 on the second main surface 112 side. In the composite component device 1A, as the outermost layer, a first composite component layer that does not constitute the inversion layer 10A is disposed.

[0095] (Through-Silicon Via) The electronic component layer through-via 119A has a sidewall through-via that penetrates the sidewall portion 115 and a conductive via (not shown) that penetrates the adhesive layer 130. The electronic component layer through-via 119A is electrically connected to the redistribution layer 220 by the conductive via. Similar to that shown in FIG. 2 of the first embodiment, in a plane perpendicular to the thickness direction of the composite component device 1A, the cross-sectional area of the conductive via (cross-sectional area in the XY plane) is larger than the cross-sectional area of the sidewall through-via. Therefore, the electrical connection between the electronic component layer through-via 119A and the redistribution layer 220 is improved, and the connection resistance between the first composite component layers 100 and 200 is reduced. Thus, the composite component device 1A according to the second embodiment has further improved reliability.

[0096] The electronic component layer through-vias 119A, 219A, and 319A are arranged to be arrayed on one straight line in at least a pair of adjacent first composite component layers among the plurality of first composite component layers 100, 200, and 300. Specifically, in the cross-sectional (ZX cross-section) view shown in FIG. 5, two of the electronic component layer through-vias 219A and 319A are arranged to be arrayed on one straight line in the adjacent first composite component layers 200 and 300. Also, three of the electronic component layer through-vias 119A, 219A, and 319A are arranged to be arrayed on one straight line in the adjacent first composite component layers 100, 200, and 300. Thus, in the composite component device according to the present disclosure, since the arrangement of the electronic component layer through-vias can be selected according to its application, the degree of freedom in design is high.

[0097] [Method for manufacturing a composite component device] An example of the method for manufacturing the composite component device 1A according to the second embodiment will be described. The method for manufacturing the composite component device 1A according to the second embodiment is, for example, further to the method for manufacturing the composite component device according to the first embodiment, a lamination step of laminating a separately manufactured electronic component layer precursor on the inversion layer precursor, and a wiring formation step of forming an electronic component layer through-via and a redistribution layer in the laminated electronic component layer precursor and comprises. That is, in the manufacturing method of the composite component device 1A according to the second embodiment, a process combining a lamination process and a wiring formation process is executed once.

[0098] Specifically, with reference to FIGS. 6A to 6D, an example of the manufacturing method of the composite component device 1A will be described. FIGS. 6A to 6D are diagrams for explaining the manufacturing method of the composite component device 1A. The manufacturing method of the composite component device 1A according to the second embodiment includes an insulating portion forming process, a silicon base layer preparation process, an electronic component bonding process, an electronic component encapsulation process, a resin encapsulation portion thinning process, an electronic component layer precursor manufacturing process, an electronic component layer precursor bonding process, an inversion layer precursor manufacturing process, a lamination process, an inversion layer manufacturing process, a second composite component layer forming process, a wiring formation process, and a dicing process.

[0099] (Lamination process) In the lamination process, an separately manufactured electronic component layer precursor 110' is laminated on the rewiring layer 220 of the inversion layer precursor 10A'. Specifically, the inversion layer precursor 10A' is manufactured in the same manner as in the first embodiment (refer to FIGS. 4A to 4N; however, the circuit patterns of the electronic component layer through vias 219A and 319A are different from those in the first embodiment). The electronic component layer precursor 110' is bonded to the rewiring layer 220 side of the first composite component layers 200 and 300 in the obtained inversion layer precursor 10A' by an adhesive layer 130. Here, the electronic component layer precursor 110' is separately manufactured in the same manner as in the first embodiment (refer to FIGS. 4A to 4G). In this way, in the lamination process, the separately manufactured electronic component layer precursor 110' is laminated on the inversion layer precursor 10A'.

[0100] (Inversion layer formation process) In the inversion layer formation process, as shown in FIG. 6B, a rewiring layer 320 is formed on the other main surface (corresponding to the first main surface 311 of the electronic component layer 310) located on the opposite side of one main surface (corresponding to the first main surface 211 of the electronic component layer 210) of the inversion layer precursor 10A' to manufacture an inversion layer 10A. Specifically, in the inversion layer formation step, as shown in FIG. 6B, first, the second Si support 386 and the adhesive layer 374 are removed. Next, a rewiring layer 320 is formed on the other main surface of the exposed inversion layer precursor 10A' (corresponding to the first main surface 311 of the electronic component layer 310). In this way, the inversion layer 10A is formed.

[0101] (Second composite component layer formation step) In the second composite component layer formation step, as shown in FIG. 6C, a second composite component layer 900 is formed on the rewiring layer 320 (see the second composite component layer formation step of the first embodiment and FIG. 4O).

[0102] (Wiring formation step) In the wiring formation step, an electronic component layer through-via 119A and a rewiring layer 120 are formed on the stacked electronic component layer precursor 110'. Specifically, in the wiring formation step, as shown in FIG. 6D, the second Si support 186 and the adhesive layer 174 are removed. Next, an electronic component layer through-via 119A is formed on the side wall portion 115, and a rewiring layer 120 is formed on the main surface 111' of the exposed electronic component layer precursor 110'. Here, the electronic component layer through-via 119A is formed to extend into the adhesive layer 130.

[0103] Through the dicing step, the composite component device 1A is manufactured.

[0104] <Third Embodiment> [Configuration of Composite Component Device] The composite component device 1B according to the third embodiment, as shown in FIG. 7, is different from the composite component device 1 according to the first embodiment in that it further includes first composite component layers 100 and 200 that constitute the inversion layer 20B, and in that the resin amounts of the first resin encapsulation portions 117B, 217B, 317B, and 417B are reduced. This different configuration will be mainly described below. In the third embodiment, since the same reference numerals as those in the first and second embodiments have the same configurations as those in the first and second embodiments, the description thereof will be omitted in principle.

[0105] Referring to FIG. 7, the configuration of the composite component device according to the third embodiment will be described. FIG. 7 is a diagram schematically showing a cross-section of the composite component device 1B according to the third embodiment.

[0106] (First composite component layer, inversion layer) In addition to the inversion layer 10B composed of the first composite component layers 300 and 400, the composite component device 1B according to the third embodiment further includes an inversion layer 20B composed of the first composite component layers 100 and 200. The composite component device 1B includes a plurality of inversion layers 10B and 20B. By including a plurality of inversion layers 10B and 20B that can easily cancel out the internal stress in the first composite component layers 100, 200, 300, and 400, the occurrence of warping can be effectively suppressed, so that further multilayerization of the first composite component layer becomes possible. Therefore, since the number of layers of the composite component device according to the present disclosure can be adjusted according to its application, the degree of freedom in design is high.

[0107] Of the plurality of inversion layers 10B and 20B, two adjacent inversion layers 10B and 20B are joined via an adhesive layer 230. Since a pair of adjacent inversion layers 10B and 20B are joined via the adhesive layer 230, the internal stress generated in the inversion layers 10B and 20B is further reduced, thereby enabling further multilayerization of the first composite component layer. Therefore, since the number of layers of the composite component device according to the present disclosure can be adjusted according to its application, the degree of freedom in design is high.

[0108] The plurality of first composite component layers 100, 200, 300, and 400 constitute an even number (specifically, two) of inversion layers 10B and 20B, and the even number of inversion layers 10B and 20B are symmetric with respect to the center in the stacking direction.

[0109] Here, the center means that the configurations of the respective inverted layers 10B and 20B (more specifically, the electronic component layers 110, 210, 310, 410, the redistribution layers 120, 220, 320, 420, the first electronic components 113B, 213B, 313B, 413B, the side wall portions 115, 215, 315, 415, the first resin encapsulation portions 117B, 217B, 317B, 417B, the locations, numbers, types, dimensions, and shapes, etc. of the through vias 119, 219, 319, 419 penetrating the electronic component layers) are line-symmetric with respect to the interface (corresponding to the adhesive layer 230) of the stacked inverted layers 10B and 20B. For example, it means that the electronic component layers 310 and 410 constituting the inverted layer 10B are line-symmetric with respect to the adhesive layer 230 and the electronic component layers 110 and 210 constituting the inverted layer 20B.

[0110] When an even number of inverted layers 10B and 20B are symmetric with respect to the center in the stacking direction, the internal stresses generated in each of the inverted layers 10B and 20B are likely to be exactly opposite and are likely to cancel each other out. Therefore, the composite component device 1B according to the third embodiment is more suppressed from warping.

[0111] (Through via in the electronic component layer) The through via 319 in the electronic component layer has, in addition to a side wall through via penetrating the side wall portion 315 and a conductive via penetrating the adhesive layer 330 and electrically connecting to the through via 419 in the electronic component layer, an inter-inverted layer conductive via (not shown) penetrating the adhesive layer 230 joining the inverted layers 10B and 20B and electrically connecting between the inverted layers 10B and 20B.

[0112] In a cross-section perpendicular to the stacking direction of the first composite component layers 100, 200, 300, 400, the cross-sectional area of the inter-inverted layer conductive via is larger than the cross-sectional area of the side wall through via. In such a case, since the inverted layers 10B and 20B are electrically connected by the inter-inverted layer conductive via having a larger connection area, the composite component device 1B has high reliability.

[0113] (First resin encapsulation portion) A plurality of first composite component layers 100, 200 are joined by an adhesive layer 130, and the second surface 113b of the electronic component body portion 113c contacts the adhesive layer 130. That is, the first resin encapsulation portion 117B does not have resin on the second surface 113b side of the electronic component body portion 113c. Thus, since the amount of resin that causes warping is reduced, the composite component device 1B according to the third embodiment is more suppressed from warping.

[0114] [Method for manufacturing a composite component device] An example of a method for manufacturing the composite component device 1B according to the second embodiment will be described. The method for manufacturing the composite component device 1B according to the second embodiment further includes, for example, in the method for manufacturing the composite component device according to the first embodiment, a lamination step of laminating a pair of separately manufactured electronic component layer precursors on an inversion layer precursor, a wiring formation step of forming electronic component layer through vias and a redistribution layer in the laminated pair of electronic component layer precursors, and is composed of, and the step combining the lamination step and the wiring formation step is executed once.

[0115] Specifically, with reference to FIGS. 8A to 8E, an example of the method for manufacturing the composite component device 1B will be described. FIGS. 8A to 8E are diagrams for explaining the method for manufacturing the composite component device 1B. The method for manufacturing the composite component device 1B according to the third embodiment includes an insulating portion formation step, a silicon base layer preparation step, an electronic component adhesion step, an electronic component encapsulation step, a resin encapsulation portion thinning step, an electronic component layer precursor manufacturing step, an electronic component layer precursor adhesion step, an inversion layer precursor manufacturing step, a lamination step, a wiring formation step, a second composite component layer formation step, an inversion layer manufacturing step, and a dicing step. Note that in the method for manufacturing the composite component device according to the second embodiment, the step combining the lamination step and the wiring formation step is executed once.

[0116] (Resin encapsulation portion thinning step) In the process of thinning the resin sealing portion, as shown in FIG. 8A, the first resin sealing portion 117B is thinned until the first electronic component 113B is exposed. Here, in addition to the first resin sealing portion 117B, a part of the first electronic component 113B may be ground. However, it is ground so as not to damage the first electronic component 113B. When the first resin sealing portion 117B is thinned until the first electronic component 113B is exposed, the amount of the resin constituting the first resin sealing portion 117B can be reduced. Therefore, the occurrence of warpage of the composite component device 1B can be further suppressed. In this way, the electronic component layer precursor 110B' is manufactured.

[0117] (Process for manufacturing the precursor of the inversion layer) In the process for manufacturing the precursor of the inversion layer, as shown in FIG. 8B, the precursor of the inversion layer 10B' is manufactured in the same manner as in the first embodiment except that the electronic component layer precursors 110B', 210B' are employed instead of the electronic component layer precursors 110', 210' (see FIGS. 4A to 4N).

[0118] (Lamination process) In the lamination process, as shown in FIG. 8D, a pair of separately manufactured electronic component layer precursors 10B'' are laminated on the inversion layer precursor 10B'. Specifically, in the lamination process, the pair of electronic component layer precursors 10B'' are bonded to the rewiring layer 220 side of the first composite component layer 200 in the obtained inversion layer precursor 10B' by an adhesive layer 230. Here, the pair of electronic component layer precursors 10B'' employ the electronic component layer precursors 310B', 410B' manufactured in the process for manufacturing the electronic component layer precursor in the process for manufacturing the precursor of the inversion layer as shown in FIG. 8C, and are separately manufactured in the same manner as in the first embodiment except that a rewiring layer 320 is further formed (see FIGS. 4A to 4G). In this way, in the lamination process, a pair of separately manufactured electronic component layer precursors 10B'' are laminated on the inversion layer precursor 10B'.

[0119] (Wiring formation process) The wiring formation process forms electronic component layer through vias and rewiring layers in a pair of laminated electronic component layer precursors 10B''. Specifically, in the wiring formation process, as shown in FIG. 8E, the second Si support 486 and the adhesive layer 474 are removed. Next, an electronic component layer through via 419 is formed in the side wall portion 415, an electronic component layer through via 319 is formed in the side wall portion 315, and a rewiring layer 420 is formed on the main surfaces of the pair of exposed electronic component layer precursors 10B'' (corresponding to the first main surface 411 of the electronic component layer 410). Here, the electronic component layer through via 319 is formed to extend into the adhesive layers 230 and 330.

[0120] (Second composite component layer formation process) The second composite component layer formation process forms a second composite component layer 900 on the rewiring layer 420 as shown in FIG. 7 (see the second composite component layer formation process of the first embodiment and FIG. 4O).

[0121] (Inversion layer formation process) The inversion layer formation process forms a rewiring layer 120 on the other main surface of the inversion layer precursor 10B' located on the opposite side of one main surface (corresponding to the first main surface 211 of the electronic component layer 210) to produce an inversion layer 20B. Specifically, in the inversion layer formation process, first, the second Si support 186 and the adhesive layer 174 are removed. Next, a rewiring layer 120 is fabricated on the exposed main surface of the inversion layer precursor 10B' (corresponding to the first main surface 111 of the electronic component layer 110). In this way, the inversion layer 10B is produced.

[0122] Through the dicing process, the composite component device 1B is manufactured.

[0123] <Other embodiments> The present disclosure is not limited to the above-described embodiments, and design changes are possible without departing from the gist of the present disclosure. Also, the configurations of the first to third embodiments may be combined in various ways.

[0124] In the first embodiment, the electronic component layer through vias 119 were provided to be arranged in alignment in a plan view (XY cross-sectional view in FIG. 3), but the present invention is not limited thereto. For example, as shown in FIG. 10, the electronic component layer through vias 119D may be provided to be staggeredly arranged in a cross section perpendicular to the stacking direction of the plurality of first composite component layers 100 and 200. Thus, in the composite component device of the present disclosure, since the arrangement of the electronic component layer through vias 119, 219, and 319 can be selected according to the application, the degree of freedom in design is high.

[0125] In this specification, the "staggered arrangement" refers to an arrangement in which, in a plan view, elements are arranged at equal intervals (hereinafter also referred to as "distance L2") on straight lines that intersect each other at an included angle of 60°. When there are a plurality of straight lines that form the intersection at an included angle of 60°, the plurality of parallel straight lines are adjacent to each other at a distance of L2×√3 / 2. Therefore, the staggered arrangement can achieve higher integration than the aligned arrangement for the electronic component layer through vias 119D.

[0126] In the first embodiment, it was stated that the resin constituting the first resin sealing portion 117 in one first composite component layer 100 may be different from the resin constituting the first resin sealing portion 217 in another first composite component layer 200. In the second embodiment, among the resins constituting the first resin sealing portions 117, 217, and 317 in the three first composite component layers 100, 200, and 300, all three may be different from each other, or two of them may be different from each other. In the third embodiment, among the resins constituting the first resin sealing portions 117B, 217B, 317B, and 417B in the four first composite component layers 100, 200, 300, and 400, all four may be different from each other, or three or two of them may be different from each other.

[0127] In the first embodiment, the resins forming the first resin encapsulation portions 117 and 217 in the plurality of electronic component layers 110 and 210 were different from each other (that is, the resins forming the two first resin encapsulation portions 117 and 217 were different from each other), but it is not limited thereto. For example, in the second embodiment, among the resins forming the three first resin encapsulation portions 117, 217, and 317, two or three resins may be different from each other. In the third embodiment, among the resins forming the four first resin encapsulation portions 117B, 217B, 317B, and 417B, any two to four resins may be different from each other. Since resins of different types can be adopted in each first composite component layer in this way, the composite component device can select a specific resin type according to its application. For example, different functions can be imparted to the first resin encapsulation portion for each composite component layer. Therefore, the composite component device according to the present disclosure has a high degree of design freedom.

[0128] In the first to third embodiments, the composite component devices 1, 1A, and 1B each having two to four first composite component layers were used, but it is not limited thereto. For example, the composite component device may include five or more first composite component layers. In such a case, in the manufacturing method of the composite component device, a process combining a lamination process and a wiring formation process is executed two or more times. Since the configuration of each first composite component layer of the composite component device according to the present disclosure is substantially the same, the wiring design is less likely to become complicated, and it is easy to electrically connect between the first composite component layers. Therefore, wiring can be easily formed even when five or more first composite component layers are laminated. For this reason, restrictions on the number and type of the first electronic components incorporated in the circuit design are less likely to occur, and the degree of design freedom is high. A variety of circuit configurations are possible, and the applicable application range becomes wider.

[0129] When a process combining a lamination process and a wiring formation process is executed two or more times in the manufacturing method of the composite component device, as shown in the second to third embodiments, the lamination process, the inversion layer manufacturing process, the second composite component layer formation process, and the inversion layer formation process can change the order of the processes within the range where the composite component device can be manufactured.

[0130] In the first to third embodiments, the composite component device had three electronic components in each first composite component layer, but is not limited thereto. For example, the composite component device may have one, two, or four or more first electronic components in each first composite component layer. Further, the composite component device may have different numbers of first electronic components in each first composite component layer. Therefore, restrictions on the number and type of electronic components incorporated in the circuit design are less likely to occur, and the degree of freedom in design is high. A variety of circuit configurations are possible, and the applicable range of applications becomes wider.

[0131] In the first to third embodiments, the so-called Face up method was adopted in the electronic component encapsulation process, and a liquid resin was directly applied and molded on the silicon base layer 182 on which the first electronic component 113 was mounted, but is not limited thereto. For example, the so-called Face dawn method may be adopted, a liquid resin may be applied on a separate sheet, and the silicon base layer 182 on which the first electronic component 113 is mounted may be adhered and molded. Further, granular resin or sheet resin may be used instead of the liquid resin.

[0132] In the first embodiment, the adhesive layer 174 was removed in the electronic component layer precursor adhesion process, but is not limited thereto. Instead of removing the adhesive layer 174, all or a part of the adhesive layer 174 may be left. When the adhesive layer 174 is left, the smoothness of the surface of the electronic component layer precursor can be improved. Thereby, the rewiring layer 220 that more accurately reflects the design can be formed.

[0133] Aspects of the composite component device and its manufacturing method according to the present disclosure are as follows. <1> A composite component device including a plurality of stacked first composite component layers each incorporating a first electronic component, wherein the first composite component layer includes an electronic component layer having a first main surface and a second main surface facing the first main surface, and a rewiring layer provided on the first main surface, at least two of the plurality of first composite component layers form an inversion layer formed in a pair such that the second main surfaces face each other, The electronic component layer has the first electronic component, a first resin encapsulation portion that encapsulates the first electronic component, a side wall portion disposed so as to incorporate the first electronic component, and an electronic component layer through-via that penetrates the side wall portion and is electrically connected to the rewiring layer. The first electronic component is a composite component device that is directly bonded to the rewiring layer. <2> The rewiring layer has a dielectric film substantially made of an inorganic material, and is the composite component device according to <1>. <3> The side wall portion is substantially made of silicon, and is the composite component device according to <1> or <2>. <4> The electronic component layer has a plurality of first electronic components per layer, and is the composite component device according to any one of <1> to <3>. <5> In a plurality of the electronic component layers, the resins constituting the respective first resin encapsulation portions are different from each other, and are the composite component device according to any one of <1> to <4>. <6> Furthermore, the composite component device according to any one of <1> to <5> includes a second composite component layer having a second electronic component and a second resin encapsulation portion that encapsulates the second electronic component as the outermost layer. <7> The second composite component layer does not have a side wall portion, and is the composite component device according to <6>. <8> The inversion layer is disposed at least on the central side in the stacking direction of the plurality of first composite component layers. As the outermost layer of the composite component device, a first composite component layer that does not constitute the inversion layer is disposed, and is the composite component device according to any one of <1> to <7>. <9> The electronic component layer through-via is provided so as to be arranged in a staggered pattern or an aligned pattern in a cross section perpendicular to the stacking direction of the first composite component layer, and is the composite component device according to any one of <1> to <2>. <10> The electronic component layer through-via is provided so as to be substantially parallel to the stacking direction of the first composite component layer. In at least one pair of adjacent first composite component layers among the plurality of composite component layers, the electronic component layer through vias are arranged in a straight line. The composite component device according to any one of <1> to <9>. <11> The composite component device according to any one of <1> to <10>, comprising a plurality of the inversion layers. <12> In the composite component device according to <11>, two adjacent inversion layers among the plurality of inversion layers are joined via an adhesive layer. <13> The electronic component layer through via has a sidewall through via that penetrates the sidewall portion and an inter-inversion layer conductive via that penetrates the adhesive layer and electrically connects between the inversion layers. In a cross-section perpendicular to the stacking direction of the first composite component layer, the cross-sectional area of the inter-inversion layer conductive via is larger than the cross-sectional area of the sidewall through via. The composite component device according to <12>. <14> The plurality of first composite component layers constitute an even number of inversion layers. In the composite component device according to any one of <11> to <13>, the even number of inversion layers is symmetric with respect to the center in the stacking direction of the even number of inversion layers. <15> The first electronic component has a first surface on which component electrodes are arranged and a second surface facing the first surface. The plurality of first composite component layers are joined by an adhesive layer. The first electronic component includes component electrodes and an electronic component main body portion having a first surface on which the component electrodes are arranged and a second surface facing the first surface. The second surface contacts the adhesive layer. The composite component device according to any one of <1> to <14>. <16> The electronic component layer has a plurality of first electronic components per layer. The plurality of first electronic components are different. The composite component device according to any one of <1> to <15>. <17> A method for manufacturing a composite component device according to any one of <1> to <16>, comprising: An electronic component bonding step of bonding the first electronic component to the silicon base layer such that the component electrode of the first electronic component contacts the bottom surface of the silicon base layer having a lattice-shaped side wall portion and a bottom surface via an electronic component adhesive layer; An electronic component encapsulation step of encapsulating the first electronic component with a resin to form a resin encapsulation portion; An electronic component layer precursor manufacturing step of removing the silicon base layer and the electronic component adhesive layer so as to expose the entire surface of the component electrode to produce an electronic component layer precursor; A cavity bonding step of bonding the electronic component layer precursors such that the main surfaces of the two electronic component layer precursors where the component electrodes are not exposed face each other to produce a pair of electronic component layer precursors; An inverted layer precursor manufacturing step of forming a redistribution layer on one main surface of the pair of electronic component layer precursors where the component electrodes are exposed and through the side wall portions of the pair of electronic component layer precursors to produce an inverted layer precursor; An inverted layer manufacturing step of forming a redistribution layer on the other main surface of the inverted layer precursor located on the opposite side of the one main surface to form an inverted layer; A lamination step of laminating the separately manufactured pair of electronic component layer precursors and one of the separately manufactured electronic component layer precursors on the redistribution layer of the inverted layer precursor; A wiring formation step of forming an electronic component layer through-via and a redistribution layer on the laminated pair of electronic component layer precursors and one of the laminated electronic component layer precursors; comprising: A method for manufacturing a composite component device, wherein the step combining the lamination step and the wiring formation step is executed 0 or more times. <18> The method for manufacturing a composite component device according to <17>, wherein the step combining the lamination step and the wiring formation step is executed 1 or more times.

Industrial Applicability

[0134] The composite component device according to the present disclosure can be mounted and used in various electronic devices.

Description of Reference Numerals

[0135] 1, 1A, 1B ··· Composite component device 10, 10A, 10B, 20B ··· Inversion layer 10’, 10A’, 10B’, 20’ ··· Inversion layer precursor 10’’, 10B’’ ··· Pair of electronic component layer precursors 100, 200, 300, 400 ··· First composite component layer 110, 210, 310, 410 ··· Electronic component layer 110’, 110B’, 210’, 310B’, 410B’ ··· Electronic component layer precursor 111, 211, 311, 411 ··· First main surface (of electronic component layer) 111’ ··· Main surface (of electronic component layer precursor) 112’, 212’ ··· Main surface (of electronic component layer precursor) 112, 212, 312, 412 ··· Second main surface (of electronic component layer) 113, 113B, 213, 213B, 313, 313B, 413B ··· First electronic component 113a ··· First surface 113b ··· Second surface 113c ··· Electronic component main body part 113d ··· Component electrode 113e ··· Insulating part 115, 215, 315 ··· Side wall part 117, 117B, 217, 217B, 317, 317B, 417B ··· First resin encapsulation part 119, 119A, 219, 219A, 319, 319A, 419 ··· Electronic component layer through via 119a ··· Conductive via 119b ··· Side wall part through via 120, 220, 320, 420 ··· Redistribution layer 130, 230, 330 ··· Adhesive layer 172 ··· Electronic component adhesive layer 182 ··· Silicon base layer 900 ··· The second composite component layer 913 ··· The second electronic component 917 ··· The second resin encapsulation part

Claims

1. A composite component device including a plurality of stacked first composite component layers each containing a first electronic component, wherein the first composite component layer includes an electronic component layer having a first main surface and a second main surface facing the first main surface, and a redistribution layer provided on the first main surface, at least two of the plurality of first composite component layers form an inversion layer configured such that two layers are in a set and the second main surfaces thereof face each other, the electronic component layer has the first electronic component, a first resin encapsulation portion encapsulating the first electronic component, a side wall portion arranged to take in the first electronic component, and an electronic component layer through-via penetrating the side wall portion and electrically connected to the redistribution layer, the first electronic component is directly bonded to the redistribution layer, the composite component device.

2. including a plurality of the inversion layers, two adjacent inversion layers among the plurality of inversion layers are joined via a first adhesive layer, the electronic component layer through-via of the first composite component layer joined via the first adhesive layer in the two inversion layers has a side wall portion through-via penetrating the side wall portion and an inter-inversion layer conductive via penetrating the first adhesive layer and electrically connecting between the inversion layers, in a cross section perpendicular to the stacking direction of the first composite component layer, a cross-sectional area of the inter-inversion layer conductive via is larger than a cross-sectional area of the side wall portion through-via, the composite component device according to Claim 1.

3. The two first composite component layers constituting the inversion layer are joined via a second adhesive layer, the electronic component layer through-via of the two first composite component layers has a side wall portion through-via penetrating the side wall portion and a second adhesive layer conductive via penetrating the second adhesive layer and electrically connected to the side wall portion through-via, in a cross section perpendicular to the stacking direction of the first composite component layer, a cross-sectional area of the second adhesive layer conductive via is larger than a cross-sectional area of the side wall portion through-via, the composite component device according to Claim 1.

4. the inversion layer is at least arranged at the center in the stacking direction of the plurality of first composite component layers, a first composite component layer not constituting the inversion layer is arranged as the outermost layer of the composite component device, the electronic component layer through-via of the first composite component layer not constituting the inversion layer and adjacent to the inversion layer has a side wall portion through-via penetrating the side wall portion and a third adhesive layer conductive via penetrating the third adhesive layer and electrically connected to the side wall portion through-via, The composite component device according to claim 1, wherein in a cross section perpendicular to the stacking direction of the first composite component layer, the cross-sectional area of the third adhesive layer conductive via is larger than the cross-sectional area of the side wall portion through via.

5. The composite component device according to any one of claims 2 to 4, wherein the rewiring layer has a dielectric film made of an inorganic material.

6. The composite component device according to any one of claims 2 to 4, wherein the side wall portion consists substantially of silicon.

7. The composite component device according to any one of claims 2 to 4, wherein the electronic component layer has a plurality of first electronic components per layer.

8. The composite component device according to any one of claims 2 to 4, wherein in the plurality of electronic component layers, the resins constituting each first resin encapsulation portion are different from each other.

9. Furthermore, a second composite component layer having a second electronic component and a second resin encapsulation portion for encapsulating the second electronic component is provided as the outermost layer, according to claim 2 or 3. The composite component device described.

10. The composite component device according to claim 9, wherein the second composite component layer has no side wall portion.

11. The composite component device according to any one of claims 2 to 4, wherein the electronic component layer through via is provided so as to be arranged in a staggered pattern or an aligned pattern in a cross section perpendicular to the stacking direction of the first composite component layer.

12. The electronic component layer through via is provided so as to be substantially parallel to the stacking direction of the first composite component layer, In at least a pair of adjacent first composite component layers among the plurality of composite component layers, the electronic component layer through vias are arranged so as to be arranged on a straight line, according to any one of claims 2 to 4. The composite component device described.

13. The plurality of first composite component layers constitute an even number of inversion layers, The composite component device according to claim 2, wherein the even number of inversion layers are symmetric with respect to the center in the stacking direction of the even number of inversion layers.

14. The first electronic component has a first surface on which component electrodes are arranged and a second surface facing the first surface, The plurality of first composite component layers are joined by an adhesive layer, and the second surface of the first electronic component contacts the adhesive layer, according to any one of claims 2 to 4. The composite component device described.

15. The electronic component layer has a plurality of first electronic components per layer, The composite component device according to any one of claims 2 to 4, wherein the plurality of first electronic components are different.

16. A method for manufacturing a composite component device according to any one of claims 2 to 4, comprising: An electronic component bonding step of bonding the first electronic component to the silicon base layer such that the component electrodes of the first electronic component are in contact with the bottom surface of the silicon base layer having a lattice-shaped side wall portion and a bottom surface via an electronic component adhesive layer; An electronic component encapsulation step of encapsulating the first electronic component with a resin to form a resin encapsulation portion; An electronic component layer precursor manufacturing step of removing the silicon base layer and the electronic component adhesive layer so as to expose the entire surface of the component electrodes to produce an electronic component layer precursor; An electronic component layer precursor bonding step of bonding the electronic component layer precursors such that the main surfaces of the two electronic component layer precursors where the component electrodes are not exposed face each other to produce a pair of electronic component layer precursors; An inverted layer precursor manufacturing step of forming a redistribution layer on one main surface of the pair of electronic component layer precursors where the component electrodes are exposed and on the side wall portions of the pair of electronic component layer precursors to penetrate through the side wall portions to produce an inverted layer precursor; An inverted layer manufacturing step of forming a redistribution layer on the other main surface of the inverted layer precursor located on the opposite side of the one main surface to form an inverted layer; A lamination step of laminating the pair of separately manufactured electronic component layer precursors and one of the separately manufactured electronic component layer precursors on the redistribution layer of the inverted layer precursor; A wiring formation step of forming an electronic component layer through-via and a redistribution layer on the laminated pair of electronic component layer precursors and on the one laminated electronic component layer precursor; comprising: A method for manufacturing a composite component device, wherein the step combining the lamination step and the wiring formation step is executed 0 or more times.

17. The method for manufacturing a composite component device according to claim 16, wherein the step combining the lamination step and the wiring formation step is executed 1 or more times.

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