Semiconductor device and module

Abstract

A capacitor 1, which is an embodiment of a semiconductor device, comprises a substrate 10, a circuit layer 20, and first resin bodies 30. The first resin bodies 30 are respectively provided, in a plan view from a thickness direction T, between an end of the substrate 10 and a first external electrode 27, and between the end of the substrate 10 and a second external electrode 28. In the thickness direction T, leading ends of the first resin body 30 on the side opposite to the substrate 10 are higher than those of the first external electrode 27 and the second external electrode 28 on the side opposite to the substrate 10. In a cross-sectional view from a direction perpendicular to the thickness direction T, a side surface of the resin body 30 on a first external electrode 27 side or a second external electrode 28 side gets closer to the side surface opposite to the substrate 10 from the substrate 10 side toward a surface of the first resin body 30 on a side at an end side of the substrate 10, and the surface of the first resin body 30 on the side at the end side of the substrate 10 is made to tower with respect to a first main surface 10a of the substrate 10.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a module.

Background Art

[0002] As a typical capacitor element used in a semiconductor integrated circuit, for example, a MIM (Metal Insulator Metal) capacitor is known. The MIM capacitor is a capacitor having a parallel plate structure in which an insulator is sandwiched between a lower electrode and an upper electrode.

[0003] Patent Document 1 discloses an electronic component including a circuit element formed on a substrate, at least one pair of terminal electrodes connected to the circuit element and disposed opposite to at least one surface, and a support formed to protrude from the at least one pair of terminal electrodes and provided in a region that does not overlap the circuit element in a plan view of the at least one surface. Patent Document 1 describes, as an example of an electronic component, a capacitor in which a lower electrode, a dielectric layer, a first electrode, a first protective layer, a second electrode, a second protective layer, terminal electrodes, and a support are laminated in this order on a substrate.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] When mounting an electronic component on an external substrate or the like using a surface mounter, a load is applied in the thickness direction of the electronic component during substrate mounting. Therefore, if an excessive load is applied to the electronic component, such a load becomes an impact force, and there may occur a problem that circuit elements formed in the electronic component are damaged. According to the electronic component described in Patent Document 1, the support protrudes more than at least one pair of terminal electrodes arranged opposite to each other. In other words, since the support is formed thicker than at least one pair of terminal electrodes arranged opposite to each other, it is said that the support can prevent mechanical breakage of the electronic component that may occur during mounting by receiving, dispersing, and relaxing the load applied from the outside.

[0006] However, in the electronic component described in Patent Document 1, since the effect of relaxing the load applied to the element surface during mounting is not sufficient, there is a risk that the element may be damaged by the load transmitted from the support.

[0007] The present invention has been made to solve the above problems, and an object thereof is to provide a semiconductor device in which damage to an element is suppressed even when a load is applied. Another object of the present invention is to provide a module including the above semiconductor device.

Means for Solving the Problems

[0008] The semiconductor device of the present invention includes a substrate having a first main surface and a second main surface facing each other in the thickness direction, a circuit layer provided on the first main surface of the substrate, and a first resin body. The circuit layer includes a first electrode layer provided on the substrate side, a second electrode layer provided opposite to the first electrode layer, a dielectric layer provided between the first electrode layer and the second electrode layer in the thickness direction, a first external electrode drawn out to the surface of the circuit layer opposite to the substrate, and a second external electrode drawn out to the surface of the circuit layer opposite to the substrate and provided spaced apart from the first external electrode. The first resin body is provided between the end of the substrate and the first external electrode and between the end of the substrate and the second external electrode in a plan view from the thickness direction. In the thickness direction, the tip of the first resin body on the side opposite to the substrate is at a position higher than the tips of the first external electrode and the second external electrode on the side opposite to the substrate. In a cross-sectional view from a direction perpendicular to the thickness direction, the side surface of the first resin body on the side of the first external electrode or the second external electrode approaches the side surface of the end of the substrate of the first resin body from the substrate side toward the side opposite to the substrate, and the side surface of the end of the substrate of the first resin body stands upright with respect to the first main surface of the substrate.

[0009] The module of the present invention includes the semiconductor device of the present invention, a wiring substrate having a first land electrically connected to the first external electrode and a second land electrically connected to the second external electrode.

Advantages of the Invention

[0010] According to the present invention, it is possible to provide a semiconductor device in which breakage of elements is suppressed even when a load is applied. Further, according to the present invention, it is possible to provide a module including the semiconductor device.

Brief Description of the Drawings

[0011]

Figure 1-1

Figure 1-2

Figure 1-3

Figure 2-1

Figure 2-2

Figure 3

Figure 4-1

Figure 4-2

Figure 4-3

Figure 4-4

Figure 4-5

Figure 4-6

Figure 4-7

Figure 4-8

Figure 4-9

Figure 4-10

Figure 4-11

Figure 5

Figure 6

Figure 7-1

Figure 7-2

Figure 8-1

Figure 8-2

Figure 9-1

Figure 9-2

Figure 10-1

Figure 10-2

Figure 11-1

Figure 11-2

Figure 12-1

Figure 12-2

Embodiments for Carrying Out the Invention

[0012] Hereinafter, the semiconductor device and module of the present invention will be described. However, the present invention is not limited to the following configurations, and can be appropriately modified and applied without changing the gist of the present invention. In addition, combinations of two or more of the individual preferred configurations of the present invention described below are also within the scope of the present invention.

[0013] Each of the embodiments described below is an example, and it goes without saying that partial replacement or combination of the configurations shown in different embodiments is possible. In and after Embodiment 2, descriptions of matters common to Embodiment 1 will be omitted, and only differences will be explained. In particular, for the same operational effects due to the same configurations, sequential mention will not be made for each embodiment.

[0014] In the following description, when not particularly distinguishing each embodiment, it is simply referred to as "the semiconductor device of the present invention" and "the module of the present invention". The shapes, arrangements, etc. of the semiconductor device, module, and each component of the present invention are not limited to the illustrated examples.

[0015] Also, in the following, as an embodiment of the semiconductor device of the present invention, a capacitor will be described as an example. The semiconductor device of the present invention may be the capacitor itself (i.e., the capacitor element), or may be a device including the capacitor.

[0016] [Embodiment 1] The semiconductor device of the present invention includes a substrate, a circuit layer, and a first resin body. In the semiconductor device of the present invention, the first resin body is provided between the end of the substrate and the first external electrode and between the end of the substrate and the second external electrode in a plan view from the thickness direction, respectively. In the thickness direction, the tip of the first resin body on the side opposite to the substrate is at a position higher than the tips of the first external electrode and the second external electrode on the side opposite to the substrate. In a cross-sectional view from a direction perpendicular to the thickness direction, the side surface of the first resin body on the first external electrode or second external electrode side approaches the side surface of the end portion of the first resin body on the substrate side from the substrate side toward the side opposite to the substrate, and the side surface of the end portion of the first resin body on the substrate side stands upright with respect to the first main surface of the substrate. The first resin body in the semiconductor device of the present invention may have a first outer peripheral portion provided along the end of the substrate between the end of the substrate and the first external electrode in a plan view from the thickness direction, and a second outer peripheral portion provided along the end of the substrate between the end of the substrate and the second external electrode in a plan view from the thickness direction. Such an example will be described below as the capacitor of Embodiment 1 of the present invention.

[0017] FIG. 1-1 is a schematic plan view showing an example of a capacitor according to Embodiment 1 of the present invention. FIG. 1-2 is a schematic cross-sectional view showing a portion corresponding to the line segment A1-A2 in FIG. 1-1. FIG. 1-3 is a schematic cross-sectional view showing a portion corresponding to the line segment D1-D2 in FIG. 1-1.

[0018] In this specification, the length direction, width direction, and thickness direction of the capacitor (semiconductor device) are defined as the directions indicated by arrows L, W, and T, respectively, as shown in FIGS. 1-1, 1-2, and 1-3. Here, the length direction L, width direction W, and thickness direction T are orthogonal to each other.

[0019] As shown in FIGS. 1-1, 1-2, and 1-3, the capacitor 1 includes a substrate 10, a circuit layer 20, and a first resin body 30.

[0020] The substrate 10 has a first main surface 10a and a second main surface 10b that face each other in the thickness direction T.

[0021] Examples of the constituent material of the substrate 10 include semiconductors such as silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs).

[0022] The electrical resistivity of the substrate 10 is preferably 10 -5 Ω·cm or more and 10 5 Ω·cm or less.

[0023] The dimension of the substrate 10 in the length direction L is preferably 200 μm or more and 600 μm or less.

[0024] The dimension of the substrate 10 in the width direction W is preferably 100 μm or more and 300 μm or less.

[0025] The dimension (thickness) of the substrate 10 in the thickness direction T is preferably 50 μm or more and 250 μm or less.

[0026] The circuit layer 20 is provided on the first main surface 10a of the substrate 10. The circuit layer 20 includes an insulating layer 21, a first electrode layer 22, a dielectric layer 23, a second electrode layer 24, a moisture-resistant protective layer 25, a resin protective layer 26, a first external electrode 27, and a second external electrode 28. In the first embodiment, the circuit layer 20 is provided on the entire surface of the first main surface 10a of the substrate 10, but it may be provided on a part of the first main surface 10a of the substrate 10. In that case, the circuit layer 20 is preferably provided at the central position on the first main surface 10a of the substrate 10, and it is preferably provided at a position where the central axis of the substrate 10 and the central axis of the circuit layer 20 substantially coincide.

[0027] The dimension of the circuit layer 20 in the thickness direction T is preferably 5 μm or more and 70 μm or less. The dimension of the circuit layer 20 in the thickness direction T is defined as the dimension from the surface of the insulating layer 21 on the substrate 10 side to the surface that is located on the side farthest from the substrate 10 among the outermost surfaces of the first external electrode 27 and the second external electrode 28.

[0028] The insulating layer 21 is provided on the entire surface of the first main surface 10a of the substrate 10. Although the insulating layer 21 may be provided on a part of the first main surface 10a of the substrate 10, it needs to be provided in a region that is larger than the first electrode layer 22 and overlaps the entire area of the first electrode layer 22. For example, after once forming the insulating layer on the entire surface of the first main surface 10a of the substrate 10 by oxidizing the first main surface 10a of the substrate 10 by a thermal oxidation method or forming a film by a sputtering method or a chemical vapor deposition (CVD) method, and then removing a part of the insulating layer by an etching method, the insulating layer 21 can be provided on a part of the first main surface 10a of the substrate 10.

[0029] Examples of the constituent material of the insulating layer 21 include silicon oxide (SiO, SiO2), silicon nitride (SiN), aluminum oxide (Al2O3), hafnium oxide (HfO2), tantalum oxide (Ta2O5), zirconium oxide (ZrO2), and the like.

[0030] The insulating layer 21 may have a single-layer structure or a multilayer structure including a plurality of layers made of the materials described above.

[0031] The dimension (thickness) in the thickness direction T of the insulating layer 21 is preferably 0.5 μm or more and 3 μm or less.

[0032] The first electrode layer 22 is provided on the substrate 10 side of the circuit layer 20, here, on the surface of the insulating layer 21 opposite to the substrate 10. Also, the first electrode layer 22 is provided up to a position separated from the end of the substrate 10. More specifically, the end of the first electrode layer 22 is located inside the end of the substrate 10. In the plan view shown in FIG. 1-1, the distance between the end of the first electrode layer 22 and the end of the substrate 10 is preferably 5 μm or more and 30 μm or less. Note that the end of the first electrode layer 22 may be provided on the surface of the insulating layer 21 up to the end of the substrate 10.

[0033] Examples of the constituent material of the first electrode layer 22 include metals such as aluminum (Al), silicon (Si), copper (Cu), silver (Ag), gold (Au), nickel (Ni), chromium (Cr), and titanium (Ti). The constituent material of the first electrode layer 22 may be an alloy containing at least one of the above-described metals, and specific examples thereof include aluminum-silicon alloy (AlSi), aluminum-copper alloy (AlCu), and aluminum-silicon-copper alloy (AlSiCu).

[0034] The first electrode layer 22 may have a single-layer structure or a multilayer structure including a plurality of conductor layers made of the materials described above.

[0035] The dimension (thickness) in the thickness direction T of the first electrode layer 22 is preferably 0.3 μm or more and 10 μm or less, and more preferably 0.5 μm or more and 5 μm or less.

[0036] The dielectric layer 23 is provided between the first electrode layer 22 and the second electrode layer 24 in the thickness direction T, which is here the direction orthogonal to the first main surface 10a of the substrate 10. Also, the dielectric layer 23 is provided so as to cover the first electrode layer 22 except for the opening, and the end portion of the dielectric layer 23 is also provided on the surface of the insulating layer 21 from the end portion of the first electrode layer 22 to the end portion of the substrate 10.

[0037] Examples of the constituent material of the dielectric layer 23 include silicon nitride (SiN), silicon oxide (SiO, SiO2), aluminum oxide (Al2O3), hafnium oxide (HfO2), tantalum oxide (Ta2O5), zirconium oxide (ZrO2), and the like. Among them, the dielectric layer 23 preferably contains at least one of silicon nitride and silicon oxide.

[0038] The dimension (thickness) of the dielectric layer 23 in the thickness direction T is preferably 0.02 μm or more and 4 μm or less.

[0039] The second electrode layer 24 is provided to face the first electrode layer 22. More specifically, the second electrode layer 24 is provided on the surface of the dielectric layer 23 opposite to the substrate 10 and faces the first electrode layer 22 with the dielectric layer 23 interposed therebetween.

[0040] Examples of the constituent material of the second electrode layer 24 include metals such as aluminum (Al), silicon (Si), copper (Cu), silver (Ag), gold (Au), nickel (Ni), chromium (Cr), and titanium (Ti). The constituent material of the second electrode layer 24 may be an alloy containing at least one of the above-described metals, and specific examples thereof include aluminum-silicon alloy (AlSi), aluminum-copper alloy (AlCu), aluminum-silicon-copper alloy (AlSiCu), and the like.

[0041] The second electrode layer 24 may have a single-layer structure or a multilayer structure including a plurality of conductor layers made of the above-described materials.

[0042] The dimension (thickness) in the thickness direction T of the second electrode layer 24 is preferably 0.3 μm or more and 10 μm or less, more preferably 0.5 μm or more and 5 μm or less.

[0043] A capacitor element is constituted by the first electrode layer 22, the dielectric layer 23, and the second electrode layer 24. More specifically, the capacitance of the capacitor element is formed in a region where the first electrode layer 22, the dielectric layer 23, and the second electrode layer 24 overlap.

[0044] The moisture-resistant protective layer 25 is provided so as to cover the dielectric layer 23 and the second electrode layer 24 except for the opening. By providing the moisture-resistant protective layer 25, the moisture resistance of the capacitor element, particularly the dielectric layer 23, is enhanced.

[0045] Examples of the constituent material of the moisture-resistant protective layer 25 include silicon nitride (SiN), silicon oxide (SiO2), and the like.

[0046] The dimension (thickness) in the thickness direction T of the moisture-resistant protective layer 25 is preferably 0.5 μm or more and 3 μm or less.

[0047] The resin protective layer 26 is provided so as to cover the first electrode layer 22 and the second electrode layer 24. Here, the resin protective layer 26 is provided on the surface of the moisture-resistant protective layer 25 opposite to the substrate 10. Further, the end portion of the resin protective layer 26 extends to the end portion of the substrate 10, and the resin protective layer 26 is provided with openings at positions overlapping the openings of the dielectric layer 23 and the moisture-resistant protective layer 25 (openings overlapping the first electrode layer 22) and at positions overlapping the openings of the moisture-resistant protective layer 25 (openings overlapping the second electrode layer 24). By providing the resin protective layer 26, the capacitor element, particularly the dielectric layer 23, is sufficiently protected from moisture.

[0048] Examples of the constituent material of the resin protective layer 26 include resins such as polyimide resin, polybenzoxazole resin, benzocyclobutene resin, and resins in solder resist.

[0049] The dimension (thickness) of the resin protective layer 26 in the thickness direction T is preferably 1 μm or more and 20 μm or less.

[0050] The first external electrode 27 is drawn to the surface of the circuit layer 20 opposite the substrate 10 and is separated from the second external electrode 28. That is, the first external electrode 27 is located on the side of the first electrode layer 22 opposite the substrate 10. Here, the first external electrode 27 is electrically connected to the first electrode layer 22. More specifically, openings provided in the dielectric layer 23, the moisture-resistant protective layer 25, and the resin protective layer 26 extend in the thickness direction T by communicating with each other, and the first external electrode 27 is electrically connected to the first electrode layer 22 through these openings. Furthermore, the first external electrode 27 is separated from the second electrode layer 24 in the plane along the length direction L and the width direction W (see FIG. 1-1 ), and is therefore not electrically connected to the second electrode layer 24.

[0051] The first external electrode 27 may have a single-layer structure or a multi-layer structure.

[0052] When the first external electrode 27 has a single-layer structure, its constituent materials include, for example, gold (Au), silver (Ag), copper (Cu), palladium (Pd), nickel (Ni), titanium (Ti), aluminum (Al), and alloys containing at least one of these metals.

[0053] When the first external electrode 27 has a multilayer structure, the first external electrode 27 may have, in order from the substrate 10 side, a seed layer 29a, a first plating layer 29b, and a second plating layer 29c, as shown in Figures 1-2 and 1-3.

[0054] The seed layer 29a of the first external electrode 27 may be, for example, a laminate (Ti / Cu) of a conductor layer made of titanium (Ti) and a conductor layer made of copper (Cu).

[0055] The first plating layer 29b of the first external electrode 27 may be made of, for example, nickel (Ni).

[0056] Examples of the constituent material of the second plating layer 29c of the first external electrode 27 include gold (Au), tin (Sn), and the like.

[0057] The second external electrode 28 is drawn out on the surface of the circuit layer 20 opposite to the substrate 10 and is separated from the first external electrode 27. That is, the second external electrode 28 is located on the side of the second electrode layer 24 opposite to the substrate 10. Here, the second external electrode 28 is electrically connected to the second electrode layer 24. More specifically, the openings provided in the moisture-resistant protective layer 25 and the resin protective layer 26 communicate with each other along the thickness direction T and extend, and the second external electrode 28 is electrically connected to the second electrode layer 24 through the openings. Further, the second external electrode 28 is separated from the first electrode layer 22 on the surfaces along the length direction L and the thickness direction T (see FIGS. 1-3), and thus is not electrically connected to the first electrode layer 22.

[0058] The second external electrode 28 may have a single-layer structure or a multilayer structure.

[0059] When the second external electrode 28 has a single-layer structure, examples of the constituent material thereof include gold (Au), silver (Ag), copper (Cu), palladium (Pd), nickel (Ni), titanium (Ti), aluminum (Al), alloys containing at least one of these metals, and the like.

[0060] When the second external electrode 28 has a multilayer structure, as shown in FIGS. 1-2 and 1-3, the second external electrode 28 may have, in order from the substrate 10 side, a seed layer 29a, a first plating layer 29b, and a second plating layer 29c.

[0061] Examples of the seed layer 29a of the second external electrode 28 include a laminate (Ti / Cu) of a conductor layer made of titanium (Ti) and a conductor layer made of copper (Cu).

[0062] Examples of the constituent material of the first plating layer 29b of the second external electrode 28 include nickel (Ni) and the like.

[0063] Examples of the constituent material of the second plating layer 29c of the second external electrode 28 include gold (Au), tin (Sn), and the like.

[0064] The constituent material of the first external electrode 27 and the constituent material of the second external electrode 28 may be the same as each other or may be different from each other.

[0065] As shown in FIG. 1-1, the first resin body 30 is provided between the end of the substrate 10 and the first external electrode 27 and between the end of the substrate 10 and the second external electrode 28 in a plan view from the thickness direction T. Here, the first resin body 30 is provided on the surface of the circuit layer 20 opposite to the substrate 10.

[0066] As shown in FIG. 1-2, in the thickness direction T, the tip of the first resin body 30 on the side opposite to the substrate 10 is at a position higher than the tips of the first external electrode 27 and the second external electrode 28 on the side opposite to the substrate 10. More specifically, in the thickness direction T, the tip of the first resin body 30 on the side opposite to the substrate 10 is on the side opposite to the substrate 10 with respect to the line segment (the dotted line in FIG. 1-3) connecting the tips of the first external electrode 27 and the second external electrode 28 on the side opposite to the substrate 10.

[0067] In FIGS. 1-2 and 1-3, the outermost surface of the second external electrode 28 is uneven. In this case, in the thickness direction T, the portion of the outermost surface of the second external electrode 28 that is located farthest from the substrate 10 is defined as the tip of the second external electrode 28 on the side opposite to the substrate 10. The same applies to the first external electrode 27.

[0068] 1-2 , in a cross-sectional view perpendicular to the thickness direction T, the side surface of the first resin body 30 on the side of the first external electrode 27 or the second external electrode 28 approaches the side surface of the first resin body 30 on the end side of the substrate 10 from the substrate 10 side toward the opposite side of the substrate 10. In other words, the cross-sectional shape of the first resin body 30 is a so-called tapered shape in which the width decreases from the substrate 10 side toward the opposite side of the substrate 10. The side surface of the first resin body 30 on the side of the first external electrode 27 or the second external electrode 28 may be curved as long as it approaches the side surface of the first resin body 30 on the end side of the substrate 10 from the substrate 10 side toward the opposite side of the substrate 10.

[0069] 1-2, in a cross-sectional view perpendicular to the thickness direction T, the side surface of the first resin body 30 on the end side of the substrate 10 is steep with respect to the first main surface 10a of the substrate 10. Here, the tip of the first resin body 30 on the side opposite to the substrate 10 forms an acute angle. As shown in FIG. 1-2, it is preferable that the tip of the first resin body 30 on the side opposite to the substrate 10 is pointed.

[0070] It is preferable that the side surface of the first resin body 30 on the end side of the substrate 10 is perpendicular (90°) to the first main surface 10a of the substrate 10, but it may be inclined by approximately ±5° from the perpendicular (90°).

[0071] Furthermore, in a cross-sectional view perpendicular to the thickness direction T, as long as the side surface on the first external electrode 27 or second external electrode 28 side approaches the side surface on the end side of the substrate 10 from the substrate 10 side toward the opposite side from the substrate 10 and the side surface on the end side of the substrate 10 is steep relative to the first main surface 10a of the substrate 10, the tip of the first resin body 30 on the opposite side from the substrate 10 does not have to be acute-angled or pointed. For example, the tip of the first resin body 30 on the opposite side from the substrate 10 may be truncated or may have a rounded shape.

[0072] Fig. 2-1 is a cross-sectional view showing a state in which a load is applied to the first resin body in a capacitor having a structure of the present invention, and Fig. 2-2 is a cross-sectional view showing a state in which a load is applied to the first resin body in a capacitor having a conventional structure.

[0073] Because the first resin body 30 protrudes beyond the circuit layer 20, when mounting the capacitor 1 on a wiring board, for example, the first resin body 30 comes into contact with the wiring board (e.g., the upper surface, lands, solder, etc. of the wiring board) before the first external electrode 27 and the second external electrode 28. As a result, a load is applied to the first resin body 30, and the load applied to the first external electrode 27 and the second external electrode 28 is suppressed. At this time, as shown by the dotted line in FIG. 2-1 , because the first resin body 30 has a tapered shape and the side surface of the first resin body 30 on the end side of the substrate 10 is steep, the first resin body 30 is laterally deformed toward the end surface of the substrate 10 (to the left in FIG. 2-1 ) when the mounter presses the capacitor element. 2-2 is provided, the load is prevented from being transmitted to the dielectric layer 23 via the first resin body 30, the resin protective layer 26, and the moisture-resistant protective layer 25, thereby preventing damage to the capacitor element, particularly to the dielectric layer 23. This effect can also be obtained when the capacitor 1 is placed on a flat plate from the circuit layer 20 side.

[0074] In the thickness direction T, the protrusion dimension of the first resin body 30 relative to the circuit layer 20 is preferably 50 μm or less.

[0075] 1-1 , the first resin body 30 has a first outer peripheral portion 30a provided along the edge of the substrate 10 between the edge of the substrate 10 and the first external electrode 27 in a plan view from the thickness direction T, and a second outer peripheral portion 30b provided along the edge of the substrate 10 between the edge of the substrate 10 and the second external electrode 28 in a plan view from the thickness direction T. Here, in a plan view from the thickness direction T, the first outer peripheral portion 30a is provided around the first external electrode 27 along both ends extending in the length direction L of the substrate 10, and the second outer peripheral portion 30b is provided around the second external electrode 28 along both ends extending in the length direction L of the substrate 10.

[0076] FIG. 3 is a schematic plan view showing a modified example of the capacitor according to the first embodiment of the present invention.

[0077] In the capacitor 1A shown in Figure 3, when viewed in a plane from the thickness direction T, the first outer peripheral portion 30a is provided around the first external electrode 27 along one end extending along the width direction W of the substrate 10, and the second outer peripheral portion 30b is provided around the second external electrode 28 along the other end extending along the width direction W of the substrate 10.

[0078] Alternatively, in a plan view from the thickness direction T, the first outer peripheral portion 30a may be provided around the first external electrode 27, along both ends extending along the length direction L of the substrate 10 and one end extending along the width direction W, and the second outer peripheral portion 30b may be provided around the second external electrode 28, along both ends extending along the length direction L of the substrate 10 and the other end extending along the width direction W. In this case, the portion of the substrate 10 along the length direction L and the portion of the substrate 10 along the width direction W may be connected or separated.

[0079] As described above, it is preferable that the first resin body 30 is provided symmetrically in a plan view from the thickness direction T. By providing the first resin body 30 symmetrically, for example, when mounting the capacitor 1 on the wiring board, while receiving the load with the first resin body 30, the substrate 10 and the circuit layer 20 can be stably held on the wiring board. Such an effect can be similarly obtained when placing the capacitor 1 on the flat plate from the circuit layer 20 side.

[0080] The indentation elastic modulus of the first resin body 30 is preferably lower than that of the dielectric layer 23. In this case, since the flexibility of the first resin body 30 becomes higher than that of the dielectric layer 23, it becomes easier for the first resin body 30 to receive the load, and the load applied to the capacitor element, particularly the dielectric layer 23, is sufficiently suppressed. The indentation elastic modulus of the first resin body 30 is preferably 20 GPa or less.

[0081] The indentation elastic modulus is measured, for example, by the nanoindentation method.

[0082] The Young's modulus of the first resin body 30 is preferably 20 GPa or less. In this case, since the flexibility of the first resin body 30 becomes sufficiently high, it becomes easier for the first resin body 30 to receive the load, and the load applied to the capacitor element is sufficiently suppressed. Further, the Young's modulus of the first resin body 30 is more preferably 0.5 GPa or more and 20 GPa or less.

[0083] The Young's modulus is measured, for example, by the tensile test method.

[0084] The first resin body 30 preferably contains at least one resin selected from the group consisting of resins in the solder resist, polyimide resins, polyimide amide resins, and epoxy resins.

[0085] The first resin body 30 is preferably a cured product of a photosensitive resin.

[0086] The capacitor 1 shown in FIGS. 1-1, 1-2, and 1-3, which is an example of the capacitor according to Embodiment 1 of the present invention, is manufactured, for example, by the following method. FIGS. 4-1, 4-2, 4-3, 4-4, 4-5, 4-6, 4-7, 4-8, 4-9, 4-10, and 4-11 are cross-sectional schematic views for explaining an example of the manufacturing method of the capacitor according to Embodiment 1 of the present invention.

[0087] <Formation of Insulating Layer> FIG. 4-1 is a cross-sectional schematic view for explaining an example of the process of forming an insulating layer.

[0088] As shown in FIG. 4-1, an insulating layer 21 is formed on the first main surface 10a of the substrate 10 by, for example, thermal oxidation, sputtering, or chemical vapor deposition.

[0089] <Formation of First Electrode Layer> FIG. 4-2 is a cross-sectional schematic view for explaining an example of the process of forming the first electrode layer.

[0090] A conductor layer made of the constituent material of the first electrode layer 22 is formed on the surface of the insulating layer 21 opposite to the substrate 10 by, for example, sputtering. Thereafter, the conductor layer is patterned by combining photolithography and etching to form the first electrode layer 22 as shown in FIG. 4-2. More specifically, the first electrode layer 22 is formed to a position separated from the end of the substrate 10.

[0091] <Formation of Dielectric Layer> FIG. 4-3 is a cross-sectional schematic view for explaining an example of the process of forming the dielectric layer.

[0092] A layer made of the constituent material of the dielectric layer 23 is formed so as to cover the first electrode layer 22 by, for example, sputtering or chemical vapor deposition. Thereafter, this layer is patterned by combining, for example, photolithography and etching to form the dielectric layer 23 as shown in FIG. 4-3. More specifically, the dielectric layer 23 is formed such that an opening is provided to expose a part of the first electrode layer 22.

[0093] <Formation of the second electrode layer> FIG. 4-4 is a schematic cross-sectional view illustrating an example of a step of forming a second electrode layer.

[0094] A conductive layer made of the constituent material of the second electrode layer 24 is formed, for example, by sputtering on the surface of the structure shown in FIG. 4-3 opposite the substrate 10. The conductive layer is then patterned, for example, by a combination of photolithography and etching, to form the second electrode layer 24 as shown in FIG. 4-4. More specifically, the second electrode layer 24 is formed so as to face the first electrode layer 22 with the dielectric layer 23 sandwiched therebetween.

[0095] <Formation of moisture-resistant protective layer> FIG. 4-5 is a schematic cross-sectional view illustrating an example of a step of forming a moisture-resistant protective layer.

[0096] A layer made of the constituent material of the moisture-resistant protective layer 25 is formed on the surface of the structure shown in FIG. 4-4 opposite the substrate 10, for example, by chemical vapor deposition. This layer is then patterned, for example, by a combination of photolithography and etching, to form the moisture-resistant protective layer 25 as shown in FIG. 4-5. More specifically, the moisture-resistant protective layer 25 is formed so that openings are provided at positions overlapping the openings in the dielectric layer 23 for exposing a portion of the first electrode layer 22 and at positions for exposing a portion of the second electrode layer 24.

[0097] <Formation of resin protective layer> 4-6 are schematic cross-sectional views illustrating an example of a step of forming a resin protective layer.

[0098] A layer made of the constituent material of the resin protective layer 26 is formed on the surface opposite the substrate 10 of the structure shown in FIG. 4-5 by, for example, spin coating. This layer is then patterned, for example, by photolithography alone if the constituent material of the resin protective layer 26 is photosensitive, or by a combination of photolithography and etching if the constituent material of the resin protective layer 26 is non-photosensitive, to form the resin protective layer 26 as shown in FIG. 4-6. More specifically, the resin protective layer 26 is formed so that openings are provided at positions overlapping the openings in the dielectric layer 23 and the moisture-resistant protective layer 25 for exposing a portion of the first electrode layer 22 and at positions overlapping the opening in the moisture-resistant protective layer 25 for exposing a portion of the second electrode layer 24.

[0099] <Formation of external electrodes> Fig. 4-7 is a cross-sectional view illustrating an example of a step of forming a seed layer, Fig. 4-8 is a cross-sectional view illustrating an example of a step of forming a first plating layer and a second plating layer, and Fig. 4-9 is a cross-sectional view illustrating an example of a step of removing a portion of the seed layer.

[0100] As shown in FIG. 4-7, a seed layer 29a is formed on the surface opposite the substrate 10 of the structure shown in FIG. 4-6. Then, by combining plating and photolithography, a first plating layer 29b and a second plating layer 29c are sequentially formed as shown in FIG. 4-8. Thereafter, as shown in FIG. 4-9, a portion of the seed layer 29a is removed, for example, by etching. As a result, a second external electrode 28 as shown in FIG. 4-9 is formed. The first external electrode 27 shown in FIG. 1-3 is formed in a similar manner. More specifically, the first external electrode 27 is formed so as to be electrically connected to the first electrode layer 22 through openings provided in the dielectric layer 23, the moisture-resistant protective layer 25, and the resin protective layer 26. The second external electrode 28 is also formed so as to be electrically connected to the second electrode layer 24 through openings provided in the moisture-resistant protective layer 25 and the resin protective layer 26.

[0101] As described above, a circuit layer 20 as shown in FIGS. 4-9 is formed on the first main surface 10a of the substrate 10. As shown in FIGS. 1-3, the first external electrode 27 is drawn out to the surface of the circuit layer 20 opposite to the substrate 10 and is separated from the second external electrode 28. Also, the second external electrode 28 is drawn out to the surface of the circuit layer 20 opposite to the substrate 10 and is separated from the first external electrode 27.

[0102] <Formation of the first resin body> FIGS. 4-10 is a cross-sectional schematic view for explaining an example of the process of forming a photosensitive resin film. FIGS. 4-11 is a cross-sectional schematic view for explaining an example of the process of forming the first resin body.

[0103] As shown in FIGS. 4-10, a photosensitive resin film 35 is formed on the surface of the circuit layer 20 opposite to the substrate 10. Then, by patterning the photosensitive resin film 35 by photolithography, a first resin body 30 as shown in FIGS. 4-11 is formed on the surface of the circuit layer 20 opposite to the substrate 10. More specifically, it is provided between the end of the substrate 10 and the first external electrode 27 and between the end of the substrate 10 and the second external electrode 28 in a plan view from the thickness direction T, and in the thickness direction T, the tip on the side opposite to the substrate 10 is at a position higher than the tips on the side opposite to the substrate 10 of the first external electrode 27 and the second external electrode 28, and in a cross-sectional view from a direction perpendicular to the thickness direction T, the side surface on the first external electrode 27 or second external electrode 28 side approaches the side surface on the end side of the substrate 10 from the substrate 10 side toward the side opposite to the substrate 10, and the side surface on the end side of the substrate 10 stands up with respect to the first main surface 10a of the substrate 10, and the first resin body 30 is formed.

[0104] Thus, the capacitor 1 is manufactured.

[0105] In the above, the case of manufacturing one capacitor 1 has been described. However, after forming a plurality of circuit layers 20 on the first main surface 10a of the same substrate 10, the substrate 10 may be cut and diced to form individual pieces, thereby manufacturing a plurality of capacitors 1 simultaneously.

[0106] The module of the present invention includes a semiconductor device of the present invention, a wiring board having a first land electrically connected to a first external electrode and a second land electrically connected to a second external electrode. Hereinafter, a module including a capacitor according to Embodiment 1 of the present invention will be described as the module according to Embodiment 1 of the present invention.

[0107] FIG. 5 is a schematic cross-sectional view showing a module according to Embodiment 1 of the present invention.

[0108] As shown in FIG. 5, the module 100 includes a capacitor 1 and a wiring board 50. More specifically, in the module 100, the capacitor 1 is mounted on the wiring board 50.

[0109] The wiring board 50 has a substrate 51, a first land 52, and a second land 53.

[0110] Various wirings are provided on the substrate 51. The various wirings on the substrate 51 are independently connected to the first land 52 and the second land 53.

[0111] The first land 52 is provided on the surface of the substrate 51 and is electrically connected to the first external electrode 27. More specifically, the first land 52 is electrically connected to the first external electrode 27 via a solder 60.

[0112] Examples of the constituent material of the first land 52 include metals such as copper (Cu).

[0113] The second land 53 is provided at a position on the surface of the substrate 51 separated from the first land 52 and is electrically connected to the second external electrode 28. More specifically, the second land 53 is electrically connected to the second external electrode 28 via a solder 60.

[0114] Examples of the constituent material of the second land 53 include metals such as copper (Cu).

[0115] 5, in the module 100, the first resin body 30 is not in contact with the wiring board 50 (e.g., the first land 52, the second land 53, the solder 60, etc.) This is thought to be due to, for example, the following mechanism.

[0116] As the first mechanism, a case where the capacitor 1 is mounted on the wiring board 50 without being misaligned will be described. When the capacitor 1 is mounted on the wiring board 50 via the solder 60, first, the first resin body 30 comes into contact with the solder 60. When a reflow process is then performed, the solder 60 wets and spreads over the entire first land 52 and the second land 53, but the solder 60 avoids the first resin body 30, and as a result, the first resin body 30 does not come into contact with the solder 60.

[0117] The second mechanism is described below as a case where the capacitor 1 is mounted in a misaligned state on the wiring board 50. In this case, the self-alignment effect during the reflow process results in the first resin body 30 not coming into contact with the solder 60.

[0118] In the module 100, a molding resin 70 may be provided between the wiring substrate 50 and the first external electrode 27 and the second external electrode 28, as shown in Fig. 6. Fig. 6 is a cross-sectional view showing the module of the first embodiment of the present invention in a state where the molding resin is provided.

[0119] [Embodiment 2] The capacitor of embodiment 1 of the present invention may further include a second resin body. In this case, the second resin body is provided between the first external electrode and the second external electrode in a plan view from the thickness direction, and the tip of the second resin body on the side opposite to the substrate is located higher in the thickness direction than the tips of the first external electrode and the second external electrode on the side opposite to the substrate. Such an example will be described below as a capacitor of embodiment 2 of the present invention.

[0120] FIG. 7-1 is a schematic plan view showing an example of the capacitor according to Embodiment 2 of the present invention. FIG. 7-2 is a schematic cross-sectional view showing a portion corresponding to the line segment D1-D2 in FIG. 7-1.

[0121] In the capacitor 2 shown in FIGS. 7-1 and 7-2, a second resin body 40 is provided between the first external electrode 27 and the second external electrode 28 in a plan view from the thickness direction T. More specifically, in the plan view shown in FIG. 7-1, in the length direction L, the second resin body 40 is located between a normal line extending along the width direction W from the end of the first external electrode 27 on the second external electrode 28 side and a normal line extending along the width direction W from the end of the second external electrode 28 on the first external electrode 27 side. Here, the second resin body 40 is provided on the surface of the circuit layer 20 opposite to the substrate 10.

[0122] As shown in FIG. 7-2, in the thickness direction T, the tip of the second resin body 40 on the side opposite to the substrate 10 is at a position higher than the tips of the first external electrode 27 and the second external electrode 28 on the side opposite to the substrate 10.

[0123] The first resin body 30 and the second resin body 40 may be connected or separated.

[0124] By providing the second resin body 40, the load applied during mounting can be received not only by the first resin body 30 but also by the second resin body 40, so that the load can be dispersed.

[0125] The constituent material of the second resin body 40 may be the same as that of the first resin body 30. Also, the second resin body 40 may be formed simultaneously with the first resin body 30.

[0126] In the thickness direction T, it is preferable that the tip of the second resin body 40 on the side opposite to the substrate 10 is at a position higher than the tip of the first resin body 30 on the side opposite to the substrate 10. Thereby, since the timing at which each resin body contacts the wiring board or the like during mounting can be shifted, the load applied to each resin body can be reduced.

[0127] The second resin body 40 is preferably provided in a location surrounding the center of the substrate 10. As shown in Figs. 7-1 and 7-2, the second resin body 40 preferably extends in a direction perpendicular to the thickness direction T, that is, in a direction from the second external electrode 28 to the first external electrode 27, in this case, in a direction intersecting with the length direction L. More specifically, the second resin body 40 preferably extends in a direction perpendicular to both the length direction L and the thickness direction T, that is, in the width direction W.

[0128] In Figures 7-1 and 7-2, the second resin body 40 includes a first wall portion 40a provided on the first external electrode 27 side and a second wall portion 40b provided on the second external electrode 28 side and separated from the first wall portion 40a.

[0129] 7-1, the first wall portion 40a and the second wall portion 40b are preferably provided in parallel. In this case, for example, when mounting the capacitor 1 on a wiring board, the second resin body 40 can sufficiently stably hold the substrate 10 and the circuit layer 20 on the wiring board. In particular, by providing the first wall portion 40a on one side of the center of the substrate 10 in the length direction L and the second wall portion 40b on the other side, the second resin body 40 can more stably hold the substrate 10 and the circuit layer 20 on the wiring board.

[0130] [Embodiment 3] In the capacitor of embodiment 1 or embodiment 2 of the present invention, the first outer periphery and the second outer periphery of the first resin body may be provided continuously along the edge of the substrate. Such an example will be described below as a capacitor of embodiment 3 of the present invention.

[0131] Fig. 8-1 is a schematic plan view showing an example of a capacitor according to embodiment 3 of the present invention, and Fig. 8-2 is a schematic cross-sectional view showing a portion corresponding to line segment D1-D2 in Fig. 8-1.

[0132] In the capacitor 3 shown in FIGS. 8-1 and 8-2, the first resin body 30 has a first outer peripheral portion 30a continuously provided along the end of the substrate 10 between the end of the substrate 10 and the first external electrode 27 in a plan view from the thickness direction T, and a second outer peripheral portion 30b continuously provided along the end of the substrate 10 between the end of the substrate 10 and the second external electrode 28 in a plan view from the thickness direction T. More specifically, in a plan view from the thickness direction T, the first outer peripheral portion 30a is provided along both ends extending along the length direction L of the substrate 10 and one end extending along the width direction W around the first external electrode 27, and the portion along the length direction L of the substrate 10 and the portion along the width direction W are connected. Similarly, the second outer peripheral portion 30b is provided along both ends extending along the length direction L of the substrate 10 and the other end extending along the width direction W around the second external electrode 28, and the portion along the length direction L of the substrate 10 and the portion along the width direction W are connected.

[0133] With the above configuration, when the capacitor 3 is mounted on a wiring board to form a module, even if solder spread, so-called solder splash occurs, the first resin body 30 serves as a barrier. Therefore, short-circuiting between the first external electrode 27 and the second external electrode 28 due to solder splash can be suppressed.

[0134] A second resin body 40 may or may not be provided between the first external electrode 27 and the second external electrode 28 in a plan view from the thickness direction T. When the second resin body 40 is provided, the first resin body 30 and the second resin body 40 may or may not be connected.

[0135] [Embodiment 4] In the semiconductor device of the present invention, the first resin body may have a first corner portion, a second corner portion, a third corner portion, and a fourth corner portion provided at the four corners of the substrate in a plan view from the thickness direction. Such an example will be described below as the capacitor of Embodiment 4 of the present invention.

[0136] FIG. 9-1 is a schematic plan view showing an example of the capacitor according to Embodiment 4 of the present invention. FIG. 9-2 is a schematic cross-sectional view showing a portion corresponding to the line segment A1-A2 in FIG. 9-1.

[0137] In the capacitor 4 shown in FIGS. 9-1 and 9-2, first resin bodies 30 are provided at the four corners of the substrate 10 in a plan view from the thickness direction T. More specifically, in a plan view from the thickness direction T, the first resin bodies 30 are provided at positions where the distance between all locations on the uppermost surface of the first resin bodies 30 and the corner portions of the capacitor element (the corner portions of the substrate 10) is shorter than the shortest distance between the end portion of the second electrode layer 24 and the outer periphery of the capacitor element (the outer periphery of the substrate 10). That is, the first resin bodies 30 are provided within a range that does not exceed the dotted line extending from the end portion of the second electrode layer 24 in the plan view shown in FIG. 9-1. Here, the first resin bodies 30 are provided on the surface of the circuit layer 20 opposite to the substrate 10.

[0138] As shown in FIG. 9-1, the first resin bodies 30 have first corner portions 31a, second corner portions 31b, third corner portions 31c, and fourth corner portions 31d provided at the four corners of the substrate 10 in a plan view from the thickness direction T. The first corner portions 31a, second corner portions 31b, third corner portions 31c, and fourth corner portions 31d are each in the shape of an oblique pyramid with the bottom surface located on the substrate 10 side. And two side surfaces of the first corner portion 31a on the first external electrode 27 side (the surfaces shown as right triangles in FIG. 9-1) each approach the opposing one of the two side surfaces of the first corner portion 31a on the end portion side of the substrate 10 (the surfaces overlapping with the end portion of the substrate 10 in FIG. 9-1) from the substrate 10 side toward the side opposite to the substrate 10. Also, the two side surfaces of the first corner portion 31a on the end portion side of the substrate 10 are each upright with respect to the first main surface 10a of the substrate 10. The same applies to the second corner portion 31b. Two side surfaces of the third corner portion 31c on the second external electrode 28 side (the surfaces shown as right triangles in FIG. 9-1) each approach the opposing one of the two side surfaces of the third corner portion 31c on the end portion side of the substrate 10 (the surfaces overlapping with the end portion of the substrate 10 in FIG. 9-1) from the substrate 10 side toward the side opposite to the substrate 10. Also, the two side surfaces of the third corner portion 31c on the end portion side of the substrate 10 are each upright with respect to the first main surface 10a of the substrate 10. The same applies to the fourth corner portion 31d.

[0139] As shown in FIG. 9-1, the first resin body 30 is preferably provided at a position that does not overlap the first electrode layer 22 in a plan view in the thickness direction T.

[0140] By providing the first resin body 30 at the four corners of the substrate 10, the load per area applied to the first resin body 30 increases, which further promotes the lateral deformation of the first resin body 30 described in Fig. 2-1. As a result, damage to the capacitor element, particularly damage to the dielectric layer 23, is further suppressed.

[0141] Furthermore, if the first resin body 30 is provided at the four corners of the substrate 10, the path for filling the molding resin when molding with resin after mounting is open, thereby making it possible to prevent filling defects.

[0142] In plan view from the thickness direction T, the second resin body 40 may be provided between the first external electrode 27 and the second external electrode 28, or the second resin body 40 may not be provided.

[0143] [Embodiment 5] The capacitor of embodiment 4 of the present invention may further include a third resin body. In this case, the third resin body is provided between the first resin bodies in a plan view in the thickness direction, and the tip of the third resin body on the side opposite to the substrate is located higher in the thickness direction than the tips of the first external electrode and the second external electrode on the side opposite to the substrate. Such an example will be described below as a capacitor of embodiment 5 of the present invention.

[0144] Fig. 10-1 is a schematic plan view showing an example of a capacitor according to embodiment 5 of the present invention, and Fig. 10-2 is a schematic cross-sectional view showing a portion corresponding to line segment D1-D2 in Fig. 10-1.

[0145] In the capacitor 5 shown in FIGS. 10-1 and 10-2, a third resin body 41 is provided between the first resin bodies 30 in a plan view from the thickness direction T. More specifically, in the plan view shown in FIG. 10-1, the third resin body 41 is provided between the first corner portion 31a and the second corner portion 31b, between the second corner portion 31b and the third corner portion 31c, between the third corner portion 31c and the fourth corner portion 31d, and between the fourth corner portion 31d and the first corner portion 31a, respectively. Here, the third resin body 41 is provided on the outer peripheral portion of the substrate 10 in a plan view from the thickness direction T.

[0146] As shown in FIG. 10-2, in the thickness direction T, the tip of the third resin body 41 on the side opposite to the substrate 10 is at a position higher than the tips of the first external electrode 27 and the second external electrode 28 on the side opposite to the substrate 10.

[0147] By providing the third resin body 41, the load applied during mounting can be received not only by the first resin body 30 but also by the third resin body 41, so that the load can be dispersed.

[0148] Also, when the capacitor 5 is mounted on a wiring board to form a module, even if solder splash occurs, the third resin body 41 serves as a barrier. Therefore, short-circuiting between the first external electrode 27 and the second external electrode 28 due to solder splash can be suppressed.

[0149] The constituent material of the third resin body 41 may be the same as that of the first resin body 30. Also, the third resin body 41 may be formed simultaneously with the first resin body 30.

[0150] It is preferable that the first resin body 30 and the third resin body 41 are separated at the bottom so that the load during mounting does not transfer from the first resin body 30 to the third resin body 41.

[0151] As shown in FIG. 10-2, in a cross-sectional view from a direction perpendicular to the thickness direction T, the side surface of the third resin body 41 on the side of the first external electrode 27 or the second external electrode 28 may approach the side surface of the third resin body 41 on the end side of the substrate 10 from the substrate 10 side toward the side opposite to the substrate 10. That is, the cross-sectional shape of the third resin body 41 may be a so-called tapered shape in which the width decreases from the substrate 10 side toward the side opposite to the substrate 10. In that case, the side surface of the third resin body 41 on the side of the first external electrode 27 or the second external electrode 28 may be curved as long as it approaches the side surface of the third resin body 41 on the end side of the substrate 10 from the substrate 10 side toward the side opposite to the substrate 10.

[0152] Furthermore, as shown in FIG. 10-2, in a cross-sectional view from a direction perpendicular to the thickness direction T, the side surface of the third resin body 41 on the end side of the substrate 10 may be upright with respect to the first main surface 10a of the substrate 10. In that case, the tip of the third resin body 41 on the side opposite to the substrate 10 may be an acute angle. As shown in FIG. 10-2, the tip of the third resin body 41 on the side opposite to the substrate 10 may be pointed.

[0153] In the thickness direction T, it is preferable that the tip of the third resin body 41 on the side opposite to the substrate 10 is at a position lower than the tip of the first resin body 30 on the side opposite to the substrate 10. Thereby, since the timing at which each resin body contacts a wiring board or the like during mounting can be shifted, the load applied to each resin body can be reduced.

[0154] In a plan view from the thickness direction T, a second resin body 40 may or may not be provided between the first external electrode 27 and the second external electrode 28. When the second resin body 40 is provided, the second resin body 40 and the third resin body 41 may or may not be connected.

[0155] When the second resin body 40 is provided between the first external electrode 27 and the second external electrode 28, it is preferable that the tip of the second resin body 40 on the side opposite to the substrate 10 in the thickness direction T is higher than the tip of the first resin body 30 on the side opposite to the substrate 10. This makes it possible to stagger the timing at which each resin body comes into contact with the wiring board or the like during mounting, thereby reducing the load applied to each resin body.

[0156] Fig. 11-1 is a schematic plan view showing a modified example of the capacitor according to the fifth embodiment of the present invention, and Fig. 11-2 is a schematic cross-sectional view showing a portion corresponding to the line segment D1-D2 in Fig. 11-1.

[0157] In the capacitor 5A shown in FIGS. 11-1 and 11-2, the tip of the second resin body 40 on the side opposite to the substrate 10 in the thickness direction T is higher than the tip of the third resin body 41 on the side opposite to the substrate 10.

[0158] Although not shown in Figures 11-1 and 11-2, in the thickness direction T, the tip of the second resin body 40 opposite the substrate 10 is at a higher position than the tip of the first resin body 30 opposite the substrate 10, and the tip of the third resin body 41 opposite the substrate 10 is at a lower position than the tip of the first resin body 30 opposite the substrate 10.

[0159] [Embodiment 6] In the capacitors of the first to fifth embodiments of the present invention, the circuit layer may further include a third electrode layer that faces the first electrode layer and is spaced apart from the second electrode layer. Such an example will be described below as the capacitor of the sixth embodiment of the present invention.

[0160] Fig. 12-1 is a schematic plan view showing an example of a capacitor according to embodiment 6 of the present invention, and Fig. 12-2 is a schematic cross-sectional view showing a portion corresponding to line segment D1-D2 in Fig. 12-1.

[0161] In the capacitor 6 shown in FIGS. 12-1 and 12-2, the circuit layer 20 further includes a third electrode layer 24a.

[0162] The first external electrode 27 is drawn out to the surface of the circuit layer 20 opposite the substrate 10 and is separated from the second external electrode 28. That is, the first external electrode 27 is located on the opposite side of the third electrode layer 24a from the substrate 10. Here, the first external electrode 27 is electrically connected to the third electrode layer 24a. More specifically, the openings provided in the moisture-resistant protective layer 25 and the resin protective layer 26 extend in the thickness direction T by communicating with each other, and the first external electrode 27 is electrically connected to the third electrode layer 24a through the openings. Furthermore, the first external electrode 27 is separated from the first electrode layer 22 in the plane along the length direction L and the thickness direction T (see FIG. 12-2 ), and is therefore not electrically connected to the first electrode layer 22.

[0163] The third electrode layer 24a is provided opposite the first electrode layer 22 and spaced apart from the second electrode layer 24. More specifically, the third electrode layer 24a is provided on the surface of the dielectric layer 23 opposite the substrate 10, and faces the first electrode layer 22 with the dielectric layer 23 interposed therebetween.

[0164] Examples of materials constituting the third electrode layer 24a include metals such as aluminum (Al), silicon (Si), copper (Cu), silver (Ag), gold (Au), nickel (Ni), chromium (Cr), titanium (Ti), etc. The material constituting the third electrode layer 24a may be an alloy containing at least one of the above-mentioned metals, and specific examples thereof include an aluminum-silicon alloy (AlSi), an aluminum-copper alloy (AlCu), an aluminum-silicon-copper alloy (AlSiCu), etc.

[0165] The third electrode layer 24a may have a single layer structure or a multi-layer structure including a plurality of conductive layers made of the above-mentioned materials.

[0166] The dimension (thickness) of the third electrode layer 24a in the thickness direction T is preferably 0.3 μm or more and 10 μm or less, and more preferably 0.5 μm or more and 5 μm or less.

[0167] A capacitor element is composed of a first electrode layer 22, a dielectric layer 23, and a third electrode layer 24a. More specifically, the capacitance of the capacitor element is formed in a region where the first electrode layer 22, the dielectric layer 23, and the third electrode layer 24a overlap.

[0168] In the configuration of the capacitor 1 shown in FIGS. 1-1 and 1-2, a capacitor is formed on the left side, while in the configuration of the capacitor 6 shown in FIGS. 12-1 and 12-2, capacitors are formed on both the left and right sides. As a result, a capacitor having the same capacitance as that of the capacitor 1 can be formed with the thickness of the dielectric layer 23 being approximately halved. Therefore, the manufacturing cost can be reduced by the amount that the dielectric layer 23 of the capacitor with a small capacitance can be made thinner. On the other hand, when the dielectric layer 23 becomes thinner, the capacitor element is more likely to be damaged when a load is applied. However, by raising the first resin body 30, damage to the capacitor element can be suppressed.

[0169] [Other Embodiments] The semiconductor device of the present invention is not limited to the above-described embodiments, and various applications and modifications can be made within the scope of the present invention regarding the configuration, manufacturing conditions, etc. of semiconductor devices such as capacitors.

Explanation of Reference Numerals

[0170] 1, 1A, 2, 3, 4, 5, 5A, 6 Capacitor (Semiconductor Device) 10 Substrate 10a First Main Surface of Substrate 10b Second Main Surface of Substrate 20 Circuit Layer 21 Insulating Layer 22 First Electrode Layer 23 Dielectric Layer 24 Second Electrode Layer 24a Third Electrode Layer 25 Moisture-Resistant Protection Layer 26 Resin Protection Layer 27 First External Electrode 28 Second External Electrode 29a Seed Layer 29b First Plating Layer 29c Second plating layer 30 First resin body 30a 1st outer circumference 30b 2nd outer periphery 31a 1st corner 31b 2nd corner 31c 3rd corner 31d 4th corner 35 Photosensitive resin film 40 Second resin body 40a First wall portion 40b 2nd wall part 41 Third resin body 50 Wiring board 51 PCB 52 Land 1 53 Second Land 60 solder 70 Molding resin 100 modules L lengthwise T thickness direction W width direction

Claims

1. A substrate having a first main surface and a second main surface opposite to each other in the thickness direction, A circuit layer provided on the first main surface of the substrate, A plurality of first resin bodies, and comprising: The circuit layer includes a first electrode layer provided on the substrate side, a second electrode layer provided opposite to the first electrode layer, a dielectric layer provided between the first electrode layer and the second electrode layer in the thickness direction, a first external electrode drawn out to the surface of the circuit layer opposite to the substrate, and a second external electrode drawn out to the surface of the circuit layer opposite to the substrate and provided spaced apart from the first external electrode. The plurality of first resin bodies are respectively provided between the end of the substrate and the first external electrode, and between the end of the substrate and the second external electrode in a plan view from the thickness direction. In the thickness direction, the tip of each first resin body on the side opposite to the substrate is at a position higher than the tips of the first external electrode and the second external electrode on the side opposite to the substrate. In a cross-sectional view from a direction perpendicular to the thickness direction, the side surface of each first resin body on the first external electrode or the second external electrode side approaches the side surface of the first resin body on the end side of the substrate from the substrate side toward the side opposite to the substrate, and the side surface of each first resin body on the end side of the substrate stands upright with respect to the first main surface of the substrate. A semiconductor device.

2. The semiconductor device according to claim 1, wherein in a cross-sectional view from a direction perpendicular to the thickness direction, the tip of each first resin body on the side opposite to the substrate is an acute angle.

3. Further comprising a second resin body, The second resin body is provided between the first external electrode and the second external electrode in a plan view from the thickness direction. The semiconductor device according to claim 1, wherein in the thickness direction, the tip of the second resin body on the side opposite to the substrate is at a position higher than the tips of the first external electrode and the second external electrode on the side opposite to the substrate.

4. The semiconductor device according to claim 3, wherein in the thickness direction, the tip of the second resin body on the side opposite to the substrate is at a position higher than the tips of each first resin body on the side opposite to the substrate.

5. 2. The semiconductor device of claim 1, wherein the plurality of first resin bodies have a first outer peripheral portion provided along the edge of the substrate between the edge of the substrate and the first external electrode when viewed in a plane from the thickness direction, and a second outer peripheral portion provided along the edge of the substrate between the edge of the substrate and the second external electrode when viewed in a plane from the thickness direction.

6. 2. The semiconductor device according to claim 1, wherein the plurality of first resin bodies have a first corner portion, a second corner portion, a third corner portion, and a fourth corner portion provided at four corners of the substrate when viewed in a plan view from the thickness direction.

7. Further provided with a third resin body, the third resin body is provided between the plurality of first resin bodies in a plan view from the thickness direction, 7. The semiconductor device according to claim 6, wherein in the thickness direction, a tip of the third resin body on a side opposite to the substrate is positioned higher than tips of the first external electrode and the second external electrode on a side opposite to the substrate.

8. 8. The semiconductor device according to claim 7, wherein a tip of the third resin body on a side opposite to the substrate in the thickness direction is located lower than a tip of each of the first resin bodies on a side opposite to the substrate.

9. the first external electrode is electrically connected to the first electrode layer; The semiconductor device according to claim 1 , wherein the second external electrode is electrically connected to the second electrode layer.

10. the circuit layer further includes a third electrode layer that faces the first electrode layer and is spaced apart from the second electrode layer; the first external electrode is electrically connected to the third electrode layer; The semiconductor device according to claim 1 , wherein the second external electrode is electrically connected to the second electrode layer.

11. A semiconductor device according to any one of claims 1 to 10, a wiring substrate having a first land electrically connected to the first external electrode and a second land electrically connected to the second external electrode.

12. The module according to claim 11 , further comprising a molding resin provided between the wiring substrate and the first external electrode and between the wiring substrate and the second external electrode.

Images