Semiconductor device

Abstract

To provide a semiconductor device in which a charging phenomenon that results in variation in characteristic, deterioration of elements, or dielectric breakdown is suppressed.SOLUTION: The semiconductor device has a first transistor on a substrate, a second transistor, a third transistor and a fourth transistor. The fourth transistor has a first conductor, a second conductor, a third conductor and an oxide semiconductor. The first conductor is electrically connected to the semiconductor substrate through the first transistor. The second conductor is electrically connected to the semiconductor substrate through the first transistor. The third conductor is electrically connected to the semiconductor substrate through the first transistor. The fourth conductor is electrically connected to the semiconductor substrate through the first transistor.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor material and a semiconductor device.

[0002] In the present specification and the like, a semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics. This includes semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices which are one aspect of semiconductor devices. Display devices (such as liquid crystal display devices and light-emitting display devices), projection devices lighting devices, electro-optical devices, power storage devices, memory devices, semiconductor circuits, imaging devices, and electronic appliances etc. may be said to have a semiconductor device.

[0003] Note that one aspect of the present invention is not limited to the above technical field. One aspect of the invention disclosed in the present specification etc. relates to an article, a method, or a manufacturing method. Or, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter).

Background Art

[0004] As a semiconductor thin film applicable to a transistor, silicon-based semiconductor materials are widely known but other materials such as oxide semiconductors are attracting attention. Examples of oxide semiconductors include not only oxides of single-element metals such as indium oxide and zinc oxide, but also oxides of multi-element metals are known. Among the oxides of multi-element metals, in particular, research on In-Ga-Zn oxide (hereinafter also referred to as IGZO) has been actively conducted.

[0005] According to research on IGZO, in oxide semiconductors, a CA that is neither single crystal nor amorphous AC (c-axis aligned crystalline) structure and nc (na A noncrystalline structure was found (see Non-Patent Documents 1 to 3). In Non-Patent Documents 1 and 2, a transistor was fabricated using an oxide semiconductor having a CAAC structure. The technology for fabricating a transistor is also disclosed. Even oxide semiconductors with low crystallinity have minute crystals, as reported in Non-Patent Document 4 and This is shown in Non-Patent Document 5.

[0006] Furthermore, transistors using IGZO as the active layer have extremely low off-state current (non-specific 6), and LSIs and displays utilizing this property have been reported (Non-Patent Document 6). See patent document 7 and non-patent document 8). [Prior art documents] [Non-patent literature]

[0007] [Non-Patent Document 1] S. Yamazaki et al., “SID Symposium Digest of Technical Papers”, 2012, volume 43, issue 1, p.183-186 [Non-patent document 2] S. Yamazaki et al., “Japanese Journal of Applied Physics”, 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 [Non-patent document 3] S. Ito et al., “The Proceedings of AM-FPD'13 Digest of Technical Papers”, 2013, p.151-154 [Non-patent document 4] S. Yamazaki et al., “ECS Journal of Solid State Science and Technology”, 2014, volume 3, issue 9, p.Q3012-Q3022 [Non-Patent Document 5] S. Yamazaki, “ECS Transactions”,2014, volume 64, issue 10, p.155-164 [Non-patent document 6] K. Kato et al., “Japanese Journal of Applied Physics”, 2012, volume 51, p.021201-1-021201-7 [Non-Patent Document 7] S. Matsuda et al., “2015 Symposium on VLSI Technology Digest of Technical Papers”, 2015, p.T216-T217 [Non-patent document 8] S. Amano et al., “SID Symposium Digest of Technical Papers”, 2010, volume 41, issue 1, p.626-629 Summary of the Invention [Problem to be solved by the invention]

[0008] One embodiment of the present invention is to provide a semiconductor device that can prevent fluctuations in characteristics, deterioration of elements, or dielectric breakdown. In particular, as miniaturization progresses, the gate insulating film As the thickness of various insulating films such as those mentioned above decreases, dielectric breakdown due to abnormal charging has become a more serious issue. be.

[0009] An object of one embodiment of the present invention is to provide a semiconductor device that can retain data for a long period of time. One of the problems is as follows. One aspect of the present invention is a semiconductor having a transistor using an oxide semiconductor device, in which the electrical characteristics and reliability of the transistor provide a stable semiconductor device is one of the problems.

[0010] One aspect of the present invention is to provide a semiconductor device having good electrical characteristics as one of the problems to be solved. One aspect of the present invention is to provide a semiconductor device capable of miniaturization or high integration as a problem to be solved. One aspect of the present invention is to provide a highly productive semiconductor device as one of the problems to be solved. One aspect of the present invention is to provide a semiconductor device with a high degree of design freedom as one of the problems to be solved.

[0011] One aspect of the present invention is to provide a semiconductor device capable of suppressing power consumption as one of the problems to be solved. One aspect of the present invention is to provide a semiconductor device with a high information writing speed as a problem to be solved. One aspect of the present invention is to provide a novel semiconductor device as one of the problems to be solved.

[0012] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention is not required to solve all of these problems. Note that other problems will be naturally revealed from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other problems from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problems

[0013] One aspect of the present invention is a transistor having a first conductor, a second conductor, a third conductor, and an oxide semiconductor on a substrate, a first diode element, and a second diode element , and a third diode element, and the charge charged in the transistor is transferred to the semiconductor substrate through the first diode element, the second diode element, or the third diode element. The first diode element, the second diode element, and the third diode element are electrically connected to a fourth conductor. Moves.

[0014] In the above, the first diode element, the second diode element, the third diode element, and the fourth diode element are electrically connected to a fourth conductor. And the fourth diode element are electrically connected to a fourth conductor.

[0015] One aspect of the present invention includes a transistor having a first conductor, a second conductor, a third conductor, and an oxide semiconductor on a substrate, a first capacitor element, a second capacitor element, and a third capacitor element. The charge charged in the transistor is transferred to and fixed in the first capacitor element, the second capacitor element, or the third capacitor element. And a third capacitor element, and the charge charged in the transistor is transferred to and fixed in the first capacitor element, the second capacitor element, or the third capacitor element. And a third capacitor element, and the charge charged in the transistor is transferred to and fixed in the first capacitor element, the second capacitor element, or the third capacitor element. Is transferred and fixed.

[0016] In the above, the first capacitor element, the second capacitor element, and the third capacitor element are electrically connected to a fourth conductor. And the third capacitor element are electrically connected to a fourth conductor.

[0017] In the above, the fourth conductor functions as a gate electrode of the transistor.

[0018] In the above, the semiconductor device has two or more transistors.

[0019] One aspect of the present invention includes a first transistor, a second transistor, a third transistor, and a fourth transistor on a substrate. The fourth transistor has a first conductor, a second conductor, a third conductor, and an oxide semiconductor. The first conductor is electrically connected to the semiconductor substrate through the first transistor, the second conductor is electrically connected to the semiconductor substrate through the first transistor, and the third conductor is electrically connected to the semiconductor substrate through the first transistor. And a fourth transistor, and the fourth transistor has a first conductor, a second conductor, a third conductor, and an oxide semiconductor. The first conductor is electrically connected to the semiconductor substrate through the first transistor, the second conductor is electrically connected to the semiconductor substrate through the first transistor, and the third conductor is electrically connected to the semiconductor substrate through the first transistor. 2 conductors, a third conductor, and an oxide semiconductor, and the first conductor is electrically connected to the semiconductor substrate through the first transistor, the second conductor is electrically connected to the semiconductor substrate through the first transistor, and the third conductor is electrically connected to the semiconductor substrate through the first transistor. The second conductor is electrically connected to the semiconductor substrate through the first transistor, and the third conductor is electrically connected to the semiconductor substrate through the first transistor. The second conductor is electrically connected to the semiconductor substrate through the first transistor, and the third conductor is electrically connected to the semiconductor substrate through the first transistor. is electrically connected to a semiconductor substrate, and the fourth conductor is electrically connected to the semiconductor substrate via the first transistor. board.

[0020] In the above, the first transistor, the second transistor, and the third transistor function as a capacitive element.

[0021] In the above, the first transistor, the second transistor, and the third transistor function as a diode element.

Advantages of the Invention

[0022] According to one aspect of the present invention, a semiconductor device in which element degradation or dielectric breakdown is suppressed can be provided. According to one aspect of the present invention, a semiconductor device capable of retaining data for a long period can be provided. According to one aspect of the present invention, in a semiconductor device having a transistor using an oxide semiconductor, a semiconductor device with stable electrical characteristics and reliability of the transistor can be provided. device can be provided. According to one aspect of the invention, a semiconductor device having good electrical characteristics can be provided. According to one aspect of the present invention, a semiconductor device capable of miniaturization or high integration can be provided.

[0023] According to one aspect of the invention, a semiconductor device having good electrical characteristics can be provided. According to one aspect of the present invention, a semiconductor device capable of miniaturization or high integration can be provided. According to one aspect of the present invention, a semiconductor device capable of miniaturization or high integration can be provided. According to one aspect of the present invention, a highly productive semiconductor device can be provided. According to one aspect of the present invention, a semiconductor device with a high degree of design freedom can be provided. According to one aspect of the present invention, a semiconductor device with a high degree of design freedom can be provided.

[0024] According to one aspect of the present invention, a semiconductor device with a high information writing speed can be provided. According to one aspect of the present invention, a semiconductor device capable of suppressing power consumption can be provided. According to one aspect of the present invention, a novel semiconductor device can be provided.

[0025] Note that the description of these effects does not preclude the existence of other effects. One aspect of the present invention does not necessarily have all of these effects. Other effects will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims or any description.

Brief Description of the Drawings

[0026]

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Embodiments for Carrying Out the Invention

[0027] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways, and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and its scope. Therefore, the present invention is not construed as being limited to the description of the following embodiments.

[0028] In addition, in the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The figures are merely diagrammatic representations and are not limited to the shapes or values shown in the drawings. Therefore, the same reference numerals are used in common between different drawings for the same parts or parts having similar functions. In addition, when referring to a part having a similar function, the same word is used. The patterns may be the same and may not be given specific symbols.

[0029] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used. The relationship is used for convenience in explaining the relationship with reference to the drawings. The values change depending on the direction in which each component is depicted. It is not limited to words and phrases, and can be rephrased appropriately depending on the situation.

[0030] In this specification, a transistor includes a gate, a drain, and a source. It is an element with at least three terminals. And, the drain (drain terminal, drain Between the source (source terminal, source region or drain electrode) and the source (source terminal, source region or source electrode) The semiconductor device has a region where a channel is formed, and has a drain, a region where a channel is formed, and a source In this specification and the like, a channel is a The region where current is formed refers to a region where current mainly flows.

[0031] The source and drain functions may differ depending on the type of transistor used, or the circuit operation. This may be reversed if the direction of the current changes during operation. In a document or the like, the terms "source" and "drain" may be used interchangeably. .

[0032] Also, in this specification and the like, "electrically connected" includes a case where connection is made through "something having some electrical effect". Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between connection targets. For example, "something having some electrical effect" includes electrodes, wiring, switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions.

[0033] In this specification and the like, nitride oxide refers to a compound having a higher nitrogen content than oxygen. Also, oxynitride refers to a compound having a higher oxygen content than nitrogen. The content of each element can be measured using, for example, the Rutherford backscattering spectrometry (RBS).

[0034] Also, in this specification and the like, "parallel" refers to a state where two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, a case of -5° or more and 5° or less is also included. Also, "substantially parallel" refers to a state where two straight lines are arranged at an angle of -30° or more and 30° or less. "perpendicular" refers to a state where two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, a case of 85° or more and 95° or less is also included. Also, "substantially perpendicular" refers to a state where two straight lines are arranged at an angle of 60° or more and 120° or less.

[0035] In addition, in this specification, a barrier film refers to a film having a function of suppressing the permeation of impurities such as hydrogen or oxygen. When the barrier film has conductivity, it may be referred to as a conductive barrier film. When the barrier film has conductivity, it may be referred to as a conductive barrier film.

[0036] In addition, in this specification and the like, the normally-on characteristic of a transistor means that it is in an on state when no potential is applied by a power supply (0 V). For example, the normally-on characteristic of a transistor may refer to the electrical characteristic in which a current (Id) flows between the drain and the source when the voltage (Vg) applied to the gate of the transistor is 0 V. For example, the normally-on characteristic of a transistor may refer to the electrical characteristic in which a current (Id) flows between the drain and the source when the voltage (Vg) applied to the gate of the transistor is 0 V. when the voltage (Vg) applied to the gate of the transistor is 0 V. between the drain and the source.

[0037] In this specification and the like, an oxide semiconductor is a kind of metal oxide. A metal oxide refers to an oxide having a metal element. Metal oxides may exhibit insulating, semiconductor, or conductive properties depending on their composition and formation method. A metal oxide that exhibits semiconductor properties is called a metal oxide semiconductor or an oxide semiconductor (also simply referred to as OS). In addition, a metal oxide that exhibits insulating properties is called a metal oxide insulator or an oxide insulator. Also, a metal oxide that exhibits conductive properties is called a metal oxide conductor or an oxide conductor. That is, the metal oxide used in the channel formation region of a transistor or the like can be referred to as an oxide semiconductor. A metal oxide refers to an oxide having a metal element. Metal oxides may exhibit insulating, semiconductor, or conductive properties depending on their composition and formation method. A metal oxide that exhibits semiconductor properties is called a metal oxide semiconductor or an oxide semiconductor (also simply referred to as OS). In addition, a metal oxide that exhibits insulating properties is called a metal oxide insulator or an oxide insulator. Also, a metal oxide that exhibits conductive properties is called a metal oxide conductor or an oxide conductor. That is, the metal oxide used in the channel formation region of a transistor or the like can be referred to as an oxide semiconductor.

[0038] (Embodiment 1) In this embodiment, a semiconductor device having a transistor using an oxide semiconductor, which is one aspect of the present invention, will be described with reference to FIGS. 1 to 5. A semiconductor device having a transistor using an oxide semiconductor, which is one aspect of the present invention, will be described with reference to FIGS. 1 to 5.

[0039] In a transistor using an oxide semiconductor, in order to prevent electrostatic breakdown, a diode element ​​A protection circuit configured using a protection diode or a capacitive element (protection capacitor element) is effective in securing a discharge path. Therefore, one aspect of the present invention provides a transistor using an oxide semiconductor and a diode element or a capacitive element on the same substrate. This is effective for securing a discharge path. Thus, one aspect of the present invention provides a transistor using an oxide semiconductor and a diode element or a capacitive element on the same substrate. This is effective for securing a discharge path. Therefore, one aspect of the present invention provides a transistor using an oxide semiconductor and a diode element or a capacitive element on the same substrate.

[0040] <Configuration Example of Semiconductor Device> FIG. 1(D) is a schematic diagram of a transistor 200 according to one aspect of the present invention. Note that in FIG. 1(D), some elements are omitted for clarity of the drawing. In FIG. 1(D), some elements are omitted for clarity of the drawing.

[0041] [Transistor 200] As shown in FIG. 1(D), the transistor 200 includes at least an oxide 230 that functions as a gate 260, a region CH where a channel is formed (hereinafter also referred to as a channel formation region), a region SR that functions as a source, and a region DR that functions as a drain. As shown in FIG. 1(D), the transistor 200 includes at least an oxide 230 that functions as a gate 260, a region CH where a channel is formed (hereinafter also referred to as a channel formation region), a region SR that functions as a source, and a region DR that functions as a drain. As shown in FIG. 1(D), the transistor 200 includes at least an oxide 230 that functions as a gate 260, a region CH where a channel is formed (hereinafter also referred to as a channel formation region), a region SR that functions as a source, and a region DR that functions as a drain. And has.

[0042] Further, the transistor 200 may have a conductor 205 below the oxide 230. Note that the conductor 205 may function as a second gate. For example, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the threshold voltage of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the threshold voltage of the transistor 200 can be made greater than 0V, and the off-current can be reduced. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0V can be made smaller than when no potential is applied. Further, the transistor 200 may have a conductor 205 below the oxide 230. Note that the conductor 205 may function as a second gate. For example, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the threshold voltage of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the threshold voltage of the transistor 200 can be made greater than 0V, and the off-current can be reduced. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0V can be made smaller than when no potential is applied. Further, the transistor 200 may have a conductor 205 below the oxide 230. Note that the conductor 205 may function as a second gate. For example, by changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the threshold voltage of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the threshold voltage of the transistor 200 can be made greater than 0V, and the off-current can be reduced. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0V can be made smaller than when no potential is applied. By changing the potential applied to the conductor 205 independently without linking it to the potential applied to the conductor 260, the threshold voltage of the transistor 200 can be controlled. In particular, by applying a negative potential to the conductor 205, the threshold voltage of the transistor 200 can be made greater than 0V, and the off-current can be reduced. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0V can be made smaller than when no potential is applied. In particular, by applying a negative potential to the conductor 205, the threshold voltage of the transistor 200 can be made greater than 0V, and the off-current can be reduced. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0V can be made smaller than when no potential is applied. In particular, by applying a negative potential to the conductor 205, the threshold voltage of the transistor 200 can be made greater than 0V, and the off-current can be reduced. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0V can be made smaller than when no potential is applied. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0V can be made smaller than when no potential is applied. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0V can be made smaller than when no potential is applied.

[0043] Further, for example, by providing the conductor 205 and the conductor 260 in a superimposed manner, when the same potential is applied to the conductor 260 and the conductor 205, the electric field generated from the conductor 260 and the electric field generated from the conductor 205 are connected, and the channel formation region formed in the oxide 230 can be covered. That is, the electric field of the conductor 260 having the function as the first gate electrode and the electric field of the conductor 205 having the function as the second gate electrode can electrically surround the channel formation region. In this specification, the structure of the transistor that electrically surrounds the channel formation region by the electric fields of the first gate electrode and the second gate electrode is called a surrounded channel (S-channel) structure.

[0044] Note that as the oxide 230, a metal oxide containing indium may be used. For example, In -M-Zn oxide (element M is selected from one or more of aluminum, gallium, yttrium, copper, vanadium , beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum , lanthanum, hafnium, tantalum, tungsten, or magnesium, etc.) and other metal oxides can be used. Further, as the oxide 230 , In-Ga oxide or In-Zn oxide may be used.

[0045] In the transistor 200 using an oxide semiconductor for the region CH where the channel is formed, since the leakage current is extremely small in the non-conducting state, a semiconductor device with low power consumption can be provided. Also , since the oxide semiconductor can be formed by a sputtering method or the like, it can be used for the transistor 200 constituting a highly integrated semiconductor device.

[0046] ​​​​​In addition, by using an oxide semiconductor as an active layer, a thin-film transistor can be formed using a semiconductor thin film formed on a semiconductor substrate, a conductive substrate, or an insulating substrate. Alternatively, a substrate having a conductor or a semiconductor provided on an insulating substrate, a substrate having a conductor or an insulator provided on a semiconductor substrate, or a substrate having a semiconductor or an insulator provided on a conductive substrate may be used. Alternatively, those in which elements are provided on these substrates may be used. Examples of the elements provided on the substrate include a capacitive element, an inductance element, and a resistance element (such as a switch element, a light-emitting element, a memory element, etc.). Here, each structure constituting the transistor can be fabricated by repeatedly forming a film using a material suitable for each structure and processing and shaping the film. The above film is formed, for example, by a sputtering method, a chemical vapor deposition (CVD) method, a molecular beam epitaxy (MBE) method, a pulsed laser deposition (PLD) method, or an atomic layer deposition (ALD) method. The CVD method can be classified into a plasma-enhanced CVD (PECVD) method using plasma, a thermal CVD (TCVD) method using heat, a photo CVD method using light, etc. Further, depending on the raw material

[0047] gas, it can be classified into a metal CVD (MCVD) method, a metalorganic CVD (MOC VD) method, etc.

[0048] The above film is formed, for example, by a sputtering method, a chemical vapor deposition (CVD: Chemical Va por Deposition) method, a molecular beam epitaxy (MBE: Molecular Beam Epitaxy) method, a pulsed laser deposition (PLD: Pulsed Lase r Deposition) method, or an atomic layer deposition (ALD: Atomic Layer Deposition) method.

[0049] The CVD method can be classified into a plasma-enhanced CVD (PECVD: Plasma Enha nced CVD) method using plasma, a thermal CVD (TCVD: Thermal CVD) method using heat and a photo CVD method using light. Further, depending on the raw material gas, it can be classified into a metal CVD (MCVD: Metal CVD) method, a metalorganic CVD (MOC VD: It can be divided into the Metal Organic CVD method.

[0050] Here, in the plasma CVD method, a high-quality film can be obtained at a relatively low temperature. On the other hand, for the wiring, electrodes, elements (such as transistors and capacitor elements) included in a semiconductor device, when they receive charges from the plasma generated during film formation, a charging phenomenon (charging) may occur (the state of becoming charged is also referred to as charging up). At this time, due to the accumulated charges, the wiring, electrodes, or elements included in the semiconductor device may be damaged.

[0051] Also, as methods for processing and forming the above-mentioned film, there are dry etching, wet etching, and chemical mechanical polishing (also referred to as CMP) treatment, etc. In order to perform fine processing as the device size is reduced, dry etching using plasma is common. On the other hand, even in dry etching, charging up may occur due to plasma.

[0052] For example, in the process of forming wiring, each wiring is likely to be in an electrically floating state by cutting the wiring. Each wiring after being cut may be charged up in subsequent processes, which causes electrostatic discharge (ESD) of the device. In particular, when different potentials are charged on each electrode of a transistor, the probability of the gate insulator being damaged is high.

[0053] Note that the causes and environments in which charging occurs are extremely complex and diverse. Therefore, not only to investigate the causes and environments in which charging occurs, but also the structure of the semiconductor device itself ​​​​​​​ It is preferable to enhance the body's resistance to degradation due to charging or dielectric breakdown.

[0054] Therefore, in order to prevent degradation or dielectric breakdown of the transistor 200 due to charging, a discharge path is ensured by a protection circuit composed of a diode (protection diode) or a capacitive element. By ensuring the discharge path, it is possible to prevent the charge accumulated in the insulating film from discharging in the vicinity of the semiconductor element.

[0055] <Configuration Example of Semiconductor Device Using Semiconductor Substrate> Hereinafter, an example of a semiconductor device using a semiconductor substrate will be described with reference to FIG. 1(A).

[0056] FIG. 1(A) is a circuit diagram of a semiconductor device having a transistor 200 according to an aspect of the present invention. The semiconductor device shown in FIG. 1(A) has diodes 10 (diode 10tg, diode 10bg, diode 1 0s, and diode 10d) electrically connected to the respective electrodes of the transistor 200. The transistor 200 is connected to the substrate 20 via each diode.

[0057] Also, the substrate 20 is preferably made of a semiconductor substrate. For example, the substrate 20 is disposed on a grounded stage or the like. Therefore, the charge charged in the transistor 200 flows in the direction of the ground potential (GND) through the diode 1 0 and is finally discharged.

[0058] In general, potential (voltage) is relative, and its magnitude is determined by the relative magnitude from a reference potential. Therefore, in this specification, "ground", "GND", " ​​​​​​Descriptions such as "ground" do not necessarily mean that the potential is 0V. For example, "ground" or "GND" may be defined based on the lowest potential in the circuit. Or, "ground" or "GND" may be defined based on an intermediate potential in the circuit. Note that positive or negative potentials are defined with reference to the potential of "ground", "GND", "ground", etc. Here, FIGS. 1(B) and 1(C) show an example of a cross-sectional view of a semiconductor device having a transistor 200 according to an aspect of the present invention shown in FIG. 1(A). FIG. 1(B) is a cross-sectional view in the L length direction of the transistor 200, and FIG. 1(C) is a cross-sectional view in the W length direction of the transistor 200. Note that in FIGS. 1(B) and 1(C), some elements are omitted for clarity of the drawing. As shown in FIGS. 1(B) and 1(C), the semiconductor device includes at least a transistor 200 that functions as a transistor, diodes 10s, 10d, 10tg, and 10bg. Note that the diode 10 (diodes 10s, 10d, 10tg, and 10bg) each have a region 21 (regions 21s, 21d, 21tg, and 21bg) and a region 22 (regions 22s, 22d, 22tg, and 22bg). Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200, a wiring 26s electrically connected to the plug, and a plug 24s electrically connected to the region 22s of the diode 10s and the wiring 26s.

[0059] Here, FIGS. 1(B) and 1(C) show an example of a cross-sectional view of a semiconductor device having a transistor 200 according to an aspect of the present invention shown in FIG. 1(A). FIG. 1(B) is a cross-sectional view in the L length direction of the transistor 200, and FIG. 1(C) is a cross-sectional view in the W length direction of the transistor 200. Note that in FIGS. 1(B) and 1(C), some elements are omitted for clarity of the drawing. As shown in FIGS. 1(B) and 1(C), the semiconductor device includes at least a transistor 200 that functions as a transistor, diodes 10s, 10d, 10tg, and 10bg. Note that the diode 10 (diodes 10s, 10d, 10tg, and 10bg) each have a region 21 (regions 21s, 21d, 21tg, and 21bg) and a region 22 (regions 22s, 22d, 22tg, and 22bg). Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200, a wiring 26s electrically connected to the plug, and a plug 24s electrically connected to the region 22s of the diode 10s and the wiring 26s. As shown in FIGS. 1(B) and 1(C), the semiconductor device includes at least a transistor 200 that functions as a transistor, diodes 10s, 10d, 10tg, and 10bg. Note that the diode 10 (diodes 10s, 10d, 10tg, and 10bg) each have a region 21 (regions 21s, 21d, 21tg, and 21bg) and a region 22 (regions 22s, 22d, 22tg, and 22bg). Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200, a wiring 26s electrically connected to the plug, and a plug 24s electrically connected to the region 22s of the diode 10s and the wiring 26s.

[0060] As shown in FIGS. 1(B) and 1(C), the semiconductor device includes at least a transistor 200 that functions as a transistor, diodes 10s, 10d, 10tg, and 10bg. Note that the diode 10 (diodes 10s, 10d, 10tg, and 10bg) each have a region 21 (regions 21s, 21d, 21tg, and 21bg) and a region 22 (regions 22s, 22d, 22tg, and 22bg). Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200, a wiring 26s electrically connected to the plug, and a plug 24s electrically connected to the region 22s of the diode 10s and the wiring 26s. As shown in FIGS. 1(B) and 1(C), the semiconductor device includes at least a transistor 200 that functions as a transistor, diodes 10s, 10d, 10tg, and 10bg. Note that the diode 10 (diodes 10s, 10d, 10tg, and 10bg) each have a region 21 (regions 21s, 21d, 21tg, and 21bg) and a region 22 (regions 22s, 22d, 22tg, and 22bg). Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200, a wiring 26s electrically connected to the plug, and a plug 24s electrically connected to the region 22s of the diode 10s and the wiring 26s. As shown in FIGS. 1(B) and 1(C), the semiconductor device includes at least a transistor 200 that functions as a transistor, diodes 10s, 10d, 10tg, and 10bg. Note that the diode 10 (diodes 10s, 10d, 10tg, and 10bg) each have a region 21 (regions 21s, 21d, 21tg, and 21bg) and a region 22 (regions 22s, 22d, 22tg, and 22bg). Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200, a wiring 26s electrically connected to the plug, and a plug 24s electrically connected to the region 22s of the diode 10s and the wiring 26s.

[0061] As shown in FIGS. 1(B) and 1(C), the semiconductor device includes at least a transistor 200 that functions as a transistor, diodes 10s, 10d, 10tg, and 10bg. Note that the diode 10 (diodes 10s, 10d, 10tg, and 10bg) each have a region 21 (regions 21s, 21d, 21tg, and 21bg) and a region 22 (regions 22s, 22d, 22tg, and 22bg). Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200, a wiring 26s electrically connected to the plug, and a plug 24s electrically connected to the region 22s of the diode 10s and the wiring 26s. As shown in FIGS. 1(B) and 1(C), the semiconductor device includes at least a transistor 200 that functions as a transistor, diodes 10s, 10d, 10tg, and 10bg. Note that the diode 10 (diodes 10s, 10d, 10tg, and 10bg) each have a region 21 (regions 21s, 21d, 21tg, and 21bg) and a region 22 (regions 22s, 22d, 22tg, and 22bg).

[0062] The semiconductor device has a plug that is electrically connected to the other of the source or drain of the transistor 200, a wiring 26d that is electrically connected to the plug, and a plug 24d that is electrically connected to the region 22d of the diode 10d.

[0063] Further, the semiconductor device has a plug that is electrically connected to the conductor 260, a wiring 26tg that is electrically connected to the plug, and a plug 24tg that is electrically connected to the region 22tg of the diode 10tg.

[0064] The semiconductor device has a plug 24bg that electrically connects the conductor 205 of the transistor 200 and the region 22bg of the diode 10bg.

[0065] For example, a p-type single-crystalline silicon substrate can be used for the substrate 20. In that case, a part of the substrate 20 can be selectively made conductive to form a so-called embedded diode. The embedded diode can be used as the diode 10.

[0066] Specifically, in FIG. 1, on the substrate 20 which is a p-type single-crystalline silicon substrate, thin p-type regions 21s, 21d, and 21tg are formed, and n-type regions 22s, 22d, and 22tg are formed on top of them, thereby forming the diodes 10s, 10d, and 10tg. On the other hand, on the substrate 20 which is a p-type single-crystalline silicon substrate, a thin n-type region 21bg is formed, and a p-type region is formed on top of it, thereby forming the diode 10bg.

[0067] Note that when a p-type single-crystalline silicon substrate is used as the substrate 20, a thin p-type region is not necessarily provided. Also, when a Si transistor or the like is provided using the substrate 20, the regions 21 and 22 can be provided simultaneously with the step of forming the Si transistor.

[0068] In the above, an example using a single-crystalline semiconductor substrate was shown, but a substrate having an SOI (Silicon On Insulator) structure may also be used. Further, as the semiconductor substrate, for example, , in addition to a silicon semiconductor substrate, a semiconductor substrate such as germanium, or a compound semiconductor substrate formed of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, there are semiconductor substrates having an insulator region inside the aforementioned semiconductor substrates.

[0069] Note that in FIGS. 1(B) and 1(C), diodes 10s and 10d are formed on the extension in the L length direction of the transistor 200, and diodes 10bg and 10tg are formed on the extension in the W length direction of the transistor 200. However, the present configuration is not limited thereto, and the layout can be appropriately changed according to the required circuit design.

[0070] Note that the diodes 10s, 10d, 10tg, and 10bg can be provided as necessary. For example, when the transistor 200 has a structure without the conductor 205, the diode 10bg is unnecessary.

[0071] Also, for one transistor 200, it is not always necessary to provide a paired diode 10. ​​​​​​​There is no need. For a plurality of transistors 200, the diode 10 may be less than the number of transistors 20 0. For example, when a plurality of transistors 200 arranged in an array have a common wiring, the diode 10 may be provided at least one for each common wiring. That's enough.

[0072] <Configuration example of semiconductor device using conductive substrate> Hereinafter, an example of a semiconductor device using a conductive substrate will be described with reference to FIGS. 2 and 3. .

[0073] Unlike a semiconductor substrate, it is difficult to provide an embedded diode on a conductive substrate. Therefore, a transistor 200t using an oxide semiconductor, and transistors 200s, 200d, 200tg, and 200bg that function as a diode element or a capacitor element are fabricated on the same substrate. Accordingly, transistors 200s, 200d, 200tg, and 200bg are preferably provided simultaneously with transistor 200t. That is, transistors 200s, 200d, 200tg, and 200bg are arranged in the same layer as transistor 200t.

[0074] Note that a plurality of cell arrays (a cell array is a collection of a plurality of transistors) can be provided on the conductive substrate. Transistors 200s, 200d, 200tg, and 200bg may be made to function as a diode element or a capacitor element according to the required design. For example, when a capacitor element is used, the electric ​​​​​​​​​​​Since there is no pressure range, it can be used in a power supply circuit or the like. On the other hand, in the cell array to be designed, when emphasizing the response speed, a diode element may be used. A diode element or a capacitor element can be provided for each cell array provided on the same substrate.

[0075] Note that examples of the conductive substrate that can be used for the substrate 20 include a graphite substrate, a metal substrate, an alloy substrate, a conductive resin substrate, etc. Or, there are substrates having a metal nitride, substrates having a metal oxide, etc. Also, for example, a semiconductor substrate may be used after reducing its resistance. For example, a p-type single crystal silicon substrate can be used after being made p-type.

[0076] Note that in FIGS. 2 and 3, transistors 200s and 200d are formed on the extension of the L length direction of the transistor 200t, and transistors 200bg and 200tg are formed on the extension of the W length direction of the transistor 200t. However, the present structure is not limited thereto, and the layout can be appropriately changed according to the required circuit design.

[0077] Also, the transistors 200s, 200d, 200tg, and 200bg can be provided as necessary. For example, when the transistor 2 00 has a structure without the conductor 205, the transistor 200bg is unnecessary.

[0078] Also, it is not always necessary to provide one transistor 200 for one transistor 200. For a plurality of transistors 200, the number of transistors 200 may be less than the number of transistors 20 0. For example, a plurality of transistors 200 arranged in an array ​​​​​​​​When having a common wiring, there may be at least one transistor 200 for each common wiring. One or more is sufficient.

[0079] <<Semiconductor device 1 having a diode connection>> FIG. 2(A) is a circuit diagram of a semiconductor device having a transistor 200t according to one aspect of the present invention. As shown in FIG. 2(A), the semiconductor device has a plurality of transistors (transistor 200t g, transistor 200bg, transistor 200s, and transistor 200d) that function as diodes electrically connected to each electrode of the transistor 200t. The transistor 200t is connected to the substrate 20 via each diode. Note that the substrate 20 uses a conductive substrate. For example, the substrate 20 is arranged on a grounded stage or the like.

[0080] Therefore, the charged charge in the transistor 200t flows in the direction of the ground potential (GND) via the transistor 200tg, transistor 200bg, transistor 200s, and transistor 200d, and is finally discharged. Here, FIGS. 2(B) and 2(C) show an example of a cross-sectional view of the semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 2(A). FIG. 2(B) is a cross-sectional view in the L-length direction of the transistor 200t, and FIG. 2(C) is a cross-sectional view in the W-length direction of the transistor 200t.

[0081] Note that in FIGS. 2(B) and 2(C), some elements are omitted for clarity of the drawing. As shown in FIGS. 2(B) and 2(C), the semiconductor device includes at least a transistor. FIG. 2(C) shows a cross-sectional view in the W-length direction of the transistor 200t. In addition, in FIGS. 2(B) and 2(C), some elements are omitted for clarity of the drawing. are illustrated.

[0082] As shown in FIGS. 2(B) and 2(C), the semiconductor device includes at least a transistor. It has a transistor 200t that functions as a transistor. Also, a transistor 200s that functions as a diode, a transistor 200d, a transistor 200tg, and a transistor 200bg.

[0083] Also, the semiconductor device has a plug electrically connected to one of the source or drain of the transistor 200t, a wiring 26s1 electrically connected to the plug, and a plug electrically connected to the other of the source or drain of the transistor 200s. Also, it has a plug electrically connected to one of the source or drain of the transistor 200s, a plug electrically connected to the conductor 260 of the transistor 200s, and a wiring 26s2 electrically connected to both plugs. Also, it has a plug 24s that electrically connects the wiring 26s2 and the substrate 20.

[0084] Also, the semiconductor device has a plug electrically connected to the other of the source or drain of the transistor 200t, a wiring 26d1 electrically connected to the plug, and a plug electrically connected to one of the source or drain of the transistor 200d. Also, it has a plug electrically connected to the other of the source or drain of the transistor 200d, a plug electrically connected to the conductor 260 of the transistor 200d, and a wiring 26d2 electrically connected to both plugs. Also, it has a plug 24d that electrically connects the wiring 26d2 and the substrate 20.

[0085] Also, the semiconductor device has a plug electrically connected to the conductor 260 of the transistor 200t, a wiring 26tg1 electrically connected to the plug, and a wiring 26tg1 and the transistor 200t It has a plug electrically connected to one of the source or drain of g. Also, a plug electrically connected to the other of the source or drain of the transistor 200tg, and a transistor 2 A plug electrically connected to the other of the source or drain of the transistor 200tg, and a transistor 2 A plug electrically connected to the conductor 260 of 00tg, and wiring 26tg2 electrically connected to both plugs It has. Also, it has a plug 24tg that electrically connects the wiring 26tg2 and the substrate 20 to each other.

[0086] Also, the semiconductor device has a plug electrically connected to the conductor 205 of the transistor 200t, wiring 26bg1 electrically connected to the plug, and wiring 26bg1 and transistor 200b A plug electrically connected to the other of the source or drain of the transistor g, and wiring 26bg1 and transistor It has a plug that electrically connects the conductor 260 of the transistor 200bg. Also, a plug electrically connected to one of the source or drain of the transistor 200bg, and a plug electrically connected to the wiring 26bg2 of the transistor. Also, it has a plug 24bg that electrically connects the wiring 26bg2 and the substrate 20 to each other. to each other.

[0087] That is, each electrode of the transistor 200t that functions as a transistor is electrically connected to the conductive substrate 20 via the transistors 200s, 200d, 200tg, and transistor 200bg that are diode-connected. It is electrically connected to the conductive substrate 20 via the transistors 200s, 200d, 200tg, and transistor 200bg that are diode-connected.

[0088] Note that the transistor 200t using an oxide semiconductor preferably uses transistors having the same configuration provided in the same process as the transistors 200s, 200d, 200tg, and transistor 200bg that function as diode elements. It is preferable to use transistors having the same configuration provided in the same process as the transistors 200s, 200d, 200tg, and transistor 200bg that are diode-connected. .

[0089] <<Semiconductor device 1 having a capacitance connection>> FIG. 3(A) is a circuit diagram of a semiconductor device having a transistor 200t according to one aspect of the present invention. The semiconductor device shown in FIG. 3(A) has a plurality of transistors (transistors 200tg, transistors 200bg, transistors 200s, and transistors 200d) that function as capacitive elements electrically connected to the respective electrodes of the transistor 200t. The transistor 200t is connected to the substrate 20 via each capacitive element.

[0090] The charge charged in the transistor 200t is absorbed and held by the transistors 20 0tg, transistor 200bg, transistor 200s, and transistor 200d that function as protection capacitive elements.

[0091] Note that the transistors 200tg, 200bg, 200s, and transistors 200d preferably have the same potential. For this purpose, the capacitance values of the transistors 200tg, 200bg, 200s, and transistors 200d that function as capacitive elements are preferably designed to be as large as possible. Further, the other electrodes of the transistors 200tg, 200bg, 200s, and transistors 200d that function as capacitive elements are preferably grounded via the substrate 20 using a conductive substrate.

[0092] Here, FIGS. 3(B) and 3(C) show an example of a cross-sectional view of the semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 3(A). FIG. 3(B) is a cross-sectional view of the transistor. FIG. 3(C) shows an example of a cross-sectional view of the semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 3(A). FIG. 3(B) is a cross-sectional view of the transistor 200t in the L length direction, and FIG. 3(C) is a cross-sectional view of the transistor 200t in the W length direction. Note that in FIGS. 3(B) and 3(C), some elements are omitted for clarity of the drawing. Shown in the figure.

[0093] As shown in FIGS. 3(B) and 3(C), the semiconductor device includes at least the transistor Functioning as a transistor 200t. Further, a transistor functioning as a capacitor element 200s, transistor 200d, transistor 200tg, and transistor 2 00bg. / / It seems there might be a typo here as "200bg" might be incorrect.

[0094] In addition, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200t, a wiring 26s1 electrically connected to the plug, and a plug electrically connected to the oxide 230 of the transistor 200s. Further, it includes a plug electrically connected to the conductor 260 of the transistor 200s, and a wiring 26s2 electrically connected to the plug. Also, it includes a plug 24s that electrically connects the wiring 26s2 and the substrate 20. / / The above translation is a bit long-winded but tries to be faithful to the structure. Maybe it can be optimized further in a more natural English expression. / / Continuing with the translation of the complex sentence structure. / / Trying to maintain the integrity of the description. / / Continuing to translate the electrical connection relationships. Having.

[0095] Also, the semiconductor device includes a plug electrically connected to the other of the source or drain of the transistor 200t, a wiring 26d1 electrically connected to the plug, and a plug electrically connected to the oxide 230 of the transistor 200d. Further, it includes a plug electrically connected to the conductor 260 of the transistor 200d, and a wiring 26d2 electrically connected to the plug. Also, it includes a plug 24d that electrically connects the wiring 26d2 and the substrate 20. / / Continuing to translate the second set of electrical connection relationships. / / Trying to be comprehensive in the translation. / / Continuing with the translation of the connection details. / / Keeping up with the electrical connection descriptions. Having.

[0096] Further, the semiconductor device includes a plug that is electrically connected to the conductor 260 of the transistor 200t, a wiring 26tg1 that is electrically connected to the plug, and a plug that is electrically connected to the conductor 260 of the transistor 200t g. Further, the transistor 200tg has a plug that is electrically connected to the other of the source or drain, and a wiring 26tg2 that is electrically connected to the plug. Further, it has a plug 24tg that electrically connects the wiring 26tg2 and the substrate 20.

[0097] Further, the transistor 200bg has a plug that is electrically connected to the oxide 230, and a wiring 26bg that is electrically connected to the plug. Further, it has a plug 24bg that electrically connects the wiring 26bg and the substrate 20.

[0098] Here, for simplicity of explanation, some elements are omitted in the illustration. The conductor 205 of the transistor 200t and the conductor 205 of the transistor 200bg are provided in common, but the present structure is not limited thereto, and can be appropriately changed according to the required design.

[0099] That is, each electrode of the transistor 200t that functions as a transistor is electrically connected to the conductive substrate 20 via the capacitively connected transistors 200s, 200d, 200tg, and 200bg.

[0100] The transistors 200s, 200d, 200tg, and 200bg are preferably provided simultaneously with the transistor 200t. Note that the transistors 200s, 200d, 200tg, and 200bg The transistor 200bg, which is provided in the same process as the transistor 200t and has the same configuration, may be used by making a capacitive connection.

[0101] Note that a capacitive element may be formed using the films that make up the transistor 200t. For example, the oxide semiconductor that can be used as the oxide 230 can lower the electrical resistance value to become a conductor and can be called an OC (Oxide Conductor) electrode. Therefore, the transistors 200s, 200d, 200 tg, and 200bg may be used as the electrodes of the capacitive element by making the oxide 230 conductive.

[0102] Also, in the figure, the oxide 230 is used as the electrode of the capacitive element, but the present structure is not limited thereto. For example, in the transistor 20x, when a conductor that functions as a source electrode or a conductor that functions as a drain electrode is provided, the conductor may be used as an electrode.

[0103] <Configuration Example of a Semiconductor Device Using an Insulating Substrate> Hereinafter, examples of semiconductor devices using a conductive substrate will be described with reference to FIGS. 4 and 5.

[0104] Unlike a semiconductor substrate, it is difficult to provide an embedded diode on an insulating substrate. Therefore, the transistor 200t using an oxide semiconductor and the transistors 200s, 200d, and 200 t that function as a diode element or a capacitive element are fabricated on the same substrate. Therefore, the transistors 200s, 200d and 200tg are preferably provided simultaneously with the transistor 200t. That is, transistors 200s, 200d, and transistor 20 0tg are arranged on the same layer as transistor 200t.

[0105] Note that a plurality of cell arrays (a cell array is a combination of a plurality of transistors) can be provided on the conductive substrate. Transistors 200s, 200d, t ransistor 200tg, and transistor 200bg can function as a diode element or a capacitor element according to the required design. For example, when using a capacitor element, since there is no voltage range, it can be used in a power supply circuit or the like. On the other hand, in the designed cell array, if the response speed is emphasized, a diode element can be used. For each cell array provided on the same substrate, a diode element or a capacitor element can be separately fabricated.

[0106] Here, when transistor 200t is provided on an insulating substrate, even if substrate 20 is arranged on a grounded stage or the like, it is difficult to discharge the charged charges in transistor 200t.

[0107] Therefore, transistors 200tg, 200bg, 200 s, and transistor 200d may be electrically connected to a conductor 29 having a sufficient size.

[0108] For example, in transistors 200t, 200s, 200d, and transistor 200tg, by commonly providing conductor 205, it can be used together with conductor 29. In that case, after manufacturing the semiconductor device, the charged charges in conductor 29 (conductor 205) may be discharged through the wiring connected to conductor 205.

[0108] ​In addition, by applying an appropriate potential to the conductor 29 (conductor 205), 205) can be used as the second gate electrode.

[0109] The insulating substrate that can be used for the substrate 20 is, for example, a glass substrate or a quartz substrate. Plates, sapphire substrates, stabilized zirconia substrates (yttria-stabilized zirconia substrates, etc.), Resin substrates are available.

[0110] 4 and 5, the transistor 200t is located on the extension of the L-direction. The transistor 200s and the transistor 200d are formed, and the W direction of the transistor 200t However, the present invention is not limited to this configuration and may be applied to any desired circuit. The layout can be changed as appropriate depending on the road design.

[0111] In addition, the transistors 200s, 200d, and 200tg are , can be provided as needed.

[0112] In addition, one transistor 200 does not necessarily have to be paired with another transistor 200. There is no need to provide a plurality of transistors 200. For example, the number of transistors arranged in an array may be less than the number of transistors 200. If the transistors 200 have a common wiring, the transistors 200 are connected to at least the common wiring. There should be at least one per item.

[0113] <<Semiconductor device 2 having diode connection>> FIG. 4A is a circuit diagram of a semiconductor device including a transistor 200t according to one embodiment of the present invention. In the semiconductor device shown in FIG. 4A, a transistor 200t is connected to each electrode. A plurality of transistors (transistor 200t g, transistor 200s, and transistor 200d) that function as diodes connected in a gas-like manner. Transistor 20 0t is connected to the conductor 29 via each diode.

[0114] Note that the substrate 20 uses an insulating substrate, and a conductor 29 is provided on the substrate 20. The charge charged in the transistor 200t flows in the direction of the conductor 29 through the transistor 200tg, the transistor 200s, and the transistor 200d that function as diodes. As a result, it is absorbed by the conductor 29. Since the conductor 29 is sufficiently larger than the transistor 200t , potential fluctuations are less likely to occur due to the charge absorbed by the conductor 29. Therefore, the charge absorbed by the conductor 2 9 is held in a state by the conductor 29.

[0115] Here, FIGS. 4(B) and 4(C) show an example of a cross-sectional view of a semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 4(A). FIG. 4(B) is a cross-sectional view of the transistor 200t in the L length direction, and FIG. 4(C) is a cross-sectional view of the transistor 200t in the W length direction . Note that in FIGS. 4(B) and 4(C), some elements are omitted for clarity of the drawing. As shown in FIGS. 4(B) and 4(C), the semiconductor device has at least a transistor 200t that functions as a diode. It also has a transistor 200s, a transistor 200d, and a transistor 200tg that function as diodes.

[0116] As shown in FIGS. 4(B) and 4(C), the semiconductor device has at least a transistor 200t that functions as a diode. It also has a transistor 200s, a transistor 200d, and a transistor 200tg that function as diodes. 200s, transistor 200d, and transistor 200tg that function as diodes.

[0117] Also, the semiconductor device electrically connects to one of the source or drain of the transistor 200t with a subsequent plug, a wiring 26s1 electrically connected to the plug, and a plug electrically connected to the other of the source or drain of the transistor 200s. The semiconductor device has a plug electrically connected to one of the source or drain of the transistor 200s, a plug electrically connected to the conductor 260 of the transistor 200s, and a wiring 26s2 electrically connected to both plugs. Also, the semiconductor device has a plug 24 s that electrically connects the wiring 26s2 and the conductor 29.

[0118] Also, the semiconductor device electrically connects to the other of the source or drain of the transistor 200t with a subsequent plug, a wiring 26d1 electrically connected to the plug, and a plug electrically connected to the other of the source or drain of the transistor 200d. The semiconductor device also has a plug electrically connected to the other of the source or drain of the transistor 200d, a plug electrically connected to the conductor 260 of the transistor 200d, and a wiring 26d2 electrically connected to both plugs. Also, the semiconductor device has a plug 24d that electrically connects the wiring 26d2 and the conductor 29.

[0119] Also, the semiconductor device has a plug electrically connected to the conductor 260 of the transistor 200t, a wiring 26tg1 electrically connected to the plug, and a plug electrically connected to one of the source or drain of the transistor 200tg. The semiconductor device also has a plug electrically connected to the other of the source or drain of the transistor 200tg, a plug electrically connected to the conductor 260 of the transistor 200tg, and a wiring that electrically connects both plugs. It has wiring 26tg2. Also, it has a plug 24tg that electrically connects the wiring 26tg2 and the conductor 29.

[0120] That is, each electrode of the transistor 200t that functions as a transistor is electrically connected to the conductor 29 via the diode-connected transistors 200s, 200d, and 200tg.

[0121] Note that the transistor 200t using an oxide semiconductor preferably uses transistors having the same configuration provided in the same process as the transistors 200s, 200d, and 200tg that function as diode elements.

[0122] <<Semiconductor device 2 having a capacitance connection>> FIG. 5(A) is a circuit diagram of a semiconductor device having a transistor 200t according to one aspect of the present invention. The semiconductor device shown in FIG. 5(A) has a plurality of transistors (transistors 200tg, 200s, and 200d) that function as capacitive elements electrically connected to each electrode of the transistor 200t. The transistor 200t is connected to the conductor 29 via each capacitive element.

[0123] The charges charged in the transistor 200t are absorbed by the transistors 200tg, 200s, and 200d that function as protection capacitive elements. Since the conductor 29 is sufficiently larger than the transistor 200t, potential fluctuations are less likely to occur due to the charges absorbed by the conductor 29. Therefore, the charges absorbed by the conductor 29 are maintained by the conductor 29.

[0124] ​​​​​​​​​​​ Note that the transistors 200tg, 200s, and 200d preferably have equal potentials. For this purpose, the capacitance values of the transistors 200tg, 200s, and 200d that function as capacitive elements are preferably designed to be as large as possible. Further, conductors to which the other electrodes of the transistors 200tg, 200s, and 200d that function as capacitive elements are electrically connected are preferably provided in common. Note that the transistors 200tg, 200s, and 200d preferably have equal potentials. For this purpose, the capacitance values of the transistors 200tg, 200s, and 200d that function as capacitive elements are preferably designed to be as large as possible. Further, conductors to which the other electrodes of the transistors 200tg, 200s, and 200d that function as capacitive elements are electrically connected are preferably provided in common. Note that the transistors 200tg, 200s, and 200d preferably have equal potentials. For this purpose, the capacitance values of the transistors 200tg, 200s, and 200d that function as capacitive elements are preferably designed to be as large as possible. Further, conductors to which the other electrodes of the transistors 200tg, 200s, and 200d that function as capacitive elements are electrically connected are preferably provided in common. Note that the transistors 200tg, 200s, and 200d preferably have equal potentials. For this purpose, the capacitance values of the transistors 200tg, 200s, and 200d that function as capacitive elements are preferably designed to be as large as possible. Further, conductors to which the other electrodes of the transistors 200tg, 200s, and 200d that function as capacitive elements are electrically connected are preferably provided in common. Note that the transistors 200tg, 200s, and 200d preferably have equal potentials. For this purpose, the capacitance values of the transistors 200tg, 200s, and 200d that function as capacitive elements are preferably designed to be as large as possible. Further, conductors to which the other electrodes of the transistors 200tg, 200s, and 200d that function as capacitive elements are electrically connected are preferably provided in common. Note that the transistors 200tg, 200s, and 200d preferably have equal potentials. For this purpose, the capacitance values of the transistors 200tg, 200s, and 200d that function as capacitive elements are preferably designed to be as large as possible. Further, conductors to which the other electrodes of the transistors 200tg, 200s, and 200d that function as capacitive elements are electrically connected are preferably provided in common.

[0125] Here, FIGS. 5(B) and 5(C) show an example of a cross-sectional view of a semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 5(A). FIG. 5(B) shows a cross-sectional view in the L length direction of the transistor 200t, and FIG. 5(C) shows a cross-sectional view in the W length direction of the transistor 200t. Note that in FIGS. 5(B) and 5(C), some elements are omitted for clarity of the drawing. Here, FIGS. 5(B) and 5(C) show an example of a cross-sectional view of a semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 5(A). FIG. 5(B) shows a cross-sectional view in the L length direction of the transistor 200t, and FIG. 5(C) shows a cross-sectional view in the W length direction of the transistor 200t. Note that in FIGS. 5(B) and 5(C), some elements are omitted for clarity of the drawing. Here, FIGS. 5(B) and 5(C) show an example of a cross-sectional view of a semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 5(A). FIG. 5(B) shows a cross-sectional view in the L length direction of the transistor 200t, and FIG. 5(C) shows a cross-sectional view in the W length direction of the transistor 200t. Note that in FIGS. 5(B) and 5(C), some elements are omitted for clarity of the drawing. Here, FIGS. 5(B) and 5(C) show an example of a cross-sectional view of a semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 5(A). FIG. 5(B) shows a cross-sectional view in the L length direction of the transistor 200t, and FIG. 5(C) shows a cross-sectional view in the W length direction of the transistor 200t. Note that in FIGS. 5(B) and 5(C), some elements are omitted for clarity of the drawing. Here, FIGS. 5(B) and 5(C) show an example of a cross-sectional view of a semiconductor device having the transistor 200t according to one aspect of the present invention shown in FIG. 5(A). FIG. 5(B) shows a cross-sectional view in the L length direction of the transistor 200t, and FIG. 5(C) shows a cross-sectional view in the W length direction of the transistor 200t. Note that in FIGS. 5(B) and 5(C), some elements are omitted for clarity of the drawing.

[0126] As shown in FIGS. 5(B) and 5(C), the semiconductor device includes at least the transistor 200t that functions as a transistor. Further, the semiconductor device includes the transistors 200s, 200d, and 200tg that function as capacitive elements. As shown in FIGS. 5(B) and 5(C), the semiconductor device includes at least the transistor 200t that functions as a transistor. Further, the semiconductor device includes the transistors 200s, 200d, and 200tg that function as capacitive elements. As shown in FIGS. 5(B) and 5(C), the semiconductor device includes at least the transistor 200t that functions as a transistor. Further, the semiconductor device includes the transistors 200s, 200d, and 200tg that function as capacitive elements.

[0127] Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200t, a wiring 26s1 electrically connected to the plug, and a plug electrically connected to the oxide 230 of the transistor 200s. Further, the semiconductor device includes a plug electrically connected to the conductor 260 of the transistor 200s, and a wiring electrically connected to the plug. Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200t, a wiring 26s1 electrically connected to the plug, and a plug electrically connected to the oxide 230 of the transistor 200s. Further, the semiconductor device includes a plug electrically connected to the conductor 260 of the transistor 200s, and a wiring electrically connected to the plug. Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200t, a wiring 26s1 electrically connected to the plug, and a plug electrically connected to the oxide 230 of the transistor 200s. Further, the semiconductor device includes a plug electrically connected to the conductor 260 of the transistor 200s, and a wiring electrically connected to the plug. Further, the semiconductor device includes a plug electrically connected to one of the source or drain of the transistor 200t, a wiring 26s1 electrically connected to the plug, and a plug electrically connected to the oxide 230 of the transistor 200s. Further, the semiconductor device includes a plug electrically connected to the conductor 260 of the transistor 200s, and a wiring electrically connected to the plug. It has a line 26s2. Also, it has a plug 24 that electrically connects the wiring 26s2 and the conductor 29. s.

[0128] Also, the semiconductor device has a plug that is electrically connected to the other of the source or drain of the transistor 200t, a wiring 26d1 that is electrically connected to the plug, and a plug that is electrically connected to the oxide 230 of the transistor 200d. Further, it has a plug that is electrically connected to the conductor 260 of the transistor 200d, and a wiring 26d2 that is electrically connected to the plug. Also, it has a plug 24d that electrically connects the wiring 26d2 and the conductor 29. A plug that continues, a wiring 26d1 that is electrically connected to the plug, and a plug that is electrically connected to the oxide 230 of the transistor 200d. It has a plug that is electrically connected to the oxide 230 of the transistor 200d. Also, it has a plug that is electrically connected to the conductor 260 of the transistor 200d, and a wiring 26d2 that is electrically connected to the plug. Also, it has a plug 24d that electrically connects the wiring 26d2 and the conductor 29. A plug that is electrically connected to the conductor 260 of the transistor 200d, and a wiring 26d2 that is electrically connected to the plug. Also, it has a plug 24d that electrically connects the wiring 26d2 and the conductor 29. It has a plug that is electrically connected to the conductor 260 of the transistor 200d, and a wiring 26d2 that is electrically connected to the plug. Also, it has a plug 24d that electrically connects the wiring 26d2 and the conductor 29. d.

[0129] Also, the semiconductor device has a plug that is electrically connected to the conductor 260 of the transistor 200t, a wiring 26tg1 that is electrically connected to the plug, and a plug that is electrically connected to the conductor 260 of the transistor 200t g. Further, it has a plug that is electrically connected to the other of the source or drain of the transistor 200tg, and a wiring 26tg2 that is electrically connected to the plug. Also, it has a plug 24tg that electrically connects the wiring 26tg2 and the conductor 29. A plug that is electrically connected to the conductor 260 of the transistor 200t, a wiring 26tg1 that is electrically connected to the plug, and a plug that is electrically connected to the conductor 260 of the transistor 200t g. It has a plug that is electrically connected to the conductor 260 of the transistor 200t g. Also, it has a plug that is electrically connected to the other of the source or drain of the transistor 200tg, and a wiring 26tg2 that is electrically connected to the plug. Also, it has a plug 24tg that electrically connects the wiring 26tg2 and the conductor 29. A plug that is electrically connected to the other of the source or drain of the transistor 200tg, and a wiring 26tg2 that is electrically connected to the plug. Also, it has a plug 24tg that electrically connects the wiring 26tg2 and the conductor 29. A plug that is electrically connected to the other of the source or drain of the transistor 200tg, and a wiring 26tg2 that is electrically connected to the plug. Also, it has a plug 24tg that electrically connects the wiring 26tg2 and the conductor 29. It has a plug 24tg that electrically connects the wiring 26tg2 and the conductor 29.

[0130] That is, each electrode of the transistor 200t that functions as a transistor is capacitively connected to the transistors 200s, 200d, and 200tg, and is electrically connected to the conductor 29. The transistors 200s, 200d, and 200tg are preferably provided simultaneously with the transistor 200t. Note that the transistors 200s, 200d, and 200tg are preferably provided simultaneously with the transistor 200t. It is electrically connected to the conductor 29.

[0131] The transistors 200s, 200d, and 200tg are preferably provided simultaneously with the transistor 200t. Note that the transistors 200s, 200d, and 200tg are preferably provided simultaneously with the transistor 200t. Transistors 200d and 200tg may be used by capacitively connecting transistors having the same configuration provided in the same process as transistor 200t.

[0132] Note that a capacitive element may be formed using the films constituting transistor 200t. For example, the oxide semiconductor that can be used as oxide 230 can be made into a conductor by reducing its electrical resistance value. This can be called an OC (Oxide Conductor) electrode. Therefore, transistors 200s, 200d, and 200tg may be used as electrodes of a capacitive element by making oxide 230 into a conductor.

[0133] Also, in the figure, oxide 230 is used as an electrode of the capacitive element, but it is not limited to this structure. For example, in transistor 200t, when providing a conductor that functions as a source electrode or a conductor that functions as a drain electrode, the conductor may be used as an electrode.

[0134] Also, in the case of the circuit configuration shown in Fig. 5(A), for example, after applying a second gate voltage to conductor 29 (conductor 205), by applying respective voltages to the first gate electrode, source electrode, and drain electrode of transistor 200t, conductor 29 (conductor 205) can be used as the second gate electrode.

[0135] As described above, by providing a protection diode element or a protection capacitor element on the same substrate as the transistor element, the yield can be improved, and thus the productivity of the semiconductor device can be increased.

[0136] <<Semiconductor device having a common conductor under a plurality of transistors>> Hereinafter, with reference to FIGS. 6 to 11, an example of a specific layout of a semiconductor device having a conductor 29 provided on an insulating substrate will be described.

[0137] As described above, by providing the conductor 29 for holding charges on the insulating substrate, the charges charged in the transistor 200t can be absorbed and fixed in the conductor 29 or the protection capacitor element.

[0138] Note that it is preferable that the conductor 29 is made sufficiently larger than the transistor. The larger the conductor 29 is, the less likely it is for potential fluctuations to occur even if the amount of absorbed charges is large. Therefore, by making the conductor 29 large enough, a highly reliable semiconductor device can be provided.

[0139] In particular, in the transistors 200t, 200s, 200d, and 200tg, by commonly providing the conductor 205, when used as the conductor 29, by applying an appropriate potential to the conductor 29 (conductor 205), the conductor 29 (conductor 205) can be used as the second gate electrode, which is preferable.

[0140] Here, FIGS. 6(A) to 8(A) are top views of the substrate 20 with the conductor 29 provided thereon, and FIGS. 6(B) to 8(B) are top views of the substrate 20 with the conductor 29 and a plurality of oxides 230 provided in a matrix form on the conductor 29. FIGS. 6(C) to 8(C) are cross-sectional views of the portions indicated by the dashed-dotted line A1 - A2 in FIGS. 6(B) to 8(B). FIGS. 6(D) to 8(D) are cross-sectional views of the portions indicated by the dashed-dotted line A3 - A4 in FIGS. 6(B) to 8(B).

[0141] ​​​​​​​​​​​​​ In each figure (B), an example is shown in which a plurality of oxides 230 are provided in an n-row × m-column matrix on the conductor 29. In the figure, the matrix address is given after the symbol of the oxide 230. Note that the plurality of oxides 230 do not necessarily have to be arranged in a matrix. An appropriate and efficient layout may be adopted according to the application required for the semiconductor device.

[0142] For example, as shown in FIG. 6, a planar conductor 29 common to a plurality of transistors can be used. By providing the conductor 29 over the entire surface, the wiring resistance can be reduced.

[0143] Further, as shown in FIG. 7, the conductor 29 may have n linear regions that overlap with m oxides 230, and the n linear regions may be electrically connected to each other. In particular, it is preferable that the linear regions of the conductor 29 overlap with the channel formation regions of the oxides 230. With this structure, when the conductor 29 is used as the conductor 205 that functions as the second gate electrode, the probability of generating unnecessary parasitic capacitance around the transistor can be reduced.

[0144] Also, as shown in FIG. 8, the conductor 29 may have m linear regions that overlap with n oxides 230, and the m linear regions may be electrically connected. For example, the linear regions of the conductor 29 may be provided in the regions that overlap with the oxides 230.

[0145] FIGS. 9(A), 9(B), and 9(C) show top views of the state in which the conductor 29 is provided on the substrate 20.

[0146] ​​​​​As shown in FIGS. 9(A) and 9(B), the conductor 29 may have a comb-shaped region. Further, as shown in FIG. 9(B), the conductor 29 having a linear region does not necessarily need to have a region for electrical connection in the end region, and may have a region in electrical contact with any region of the conductor 29. Further, for example, the conductor 29 may have a shape that can be drawn in one stroke. As an example, it may have a shape in which U-shapes are connected as shown in FIG. 9(C).

[0147] Here, FIGS. 10(A), 10(B), and 10(C) show top views of a state in which a conductor 29 is provided on a substrate 20, a plurality of oxides 230 arranged in a matrix on the conductor 29, and a plurality of conductors 260 provided on the plurality of oxides 230.

[0148] For example, as shown in FIG. 10(A), a plurality of conductors 260 (conductors 260_1 to conductor 260_n: n is a natural number) are preferably provided in a stripe shape so as to intersect with the linear region of the conductor 29. In particular, the channel formation regions of the conductor 29 and the oxide 230, and the channel formation region of the oxide 230 may overlap. With this structure, the probability of wiring resistance or parasitic capacitance occurring between the conductor 260 and the conductor 29 can be reduced.

[0149] Further, for example, when the linear region of the conductor 29 and the oxide 230 are arranged on the same straight line where they intersect, the plurality of conductors 260 (conductors 260_1 to conductor 260_n) may have a region parallel to the oxide 230 and a region intersecting the oxide 230. Specifically, as shown in FIG. 10(B), the conductor 260 has a protrusion extending from the linear region. It has a peninsula-shaped region. The peninsula-shaped region overlaps with the channel formation region of the oxide 230. This By adopting such a structure, the probability of wiring resistance or parasitic capacitance occurring between the conductor 260 and the conductor 29 can be reduced.

[0150] Also, for example, a plurality of conductors 260 (conductor 260_1 to conductor 260_n) may be structured such that one conductor 260 is provided for every two rows (two columns) of the oxide 230. Specifically, as shown in FIG. 10(B), the conductor 260 has a region where straight lines intersect (also referred to as a cross). By adopting such a structure, the probability of wiring resistance or parasitic capacitance occurring between the conductor 260 and the conductor 29 can be reduced.

[0151] Also, FIG. 11 shows a top view of the conductor 29 on the substrate and a plurality of oxides 230 arranged in a matrix on the conductor 29. As shown in FIGS. 11(A) and 11(B), on the substrate 20, there may be two or more conductors 29 (for example, conductor 29a and conductor 29 b). Note that a plurality of transistors arranged in an array can be provided on the conductor 29. Note that the conductors 29 do not necessarily have the same shape. As shown in FIG. 11(B), they may have different shapes according to the design.

[0152] Note that the structures shown in the configuration examples of semiconductor devices using a conductive substrate and the configuration examples of semiconductor devices using an insulating substrate may be used on a semiconductor substrate. Also, the structures shown in the configuration examples of semiconductor devices using an insulating substrate may be used on a conductive substrate.

[0153] Also, a semiconductor device having a transistor with a large on-current can be provided. Also ​​​​​​​It is possible to provide a semiconductor device having a transistor with a small off-current. Or suppress fluctuations in electrical characteristics, have stable electrical characteristics, and provide a semiconductor device with improved reliability. Further, since the oxide semiconductor can be formed by a sputtering method or the like it can be used for transistors constituting a highly integrated semiconductor device.

[0154] As described above, the configurations, structures, methods, etc. shown in this embodiment can be used in appropriate combination with those shown in other embodiments.

[0155] (Embodiment 2) In this embodiment, a structural example of the transistor shown in the above embodiment will be described.

[0156] <Structural Example 1 of Transistor> A structural example of the transistor 200A will be described with reference to FIGS. 12(A) to (C). FIG. 12(A ) is a top view of the transistor 200A. FIG. 12(B) is a cross-sectional view of the portion indicated by the dashed line L 1-L2 in FIG. 12(A). FIG. 12(C) is a cross-sectional view of the portion indicated by the dashed line W1-W 2 in FIG. 12(A). In the top view of FIG. 12(A), some elements are omitted for clarity of the drawing.

[0157] In FIGS. 12(A) to (C), the transistor 200A, insulators 2 10, 212, 214, 216, 280, 282, and insulator layer 284 that function as interlayer films are shown. Further, conductors 246 (conductor 246a and conductor 246b) that are electrically connected to the transistor 200A and function as contact plugs and a conductive layer 203 that functions as a wiring are shown. ​​​​

[0158] The transistor 200A has a conductive layer that functions as a first gate (also called a top gate) electrode. Conductor 260 (conductor 260a and conductor 260b) and a second gate (bottom gate Conductors 205 (conductors 205a and 205b) functioning as electrodes and an insulator 250 serving as a first gate insulating layer and an insulator 260 serving as a second gate insulating layer. The insulating layer 220, the insulator 222, and the insulator 224 are formed on the insulating layer 220, the insulator 222, and the insulator 224, and the region where the channel is to be formed. The oxide 230 (oxide 230a, oxide 230b, and oxide 230c) has a A conductor 242a functions as either the source or the drain, and a conductor 242b functions as either the source or the drain. The insulating material 274 functions as a conductor 242b and an insulator 274.

[0159] The insulators 210 and 212 function as interlayer films.

[0160] The interlayer film may be made of silicon oxide, silicon oxynitride, silicon nitride oxide, or aluminum oxide. tantalum oxide, hafnium oxide, zirconium oxide, lead zirconate titanate (PZT ), strontium titanate (SrTiO3), (Ba,Sr)TiO3 (BST), etc. The insulators may be used in a single layer or a laminated layer. Aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, oxide Titanium, tungsten oxide, yttrium oxide, and zirconium oxide may also be added. Alternatively, these insulators may be nitrided. Silicon or silicon nitride may also be used in a laminated state.

[0161] For example, the insulator 210 preferably functions as a barrier film that suppresses the mixing of impurities such as water and hydrogen from the substrate side into the transistor 200A. Therefore, the insulator 21 0 preferably uses an insulating material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (i.e., the above impurities are difficult to permeate). Alternatively, it is preferable to use an insulating material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the above oxygen is difficult to permeate). Also, for example, as the insulator 210, aluminum oxide, silicon nitride, etc. may be used. With this configuration, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200A side through the insulator 210.

[0162] For example, the insulator 212 preferably has a lower dielectric constant than the insulator 210. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced.

[0163] The conductive layer 203 is formed so as to be embedded in the insulator 212. Here, the height of the upper surface of the conductive layer 203 and the height of the upper surface of the insulator 212 can be made approximately the same. Note that the conductive layer 203 is shown as having a single-layer configuration, but the present invention is not limited to this. For example, the conductive layer 203 may have a laminated structure of two or more layers. Note that the conductive layer 203 preferably uses a highly conductive material mainly composed of tungsten, copper, or aluminum.

[0164] In the transistor 200A, the conductor 260 may function as a first gate electrode . Also, the conductor 205 may function as a second gate electrode in some cases. In that case​​​​​​​​ 、 The potential applied to the conductor 205 is made independent and not linked to the potential applied to the conductor 260. By varying it, the threshold voltage of the transistor 200A can be controlled. In particular, by applying a negative potential to the conductor 205, the threshold voltage of the transistor 200A can be made greater than 0 V, making it possible to reduce the off-current. Therefore, when a negative potential is applied to the conductor 205 rather than not applying it, the drain current when the potential applied to the conductor 260 is 0 V can be made smaller.

[0165] Also, for example, by providing the conductor 205 and the conductor 260 so as to overlap each other, when a potential is applied to the conductor 260 and the conductor 205, the electric field generated from the conductor 260 and the electric field generated from the conductor 20 5 are connected, and it is possible to cover the channel formation region formed in the oxide 230. That is, the electric field of the conductor 260 that functions as the first gate electrode and the electric field of the conductor 205 that functions as the second gate electrode can electrically surround the channel formation region.

[0166] That is, the electric field of the conductor 260 that functions as the first gate electrode and the electric field of the conductor 205 that functions as the second gate electrode can electrically surround the channel formation region. In this specification, the structure of the transistor in which the channel formation region is electrically surrounded by the electric fields of the first gate electrode and the second gate electrode is called a surrounded c hannel (S-channel) structure. hannel (S-channel) structure. hannel (S-channel) structure.

[0167] The insulators 214 and 216 function as interlayer films in the same manner as the insulator 210 or the insulator 212. For example, the insulator 214 preferably functions as a barrier film that suppresses impurities such as water and hydrogen from entering the transistor 200A from the substrate side. In this configuration and the insulator 214 preferably functions as a barrier film that suppresses impurities such as water and hydrogen from entering the transistor 200A from the substrate side. In this configuration and the insulator 214 preferably functions as a barrier film that suppresses impurities such as water and hydrogen from entering the transistor 200A from the substrate side. In this configuration Accordingly, impurities such as water and hydrogen can be prevented from diffusing from the insulator 214 side to the transistor 200A side on the substrate. Further, for example, the insulator 216 preferably has a lower dielectric constant than the insulator 214. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced.

[0168] The conductor 205 that functions as the second gate electrode has a conductor 205a formed in contact with the inner wall of the opening of the insulator 214 and the insulator 216, and a conductor 205b further formed inside. Here, the height of the upper surfaces of the conductor 205a and the conductor 205b can be made approximately the same as the height of the upper surface of the insulator 216. In the transistor 200A, a configuration in which the conductor 205a and the conductor 205b are laminated is shown, but the present invention is not limited to this. For example, the conductor 205 may be provided in a single-layer or a laminated structure of three or more layers.

[0169] Here, it is preferable to use a conductive material for the conductor 205a that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the above impurities are difficult to permeate). Or, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate). In this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of any one or all of the impurities or the oxygen.

[0170] For example, when the conductor 205a has a function of suppressing the diffusion of oxygen, it is possible to suppress the oxidation of the conductor 205b and the decrease in conductivity. ​​​​​​​​​​​

[0171] Also, when the conductor 205 also serves as a wiring, the conductor 205b is preferably made of a highly conductive material mainly composed of tungsten, copper, or aluminum. In that case, the conductive layer 203 does not necessarily have to be provided. Note that although the conductor 205b is shown as a single layer, it may also have a laminated structure. For example, it may be a laminate of titanium or titanium nitride and the above-mentioned conductive material.

[0172] The insulating layer 220, the insulator 222, and the insulator 224 function as a second gate insulating layer.

[0173] Here, the insulator 224 in contact with the oxide 230 preferably desorbs oxygen by heating. In this specification, oxygen desorbed by heating may be referred to as excess oxygen. For example, the insulator 224 may be appropriately silicon oxide or silicon oxynitride. By providing an oxygen-containing insulator in contact with the oxide 230, oxygen vacancies in the oxide 230 can be reduced, and the reliability of the transistor 200A can be improved.

[0174] Specifically, as the insulator 224, it is preferable to use an oxide material in which some oxygen desorbs by heating. An oxide that desorbs oxygen by heating means that in TDS (Thermal Desorption Spectroscopy) analysis, the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 atoms / cm 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 is the oxide film as described above. In addition, for the above TDS analysis the surface temperature of the film during the analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400 °C or lower.

[0175] Also, the insulator 222 preferably has barrier properties. When the insulator 222 has barrier properties it functions as a layer that suppresses the entry of impurities such as hydrogen from the periphery of the transistor 200A into the transistor 200A.

[0176] The insulator 222 is, for example, preferably a single layer or a laminate of an insulator containing a so-called high-k material such as aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), (Ba,S r)TiO3 (BST), etc. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating layer. By using a high-k material for the insulator that functions as the gate insulating layer, it becomes possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. For example, the insulating layer 220 is preferably thermally stable. For example, silicon oxide and silicon oxynitride are suitable because they are thermally stable. Also, by combining an insulator of a high-k material with silicon oxide or silicon oxynitride and the insulator 222 it is possible to obtain an insulator 222 having a laminated structure that is thermally stable and has a high relative permittivity.

[0177] For example, the insulating layer 220 is preferably thermally stable. For example, silicon oxide and silicon oxynitride are suitable because they are thermally stable. Also, by combining an insulator of a high-k material with silicon oxide or silicon oxynitride and the insulator 222 it is possible to obtain an insulator 222 having a laminated structure that is thermally stable and has a high relative permittivity.

[0178] Note that in FIG. 12, a three-layer stacked structure is shown as the second gate insulating layer, but it may be a single layer or a stacked structure of two or more layers. In that case, it is not limited to a stacked structure made of the same material, and a stacked structure made of different materials may also be used.

[0179] The oxide 230 having a region that functions as a channel formation region includes an oxide 230a, an oxide 230b on the oxide 230a, and an oxide 230c on the oxide 230b. By having the oxide 230a under the oxide 230b, diffusion of impurities from a structure formed below the oxide 230a into the oxide 230b can be suppressed. Also, by having the oxide 230c on the oxide 230b, diffusion of impurities from a structure formed above the oxide 230c into the oxide 230b can be suppressed. As the oxide 230, an oxide semiconductor, which is a kind of metal oxide shown hereinafter, can be used.

[0180] Also, the transistor 200A shown in FIG. 12 has a region where a conductor 242 (conductor 242a and conductor 242b), an oxide 230c, an insulator 250, and a conductor 260 are stacked. With such a structure, a transistor with a high on-current can be provided. Also, a transistor with high controllability can be provided.

[0181] One side of the conductor 242 functions as a source electrode and the other side functions as a drain electrode.

[0182] The conductor 242 is a metal such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, tungsten, or a metal having the metal as a main component. An alloy can be used. In particular, a metal nitride film such as tantalum nitride has a barrier property against hydrogen or oxygen and high oxidation resistance, so it is preferable.

[0183] Also, in FIG. 12, a single-layer structure is shown for the conductor 242, but a laminated structure of two or more layers may be used. For example, a tantalum nitride film and a tungsten film may be laminated. Also, a titanium film and an aluminum film may be laminated. Also, a two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a copper film is laminated on a tungsten film may also be used.

[0184] Also, a titanium film or a titanium nitride film, and an aluminum film or a copper film laminated on the titanium film or the titanium nitride film, and further a titanium film or a titanium nitride film formed thereon, a three-layer structure of a molybdenum film or a molybdenum nitride film, and an aluminum film or a copper film laminated on the molybdenum film or the molybdenum nitride film, and further a molybdenum film or a molybdenum nitride film formed thereon, etc. are available. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0185] Also, a barrier layer may be provided on the conductor 242. It is preferable to use a material having a barrier property against oxygen or hydrogen for the barrier layer. With this configuration, oxidation of the conductor 242 can be suppressed when forming the insulator 274 film.

[0186] For the barrier layer, for example, a metal oxide can be used. In particular, aluminum oxide, acid ​​​It is preferable to use an insulating film that is barrier against oxygen and hydrogen, such as hafnium oxide and gallium oxide. It is also possible to use silicon nitride formed by CVD method.

[0187] By having the barrier layer, the range of material selection for the conductor 242 can be widened. For example, materials with low oxidation resistance but high conductivity, such as tungsten and aluminum, can be used for the conductor 242. Also, for example, a conductor that is easy to film or process can be used. It is possible.

[0188] The insulator 250 functions as the first gate insulating layer.

[0189] As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating layer. In that case, the insulator 250 may also have a laminated structure as the second gate insulating layer. By forming an insulator that functions as a gate insulating layer into a laminated structure of a high-k material and a thermally stable material, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. Also, a laminated structure that is thermally stable and has a high relative dielectric constant can be formed. In the same way, it may be a laminated structure. As the insulator that functions as the gate insulating layer, a laminated structure of a high-k material and a thermally stable material can reduce the gate potential during transistor operation while maintaining the physical film thickness. Also, a laminated structure that is thermally stable and has a high relative dielectric constant can be formed. By making the insulator that functions as the gate insulating layer into a laminated structure of a high-k material and a thermally stable material, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. Also, a laminated structure that is thermally stable and has a high relative dielectric constant can be formed. It is possible to form a laminated structure that is thermally stable and has a high relative dielectric constant. It can be a laminated structure.

[0190] The conductor 260 that functions as the first gate electrode has a conductor 260a and a conductor 260b on the conductor 260a. The conductor 260a preferably uses a conductive material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms, similar to the conductor 205a. Or, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules). The conductor 260a preferably uses a conductive material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms, similar to the conductor 205a. Or, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules). It is preferable to use a conductive material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms, similar to the conductor 205a. Or, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules). Or, it is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules). It is preferable to use a conductive material that has a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0191] Since the conductor 260a has a function of suppressing the diffusion of oxygen, the material selection of the conductor 260b can be improved. That is, by having the conductor 260a, the oxidation of the conductor 260b can be suppressed, and it is possible to prevent the conductivity from decreasing. As the conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. are preferably used. Also, an oxide semiconductor that can be used as the oxide 230 can be used as the conductor 260a. In that case, by forming the conductor 260b by sputtering, the electric resistance value of the conductor 260a can be decreased to form a conductive layer. This can be called an OC (Oxide Conductor) electrode. Since the conductor 260 functions as a wiring, it is preferable to use a conductor having high conductivity. For example, the conductor 260b can be made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 260b may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride, and the above conductive material.

[0192] It is also preferable to provide an insulator 274 so as to cover the upper surface and side surface of the conductor 260, the side surface of the insulator 250, and the side surface of the oxide 230c. The insulator 274 is preferably made of an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid By having the conductor 260a, the oxidation of the conductor 260b can be suppressed, and it is possible to prevent the conductivity from decreasing. As the conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. are preferably used. Also, an oxide semiconductor that can be used as the oxide 230 can be used as the conductor 260a. In that case, by forming the conductor 260b by sputtering, the electric resistance value of the conductor 260a can be decreased to form a conductive layer. This can be called an OC (Oxide Conductor) electrode. Since the conductor 260 functions as a wiring, it is preferable to use a conductor having high conductivity. For example, the conductor 260b can be made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 260b may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride, and the above conductive material. It is also preferable to provide an insulator 274 so as to cover the upper surface and side surface of the conductor 260, the side surface of the insulator 250, and the side surface of the oxide 230c. The insulator 274 is preferably made of an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid Since the conductor 260 functions as a wiring, it is preferable to use a conductor having high conductivity. For example, the conductor 260b can be made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 260b may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride, and the above conductive material.

[0193] Since the conductor 260 functions as a wiring, it is preferable to use a conductor having high conductivity. For example, the conductor 260b can be made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 260b may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride, and the above conductive material. For example, the conductor 260b can be made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, the conductor 260b may have a laminated structure. For example, it may be a laminate of titanium, titanium nitride, and the above conductive material. It is also preferable to provide an insulator 274 so as to cover the upper surface and side surface of the conductor 260, the side surface of the insulator 250, and the side surface of the oxide 230c. The insulator 274 is preferably made of an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid It is also preferable to provide an insulator 274 so as to cover the upper surface and side surface of the conductor 260, the side surface of the insulator 250, and the side surface of the oxide 230c. The insulator 274 is preferably made of an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid

[0194] It is also preferable to provide an insulator 274 so as to cover the upper surface and side surface of the conductor 260, the side surface of the insulator 250, and the side surface of the oxide 230c. The insulator 274 is preferably made of an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid It is also preferable to provide an insulator 274 so as to cover the upper surface and side surface of the conductor 260, the side surface of the insulator 250, and the side surface of the oxide 230c. The insulator 274 is preferably made of an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid It is also preferable to provide an insulator 274 so as to cover the upper surface and side surface of the conductor 260, the side surface of the insulator 250, and the side surface of the oxide 230c. The insulator 274 is preferably made of an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, for example, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, acid Metal oxides such as zirconium oxide, lanthanum oxide, neodymium oxide, tantalum oxide, silicon oxynitride, silicon nitride, etc. can be used.

[0195] By providing the insulator 274, oxidation of the conductor 260 can be suppressed. Also, by having the insulator 274, impurities such as water and hydrogen in the insulator 280 can be prevented from diffusing into the transistor 200A.

[0196] The insulator 280, insulator 282, and insulating layer 284 function as an interlayer film.

[0197] Similar to the insulator 214, the insulator 282 preferably functions as a barrier insulating film that suppresses the entry of impurities such as water and hydrogen from the outside into the transistor 200A.

[0198] Also, similar to the insulator 216, the insulator 280 and the insulating layer 284 preferably have a lower dielectric constant than the insulator 282. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between the wirings can be reduced.

[0199] Also, the transistor 200A may be electrically connected to other structures via plugs or wirings such as the conductor 246 embedded in the insulator 280, insulator 282, and insulating layer 284.

[0200] Also, as the material of the conductor 246, similar to the conductor 205, conductive materials such as metal materials, alloy materials, metal nitride materials, and metal oxide materials can be used in a single layer or in a laminated structure. For example, it is preferable to use high melting point materials such as tungsten and molybdenum that achieve both heat resistance and conductivity. Or, it can be formed of a low resistance conductive material such as aluminum or copper. ​​​​​​​​​​ This is preferable. By using a low-resistance conductive material, the wiring resistance can be reduced.

[0201] For example, as the conductor 246, a laminated structure of, for example, tantalum nitride, which is a conductor having a barrier property against hydrogen and oxygen, and tungsten having high conductivity is used, so that the diffusion of impurities from the outside can be suppressed while maintaining the conductivity as a wiring.

[0202] Also, an insulating body 276 (insulating bodies 276a and 276b) having a barrier property may be disposed between the conductor 246 and the insulating body 280. By providing the insulating body 276, it is possible to suppress the reaction of the oxygen in the insulating body 280 with the conductor 246 and the oxidation of the conductor 246.

[0203] Also, by providing the insulating body 276 having a barrier property, the range of material selection for the conductor used for the plug or wiring can be widened. For example, by using a metal material that has a property of absorbing oxygen while having high conductivity for the conductor 246, a semiconductor device with low power consumption can be provided. Specifically, a material with low oxidation resistance but high conductivity such as tungsten or aluminum can be used. Also, for example, a conductor that is easy to film or process can be used.

[0204]

[0205] By having the above structure, a semiconductor device having a transistor with a large on-current can be provided. Or, a semiconductor device having a transistor with a small off-current can be provided. Or, a semiconductor device that suppresses fluctuations in electrical characteristics, has stable electrical characteristics, and has improved reliability can be provided.

[0205]

[0204]

[0203]

[0202]

[0201] <Regarding constituent materials> [Substrate] There are no major restrictions on the material used as the substrate, but it is necessary to have at least heat resistance enough to withstand subsequent heat treatment. For example, a single crystal semiconductor substrate made of silicon, silicon carbide, etc., a polycrystalline semiconductor substrate, a compound semiconductor substrate made of silicon germanium, etc. can be used. Also, an SOI substrate or a substrate with semiconductor elements such as strained transistors and FIN-type transistors provided thereon can be used. Or, gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium nitride, indium phosphide, silicon germanium, etc. applicable to high electron mobility transistors (HEMT: High Electron Mobility Transistor) may be used. That is, the substrate is not limited to a mere support substrate, and may be a substrate on which other devices such as transistors are formed. In addition, as the substrate, a glass substrate such as barium borosilicate glass or aluminoborosilicate glass, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. can also be used. Note that a flexible substrate (flexible substrate) may be used as the substrate. When using a flexible substrate, transistors, capacitor elements, etc. may be directly fabricated on the flexible substrate, or transistors, capacitor elements, etc. may be fabricated on another fabrication substrate and then peeled off and transferred to the flexible substrate. In addition, in order to peel off and transfer from the fabrication substrate to the flexible substrate, it is advisable to provide a peeling layer between the fabrication substrate and the transistors, capacitor elements, etc. That is, the substrate is not limited to a mere support substrate, and may be a substrate on which other devices such as transistors are formed. transistors are formed.

[0206] Also, as the substrate, a glass substrate such as barium borosilicate glass or aluminoborosilicate glass, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. can also be used. Note that a flexible substrate (flexible substrate) may be used as the substrate. When using a flexible substrate, transistors, capacitor elements, etc. may be directly fabricated on the flexible substrate, or transistors, capacitor elements, etc. may be fabricated on another fabrication substrate and then peeled off and transferred to the flexible substrate. In addition, in order to peel off and transfer from the fabrication substrate to the flexible substrate, it is advisable to provide a peeling layer between the fabrication substrate and the transistors, capacitor elements, etc. transistors, capacitor elements, etc. may be directly fabricated on the flexible substrate, or transistors, capacitor elements, etc. may be fabricated on another fabrication substrate and then peeled off and transferred to the flexible substrate. In addition, in order to peel off and transfer from the fabrication substrate to the flexible substrate, it is advisable to provide a peeling layer between the fabrication substrate and the transistors, capacitor elements, etc. transistors, capacitor elements, etc. may be directly fabricated on the flexible substrate, or transistors, capacitor elements, etc. may be fabricated on another fabrication substrate and then peeled off and transferred to the flexible substrate. In addition, in order to peel off and transfer from the fabrication substrate to the flexible substrate, it is advisable to provide a peeling layer between the fabrication substrate and the transistors, capacitor elements, etc. In addition, in order to peel off and transfer from the fabrication substrate to the flexible substrate, it is advisable to provide a peeling layer between the fabrication substrate and the transistors, capacitor elements, etc. In addition, in order to peel off and transfer from the fabrication substrate to the flexible substrate, it is advisable to provide a peeling layer between the fabrication substrate and the transistors, capacitor elements, etc.

[0207] As the flexible substrate, for example, metal, alloy, resin, glass, or their fibers can be used. The flexible substrate used for the substrate is preferably one with less deformation due to the environment as the linear expansion coefficient is lower. The flexible substrate used for the substrate, for example, has a linear expansion coefficient of 1×10 -3 / K or less, 5×10 -5 / K or less, or 1×10 -5 / K or less, and a material with such a property can be used. Examples of the resin include polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, acrylic, etc. In particular, aramid is suitable as a flexible substrate because of its low linear expansion coefficient.

[0208] [Insulating layer] The insulating layer is made of a material selected from aluminum nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, magnesium oxide, silicon nitride, silicon oxide, silicon oxynitride, silicon nitride oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, etc., used either as a single layer or in a laminated form. Also, among oxide materials, nitride materials, oxynitride materials, and nitroxide materials, a material mixed with a plurality of materials may be used.

[0209] In this specification, etc., oxynitride refers to a compound with a higher nitrogen content than oxygen. Also, nitroxide refers to a compound with a higher oxygen content than nitrogen. The content of each element can be measured using, for example, the Rutherford backscattering spectrometry (RBS). .

[0210] In addition, when an oxide semiconductor, which is a type of metal oxide, is used as the semiconductor layer, In order to prevent an increase in the hydrogen concentration in the insulating layer, it is preferable to reduce the hydrogen concentration in the insulating layer. The hydrogen concentration in the insulating layer was measured using secondary ion mass spectroscopy (SIMS). Ion Mass Spectrometry) is 2×10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than 1×10, more preferably 19 atoms / cm 3 Less than 5 × 10, more preferably 18 atoms / cm 3 The following In particular, it is preferable to reduce the hydrogen concentration in the insulating layer in contact with the semiconductor layer.

[0211] In addition, in order to prevent an increase in the nitrogen concentration in the semiconductor layer, it is possible to reduce the nitrogen concentration in the insulating layer. Specifically, the nitrogen concentration in the insulating layer is preferably 5×10 19 atom s / cm 3 Less than or equal to 5 x 10 18 atoms / cm 3 Less than or equal to 1× 10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 Below Below.

[0212] In addition, at least a region of the insulating layer that is in contact with the semiconductor layer and at least a region of the insulating layer that is in contact with the semiconductor layer are The region to be formed preferably has few defects, and is typically determined by electron spin resonance (ESR) It is preferable that there are fewer signals observed by Electron Spin Resonance). For example, as the above-described signal, an E' center where the g value is observed at 2.001 can be cited. The E' center is caused by the dangling bond of silicon. For example , when a silicon oxide layer or a silicon oxynitride layer is used as the insulating layer, the spin density due to the E' center is 3×10 17 spins / cm 3 or less, preferably 5×10 16 s pins / cm 3 or less, and a silicon oxide layer or a silicon oxynitride layer may be used.

[0213] In addition, when a signal caused by nitrogen dioxide (NO2) is observed in addition to the above-described signal there is a case. The signal is split into three signals by the nuclear spin of nitrogen, and each of them has a g value of 2.037 or more and 2.039 or less (referred to as the first signal), a g value of 2.001 or more and 2.003 or less (referred to as the second signal), and a g value of 1.964 or more and 1.966 or less (referred to as the third signal) is observed.

[0214] For example, as the insulating layer, when the spin density of the signal caused by nitrogen dioxide (NO2) is 1× 10 17 spins / cm 3 or more and 1×10 18 spins / cm 3 less than, it is preferable to use an insulating layer. It is suitable.

[0215] Note that nitrogen oxides (NO x ) containing nitrogen dioxide (NO2) form energy levels in the insulating layer. The energy levels are located within the energy gap of the oxide semiconductor layer. Therefore, nitrogen oxides (NO x) diffuses into the interface between the insulating layer and the oxide semiconductor layer, the level may trap electrons on the insulating layer side. As a result, the trapped electrons stay near the interface between the insulating layer and the oxide semiconductor layer, causing the threshold voltage of the transistor to shift in the positive direction. Therefore, using a film with a low nitrogen oxide content as the insulating layer can reduce the shift of the threshold voltage of the transistor. As the insulating layer with a low nitrogen oxide (NO ) emission amount, for example, a silicon oxynitride layer can be used.

[0216] The silicon oxynitride layer has a larger ammonia emission amount than the nitrogen oxide (NO x ) emission amount in the temperature programmed desorption spectroscopy (TDS). Typically, the ammonia emission amount is 1×10 or more and 5×10 or less per cm 2. The above ammonia emission amount is the total amount in the range where the heat treatment temperature in TDS is 50°C or more and 650°C or less, or 5 x 0°C or more and 550°C or less. Since nitrogen oxides (NO 18 ) react with ammonia and oxygen during heat treatment, using an insulating layer with a large ammonia emission amount can reduce nitrogen oxides (NO 3 ). 19 3 x x Moreover, at least one of the insulating layers in contact with the oxide semiconductor layer is preferably formed using an insulating layer that releases oxygen upon heating. Specifically, the surface temperature of the insulating layer is 100°C or more.

[0217] Nitrogen oxides (NO x ) react with ammonia and oxygen during heat treatment, so using an insulating layer with a large ammonia emission amount can reduce nitrogen oxides (NO ). x

[0218] In addition, at least one of the insulating layers in contact with the oxide semiconductor layer is preferably formed using an insulating layer that releases oxygen upon heating. Specifically, the surface temperature of the insulating layer is 100°C or more. The TDS is carried out by heat treatment at 700 °C or lower, preferably 100 °C or higher and 500 °C or lower. The amount of desorbed oxygen converted to oxygen atoms is 1.0×10 18 atoms / cm 3 or more, 1. 0×10 19 atoms / cm 3 or more, or 1.0×10 20 atoms / cm 3 or more It is preferable to use an insulating layer that satisfies this condition. In this specification, etc., oxygen released by heating is also referred to as "excess oxygen".

[0219] In addition, an insulating layer containing excess oxygen can also be formed by performing a process of adding oxygen to the insulating layer. The process of adding oxygen can be carried out by heat treatment or plasma treatment in an oxidizing atmosphere. Alternatively, oxygen may be added using an ion implantation method, an ion doping method, a plasma immersion ion implantation method, etc. Examples of the gas used for the process of adding oxygen include oxygen-containing gases such as O2 or 16 O2, nitrous oxide gas, ozone gas, etc. In this specification, the process of adding oxygen is also referred to as "oxygen doping process". The oxygen doping process may be carried out by heating the substrate. 18

[0220] As the insulating layer, heat-resistant organic materials such as polyimide, acrylic resin, benzocyclobutene resin, polyamide, and epoxy resin can be used. In addition to the above organic materials, low dielectric constant materials (low-k materials), siloxane resins, PSG (phosphosilicate glass), BPSG (borophosphosilicate glass), etc. can also be used. Note that an insulating layer may be formed by laminating a plurality of insulating layers formed of these materials.

[0221] Note that the siloxane-based resin corresponds to a resin containing Si-O-Si bonds formed using a siloxane-based material as a starting material. The siloxane-based resin may use an organic group (e.g., an alkyl group or an aryl group) or a fluoro group as a substituent. Also, the organic group may have a fluoro group. The method for forming the insulating layer is not particularly limited. Note that depending on the material used for the insulating layer, a firing process may be required. In this case, by combining the firing process of the insulating layer with other heat treatment processes, it becomes possible to efficiently fabricate transistors.

[0222]

[0223] [Electrode] As the conductive material for forming the electrode, a material containing one or more metal elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, etc. can be used. Also, a semiconductor with high electrical conductivity typified by polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may be used.

[0224] Also, a conductive material containing the above metal elements and oxygen may be used. Also, a conductive material containing the above metal elements and nitrogen may be used. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride may be used. Also, indium tin oxide (ITO: Indium Tin Oxide), indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium oxide containing titanium oxide ​​​​​​​​​​​​​​Indium tin oxide, indium zinc oxide, indium gallium zinc oxide, silicon -added indium tin oxide may also be used. Further, indium gallium zinc oxide containing nitrogen may be used.

[0225] In addition, a plurality of conductive layers formed of the above materials may be stacked and used. For example, a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen may be used. In addition, a stacked structure combining the above-described material containing a metal element and a conductive material containing nitrogen may be used. Further, a stacked structure combining the above-described material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen may be used. Also, a stacked structure combining a conductive material containing nitrogen and a conductive material containing oxygen may be used. When an oxide semiconductor is used for the semiconductor layer and a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen is used as the gate electrode, it is preferable to provide the conductive material containing oxygen on the semiconductor layer side. By providing the conductive material containing oxygen on the semiconductor layer side, oxygen desorbed from the conductive material is easily supplied to the semiconductor layer. When an oxide semiconductor is used for the semiconductor layer and a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen is used as the gate electrode, it is preferable to provide the conductive material containing oxygen on the semiconductor layer side. By providing the conductive material containing oxygen on the semiconductor layer side, oxygen desorbed from the conductive material is easily supplied to the semiconductor layer. When an oxide semiconductor is used for the semiconductor layer and a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen is used as the gate electrode, it is preferable to provide the conductive material containing oxygen on the semiconductor layer side. By providing the conductive material containing oxygen on the semiconductor layer side, oxygen desorbed from the conductive material is easily supplied to the semiconductor layer. When an oxide semiconductor is used for the semiconductor layer and a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen is used as the gate electrode, it is preferable to provide the conductive material containing oxygen on the semiconductor layer side. By providing the conductive material containing oxygen on the semiconductor layer side, oxygen desorbed from the conductive material is easily supplied to the semiconductor layer.

[0226] When an oxide semiconductor is used for the semiconductor layer and a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen is used as the gate electrode, it is preferable to provide the conductive material containing oxygen on the semiconductor layer side. By providing the conductive material containing oxygen on the semiconductor layer side, oxygen desorbed from the conductive material is easily supplied to the semiconductor layer. When an oxide semiconductor is used for the semiconductor layer and a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen is used as the gate electrode, it is preferable to provide the conductive material containing oxygen on the semiconductor layer side. By providing the conductive material containing oxygen on the semiconductor layer side, oxygen desorbed from the conductive material is easily supplied to the semiconductor layer. When an oxide semiconductor is used for the semiconductor layer and a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen is used as the gate electrode, it is preferable to provide the conductive material containing oxygen on the semiconductor layer side. By providing the conductive material containing oxygen on the semiconductor layer side, oxygen desorbed from the conductive material is easily supplied to the semiconductor layer. When an oxide semiconductor is used for the semiconductor layer and a stacked structure combining the above-described material containing a metal element and a conductive material containing oxygen is used as the gate electrode, it is preferable to provide the conductive material containing oxygen on the semiconductor layer side. By providing the conductive material containing oxygen on the semiconductor layer side, oxygen desorbed from the conductive material is easily supplied to the semiconductor layer.

[0227] As the electrode, for example, a highly embedable conductive material such as tungsten or polysilicon may be used. Further, a highly embedable conductive material and a barrier layer (diffusion prevention layer) such as a titanium layer, a titanium nitride layer, or a tantalum nitride layer may be used in combination. The electrode may be referred to as a "contact plug" in some cases. As the electrode, for example, a highly embedable conductive material such as tungsten or polysilicon may be used. Further, a highly embedable conductive material and a barrier layer (diffusion prevention layer) such as a titanium layer, a titanium nitride layer, or a tantalum nitride layer may be used in combination. The electrode may be referred to as a "contact plug" in some cases. As the electrode, for example, a highly embedable conductive material such as tungsten or polysilicon may be used. Further, a highly embedable conductive material and a barrier layer (diffusion prevention layer) such as a titanium layer, a titanium nitride layer, or a tantalum nitride layer may be used in combination. The electrode may be referred to as a "contact plug" in some cases. As the electrode, for example, a highly embedable conductive material such as tungsten or polysilicon may be used. Further, a highly embedable conductive material and a barrier layer (diffusion prevention layer) such as a titanium layer, a titanium nitride layer, or a tantalum nitride layer may be used in combination. The electrode may be referred to as a "contact plug" in some cases.

[0228] In particular, it is preferable to use a conductive material through which impurities hardly permeate for the electrode in contact with the gate insulating layer. That is, examples of the conductive material through which impurities hardly permeate include tantalum nitride.

[0229] By using an insulating material through which impurities hardly permeate for the insulating layer and a conductive material through which impurities hardly permeate for the electrode, the diffusion of impurities into the transistor can be further suppressed. Therefore, the reliability of the transistor can be further enhanced. That is, the reliability of the memory device can be further enhanced.

[0230] [Semiconductor layer] As the semiconductor layer, single-crystalline semiconductors, polycrystalline semiconductors, microcrystalline semiconductors, amorphous semiconductors, etc. can be used alone or in combination. As the semiconductor material, for example, silicon, germanium, etc. can be used. Also, compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, oxide semiconductors, nitride semiconductors, and organic semiconductors can be used. When an organic semiconductor is used as the semiconductor layer, low-molecular organic materials having an aromatic ring, π-electron conjugated conductive polymers, etc. can be used. For example, rubrene, tetracene, pentacene, perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene,

[0231] polyparaphenylene vinylene, etc. can be used. For example, rubrene, tetracene, pentacene, perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene, polyparaphenylene vinylene, etc. can be used.

[0232] Note that the semiconductor layers may be stacked. When stacking the semiconductor layers, semiconductors having different crystal states may be used, or semiconductors using different semiconductor materials may be used.

[0233] In addition, since the bandgap of the oxide semiconductor, which is a type of metal oxide, is 2 eV or more, When an oxide semiconductor is used for the conductor layer, a transistor with an extremely small off-current can be realized. Specifically, with a voltage between the source and the drain of 3.5 V and at room temperature (typically 25 °C ), the off-current per 1-μm channel width can be less than 1×10 -20 A, less than 1×10 - 22 A, or less than 1×10 -24 A. That is, the on-off ratio can also be 20 digits or more. Also, for a transistor using an oxide semiconductor for the semiconductor layer ( OS transistor), the breakdown voltage between the source and the drain is high. Therefore, a transistor with good reliability can be provided. Also, a transistor with a large output voltage and high breakdown voltage can be provided . Also, a memory device with good reliability and the like can be provided. Also, a memory device with a large output voltage and high breakdown voltage can be provided .

[0234] Also, in this specification and the like, a transistor using crystalline silicon for the semiconductor layer in which a channel is formed is also referred to as a "crystalline Si transistor".

[0235] A crystalline Si transistor can relatively easily obtain a higher mobility than an OS transistor. On the other hand , it is difficult for a crystalline Si transistor to realize an extremely small off-current like an OS transistor. Therefore, it is important to appropriately select the semiconductor material used for the semiconductor layer according to the purpose and application. For example, depending on the purpose and application, an OS transistor and a crystalline Si transistor etc. may be used in combination.

[0236] When an oxide semiconductor layer is used as the semiconductor layer, the oxide semiconductor layer is formed by sputtering Preferably, it is formed. When the oxide semiconductor layer is formed by a sputtering method, the density of the oxide semiconductor layer can be increased, so it is suitable. When forming the oxide semiconductor layer by a sputtering method, for the sputtering gas, a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen may be used. Also, it is necessary to increase the purity of the sputtering gas. For example, as the oxygen gas and noble gas used as the sputtering gas, gases with a dew point of -60 °C or lower, preferably -100 °C or lower, after being highly purified are used. By forming a film using the highly purified sputtering gas, it is possible to prevent moisture and the like from being incorporated into the oxide semiconductor layer as much as possible. Also, when forming the oxide semiconductor layer by a sputtering method, it is preferable to remove as much moisture as possible in the film formation chamber of the sputtering apparatus. For example, using an adsorption type vacuum exhaust pump such as a cryopump, it is preferable to evacuate the film formation chamber to a high vacuum (from 5×10 Pa to about 1×10 Pa). In particular, during the standby time of the sputtering apparatus, the partial pressure of the gas molecules corresponding to H2O in the film formation chamber (gas molecules corresponding to m / z = 18) is 1×10

[0237] Pa or less, preferably 5×10 -7 Pa or less. Pa to 1×10 - 4 When forming the oxide semiconductor layer by a sputtering method, it is preferable to remove as much moisture as possible in the film formation chamber of the sputtering apparatus. For example, using an adsorption type vacuum exhaust pump such as a cryopump, it is preferable to evacuate the film formation chamber to a high vacuum (from 5×10 Pa to about 1×10 -4 Pa). In particular, during the standby time of the sputtering apparatus, the partial pressure of the gas molecules corresponding to H2O in the film formation chamber (gas molecules corresponding to m / z = 18) is -5 1×10

[0238] [Metal Oxide] The oxide semiconductor, which is a kind of metal oxide, preferably contains at least indium or zinc. In particular, it is preferably contains indium and zinc. Also, in addition to those, it is preferable that aluminum, gallium, yttrium, tin, etc. are contained. Preferably, it is formed. When the oxide semiconductor layer is formed by a sputtering method, the density of the oxide semiconductor layer can be increased, so it is suitable. When forming the oxide semiconductor layer by a sputtering method, for the sputtering gas, a noble gas (typically argon), oxygen, or a mixed gas of a noble gas and oxygen may be used. Also, it is necessary to increase the purity of the sputtering gas. Boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. may be selected and one or more of them may be included.

[0239] Here, consider the case where the oxide semiconductor has indium, element M, and zinc. Note that element M is aluminum, gallium, yttrium, tin, etc. Other elements applicable to element M include boron, titanium, iron, nickel, germanium, zirconium , molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. However, as element M, a plurality of the aforementioned elements may be combined. There may be cases where this is acceptable.

[0240] In this specification, etc., a metal oxide having nitrogen may also be collectively referred to as a metal oxide (metal oxi de). Also, a metal oxide having nitrogen may be referred to as a metal oxynitride (met al oxynitride).

[0241] [[Structure of Metal Oxide]] An oxide semiconductor, which is a type of metal oxide, can be divided into a single-crystalline oxide semiconductor and other non-single-crystalline acid oxide semiconductors. Examples of non-single-crystalline oxide semiconductors include CAAC-OS (c-axis aligned crystalline oxide semico nductor), polycrystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconductor), pseudo-amorphous oxide semiconductor (a-like OS:amorphous-like oxide semiconductor), There is an amorphous oxide semiconductor or the like.

[0242] CAAC-OS has a c-axis orientation and a plurality of nanocrystals are connected in the a-b plane direction. and has a crystal structure with strain. Note that the strain refers to the area where a plurality of nanocrystals are connected. In the region, it refers to the location where the lattice arrangement changes between a region with an aligned lattice arrangement and another region with an aligned lattice arrangement.

[0243] The nanocrystals are based on a hexagon, but are not necessarily regular hexagons and may be non-regular hexagons. Also, in the strain, there may be lattice arrangements such as pentagons and heptagons. In CAAC-OS, it is difficult to confirm a clear grain boundary (also called a grain boundary) even near the strain. That is, it can be seen that the formation of grain boundaries is suppressed by the strain of the lattice arrangement. This is because CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the a-b plane direction and the interatomic bond distance changes due to the substitution of metal elements.

[0244] Also, CAAC-OS tends to have a layered crystal structure (also called a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as the (M, Zn) layer) are laminated. Note that indium and element M can be substituted for each other. When element M in the (M, Zn) layer is substituted with indium, it can also be represented as an (In, M, Zn) layer. When indium in the In layer is substituted with element M, it can also be represented as an (In, M) layer.

[0245] ​​​​​​​CAAC-OS is a highly crystalline metal oxide. On the other hand, since it is difficult to confirm distinct crystal grain boundaries, it can be said that a decrease in electron mobility due to crystal grain boundaries is unlikely to occur. Also, the crystallinity of metal oxides may decrease due to the incorporation of impurities or the generation of defects. Therefore, it can also be said that CAAC-OS is a metal oxide with few impurities and defects (such as oxygen deficiencies). Therefore, the physical properties of the metal oxide having CAAC-OS are stable. Therefore, the metal oxide having CAAC-OS is heat-resistant and highly reliable.

[0246] nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Also, nc-OS does not show regularity in the crystal orientation between different nano crystals. Therefore, no orientation is observed in the entire film. Thus, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or amorphous oxide semiconductors.

[0247] a-like OS is a metal oxide having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has loose or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS.

[0248] Oxide semiconductors (metal oxides) have diverse structures and each has different characteristics. Oxide semiconductors may have two or more of amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, nc- OS, and CAAC-OS.

[0249] [[Transistor having a metal oxide]] ​Next, the case where the above metal oxide is used for the channel formation region of the transistor will be described. This will be described.

[0250] By using the above metal oxide for the channel formation region of the transistor, a transistor with high field-effect mobility can be realized. Also, a highly reliable transistor can be realized. This can be achieved. This can be achieved.

[0251] Also, for the transistor, it is preferable to use a metal oxide with a low carrier density. When reducing the carrier density of the metal oxide film, the impurity concentration in the metal oxide film may be reduced, and the density of defect levels may be reduced. In this specification and the like, a low impurity concentration and a low density of defect levels are referred to as highly pure intrinsic or substantially highly pure intrinsic. For example, the metal oxide has a carrier density of less than 8×10 / cm , preferably less than 1×10 / cm , more preferably less than 1×10 11 / cm 3 , and it is sufficient to be 1×10 11 / cm 3 or more. 10 / cm 3 -9 / cm 3

[0252] .

[0253] Also, a metal oxide film that is highly pure intrinsic or substantially highly pure intrinsic has a low density of defect levels, and thus the density of trap levels may also be low. Therefore, the charge trapped in the trap levels of the metal oxide may take a long time to disappear and may behave like a fixed charge. For this reason, a transistor having a metal oxide with a high trap level density in the channel formation region may have unstable electrical characteristics.

[0254] ​​​​​​​ Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the metal oxide. In addition, in order to reduce the impurity concentration in the metal oxide, it is preferable to also reduce the impurity concentration in the film in close contact. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0255] [[Impurities]] Here, the effects of various impurities in the metal oxide will be described.

[0256] When silicon or carbon, which is one of the Group 14 elements, is contained in the metal oxide, defect levels are formed in the metal oxide. Therefore, the concentration of silicon or carbon in the metal oxide and the concentration of silicon or carbon near the interface with the metal oxide (the concentration obtained by secondary ion mass spectrometry (SIMS :Secondary Ion Mass Spectrometry)) are set to 2×10 or less, preferably 2×10 atoms / cm 18 atoms / cm 3 or less, preferably 2×10 17 atoms / cm 3 or less.

[0257] In addition, when an alkali metal or an alkaline earth metal is contained in the metal oxide, defect levels may be formed and carriers may be generated. Therefore, transistors using a metal oxide containing an alkali metal or an alkaline earth metal in the channel formation region tend to have normally-on characteristics. For this reason, it is preferable to reduce the concentration of alkali metal or alkaline earth metal in the metal oxide. Specifically, the concentration of alkali metal or alkaline earth metal in the metal oxide obtained by SIMS is 1×10 atoms / cm or less, preferably 1×10 18 atoms / cm​3 The following is preferable to be 2×10 16 atoms / cm 3 or less.

[0258] In addition, in a metal oxide, when nitrogen is contained, carriers, i.e., electrons, are generated, and the carrier density increases, making it easy to become n-type. As a result, a transistor using a metal oxide containing nitrogen in the channel formation region tends to have normally-on characteristics. Therefore, in the metal oxide, it is preferable that the nitrogen in the channel formation region is reduced as much as possible. For example, the nitrogen concentration in the metal oxide is less than 5×10 atoms / cm in SIMS, preferably less than 5×10 atoms / cm or less, more preferably less than 1×10 19 atoms / cm 3 or less, even more preferably less than 5×10 18 atoms / cm 3 or less, and still more preferably less than 5×10 18 a toms / cm 3 or less. 17 atoms / cm 3 or less.

[0259] In addition, hydrogen contained in the metal oxide may react with oxygen bonded to the metal atom to form water, thereby forming oxygen vacancies. When hydrogen enters the oxygen vacancies, carriers, i.e., electrons, may be generated. Also, a part of the hydrogen may bond with oxygen bonded to the metal atom to generate carriers, i.e., electrons. Therefore, a transistor using a metal oxide containing hydrogen in the channel formation region tends to have normally-on characteristics. For this reason, it is preferable that the hydrogen in the metal oxide is reduced as much as possible. Specifically, in the metal oxide, the hydrogen concentration obtained by SIMS is less than 1×10 atoms / cm in SIMS, less than 1×10 atoms / cm in SIMS, 20 atoms / cm 3 less than Preferably 1×10 19 atoms / cm 3 less, more preferably 5×10 18 atom s / cm 3 less, even more preferably 1×10 18 atoms / cm 3 shall be less.

[0260] By using a metal oxide with sufficiently reduced impurities in the channel formation region of the transistor , stable electrical characteristics can be imparted.

[0261] As the metal oxide used for the semiconductor of the transistor, it is preferable to use a highly crystalline thin film . By using this thin film, the stability or reliability of the transistor can be improved . As this thin film, for example, a thin film of a single crystal metal oxide or a polycrystalline metal oxide can be mentioned. However, to form a thin film of a single crystal metal oxide or a polycrystalline metal oxide on a substrate, a high-temperature or laser heating process is required. Therefore, the cost of the manufacturing process increases, and furthermore, the throughput also decreases.

[0262] In 2009, it was reported in Non-Patent Document 1 and Non-Patent Document 2 that an In-Ga-Zn oxide having a CAAC structure (referred to as CAAC-IGZO) was discovered. Here , it is reported that CAAC-IGZO has c-axis orientation, no clearly confirmed grain boundaries , and can be formed on a substrate at low temperature. Furthermore, it is reported that a transistor using CAAC-IGZO has excellent electrical characteristics and reliability.

[0263] Also, in 2013, an In-Ga-Zn oxide having an nc structure (referred to as nc-IGZO) (b) was discovered (see Non-Patent Document 3). Here, nc-IGZO has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 3 nm or less), and it has been reported that no regularity is observed in the crystal orientation between different such regions. For example, in a region of 1 nm or more and 3 nm or less, it has been reported that there is no regularity in the crystal orientation between different such regions.

[0264] In Non-Patent Document 4 and Non-Patent Document 5, the transition of the average crystal size due to electron beam irradiation for each of the above-mentioned CAAC-IGZO, nc-IGZO, and IGZO with low crystallinity thin films is shown. In the thin film of IGZO with low crystallinity, crystalline IGZO of about 1 nm has been observed even before electron beam irradiation. Therefore, here, it has been reported that the existence of a completely amorphous structure could not be confirmed in IGZO. Furthermore, compared with the thin film of IGZO with low crystallinity, the thin films of CAAC-IGZO and nc-IGZO have been shown to have high stability against electron beam irradiation. Therefore, it is preferable to use the thin film of CAAC- IGZO or the thin film of nc-IGZO as the semiconductor of the transistor. IGZO even before electron beam irradiation. Therefore, here, it has been reported that the existence of a completely amorphous structure (completely amorphous structu re) could not be confirmed in IGZO. Furthermore, compared with the thin film of IGZO with low crystallinity, the thin films of CAAC-IGZO and nc-IGZO have been shown to have high stability against electron beam irradiation. Therefore, it is preferable to use the thin film of CAAC- IGZO or the thin film of nc-IGZO as the semiconductor of the transistor. IGZO and the thin film of nc-IGZO have been shown to have high stability against electron beam irradiation. Therefore, it is preferable to use the thin film of CAAC -IGZO or the thin film of nc-IGZO as the semiconductor of the transistor. -IGZO or the thin film of nc-IGZO as the semiconductor of the transistor.

[0265] A transistor using a metal oxide has an extremely small leakage current in the non-conducting state. Specifically, it has been shown in Non-Patent Document 6 that the off-current per 1 μm of the channel width of the transistor is on the order of yA / μm (10 A / μm). For example, a low-power CPU etc. that applies the characteristic of low leakage current of a transistor using a metal oxide has been -24 shown (see Non-Patent Document 7). shown (see Non-Patent Document 7). shown (see Non-Patent Document 7).

[0266] Also, utilizing the characteristic of low leakage current of a transistor using a metal oxide, the The application of transistors to display devices has been reported (see Non-Patent Document 8). In a display device, the displayed image is switched several tens of times per second. The number of times the image is switched per second is referred to as the refresh rate. Also, the refresh rate is sometimes called the driving frequency. Such a high-speed switching of the screen that is difficult for the human eye to perceive is considered to be the cause of eye fatigue. Therefore, it has been proposed to reduce the refresh rate of the display device to reduce the number of image rewrites. Also, by reducing the driving with a reduced refresh rate, it is possible to reduce the power consumption of the display device. Such a driving method is called Airdriving stop (IDS) driving.

[0267] The discovery of the CAAC structure and the nc structure has contributed to the improvement of the electrical characteristics and reliability of transistors using a metal oxide having the CAAC structure or the nc structure, as well as the reduction of the cost of the manufacturing process and the improvement of throughput. Also, application research on the display device and LSI of the transistor using the characteristic that the leakage current of the transistor is low has been advanced.

[0268] <Regarding the film formation method> The insulating material for forming the insulating layer, the conductive material for forming the electrode, or the semiconductor material for forming the semiconductor layer is a sputtering method, a spin coating method, a CVD (Chemical Vapor Deposition) method (thermal CVD method, MOCVD (Meta l Organic Chemical Vapor Deposition) method, PE CVD (Plasma Enhanced CVD) method, high-density plasma CVD (Hig ​​​​h density plasma CVD), LPCVD (low pressure e CVD), APCVD (atmospheric pressure CVD) etc. (including), ALD (Atomic Layer Deposition), MBE ( Molecular Beam Epitaxy), PLD (Pulsed Laser r Deposition), dip coating method, spray coating method, droplet ejection method (inkjet printing method, etc.), printing method (screen printing, offset printing, etc.) can be used to form it.

[0269] Plasma CVD method can obtain a high-quality film at a relatively low temperature. When using film formation methods that do not use plasma during film formation, such as MOCVD method, ALD method, and thermal CVD method, damage to the surface to be formed is less likely to occur. For example, wirings, electrodes, and elements (such as transistors and capacitor elements etc.) included in a memory device may be charged up by receiving charges from plasma. In this case, the wirings, electrodes, elements, etc. included in the memory device may be damaged by the accumulated charges in some cases. On the other hand, in the case of a film formation method that does not use plasma, such plasma damage does not occur, so the yield of the memory device can be increased. Also, since plasma damage during film formation does not occur, a film with fewer defects can be obtained.

[0270] The CVD method and the ALD method are different from film formation methods in which particles emitted from a target etc. are deposited, and are film formation methods in which a film is formed by a reaction on the surface of the object to be processed. Therefore they are less affected by the shape of the object to be processed and are film formation methods with good step coverage. In particular , since the ALD method has excellent step coverage and excellent thickness uniformity, the aspect ratio of ​​ It is suitable, for example, when covering the surface of a high opening. However, since the ALD method has a relatively slow film formation rate, it may be preferable to use it in combination with other film formation methods such as the CVD method with a high film formation rate.

[0271] The CVD method and the ALD method can control the composition of the obtained film by the flow rate ratio of the source gases. For example, in the CVD method and the ALD method, a film with an arbitrary composition can be formed by the flow rate ratio of the source gases. Further, for example, in the CVD method and the ALD method, a film with a continuously changing composition can be formed by changing the flow rate ratio of the source gases while forming the film. When forming a film while changing the flow rate ratio of the source gases, the time required for film formation can be shortened by the time required for transfer and pressure adjustment compared to the case of forming a film using a plurality of film formation chambers. Therefore, the productivity of the memory device can be increased in some cases.

[0272] When forming a film by the ALD method, it is preferable to use a gas that does not contain chlorine as the material gas.

[0273] <Example structure 2 of transistor> The structure example of the transistor 200B will be described with reference to FIGS. 13(A) to (C). FIG. 13(A) is a top view of the transistor 200B. FIG. 13(B) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 13(A). FIG. 13(C) is a cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. 13(A). In the top view of FIG. 13(A), some elements are omitted for clarity of the drawing.

[0274] The transistor 200B is a modified example of the transistor 200A. Therefore, to avoid repeating the description, To prevent this, the differences from the transistor 200A will mainly be described.

[0275] Also, in the transistor 200B shown in FIG. 13, the oxide 230c, the insulator 250, and the conductor 260 are disposed via the insulator 274 within an opening provided in the insulator 280. Also, the oxide 230c, the insulator 250, and the conductor 260 are disposed between the conductor 242a and the conductor 242b.

[0276] Note that the oxide 230c is preferably provided via the insulator 274 within an opening provided in the insulator 280. When the insulator 274 has a barrier property, diffusion of impurities from the insulator 280 into the oxide 230 can be suppressed.

[0277] The insulator 250 functions as a first gate insulating layer. The insulator 250 is preferably provided via the oxide 230c and the insulator 274 within an opening provided in the insulator 280.

[0278] The insulator 274 is disposed between the insulator 280 and the transistor 200B. The insulator 274 may be made of an insulating material having a function of suppressing diffusion of impurities such as water, hydrogen, and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, etc. Also, other materials such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, tantalum oxide, etc. metal oxides, silicon oxynitride, silicon nitride, etc. can be used.

[0279] By having the insulator 274, impurities such as water and hydrogen that the insulator 280 has do not diffuse into the oxide 23 0c and through the insulator 250, diffusion into the oxide 230b can be suppressed. Also, oxidation of the conductor 260 can be suppressed by the excess oxygen in the insulator 280.

[0280] <Structure Example 3 of Transistor> A structure example of the transistor 200C will be described with reference to FIGS. 14(A) to (C). FIG. 14(A) is a top view of the transistor 200C. FIG. 14(B) is a cross-sectional view of the portion indicated by the one-dot chain line L 1 - L2 in FIG. 14(A). FIG. 14(C) is a cross-sectional view of the portion indicated by the one-dot chain line W1 - W 2 in FIG. 14(A). In the top view of FIG. 14(A), some elements are omitted for clarity of the drawing.

[0281] The transistor 200C is a modification of the transistor 200B. Therefore, to avoid repetition of the description, mainly the differences from the transistor 200B will be described.

[0282] In the transistor 200C shown in FIG. 14, a conductive layer 247a is disposed between the conductor 242a and the oxide 230b, and a conductive layer 247b is disposed between the conductor 242b and the oxide 230b. Here, the conductor 242a (conductor 242b) extends beyond the upper surface of the conductive layer 247a (conductive layer 24 7b) and the side surface on the conductor 260 side, and has a region in contact with the upper surface of the oxide 230b. Here, the conductive layer 247 may be made of a conductor that can be used for the conductor 242. Further, the film thickness of the conductive layer 247 is preferably at least thicker than the conductor 242.

[0283] The transistor 200C shown in FIG. 14 has the above-described configuration, whereby the transistor ​​​​The conductor 242 can be brought closer to the conductor 260 than the stud 200B. Or, the ends of the conductor 242a and the conductor 242b can be overlapped with the conductor 260. Thereby, the substantial channel length of the transistor 200C can be shortened, and the on-current and the operating frequency can be improved.

[0284] Also, the conductive layer 247a (conductive layer 247b) is preferably provided so as to overlap with the conductor 242a (conductor 242b). With such a configuration, in the etching for forming an opening for embedding the conductor 246a (conductor 246b), the conductive layer 247a (conductive layer 247b) functions as a stopper, and the oxide 230b can be prevented from being over-etched. 247b) functions as a stopper, and the oxide 230b can be prevented from being over-etched.

[0285] Also, the transistor 200C shown in FIG. 14 may be configured such that the insulating layer 245 is disposed in contact with the insulating layer 244. As the insulating layer 244, it is preferably a barrier insulating film that suppresses the mixing of impurities such as water and hydrogen and excess oxygen from the insulator 280 side into the transistor 200C. As the insulating layer 245, the insulator used for the insulating layer 244 can be used. Or, as the insulating layer 245, for example, nitride insulators such as aluminum nitride, titanium nitride, silicon nitride, and silicon oxynitride may be used.

[0286] Also, the transistor 200C shown in FIG. 14 is different from the transistor 200B shown in FIG. 13, and the conductor 205 may be provided with a single-layer structure. In this case, an insulating film that becomes the insulator 216 is formed on the patterned conductor 205, and the upper portion of the insulating film is the upper surface of the conductor 205. ​​​​​​​​​​​It may be removed using a chemical mechanical polishing (CMP) method or the like until it is exposed. Here, for the conductor It is preferable to improve the flatness of the upper surface of 205. For example, the average surface roughness (Ra) of the upper surface of the conductor 205 is 1 nm or less, preferably 0.5 nm or less, more preferably 0.3 nm or less should be sufficient. Thereby, the flatness of the insulating layer formed on the conductor 205 can be improved, and the crystallinity of the oxide 230b and the oxide 230c can be improved.

[0287] <Structural Example 4 of Transistor> A structural example of the transistor 200D will be described with reference to FIGS. 15(A) to (C). FIG. 15(A ) is a top view of the transistor 200D. FIG. 15(B) is a cross-sectional view of the portion indicated by the dashed-dotted line L 1-L2 in FIG. 15(A). FIG. 15(C) is a cross-sectional view of the portion indicated by the dashed-dotted line W1-W 2 in FIG. 15(A). In the top view of FIG. 15(A), for clarity of the drawing, some elements are omitted and shown.

[0288] The transistor 200D is a modified example of the above transistor. Therefore, to prevent repetition of the description only the points different from the above transistor will be mainly described.

[0289] In FIGS. 15(A) to (C), the conductor 205 that functions as the second gate is also made to function as a wiring without providing the conductive layer 203. Further, an insulator 250 is provided on the oxide 230c, and a metal oxide 252 is provided on the insulator 250. Further, a conductor 2 60 is provided on the metal oxide 252, and an insulating layer 270 is provided on the conductor 260. Further, an insulating layer 2 71 is provided on the insulating layer 270. has.

[0290] The metal oxide 252 preferably has a function of suppressing oxygen diffusion. The insulator 250 and By providing a metal oxide 252 that suppresses the diffusion of oxygen between the conductor 260, the diffusion of oxygen into the conductor 260 is suppressed. That is, a decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. Further, oxidation of the conductor 260 by oxygen can be suppressed.

[0291] Note that the metal oxide 252 may function as part of the first gate electrode. For example, an oxide semiconductor that can be used as the oxide 230 can be used as the metal oxide 252. In that case, by forming the conductor 260 by sputtering, the electrical resistance value of the metal oxide 252 can be reduced to form a conductive layer.

[0292] Also, the metal oxide 252 may function as part of the first gate insulating layer. Therefore, when silicon oxide, silicon oxynitride, etc. are used for the insulator 250, it is preferable to use a metal oxide which is a high-k material having a high relative permittivity as the metal oxide 252. By adopting such a stacked structure, a stacked structure that is stable against heat and has a high relative permittivity can be obtained. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness. Further, it is possible to thin the equivalent oxide film thickness (EOT) of the insulating layer that functions as the gate insulating layer.

[0293] In the transistor 200D, the metal oxide 252 is shown as a single layer, but it may have a stacked structure of two or more layers. For example, a metal oxide that functions as part of the first gate electrode and a metal oxide that functions as part of the first gate insulating layer may be stacked and provided.

[0294] When functioning as the first gate electrode by having the metal oxide 252, the conductor 26 can improve the on-current of the transistor 200D without weakening the influence of the electric field from 0. Alternatively, when functioning as the first gate insulating layer, by the physical thickness of the insulator 250 and the metal oxide 252, the distance between the conductor 260 and the oxide 230 can be maintained, thereby suppressing the leakage current between the conductor 260 and the oxide 230. Therefore, by providing the laminated structure of the insulator 250 and the metal oxide 252, the physical distance between the conductor 260 and the oxide 230, and the electric field strength applied from the conductor 260 to the oxide 230 can be easily adjusted appropriately.

[0295] Specifically, by reducing the resistance of the oxide semiconductor that can be used for the oxide 230, it can be used as the metal oxide 252. Alternatively, it can contain one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc.

[0296] In particular, it is preferable to use an insulating layer containing one or both of aluminum and hafnium oxides, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. In particular, hafnium aluminate has higher heat resistance than hafnium oxide. Therefore, it is preferable because it is less likely to crystallize in the subsequent thermal history (thermal budget). Note that the metal oxide 252 is not an essential component. It can be appropriately designed according to the required transistor characteristics.

[0297] The insulating layer 270 may be made of an insulating material having a function of suppressing the permeation of impurities such as water and hydrogen and oxygen. For example, it is preferable to use aluminum oxide, hafnium oxide, or the like. Thereby, oxidation of the conductor 260 by oxygen from above the insulating layer 270 can be suppressed. Also, it is possible to suppress impurities such as water and hydrogen from above the insulating layer 270 from mixing into the oxide 230 through the conductor 260 and the insulator 250. For example, it is preferable to use aluminum oxide, hafnium oxide, or the like. Thereby, oxidation of the conductor 260 by oxygen from above the insulating layer 270 can be suppressed. Also, it is possible to suppress impurities such as water and hydrogen from above the insulating layer 270 from mixing into the oxide 230 through the conductor 260 and the insulator 250. Thereby, oxidation of the conductor 260 by oxygen from above the insulating layer 270 can be suppressed. Also, it is possible to suppress impurities such as water and hydrogen from above the insulating layer 270 from mixing into the oxide 230 through the conductor 260 and the insulator 250. Also, it is possible to suppress impurities such as water and hydrogen from above the insulating layer 270 from mixing into the oxide 230 through the conductor 260 and the insulator 250. Also, it is possible to suppress impurities such as water and hydrogen from above the insulating layer 270 from mixing into the oxide 230 through the conductor 260 and the insulator 250. This can be achieved.

[0298] The insulating layer 271 functions as a hard mask. By providing the insulating layer 271, when processing the conductor 260, the side surface of the conductor 260 can be made substantially perpendicular, specifically, the angle formed by the side surface of the conductor 260 and the substrate surface can be set to be 75 degrees or more and 100 degrees or less, preferably 80 degrees or more and 95 degrees or less. When processing the conductor 260, the side surface of the conductor 260 can be made substantially perpendicular, specifically, the angle formed by the side surface of the conductor 260 and the substrate surface can be set to be 75 degrees or more and 100 degrees or less, preferably 80 degrees or more and 95 degrees or less. When processing the conductor 260, the side surface of the conductor 260 can be made substantially perpendicular, specifically, the angle formed by the side surface of the conductor 260 and the substrate surface can be set to be 75 degrees or more and 100 degrees or less, preferably 80 degrees or more and 95 degrees or less. This can be achieved.

[0299] Note that, by using an insulating material having a function of suppressing the permeation of impurities such as water and hydrogen and oxygen for the insulating layer 271, it may also function as a barrier layer. In that case, the insulating layer 270 may not be provided. Note that, by using an insulating material having a function of suppressing the permeation of impurities such as water and hydrogen and oxygen for the insulating layer 271, it may also function as a barrier layer. In that case, the insulating layer 270 may not be provided. In that case, the insulating layer 270 may not be provided.

[0300] By selectively removing a part of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c using the insulating layer 271 as a hard mask, their side surfaces can be made substantially coincident, and a part of the surface of the oxide 230b can be exposed. By selectively removing a part of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c using the insulating layer 271 as a hard mask, their side surfaces can be made substantially coincident, and a part of the surface of the oxide 230b can be exposed. By selectively removing a part of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c using the insulating layer 271 as a hard mask, their side surfaces can be made substantially coincident, and a part of the surface of the oxide 230b can be exposed.

[0301] Also, the transistor 200D has a region 231a and a region 231b on a part of the exposed surface of the oxide 230b. One of the region 231a or the region 231b functions as a source region. Also, the transistor 200D has a region 231a and a region 231b on a part of the exposed surface of the oxide 230b. One of the region 231a or the region 231b functions as a source region. One functions as a source region, and the other functions as a drain region.

[0302] The formation of regions 231a and 231b can be achieved, for example, by using an ion implantation method, an ion doping method , a plasma immersion ion implantation method, a plasma treatment, etc. to introduce impurity elements such as phosphorus and boron onto the exposed oxide 23 0b surface. In this embodiment, the "impurity element" refers to an element other than the main component element.

[0303] Alternatively, after partially exposing the surface of the oxide 230b, a metal film is formed and then heat-treated to diffuse the elements contained in the metal film into the oxide 230b to form regions 231a and region 231b.

[0304] In the region where the impurity element of the oxide 230b is introduced, the electrical resistivity decreases. Therefore, regions 231a and 231b may be referred to as "impurity regions" or "low-resistance regions".

[0305] By using the insulating layer 271 or the conductor 260 as a mask, regions 231a and region 231b can be formed in a self-aligned manner. Thus, regions 2 31a or region 231b do not overlap with the conductor 260, and the parasitic capacitance can be reduced. In addition, no offset region is formed between the channel formation region and the source region or the drain region (region 231a or region 231b). By forming regions 231a and 231 b in a self-aligned manner, an increase in the on-current, a reduction in the threshold voltage, an improvement in the operating frequency, etc. can be realized.

[0306] In addition, in order to further reduce the off-current, an offset region may be provided between the channel formation region and the source region or the drain region. The offset region is a region with a high electrical resistivity and is a region where the introduction of the above-described impurity elements is not performed. The formation of the offset region can be realized by introducing the above-described impurity elements after the formation of the insulating layer 275. In this case, the insulating layer 275 also functions as a mask in the same manner as the insulating layer 271 and the like. Therefore, impurity elements are not introduced into the region overlapping with the insulating layer 275 of the oxide 230b, and the electrical resistivity of this region can be increased as a whole. Also, the transistor 200D has an insulating layer 275 on the side surfaces of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c. The insulating layer 275 is preferably an insulator with a low relative permittivity. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with pores, resin, etc. are preferable. In particular, it is preferable to use silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores for the insulating layer 275 because an excess oxygen region can be easily formed in the insulating layer 275 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. Also, the insulating layer 275 preferably has a function of diffusing oxygen. Also, the transistor 200D has an insulator 274 on the insulating layer 275 and the oxide 230. The insulator 274 is preferably formed by a sputtering method. The formation of the offset region can be realized by introducing the above-described impurity elements after the formation of the insulating layer 275. In this case, the insulating layer 275 also functions as a mask in the same manner as the insulating layer 271 and the like. Therefore, impurity elements are not introduced into the region overlapping with the insulating layer 275 of the oxide 230b, and the electrical resistivity of this region can be increased as a whole. Also, the transistor 200D has an insulating layer 275 on the side surfaces of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c. The insulating layer 275 is preferably an insulator with a low relative permittivity. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with pores, resin, etc. are preferable. In particular, it is preferable to use silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores for the insulating layer 275 because an excess oxygen region can be easily formed in the insulating layer 275 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. Also, the insulating layer 275 preferably has a function of diffusing oxygen. Also, the transistor 200D has an insulator 274 on the insulating layer 275 and the oxide 230. The insulator 274 is preferably formed by a sputtering method. The formation of the offset region can be realized by introducing the above-described impurity elements after the formation of the insulating layer 275. In this case, the insulating layer 275 also functions as a mask in the same manner as the insulating layer 271 and the like. Therefore, impurity elements are not introduced into the region overlapping with the insulating layer 275 of the oxide 230b, and the electrical resistivity of this region can be increased as a whole.

[0307] Also, the transistor 200D has an insulating layer 275 on the side surfaces of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c. The insulating layer 275 is preferably an insulator with a low relative permittivity. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with pores, resin, etc. are preferable. In particular, it is preferable to use silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores for the insulating layer 275 because an excess oxygen region can be easily formed in the insulating layer 275 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. Also, the insulating layer 275 preferably has a function of diffusing oxygen. Also, the transistor 200D has an insulator 274 on the insulating layer 275 and the oxide 230. The insulator 274 is preferably formed by a sputtering method. The formation of the offset region can be realized by introducing the above-described impurity elements after the formation of the insulating layer 275. In this case, the insulating layer 275 also functions as a mask in the same manner as the insulating layer 271 and the like. Therefore, impurity elements are not introduced into the region overlapping with the insulating layer 275 of the oxide 230b, and the electrical resistivity of this region can be increased as a whole. Also, the transistor 200D has an insulating layer 275 on the side surfaces of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c. The insulating layer 275 is preferably an insulator with a low relative permittivity. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with pores, resin, etc. are preferable. In particular, it is preferable to use silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores for the insulating layer 275 because an excess oxygen region can be easily formed in the insulating layer 275 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. Also, the insulating layer 275 preferably has a function of diffusing oxygen. Also, the transistor 200D has an insulator 274 on the insulating layer 275 and the oxide 230. The insulator 274 is preferably formed by a sputtering method. The formation of the offset region can be realized by introducing the above-described impurity elements after the formation of the insulating layer 275. In this case, the insulating layer 275 also functions as a mask in the same manner as the insulating layer 271 and the like. Therefore, impurity elements are not introduced into the region overlapping with the insulating layer 275 of the oxide 230b, and the electrical resistivity of this region can be increased as a whole. Also, the transistor 200D has an insulating layer 275 on the side surfaces of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c. The insulating layer 275 is preferably an insulator with a low relative permittivity. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with pores, resin, etc. are preferable. In particular, it is preferable to use silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores for the insulating layer 275 because an excess oxygen region can be easily formed in the insulating layer 275 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. Also, the insulating layer 275 preferably has a function of diffusing oxygen. Also, the transistor 200D has an insulator 274 on the insulating layer 275 and the oxide 230. The insulator 274 is preferably formed by a sputtering method. The formation of the offset region can be realized by introducing the above-described impurity elements after the formation of the insulating layer 275. In this case, the insulating layer 275 also functions as a mask in the same manner as the insulating layer 271 and the like. Therefore, impurity elements are not introduced into the region overlapping with the insulating layer 275 of the oxide 230b, and the electrical resistivity of this region can be increased as a whole. Also, the transistor 200D has an insulating layer 275 on the side surfaces of the insulating layer 270, the conductor 260, the metal oxide 252, the insulator 250, and the oxide 230c. The insulating layer 275 is preferably an insulator with a low relative permittivity. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, silicon oxide with pores, resin, etc. are preferable. In particular, it is preferable to use silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide with pores for the insulating layer 275 because an excess oxygen region can be easily formed in the insulating layer 275 in a subsequent process. Also, silicon oxide and silicon oxynitride are preferable because they are thermally stable. Also, the insulating layer 275 preferably has a function of diffusing oxygen.

[0308] Also, the transistor 200D has an insulator 274 on the insulating layer 275 and the oxide 230. The insulator 274 is preferably formed by a sputtering method. The formation of the offset region can be realized by introducing the above-described impurity elements after the formation of the insulating layer 275. In this case, the insulating layer 275 also functions as a mask in the same manner as the insulating layer 271 and the like. Therefore, impurity elements are not introduced into the region overlapping with the insulating layer 275 of the oxide 230b, and the electrical resistivity of this region can be increased as a whole. By using the ring method, it is possible to form an insulator with few impurities such as water and hydrogen. For example, aluminum oxide may be used as the insulator 274.

[0309] Note that the oxide film formed by the sputtering method may extract hydrogen from the structure to be coated. Therefore, by the insulator 274 absorbing hydrogen and water from the oxide 230 and the insulating layer 275, the hydrogen concentration of the oxide 230 and the insulating layer 275 can be reduced.

[0310] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments, examples, etc.

[0311] (Embodiment 3) In this embodiment, one form of the semiconductor device will be described with reference to FIGS. 16 and 17.

[0312] [Memory device 1] An example of a semiconductor device (memory device) using a capacitive element which is one aspect of the present invention is shown in FIG. 16. In a semiconductor device according to one aspect of the present invention, the transistor 200 is provided above the transistor 300, and the capacitive element 100 is provided above the transistor 300 and the transistor 200. Note that, as the transistor 200, the transistor 200 described in the previous embodiment can be used.

[0313] In addition, each conductor constituting the transistor 200 is preferably electrically connected to the diode element described in the previous embodiment or a transistor that functions as a capacitive element. Although only the diode 10s is typically shown in FIGS. 16 and 17, the present structure is not limited thereto. Depending on the required performance of the semiconductor device, the configurations described in the previous embodiments are used. ​​​​ It may be appropriately designed.

[0314] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the transistor 200 has a small off-current, it can be used in a memory device to retain the stored content for a long time. That is, since a refresh operation is not required or the frequency of the refresh operation is extremely low, the power consumption of the memory device can be sufficiently reduced.

[0315] In the semiconductor device shown in FIG. 16, the wiring 1001 is electrically connected to the source of the transistor 300, and the wiring 1002 is electrically connected to the drain of the transistor 300. Also, the wiring 1003 is electrically connected to either the source or the drain of the transistor 200, the wiring 1004 is electrically connected to the first gate of the transistor 200, and the wiring 10 06 is electrically connected to the second gate of the transistor 200. Then, the gate of the transistor 300 and the other of the source or the drain of the transistor 200 are electrically connected to one of the electrodes of the capacitor element 100, and the wiring 1005 is electrically connected to the other of the electrodes of the capacitor element 100.

[0316] Also, the memory device shown in FIG. 16 can form a memory cell array by being arranged in a matrix.

[0317] <Transistor 300> The transistor 300 is provided on a substrate 311, and includes a conductor 31 6 that functions as a gate electrode, an insulator 315 that functions as a gate insulator, and a semiconductor region 3 formed of a part of the substrate 311. 13. and a low-resistance region 314a that functions as a source region or a drain region, and has a low-resistance region 314b. The transistor 300 may be either p-channel type or n-channel type.

[0318] Here, in the transistor 300 shown in FIG. 16, a semiconductor region 313 (a part of the base plate 311) in which a channel is formed has a convex shape. Also, a conductor 316 is provided so as to cover the side surface and the upper surface of the semiconductor region 313 via an insulator 315. Note that the conductor 316 may be made of a material that adjusts the work function. Such a transistor 300 is also called a FIN-type transistor because it utilizes a convex portion of the semiconductor substrate. Note that an insulator that functions as a mask for forming the convex portion may be in contact with the upper portion of the convex portion. Also, although the case where a convex portion is formed by processing a part of the semiconductor substrate is shown here, an SOI substrate may be processed to form

[0319] a semiconductor film having a convex shape. Note that the transistor 300 shown in FIG. 16 is an example and is not limited to its structure, and an

[0320] appropriate transistor may be used according to the circuit configuration and the driving method. <Capacitor element 100> The capacitor element 100 is provided above the transistor 200. The capacitor element 100 includes a

[0321] conductor 110 that functions as a first electrode, a conductor 120 that functions as a second electrode, and an insulator 130 that functions as a dielectric. Also, for example, a conductor 112 provided on the conductor 246 and the conductor 110 can be formed It has the function of a plug that is electrically connected to the transistor 300 or a wiring.

[0322] In FIG. 16, the conductor 112 and the conductor 110 are shown as single-layer structures, but the present invention is not limited to this configuration, and a laminated structure of two or more layers may be used. For example, a conductor having a barrier property and a conductor having high conductivity may have a conductor having a barrier property and a conductor having high adhesiveness to the conductor having high conductivity formed therebetween. It is not limited thereto, and a laminated structure of two or more layers may be used. For example, between a conductor having a barrier property and a conductor having high conductivity, a conductor having a barrier property and a conductor having high adhesiveness to the conductor having high conductivity may be formed. It is not limited thereto, and a laminated structure of two or more layers may be used. For example, between a conductor having a barrier property and a conductor having high conductivity, a conductor having a barrier property and a conductor having high adhesiveness to the conductor having high conductivity may be formed. It is not limited thereto, and a laminated structure of two or more layers may be used. For example, between a conductor having a barrier property and a conductor having high conductivity, a conductor having a barrier property and a conductor having high adhesiveness to the conductor having high conductivity may be formed.

[0323] Further, the insulator 130 may be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, etc., and can be provided in a laminated or single-layer form. Further, the insulator 130 may be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, etc., and can be provided in a laminated or single-layer form. Further, the insulator 130 may be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, etc., and can be provided in a laminated or single-layer form. Further, the insulator 130 may be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride, etc., and can be provided in a laminated or single-layer form.

[0324] For example, it is preferable to use a laminated structure of a material having a large dielectric breakdown strength such as silicon oxynitride and a high dielectric constant (high-k) material for the insulator 130. With this configuration, the capacitor element 100 can secure a sufficient capacitance by having a high dielectric constant (high-k) insulator, and can improve the dielectric breakdown strength and suppress the electrostatic breakdown of the capacitor element 100 by having an insulator having a large dielectric breakdown strength. For example, it is preferable to use a laminated structure of a material having a large dielectric breakdown strength such as silicon oxynitride and a high dielectric constant (high-k) material for the insulator 130. With this configuration, the capacitor element 100 can secure a sufficient capacitance by having a high dielectric constant (high-k) insulator, and can improve the dielectric breakdown strength and suppress the electrostatic breakdown of the capacitor element 100 by having an insulator having a large dielectric breakdown strength. For example, it is preferable to use a laminated structure of a material having a large dielectric breakdown strength such as silicon oxynitride and a high dielectric constant (high-k) material for the insulator 130. With this configuration, the capacitor element 100 can secure a sufficient capacitance by having a high dielectric constant (high-k) insulator, and can improve the dielectric breakdown strength and suppress the electrostatic breakdown of the capacitor element 100 by having an insulator having a large dielectric breakdown strength. For example, it is preferable to use a laminated structure of a material having a large dielectric breakdown strength such as silicon oxynitride and a high dielectric constant (high-k) material for the insulator 130. With this configuration, the capacitor element 100 can secure a sufficient capacitance by having a high dielectric constant (high-k) insulator, and can improve the dielectric breakdown strength and suppress the electrostatic breakdown of the capacitor element 100 by having an insulator having a large dielectric breakdown strength. For example, it is preferable to use a laminated structure of a material having a large dielectric breakdown strength such as silicon oxynitride and a high dielectric constant (high-k) material for the insulator 130. With this configuration, the capacitor element 100 can secure a sufficient capacitance by having a high dielectric constant (high-k) insulator, and can improve the dielectric breakdown strength and suppress the electrostatic breakdown of the capacitor element 100 by having an insulator having a large dielectric breakdown strength.

[0325] Note that examples of the insulator of the high dielectric constant (high-k) material (material having a high relative dielectric constant) include lithium oxide, hafnium oxide, zirconium oxide, oxide having aluminum and hafnium, oxynitride having aluminum and hafnium, oxide having silicon and hafnium, oxynitride having silicon and hafnium, or silicon and hafnium. Note that examples of the insulator of the high dielectric constant (high-k) material (material having a high relative dielectric constant) include lithium oxide, hafnium oxide, zirconium oxide, oxide having aluminum and hafnium, oxynitride having aluminum and hafnium, oxide having silicon and hafnium, oxynitride having silicon and hafnium, or silicon and hafnium. Note that examples of the insulator of the high dielectric constant (high-k) material (material having a high relative dielectric constant) include lithium oxide, hafnium oxide, zirconium oxide, oxide having aluminum and hafnium, oxynitride having aluminum and hafnium, oxide having silicon and hafnium, oxynitride having silicon and hafnium, or silicon and hafnium. Note that examples of the insulator of the high dielectric constant (high-k) material (material having a high relative dielectric constant) include lithium oxide, hafnium oxide, zirconium oxide, oxide having aluminum and hafnium, oxynitride having aluminum and hafnium, oxide having silicon and hafnium, oxynitride having silicon and hafnium, or silicon and hafnium. There are nitrides having niobium and the like.

[0326] On the other hand, materials with high dielectric breakdown strength (materials with low relative permittivity) include silicon oxide, silicon oxynitride, oxynitride silicon, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with pores, or resin and the like.

[0327] <Wiring layer> A wiring layer provided with an interlayer film, wiring, plugs, etc. may be provided between each structure. Also, multiple wiring layers can be provided according to the design. Here, when a conductor having the function of a plug or wiring is given the same reference numeral for a plurality of structures, there is a case. Also, in this specification and the like, the wiring and the plug electrically connected to the wiring may be an integral body. That is, a part of the conductor may function as wiring, and a part of the conductor may function as a plug.

[0328] For example, on the transistor 300, as an interlayer film, insulators 320, 322, 324, and 326 are sequentially stacked and provided. Also, conductors 328 and 330 that are electrically connected to the capacitor element 100 or the transistor 200 are embedded in the insulators 320, 322, 324, and 326. Note that the conductors 328 and 330 function as plugs or wiring.

[0329] Also, the insulator functioning as an interlayer film may function as a planarization film covering the uneven shape below it. For example, the upper surface of the insulator 322 is chemically mechanically polished (CMP) to enhance flatness. The surface may be planarized by a planarization process using a MP method or the like.

[0330] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. An insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring.

[0331] Similarly, the insulators 210, 212, 214, and 216 are made of conductive materials. 218, and the conductor (conductor 205) that constitutes the transistor 200 are embedded. Note that the conductor 218 is electrically connected to the capacitor 100 or the transistor 300. Furthermore, the conductor 120 and the insulator 1 An insulator 150 is provided on the substrate 30 .

[0332] Insulators that can be used as the interlayer film include oxides, nitrides, and oxides having insulating properties. These include nitrides, nitride oxides, metal oxides, metal oxide nitrides, and metal nitride oxides.

[0333] For example, by using a material with a low dielectric constant for the insulator that functions as an interlayer film, Therefore, the material should be selected according to the function of the insulator. It is best to choose

[0334] For example, the insulators 216, 212, 352, and 354 may include dielectric It is preferable to have an insulator with a low refractive index. For example, the insulator may be silicon oxide, oxynitride, or the like. silicon dioxide, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, carbon Preferably, it has added silicon oxide, silicon oxide added with carbon and nitrogen, silicon oxide having pores, or resin. Or, the insulator preferably has a laminated structure of silicon oxide, silicon oxynitride, silicon nitride oxynitride, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, or silicon oxide having pores, and resin. Since silicon oxide and silicon oxynitride are thermally stable, a laminated structure that is thermally stable and has a low dielectric constant can be obtained by combining them with resin. Examples of the resin include polyester, polyolefin, polyamide (such as nylon and aramid), polyimide, polycarbonate, and acrylic.

[0335] In addition, a transistor using an oxide semiconductor can have its electrical characteristics stabilized by surrounding it with an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen. Therefore, for the insulator 210, the insulator 350, etc., an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen may be used.

[0336] As the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum may be used in a single layer or in a laminate. Specifically, as the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen, ​​​​​​​​​​​​​​​Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide aluminum, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tantalum oxide Metal oxides such as silicon dioxide, silicon nitride oxide, silicon nitride, etc. can be used.

[0337] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, and gold. , platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Smoke, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium Materials containing one or more metal elements selected from the group consisting of ammonium, phosphate, and phosphates can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements, Silicides such as nickel silicide may also be used.

[0338] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 11 2, etc., include metal materials, alloy materials, metal nitride materials, or gold materials formed from the above materials. Conductive materials such as metal oxide materials can be used in single or multilayer configurations. It is preferable to use a high melting point material such as tungsten or molybdenum, which has both excellent thermal conductivity and excellent thermal conductivity. Alternatively, low-resistance conductive materials such as aluminum and copper may be used. It is preferable to form the wiring by using a low-resistance conductive material. Cut.

[0339] <<Wiring or plug in a layer provided with an oxide semiconductor>> When an oxide semiconductor is used for the transistor 200, excess oxide is present near the oxide semiconductor. An insulator having a pristine region may be provided. In that case, an insulator having a barrier property is provided between the insulator having the excess oxygen region and the conductor provided on the insulator having the excess oxygen region. It is preferable to do so.

[0340] For example, in FIG. 16, the insulator 224 and the transistor 200 can be structured to be encapsulated by the insulator 222 having a barrier property, the insulator 254, and the insulator 274. Also, the insulator 276c is in contact with a part of the conductor 246c and the insulator 280, and can suppress the diffusion of impurities such as water or hydrogen and oxygen in the insulator 280 into the conductor 246c. That is, by providing the insulator 276c, it is possible to suppress the absorption of the excess oxygen in the insulator 280 by the conductor 246c. Also, by having the insulator 276c, it is possible to suppress the diffusion of hydrogen, which is an impurity, into the transistor 200 through the conductor 246c.

[0341] Specifically, by providing the insulator 276c, it is possible to suppress the absorption of the excess oxygen in the insulator 280 by the conductor 246c. Also, by having the insulator 276c, it is possible to suppress the diffusion of hydrogen, which is an impurity, into the transistor 200 through the conductor 246c.

[0342] As the insulator 276c, an insulating material having a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen may be used. For example, it is preferable to use aluminum oxide or hafnium oxide. Also, in addition, for example, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon oxynitride, or silicon nitride can be used.

[0343] The above is the description of the configuration example. By using this configuration, a transistor having an oxide semiconductor ​​​​​​​In a semiconductor device using a transistor, fluctuations in electrical characteristics can be suppressed and reliability can be improved. Alternatively, a transistor having an oxide semiconductor with a large on-current can be provided. Alternatively, a transistor having an oxide semiconductor with a small off-current can be provided. Alternatively, a semiconductor device with reduced power consumption can be provided. .

[0344] [Memory device 2] An example of a memory device using the semiconductor device according to one aspect of the present invention is shown in FIG. 17. The memory device shown in FIG. 17 has, in addition to the semiconductor device having the transistor 200, the transistor 300, and the capacitor element 100 shown in FIG. 16, a transistor 400.

[0345] The transistor 400 can control the second gate voltage of the transistor 200. For example, the first gate and the second gate of the transistor 400 are diode-connected to the source, and the source of the transistor 400 is connected to the second gate of the transistor 200. When the negative potential of the second gate of the transistor 200 is held in this configuration, the voltage between the first gate and the source of the transistor 400 and the voltage between the second gate and the source of the transistor 400 become 0V. In the transistor 400, since the drain current when the second gate voltage and the first gate voltage are 0V is very small, the negative potential of the second gate of the transistor 200 can be maintained for a long time even without supplying power to the transistor 200 and the transistor 400. Thereby, the memory device having the transistor 200 and the transistor 400 can hold the stored content for a long time.

[0346] Therefore, in FIG. 17, wiring 1001 is electrically connected to the source of transistor 300, and wiring 1002 is electrically connected to the drain of transistor 300. Also, wiring 1003 is electrically connected to one of the source or drain of transistor 200, wiring 1004 is electrically connected to the gate of transistor 200, and wiring 1006 is electrically connected to the back gate of transistor 200. Then, the gate of transistor 300, and the other of the source or drain of transistor 200 are electrically connected to one of the electrodes of capacitor element 100, and wiring 1005 is electrically connected to the other of the electrodes of capacitor element 100. Wiring 1007 is electrically connected to the source of transistor 400, wiring 1 008 is electrically connected to the gate of transistor 400, wiring 1009 is electrically connected to the back gate of transistor 400, and wiring 1010 is electrically connected to the drain of transistor 400. Here, wiring 1006, wiring 1007, wiring 1008, and wiring 1009 are electrically connected.

[0347] Also, the memory device shown in FIG. 17 can be configured to form a memory cell array by being arranged in a matrix shape, similar to the memory device shown in FIG. 16. Note that one transistor 400 can control the second gate voltages of a plurality of transistors 200. Therefore, it is preferable to provide a smaller number of transistors 400 than transistors 200.

[0348] <Transistor 400> Transistor 400 is a transistor formed in the same layer as transistor 200 and can be fabricated in parallel. Transistor 400 has a first gate electrode as A conductor 460 that functions, conductors 405a and 405b that function as a second gate electrode, insulators 222, 224, and 450 that function as a gate insulating layer, an oxide 430c having a region where a channel is formed, conductors 442a, an oxide 432b, and an oxide 432a that function as one of a source or a drain, conductors 442b, an oxide 431b, and an oxide 431a that function as the other of the source or the drain, and a conductor 446 (conductors 446a and 446b).

[0349] In the transistor 400, the conductor 405 is in the same layer as the conductor 205. The oxides 431a and 432a are in the same layer as the oxide 230a, and the oxides 431b and 432b are in the same layer as the oxide 230b. The conductor 442 is in the same layer as the conductor 242. The oxide 430c is in the same layer as the oxide 230c. The insulator 450 is in the same layer as the insulator 250. The conductor 460 is in the same layer as the conductor 260.

[0350] Note that structures formed in the same layer can be formed simultaneously. For example, the oxide 430c can be formed by processing an oxide film that becomes the oxide 230c.

[0351] The oxide 430c that functions as the active layer of the transistor 400 has reduced oxygen deficiency and reduced impurities such as hydrogen or water, similar to the oxide 230 and the like. As a result, the threshold voltage of the transistor 400 is made greater than 0 V, the off-current is reduced, and the second gate ​​​​​​​​​​​​​​The drain current can be made very small when the voltage and the first gate voltage are 0V. .

[0352] <<Dicing line>> Hereinafter, a dicing line (sometimes called a scribe line, a dividing line, or a cutting line) provided when a large-area substrate is divided into individual semiconductor elements to take out a plurality of semiconductor devices in a chip shape will be described. As a dividing method, for example, first, a groove (dicing line) for dividing the semiconductor elements is formed in the substrate, and then cutting is performed at the dicing line to divide (split) the substrate into a plurality of semiconductor devices. Here, for example, as shown in FIG. 17, it is preferable to design the region where the insulator 274 and the insulator 215 are in contact to be the dicing line. That is, after openings are provided in the insulator 222 and the insulator 216 in the vicinity of the region that becomes the dicing line provided at the outer edge of the memory cell having a plurality of transistors 2 00 and the transistor 400, the insulator 274 may be formed. That is, at the openings provided in the insulator 223 and the insulator 216, the insulator 214 and

[0353] the insulator 274 are in contact. For example, at this time, the insulator 215 and the insulator 274 may be formed using the same material and the same method. By providing the insulator 215 and the insulator 274 with the same material and the same method, the adhesion can be enhanced. For example, it is preferable to use silicon nitride. and the same method. That is, at the openings provided in the insulator 223 and the insulator 216, the insulator 214 and

[0354] the insulator 274 are in contact. For example, at this time, the insulator 215 and the insulator 274 may be formed using the same material and the same method. By providing the insulator 215 and the insulator 274 with the same material and the same method, the adhesion can be enhanced. For example, it is preferable to use silicon nitride. and the same method, the adhesion can be enhanced. For example, it is preferable to use silicon nitride. is used.

[0355] With this structure, the insulator 215 and the insulator 274 insulate the insulator 224 and the transistor 2 00 and can enclose the transistor 400. The insulator 215 and the insulator 274 have the function of suppressing the diffusion of oxygen, hydrogen, and water. Therefore, for each circuit region where the semiconductor element shown in this embodiment is formed, by dividing the substrate, even if it is processed into a plurality of chips it is possible to prevent impurities such as hydrogen or water from mixing in from the side direction of the divided substrate and diffusing into the transistor 200 and the transistor 400.

[0356] Also, due to this structure, it is possible to prevent the excess oxygen in the insulator 224 from diffusing to the outside of the insulator 274 and the insulator 215. Therefore, the excess oxygen in the insulator 224 is efficiently supplied to the oxide in which the channel is formed in the transistor 200 or the transistor 400. By this oxygen, it is possible to reduce the oxygen deficiency of the oxide in which the channel is formed in the transistor 200 or the transistor 400. As a result, the oxide in which the channel is formed in the transistor 200 or the transistor 400 can be made into an oxide semiconductor having stable characteristics with a low defect level density. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 or the transistor 400 and improve the reliability. This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and examples.

[0357]

[0358] (Embodiment 4) In this embodiment, using FIGS. 18 and 19, a transistor using an oxide as a semiconductor (hereinafter sometimes referred to as an OS transistor) according to one aspect of the present invention, and a capacitor element This section explains a storage device to which the OS is applied (hereinafter, sometimes referred to as an OS memory device). The OS memory device includes at least a capacitance element and an OS transistor that controls the charging and discharging of the capacitance element. Since the off-state current of the OS transistor is extremely small, The memory device has excellent retention characteristics and can function as a non-volatile memory.

[0359] <Storage device configuration example> FIG. 18A shows an example of the configuration of an OS memory device. The memory device 1400 includes a peripheral circuit 14 11, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 1420 , column circuitry 1430, output circuitry 1440, and control logic circuitry 1460. do.

[0360] The column circuitry 1430 includes, for example, a column decoder, a precharge circuit, a sense amplifier, a write circuit, and The precharge circuit has the function of precharging the wiring. The amplifier has the function of amplifying the data signal read from the memory cell. are wirings connected to memory cells in the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal RDAT A is output to the outside of the memory device 1400. The memory cell has a decoder, a word line driver circuit, etc., and can select a row to be accessed.

[0361] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 141 1, and a high power supply voltage (VIL) for the memory cell array 1470. The memory device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The address signal ADDR is input to the row decoder and the column decoder, and WDATA is input to the writing circuit. The control logic circuit 1460 processes the input signals (CE, WE, RE) from the outside and generates control signals for the row decoder and the column decoder. CE is the chip enable signal, WE is the write enable signal, and RE is the read enable signal.

[0362] The signals processed by the control logic circuit 1460 are not limited to this, and other control signals may be input as necessary. The memory cell array 1470 has a plurality of memory cells MC arranged in a matrix and a plurality of wirings. The number of wirings connecting the memory cell array 1470 and the row circuit 1420 is determined by the configuration of the memory cell MC, the number of memory cells MC in a column, etc. Also, the number of wirings connecting the memory cell array 1470 and the column circuit 1430 is determined by the configuration of the memory cell MC, the number of memory cells MC in a row, etc.

[0363]

[0364] <00,02679>

[0365] In FIG. 18(A), an example in which the peripheral circuit 1411 and the memory cell array 1470 are formed on the same plane is shown, but the present embodiment is not limited to this. For example, as shown in FIG. 18(B), the memory cell array 1470 may be provided so as to overlap a part of the peripheral circuit 1411. For example, a configuration in which a sense amplifier is provided so as to overlap under the memory cell array 1470 may be adopted. In FIG. 18(A), an example in which the peripheral circuit 1411 and the memory cell array 1470 are formed on the same plane is shown, but the present embodiment is not limited to this. For example, as shown in FIG. 18(B), the memory cell array 1470 may be provided so as to overlap a part of the peripheral circuit 1411. For example, a configuration in which a sense amplifier is provided so as to overlap under the memory cell array 1470 may be adopted. In FIG. 18(A), an example in which the peripheral circuit 1411 and the memory cell array 1470 are formed on the same plane is shown, but the present embodiment is not limited to this. For example, as shown in FIG. 18(B), the memory cell array 1470 may be provided so as to overlap a part of the peripheral circuit 1411. For example, a configuration in which a sense amplifier is provided so as to overlap under the memory cell array 1470 may be adopted. In FIG. 18(A), an example in which the peripheral circuit 1411 and the memory cell array 1470 are formed on the same plane is shown, but the present embodiment is not limited to this. For example, as shown in FIG. 18(B), the memory cell array 1470 may be provided so as to overlap a part of the peripheral circuit 1411. For example, a configuration in which a sense amplifier is provided so as to overlap under the memory cell array 1470 may be adopted. In FIG. 18(A), an example in which the peripheral circuit 1411 and the memory cell array 1470 are formed on the same plane is shown, but the present embodiment is not limited to this. For example, as shown in FIG. 18(B), the memory cell array 1470 may be provided so as to overlap a part of the peripheral circuit 1411. For example, a configuration in which a sense amplifier is provided so as to overlap under the memory cell array 1470 may be adopted.

[0365] A configuration example of a memory cell applicable to the above-described memory cell MC will be described with reference to FIG. 19.

[0366] [DOSRAM] Circuit configuration examples of DRAM memory cells are shown in FIGS. 19(A) to (C). In this specification and the like, a DRAM using one memory cell of a single capacitance element type per 1OS transistor may be referred to as DOSRAM. The memory cell 1471 shown in FIG. 19(A) includes a transistor M1 and a capacitance element CA. Note that the transistor M1 has a gate (which may be called a top gate in some cases) and a back gate.

[0367] The first terminal of the transistor M1 is connected to the first terminal of the capacitance element CA, the second terminal of the transistor M1 is connected to the wiring BIL, the gate of the transistor M1 is connected to the wiring WOL, and the back gate of the transistor M1 is connected to the wiring BGL. The second terminal of the capacitance element CA is connected to the wiring CAL.

[0368] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. The wiring C AL functions as a wiring for applying a predetermined potential to the second terminal of the capacitance element CA. During data writing and reading, it is preferable to apply a low-level potential to the wiring CAL. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M1 can be increased or decreased.

[0369] Also, the memory cell MC is not limited to the memory cell 1471, and the circuit configuration can be changed This can be achieved. For example, the memory cell MC can be configured such that, as in the memory cell 1472 shown in FIG. 19(B), the back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. Also, for example, the memory cell MC can be a memory cell composed of a transistor having a single gate structure, that is, a transistor M1 without a back gate, as in the memory cell 147 3 shown in FIG. 19(C).

[0370] When the semiconductor device shown in the above embodiment is used for the memory cell 1471 or the like, the transistor M 1 can be the transistor shown in the previous embodiment. By using an OS transistor as the transistor M1, the leakage current of the transistor M1 can be made very low. That is, since the written data can be held by the transistor M1 for a long time, the frequency of refreshing the memory cell can be reduced. Moreover, the refreshing operation of the memory cell can be made unnecessary. Also, since the leakage current is extremely low, multivalued data or analog data can be held for the memory cell 1471, the memory cell 1472, and the memory cell 1473.

[0371] Also, in the DOSRAM, as described above, if the sense amplifier is provided so as to overlap below the memory cell array 1470, the bit line can be shortened. As a result, the bit line capacitance becomes small, and the holding capacitance of the memory cell can be reduced.

[0372] [NOSRAM] FIGS. 19(D) to (H) show a gain cell type in which one capacitance element is provided for every two transistors. Shows a circuit configuration example of a memory cell. The memory cell 1474 shown in FIG. 19(D) has a transistor M2, a transistor M3, and a capacitive element CB. Note that the transistor M2 has a top gate (which may be simply called a gate) and a back gate. In this specification and the like, a storage device having a gain cell type memory cell using the transistor M2 as an OS transistor may be called a NOSRAM (Nonvolatile Oxide Semiconductor RAM). The first terminal of the transistor M2 is connected to the first terminal of the capacitive element CB, the second terminal of the transistor M2 is connected to the wiring WBL, the gate of the transistor M2 is connected to the wiring WOL, and the back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the capacitive element CB is connected to the wiring CAL. The first terminal of the transistor M3 is connected to the wiring RBL, the second terminal of the transistor M3 is connected to the wiring SL, and the gate of the transistor M3 is connected to the first terminal of the capacitive element CB. The wiring WBL functions as a write bit line, the wiring RBL functions as a read bit line, and the wiring WOL functions as a word line. The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CB. It is preferable to apply a low-level potential to the wiring CAL during data writing, during data holding, and during data reading. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 can be increased or decreased. In this specification and the like, a storage device having a gain cell type memory cell using the transistor M2 as an OS transistor may be called a NOSRAM (Nonvolatile Oxide Semiconductor RAM). The first terminal of the transistor M2 is connected to the first terminal of the capacitive element CB, the second terminal of the transistor M2 is connected to the wiring WBL, the gate of the transistor M2 is connected to the wiring WOL, and the back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the capacitive element CB is connected to the wiring CAL. The first terminal of the transistor M3 is connected to the wiring RBL, the second terminal of the transistor M3 is connected to the wiring SL, and the gate of the transistor M3 is connected to the first terminal of the capacitive element CB. In this specification and the like, a storage device having a gain cell type memory cell using the transistor M2 as an OS transistor may be called a NOSRAM (Nonvolatile Oxide Semiconductor RAM).

[0373] The first terminal of the transistor M2 is connected to the first terminal of the capacitive element CB, the second terminal of the transistor M2 is connected to the wiring WBL, the gate of the transistor M2 is connected to the wiring WOL, and the back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the capacitive element CB is connected to the wiring CAL. The first terminal of the transistor M3 is connected to the wiring RBL, the second terminal of the transistor M3 is connected to the wiring SL, and the gate of the transistor M3 is connected to the first terminal of the capacitive element CB. The first terminal of the transistor M2 is connected to the first terminal of the capacitive element CB, the second terminal of the transistor M2 is connected to the wiring WBL, the gate of the transistor M2 is connected to the wiring WOL, and the back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the capacitive element CB is connected to the wiring CAL. The first terminal of the transistor M3 is connected to the wiring RBL, the second terminal of the transistor M3 is connected to the wiring SL, and the gate of the transistor M3 is connected to the first terminal of the capacitive element CB. The first terminal of the transistor M2 is connected to the first terminal of the capacitive element CB, the second terminal of the transistor M2 is connected to the wiring WBL, the gate of the transistor M2 is connected to the wiring WOL, and the back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the capacitive element CB is connected to the wiring CAL. The first terminal of the transistor M3 is connected to the wiring RBL, the second terminal of the transistor M3 is connected to the wiring SL, and the gate of the transistor M3 is connected to the first terminal of the capacitive element CB. The first terminal of the transistor M2 is connected to the first terminal of the capacitive element CB, the second terminal of the transistor M2 is connected to the wiring WBL, the gate of the transistor M2 is connected to the wiring WOL, and the back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the capacitive element CB is connected to the wiring CAL. The first terminal of the transistor M3 is connected to the wiring RBL, the second terminal of the transistor M3 is connected to the wiring SL, and the gate of the transistor M3 is connected to the first terminal of the capacitive element CB. The first terminal of the transistor M2 is connected to the first terminal of the capacitive element CB, the second terminal of the transistor M2 is connected to the wiring WBL, the gate of the transistor M2 is connected to the wiring WOL, and the back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the capacitive element CB is connected to the wiring CAL. The first terminal of the transistor M3 is connected to the wiring RBL, the second terminal of the transistor M3 is connected to the wiring SL, and the gate of the transistor M3 is connected to the first terminal of the capacitive element CB. The first terminal of the transistor M2 is connected to the first terminal of the capacitive element CB, the second terminal of the transistor M2 is connected to the wiring WBL, the gate of the transistor M2 is connected to the wiring WOL, and the back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the capacitive element CB is connected to the wiring CAL. The first terminal of the transistor M3 is connected to the wiring RBL, the second terminal of the transistor M3 is connected to the wiring SL, and the gate of the transistor M3 is connected to the first terminal of the capacitive element CB.

[0374] The wiring WBL functions as a write bit line, the wiring RBL functions as a read bit line, and the wiring WOL functions as a word line. The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CB. It is preferable to apply a low-level potential to the wiring CAL during data writing, during data holding, and during data reading. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 can be increased or decreased. The wiring WBL functions as a write bit line, the wiring RBL functions as a read bit line, and the wiring WOL functions as a word line. The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CB. It is preferable to apply a low-level potential to the wiring CAL during data writing, during data holding, and during data reading. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 can be increased or decreased. The wiring WBL functions as a write bit line, the wiring RBL functions as a read bit line, and the wiring WOL functions as a word line. The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CB. It is preferable to apply a low-level potential to the wiring CAL during data writing, during data holding, and during data reading. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 can be increased or decreased. The wiring WBL functions as a write bit line, the wiring RBL functions as a read bit line, and the wiring WOL functions as a word line. The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CB. It is preferable to apply a low-level potential to the wiring CAL during data writing, during data holding, and during data reading. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 can be increased or decreased. The wiring WBL functions as a write bit line, the wiring RBL functions as a read bit line, and the wiring WOL functions as a word line. The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CB. It is preferable to apply a low-level potential to the wiring CAL during data writing, during data holding, and during data reading. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 can be increased or decreased. The wiring WBL functions as a write bit line, the wiring RBL functions as a read bit line, and the wiring WOL functions as a word line. The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CB. It is preferable to apply a low-level potential to the wiring CAL during data writing, during data holding, and during data reading. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 can be increased or decreased. The wiring WBL functions as a write bit line, the wiring RBL functions as a read bit line, and the wiring WOL functions as a word line. The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CB. It is preferable to apply a low-level potential to the wiring CAL during data writing, during data holding, and during data reading. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 can be increased or decreased.

[0375] Further, the memory cell MC is not limited to the memory cell 1474, and the circuit configuration can be appropriately changed. For example, the memory cell MC may be configured such that the back gate of the transistor M2 is connected to the wiring WOL instead of the wiring BGL, as in the memory cell 1475 shown in FIG. 19(E). Further, for example, the memory cell MC may be a memory cell composed of a single-gate structure transistor, that is, a transistor M2 without a back gate, such as the memory cell 1476 shown in FIG. 19(F). Further, for example, the memory cell MC may have a configuration in which the wiring WBL and the wiring RBL are combined into a single wiring BIL, as in the memory cell 1477 shown in FIG. 19(G).

[0376] When the semiconductor device shown in the above embodiment is used for the memory cell 1474 or the like, the transistor shown in the previous embodiment can be used as the transistor M2. By using an OS transistor as the transistor M2, the leakage current of the transistor M2 can be made very low. As a result, the written data can be held by the transistor M2 for a long time, so that the refresh frequency of the memory cell can be reduced. In addition, the refresh operation of the memory cell can be made unnecessary. Also, since the leakage current is very low, the memory cell 1474 can hold multi-valued data or analog data. The same applies to the memory cells 1475 to 1477.

[0377] Note that the transistor M3 may be a transistor having silicon in the channel formation region (hereinafter sometimes referred to as an Si transistor). The conductivity type of the Si transistor may be n. It may be of the channel type or the p-channel type. The Si transistor may have a higher field-effect mobility than the OS transistor. Therefore, an Si transistor may be used as the transistor M3 that functions as a read transistor. Also, by using an Si transistor for the transistor M3, the transistor M2 can be provided laminated on the transistor M3, so that the occupied area of the memory cell can be reduced and high integration of the storage device can be achieved. Moreover, the transistor M3 may be an OS transistor. When OS transistors are used for the transistor M2 and the transistor M3, the memory cell array 1470 can be configured with only n-type transistors.

[0378] Also, FIG. 19(H) shows an example of a gain cell type memory cell with one capacitor element per three transistors. The memory cell 1478 shown in FIG. 19(H) includes transistors M4 to M6 and a capacitor element CC. The capacitor element CC is provided as appropriate. The memory cell 1478 is electrically connected to wiring BIL, wiring RWL, wiring WWL, wiring BGL, and wiring GNDL. Wiring GNDL is a wiring that provides a low-level potential. Note that the memory cell 1478 may be electrically connected to wiring RBL and wiring WBL instead of wiring BIL.

[0379]

[0380] The transistor M4 is an OS transistor having a back gate, and the back gate is electrically connected to the wiring BGL. Note that the back gate and the gate of the transistor M4 They may be electrically connected to each other. Alternatively, the transistor M4 may not have a back gate.

[0381] Note that the transistor M5 and the transistor M6 may each be an n-channel type Si transistor or a p-channel type Si transistor. Alternatively, the transistors M4 to M6 may be OS transistors. In this case, the memory cell array 1470 can be configured with only n-type transistors.

[0382] When the semiconductor device shown in the above embodiment is used for the memory cell 1478, the transistor shown in the previous embodiment can be used as the transistor M4. By using an OS transistor as the transistor M4, the leakage current of the transistor M4 can be made very low.

[0383] Note that the configurations of the peripheral circuit 1411, the memory cell array 1470, etc. shown in this embodiment are not limited to the above. The arrangements or functions of these circuits, the wirings connected to the circuits, circuit elements, etc. may be changed, deleted, or added as necessary.

[0384] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments, examples, etc.

[0385] (Embodiment 5) In this embodiment, an example of the chip 1200 on which the semiconductor device of the present invention is mounted is shown using FIG. 20. A plurality of circuits (systems) are mounted on the chip 1200. In this way, the technology of integrating a plurality of circuits (systems) on one chip is called system-on-chip (S ​​​​​​​​​Sometimes it is called a System on Chip: SoC).

[0386] As shown in FIG. 20(A), chip 1200 includes a CPU (Central Processing Unit) 1211, a GPU (Graphics Processing U nit) 1212, one or more analog arithmetic units 1213, one or more memory con trollers 1214, one or more interfaces 1215, one or more network circuits 1216, etc.

[0387] Bumps (not shown) are provided on chip 1200 and, as shown in FIG. 20(B), are connected to the first surface of a printed circuit board (PCB) 1201. Also, a plurality of bumps 1202 are provided on the back surface of the first surface of PCB 1201 and are connected to a motherboard 1203.

[0388] The motherboard 1203 may be provided with storage devices such as a DRAM 1221 and a flash memory 1222. For example, the DOSRAM shown in the previous embodiment can be used for the DRAM 1221. Also, for example, the NOSRAM shown in the previous embodiment can be used for the flash memory 1222.

[0389] The CPU 1211 preferably has a plurality of CPU cores. Also, the GPU 1212 preferably has a plurality of GPU cores. Also, the CPU 1211 and the GPU 12 12 may each have a memory for temporarily storing data. Alternatively, a memory common to the CPU 1211 and the GPU 1212 may be provided on the chip 1200. ​​​​​Good. For the memory, the aforementioned NOSRAM or DOSRAM can be used. Also, the GPU 1212 is suitable for parallel calculation of a large number of data and can be used for image processing and multiplication-accumulation operations. By providing an image processing circuit or a multiplication-accumulation circuit using the oxide semiconductor of the present invention in the GPU 1212, image processing and multiplication-accumulation operations can be executed with low power consumption.

[0390] In addition, since the CPU 1211 and the GPU 1212 are provided on the same chip, the wiring between the CPU 1211 and the GPU 1212 can be shortened, and data transfer from the CPU 1211 to the GPU 1212, data transfer between the memories of the CPU 1211 and the GPU 1212, and after the operation in the GPU 1212, the transfer of the operation result from the GPU 1212 to the CPU 1211 can be performed at high speed.

[0391] The analog operation unit 1213 has one or both of an A / D (analog / digital) conversion circuit and a D / A (digital / analog) conversion circuit. Also, the above multiplication-accumulation circuit may be provided in the analog operation unit 1213.

[0392] The memory controller 1214 has a circuit that functions as a controller for the DRAM 1221 and a circuit that functions as an interface for the flash memory 1222.

[0393] The interface 1215 has an interface circuit with external connection devices such as a display device, a speaker, a microphone, a camera, and a controller. The controller includes a mouse, a keyboard, a game controller, etc. Such an interface , USB (Universal Serial Bus), HDMI (registered trademark) (Hi gh-Definition Multimedia Interface), etc. can be used. It is possible.

[0394] The network circuit 1216 has a network circuit such as a LAN (Local Area Network). Also, it may have a circuit for network security. It is possible to form the above circuit (system) in the same manufacturing process on the chip 1200. Therefore, even if the number of circuits required for the chip 1200 increases, there is no need to increase the manufacturing process, and the chip 1200 can be manufactured at low cost. .

[0395] The PCB 1201 provided with the chip 1200 having the GPU 1212, the DRAM 1221 , and the motherboard 1203 provided with the flash memory 1222 can be called a GPU module 1204.

[0396] Since the GPU module 1204 has the chip 1200 using SoC technology, its size can be reduced. Also, because it is excellent in image processing, it is suitable for use in portable electronic devices such as smartphones, tablet terminals, laptop PCs, and portable (not stationary) game consoles. Also, by the multiplication-accumulation operation circuit using the GPU 1212, deep neural network (DNN), convolutional neural network (CNN), recurrent neural network (RNN), autoencoder, deep Boltzmann

[0397] machine (DBM), deep belief network (DBN), etc. can be executed. Since the GPU module 1204 has the chip 1200 using SoC technology, its size can be reduced. Also, because it is excellent in image processing, it is suitable for use in portable electronic devices such as smartphones, tablet terminals, laptop PCs, and portable (not stationary) game consoles. Also, by the multiplication-accumulation operation circuit using the GPU 1212, deep neural network (DNN), convolutional neural network (CNN), recurrent neural network (RNN), autoencoder, deep Boltzmann machine (DBM), deep belief network (DBN), etc. can be executed. (CNN), recurrent neural network (RNN), autoencoder, deep Boltzmann machine (DBM), deep belief network (DBN), etc. can be executed. Therefore, the chip 1200 can be used as an AI chip, or the GPU module 1204 can be used as an AI system module.

[0398] The configuration shown in this embodiment can be appropriately combined with the configurations shown in other embodiments, examples, etc. and used.

[0399] (Embodiment 6) In this embodiment, an application example of a storage device using the semiconductor device shown in the previous embodiment will be described. The semiconductor device shown in the previous embodiment can be applied to storage devices of various electronic devices (for example, information terminals such as computers, smartphones, e-book terminals, digital cameras (including video cameras), recording and playback devices, navigation systems, etc.). Note that here a computer includes not only tablet-type computers, notebook-type computers, desktop-type computers, but also large-scale computers such as server systems . Alternatively, the semiconductor device shown in the previous embodiment can be applied to various removable storage devices such as memory cards (for example, SD cards), USB memories, and SSDs (solid state drives). Some configuration examples of removable storage devices are schematically shown in FIG. 21 . For example, the semiconductor device shown in the previous embodiment is processed into a packaged memory chip and used in various storage devices and removable memories.

[0400] FIG. 21(A) is a schematic diagram of a USB memory. The USB memory 1100 has a housing 1101, a cap 1102, a USB connector 1103, and a substrate 1104. The substrate 1104 is housed in the housing 1101. For example, a memory chip 1105 is provided on the substrate 1104 , a controller chip 1106 is attached. A semiconductor device shown in the previous embodiment can be incorporated into the memory chips 11 05 and the like on the substrate 1104.

[0401] FIG. 21(B) is a schematic diagram of the appearance of an SD card, and FIG. 21(C) is a schematic diagram of the internal structure of the SD card. The SD card 1110 has a housing 1111, a connector 1112, and a substrate 1113. The substrate 1113 is housed in the housing 1111. For example, a memory chip 1114 and a controller chip 1115 are attached to the substrate 111 3. By providing a memory chip 1114 also on the back side of the substrate 1113, the capacity of the SD card 1110 can be increased. Further, a wireless chip having a wireless communication function may be provided on the substrate 1113 . Thereby, data of the memory chip 1114 can be read and written by wireless communication between the host device and the SD card 1110. A semiconductor device shown in the previous embodiment can be incorporated into the memory chip 1114 on the substrate 1113 and the like.

[0402] FIG. 21(D) is a schematic diagram of the appearance of an SSD, and FIG. 21(E) is a schematic diagram of the internal structure of the SSD . The SSD 1150 has a housing 1151, a connector 1152, and a substrate 1153 . The substrate 1153 is housed in the housing 1151. For example, a memory chip 1154, a memory chip 1155, and a controller chip 1156 are attached to the substrate 1153 . The memory chip 1155 is a work memory of the controller chip 1156, and for example, a DOSRAM chip may be used. By providing a memory chip 1154 also on the back side of the substrate 1153, the capacity of the SSD 1150 can be increased. The memory on the substrate 1153 The semiconductor device shown in the previous embodiments can be incorporated into the chip 1154 or the like.

[0403] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments, examples, etc. It is possible.

[0404] (Embodiment 7) In this embodiment, as an example of a semiconductor device using the transistor disclosed in this specification and the like, a display device and a display module will be described.

[0405] Also, the transistor using an oxide semiconductor described with reference to the transistor 200 or the like may sometimes be referred to as an OS transistor hereinafter. It is also sometimes called an OS transistor hereinafter.

[0406] <Display device> An example of a display device using the above-described transistor will be described. FIG. 22(A) is a block diagram for explaining a configuration example of the display device 500.

[0407] The display device 500 shown in FIG. 22(A) includes a drive circuit 511, drive circuits 521a and 521b, and a display area 531. Note that the drive circuit 511, the drive circuits 521a and 521b may be collectively referred to as a “drive circuit” or a “peripheral drive circuit”. There is.

[0408] The drive circuits 521a and 521b can function as, for example, a scanning line drive circuit. Also the drive circuit 511 can function as, for example, a signal line drive circuit. Note that the drive circuit 521a and the drive circuit 521b may be only one of them. Also, some circuit may be provided at a position facing the drive circuit 511 with the display area 531 interposed therebetween.

[0409] In addition, the display device 500 illustrated in FIG. 22(A) includes p wirings 535 that are each arranged substantially in parallel and have their potentials controlled by a driving circuit 521a and / or a driving circuit 521b, and q wirings 536 that are each arranged substantially in parallel and have their potentials controlled by a driving circuit 511 (where p and q are both natural numbers of 1 or more). Further, the display area 531 has a plurality of pixels 532 arranged in a matrix. Each pixel 532 includes a pixel circuit 534 and a display element. Also, by causing three pixels 532 to function as one pixel, full-color display can be realized. Each of the three pixels 532 controls the transmittance, reflectance, or emission light amount of red light, green light, or blue light. Note that the colors of light controlled by the three pixels 532 are not limited to combinations of red, green, and blue, and may be yellow, cyan, or magenta. In addition, a pixel 532 that controls white light may be added to the pixels that control red light, green light, and blue light, and the four pixels 532 may be grouped to function as one pixel. By adding the pixel 532 that controls white light, the luminance of the display area can be increased. Also, by increasing the number of pixels 532 that function as one pixel and appropriately combining red, green, blue, yellow, cyan, and magenta, the reproducible color gamut can be expanded. When the pixels are arranged in a 1920×1080 matrix, a display device 500 that can display at a resolution of so-called full high vision (also referred to as "2K resolution", "2K1K", "2K", etc.) can be realized. Further, for example, when the pixels are arranged in a 3840×2160 matrix, a display device 500 can be realized that can display at a resolution of so-called 4K (also referred to as "4K resolution", "4K2K", etc.). Note that the display device 500 is not limited to the above-described configurations, and various modifications can be made.

[0410] Also, by causing three pixels 532 to function as one pixel, full-color display can be realized. The three pixels 532 each control the transmittance, reflectance, or emission light amount of red light, green light, or blue light. Note that the colors of light controlled by the three pixels 532 are not limited to combinations of red, green, and blue, and may be yellow, cyan, or magenta. In addition, a pixel 532 that controls white light may be added to the pixels that control red light, green light, and blue light, and the four pixels 532 may be grouped to function as one pixel. By adding the pixel 532 that controls white light, the luminance of the display area can be increased.

[0411] Also, by increasing the number of pixels 532 that function as one pixel and appropriately combining red, green, blue, yellow, cyan, and magenta, the reproducible color gamut can be expanded. When the pixels are arranged in a 1920×1080 matrix, a display device 500 that can display at a resolution of so-called full high vision (also referred to as "2K resolution", "2K1K", "2K", etc.) can be realized. Further, for example, when the pixels are arranged in a 3840×2160 matrix, a display device 500 can be realized that can display at a resolution of so-called 4K (also referred to as "4K resolution", "4K2K", etc.). Note that the display device 500 is not limited to the above-described configurations, and various modifications can be made.

[0412] When the pixels are arranged in a 1920×1080 matrix, a display device 500 that can display at a resolution of so-called full high vision (also referred to as " "2K resolution", "2K1K", "2K", etc.) can be realized. Also, for example, when the pixels are arranged in a 3840×2160 matrix, When arranged in an S shape, a display device 500 that can display at a resolution of so-called ultra-high vision (also referred to as "4K resolution", "4K2K", " "4K", etc.) can be realized. . Also, for example, when pixels are arranged in a 7680×4320 matrix, a so-called super high vision (also referred to as "8K resolution", "8K4K", "8K", etc.) display device 500 can be realized. By increasing the number of pixels, it is also possible to realize a display device 500 that can display at a resolution of 16K or 32K.

[0413] The wiring 535_g in the g-th row (where g is a natural number from 1 to p) is electrically connected to the q pixels 532 arranged in the g-th row among the plurality of pixels 532 arranged in p rows and q columns in the display area 531. Also, the wiring 536_h in the h-th column (where h is a natural number from 1 to q) is electrically connected to the p pixels 532 arranged in the h-th column among the pixels 532 arranged in p rows and q columns.

[0414] [Display element] The display device 500 can use various forms or have various display elements. As an example of a display element, an EL (electroluminescence) element (organic EL element, inorganic EL element, or an EL element containing organic and inorganic substances), an LED (white LED, red LED, green LED, blue LED, etc.), a transistor (a transistor that emits light according to current), an electron-emitting element, a liquid crystal element, electronic ink, an electrophoretic element, a grating light valve (GLV), a display element using MEMS (micro-electro-mechanical system), a digital micromirror device (DMD), a DMS (digital micro- Shutter), MIRASOL (registered trademark), IMOD (Interferometric Mod ulation) element, a shutter-type MEMS display element, an optical interference-type MEMS display element, an electro-wetting element, a piezoelectric ceramic display, a display element using carbon nanotubes, etc., there are those having a display medium in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action. Also, quantum dots may be used as the display element.

[0415] As an example of a display device using an EL element, there is an EL display, etc. As an example of a display device using an electron emission element, there is a field emission display (FED) or a SED method flat panel display (SED: Surface-conduction El ectron-emitter Display), etc. As an example of a display device using quantum dots, there is a quantum dot display, etc. As an example of a display device using a liquid crystal element, there is a liquid crystal display (transmissive liquid crystal display, transflective liquid crystal display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display), etc. As an example of a display device using electronic ink, electronic powder fluid (registered trademark), or an electrophoresis element, there is an electronic paper, etc. Also, the display device may be a plasma display panel (P DP). Also, the display device may be a retinal scanning type projection device. When realizing a transflective liquid crystal display or a reflective liquid crystal display, part or all of the pixel electrodes may be made to have the function of a reflective electrode. For example,

[0416] A part or all of the pixel electrode may have aluminum, silver, or the like. Furthermore, in that case, it is also possible to provide a memory circuit such as an SRAM under the reflective electrode. As a result, further power consumption can be reduced.

[0417] When using an LED, graphene or graphite may be disposed under the electrode of the LED or the nitride semiconductor. Graphene or graphite may be stacked in multiple layers to form a multilayer film. By providing graphene or graphite in this way, it is possible to easily form a nitride semiconductor, for example, an n-type GaN semiconductor layer having crystals, on top of it. Furthermore, a p-type GaN semiconductor layer having crystals or the like can be provided on top of it to form an LED. An AlN layer may be provided between the graphene or graphite and the n-type GaN semiconductor layer having crystals. The GaN semiconductor layer included in the LED may be formed by MOCVD. However, by providing graphene, the GaN semiconductor layer included in the LED can also be formed by sputtering.

[0418]

[0419] FIGS. 22(B), 22(C), 23(A), and 23(B) show circuit configuration examples that can be used for pixel 532.

[0419] [An example of a pixel circuit for a light-emitting display device] The pixel circuit 534 shown in FIG. 22(B) includes a transistor 461, a capacitor element 463, a transistor 468, and a transistor 464. The pixel circuit 534 shown in FIG. 22(B) is electrically connected to a light-emitting element 469 that can function as a display element.

[0420] ​​OS transistors can be used for transistor 461, transistor 468, and transistor 464. In particular, it is preferable to use an OS transistor for transistor 461.

[0421] One of the source or drain of transistor 461 is electrically connected to wiring 536_h. Furthermore, the gate of transistor 461 is electrically connected to wiring 535_g. A video signal is supplied from wiring 536_h.

[0422] Transistor 461 has a function of controlling the writing of the video signal to node 465.

[0423] One of the pair of electrodes of capacitor element 463 is electrically connected to node 465, and the other is electrically connected to node 467. Also, the other of the source or drain of transistor 461 is electrically connected to node 465.

[0424] Capacitor element 463 has a function as a holding capacitor for holding the data written to node 465.

[0425] One of the source or drain of transistor 468 is electrically connected to potential supply line VL_a, and the other is electrically connected to node 467. Furthermore, the gate of transistor 468 is electrically connected to node 465.

[0426] One of the source or drain of transistor 464 is electrically connected to potential supply line V0, and the other is electrically connected to node 467. Furthermore, the gate of transistor 464 is electrically connected to wiring 535_g.

[0427] ​​​One of the anode or cathode of the light-emitting element 469 is electrically connected to the potential supply line VL_b and the other is electrically connected to the node 467.

[0428] As the light-emitting element 469, for example, an organic electroluminescence element (also referred to as an organic EL element) or the like can be used. However, the light-emitting element 469 is not limited to this, and for example, an inorganic EL element made of an inorganic material may be used.

[0429] For example, a high power supply potential VDD is applied to one of the potential supply line VL_a or the potential supply line VL_b, and a low power supply potential VSS is applied to the other.

[0430] In the display device 500 having the pixel circuit 534 of FIG. 22(B), the driving circuit 521a, and / or the driving circuit 521b sequentially selects the pixels 532 of each row, turns on the transistors 461, and the transistor 464, and writes the video signal to the node 465.

[0431] The pixel 532 in which data is written to the node 465 enters a holding state when the transistors 461 and the transistor 464 are turned off. Further, according to the potential of the data written to the node 465, the current flowing between the source electrode and the drain electrode of the transistor 468 is controlled, and the light-emitting element 469 emits light with a luminance corresponding to the flowing current amount. By performing this sequentially for each time, an image can be displayed.

[0432] Also, as shown in FIG. 23(A), transistors having a back gate may be used as the transistors 461, the transistor 464, and the transistor 468. FIG. 23( The transistors 461 and 464 shown in (A) have gates electrically connected to the back gate. Therefore, the gate and the back gate are always at the same potential. Also, the back gate of the transistor 468 is electrically connected to the node 467. Therefore, the back gate is always at the same potential as the node 467.

[0433] At least one of the transistors 461, 468, and 464 can use the above-described OS transistor.

[0434] [An example of a pixel circuit for a liquid crystal display device] The pixel circuit 534 shown in FIG. 22(C) includes a transistor 461 and a capacitive element 463. Also, the pixel circuit 534 shown in FIG. 22(C) is electrically connected to a liquid crystal element 462 that can function as a display element. It is preferable to use an OS transistor for the transistor 461.

[0435] One potential of a pair of electrodes of the liquid crystal element 462 is appropriately set according to the specifications of the pixel circuit 534. For example, a common potential (common potential) may be applied to one of the pair of electrodes of the liquid crystal element 462, or it may be set to the same potential as the capacitance line CL described later. Also, different potentials may be applied to one of the pair of electrodes of the liquid crystal element 462 for each pixel 532. The other of the pair of electrodes of the liquid crystal element 462 is electrically connected to the node 466. The liquid crystal element 462 has its alignment state set by the data written to the node 466.

[0436] As a driving method for a display device including the liquid crystal element 462, for example, the TN (Twisted Nematic) mode, the STN (Super Twisted Nematic) mode ​DO, VA mode, ASM (Axially Symmetric Aligned Mi cro-cell) mode, OCB (Optically Compensated B irefringence) mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq uid Crystal) mode, MVA mode, PVA (Patterned Ver tical Alignment) mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode, etc. may be used. In addition, as a driving method of the display device, in addition to the driving methods described above, ECB (Electric ally Controlled Birefringence) mode, PDLC (P olymer Dispersed Liquid Crystal) mode, PNLC (Polymer Network Liquid Crystal) mode, guest ho st mode, etc. exist. However, it is not limited to this, and various ones can be used as the liquid crystal element and its driving method. When using a liquid crystal element as the display element, thermotropic liquid crystal, low molecular liquid crystal, polymer liquid

[0437] crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials show a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on the conditions. In addition, a liquid crystal showing a blue phase (Blue Phase) without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the cholesteric liquid crystal is heated, the cholesteric

[0438] phase changes to the blue phase. The blue phase is one of the liquid crystal phases. When the cholesteric liquid crystal is heated, the cholesteric This is the phase that appears immediately before the transition from the cholesteric phase to the isotropic phase. The blue phase appears only within a narrow temperature range. Therefore, a liquid crystal composition in which 5% by weight or more of a chiral agent is mixed is used for the liquid crystal layer in order to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed as short as 1 msec or less, has optical isotropy, does not require alignment treatment, and has a small viewing angle dependency. Also, since an alignment film does not need to be provided, rubbing treatment is not required, so electrostatic breakdown caused by rubbing treatment can be prevented, and defects and breakage of the liquid crystal display device during the manufacturing process can be reduced. Therefore, it is possible to improve the productivity of the liquid crystal display device. Also, the method of multi-domain or multi-domain design in which pixels are divided into several regions (sub-pixels) and the molecules are arranged to be tilted in different directions can be used. Also, the intrinsic resistance of the liquid crystal material is 1×10 Ω·cm or more, preferably 1×10

[0439] Ω·cm or more, and more preferably 1×10 Ω·cm or more. The value of the intrinsic resistance in this specification is the value measured at 20°C. In the pixel circuit 534 at the g-th row and h-th column, one of the source or drain of the transistor 461 is electrically connected to the wiring 536_h, and the other is electrically connected to the node 466.

[0440] The gate of the transistor 461 is electrically connected to the wiring 535_g. A video signal is supplied from the wiring 536_h. The transistor 461 controls the supply of the video signal to the node 466. 9 Ω·cm or more, preferably 1×10 11 Ω·cm or more, and more preferably 1×10 12 Ω·cm or more. Note that the value of the intrinsic resistance in this specification is the value measured at 20°C. In the pixel circuit 534 at the g-th row and h-th column, one of the source or drain of the transistor 461 is electrically connected to the wiring 536_h, and the other is electrically connected to the node 466.

[0441] In the pixel circuit 534 at the g-th row and h-th column, one of the source or drain of the transistor 461 is electrically connected to the wiring 536_h, and the other is electrically connected to the node 466. One side of the source or drain of the transistor 461 is electrically connected to the wiring 536_h, and the other side is electrically connected to the node 466. The gate of the transistor 461 is electrically connected to the wiring 535_g. A video signal is supplied from the wiring 536_h. The transistor 461 controls the supply of the video signal to the node 466. It has a function of controlling writing.

[0442] One of the pair of electrodes of the capacitance element 463 is electrically connected to a wiring to which a specific potential is supplied (hereinafter, capacitance line CL ), and the other is electrically connected to the node 466. Note that the value of the potential of the capacitance line CL is appropriately set according to the specifications of the pixel circuit 534. The capacitance element 463 has a function as a holding capacitance for holding the data written to the node 466.

[0443] For example, in the display device 500 having the pixel circuit 534 in FIG. 22(C), the driving circuits 521a and / or 521b sequentially select the pixel circuits 534 in each row, turn on the transistor 461, and write a video signal to the node 466.

[0444] The pixel circuit 534 in which the video signal is written to the node 466 enters the holding state when the transistor 461 is turned off . By sequentially performing this for each row, an image can be displayed in the display area 531 .

[0445] Also, as shown in FIG. 23(B), a transistor having a back gate may be used for the transistor 461. The transistor 461 shown in FIG. 23(B) has its gate electrically connected to the back gate . Therefore, the gate and the back gate always have the same potential.

[0446] [Configuration example of peripheral circuit] FIG. 24(A) shows a configuration example of the driving circuit 511. The driving circuit 511 includes a shift register 51 2, a latch circuit 513, and a buffer 514. Also, FIG. 24(B) shows a configuration example of the driving circuit 521a. The driving circuit 521a includes a shift register 522 and a buffer It has 523. The drive circuit 521b can have the same configuration as the drive circuit 521a .

[0447] A start pulse SP, a clock signal CLK, etc. are input to the shift register 512 and the shift register 522.

[0448] [Configuration example of display device] Using the OS transistor shown in the above embodiment, part or all of the drive circuit including the shift register is integrally formed on the same substrate as the pixel portion to form a system-on-panel . This is possible.

[0449] In this embodiment, a configuration example of a display device using a liquid crystal element and a configuration example of a display device using an EL element will be described. In FIG. 25(A), a sealing material 4005 is provided so as to surround a pixel portion 4002 provided on a first substrate 4001, and the pixel 402 is sealed by the sealing material 4 005 and a second substrate 4006. In FIG. 25(A), in a region different from the region surrounded by the sealing material 4005 on the first substrate 4001, a signal line drive circuit 40 03 formed of single crystal semiconductor or polycrystalline semiconductor on a separately prepared substrate, and a scan line drive circuit 4004 are mounted. Also, various signals and potentials applied to the signal line drive circuit 4003 , the scan line drive circuit 4004, or the pixel portion 4002 are supplied from FPC4018a (FPC: Flexible printed circuit), F PC4018b. In FIGS. 25(B) and 25(C), a sealing material 4005 is provided so as to surround a pixel portion 4 002 provided on a first substrate 4001 and a scan line drive circuit 4004 . .

[0450] In FIGS. 25(B) and 25(C), a pixel portion 4 002 provided on a first substrate 4001 and a scan line drive circuit 4004 are surrounded by a sealing material 4005 It exists. Also, a second substrate 4006 is provided on the pixel portion 4002 and the scanning line driving circuit 4004. Therefore, the pixel portion 4002 and the scanning line driving circuit 4004 are sealed together with the display element by the first substrate 400 1, the sealing material 4005, and the second substrate 4006. In FIGS. 25(B) and 25(C), a signal line driving circuit 4003 formed of a single crystal semiconductor or a polycrystalline semiconductor is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 400 5 on the first substrate 4001. In FIGS. 25(B) and 25(C), various signals and potentials supplied to the signal line driving circuit 4003, the scanning line driving circuit 4004, or the pixel portion 4002 are supplied from the FPC 4018.

[0451] Also, in FIGS. 25(B) and 25(C), an example is shown in which the signal line driving circuit 4003 is separately formed and mounted on the first substrate 4001, but the present invention is not limited to this configuration. The scanning line driving circuit may be separately formed and mounted, or only a part of the signal line driving circuit or only a part of the scanning line driving circuit may be separately formed and mounted.

[0452] Note that the connection method of the separately formed driving circuit is not particularly limited, and wire bonding, COG (Chip On Glass), TCP (Tape Carrier Package), COF (Chip On Film), etc. can be used. FIG. 25(A) is an example in which the signal line driving circuit 4003 and the scanning line driving circuit 4004 are mounted by COG, FIG. 25(B) is an example in which the signal line driving circuit 4003 is mounted by COG, and FIG. 25(C) is an example in which the signal line driving circuit 4003 is mounted by TCP.

[0453] In addition, the display device may include a panel in which the display element is sealed, and a module in a state where an IC or the like including a controller is mounted on the panel.

[0454] In addition, the pixel portion and the scanning line driving circuit provided on the first substrate have a plurality of transistors, and the OS transistor shown in the above embodiment can be applied.

[0455] FIGS. 26(A) and 26(B) are cross-sectional views showing the cross-sectional configuration of the portion indicated by the chain line N1-N2 in FIG. 25(B). FIG. 26(A) is an example of a liquid crystal display device using a liquid crystal element as a display element. Further, FIG. 26(B) is an example of a light-emitting display device (also referred to as an "EL display device") using a light-emitting element as a display element.

[0456] The display devices shown in FIGS. 26(A) and 26(B) have an electrode 4015, and the electrode 4015 is electrically connected to a terminal of the FPC 4018 via an anisotropic conductive layer 4019. Further, the electrode 4015 is electrically connected to the wiring 4014 at an opening formed in the insulating layer 4112, the insulating layer 4111, and the insulating layer 4110.

[0457] The electrode 4015 is formed of the same conductive layer as the first electrode layer 4030, and the wiring 4014 is formed of the same conductive layer as the source electrode and the drain electrode of the transistors 4010 and 4011.

[0458] In addition, the pixel portion 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001 have a plurality of transistors. In FIGS. 26(A) and 26(B), the pixel portion 4002 ​​​​​​​​​​​The transistor 4010 included in it, and the transistor 4011 included in the scanning line driving circuit 4004 are exemplified. In FIG. 26(A), an insulating layer 4112 is provided on the transistor 4010 and the transistor 4011. In FIG. 26(B), a partition wall 4510 is formed on the insulating layer 4112.

[0459] Also, the transistor 4010 and the transistor 4011 are provided on the insulating layer 4102. Also, the transistor 4010 and the transistor 4011 have an electrode 4017 formed on the insulating layer 4103, and the insulating layer 4112 is formed on the electrode 4017. Note that the electrode 4017 can function as a back gate electrode.

[0460] The transistor 4010 and the transistor 4011 can use the transistor shown in the above embodiment. It is preferable to use an OS transistor as the transistor 4010 and the transistor 4011. The OS transistor has suppressed electrical characteristic variations and is electrically stable. Therefore, the display device of the present embodiment shown in FIGS. 26(A) and 26(B) can be made into a highly reliable display device.

[0461] Also, the OS transistor can lower the current value (off-current value) in the off state. Therefore, the holding time of an electrical signal such as an image signal can be lengthened, and the writing interval can also be set long in the power-on state. Therefore, the frequency of the refresh operation can be reduced, and the effect of suppressing power consumption is achieved.

[0462] Also, since the OS transistor can obtain a relatively high field-effect mobility, high ​​​​​​​​It is possible to drive at high speed. Therefore, by using the OS transistor in the drive circuit section and pixel section of the display device, a high-quality image can be provided. Also, since it is possible to separately fabricate the drive circuit section or the pixel section on the same substrate, the number of components of the display device can be reduced. Moreover, since it is possible to separately fabricate the drive circuit section or the pixel section on the same substrate, the number of components of the display device can be reduced. Moreover, since it is possible to separately fabricate the drive circuit section or the pixel section on the same substrate, the number of components of the display device can be reduced. Moreover, since it is possible to separately fabricate the drive circuit section or the pixel section on the same substrate, the number of components of the display device can be reduced.

[0463] In addition, the display device shown in FIGS. 26(A) and 26(B) has a capacitive element 4020. The capacitive element 4020 has an electrode 4021 formed in the same process as the gate electrode of the transistor 4010 and an electrode formed in the same process as the source electrode and the drain electrode. The respective electrodes overlap via an insulating layer 4103. The capacitive element 4020 has an electrode 4021 formed in the same process as the gate electrode of the transistor 4010 and an electrode formed in the same process as the source electrode and the drain electrode. The respective electrodes overlap via an insulating layer 4103. The capacitive element 4020 has an electrode 4021 formed in the same process as the gate electrode of the transistor 4010 and an electrode formed in the same process as the source electrode and the drain electrode. The respective electrodes overlap via an insulating layer 4103.

[0464] Generally, the capacitance of the capacitive element provided in the pixel section of the display device is set so that it can hold charges for a predetermined period in consideration of the leakage current of the transistor arranged in the pixel section. The capacitance of the capacitive element may be set in consideration of the off-current of the transistor. Generally, the capacitance of the capacitive element provided in the pixel section of the display device is set so that it can hold charges for a predetermined period in consideration of the leakage current of the transistor arranged in the pixel section. The capacitance of the capacitive element may be set in consideration of the off-current of the transistor. Generally, the capacitance of the capacitive element provided in the pixel section of the display device is set so that it can hold charges for a predetermined period in consideration of the leakage current of the transistor arranged in the pixel section. The capacitance of the capacitive element may be set in consideration of the off-current of the transistor.

[0465] For example, by using an OS transistor in the pixel section of a liquid crystal display device, the capacitance of the capacitive element can be made 1 / 3 or less, and further 1 / 5 or less, with respect to the liquid crystal capacitance. By using an OS transistor, the formation of the capacitive element can also be omitted. For example, by using an OS transistor in the pixel section of a liquid crystal display device, the capacitance of the capacitive element can be made 1 / 3 or less, and further 1 / 5 or less, with respect to the liquid crystal capacitance. By using an OS transistor, the formation of the capacitive element can also be omitted. For example, by using an OS transistor in the pixel section of a liquid crystal display device, the capacitance of the capacitive element can be made 1 / 3 or less, and further 1 / 5 or less, with respect to the liquid crystal capacitance. By using an OS transistor, the formation of the capacitive element can also be omitted.

[0466] The transistor 4010 provided in the pixel section 4002 is electrically connected to the display element. In FIG. 26(A), the liquid crystal element 4013, which is the display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033 that function as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer In FIG. 26(A), the liquid crystal element 4013, which is the display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033 that function as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer In FIG. 26(A), the liquid crystal element 4013, which is the display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033 that function as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer In FIG. 26(A), the liquid crystal element 4013, which is the display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that insulating layers 4032 and 4033 that function as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 is provided on the side of the second substrate 4006 and overlaps with the first electrode layer 4030 via the liquid crystal layer 4008.

[0467] The spacer 4035 is a columnar spacer obtained by selectively etching an insulating layer, and is provided to control the interval (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. Note that a spherical spacer may be used.

[0468] In addition, in the display device, optical members (optical substrates) such as a black matrix (light-shielding layer), a polarizing member, a retardation member, and a reflection prevention member may be appropriately provided. For example, circular polarization using a polarizing substrate and a retardation substrate may be used. Also, a backlight, a side light, etc. may be used as the light source.

[0469] The display devices shown in FIGS. 26(A) and 26(B) have an insulating layer 4111 and an insulating layer 4104. As the insulating layer 4111 and the insulating layer 4104, an insulating layer that hardly transmits impurity elements is used. By sandwiching the semiconductor layer of the transistor with the insulating layer 4111 and the insulating layer 4104, intrusion of impurities from the outside can be prevented. Also, by the insulating layer 4111 and the insulating layer 4104 being in contact outside the pixel portion 4002, the effect of preventing intrusion of impurities from the outside can be enhanced.

[0470] The insulating layer 4104 may be formed, for example, by the same material and method as the insulating layer 210. The insulating layer 4111 may be formed, for example, by the same material and method as the insulator 282.

[0471] In addition, as a display element included in the display device, a light-emitting element that utilizes electroluminescence A child (also referred to as an "EL element") can be applied. The EL element has a layer containing a light-emitting compound (also referred to as an "EL layer") between a pair of electrodes. When a potential difference greater than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side, and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the light-emitting substance contained in the EL layer emits light. Also, the EL element is distinguished by whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element, and the latter is called an inorganic EL element. When a potential difference greater than the threshold voltage of the EL element is generated between a pair of electrodes, holes are injected into the EL layer from the anode side, and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the light-emitting substance contained in the EL layer emits light.

[0472] The organic EL element injects electrons from one electrode and holes from the other electrode into the EL layer by applying a voltage. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state, and light is emitted when the excited state returns to the ground state. Due to such a mechanism, such a light-emitting element is called a current-excited type light-emitting element.

[0473]

[0474] Note that in addition to the light-emitting compound, the EL layer may have a substance with high hole injection property, a substance with high hole transport property, a hole blocking material, a substance with high electron transport property, a substance with high electron injection property, or a bipolar substance (a substance with high electron transport property and high hole transport property).

[0475] The EL layer can be formed by any method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0476] The inorganic EL element is classified into a dispersed inorganic EL element and a thin film inorganic EL element according to its element configuration. It is classified. The distributed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. It is formed by dispersing particles of a light-emitting material in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission that utilizes a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission that utilizes inner-shell electron transition of metal ions. Here, an organic EL element is used for explanation as the light-emitting element. For the light-emitting element to extract light, at least one of a pair of electrodes may be transparent. Then, a transistor and a light-emitting element are formed on a substrate, and there are a top emission structure that emits light from the surface opposite to the substrate, a bottom emission structure that emits light from the surface on the substrate side, and a dual emission structure that emits light from both sides. Any light-emitting element with an emission structure can be applied. The light-emitting element 4513, which is a display element, is electrically connected to a transistor 4010 provided in the pixel portion 4002. The configuration of the light-emitting element 4513 is a laminated structure of a first electrode layer 4030, a light-emitting layer 4511, and a second electrode layer 4031, but is not limited to this configuration. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of light extracted from the light-emitting element 4513, etc.

[0477]

[0478]

[0479] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. In particular, it is preferably formed using a photosensitive resin material to form an opening on the first electrode layer 4030 so that the side surface of the opening becomes an inclined surface formed with a continuous curvature.

[0480] The light-emitting layer 4511 may be composed of a single layer. Also, it may be configured such that a plurality of layers are stacked.

[0481] A protective layer may be formed on the second electrode layer 4031 and the partition wall 4510...

Claims

1. a first transistor on a semiconductor substrate; a second transistor on the semiconductor substrate; a third transistor on the semiconductor substrate; a fourth transistor on the semiconductor substrate; wherein the first transistor includes a first conductor having a function as a gate, a second conductor having a function as a source electrode, a third conductor having a function as a drain electrode, and an oxide semiconductor having a channel formation region; one of the source or drain of the second transistor is always in conduction with the first conductor; the other of the source or drain of the second transistor and the gate of the second transistor are grounded; one of the source or drain of the third transistor is always in conduction with the second conductor; the other of the source or drain of the third transistor and the gate of the third transistor are grounded; one of the source or drain of the fourth transistor is always in conduction with the third conductor; the other of the source or drain of the fourth transistor and the gate of the fourth transistor are grounded; charged charges in the first transistor move to the semiconductor substrate through the second transistor, the third transistor, or the fourth transistor; a semiconductor device.

2. A first transistor on a semiconductor substrate; a second transistor on the semiconductor substrate; a third transistor on the semiconductor substrate; a fourth transistor on the semiconductor substrate; wherein the first transistor includes a first conductor having a function as a gate, a second conductor having a function as a source electrode, a third conductor having a function as a drain electrode, and an oxide semiconductor having a channel formation region; the oxide semiconductor includes a metal oxide containing indium; one of the source or drain of the second transistor is always in conduction with the first conductor; the other of the source or drain of the second transistor and the gate of the second transistor are grounded; one of the source or drain of the third transistor is always in conduction with the second conductor; the other of the source or drain of the third transistor and the gate of the third transistor are grounded; One of the source or drain of the fourth transistor is always in conduction with the third conductor. The other of the source or drain of the fourth transistor and the gate of the fourth transistor are grounded. The charge charged on the first transistor moves to the semiconductor substrate through the second transistor, the third transistor or the fourth transistor. Semiconductor device.

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