Semiconductor Devices

Abstract

To provide a semiconductor device using a transistor which can obtain a high ON-state current even when the transistor is microfabricated.SOLUTION: A semiconductor device includes a transistor which has: a pair of first conductive films on an insulation surface; a semiconductor film on the pair of first conductive films; a pair of second conductive films connected to the pair of first conductive films, respectively; an insulation film on the semiconductor film; and a third conductive film on the insulation film, which is provided at a position overlapping the semiconductor film. An end of the third conductive film above the semiconductor film and a region where the pair of second conductive films are provided are separated from each other.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device using an insulated gate field effect transistor. [Background technology]

[0002] In recent years, the high mobility achieved by polysilicon and microcrystalline silicon and the high mobility achieved by amorphous silicon have been Oxide semiconductors are being developed as new semiconductor materials that combine uniform device characteristics obtained by Metal oxides, which are called conductors and exhibit semiconducting properties, are attracting attention. For example, indium oxide, a well-known metal oxide, is used in liquid It is used as a transparent electrode material in liquid crystal display devices, etc. It is a metal oxide that exhibits semiconducting properties. Examples of oxides include tungsten oxide, tin oxide, indium oxide, and zinc oxide. Transistors using metal oxides that exhibit such semiconducting properties in the channel formation region are already known. It has been reported (Patent Document 1 and Patent Document 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0004] By the way, in a silicon transistor, the addition of a small amount of impurity to the semiconductor film However, in transistors using oxide semiconductors, the valence electrons are controlled by the silicon Unlike transistors using impurity addition, a technique for controlling valence electrons by adding impurities has not been established. Therefore, transistors using oxide semiconductors often adopt a configuration in which a conductive film functioning as a source electrode or a drain electrode is directly connected to a channel formation region of a semiconductor film. As a result, in transistors using oxide semiconductors, the contact resistance between the semiconductor film and the source electrode or the drain electrode is large, thereby hindering the improvement of the on-current.

[0005] In addition, in transistors using silicon, source regions and drain regions are formed by adding impurities to a semiconductor film using a gate electrode or a resist as a mask. Therefore, the channel length can be controlled by adjusting the sizes of the gate electrode and the resist. On the other hand, in transistors using oxide semiconductors, the channel length is controlled by adjusting the distance between the source electrode and the drain electrode. Therefore, in order to miniaturize the transistor, it is necessary to shorten the distance between the source electrode and the drain electrode, and depending on the size of the gate electrode, the gate electrode may partially overlap with the source electrode or the drain electrode.

[0006] In the case of a top-gate type transistor in which the gate electrode is located on the semiconductor film, it is desirable to provide the source electrode and the drain electrode under the semiconductor film. However, in order to ensure the coverage (step coverage) of the semiconductor film at the ends of the source electrode and the drain electrode, it is necessary to reduce the film thickness of the source electrode and the drain electrode, but reducing the film thickness increases the resistance of the source electrode and the drain electrode. Therefore, it is difficult to increase the on-current of the transistor while ensuring step coverage.

[0007] Under the technical background as described above, an object of the present invention is to provide a semiconductor device capable of increasing the on-current of a transistor.

Means for Solving the Problems

[0008] In a semiconductor device according to an aspect of the present invention, a transistor includes a pair of first conductive films on an insulating surface, a semiconductor film on the pair of first conductive films, a pair of second conductive films respectively connected to the pair of first conductive films, an insulating film on the semiconductor film, and a third conductive film provided at a position overlapping the semiconductor film on the insulating film. The pair of first conductive films and the pair of second conductive films can function as source electrodes or drain electrodes, and the third conductive film can function as a gate electrode.

[0009] In one aspect of the present invention, the interval between the source electrode and the drain electrode in the direction in which carriers move in the semiconductor film, that is, the channel length direction, can be determined by the interval between the pair of first conductive films. Therefore, the arrangement of the pair of second conductive films can be determined so that the interval between the pair of second conductive films is longer than the interval between the pair of first conductive films. Thus, in one aspect of the present invention, when it becomes necessary to shorten the interval between the source electrode and the drain electrode due to the miniaturization of the transistor, the interval between the pair of first conductive films can be shortened, and the interval between the pair of second conductive films can be lengthened so that the pair of second conductive films and the third conductive film do not overlap on the semiconductor film. Specifically, the pair of second conductive films can be provided so as to sandwich and be separated from the third conductive film on the semiconductor film. Therefore, even when the transistor is miniaturized, the pair of second conductive films can be separated from the third conductive film. ​​​​​​​​​​​​​Since the electric field applied to the semiconductor film is less likely to be blocked by the pair of second conductive films, a high on-current can be obtained.

[0010] Also, in one aspect of the present invention, a pair of first conductive films exist under the semiconductor film, and a third conductive film exists above the semiconductor film. Therefore, due to the miniaturization of the transistor, the distance between the pair of first conductive films becomes shorter, and even if the third conductive film that functions as a gate electrode overlaps with the pair of first conductive films, the electric field applied from the third conductive film to the semiconductor film is less likely to be blocked by the pair of first conductive films. Thus, even when the transistor is miniaturized, a high on-current can be obtained.

[0011] Also, in order to improve the step coverage of the semiconductor film at the ends of the pair of first conductive films, even if the film thickness of the pair of first conductive films is kept small, by connecting the pair of first conductive films and the pair of second conductive films respectively, the resistance of the source electrode or drain electrode composed of the pair of first conductive films and the pair of second conductive films can be kept low.

[0012] Alternatively, in the semiconductor device according to one aspect of the present invention, in addition to the above configuration, the pair of second conductive films may be located on the semiconductor film.

[0013] When the pair of second conductive films are located on the semiconductor film, the area of contact between the pair of first conductive films and the pair of second conductive films that function as a source electrode or a drain electrode and the semiconductor film can be ensured to be larger than when the pair of second conductive films are separated from the semiconductor film. Thus, even when the transistor is miniaturized, the contact resistance between the source electrode or drain electrode composed of the pair of first conductive films and the pair of second conductive films and the semiconductor film can be kept small. ​​​​​​​​​​​​​Since it can be cut off, a high on-current can be obtained.

Advantages of the Invention

[0014] In one aspect of the present invention, a semiconductor device using a transistor with a high on-current can be realized with the above configuration. can be realized.

Brief Description of the Drawings

[0015]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Embodiments for Carrying Out the Invention

[0016] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and without departing from the spirit and scope of the present invention, its form and Those skilled in the art can easily understand that various details can be changed. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below.

[0017] Note that the present invention includes all semiconductor devices using transistors, such as integrated circuits, RF tags, and semiconductor display devices. Among integrated circuits, microprocessors, image processing circuits, DSP (Digital Signal Processor), microcontrollers including LSIs (Large Scale Integrated Circuits) such as FPGAs (Field Programmable Gate Arrays) and CPLDs (Complex PLDs) are included in the scope. In addition, semiconductor display devices include liquid crystal display devices, light-emitting devices having light-emitting elements represented by organic light-emitting elements (OLEDs) in each pixel , electronic paper, DMDs (Digital Micromirror Devices), PDPs (Plasma Display Panels), FEDs (Field Emission Displays), etc. Semiconductor display devices having transistors in the drive circuit are included in the scope.

[0018]

[0019] (Embodiment 1) FIG. 1 illustrates the structure of a transistor of a semiconductor device according to an aspect of the present invention. FIG. 1(A) is an example of a cross-sectional view in the channel length direction of the transistor.

[0019] The transistor shown in FIG. 1(A) has a first conductive film 101 and a first conductive film 102 on an insulating surface and a semiconductor film 103 on the first conductive films 101 and 102, and a second conductive film 104 and a second conductive film 105 respectively connected to the first conductive film 101 and the first conductive film 102 and an insulating film 106 on the semiconductor film 103, and a third conductive film 107 provided at a position overlapping the semiconductor film 103 between the second conductive film 104 and the second conductive film 105 and on the insulating film 106 The first conductive film 101 and the second conductive film 104, and the first conductive film 102 and the second conductive film 105 function as a source electrode or a drain electrode. The third conductive film 107 functions as a gate electrode The semiconductor film 103 does not completely cover the first conductive film 101 and the first conductive film 102, but partially covers the first conductive film 101 and the first conductive film 102 respectively. And, among the first conductive film 101 and the first conductive film 102, the portions not covered by the semiconductor film 103, that is, the portions different from the portions overlapping the semiconductor film 103, the first conductive film 101 and the first conductive film 102 are connected to the second conductive film 104 and the second conductive film 105 respectively

[0020] Note that the connection between the first conductive film 101 and the second conductive film 104, and the first conductive film 102 and the second conductive film 105 does not necessarily mean that the first conductive film 101 and the second conductive film 104, or the first conductive film 102 and the second conductive film 105 are in direct contact. For example, an insulating film such as a natural oxide film having a film thickness small enough to ensure an electrical connection may be provided between the first conductive film 101 and the second conductive film 104, or between the first conductive film 102 and the second conductive film 105 function as a source electrode or a drain electrode. The third conductive film 107 functions as a gate electrode function<00 /

[0021] The semiconductor film 103 does not completely cover the first conductive film 101 and the first conductive film 102, but partially covers the first conductive film 101 and the first conductive film 102 respectively. And, among the first conductive film 101 and the first conductive film 102, the portions not covered by the semiconductor film 103, that is, the portions different from the portions overlapping the semiconductor film 103, the first conductive film 101 and the first conductive film 102 are connected to the second conductive film 104 and the second conductive film 105 respectively 1 conductive film 101 and the first conductive film 102 are each partially covered. And, among the first conductive film 101 and the first conductive film 102, the portions not covered by the semiconductor film 103, that is, the portions different from the portions overlapping the semiconductor film 103, the first conductive film 101 and the first conductive film 102 are connected to the second conductive film 104 and the second conductive film 105 respectively membrane 101 and the first conductive film 102, the portion not covered by the semiconductor film 103, that is, the portion different from the portion overlapping the semiconductor film 103, the first conductive film 101 and the first conductive film 102 are connected to the second conductive film 104 and the second conductive film 105 respectively That is, in a portion different from the portion overlapping the semiconductor film 103, the first conductive film 101 and the first conductive film 102 are connected to the second conductive film 104 and the second conductive film 105 respectively membrane 101 and the first conductive film 102 are connected to the second conductive film 104 and the second conductive film 105 respectively are connected

[0022] Note that the connection between the first conductive film 101 and the first conductive film 102, and the second conductive film 104 and the second conductive film 105 5 does not necessarily mean that the first conductive film 101 and the second conductive film 104, or the first conductive film 102 and the second conductive film 105 are in direct contact. For example, an insulating film such as a natural oxide film having a film thickness small enough to ensure an electrical connection may be provided between the first conductive film 101 and the second conductive film 104, or between the first conductive film 102 and the second conductive film 105 02 and the second conductive film 105 are in direct contact. For example, an insulating film such as a natural oxide film having a film thickness small enough to ensure an electrical connection may be provided between the first conductive film 101 and the second conductive film 104, or between the first conductive film 102 and the second conductive film 105 film having a film thickness small enough to ensure an electrical connection, such as a natural oxide film, is provided between the first conductive film 101 and the second conductive film 104, or between the first conductive film 102 and the second conductive film 105 film 101 and the second conductive film 104, or between the first conductive film 102 and the second conductive film 105 may be provided

[0023] And, in one aspect of the present invention, the end portion 107 of the third conductive film 107 on the semiconductor film 103 is provided with the second conductive film 104 and the second conductive film 105 so as to sandwich and be separated from e. That is, the second conductive film 104 and the second conductive film 105 do not overlap with the third conductive film 107 on the semiconductor film 103.

[0024] Also, in the channel length direction, between the end portion 104e of the second conductive film 104 and the end portion 105e of the second conductive film 105, there are located the end portion 101e of the first conductive film 101 and the end portion 102e of the first conductive film 102 that are positioned under the semiconductor film 103. Note that the end portion 101e and the end portion 102e are the end portion of the first conductive film 101 and the end portion of the first conductive film 102 that are present at the closest positions in the channel length direction. Therefore, in the channel length direction, the interval Lsd between the end portion 104e of the second conductive film 104 and the end portion 105e of the second conductive film 105 is longer than the interval Lc between the end portion 101e of the first conductive film 101 and the end portion 102e of the first conductive film 102.

[0025] In one aspect of the present invention, between the first conductive film 101 and the first conductive film 102 that function as a source electrode or a drain electrode, and the third conductive film 107 that functions as a gate electrode, there are located the semiconductor film 103 and the insulating film 106. Therefore, unlike the case where the first conductive film 101 and the first conductive film 102 are provided between the third conductive film 107 and the semiconductor film 103, even if the interval Lc becomes short due to the miniaturization of the transistor, the electric field applied from the third conductive film 107 to the semiconductor film 103 is less likely to be obstructed by the first conductive film 101 and the first conductive film 102. Therefore, even if the transistor is miniaturized, a high on-current can be obtained. ​​​​​​​​​​​​​

[0026] Also, in the end portions 101e of the first conductive film 101 and 102e of the first conductive film 102, in order to improve the step coverage of the semiconductor film 103, even if the film thicknesses of the first conductive film 101 and the first conductive film 102 are kept small, by connecting the first conductive film 101 and the first conductive film 102 to the second conductive film 104 and the second conductive film 105 respectively, the resistance of the source electrode or drain electrode composed of the first conductive film 101 and the first conductive film 102, and the second conductive film 104 and the second conductive film 105 can be kept low.

[0027] Next, FIG. 1(B) shows an example of a top view of the transistor having the cross-sectional structure shown in FIG. 1(A). However, in FIG. 1(B), in order to clarify the layout of the transistor, a top view with the insulating film 106 omitted is shown. Also, the cross-sectional view taken along the dashed-dotted line A1 - A2 in FIG. 1(B) corresponds to FIG. 1(A).

[0028] In the top view shown in FIG. 1(B), the semiconductor film 103 has openings 108 and 109. And at the opening 108, the first conductive film 101 and the second conductive film 104 are connected to each other. Also, at the opening 109, the first conductive film 102 and the second conductive film 105 are connected to each other.

[0029] Next, FIG. 1(C) shows another example of a top view of the transistor having the cross-sectional structure shown in FIG. 1(A). However, in FIG. 1(C), in order to clarify the layout of the transistor, a top view with the insulating film 106 omitted is shown. Also, the cross-sectional view taken along the dashed-dotted line A1 - A2 in FIG. 1(C) corresponds to FIG. 1(A).

[0030] In the top view shown in FIG. 1(C), the semiconductor film 103 is separated into three parts. The spaces between the three separated semiconductor films 103 correspond to the opening 108 and the opening 109. And in the opening 108, the first conductive film 101 and the second conductive film 104 are connected. Also, in the opening 109, the first conductive film 102 and the second conductive film 105 are connected. Note that, in the transistor shown in FIG. 1, the second conductive film 104 or the second conductive film 105 has a configuration in which it is connected only to the upper part of the first conductive film 101 or the upper part of the first conductive film 102. However, in one aspect of the present invention, the second conductive film 104 or the second conductive film 105 may be connected to the upper part and the end part of the first conductive film 101 or the upper part and the end part of the first conductive film 102. FIG. 2 illustrates the structure of a transistor of a semiconductor device according to one aspect of the present invention. FIG. 2(A) is an example of a cross-sectional view of the transistor. Also, FIG. 2(B) is an example of a top view of the transistor having the cross-sectional structure shown in FIG. 2(A). However, in FIG. 2(B), a top view with the insulating film 106 omitted is shown in order to clarify the layout of the transistor. Also, the cross-sectional view along the dashed-dotted line B1 - B2 in FIG. 2(B) corresponds to FIG. 2(A). The transistor shown in FIG. 2 includes the first conductive film 101 and the first conductive film 102 on an insulating surface, the semiconductor film 103 on the first conductive film 101 and the first conductive film 102, the second conductive film 104 and the second conductive film 105 that are respectively connected to the first conductive film 101 and the first conductive film 102 and are located on the semiconductor film 103, the insulating film 106 on the semiconductor film 103, and

[0031]

[0032]

[0033] ​​​​​​​​​​​​​​It has a third conductive film 107 provided at a position overlapping the semiconductor film 103.

[0034] The transistor shown in FIG. 2 is such that the second conductive film 104 and the second conductive film 105 are not only on top of the first conductive film 101 or on top of the first conductive film 102, but also connected to the ends of the first conductive film 101 or the ends of the first conductive film 102. In this regard, it has a different structure from the transistor shown in FIG. 1. Therefore, if the area (occupied area) of the region where the first conductive film 101 and the first conductive film 102 are provided on the insulating surface is the same for the transistor shown in FIG. 1 and the transistor shown in FIG. 2, then due to the above configuration, the transistor shown in FIG. 2 can secure a larger area of the portion where the first conductive film 101 is connected to the second conductive film 104 or the area of the portion where the first conductive film 102 is connected to the second conductive film 105 than the transistor shown in FIG. 1. Thus, the contact resistance between the first conductive film 101 and the second conductive film 104 or the contact resistance between the first conductive film 102 and the second conductive film 105 can be reduced. On the upper part of the first conductive film 101, or not only on the upper part of the first conductive film 102, but also at the ends of the first conductive film 101, or at the ends of the first conductive film 102, the structure is different from the transistor shown in FIG. 1. Therefore, on the insulating surface, the area of the region where the first conductive film 101 and the first conductive film 102 are provided (occupied area) is the same as that of the transistor shown in FIG. 1 and the transistor shown in FIG. 2. If so, the transistor shown in FIG. 2 can ensure a larger area of the portion where the first conductive film 101 is connected to the second conductive film 104 or the area of the portion where the first conductive film 102 is connected to the second conductive film 105 than the transistor shown in FIG. 1 due to the above configuration. Therefore, the contact resistance between the first conductive film 101 and the second conductive film 104, or the contact resistance between the first conductive film 102 and the second conductive film 105 can be reduced. The area of the portion where the first conductive film 101 is connected to the second conductive film 104, or the area of the portion where the first conductive film 102 is connected to the second conductive film 105 can be made larger than that of the transistor shown in FIG. 1. Therefore, the contact resistance between the first conductive film 101 and the second conductive film 104, or the contact resistance between the first conductive film 102 and the second conductive film 105 can be reduced. The contact resistance between the first conductive film 101 and the second conductive film 104, or the contact resistance between the first conductive film 102 and the second conductive film 105 can be reduced.

[0035] In FIGS. 1 and 2, the case where the second conductive film 104 and the second conductive film 105 are in contact with the semiconductor film 103 respectively is illustrated. However, in one aspect of the present invention, the second conductive film 104 or the second conductive film 105 may be separated from the semiconductor film 103. However, in one aspect of the present invention, the second conductive film 104 or the second conductive film 105 may be separated from the semiconductor film 103. The second conductive film 104 or the second conductive film 105 may be separated from the semiconductor film 103.

[0036] FIG. 3 illustrates the structure of a transistor of a semiconductor device according to one aspect of the present invention. FIG. 3(A) is an example of a cross-sectional view of the transistor. Also, FIG. 3(B) is an example of a top view of the transistor having the cross-sectional structure shown in FIG. 3(A). However, in FIG. 3(B), the transistor having the cross-sectional structure shown in FIG. 3(A) is shown. To clarify the layout of the transistor, a top view with the insulating film 106 omitted is shown. Also, the cross-sectional view taken along the dashed line C1-C2 in Fig. 3(B) corresponds to Fig. 3(A).

[0037] The transistor shown in Fig. 3 includes a first conductive film 101 and a first conductive film 102 on an insulating surface, a semiconductor film 103 on the first conductive film 101 and the first conductive film 102, and a second conductive film 104 and a second conductive film 105 that are respectively connected to the first conductive film 101 and the first conductive film 102 and are separated from the semiconductor film 103. It also includes an insulating film 106 on the semiconductor film 103, and a third conductive film 107 provided at a position overlapping the semiconductor film 103 on the insulating film 106.

[0038] The transistor shown in Fig. 3 has a different structure from the transistors shown in Fig. 1 and Fig. 2 in that the second conductive film 104 or the second conductive film 105 is separated from the semiconductor film 103.

[0039] As shown in Fig. 1 and Fig. 2, when the second conductive film 104 and the second conductive film 105 are in contact with the semiconductor film 103 respectively, as shown in Fig. 3, the areas of contact between the first conductive film 101 and the second conductive film 104, and between the first conductive film 102 and the second conductive film 105, which function as the source electrode or the drain electrode, and the semiconductor film 103 can be ensured to be larger than when the second conductive film 104 and the second conductive film 105 are separated from the semiconductor film 103. Therefore, even when the transistor is miniaturized, by configuring the second conductive film 104 and the second conductive film 105 to be in contact with the semiconductor film 103 respectively, the contact resistance between the first conductive film 101 and the second conductive film 104 and the semiconductor film 103, or the contact resistance between the first conductive film 102 and the second conductive film 105 and the semiconductor film 103, ​​​​​​​​​​​​​The contact resistance of 03 can be suppressed to a small value, and a high on-current can be obtained.

[0040] Also, the transistor of the semiconductor device according to one aspect of the present invention may have a fourth conductive film under the first conductive film 101 or the first conductive film 102. FIG. 4(A) shows an example of a cross-sectional view of the transistor of the semiconductor device according to one aspect of the present invention.

[0041] The transistor shown in FIG. 4(A) has a configuration in which a fourth conductive film 110 and a fourth conductive film 111 are added to the transistor having the cross-sectional structure shown in FIG. 1(A). Specifically, the transistor shown in FIG. 4 (A) includes the first conductive film 101 and the first conductive film 102, the semiconductor film 103 on the first conductive film 1 01 and the first conductive film 102, the second conductive film 104 and the second conductive film 105 respectively connected to the first conductive film 1 01 and the first conductive film 102, the first insulating film 106 on the semiconductor film 103, and the third conductive film 107 provided at a position overlapping the semiconductor film 103 on the first insulating film 106. Further, the transistor has a layer including the fourth conductive film 110 and the fourth conductive film 111 respectively connected to the first conductive film 1 2 under the 01 and the first conductive film 102, and the second insulating film 120 provided between the fourth conductive film 110 and the fourth conductive film 11 1. It is desirable to flatten the upper surface of the above layer by chemical mechanical polishing (CMP: Chemical Mechanical Polishin g) or etching or the like. The fourth conductive film 110 and the fourth conductive film 111, together with the first conductive film 101 and the first conductive film 102, and the second conductive film 104 and the second conductive film 105, form the source electrode or drain of the transistor. The fourth conductive film 110 and the fourth conductive film 111 are connected to the first conductive film 101 and the first conductive film 102 respectively. 1, and a layer having a second insulating film 120 provided between the fourth conductive film 110 and the fourth conductive film 11 1. It is desirable to flatten the upper surface of the above layer by chemical mechanical polishing (CMP: Chemical Mechanical Polishin g) or etching or the like.

[0042] The fourth conductive film 110 and the fourth conductive film 111, together with the first conductive film 101 and the first conductive film 102, and the second conductive film 104 and the second conductive film 105, form the source electrode or drain of the transistor. The fourth conductive film 110 and the fourth conductive film 111, together with the first conductive film 101 and the first conductive film 102, and the second conductive film 104 and the second conductive film 105, form the source electrode or drain of the transistor. It functions as an n electrode. Therefore, by providing the fourth conductive film 110 and the fourth conductive film 111, the first conductive film 101 and the second conductive film 104 that function as a source electrode or a drain electrode and the resistance of the entire fourth conductive film 110 and the resistance of the entire first conductive film 102, second conductive film 105, and fourth conductive film 111 can be kept low.

[0043] Note that a semiconductor film may be provided between the fourth conductive film 110 or the fourth conductive film 111 and the first conductive film 101 or the first conductive film 102, respectively. FIG. 4(B) shows an example of a cross-sectional view of a transistor of a semiconductor device according to one aspect of the present invention.

[0044] The transistor shown in FIG. 4(B) has a different structure from the transistor shown in FIG. 4(A) in that it has a semiconductor film 112 and a semiconductor film 113 between the first conductive film 101 and the first conductive film 102 and the fourth conductive film 110 and the fourth conductive film 111, respectively.

[0045] Note that in FIG. 4, the case where the fourth conductive film is provided below the transistor having the cross-sectional structure shown in FIG. 1(A) is illustrated, but one aspect of the present invention is not limited to this configuration. For example, the fourth conductive film may be provided below the transistor having the cross-sectional structure shown in FIG. 2( A) or FIG. 3(A).

[0046] Note that in the transistors shown in FIGS. 1 to 4, the first conductive film 101 and the first conductive film 102 overlap the third conductive film 107 via the semiconductor film 103 and the insulating film 106. However, in one aspect of the present invention, the first conductive film 101 and the first conductive film 102 and the third conductive film 107 do not have to overlap the third conductive film 107 via the semiconductor film 103 and the insulating film 106. ​

[0047] In FIG. 5(A), taking the cross-sectional structure of the transistor shown in FIG. 1(A) as an example, the distance Lc between the end 101e of the first conductive film 1 01 and the end 102e of the first conductive film 102, and the relationship with the length Lg of the third conductive film 107 in the channel length direction are shown. In FIG. 5(A), the length Lg is longer than the distance Lc . And the transistor shown in FIG. 5(A) has a Lov region 114 where the third conductive film 107 overlaps the first conductive film 101 with the semiconductor film 103 and the insulating film 106 sandwiched therebetween, and a Lov region 115 where the third conductive film 107 overlaps the first conductive film 10 2 with the semiconductor film 103 and the insulating film 106 sandwiched therebetween .

[0048] By providing the Lov region 114 or the Lov region 115, the on-current of the transistor can be increased .

[0049] 4] Also, in FIG. 5(B), taking the cross-sectional structure of the transistor shown in FIG. 1(A) as an example, the distance Lc between the end 101e of the first conductive film 101 and the end 102e of the first conductive film 102, and the relationship with the length Lg of the third conductive film 107 in the channel length direction are shown. In FIG. 5(B), the length Lg is shorter than the distance Lc . And the transistor shown in FIG. 5(B) has an Loff region 116 corresponding to a region where the third conductive film 107 and the first conductive film 101 do not overlap between the first conductive film 101 and the first conductive film 102, that is, a region different from the region where the third conductive film 107 and the first conductive film 101 are provided. Also, the transistor shown in FIG. 5(B) has a region where the third conductive film 107 and the first conductive film 102 do not overlap between the first conductive film 101 and the first conductive film 102, that is, a region where the third conductive film 107 and the first conductive film 102 are provided . . In addition, between the first conductive film 101 and the first conductive film 102, the transistor shown in FIG. 5(B) has a region where the third conductive film 107 and the first conductive film 102 do not overlap, that is, a region different from the region where the third conductive film 107 and the first conductive film 102 are provided The Loff region 117 corresponds to a region different from the region where the Loff region is located.

[0050] By providing the Loff region 116 or the Loff region 117, the first conductive film 101 and Since the parasitic capacitance between the first conductive film 102 and the third conductive film 107 is kept small, the transistor This allows for faster operation of the star.

[0051] In the transistor of the semiconductor device according to one embodiment of the present invention, the semiconductor film 103 is formed of an oxide The semiconductor film 103 can be made of a wide-gap semiconductor such as an oxide semiconductor. When a conductor is used, dopants are added to the semiconductor film 103 to form source regions or An impurity region that functions as a drain region may be formed. The dopant may be, for example, helium, argon, xenon, etc. rare gases, and group 15 atoms such as nitrogen, phosphorus, arsenic, and antimony can be used. For example, when nitrogen is used as a dopant, the concentration of nitrogen atoms in the impurity region is 5× 10 19 / cm 3 More than 1×10 22 / cm 3 It is desirable that the following:

[0052] The oxide semiconductor contains at least indium (In) or zinc (Zn). It is preferable that the oxide contains In and Zn. In addition to these, as a stabilizer to reduce the variation in the electrical characteristics of the transistors It is preferable to have gallium (Ga). Also, tin (Sn) is used as a stabilizer. It is also preferable to have hafnium (Hf) as a stabilizer. It is preferable. Also, it is preferable to have aluminum (Al) as a stabilizer.

[0053] Also, as other stabilizers, lanthanum (La), cerium ( Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol mium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lut etium (Lu), any one or more of these may be included.

[0054] For example, as oxide semiconductors, indium oxide, tin oxide, zinc oxide, binary metal oxides such as In-Zn-based oxides, Sn-Zn-based oxides, Al-Zn-based oxides, Zn-Mg-based oxides, Sn-Mg-based oxides, In-Mg-based oxides, In-Ga-based oxides, ternary metal oxides such as In-Ga-Zn-based oxides (also denoted as IGZO), In-Al-Zn-based oxides, In-Sn-Zn-based oxides, Sn-Ga-Zn-based oxides, Al-Ga-Zn-based oxides, Sn-Al-Zn-based oxides, In-Hf-Zn-based oxides, In-La-Zn-based oxides such as In-Ce-Zn-based oxides, In-Pr-Zn-based oxides, In-Nd-Zn-based oxides such as In-Sm-Zn-based oxides, In-Eu-Zn-based oxides, In-Gd-Zn-based oxides, In-Tb-Zn-based oxides, In-Dy-Zn-based oxides, In-Ho-Zn-based oxides, I n-Er-Zn-based oxides, In-Tm-Zn-based oxides, In-Yb-Zn-based oxides, In -Lu-Zn-based oxides, quaternary metal oxides such as In-Sn-Ga-Zn-based oxides, I n-Hf-Ga-Zn-based oxides, In-Al-Ga-Zn-based oxides, In-Sn-Al- Zn-based oxides, In-Sn-Hf-Zn-based oxides, and In-Hf-Al-Zn-based oxides can be used. Further, the oxide semiconductor may contain silicon.

[0055] Note that, for example, an In-Ga-Zn-based oxide means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not limited. Also, it may contain metal elements other than In, Ga, and Zn. The In-Ga-Zn-based oxide has a sufficiently high resistance in the off state and can sufficiently reduce the off current. Moreover, since it also has a high mobility, it is suitable as a semiconductor material for semiconductor devices.

[0056] For example, In-Ga-Zn-based oxides with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3) or In:Ga:Zn = 2:2:1 (= 2 / 5:2 / 5:1 / 5) and oxides in the vicinity of their compositions can be used. Alternatively, In:Sn:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Sn:Zn = 2:1:3 (= 1 / 3:1 / 6:1 / 2) or In:Sn:Zn = 2:1:5 (= 1 / 4:1 / 8:5 / 8) atomic ratio of In-Sn-Zn-based oxides and oxides in the vicinity of their compositions may be used.

[0057] For example, in In-Sn-Zn-based oxides, relatively high mobility can be obtained easily. However, even in In-Ga-Zn-based oxides, the mobility can be increased by reducing the defect density in the bulk.

[0058] Note that an oxide semiconductor (purified Oxi) with reduced impurities such as moisture or hydrogen serving as an electron donor (donor) and reduced oxygen vacancies, resulting in high purity. It is of the i-type (intrinsic semiconductor) or extremely close to the i-type. Therefore, the transistor using the above oxide semiconductor has the characteristic that the off-current is extremely low. Also, the band gap of the oxide semiconductor is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. By using an oxide semiconductor film in which the impurity concentration such as moisture or hydrogen is sufficiently reduced and the oxygen deficiency is reduced, and thus highly purified, the off-current of the transistor can be lowered.

[0059] Specifically, the fact that the off-current of a transistor using a highly purified oxide semiconductor for the semiconductor film is low can be proven by various experiments. For example, even in an element with a channel width of 1×10 6 μm and a channel length of 10 μm, even when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1 V to 10 V, the off-current is below the measurement limit of the semiconductor parameter analyzer, that is, a characteristic of 1×10 A or less can be obtained. In this case, it can be seen that the off-current corresponding to the value obtained by dividing the off-current by the channel width of the transistor is 100 zA / μm or less. Also, by connecting a capacitive element and a transistor and using a circuit that controls the charge flowing into or out of the capacitive element with the said transistor, -13 the off-current was measured. In this measurement, a highly purified oxide semiconductor film was used for the channel formation region of the said transistor, and the off-current of the said transistor was measured from the transition of the charge amount per unit time of the capacitive element. As a result, when the voltage between the source electrode and the drain electrode of the transistor is 3 V, it was found that an even lower off-current of several tens yA / μm can be obtained. ​​​​​​Therefore, a transistor using a highly purified oxide semiconductor film in the channel formation region has an off-current that is significantly lower than that of a transistor using crystalline silicon.

[0060] Note that, unless otherwise specified, in this specification, the off-current in an n-channel transistor refers to the current flowing between the source electrode and the drain electrode when the potential of the gate electrode is 0 or less with respect to the potential of the source electrode in a state where the drain electrode is at a higher potential than the source electrode and the gate electrode. Alternatively, in this specification, the off-current in a p-channel transistor refers to the current flowing between the source electrode and the drain electrode when the potential of the gate electrode is 0 or more with respect to the potential of the source electrode in a state where the drain electrode is at a lower potential than the

[0061] Note that, for example, the oxide semiconductor film can be formed by a sputtering method using a target containing In (indium), Ga (gallium), and Zn (zinc). When forming an In-Ga-Zn-based oxide semiconductor film by sputtering, preferably, a target of an In-Ga-Zn-based oxide represented by an atomic ratio of In :Ga:Zn = 1:1:1, 4:2:3, 3:1:2, 1:1:2, 2:1:3, or 3:1:4 is used. By forming an oxide semiconductor film using a target of an In-Ga-Zn-based oxide having the above atomic ratio, polycrystals or CAAC (C Axis Aligned Crystal) are likely to be formed. Also, the filling rate of the target containing In, Ga, and Zn is 90% or more and 10 0% or less, preferably 95% or more and less than 100%. Using a target with a high filling rate As a result, the formed oxide semiconductor film becomes a dense film.

[0062] When using a material of In-Zn-based oxide as the oxide semiconductor, in the target used the atomic ratio of the metal elements is In:Zn = 50:1 to 1:2 (when converted to molar ratio, In2 O3:ZnO = 25:1 to 1:4), preferably In:Zn = 20:1 to 1:1 (molar ratio, converted to In2O3:ZnO = 10:1 to 1:2), more preferably In:Zn = 1.5:1 to 15:1 (when converted to molar ratio, In2O3:ZnO = 3:4 to 15:2 ). For example, for the target used to form an oxide semiconductor film that is an In-Zn-based oxide when the atomic ratio is In:Zn:O = X:Y:Z, Z > 1.5X + Y. By keeping the ratio of Zn within the above range, improvement in mobility can be achieved.

[0063] The oxide semiconductor film takes a state such as single crystal, polycrystal (also referred to as polycrystal), or amorphous.

[0064] Preferably, the oxide semiconductor film is a CAAC-OS (C Axis Aligned Cr ystalline Oxide Semiconductor) film.

[0065] The CAAC-OS film is neither a perfect single crystal nor a perfect amorphous. The CAAC-OS film is an oxide semiconductor film having a crystal-amorphous mixed phase structure with a crystal part and an amorphous part in the amorphous phase. Note that the crystal part is often sized to fit within a cube with a side length of less than 100 nm. Also, in the observation image by a transmission electron microscope (TEM: Transmission Electro n Microscope), the amorphous part contained in the CAAC-OS film and ​The boundary with the crystalline part is not clear. Also, no grain boundaries (also called grain boundaries ) can be confirmed in the CAAC-OS film by TEM. Therefore, in the CAAC-OS film, a decrease in electron mobility caused by grain boundaries is suppressed. (Also referred to as grain boundaries.)

[0066] The crystalline parts included in the CAAC-OS film have their c-axes aligned in a direction parallel to the normal vector of the surface to be formed of the CAAC-OS film or the normal vector of the surface, and have a triangular or hexagonal atomic arrangement when viewed from a direction perpendicular to the ab-plane, and when viewed from a direction perpendicular to the c-axis, the metal atoms are arranged in layers or the metal atoms and oxygen atoms are arranged in layers. Note that the directions of the a-axis and b-axis may be different between different crystalline parts. In this specification, when simply described as perpendicular, a range of 85° or more and 95° or less is also included. Also, when simply described as parallel, a range of -5° or more and 5° or less is also included.

[0067] Note that in the CAAC-OS film, the distribution of the crystalline parts may not be uniform. For example, when crystal growth is performed from the surface side of the oxide semiconductor film during the formation process of the CAAC-OS film, the proportion of the crystalline parts may be higher near the surface than near the surface to be formed. Also, by adding impurities to the CAAC-OS film, the crystalline parts may be amorphousized in the impurity-added region.

[0068] Since the c-axes of the crystalline parts included in the CAAC-OS film are aligned in a direction parallel to the normal vector of the surface to be formed of the CAAC-OS film or the normal vector of the surface, depending on the shape of the CAAC-OS film (the cross-sectional shape of the surface to be formed or the cross-sectional shape of the surface), they may point in different directions. Well, the direction of the c-axis of the crystal part is parallel to the normal vector of the surface to be formed or the surface normal vector when the CAAC-OS film is formed. The crystal part is formed by film formation or by performing a crystallization treatment such as heat treatment after film formation. Or it becomes a direction parallel to the surface normal vector. The crystal part is formed by film formation or by performing a crystallization treatment such as heat treatment after film formation. Or it is formed by performing a crystallization treatment such as heat treatment after film formation.

[0069] A transistor using a CAAC-OS film can reduce the change in electrical characteristics due to irradiation with visible light or ultraviolet light. Therefore, the transistor has high reliability. A transistor using a CAAC-OS film can reduce the change in electrical characteristics due to irradiation with visible light or ultraviolet light. Therefore, the transistor has high reliability.

[0070] The CAAC-OS film is formed, for example, by using a polycrystalline oxide semiconductor sputtering target and depositing the film by a sputtering method. When ions collide with the sputtering target, the crystal region contained in the sputtering target cleaves from the a-b plane and detaches as plate-shaped or pellet-shaped sputtering particles having a plane parallel to the a-b plane. In this case, when the plate-shaped sputtering particles reach the substrate while maintaining the crystal state, the CAAC-OS film can be formed. In this case, when the plate-shaped sputtering particles reach the substrate while maintaining the crystal state, the CAAC-OS film can be formed. In this case, when the plate-shaped sputtering particles reach the substrate while maintaining the crystal state, the CAAC-OS film can be formed. In this case, when the plate-shaped sputtering particles reach the substrate while maintaining the crystal state, the CAAC-OS film can be formed. In this case, when the plate-shaped sputtering particles reach the substrate while maintaining the crystal state, the CAAC-OS film can be formed.

[0071] Also, in order to form the CAAC-OS film, it is preferable to apply the following conditions.

[0072] By reducing the incorporation of impurities during film formation, it is possible to suppress the breakdown of the crystal state due to impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film formation chamber may be reduced. Also, the impurity concentration in the film formation gas may be reduced. Specifically, a film formation gas having a dew point of -80°C or lower, preferably -100°C or lower, is used. By reducing the incorporation of impurities during film formation, it is possible to suppress the breakdown of the crystal state due to impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film formation chamber may be reduced. Also, the impurity concentration in the film formation gas may be reduced. Specifically, a film formation gas having a dew point of -80°C or lower, preferably -100°C or lower, is used. By reducing the incorporation of impurities during film formation, it is possible to suppress the breakdown of the crystal state due to impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film formation chamber may be reduced. Also, the impurity concentration in the film formation gas may be reduced. Specifically, a film formation gas having a dew point of -80°C or lower, preferably -100°C or lower, is used. By reducing the incorporation of impurities during film formation, it is possible to suppress the breakdown of the crystal state due to impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film formation chamber may be reduced. Also, the impurity concentration in the film formation gas may be reduced. Specifically, a film formation gas having a dew point of -80°C or lower, preferably -100°C or lower, is used.

[0073] Also, by increasing the substrate heating temperature during film formation, the migration of sputtering particles after reaching the substrate can be Rationing occurs. Specifically, film formation is performed with the substrate heating temperature being 100°C or higher and 740°C or lower, preferably 200°C or higher and 500°C or lower. By increasing the substrate heating temperature during film formation, when flat sputtering particles reach the substrate, migration occurs on the substrate, and the flat surface of the sputtering particles adheres to the substrate.

[0074] Also, it is preferable to reduce the plasma damage during film formation by increasing the oxygen ratio in the film-forming gas and optimizing the power. The oxygen ratio in the film-forming gas is 30% by volume or higher, preferably 100% by volume.

[0075] As an example of a sputtering target, an In-Ga-Zn-O compound target is shown below.

[0076] InO X powder, GaO Y powder, and ZnO Z powder are mixed in a predetermined number of moles, and after pressure treatment they are heat-treated at a temperature of 1000°C or higher and 1500°C or lower to obtain a polycrystalline In-Ga -Zn-O compound target. Here, X, Y, and Z are arbitrary positive numbers. Here , the predetermined mole ratio is, for example, InO X powder, GaO Y powder, and ZnO Z powder being 2 :2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, or 3:1:2. Note that the type of powder and the mole ratio for mixing can be appropriately changed depending on the sputtering target to be produced.

[0077] (Embodiment 2) The semiconductor device according to one aspect of the present invention may have a configuration in which transistors are stacked. ​​​​. In particular, by using a transistor having the configuration shown in FIG. 4(A), the fourth conductive film 110 or the fourth conductive film 111 is made to function as a gate electrode, a source electrode, or a drain electrode of a lower transistor, thereby suppressing an increase in the element area due to the contact region and realizing miniaturization of the semiconductor device or reducing the number of manufacturing steps of the transistor. This can be achieved.

[0078] In the present embodiment, taking a memory device, which is one type of semiconductor device, as an example, a manufacturing method of a semiconductor device according to an aspect of the present invention, in which another transistor is provided below a transistor having the structure shown in FIG. 4(A), will be described. First, before describing the manufacturing method, the configuration of a memory cell included in the memory device will be described.

[0079] First, before explaining the manufacturing method, the configuration of the memory cell included in the memory device will be explained. .

[0080] FIG. 9(A) shows a circuit diagram of the memory cell. The memory cell shown in FIG. 9(A) includes a transistor 201, a transistor 202, and a capacitor element 203. The gate electrode of the transistor 202 is connected to the first word line WLa. Also, for the transistor 202, one of the source electrode and the drain electrode is connected to the data line DL, and the other is connected to the gate electrode of the transistor 201. For the transistor 201, one of the source electrode and the drain electrode is connected to the data line DL, and the other is connected to a node to which a predetermined potential is applied. One pair of electrodes of the capacitor element 203 is connected to the gate electrode of the transistor 201, and the other is connected to the second word line WLb. electrode is connected to the first word line WLa. Further, for the transistor 202, one of the source electrode and the drain electrode is connected to the data line DL, and the other is connected to the gate electrode of the transistor 201. For the transistor 201, one of the source electrode and the drain electrode is connected to the data line DL, and the other is connected to a node to which a predetermined potential is applied. One pair of electrodes of the capacitor element 203 is connected to the gate electrode of the transistor 201, and the other is connected to the second word line WLb. 01. One of the source electrode and the drain electrode of the transistor 201 is connected to the data line DL, and the other is connected to a node to which a predetermined potential is applied. One pair of electrodes of the capacitor element 203 is connected to the gate electrode of the transistor 201, and the other is connected to the second word line WLb. electrode is connected to the data line DL, and the other is connected to a node to which a predetermined potential is applied. One pair of electrodes of the capacitor element 203 is connected to the gate electrode of the transistor 201, and the other is connected to the second word line WLb. electrode is connected to the data line DL, and the other is connected to a node to which a predetermined potential is applied. One pair of electrodes of the capacitor element 203 is connected to the gate electrode of the transistor 201, and the other is connected to the second word line WLb. electrode of the transistor 201, and the other is connected to the second word line WLb.

[0081] In the memory cell shown in FIG. 9(A), when writing data, transistor 202 is turned on and the potential of the signal including data from the data line DL is applied to the gate electrode of transistor 201 through transistor 202. Then, according to the potential of the above signal, the charge amount accumulated in the gate capacitance of transistor 201 and capacitance element 203 is controlled, whereby data is written into transistor 201 and capacitance element 203.

[0082] And when holding data, transistor 202 is turned off, and the charge accumulated in the gate capacitance of transistor 201 and capacitance element 203 is held. When an oxide semiconductor is used for the semiconductor film of transistor 202, the off-current of transistor 202 can be made extremely small. Therefore, the accumulated charge is less likely to leak, and data can be held for a longer period compared to the case where a semiconductor material such as silicon is used for transistor 202.

[0083] When reading data, the potential of the second word line WLb is changed. Since the potential difference between the pair of electrodes of capacitance element 203 is maintained by the charge conservation law, the change in the potential of the second word line WLb is applied to the gate electrode of transistor 201. The threshold voltage of transistor 201 changes according to the charge amount accumulated in its gate capacitance. Therefore, by reading the difference in the charge amount from the magnitude of the drain current of transistor 201 obtained by changing the potential of the gate electrode of transistor 201, data can be read.

[0084] ​​​​​​​​​​​​​​Note that the semiconductor film of the transistor 201 may be an oxide semiconductor. Or alternatively, the semiconductor film of the transistor 201 may be a semiconductor such as silicon or germanium. By using an oxide semiconductor film for the semiconductor films of all the transistors in the memory cell, the process can be simplified. Further, by using a semiconductor having a higher mobility than the oxide semiconductor, such as polycrystalline or single-crystalline silicon, for the semiconductor film of the transistor 201, data can be read out from the memory cell at high speed. In the present embodiment, taking as an example the case where silicon is used for the semiconductor film of the lower-layer transistor 201 and an oxide semiconductor is used for the semiconductor film of the upper-layer transistor 202, a method for manufacturing the semiconductor device will be described. However, as described above, the lower-layer transistor 201 may use a semiconductor material such as germanium, silicon germanium, or single-crystalline silicon carbide in addition to silicon. Further, for example, a transistor using silicon can be formed using any single-crystalline semiconductor substrate such as a silicon wafer, a silicon thin film manufactured by the SOI method, or a silicon thin film manufactured by a vapor phase growth method. Alternatively, the lower-layer transistor 201 may use an oxide semiconductor in the same manner as the upper-layer transistor. In the present embodiment, first, as shown in FIG. 6(A), an insulating film 701 and a semiconductor film 702 separated from a single-crystalline semiconductor substrate are formed on a substrate 700. There is no significant limitation on the material that can be used as the substrate 700, but at least, subsequent processing

[0085]

[0086]

[0087] It is necessary to have heat resistance to withstand heat treatment. For example, for the substrate 700, , a glass substrate, a quartz substrate, a semiconductor substrate, a ceramic substrate, etc. produced by the fusion method or the float method can be used. When the temperature of the subsequent heat treatment is high , it is advisable to use one with a strain point of 730 °C or higher.

[0088] Also, in this embodiment, taking the case where the semiconductor film 702 is single-crystalline silicon as an example, the manufacturing method of the transistor 201 will be described below. Note that an example of the manufacturing method of a specific single-crystalline semiconductor film 702 will be briefly described. First, on a bond substrate that is a single-crystalline semiconductor substrate, an ion beam composed of ions accelerated by an electric field is implanted, and a brittle layer that is locally weakened by disturbing the crystal structure is formed in a region with a certain depth from the surface of the bond substrate. The depth of the region where the brittle layer is formed can be adjusted by the acceleration energy of the ion beam and the incident angle of the ion beam . Then, the bond substrate and the substrate 700 on which the insulating film 701 is formed are bonded together so that the insulating film 701 is sandwiched therebetween. The bonding is performed by overlapping the bond substrate and the substrate 700, and then applying a pressure of 1 N / cm 2 or more and 500 N / cm 2 or less, preferably 11 N / cm 2 or more and 20 N / cm 2 or less to the part. When pressure is applied, the bond substrate and the insulating film 701 start to bond from that part, and finally the bonding spreads over the entire adhered surface. Next, by performing heat treatment, the volume of the microvoids existing in the brittle layer increases, and the microvoids combine with each other. As a result, a single-crystalline semiconductor film that is a part of the bond substrate separates from the bond substrate in the brittle layer. Above The temperature of the heat treatment is set so as not to exceed the strain point of the substrate 700. The conductive film is processed into a desired shape by etching or the like to form a semiconductor film 702. This can be done.

[0089] The semiconductor film 702 is doped with boron, aluminum, gallium, or the like to control the threshold voltage. Impurity elements that impart p-type conductivity, or impart n-type conductivity such as phosphorus or arsenic An impurity element may be added. The addition of an impurity element to control the threshold voltage is performed by patterning. It may be performed on the semiconductor film before patterning, or on the semiconductor film 7 formed after patterning. The addition of impurity elements to control the threshold voltage may be performed on the BN layer. Alternatively, the addition of impurity elements may be performed on the substrate to roughly adjust the threshold voltage. To fine-tune the threshold voltage, the device is patterned on a bond substrate. This is performed on the previous semiconductor film or on the semiconductor film 702 formed by patterning. That's fine.

[0090] In this embodiment mode, an example in which a single crystal semiconductor film is used is described. For example, a multilayer film formed on the insulating film 701 by vapor deposition may be used. A crystalline, microcrystalline, or amorphous semiconductor film may be used, and the semiconductor film may be sintered by a known technique. Known crystallization methods include laser crystallization using laser light, catalytic element crystallization, and the like. Alternatively, a crystallization method using a catalytic element and a laser crystallization method may be combined. In addition, when a substrate with excellent heat resistance such as quartz is used, In this case, thermal crystallization method using an electric furnace, lamp annealing crystallization method using infrared light, catalytic element A crystallization method using a high-temperature annealing method at about 950 °C may also be used.

[0091] Next, as shown in FIG. 6(B), after forming a gate insulating film 703 on the semiconductor film 702, a mask 705 is formed on the gate insulating film 703, and an impurity region 704 is formed by adding an impurity element imparting conductivity to a part of the semiconductor film 702.

[0092] The gate insulating film 703 can be formed by oxidizing or nitriding the surface of the semiconductor film 70 2 by performing high-density plasma treatment, heat treatment, etc. The high-density plasma treatment is, for example performed using a mixed gas of a noble gas such as He, Ar, Kr, Xe and oxygen, nitrogen oxide, ammonia, nitrogen, hydrogen, etc. In this case, plasma excitation is performed by introducing microwaves, and a high-density plasma can be generated at a low electron temperature. Such a high-density plasma generated oxygen radicals (which may include OH radicals) or nitrogen radicals (which may include NH radicals) oxidize or nitride the surface of the semiconductor film, and an insulating film of 1 to 20 nm, preferably 5 to 10 nm, can be formed in contact with the semiconductor film. For example, nitrous oxide (N2O) is diluted with Ar by 1 to 3 times (flow rate ratio), and a microwave (2.45 GHz) power of 3 kW to 5 kW is applied at a pressure of 10 Pa to 30 Pa to oxidize or nitride the surface of the semiconductor film 702. By this treatment, an insulating film of 1 nm to 10 nm (preferably 2 nm to 6 nm) is formed. Further, nitrous oxide (N2O) and silane (SiH4) are introduced, and a microwave (2.45 GHz ) power of 3 kW to 5 kW is applied at a pressure of 10 Pa to 30 Pa to form a silicon oxynitride film by vapor phase growth to form a gate insulating film. By combining the reaction by solid-phase reaction and vapor-phase growth method, a gate insulating film with low interface state density and excellent breakdown voltage can be formed.

[0093] Since the oxidation or nitridation of the semiconductor film by the above-described high-density plasma treatment proceeds by solid-phase reaction, the interface state density between the gate insulating film 703 and the semiconductor film 702 can be made extremely low. Also by directly oxidizing or nitriding the semiconductor film 702 by high-density plasma treatment, the variation in the thickness of the formed insulating film can be suppressed. Further, when the semiconductor film has crystallinity, by oxidizing the surface of the semiconductor film by solid-phase reaction using high-density plasma treatment, the oxidation that rapidly proceeds only at the crystal grain boundaries is suppressed, and a gate insulating film with good uniformity and low interface state density can be formed. A transistor formed by including the insulating film formed by high-density plasma treatment in part or all of the gate insulating film can suppress the variation in characteristics.

[0094] Also, using a plasma CVD method, sputtering method, etc., a film containing silicon oxide, silicon oxynitride, silicon nitroxide, silicon nitride, hafnium oxide, aluminum oxide, tantalum oxide, yttrium oxide, hafnium silicate (HfSi O x O y (x > 0, y > 0)), hafnium silicate with nitrogen added (HfSi O x O y (x > 0, y > 0)), hafnium aluminate with nitrogen added (HfAl O x O y (x > 0, y > 0)), etc. may be formed into a single layer or stacked to form the gate insulating film 703.

[0095] Note that in this specification, the oxynitride has a composition with a higher oxygen content than nitrogen, and the nitride oxide has a composition with a higher nitrogen content than oxygen. This is what is meant by the substance.

[0096] The thickness of the gate insulating film 703 can be, for example, 1 nm or more and 100 nm or less, preferably 10 nm or more and 50 nm or less. In this embodiment, a single-layer insulating film containing silicon oxide is used as the gate insulating film 703 by using the plasma CVD method.

[0097] Next, after removing the mask 705, as shown in FIG. 6(C), a part of the gate insulating film 703 is removed, and an opening 706 is formed in the region overlapping the impurity region 704 by etching or the like. Then, the conductive film 707 and the conductive film 708 are formed. The conductive film 707 functions as the gate electrode of the transistor 201 and the source electrode or drain electrode of the transistor 202. Also, the conductive film 708 functions as the source electrode or drain electrode of the transistor 201 and the source electrode or drain electrode of the transistor 202.

[0098] The conductive film 707 and the conductive film 708 can be formed by forming a conductive film so as to cover the opening 706 and then processing (patterning) the conductive film into a predetermined shape. The conductive film 708 is in contact with the impurity region 704 at the opening 706. For the formation of the above conductive film, a CVD method, a sputtering method, a vapor deposition method, a spin coating method, or the like can be used. Also, for the conductive film, tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), etc. can be used. ​​​​​​​​​​This can be achieved. An alloy with the above metal as the main component may be used, or a compound containing the above metal may be used. Alternatively, a semiconductor such as polycrystalline silicon doped with impurity elements such as phosphorus that impart conductivity to the semiconductor film may be used.

[0099] Note that in this embodiment, the conductive films 707 and 708 are formed as single-layer conductive films, but this embodiment is not limited to this configuration. The conductive films 707 and 708 may be formed of a plurality of laminated conductive films.

[0100] As a combination of two conductive films, tantalum nitride or tantalum can be used for the first layer, and tungsten can be used for the second layer. In addition to the above example, tungsten nitride and tungsten, molybdenum and molybdenum, aluminum and tantalum, aluminum and titanium, etc. can be mentioned. Since tungsten and tantalum nitride have high heat resistance, heat treatment for the purpose of thermal activation can be performed in the process after forming the two-layer conductive film. Also, as a combination of two conductive films, for example, silicon doped with an impurity element that imparts n-type conductivity and nickel silicide, silicon doped with an impurity element that imparts n-type conductivity and tungsten silicide, etc. can also be used.

[0101] In the case of a three-layer structure in which three conductive films are laminated, a laminated structure of a molybdenum film, an aluminum film, and a molybdenum film may be adopted.

[0102] In addition, indium oxide, indium tin oxide mixture, indium zinc oxide mixture, zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride, etc. can be used for the conductive films 707 and 708. ​​​​​​​​​​​It is also possible to use a translucent oxide conductive film such as minimum or zinc gallium oxide. .

[0103] Note that the conductive film 707 and the conductive film 708 may be selectively formed without using a mask by using a droplet discharge method. The droplet discharge method means a method of forming a predetermined pattern by discharging or ejecting droplets containing a predetermined composition from pores, and the inkjet method and the like are included in this category. .

[0104] In addition, after forming the conductive films 707 and 708, the conductive films 707 and 708 can be etched to have a desired tapered shape by using an ICP (Inductive ly Coupled Plasma) etching method and appropriately adjusting the etching conditions (the amount of power applied to the coil-shaped electrode layer, the amount of power applied to the electrode layer on the substrate side , the electrode temperature on the substrate side, etc.). In addition, the tapered shape can also control the angle, etc. depending on the shape of the mask. Note that as the etching gas, chlorine-based gases such as chlorine, boron chloride, silicon chloride or carbon tetrachloride, fluorine-based gases such as carbon tetrafluoride, sulfur fluoride or nitrogen fluoride, or oxygen can be appropriately used. .

[0105] Next, as shown in FIG. 6(D), by adding an impurity element that imparts conductivity to the semiconductor film 702 using the conductive films 707 and 708 as masks, a channel formation region 710 that overlaps with the conductive film 707, a pair of impurity regions 709 that sandwich the channel formation region 710, and an impurity region 711 in which an impurity element is further added to a part of the impurity region 704 are formed in the semiconductor film 7 02. .

[0106] In this embodiment, an impurity element (for example, boron) that imparts p-type conductivity is added to the semiconductor film 702. Let us take the following example.

[0107] Next, as shown in FIG. 7(A), the gate insulating film 703, the conductive film 707, and the conductive film 708 are Insulating films 712 and 713 are formed to cover the insulating film 712 and the insulating film 713. 713 is silicon oxide, silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum nitride, nitride An inorganic insulating film such as aluminum oxide can be used. By using a low-k material for the film 713, it is possible to overlap various electrodes and wiring. This is preferable because it is possible to sufficiently reduce the capacitance caused by the insulating film 712. The insulating film 713 may be a porous insulating film made of the above-mentioned material. Since the dielectric constant is lower than that of a high-density insulating film, the parasitic capacitance caused by electrodes and wiring can be reduced. Further reductions are possible.

[0108] In this embodiment mode, the insulating film 712 is made of silicon oxynitride, and the insulating film 713 is made of silicon nitride oxide. In this embodiment, the conductive film 707 and the conductive film 708 are formed on the conductive film 707 and the conductive film 708. In the example shown, insulating films 712 and 713 are formed on the conductive film 7 Only one insulating layer may be formed over the conductive film 707 and the conductive film 708, or a plurality of insulating layers of three or more may be formed. The insulating film may be formed by laminating layers.

[0109] Next, as shown in FIG. 7B, the insulating film 712 and the insulating film 713 are subjected to CMP or etching. By performing etching or the like, the surfaces of the conductive films 707 and 708 are exposed. , an insulating film 712, an insulating film 202, and an insulating film 302 are formed in order to improve the characteristics of the transistor 202 to be formed later. It is preferable to make the surface of 713 as flat as possible.

[0110] Through the above steps, the transistor 201 can be formed.

[0111] Next, a method for manufacturing the transistor 202 will be described. First, as shown in FIG. 7(C), a conductive film 714 and a conductive film 715 are formed on the conductive film 707 or the conductive film 708. The conductive film 714 and the conductive film 715 function as the source electrode or the drain electrode of the transistor 202.

[0112] Specifically, after forming the conductive film 714 and the conductive film 715 on the conductive film 707, the conductive film 708, the insulating film 712, and the insulating film 713 by sputtering or vapor deposition so as to cover them, the conductive film is processed (patterned) into a predetermined shape, whereby they can be formed. Further, in order to ensure good step coverage of the oxide semiconductor film 716 formed on the conductive film 714 and the conductive film 715 later, it is desirable that the ends thereof have a tapered shape and that the film thickness thereof is small. Specifically, the taper angle at the ends of the conductive film 714 and the conductive film 715 is desirably 20 degrees or more and 80 degrees or less, more preferably 30 degrees or more and 60 degrees or less. Also, specifically, the film thickness of the conductive film 714 and the conductive film 715 is desirably 10 nm or more and 300 nm or less, more preferably 100 nm or more and 200 nm or less. The conductive film that becomes the conductive film 714 and the conductive film 715 is an element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, or an alloy containing the above-described elements as components.

[0113] Examples include gold or alloy films combining the above-described elements. Also, metals such as aluminum and copper It is also possible to have a structure in which a refractory metal film such as chromium, tantalum, titanium, molybdenum, or tungsten is laminated on the lower or upper side of the metal film of . Also, aluminum or copper is preferably used in combination with a refractory metal material in order to avoid problems of heat resistance and corrosiveness. As the refractory metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, yttrium, etc. can be used.

[0114] Also, the conductive films that become the conductive film 714 and the conductive film 715 may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on the aluminum film, a three-layer structure in which a titanium film is laminated with an aluminum film on top of the titanium film, and then a titanium film is formed on top of that, etc. can be mentioned. Also, Cu-Mg -Al alloy, Cu-Mg-O mixed oxide, Cu-Ca-O mixed oxide, Cu-Mg-Al -O mixed oxide, Mo-Ti alloy, Ti, and Mo have high adhesion to the oxide film. Therefore, the lower layer is composed of a conductive film composed of Cu-Mg-Al alloy, Cu-Mg-O mixed oxide, Cu-Ca-O mixed oxide, C u-Mg-Al-O mixed oxide, Mo-Ti alloy, Ti, or Mo, and the upper layer is a conductive film composed of Cu with a low resistance value laminated, and the laminated conductive film is used for the conductive film 714 and the conductive film 715. By doing so, when the insulating film 712 or the insulating film 713 is an oxide film , the adhesion between the insulating film 712 or the insulating film 713 and the conductive film 714 and the conductive film 715 can be increased, and at the same time, the resistance values of the conductive film 714 and the conductive film 715 can be kept small. 714 and the conductive film 715, and when the insulating film 712 or the insulating film 713 is an oxide film , the adhesion between the insulating film 712 or the insulating film 713 and the conductive film 714 and the conductive film 715 can be increased, and at the same time, the resistance values of the conductive film 714 and the conductive film 715 can be kept small.

[0115] Further, as the conductive films that become the conductive films 714 and 715, they may be formed of a conductive metal oxide. As the conductive metal oxide, indium oxide, tin oxide, zinc oxide, indium tin oxide mixture, indium zinc oxide mixture, or a material in which silicon or silicon oxide is added to the metal oxide material can be used.

[0116] Next, as shown in FIG. 8(A), an oxide semiconductor film 716 is formed on the conductive films 714 and 715. The oxide semiconductor film 716 has an opening 717 on the conductive film 714 and has an opening 718 on the conductive film 715. The oxide semiconductor film 716 can be formed by processing the insulating films 712 and 713 and the oxide semiconductor film formed on the conductive films 714 and 715 into the above shape.

[0117] The film thickness of the above oxide semiconductor film is 2 nm or more and 200 nm or less, preferably 3 nm or more and 50 nm or less, and more preferably 3 nm or more and 20 nm or less. The oxide semiconductor film is formed by sputtering using an oxide semiconductor as a target. Further, the oxide semiconductor film can be formed by sputtering in a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas (for example, argon) and oxygen.

[0118] The oxide semiconductor film includes indium oxide, tin oxide, zinc oxide, binary metal oxides such as In-Zn based oxide, Sn-Zn based oxide, Al-Zn based oxide, Zn-Mg based oxide, Sn-Mg based oxide, In-Mg based oxide, In-Ga based oxide, and ternary metal oxides such as In-Ga-Zn based oxide (also denoted as IGZO), In-Al ​​​​​​​​​ -Zn-based oxides, In-Sn-Zn-based oxides, Sn-Ga-Zn-based oxides, Al-Ga- Zn-based oxides, Sn-Al-Zn-based oxides, In-Hf-Zn-based oxides, In-La-Z n-based oxides, In-Ce-Zn-based oxides, In-Pr-Zn-based oxides, In-Nd-Zn -based oxides, In-Sm-Zn-based oxides, In-Eu-Zn-based oxides, In-Gd-Zn-based oxides, In-Tb-Zn-based oxides, In-Dy-Zn-based oxides, In-Ho-Zn-based ox ides, In-Er-Zn-based oxides, In-Tm-Zn-based oxides, In-Yb-Zn-based oxida tion, In-Lu-Zn-based oxides, In-Sn-Ga-Zn-based oxides which are oxides of quaternary metals, In-Hf-Ga-Zn-based oxides, In-Al-Ga-Zn-based oxides, In-Sn -Al-Zn-based oxides, In-Sn-Hf-Zn-based oxides, In-Hf-Al-Zn-based ox ides can be used. Further, the above oxide semiconductor may contain silicon.

[0119] In this embodiment, a 30-nm-thick In-Ga-Zn-based oxide semiconductor thin film obtained by a sputtering method using a target containing In (indium), Ga (gallium), and Zn (zinc) is used as the oxide semiconductor film. As the target, for example, an oxide target having a composition of In2O3:Ga2O3:ZnO = 1:1:1 [mole ratio] is used. Further, an oxide target of In2O3:Ga2O3:ZnO = 1:1:2 [mole ratio] may be used. Further, the filling rate of the target containing In, Ga, and Zn is 90% or more and 100% or less, preferably 95% or more and less than 100%. By using a target with a high filling rate, the formed oxide semiconductor film becomes a dense film.

[0120] Also, when using an In-Zn-based oxide as the oxide semiconductor, the number of atoms of the metal element in the target used is such that In:Zn = 50:1 to 1:2 (when converted to molar ratio, In2O3: ZnO = 25:1 to 1:4), preferably In:Zn = 20:1 to 1:1 (when converted to molar ratio to In2O3:ZnO = 10:1 to 1:2), more preferably In:Zn = 1 5:1 to 1.5:1 (when converted to molar ratio, In2O3:ZnO = 15:2 to 3:4) is used. For example, for the target used to form an In-Zn-based oxide semiconductor, when the atomic ratio is In :Zn:O = X:Y:Z, then Z > 1.5X + Y.

[0121] Also, for the target used for an In-Sn-Zn-based oxide, the atomic ratio of the metal elements in the target is such that In:Sn:Zn = 1:2:2, 2:1:3, 1:1:1, or 20:45: 35, etc., and an oxide target is used.

[0122] In this embodiment, a substrate is held in a processing chamber maintained in a reduced-pressure state, and while removing the residual moisture in the processing chamber, a sputtering gas from which hydrogen and moisture have been removed is introduced, and an oxide semiconductor film is formed using the above target. During film formation, the substrate temperature may be 100°C or higher and 600°C or lower, preferably 200°C or higher and 400°C or lower. By forming the film while heating the substrate, the impurity concentration in the formed oxide semiconductor film can be reduced. Also, damage due to sputtering is reduced. To remove the residual moisture in the processing chamber, it is preferable to use an adsorption-type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Also, as the exhaust means, it is preferable to use a turbo pump with a co- r. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Also, as the exhaust means, a turbo pump with a co- r is used. ​It may be added with a cold trap. When evacuating the processing chamber using a cryopump , for example, compounds containing hydrogen atoms such as hydrogen atoms, water (H2O), etc. (more preferably compounds containing carbon atoms as well) are evacuated, so that the concentration of impurities contained in the oxide semiconductor film formed in the processing chamber can be reduced.

[0123] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa , a DC (direct current) power source of 0.5 kW, and conditions under an oxygen (oxygen flow ratio 100%) atmosphere are applied . Note that when using a pulsed DC power source, the dust generated during film formation can be reduced, and the film thickness distribution becomes uniform, which is preferable.

[0124] Note that the etching for forming the oxide semiconductor film 716 may be dry etching, wet etching, or both may be used. As the etching gas used for dry etching, gases containing chlorine (chlorine-based gases such as chlorine (Cl2), boron trichloride (BCl 3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc.) are preferable. Also, gases containing fluorine (fluorine-based gases such as carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr), oxygen (O2), gases obtained by adding noble gases such as helium (He) and argon (Ar) to these gases, etc. can be used.

[0125] As the dry etching method, a parallel plate type RIE (Reactive Ion Etch ing) method or an ICP (Inductively Coupled Plasma: inductively coupled plasma) etching method can be used. Etching can be performed into a desired shape. Adjust the sea urchin and etching conditions (the amount of electric power applied to the coil-shaped electrode, the amount of electric power applied to the electrode on the substrate side, the electrode temperature on the substrate side, etc.) as appropriate. The amount of electric power applied to the electrode on the substrate side, the electrode temperature on the substrate side, etc.) are adjusted as appropriate.

[0126] As the etching solution used for wet etching, a solution obtained by mixing phosphoric acid, acetic acid, and nitric acid, or an organic acid such as citric acid or oxalic acid can be used. In this embodiment, ITO-07N (manufactured by Kanto Chemical Co., Inc.) is used. (manufactured by Kanto Chemical Co., Inc.) is used.

[0127] A resist mask for forming the oxide semiconductor film 716 may be formed by an inkjet method. When the resist mask is formed by the inkjet method, since a photomask is not used, the manufacturing cost can be reduced. the manufacturing cost can be reduced.

[0128] Note that the oxide semiconductor film formed by sputtering or the like may contain a large amount of moisture or hydrogen (including a hydroxyl group) as an impurity. Since moisture or hydrogen easily forms a donor level, it is an impurity for the oxide semiconductor. Therefore, in one aspect of the present invention, in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film (dehydration or dehydrogenation), it is an impurity for the oxide semiconductor. Therefore, in one aspect of the present invention, in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film (dehydration or dehydrogenation), the oxide semiconductor film 716 is heat-treated in a reduced-pressure atmosphere, an inert gas atmosphere such as nitrogen or a rare gas, an oxygen gas atmosphere, or an ultra-dry air (when measured using a dew point meter of the CRDS (cavity ring-down laser spectroscopy) method, the moisture content is 20 ppm or less (dew point conversion: -55 °C), preferably 1 ppm or less, preferably 10 ppb or less of air) atmosphere. method, the moisture content is 20 ppm or less (dew point conversion: -55 °C), preferably 1 ppm or less, preferably 10 ppb or less of air) atmosphere. the oxide semiconductor film 716 is heat-treated.

[0129] By subjecting the oxide semiconductor film 716 to heat treatment, the moisture or hydrogen in the oxide semiconductor film 716 can be detached. Specifically, heat treatment may be performed at a temperature of 250°C or higher and 750°C or lower, preferably 400 °C or higher and lower than the strain point of the substrate. For example, it may be performed at about 500°C for 3 minutes or more and 6 minutes or less. If the RTA method is used for the heat treatment, dehydration or dehydration fluorination can be performed in a short time, so that the treatment can be performed even at a temperature exceeding the strain point of the glass substrate.

[0130] In this embodiment, an electric furnace, which is one of the heat treatment apparatuses, is used. Note that the heat treatment apparatus is not limited to an electric furnace, and may be provided with an apparatus that heats an object to be treated by heat conduction or heat radiation from a heating element such as a resistance heating element. For example, an RTA (Rapid Thermal Anneal) apparatus such as a GRTA (Gas Rapid Therm al Anneal) apparatus or an LRTA (Lamp Rapid Thermal Ann eal) apparatus may be used. The LRTA apparatus is an apparatus that heats an object to be treated by radiation of light (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, and high-pressure mercury lamps. The GRTA apparatus is an apparatus that performs heat treatment using high-temperature gas. As the gas, an inert gas such as argon or the like, or an inert gas such as nitrogen that does not react with the object to be treated by heat treatment is used. In the heat treatment, it is preferable that nitrogen or a rare gas such as helium, neon, or argon does not contain moisture or water element. Alternatively, the purity of nitrogen or a rare gas such as helium, neon, or argon introduced into the heat treatment apparatus is 6N (99.9999%) or higher, preferably 7 N (99.99999%) or higher (that is, the impurity concentration is 1 ppm or less, preferably 0.1 p pm or less).

[0131] ​​​​​​pm or less).

[0132] Note that oxide semiconductors are insensitive to impurities, and the film contains a considerable amount of metal impurities. There is no problem even if it is used in a low-cost sodalite, which contains a large amount of alkali metals such as sodium. It has been pointed out that ash glass can also be used (Kamiya, Nomura, Hosono, "Amorphous Oxide Semiconductors" "Current Status of Physical Properties and Device Development," Solid State Physics, September 2009, Vol. 44, pp. 62 1-633.) However, this is not an appropriate indication. Alkali metals do not form oxide semiconductors. Alkaline earth metals are not constituent elements of oxide semiconductors, so they are considered impurities. In particular, Na, among alkali metals, is an impurity when it is not an element that is present in the alloy. When the insulating film in contact with the semiconductor film is an oxide, Na diffuses into the insulating film. + It becomes. In addition, Na breaks the bond between the metal and oxygen that constitute the oxide semiconductor in the oxide semiconductor film. As a result, for example, the threshold voltage may change in the negative direction. This shift leads to deterioration of transistor characteristics, such as normally-on and reduced mobility. This impurity causes transistor characteristics to vary. The deterioration and variation of the characteristics occur when the hydrogen concentration in the oxide semiconductor film is sufficiently low. Therefore, the hydrogen concentration in the oxide semiconductor film is 1×10 18 / cm 3 below, Especially 1×10 17 / cm 3 If the concentration of the impurities is less than 100%, it is desirable to reduce the concentration of the impurities. Specifically, the measured value of the Na concentration by secondary ion mass spectrometry is 5 × 10 16 / cm 3 Less than 1 × 1016 / cm 3 Hereinafter, more preferably 1×10 15 / cm 3 or less. Similarly, the measured value of the Li concentration is 5×10 / cm 15 or less, preferably 3 1×10 / cm 15 or less. Similarly, the measured value of the K concentration is 5×10 3 / c 15 m Hereinafter, preferably 1×10 3 / cm 15 or less. 3

[0133] By the above process, the concentration of hydrogen in the oxide semiconductor film 716 can be reduced and purified to a high purity. Thereby, the oxide semiconductor film can be stabilized. Also, by heat treatment at a temperature equal to or lower than the glass transition temperature, an oxide semiconductor film with an extremely low carrier density and a wide bandgap can be formed. Therefore, a transistor can be manufactured using a large-area substrate, and mass productivity can be improved. Also, by using the oxide semiconductor film with the reduced and purified hydrogen concentration, a transistor with high breakdown voltage and extremely low off-current can be manufactured.

[0134] Note that the oxide semiconductor film may be amorphous or may have crystallinity. As the oxide semiconductor film having crystallinity, an oxide semiconductor including a crystal having a c-axis orientation (CAAC: C Axis Aligned Crystal) can also obtain the effect of improving the reliability of the transistor, so it is preferable.

[0135] The oxide semiconductor film composed of CAAC can also be manufactured by a sputtering method. To obtain CAAC by sputtering, the oxide semiconductor film must be deposited at the initial stage. The crystals are grown using the hexagonal crystals as seeds. To achieve this, it is important to keep the distance between the target and the substrate as large as possible (for example, For example, about 150 mm to 200 mm), and the substrate heating temperature is set to 100°C to 500°C, preferably 20 The temperature is preferably 0 to 400°C, more preferably 250 to 300°C. In addition, the deposited oxide semiconductor film is heat-treated at a temperature higher than the substrate heating temperature during film formation. This makes it possible to repair micro defects contained in the film and defects at the interface of the stacked layers.

[0136] CAAC-OS(C Axis Aligned Crystalline Oxide Compared to amorphous oxide semiconductors, amorphous oxide semiconductors are made of metal and oxygen bonds. In other words, when the oxide semiconductor is amorphous, the individual metal atoms form an ordered structure. The coordination number of the metal atom in CAAC-OS is almost constant. Therefore, microscopic oxygen vacancies are reduced, and hydrogen atoms (including hydrogen ions) and alkalis are released. This has the effect of reducing charge transfer and instability due to the release and bonding of lithium metal atoms.

[0137] Therefore, a transistor can be manufactured using an oxide semiconductor film formed of CAAC-OS. After applying light or bias-thermal stress (BT) to the transistor, The amount of change in the threshold voltage of the transistor that occurs can be reduced. Therefore, a transistor having the desired electrical characteristics can be manufactured.

[0138] Next, as shown in FIG. 8B, a conductive film in contact with the conductive film 714 and the oxide semiconductor film 716 is Form a film 719 and a conductive film 720 that is in contact with the conductive film 715 and the oxide semiconductor film 716. . The conductive film 719 and the conductive film 720 can be formed using the same materials, the same laminated structure, and the same manufacturing method as the conductive film 714 and the conductive film 715.

[0139] Note that in the etching for forming the conductive film 719 and the conductive film 720, appropriate adjustments are made to the respective materials and etching conditions so that the oxide semiconductor film 716 is not removed as much as possible. Depending on the etching conditions, a groove (recess) may be formed when a part of the exposed portion of the oxide semiconductor film 716 is etched.

[0140] In this embodiment, a titanium film is used for the conductive film 719 and the conductive film 720. Therefore, a solution containing ammonia and hydrogen peroxide water (ammonia peroxide water) can be used to selectively wet-etch the conductive film 719 and the conductive film 720. Specifically, ammonia peroxide water in which 31 wt% hydrogen peroxide water, 28 wt% ammonia water, and water are mixed at a volume ratio of 5:2:2 is used. Alternatively, a gas containing chlorine (Cl2), boron trichloride (BCl3), etc. can be used to dry-etch the conductive film.

[0141] Also, a metal oxide film having conductivity such as zinc oxide, aluminum zinc oxide, aluminum zinc nitride oxide, or gallium zinc oxide may be provided between the oxide semiconductor film 716 and the conductive film 719 and the conductive film 720 that function as a source electrode or a drain electrode. For example, when forming the metal oxide film, the patterning for forming the metal oxide film and the patterning for forming the conductive film 719 and the conductive film 720 may be performed together. ​​​​​​​is also acceptable. By providing the above metal oxide film, the resistance between the oxide semiconductor film 716, the conductive film 719, and the conductive film 720 can be reduced, enabling high-speed operation of the transistor. Also, by providing the metal oxide film, the breakdown voltage of the transistor can be increased.

[0142] Next, plasma treatment using a gas such as N2O, N2, or Ar may be performed. This plasma treatment removes water and the like adhering to the surface of the exposed oxide semiconductor film. Also, plasma treatment may be performed using a mixed gas of oxygen and argon.

[0143] Note that after the plasma treatment, as shown in FIG. 8(C), a gate insulating film 721 is formed so as to cover the conductive film 719, the conductive film 72 0, and the oxide semiconductor film 716. Then, on the gate insulating film 721, a conductive film 722 is formed at a position overlapping the oxide semiconductor film 716, and a conductive film 723 is formed at a position overlapping the conductive film 719. The conductive film 722 functions as a gate electrode of the transistor 202.

[0144] The gate insulating film 721 can be formed using the same material and the same laminated structure as the gate insulating film 703. Note that the gate insulating film 721 desirably contains as little moisture and impurities such as hydrogen as possible, and may be a single-layer insulating film or a laminated structure composed of a plurality of insulating films. If hydrogen is contained in the gate insulating film 721, the hydrogen may penetrate into the oxide semiconductor film 716, or the hydrogen may extract oxygen from the oxide semiconductor film 716, causing the oxide semiconductor film 716 to have a lower resistance (become n-type) and potentially form a parasitic channel. film 716, and the hydrogen may extract oxygen from the oxide semiconductor film 716, resulting in the oxide semiconductor film 716 having a lower resistance (n-type conversion) and potentially forming a parasitic channel. ​​That is, it is important that the hydrogen is not used in the film formation method so that the gate insulating film 721 becomes a film containing as little hydrogen as possible. It is desirable to use a material with high barrier properties for the gate insulating film 721. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used. When using a stacked insulating film, an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen content ratio is formed closer to the oxide semiconductor film 716 than the insulating film with high barrier properties. Then, with an insulating film with a low nitrogen content ratio sandwiched therebetween, a high-barrier insulating film is formed so as to overlap with the conductive film 719, the conductive film 720, and the oxide semiconductor film 716. By using the high-barrier insulating film, it is possible to prevent impurities such as moisture or hydrogen from entering the oxide semiconductor film 716, the gate insulating film 721, or the interface between the oxide semiconductor film 716 and other insulating films and its vicinity. Also, by forming an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen ratio so as to be in contact with the oxide semiconductor film 716, it is possible to prevent the insulating film using a high-barrier material from directly contacting the oxide semiconductor film 716. In the present embodiment, the gate insulating film 721 has a structure in which a 100-nm-thick silicon nitride film formed by sputtering is laminated on a 200-nm-thick silicon oxide film formed by sputtering. The substrate temperature during film formation may be room temperature or higher and 300°C or lower, and in this embodiment, it is 100°C. Note that after forming the gate insulating film 721, a heat treatment may be performed. The heat treatment is carried out in nitrogen. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used. When using a stacked insulating film, an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen content ratio is formed closer to the oxide semiconductor film 716 than the insulating film with high barrier properties. Then, with an insulating film with a low nitrogen content ratio sandwiched therebetween, a high-barrier insulating film is formed so as to overlap with the conductive film 719, the conductive film 720, and the oxide semiconductor film 716. By using the high-barrier insulating film, it is possible to prevent impurities such as moisture or hydrogen from entering the oxide semiconductor film 716, the gate insulating film 721, or the interface between the oxide semiconductor film 716 and other insulating films and its vicinity. Also, by forming an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen ratio so as to be in contact with the oxide semiconductor film 716, it is possible to prevent the insulating film using a high-barrier material from directly contacting the oxide semiconductor film 716. In the present embodiment, the gate insulating film 721 has a structure in which a 100-nm-thick silicon nitride film formed by sputtering is laminated on a 200-nm-thick silicon oxide film formed by sputtering. The substrate temperature during film formation may be room temperature or higher and 300°C or lower, and in this embodiment, it is 100°C. Note that after forming the gate insulating film 721, a heat treatment may be performed. The heat treatment is carried out in nitrogen. That is, it is important that the hydrogen is not used in the film formation method so that the gate insulating film 721 becomes a film containing as little hydrogen as possible.

[0145] It is desirable to use a material with high barrier properties for the gate insulating film 721. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used. When using a stacked insulating film, an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen content ratio is formed closer to the oxide semiconductor film 716 than the insulating film with high barrier properties. Then, with an insulating film with a low nitrogen content ratio sandwiched therebetween, a high-barrier insulating film is formed so as to overlap with the conductive film 719, the conductive film 720, and the oxide semiconductor film 716.

[0146] By using the high-barrier insulating film, it is possible to prevent impurities such as moisture or hydrogen from entering the oxide semiconductor film 716, the gate insulating film 721, or the interface between the oxide semiconductor film 716 and other insulating films and its vicinity. , in an atmosphere of ultra-dry air or a rare gas (such as argon or helium), preferably It is carried out at 200 °C or higher and 400 °C or lower, for example, 250 °C or higher and 350 °C or lower. The above gas has a water content of 20 ppm or less, preferably 1 ppm or less, more preferably 10 ppb or less is desirable. In this embodiment, for example, heat treatment is carried out at 250 °C for 1 hour under a nitrogen atmosphere. Alternatively, before forming the conductive film 719 and the conductive film 720, a high-temperature short-time RT A treatment may be performed in the same manner as the previous heat treatment performed on the oxide semiconductor film for reducing moisture or hydrogen. After the gate insulating film 721 containing oxygen is provided, by performing heat treatment, even if oxygen deficiency has occurred in the oxide semiconductor film 716 due to the previous heat treatment performed on the oxide semiconductor film 716, oxygen is supplied from the gate insulating film 721 to the oxide semiconductor film 716. And, by supplying oxygen to the oxide semiconductor film 716, it is possible to reduce the oxygen deficiency serving as a donor in the oxide semiconductor film 716 and satisfy the stoichiometric composition. It is preferable that the oxide semiconductor film 716 contains an amount of oxygen exceeding the stoichiometric composition. As a result, the oxide semiconductor film 716 can be made closer to the i-type, the variation in the electrical characteristics of the transistor due to oxygen deficiency can be reduced, and improvement in the electrical characteristics can be realized. The timing for performing this heat treatment is not particularly limited as long as it is after the formation of the gate insulating film 721, and by combining it with other processes, for example, the heat treatment during resin film formation or the heat treatment for reducing the resistance of the transparent conductive film, the oxide semiconductor film 716 can be made closer to the i-type without increasing the number of steps. Moreover, by performing heat treatment on the oxide semiconductor film 716 in an oxygen atmosphere, oxygen is added to the oxide semiconductor. Preferably, the oxide semiconductor film 716 contains an amount of oxygen exceeding the stoichiometric composition. As a result, the oxide semiconductor film 716 can be made closer to the i-type, the variation in the electrical characteristics of the transistor due to oxygen deficiency can be reduced, and improvement in the electrical characteristics can be realized. The timing for performing this heat treatment is not particularly limited as long as it is after the formation of the gate insulating film 721, and by combining it with other processes, for example, the heat treatment during resin film formation or the heat treatment for reducing the resistance of the transparent conductive film, the oxide semiconductor film 716 can be made closer to the i-type without increasing the number of steps. The timing of performing this heat treatment is not particularly limited as long as it is after the formation of the gate insulating film 721, and by combining it with other processes, such as the heat treatment during resin film formation or the heat treatment for reducing the resistance of the transparent conductive film, the number of steps can be increased without increasing the number of steps, and the oxide semiconductor film 716 can be made closer to the i-type. In addition, by performing heat treatment on the oxide semiconductor film 716 in an oxygen atmosphere, oxygen is added to the oxide semiconductor. It is possible to reduce the oxygen deficiency serving as a donor in the oxide semiconductor film 716 and satisfy the stoichiometric composition.

[0147] Also, by performing heat treatment on the oxide semiconductor film 716 in an oxygen atmosphere, oxygen is added to the oxide semiconductor. Elements may be added to reduce oxygen deficiencies serving as donors in the oxide semiconductor film 716. . The heat treatment temperature is, for example, 100°C or higher and less than 350°C, preferably 150°C or higher and less than 250 °C. It is preferable that the oxygen gas used for the heat treatment in the above oxygen atmosphere does not contain water, hydrogen, etc. Alternatively, the purity of the oxygen gas introduced into the heat treatment apparatus is 6N (9 9.9999%) or higher, preferably 7N (99.99999%) or higher (that is, the impurity concentration in oxygen is 1 ppm or less, preferably 0.1 ppm or less).

[0148] Alternatively, oxygen deficiencies serving as donors may be reduced by adding oxygen to the oxide semiconductor film 716 using an ion implantation method, an ion doping method, or the like. For example, oxygen plasma-formed by microwaves of 2.45 GHz may be added to the oxide semiconductor film 716.

[0149] Also, the conductive films 722 and 723 can be formed by forming a conductive film on the gate insulating film 721 and then patterning the conductive film. The conductive films 722 and 72 3 can be formed using the same materials as the conductive films 707 and 708, or the conductive films 714 and 715.

[0150] The film thicknesses of the conductive films 722 and 723 are 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, after forming a 150-nm conductive film for the gate electrode by sputtering using a tungsten target, the conductive film is processed (patterned) into a desired shape by etching to form the conductive films 722 and 723. ​​​​Note that the resist mask may be formed by an inkjet method. Since forming the resist mask by the inkjet method does not use a photomask, the manufacturing cost can be reduced.

[0151] Through the above steps, the transistor 202 is formed.

[0152] Note that the overlapping portion of the conductive film 719 and the conductive film 723 with the gate insulating film 721 sandwiched therebetween corresponds to the capacitor element 203.

[0153] Also, although the transistor 202 has been described using a single-gate structure transistor, if necessary, by having a plurality of electrically connected gate electrodes, a multi-gate structure transistor having a plurality of channel formation regions can also be formed.

[0154] Note that the insulating film in contact with the oxide semiconductor film 716 (in this embodiment, the gate insulating film 7 21 corresponds thereto.) may be made of an insulating material containing a group 13 element and oxygen. Many oxide semiconductor materials contain a group 13 element, and an insulating material containing a group 13 element has good compatibility with the oxide semiconductor. By using this for the insulating film in contact with the oxide semiconductor film, the state of the interface with the oxide semiconductor film can be kept good.

[0155] The insulating material containing a group 13 element means that the insulating material contains one or more group 13 elements. Examples of the insulating material containing a group 13 element include gallium oxide, aluminum oxide, aluminum gallium oxide, gallium aluminum oxide, etc. Here, aluminum gallium oxide means that the content of aluminum (atomic %) is higher than the content of gallium (atomic %) from the content of gallium (atomic %). %), and gallium aluminum oxide is a material with a high gallium content (atomic %). Indicates an aluminum content (atomic %) of 100 or more.

[0156] The insulating film in contact with the oxide semiconductor film 716 is subjected to heat treatment in an oxygen atmosphere or oxygen doping. It is preferable to make the insulating material have more oxygen than the stoichiometric composition by using a filter or the like. The element doping may be performed by ion implantation or ion doping.

[0157] By performing oxygen doping treatment, an insulating film having a region with more oxygen than the stoichiometric composition is formed. When the insulating film having such a region is in contact with the oxide semiconductor film, As a result, excess oxygen in the insulating film is supplied to the oxide semiconductor film, and oxygen is transferred to the oxide semiconductor film or the oxide semiconductor film. The oxygen defects at the interface between the oxide semiconductor film and the insulating film are reduced, and the oxide semiconductor film is made i-type or It can be made as close as possible to

[0158] FIG. 9B shows another circuit diagram of a memory cell included in a semiconductor device according to one embodiment of the present invention. The figure is shown.

[0159] The memory cell shown in FIG. 9B includes a transistor 204 and a capacitor 205. The gate electrode of the transistor 204 is connected to the word line WL. 204, one of the source electrode and the drain electrode is connected to the data line DL, and the other is The other electrode of the capacitance element 205 is connected to the ground potential. The potential is connected to a node to which a fixed potential such as a potential is applied.

[0160] In the memory cell shown in FIG. 9B, the transistor 204 is turned on when data is written. Then, the potential of the signal including data from the data line DL is applied to one electrode of the capacitor element 205 via the transistor 204. Then, according to the potential of the signal, the amount of charge stored in the capacitor element 205 is controlled, and data is written to the capacitor element 205 .

[0161] Next, during data retention, the transistor 204 is turned off, and the charge is retained in the capacitor element 205 . The transistor 204 has the characteristic that the off-current is extremely small . Therefore, the charge stored in the capacitor element 205 is less likely to leak, and compared with the case where a semiconductor material such as silicon is used for the transistor 20 4, data can be retained for a long period of time .

[0162] During data reading, the transistor 204 is turned on, and the charge stored in the capacitor element 205 is taken out via the data line DL . Then, by reading the difference in the amount of charge, data can be read .

[0163] FIG. 10(A) shows an example of a cross-sectional view of the memory cell shown in FIG. 9(B). The transistor 20 4 has a conductive film 751 and a conductive film 752 on a substrate 750 having an insulating surface, a semiconductor film 753 on the conductive film 751 and the conductive film 752, conductive films 754 and 755 respectively connected to the conductive film 751 and the conductive film 752, an insulating film 756 on the semiconductor film 753, and a conductive film 757 provided at a position overlapping the semiconductor film 753 on the insulating film 756 . .

[0164] Also, the capacitor element 205 has a conductive film 755 on the substrate 750 having an insulating surface, and the conductive film 75 The insulating film 756 on 5 and the conductive film 758 formed at a position overlapping the conductive film 755 on the insulating film 756 are provided. It has a conductive film 758.

[0165] Note that in the semiconductor device according to one aspect of the present invention, a drive circuit for controlling the drive of the memory cell may be provided below the memory cell. FIG. 10(B) shows an example of a cross-sectional view of a storage device in which a memory cell and a drive circuit are stacked. In the storage device shown in FIG. 10(B), the transistor 206 constituting the drive circuit includes a semiconductor film 761, an insulating film 762 on the semiconductor film 761, and a conductive film 763 provided at a position overlapping the semiconductor film 761 on the insulating film 762 on a substrate 760 having an insulating surface, and conductive films 764 and 765 connected to the semiconductor film 761. Note that the semiconductor film 761, the insulating film 762, and the conductive film 763 are covered with an insulating film 766, and the semiconductor film 761 is connected to the conductive films 764 and 765 through the insulating film 762 and an opening provided in the insulating film 766. It shows an example of a cross-sectional view of a storage device in which a memory cell and a drive circuit are stacked.

[0166] In the storage device shown in FIG. 10(B), the transistor 206 constituting the drive circuit has a semiconductor film 761, an insulating film 762 on the semiconductor film 761, a conductive film 763 provided at a position overlapping the semiconductor film 761 on the insulating film 762, and conductive films 764 and 765 connected to the semiconductor film 761 on a substrate 760 having an insulating surface. The semiconductor film 761, the insulating film 762, and the conductive film 763 are covered with an insulating film 766, and the semiconductor film 761 is connected to the conductive films 764 and 765 through the insulating film 762 and an opening provided in the insulating film 766. On the substrate 760 having an insulating surface, there are provided a semiconductor film 761, an insulating film 762 on the semiconductor film 761, a conductive film 763 provided at a position overlapping the semiconductor film 761 on the insulating film 762, and conductive films 764 and 765 connected to the semiconductor film 761. And a conductive film 763 provided at a position overlapping the semiconductor film 761 on the insulating film 762, and conductive films 764 and 765 connected to the semiconductor film 761. It has conductive films 764 and 765 connected to the semiconductor film 761. Note that the semiconductor film 761, the insulating film 762, and the conductive film 763 are covered with an insulating film 766, and the semiconductor film 761 is connected to the conductive films 764 and 765 through the insulating film 762 and an opening provided in the insulating film 766. The semiconductor film 761, the insulating film 762, and the conductive film 763 are covered with the insulating film 766, and the semiconductor film 761 is connected to the conductive films 764 and 765 through the insulating film 762 and an opening provided in the insulating film 766. Through the insulating film 762 and an opening provided in the insulating film 766, the semiconductor film 761 is connected to the conductive films 764 and 765.

[0167] Also, the transistor 204 has a conductive film 780, a conductive film 781, and an insulating film 782 provided between the conductive film 780 and the conductive film 781 on the conductive film 764 and the insulating film 766. The conductive film 764 is connected to the conductive film 781. Further, the transistor 204 has a conductive film 771 and a conductive film 772 respectively connected to the conductive film 780 and the conductive film 781, a semiconductor film 773 on the conductive films 771 and 772, conductive films 774 and 775 respectively connected to the conductive films 771 and 772, and the semiconductor film 773, the conductive films 774 and 775 on the layer composed of the conductive film 780, the conductive film 781, and the insulating film 782. And an insulating film 782 provided between the conductive film 780 and the conductive film 781. The conductive film 764 is connected to the conductive film 781. The conductive film 764 is connected to the conductive film 781. Furthermore, the transistor 204 has a conductive film 771 and a conductive film 772 respectively connected to the conductive film 780 and the conductive film 781, a semiconductor film 773 on the conductive films 771 and 772, conductive films 774 and 775 respectively connected to the conductive films 771 and 772, and the semiconductor film 773, the conductive films 774 and 775 on the layer composed of the conductive film 780, the conductive film 781, and the insulating film 782. On the layer composed of the conductive film 780, the conductive film 781, and the insulating film 782, there are provided a conductive film 771 and a conductive film 772 respectively connected to the conductive film 780 and the conductive film 781, a semiconductor film 773 on the conductive films 771 and 772, conductive films 774 and 775 respectively connected to the conductive films 771 and 772, and the semiconductor film 773, the conductive films 774 and 775. And a semiconductor film 773 on the conductive films 771 and 772, conductive films 774 and 775 respectively connected to the conductive films 771 and 772, and the semiconductor film 773, the conductive films 774 and 775. Connected to the conductive films 771 and 772 respectively, and the semiconductor film 773, the conductive films 774 and 775.​ The insulating film 776 above and the conductive film 777 provided at a position overlapping the semiconductor film 773 on the insulating film 776 are provided.

[0168] The capacitor element 205 includes the conductive film 775, the insulating film 776 on the conductive film 775, and the conductive film 783 located on the conductive film 775 on the insulating film 776. are provided.

[0169] This embodiment can be implemented in appropriate combination with the above embodiment.

[0170] (Embodiment 3) A configuration example of an inverter, which is one of the semiconductor devices according to an aspect of the present invention, will be described.

[0171] FIG. 11 shows an example of an inverter according to an aspect of the present invention. The inverter 50 0 shown in FIG. 11 includes transistors 501 to 505 and a capacitor element 506.

[0172] For the transistor 501, its gate electrode is connected to the wiring 508, its source electrode is connected to the drain electrode of the transistor 502, and its drain electrode is connected to the wiring 507. For the transistor 502, its gate electrode is connected to the wiring 509, its source electrode is connected to the wiring 510, and its drain electrode is connected to the source electrode of the transistor 501. For the transistor 503, its gate electrode is connected to the wiring 507, and one of its source electrode and drain electrode is connected to the source electrode of the transistor 501 and the drain electrode of the transistor 502, and the other is connected to the gate electrode of the transistor 504. For the transistor 504, its source electrode is connected to the drain electrode of the transistor 505 and the wiring For the transistor 503, its gate electrode is connected to the wiring 507, and one of its source electrode and drain electrode is connected to the source electrode of the transistor 501 and the drain electrode of the transistor 502, and the other is connected to the gate electrode of the transistor 504. For the transistor 504, its source electrode is connected to the drain electrode of the transistor 505 and the wiring For the transistor 504, its source electrode is connected to the drain electrode of the transistor 505 and the wiring For the transistor 504, its source electrode is connected to the drain electrode of the transistor 505 and the wiring It is connected to the line 511, and its drain electrode is connected to the wiring 507. Transistor 5 05 has its gate electrode connected to the wiring 509, its source electrode connected to the wiring 510 and its drain electrode connected to the source electrode of the transistor 504 and the wiring 511.

[0173] The capacitor element 506 has one of its electrodes connected to the gate electrode of the transistor 504 and the other electrode connected to the wiring 511.

[0174] When the transistors 502 and 505 are of the n-channel type, specifically, a high-level potential VDD is applied to the wiring 507, and a low-level potential VSS is applied to the wiring 510. Also, a clock signal potential CL is applied to the wiring 508, and a potential Vin is applied to the wiring 509. And from the wiring 511, a potential Vinb obtained by inverting the polarity of the potential Vin is output.

[0175] In the semiconductor device according to one aspect of the present invention, even if the transistor is miniaturized, the resistance of the conductive film functioning as the source electrode or the drain electrode can be kept low, and a high on-current can be ensured. Therefore, by applying the configuration of the present invention to the inverter 500, even if the inverter 500 is miniaturized, a high operating speed can be ensured and the current supply ability can be enhanced.

[0176] This embodiment can be implemented in appropriate combination with other embodiments.

[0177] (Embodiment 4) A semiconductor device according to one aspect of the present invention includes a display device, a personal computer, and a recording medium. ​​​​​​​The obtained image playback device (typically a DVD: Digital Versatile Disc and other recording media, and has a display capable of displaying the image) can be used . In addition, electronic devices that can use the semiconductor device according to one aspect of the present invention include mobile phones, game machines including portable types, portable information terminals, e-books, video cameras, digital still cameras, goggle-type displays (head-mounted displays), navigation systems, audio playback devices (car audio, digital audio players, etc.), copiers, facsimiles, printers, printer multifunction devices, automated teller machines (AT M), vending machines, and the like. Specific examples of these electronic devices are shown in FIG. 12.

[0178] FIG. 12(A) is a portable game machine, which has a housing 5001, a housing 5002, a display unit 5003, a display unit 5004, a microphone 5005, a speaker 5006, operation keys 5007, a start button 5008, etc. By using the semiconductor device according to one aspect of the present invention in the drive circuit of the portable game machine, a portable game machine with a high operating speed can be provided. Alternatively, by using the semiconductor device according to one aspect of the present invention, miniaturization of the portable game machine can be achieved . Note that the portable game machine shown in FIG. 12(A) has two display units 5003 and a display unit 5004, but the number of display units of the portable game machine is not limited to this. .

[0179] FIG. 12(B) is a display device, which has a housing 5201, a display unit 5202, a support base 5203, etc. By using the semiconductor device according to one aspect of the present invention in the drive circuit of the display device, a high operating speed A display device with high speed can be provided. Alternatively, by using the semiconductor device according to one aspect of the present invention, miniaturization of the display device can be achieved. The display device includes all information display devices such as for personal computers, TV broadcast reception, and advertisement display.

[0180] FIG. 12(C) is a notebook personal computer, which has a housing 5401, a display unit 5402, a keyboard 5403, a pointing device 5404, etc. By using the semiconductor device according to one aspect of the present invention in the drive circuit of the notebook personal computer, a notebook personal computer with high operating speed can be provided. Alternatively, by using the semiconductor device according to one aspect of the present invention, miniaturization of the notebook personal computer can be achieved.

[0181] FIG. 12(D) is a portable information terminal, which has a first housing 5601, a second housing 5602, a first display unit 5603, a second display unit 5604, a connection part 5605, operation keys 5606, etc. The first display unit 5603 is provided in the first housing 5601, and the second display unit 5604 is provided in the second housing 56 02. The first housing 5601 and the second housing 5602 are connected by the connection part 56 05, and the angle between the first housing 5601 and the second housing 5602 can be changed by the connection part 5605. The switching of the video in the first display unit 5603 may be configured to be switched according to the angle between the first housing 5601 and the second housing 5602 in the connection part 5605. Further, a semiconductor display device with a function as a position input device may be used for at least one of the first display unit 5603 and the second display unit 5604. ​​​​​The function as a position input device can be realized by providing a touch panel on the semiconductor display device. Alternatively, the function as a position input device can be added to a device called a photosensor. The light can also be added by providing a photoelectric conversion element in the pixel portion of a semiconductor display device. By using a semiconductor device according to one embodiment of the present invention for a driver circuit of a mobile information terminal, the operating speed can be improved. Alternatively, a semiconductor device according to one embodiment of the present invention can be used to provide a portable information terminal with high speed. By using this, it is possible to realize a miniaturization of portable information terminals.

[0182] FIG. 12(E) shows a mobile phone, which includes a housing 5801, a display portion 5802, an audio input portion 5803, It has an audio output unit 5804, operation keys 5805, a light receiving unit 5806, etc. By converting the light received in the camera into an electrical signal, it is possible to capture an external image. By using a semiconductor device according to one embodiment of the present invention in a driver circuit of a mobile phone, the operating speed can be increased. Alternatively, a mobile phone can be provided by using a semiconductor device according to one embodiment of the present invention. This will enable the miniaturization of mobile phones.

[0183] This embodiment mode can be implemented in appropriate combination with other embodiment modes. [Explanation of symbols]

[0184] 101 Conductive film 101e End 102 Conductive film 102e end 103 Semiconductor film 104 Conductive film 104e end 105 Conductive film 105e end 106 insulating film 107 Conductive film 107e End 108 Opening 109 Opening 110 Conductive film 111 Conductive film 112 Semiconductor film 113 Semiconductor film 114 Lov region 115 Lov region 116 Loff region 117 Loff region 120 Insulating film 201 Transistor 202 Transistor 203 Capacitor element 204 Transistor 205 Capacitor element 206 Transistor 500 Inverter 501 Transistor 502 Transistor 503 Transistor 504 Transistor 505 Transistor 506 Capacitor element 507 Wiring 508 Wiring 509 Wiring 510 Wiring 511 Wiring 700 Substrate 701 Insulating film 702 Semiconductor film 703 Gate insulating film 704 Impurity region 705 Mask 706 Opening 707 Conductive film 708 Conductive film 709 Impurity region 710 Channel formation region 711 Impurity region 712 Insulating film 713 Insulating film 714 Conductive film 715 Conductive film 716 Oxide semiconductor film 717 Opening 718 Opening 719 Conductive film 720 Conductive film 721 Gate insulating film 722 Conductive film 723 Conductive film 750 Substrate 751 Conductive film 752 Conductive film 753 Semiconductor film 754 Conductive film 755 Conductive film 756 Insulating film 757 Conductive film 758 Conductive film 760 Substrate 761 Semiconductor film 762 Insulating film 763 Conductive film 764 Conductive film 765 Conductive film 766 Insulating film 771 Conductive film 772 Conductive film 773 Semiconductor film 774 Conductive film 775 Conductive film 776 Insulating film 777 Conductive film 780 Conductive film 781 Conductive film 782 Insulating film 783 Conductive film 5001 Housing 5002 Housing 5003 Display unit 5004 Display unit 5005 Microphone 5006 Speaker 5007 Operation key 5008 Stylus 5201 Housing 5202 Display unit 5203 Support stand 5401 Housing 5402 Display unit 5403 Keyboard 5404 Pointing device 5601 Housing 5602 Housing 5603 Display Unit 5604 Display Unit 5605 Connection Part 5606 Operation Key 5801 Housing 5802 Display Unit 5803 Voice Input Unit 5804 Voice Output Unit 5805 Operation Key 5806 Light Receiving Unit

Claims

1. A first transistor having a channel formation region in a silicon film, a second transistor having a channel formation region in an oxide semiconductor film, a capacitor element, and having, wherein one of the source or drain of the second transistor is electrically connected to the gate of the first transistor, the other of the source or drain of the second transistor is electrically connected to one of the source or drain of the first transistor, one electrode of the capacitor element is a semiconductor device electrically connected to the gate of the first transistor, a first conductive film having a function as the gate of the first transistor and having a region disposed on the silicon film, an insulating film having a region disposed above the silicon film, a second conductive film having a region disposed above the insulating film and having a region disposed below the oxide semiconductor film, a third conductive film having a function as the gate of the second transistor and having a region disposed above the oxide semiconductor film, a fourth conductive film having a function as one of the source or drain of the second transistor, having a function as one electrode of the capacitor element, and having a region disposed above the oxide semiconductor film, a fifth conductive film having a function as the other of the source or drain of the second transistor and having a region disposed above the oxide semiconductor film, a sixth conductive film having a function as the other electrode of the capacitor element and having a region disposed above the fourth conductive film, and having, the second conductive film has an overlap with the third conductive film, the oxide semiconductor film has a first region overlapping with the third conductive film, a second region overlapping with the fourth conductive film, and a third region overlapping with the fifth conductive film, the first region, the second region, and the third region are separated from each other, the second conductive film has an overlap with the gap between the first region and the second region, the sixth conductive film has an overlap with the first conductive film, a semiconductor device.

2. A first transistor having a channel formation region in a silicon film, a second transistor having a channel formation region in an oxide semiconductor film, a capacitor element, and having, wherein one of the source or drain of the second transistor is electrically connected to the gate of the first transistor, The other of the source or drain of the second transistor is electrically connected to one of the source or drain of the first transistor. A semiconductor device in which one electrode of the capacitor element is electrically connected to the gate of the first transistor. A first conductive film having a function as the gate of the first transistor and having a region disposed on the silicon film. An insulating film having a region disposed above the silicon film. A second conductive film having a region disposed above the insulating film and having a region disposed below the oxide semiconductor film. A third conductive film having a function as the gate of the second transistor and having a region disposed above the oxide semiconductor film. A fourth conductive film having a function as one of the source or drain of the second transistor, having a function as one electrode of the capacitor element, and having a region disposed above the oxide semiconductor film. A fifth conductive film having a function as the other of the source or drain of the second transistor and having a region disposed above the oxide semiconductor film. A sixth conductive film having a function as the other electrode of the capacitor element and having a region disposed above the fourth conductive film. It has The second conductive film has an overlap with the third conductive film. The oxide semiconductor film has a first region overlapping with the third conductive film, a second region overlapping with the fourth conductive film, and a third region overlapping with the fifth conductive film. The first region, the second region, and the third region are separated from each other. The second conductive film has an overlap with the gap between the first region and the second region. The region where the fourth conductive film and the sixth conductive film overlap has an overlap with the first conductive film. Semiconductor device.

3. A first transistor having a channel formation region in a silicon film, A second transistor having a channel formation region in an oxide semiconductor film, A capacitor element, It has One of the source or drain of the second transistor is electrically connected to the gate of the first transistor. The other of the source or drain of the second transistor is electrically connected to one of the source or drain of the first transistor. A semiconductor device in which one electrode of the capacitor element is electrically connected to the gate of the first transistor. a first conductive film having a function as a gate of the first transistor and having a region disposed on the silicon film; an insulating film having a region disposed above the silicon film; a second conductive film having a region disposed above the insulating film and having a region disposed below the oxide semiconductor film; a third conductive film having a function as a gate of the second transistor and having a region disposed above the oxide semiconductor film; a fourth conductive film having a function as one of a source or a drain of the second transistor, having a function as one electrode of the capacitor element, and having a region disposed above the oxide semiconductor film; a fifth conductive film having a function as the other of the source or the drain of the second transistor and having a region disposed above the oxide semiconductor film; a sixth conductive film having a function as the other electrode of the capacitor element and having a region disposed above the fourth conductive film; and having; the second conductive film has an overlap with the third conductive film; the oxide semiconductor film has a first region overlapping with the third conductive film, a second region overlapping with the fourth conductive film, and a third region overlapping with the fifth conductive film; the first region, the second region, and the third region are spaced apart from each other; the second conductive film has an overlap with a gap between the first region and the second region; the sixth conductive film has an overlap with the silicon film; a semiconductor device.

4. In any one of Claims 1 to 3, the oxide semiconductor film contains In, Ga, and Zn; a semiconductor device.

5. In any one of Claims 1 to 4, the oxide semiconductor included in the oxide semiconductor film is indium oxide; a semiconductor device.

6. In any one of Claims 1 to 5, the sixth conductive film contains any one of Ta, W, Ti, Mo, Al, Cu, Cr, and Nb; a semiconductor device.

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