Semiconductor device

Abstract

To provide a technology in which manufacturability of a semiconductor device can be improved by shortening wiring length of a wire.SOLUTION: A semiconductor device 100 comprises: a semiconductor element 1; a control IC 2 that controls the semiconductor element 1. The semiconductor element 1 comprises a pair of signal pad groups 11a and 11b that are composed of a plurality of signal pads 10a, 10b, 10c, and 10d, the control IC 2 comprises a plurality of signal pads, and the plurality of signal pads in the control IC 2 are connected by wire bonding to the signal pad groups 11a and 11b having a nearer distance to the plurality of signal pads in the control IC 2, of the pair of signal pad groups 11a and 11b in the semiconductor element 1.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a configuration in an IGBT (Insulated Gate Bipolar Transistor) chip including a plurality of signal pads including a plurality of sense signal pads and a plurality of gate signal pads, in which the plurality of signal pads are wire-bonded respectively.

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the technique described in Patent Document 1, the wiring length of the wire is not considered. Therefore, in a semiconductor device including a control IC that controls an IGBT chip, when wire-bonding is performed with a signal pad that is far from the signal pad of the control IC among the plurality of signal pads of the IGBT chip, the wiring length of the wire becomes long. As a result, there is a problem that adjacent wires come into contact with each other when the IGBT chip and the control IC are encapsulated, or the wire is easily peeled off, deteriorating the manufacturability of the semiconductor device.

[0005] Therefore, an object of the present disclosure is to provide a technique capable of improving the manufacturability of a semiconductor device by shortening the wiring length of a wire.

Means for Solving the Problems

[0006] The semiconductor device according to the present disclosure includes a semiconductor element and a control IC that controls the semiconductor element. 、comprising, wherein the semiconductor element has a pair of signal pad groups each consisting of a plurality of signal pads, the control IC has a plurality of signal pads, and the plurality of signal pads in the control IC are wire-bonded to the signal pad group that is closer in distance to the plurality of signal pads in the control IC among the pairs of signal pad groups in the semiconductor element The pair of the signal pad groups in the semiconductor element includes a plurality of gate signal pads, a plurality of gate wirings are provided in the semiconductor element, and the plurality of gate signal pads are respectively connected by the plurality of gate wirings is such that

Advantages of the Invention

[0007] According to the present disclosure, since the wiring length of the wires between the plurality of signal pads of the semiconductor element and the plurality of signal pads of the control IC can be shortened, contact between adjacent wires and peeling of the wires can be suppressed when the semiconductor element and the control IC are encapsulated. Thereby, the manufacturability of the semiconductor device can be improved.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Modes for Carrying Out the Invention

[0009] <Embodiment 1> <Configuration of the Semiconductor Device> Embodiment 1 will be described below with reference to the drawings. FIG. 1 is a top view of a semiconductor device 100 according to Embodiment 1.

[0010] In FIG. 1, the X direction and the Y direction are orthogonal to each other. The X direction and the Y direction shown in the following figures are also orthogonal to each other. Hereinafter, the direction including the X direction and the -X direction which is the opposite direction of the X direction is also referred to as the "X-axis direction". Further, hereinafter, the direction including the Y direction and the -Y direction which is the opposite direction of the Y direction is also referred to as the "Y-axis direction".

[0011] As shown in FIG. 1, the semiconductor device 100 is a three-phase AC inverter circuit, and includes six semiconductor elements 1a, 1b, 1c, 1d, 1e, 1f, four control ICs 2a, 2b, 2c, 2d, a power lead frame 3, a control lead frame 4, and a mold resin (not shown).

[0012] The six semiconductor elements 1a, 1b, 1c, 1d, 1e, 1f are reverse-conducting IGBTs (RC-IGBTs: Reverse-Conducting IGBTs) in which the switching part and the reflux part are integrated into one chip. The three semiconductor elements 1a, 1b, 1c mounted on the high potential side are arranged on one conductor pattern 8. Also, the three semiconductor elements 1d, 1e, 1f mounted on the low potential side are respectively arranged on three conductor patterns 8. The six semiconductor elements 1a, 1b, 1c, 1d, 1e, 1f are wire-bonded to the four control ICs 2a, 2b, 2c, 2d by wires 9. When there is no need to distinguish between the semiconductor elements 1a, 1b, 1c, 1d, 1e, 1f, each of them is referred to as a semiconductor element 1.

[0013] The four control ICs 2a, 2b, 2c, 2d are LVICs (low voltage integrated circuits) and control the six semiconductor elements 1a, 1b, 1c, 1d, 1e, 1f. Also, the four control ICs 2a, 2b, 2c, 2d, the power lead frame 3, and the control lead frame 4 are connected by wires 9, that is, wire-bonded. When there is no need to distinguish between the control ICs 2a, 2b, 2c, 2d, each of them is referred to as a control IC 2.

[0014] The molding resin is a sealing material that integrally seals six semiconductor elements 1a, 1b, 1c, 1d, 1e, 1f and four control ICs 2a, 2b, 2c, 2d.

[0015] The power lead frame 3 has a P terminal 3a connected to the collector electrodes of three semiconductor elements 1a, 1b, 1c mounted on the high potential side, a U terminal 3b, a V terminal 3c, and a W end portion 3d respectively connected to the collector electrodes of three semiconductor elements 1d, 1e, 1f mounted on the low potential side, and an N terminal 3e connected to the emitter electrodes of three semiconductor elements 1d, 1e, 1f mounted on the low potential side.

[0016] The control lead frame 4 has a U-phase lead frame 4a, a V-phase lead frame 4b, and a W-phase lead frame 4c on the high potential side, and an N-phase lead frame 4d on the low potential side. The U-phase lead frame 4a, the V-phase lead frame 4b, and the W-phase lead frame 4c all include control terminals, IN terminals, and VCC terminals. The N-phase lead frame 4d includes control terminals, VCC terminals, three IN terminals, and FO terminals.

[0017] <Configuration of Signal Pads in Semiconductor Element> Next, the configuration of the signal pads in the semiconductor element 1, which is a feature of Embodiment 1, will be described with reference to FIG. 2. FIG. 2 is a top view of the semiconductor element 1 included in the semiconductor device 100 according to Embodiment 1.

[0018] As shown in FIG. 2, the semiconductor element 1 has a pair of signal pad groups 11a, 11b each consisting of a plurality (four) of signal pads 10a, 10b, 10c, 10d. The pair of signal pad groups 11a, 11b is arranged along the first direction (X-axis direction). Reference numeral 21 indicates the center line of the semiconductor element 1 extending in the first direction. Of the pair of signal pad groups 11a, 11b, one signal pad group 11a is arranged on the -X side (one side) with respect to the center line 21 of the semiconductor element 1 extending in the second direction (Y-axis direction) orthogonal to the first direction, and the other signal pad group 11b is arranged on the X side (the other side) with respect to the center line 21 of the semiconductor element 1.

[0019] Pairs of signal pad groups 11a and 11b are arranged on one side and the other side of the center line 21 of the semiconductor element 1 in the same order. Specifically, the pairs of signal pad groups 11a and 11b are arranged in the order of the sense signal pad 10a, the gate signal pad 10b, the anode signal pad 10c of the temperature sense diode, and the cathode signal pad 10d of the temperature sense diode from the -X side to the X side. Note that the order of the signal pads 10a, 10b, 10c, and 10d is an example and is not limited to the order described in FIG. 2.

[0020] In Embodiment 1, a plurality of signal pads in the control IC 2 are wire-bonded to the signal pad group 11a or 11b of the pair of signal pad groups 11a and 11b in the semiconductor element 1 that is closer to the plurality of signal pads in the control IC 2. This will be described.

[0021] As shown in FIGS. 1 and 2, the semiconductor elements 1a, 1b, and 1c are wire-bonded to the control ICs 2a, 2b, and 2c, respectively. Since the semiconductor elements 1a, 1b, and 1c and the control ICs 2a, 2b, and 2c are arranged close to each other, the wiring length of the wire 9 is not a big problem compared to the case of the control IC 2d. However, the control IC 2d has three sets of a plurality of signal pads, and since the semiconductor elements 1d, 1e, and 1f are wire-bonded to the control IC 2d, among the three semiconductor elements 1d, 1e, and 1f, the semiconductor elements 1d and 1f located on both sides are farther from the control IC 2d than the semiconductor element 1e located in the center.

[0022] Therefore, in the semiconductor element 1d, a plurality of signal pads in the control IC 2d are wire-bonded to the signal pad group 11b that is closer to the plurality of signal pads in the control IC 2d among the pairs of signal pad groups 11a and 11b in the semiconductor element 1d. Also, in the semiconductor element 1f, a plurality of signal pads in the control IC 2d are wire-bonded to the signal pad group 11a that is closer to the plurality of signal pads in the control IC 2d among the pairs of signal pad groups 11a and 11b in the semiconductor element 1f.

[0023] Thereby, the wiring length of the wire 9 connecting the semiconductor elements 1d and 1f and the control IC 2d can be shortened. Similarly, for the semiconductor elements 1a, 1b, 1c and the control ICs 2a, 2b, 2c, among the pairs of signal pad groups 11a and 11b in the semiconductor elements 1a, 1b, 1c, the signal pad group that is closer to the plurality of signal pads in the control ICs 2a, 2b, 2c is wire-bonded.

[0024] Next, the sizes of the signal pads 10a, 10b, 10c, and 10d of the semiconductor element 1 will be described. When a fine wire is used as the wire 9, wire bonding is sufficiently possible if the length of one side of the opening (the area of the aluminum electrode) of the signal pads 10a, 10b, 10c, and 10d is about 0.3 mm. Also, since reducing the chip size of the semiconductor element 1 contributes to miniaturization of the semiconductor device 100, it is desirable that the length of one side of the signal pads 10a, 10b, 10c, and 10d is 0.3 mm or less.

[0025] Also, although not shown, each of a plurality (two) of gate signal pads 10b among the pairs of signal pad groups 11a and 11b in the semiconductor element 1 is connected by a common gate wiring in the semiconductor element 1. Thereby, even when either one of the two gate signal pads 10b is used, the control power supply voltage supplied from the outside of the semiconductor device 100 can be sufficiently supplied.

[0026] <Effect> As described above, the semiconductor device 100 according to Embodiment 1 includes a semiconductor element 1 and a control IC 2 that controls the semiconductor element 1. The semiconductor element 1 has a pair of signal pad groups 11a and 11b each consisting of a plurality of signal pads 10a, 10b, 10c, and 10d. The control IC 2 has a plurality of signal pads, and the plurality of signal pads in the control IC 2 are wire-bonded to the signal pad group that is closer to the plurality of signal pads in the control IC 2 among the pairs of signal pad groups 11a and 11b in the semiconductor element 1.

[0027] Specifically, the pair of signal pad groups 11a and 11b in the semiconductor element 1 are arranged along a first direction, and the plurality of signal pads 10a, 10b, 10c, and 10d included in each of the signal pad groups 11a and 11b are arranged in the same order on one side and the other side with respect to the center line 21 of the semiconductor element 1 extending in a second direction orthogonal to the first direction. Further, the pair of signal pad groups 11a and 11b in the semiconductor element 1 includes two sense signal pads 10a, and among the pair of signal pad groups 11a and 11b, the sense signal pad 10a included in one of the signal pad groups is wire-bonded to one of the plurality of signal pads in the control IC 2.

[0028] Therefore, since the wiring length of the wire 9 between the plurality of signal pads 10a, 10b, 10c, and 10d of the semiconductor element 1 and the plurality of signal pads of the control IC 2 can be shortened, contact between adjacent wires 9 and peeling of the wire 9 can be suppressed when the semiconductor element 1 and the control IC 2 are encapsulated. Thereby, the manufacturability of the semiconductor device 100 can be improved.

[0029] Also, the pair of signal pad groups 11a and 11b in the semiconductor element 1 includes two gate signal pads 10b, a plurality of gate wirings are provided in the semiconductor element 1, and the two gate signal pads 10b are connected by the plurality of gate wirings.

[0030] Therefore, even when either of the two gate signal pads 10b is used, the control power supply voltage supplied from the outside of the semiconductor device 100 can be sufficiently supplied, so that the semiconductor device 100 can operate stably.

[0031] In addition, since the semiconductor element 1 is a reverse-conducting IGBT in which the switching section and the reflux section are integrated on one chip, the semiconductor element 1 can be miniaturized, contributing to the miniaturization of the semiconductor device 100.

[0032] In addition, since the length of one side of each of the signal pads 10a, 10b, 10c, and 10d in the semiconductor element 1 is 0.3 mm or less, it contributes to the miniaturization of the semiconductor device 100.

[0033] <Embodiment 2> Next, the semiconductor device 100 according to Embodiment 2 will be described. FIG. 3 is a top view of the semiconductor element 1 included in the semiconductor device 100 according to Embodiment 2. In Embodiment 2, the same components as those described in Embodiment 1 are denoted by the same reference numerals and the description thereof is omitted.

[0034] As shown in FIG. 3, in Embodiment 2, two gate wirings 12a and 12b branched from the gate wiring 12 provided in the semiconductor device 100 are respectively connected to the gate signal pads 10b in the signal pad groups 11a and 11b. The plurality of gate wirings 12, 12a, and 12b connected to the two gate signal pads 10b have the same impedance. Thereby, stable operation of the semiconductor element 1 is possible regardless of which of the two gate signal pads 10b is used.

[0035] In FIG. 3, the gate wiring 12 is shown as a rectangular frame, but it is actually provided inside the rectangular frame.

[0036] <Embodiment 3> Next, the semiconductor device 100 according to Embodiment 3 will be described. FIG. 4 is a top view of the semiconductor element 1 included in the semiconductor device 100 according to Embodiment 3. In Embodiment 3, the same components as those described in Embodiments 1 and 2 are denoted by the same reference numerals and the description thereof is omitted.

[0037] As shown in FIG. 4, in Embodiment 3, some of the plurality of signal pads 10a, 10b, 10c, 10d in the semiconductor element 1 are staggeredly arranged. Specifically, the signal pads 10c, 10d are arranged in the -Y direction with respect to the signal pads 10a, 10b, and are further arranged so as to be shifted in the X direction by half (a / 2) of the interval (a) between the center line in the X-axis direction of the signal pad 10a and the center line in the X-axis direction of the signal pad 10b.

[0038] Thereby, since the length of the semiconductor device 100 in the X-axis direction can be reduced, wire bond connection between the semiconductor element 1 and the control IC 2 with a short wiring length becomes possible, contributing to the miniaturization of the semiconductor device 100.

[0039] Note that the respective embodiments can be freely combined, or each embodiment can be appropriately modified or omitted.

[0040] Hereinafter, aspects of the present disclosure will be summarized as appendices.

[0041] (Appendix 1) A semiconductor element, and a control IC for controlling the semiconductor element, and the semiconductor element has a pair of signal pad groups each including a plurality of signal pads, the control IC has a plurality of signal pads, a plurality of the signal pads in the control IC are wire bond-connected to the signal pad group that is closer in distance to the plurality of the signal pads in the control IC among the pairs of the signal pad groups in the semiconductor element, a semiconductor device.

[0042] (Appendix 2) The pair of signal pad groups in the semiconductor element includes a plurality of gate signal pads, a plurality of gate wirings are provided in the semiconductor element, The plurality of gate signal pads are each connected by a plurality of the gate wirings. The semiconductor device according to Supplementary Note 1.

[0043] (Supplementary Note 3) The pair of signal pad groups in the semiconductor element includes a plurality of sense signal pads, Among the pair of signal pad groups, the sense signal pads included in one of the signal pad groups are wire-bonded to one of the plurality of signal pads in the control IC. The semiconductor device according to Supplementary Note 1.

[0044] (Supplementary Note 4) The pair of signal pad groups in the semiconductor element is arranged along a first direction, The plurality of signal pads included in each signal pad group are arranged in the same order on one side and the other side with respect to the center line of the semiconductor element extending in a second direction orthogonal to the first direction. The semiconductor device according to Supplementary Note 1.

[0045] (Supplementary Note 5) The semiconductor element is a reverse-conducting IGBT in which a switching portion and a reflux portion are integrated on one chip. The semiconductor device according to Supplementary Note 1.

[0046] (Supplementary Note 6) The length of one side of each signal pad in the semiconductor element is 0.3 mm or less. The semiconductor device according to Supplementary Note 1.

[0047] (Supplementary Note 7) The plurality of gate wirings connected to the plurality of gate signal pads have the same impedance. The semiconductor device according to Supplementary Note 2.

[0048] (Supplementary Note 8) A part of the plurality of signal pads in the semiconductor element is arranged in a staggered pattern. The semiconductor device according to Supplementary Note 1.

Explanation of Reference Signs

[0049] 1, 1a, 1b, 1c, 1d, 1e, 1f semiconductor elements, 2, 2a, 2b, 2c, 2d control ICs, 10a, 10b, 10c, 10d signal pads, 11a, 11b signal pad groups, 12, 12a, 12b gate wirings, 100 semiconductor device.

Claims

1. A semiconductor element, a control IC for controlling the semiconductor element, and the semiconductor element has a pair of signal pad groups each consisting of a plurality of signal pads, the control IC has a plurality of signal pads, a plurality of the signal pads in the control IC are wire-bonded to the signal pad group that is closer in distance to the plurality of the signal pads in the control IC among the pairs of signal pad groups in the semiconductor element, the pair of signal pad groups in the semiconductor element includes a plurality of gate signal pads, a plurality of gate wirings are provided in the semiconductor element, a semiconductor device in which the plurality of gate signal pads are respectively connected by the plurality of gate wirings.

2. A semiconductor element, a control IC for controlling the semiconductor element, and the semiconductor element has a pair of signal pad groups each consisting of a plurality of signal pads, the control IC has a plurality of signal pads, a plurality of the signal pads in the control IC are wire-bonded to the signal pad group that is closer in distance to the plurality of the signal pads in the control IC among the pairs of signal pad groups in the semiconductor element, the pair of signal pad groups in the semiconductor element includes a plurality of sense signal pads, a semiconductor device in which the sense signal pads included in one of the signal pad groups of the pair of signal pad groups are wire-bonded to one of the plurality of signal pads in the control IC.

3. The pair of signal pad groups in the semiconductor element are arranged along a first direction, a plurality of the signal pads included in each of the signal pad groups are arranged in the same order on one side and the other side with respect to a center line of the semiconductor element extending in a second direction orthogonal to the first direction. The semiconductor device according to Claim 1.

4. The semiconductor element is a reverse-conducting IGBT in which a switching part and a reflux part are integrated into one chip. The semiconductor device according to Claim 1.

5. The length of one side of each of the signal pads in the semiconductor element is 0.3 mm or less. The semiconductor device according to Claim 1.

6. The plurality of gate wirings connected to the plurality of gate signal pads have the same impedance. The semiconductor device according to Claim 1.

7. A part of the plurality of signal pads in the semiconductor element is arranged in a staggered pattern. The semiconductor device according to Claim 1.

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