Electronic device and method for manufacturing the same

Abstract

To provide an electronic device capable of increasing the yield thereof, and a method for manufacturing the same.SOLUTION: According to an embodiment, an electronic device includes a first structure and a second structure. The first structure includes a first substrate, a first wiring part provided on the first substrate, a first bonding electrode electrically connected to the first wiring part, and a first hard part. The second structure includes a second substrate, a second wiring part provided on the second substrate, and a second bonding electrode electrically connected to the second wiring part. The first bonding electrode and the second bonding electrode are bonded to each other between the first substrate and the second substrate. The first hard part is provided between the first substrate and the second substrate. When viewed along a first direction from the first substrate toward the first bonding electrode, the first hard part is positioned within an area in which the first bonding electrode is provided, the first hard part having a higher hardness than that of the first bonding electrode.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present invention relate to an electronic device and a method for manufacturing the same.

Background Art

[0002] There is an electronic device in which a plurality of structures are joined together. In the manufacturing method of this electronic device, the bonding electrodes provided on each structure are bonded together. In the electronic device, an improvement in yield is desired.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments of the present invention provide an electronic device and a method for manufacturing the same that can improve the yield.

Means for Solving the Problems

[0005] According to an embodiment of the present invention, an electronic device includes a first structure and a second structure. The first structure includes a first substrate, a first wiring portion provided on the first substrate, a first bonding electrode electrically connected to the first wiring portion, and a first hard portion. The second structure includes a second substrate, a second wiring portion provided on the second substrate, and a second bonding electrode electrically connected to the second wiring portion. The first bonding electrode and the second bonding electrode are bonded to each other between the first substrate and the second substrate. The first hard portion is provided between the first substrate and the second substrate, is located within a range where the first bonding electrode is provided when viewed along a first direction from the first substrate toward the first bonding electrode, and has a hardness higher than that of the first bonding electrode.

Brief Description of the Drawings

[0006]

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DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the sizes between parts, etc. are not necessarily the same as the actual ones. Even when representing the same part, the dimensions and ratios may be represented differently in the drawings. In the present specification and each figure, the same reference numerals are given to the same elements as those described above with respect to the previously shown figures, and the detailed description will be omitted as appropriate.

[0008] Embodiments of the present invention relate to an electronic device (electrical device). The electronic device is, for example, a device that operates by electricity or a device that uses electrical signals. Examples of the electronic device include semiconductor devices. In the following embodiments, the electronic device may be, for example, a semiconductor device. FIGS. 1(a) to 1(c) are schematic diagrams illustrating an electronic device according to an embodiment. FIG. 1(a) is a schematic cross-sectional view illustrating the electronic device 100 according to the embodiment. As shown in FIG. 1(a), the electronic device 100 includes a first structure 10 and a second structure 20. FIG. 1(b) is a schematic plan view illustrating the first structure 10. FIG. 1(c) is a schematic plan view illustrating the second structure 20.

[0009] The first structure 10 includes a first substrate 11, a first wiring portion 21, a first bonding electrode 31, and a first hard portion 41. The first structure 10 may include a first insulating film 51.

[0010] The second structure 20 includes a second substrate 12, a second wiring portion 22, and a second bonding electrode 32. The second structure 20 may include a second insulating film 52.

[0011] In the description of the embodiment, the direction from the first substrate 11 toward the first bonding electrode 31 is defined as the Z direction. One direction perpendicular to the Z direction is defined as the X direction. The direction perpendicular to the Z direction and the X direction is defined as the Y direction. The Z direction is the direction from the first substrate 11 toward the second substrate 12. The Z direction is the stacking direction of the first structure 10 and the second structure 20.

[0012] The first substrate 11 includes a semiconductor. Specifically, the first substrate 11 includes at least one of, for example, silicon and compound semiconductors (e.g., SiC, GaN, etc.). The first substrate 11 includes, for example, a semiconductor substrate. The substrate may be a wafer or a chip. The first substrate 11 is, for example, a silicon substrate. However, in the embodiment, the first substrate 11 is not limited to a substrate. The first substrate 11 may be a part of a wafer or a chip.

[0013] The first wiring portion 21 (conductive portion) is provided on the first substrate 11. The first wiring portion 21 may include a plurality of wirings. A part of the first wiring portion 21 is provided on the first surface 11f side of the first substrate 11. For example, the first wiring portion 21 includes at least one selected from the group consisting of Al, AlCu, AlSiCu, Ti, TiN, Cu, TaN, W, and alloys thereof. The first wiring portion may include a plurality of wiring layers.

[0014] In this example, the first insulating film 51 is provided on the first surface 11f. A part of the first insulating film 51 is located between the first wiring portion 21 and the first substrate 11. The first insulating film 51 contains, for example, at least any one of silicon oxide, silicon nitride, and polyimide.

[0015] The first bonding electrode 31 is electrically connected to the first wiring portion 21. The first bonding electrode 31 is in contact with the first wiring portion 21 on the first surface 11f side of the first substrate 11. The first bonding electrode 31 contains, for example, a malleable metal. Specifically, the first bonding electrode 31 contains, for example, at least one selected from the group consisting of gold (Au), aluminum (Al), copper (Cu), and iridium (Ir). It is desirable that the material of the first bonding electrode 31 has low electrical resistance and ductility. The first bonding electrode 31 may include a plurality of stacked conductive layers.

[0016] The first hard portion 41 is provided between the first substrate 11 and the second substrate 12 (or the second bonding electrode 32). In this example, the first hard portion 41 is provided between the first substrate 11 and the first bonding electrode 31 (more specifically, between the first wiring portion 21 and the first bonding electrode 31). For example, the surface 41h of the first hard portion 41 on the first substrate 11 side is in contact with the surface 21f of the first wiring portion 21 on the second substrate 12 side.

[0017] As shown in FIG. 1(b), the first hard portion 41 is located within the range R1 where the first bonding electrode 31 is provided in a plane perpendicular to the Z direction. For example, when viewed along the Z direction, the entire first hard portion 41 overlaps with the first bonding electrode 31 and is not provided outside the range R1. Note that the range R1 is a range surrounded by the outer periphery of one bonding electrode 31 when viewed along the Z direction. In this example, the range R1 is a rectangular region. The shapes of the first bonding electrode 31, the second bonding electrode 32, and the first hard portion 41 are not limited to rectangles, and may be circular, polygonal, or the like.

[0018] In the examples shown in FIGS. 1(a) and 1(b), the first rigid portion 41 is located at the central portion of the range R1, covered by the first bonding electrode 31, and arranged so as to be included in the first bonding electrode 31. For example, the four side surfaces 41s of the first rigid portion 41 and the surface 41g of the first rigid portion 41 on the side of the second base 12 are in contact with the first bonding electrode 31. However, the arrangement of the first rigid portion 41 is not limited to this, and for example, the first rigid portion 41 may be provided at the end of the range R1. The surface 41g may be in contact with the second bonding electrode 32.

[0019] As shown in FIG. 1(b), the planar shape of the first rigid portion 41 is rectangular. However, it is not limited to this, and the planar shape of the first rigid portion 41 is arbitrary. A plurality of first rigid portions 41 may be provided within one range R1. In the example of FIG. 1(a), the surface 41g is a plane extending along the X-Y plane. However, it is not limited to this, and the shape of the first rigid portion 41 is arbitrary. For example, the first rigid portion 41 may have a curved surface, or may be conical or frustoconical.

[0020] The hardness (or rigidity) of the first rigid portion 41 is higher than the hardness (or rigidity) of the first bonding electrode 31. That is, the first rigid portion 41 includes a material having a hardness higher than the hardness of the material of the first bonding electrode 31. As an index of hardness (or rigidity), Young's modulus or Vickers hardness may be used. For example, the Young's modulus of the material of the first rigid portion 41 is larger than the Young's modulus of the material of the first bonding electrode 31. For example, the Vickers hardness of the material of the first rigid portion 41 is larger than the Vickers hardness of the material of the first bonding electrode 31.

[0021] The first hard portion 41 includes, for example, a brittle material. The first hard portion 41 includes at least one selected from the group consisting of an insulating film such as silicon oxide and silicon nitride, aluminum, tungsten, titanium, palladium, nitrides thereof, alloys thereof, and oxides thereof. More specifically, the first hard portion 41 can use, for example, at least any one of a TEOS (Tetraethyl orthosilicate) film, a silicon oxide film, a silicon nitride film, a metal film (conductive film) including titanium nitride, etc., and a silicide film including tungsten silicide. Thus, the first hard portion 41 may be an insulating film or a metal film, as long as it has a higher hardness (or rigidity) than the first bonding electrode 31.

[0022] The hardness (or rigidity) of the first hard portion 41 may be higher than the hardness (or rigidity) of the second bonding electrode 32. That is, the first hard portion 41 may include a material having a hardness higher than the hardness of the material of the second bonding electrode 32.

[0023] The second substrate 12 includes a semiconductor. Specifically, the second substrate 12 includes at least any one of, for example, silicon and compound semiconductors. The second substrate 12 includes, for example, a semiconductor substrate. The second substrate 12 is, for example, a silicon substrate. However, in the embodiment, the second substrate 12 is not limited to a substrate. The second substrate 12 may be a part of a wafer or a chip.

[0024] The second wiring portion 22 (conductive portion) is provided on the second substrate 12. The second wiring portion 22 may include a plurality of wirings. A part of the second wiring portion 22 is provided on the second surface 12f side of the second substrate 12. For example, the second wiring portion 22 includes at least one selected from the group consisting of Al, AlCu, AlSiCu, Ti, TiN, Cu, TaN, W, and alloys thereof. The second wiring portion may include a plurality of wiring layers.

[0025] In this example, the second insulating film 52 is provided on the second surface 12f. A part of the second insulating film 52 is located between the second wiring portion 22 and the second substrate 12. The second insulating film 52 includes at least any one of, for example, silicon oxide, silicon nitride, and polyimide.

[0026] The second bonding electrode 32 is electrically connected to the second wiring portion 22. The second bonding electrode 32 is in contact with the second wiring portion 22 on the second surface 12f side of the second substrate 12. The second bonding electrode 32 includes, for example, a malleable metal. Specifically, the second bonding electrode 32 includes at least one selected from, for example, gold (Au), aluminum (Al), copper (Cu), and iridium (Ir). The second bonding electrode 32 may include a plurality of laminated conductive layers.

[0027] The first bonding electrode 31 and the second bonding electrode 32 are joined to each other between the first substrate 11 and the second substrate 12. For the joining, for example, crimping is used. However, the joining is not limited to crimping, and any method capable of joining the bonding electrodes to each other may be used. For example, in the thermocompression bonding method, crimping is performed while applying heat, or heat is applied after crimping to perform the joining.

[0028] As will be described later, the first structure 10 may include a first element portion 61 (see, for example, FIG. 21). The second structure 20 may include a second element portion 62 (see, for example, FIG. 21). The first element portion 61 is electrically connected to the first wiring portion 21. The second element portion 62 is electrically connected to the second wiring portion 22. For example, the first structure 10 and the second structure 20 are a wafer on which devices (elements and wirings) are formed, or a chip on which devices are formed.

[0029] Each of the first element portion 61 and the second element portion 62 includes, for example, at least one of a transistor, an integrated circuit, a control electrode, a high-frequency element, a sensor element, a memory element, a light-emitting element, and a light-receiving element. The transistor may be used for any purpose such as signal amplification, switching, or power control. The control electrode controls or detects, for example, an electric field or a magnetic field. The sensor element detects, for example, acceleration or pressure made by MEMS (Micro Electro Mechanical Systems). The sensor element may be a strain gauge or a light-receiving element such as a photodiode. The memory element is, for example, a DRAM or a non-volatile memory. The light-emitting element is, for example, a semiconductor laser or a light-emitting diode. However, not limited thereto, the first element portion 61 and the second element portion 62 may be any element that functions by being connected to a wiring.

[0030] By the bonding of the first bonding electrode 31 and the second bonding electrode 32, the first structure 10 and the second structure 20 are electrically connected. Input and output of an electrical signal are possible between the first structure 10 and the second structure 20 via the first bonding electrode 31 and the second bonding electrode 32. For example, input and output of an electrical signal are possible between the first element portion 61 and the second element portion 62.

[0031] As described above, in the embodiment, the first hard portion 41 is provided. Thereby, for example, it is possible to suppress the occurrence of defects (for example, open defect or short defect) in the bonding of the first bonding electrode 31 and the second bonding electrode 32. Therefore, the yield of the electronic device can be improved. For example, in a state where the first bonding electrode 31 is pressed against the second bonding electrode 32, the first bonding electrode 31 and the second bonding electrode 32 are bonded to each other. At this time, by providing the first hard portion 41 having a relatively high hardness, it is easy to firmly press the first bonding electrode 31 against the second bonding electrode 32, and it is easy to improve the adhesion between the first bonding electrode 31 and the second bonding electrode 32. In other words, the contact pressure between the first bonding electrode 31 and the second bonding electrode 32 can be increased. Thereby, the occurrence of an open defect between the first bonding electrode 31 and the second bonding electrode 32 can be suppressed. Alternatively, if the contact pressure between the bonding electrodes is too high, it is conceivable that the bonding electrodes may deform and the distance between the substrates may become shorter. In this case, the distance between the substrates becomes shorter, and the bonding electrodes may deform and spread in the in-plane direction (X and Y directions). When the bonding electrodes deform, they may come into contact with another conductive part (such as a wiring) provided on the substrate, and as a result, a short circuit failure may occur. On the other hand, the relatively hard first hard part 41 is, for example, more difficult to deform than the first bonding electrode 31. Therefore, by using the first hard part 41 as a spacer or a stopper, it is possible to prevent the distance between the first substrate 11 and the second substrate 12 from becoming too short. That is, the distance between the first substrate 11 and the second substrate 12 can be adjusted by the first hard part 41. Thereby, deformation of the first bonding electrode 31 and the second bonding electrode 32 can be suppressed, and the occurrence of a short circuit failure can be suppressed.

[0032] As described above, in this example, the first hard part 41 is provided between the first bonding electrode 31 and the first wiring part 21. Thereby, for example, it is easier to further improve the adhesion between the first bonding electrode 31 and the second bonding electrode 32.

[0033] As shown in FIG. 1(a), the length of the second bonding electrode 32 in the X direction may be longer than the length of the first bonding electrode 31 in the X direction. Thereby, for example, the influence of misalignment between the first bonding electrode 31 and the second bonding electrode 32 during bonding can be suppressed. Similarly, the length of the second bonding electrode 32 in the Y direction may be longer than the length of the first bonding electrode 31 in the Y direction. Conversely, the first electrode 31 may be longer. For example, the length of the first bonding electrode 31 in the X direction may be longer than the length of the second bonding electrode 32 in the X direction, or the length of the first bonding electrode 31 in the Y direction may be longer than the length of the second bonding electrode 32 in the Y direction.

[0034] Note that the boundary between the first bonding electrode 31 and the second bonding electrode 32 does not necessarily need to be clearly observed. That is, the first bonding electrode 31 and the second bonding electrode 32 joined to each other may be a conductive part provided integrally. In this case, the part of the conductive part on the first substrate 11 side can be regarded as the first bonding electrode 31, and the part of the conductive part on the second substrate 12 side can be regarded as the second bonding electrode 32.

[0035] Figs. 2(a) to 2(c) are schematic diagrams illustrating another electronic device according to the embodiment. Fig. 2(a) is a schematic cross-sectional view illustrating the electronic device 101 according to the embodiment. Fig. 2(b) is a schematic plan view illustrating the first structure 10. Fig. 2(c) is a schematic plan view illustrating the second structure 20.

[0036] In the electronic device 101, the first hard part 41 is provided between the first wiring part 21 and the first substrate 11. Otherwise, the same description as that of the electronic device 100 can be applied to the electronic device 101.

[0037] As shown in Figs. 2(a) and 2(b), the surface 41h of the first hard part 41 on the first substrate 11 side is in contact with the surface 51h of the first insulating film 51 on the second substrate 12 side. The first hard part 41 is covered by the first wiring part 21 and arranged so as to be included in the first wiring part 21. The four side surfaces 41s of the first hard part 41 and the surface 41g of the first hard part 41 on the second substrate 12 side are in contact with the first wiring part 21. In this case, the surface 41g basically contacts the first bonding electrode 31 via the first wiring part 21. However, for example, when the height of the first hard part 41 is higher than the height of the first wiring part 21, the surface 41g and the first bonding electrode 31 may be in contact with each other.

[0038] Also in the electronic device 101, similar to the electronic device 100, it is possible to suppress the occurrence of defects in the bonding between the first bonding electrode 31 and the second bonding electrode 32. Thereby, the yield of the electronic device can be improved.

[0039] FIGS. 3(a) to 3(c) are schematic diagrams illustrating another electronic device according to an embodiment. FIG. 3(a) is a schematic cross-sectional view illustrating the electronic device 102 according to the embodiment. FIG. 3(b) is a schematic plan view illustrating the first structure 10. FIG. 3(c) is a schematic plan view illustrating the second structure 20.

[0040] In the electronic device 102, the second structure 20 includes a second hard portion 42. Otherwise, the same description as that of the electronic device 100 can be applied to the electronic device 102.

[0041] The second hard portion 42 is provided between the first base 11 (or the first bonding electrode 31) and the second base 12. In this example, the second hard portion 42 is provided between the second base 12 and the second bonding electrode 32 (more specifically, between the second wiring portion 22 and the second bonding electrode 32). For example, the surface 42h of the second hard portion 42 on the second base 12 side is in contact with the surface 22f of the second wiring portion 22 on the first base 11 side.

[0042] As shown in FIG. 3(c), the second hard portion 42 is located within a range R2 where the second bonding electrode 32 is provided in a plane perpendicular to the Z direction. For example, when viewed along the Z direction, the entire second hard portion 42 is not provided outside the range R2. The entire second hard portion 42 is located within the range surrounded by the outer periphery of one bonding electrode 32 when viewed along the Z direction. In this example, the range R2 is a rectangular region. The shape of the second hard portion 42 is not limited to a rectangle, and may be a circle, a polygon, or the like.

[0043] In the examples shown in FIGS. 3(a) and 3(c), the second hard portion 42 is located at the center of the range R2, covered by the second bonding electrode 32, and arranged so as to be included in the second bonding electrode 32. For example, the four side surfaces 42s of the second hard portion 42 and the surface 42g of the first hard portion 41 on the second base 12 side are in contact with the second bonding electrode 32. However, the arrangement of the second hard portion 42 is not limited thereto, and for example, the second hard portion 42 may be provided at the end of the range R2. The surface 42g may be in contact with the first bonding electrode 31.

[0044] In this example, at least a part of the first rigid portion 41 overlaps with at least a part of the second rigid portion 42 in the Z direction. The surface 42g of the second rigid portion 42 may be in contact with the surface 41g of the first rigid portion 41.

[0045] As shown in FIG. 3(c), the planar shape of the second rigid portion 42 is rectangular. However, it is not limited thereto, and the planar shape of the second rigid portion 42 is arbitrary. A plurality of second rigid portions 42 may be provided within one range R2. In the example of FIG. 3(a), the surface 42g is a plane extending along the X-Y plane. However, it is not limited thereto, and the shape of the second rigid portion 42 is arbitrary. For example, the second rigid portion 42 may have a curved surface, or may be conical or frustum-shaped.

[0046] The hardness (or rigidity) of the second rigid portion 42 is higher than the hardness (or rigidity) of the second bonding electrode 32. That is, the second rigid portion 42 includes a material having a hardness higher than the hardness of the material of the second bonding electrode 32. The material of the second rigid portion 42 can be the same material as described for the first rigid portion 41. The material of the second rigid portion 42 may be the same as or different from the material of the first rigid portion 41.

[0047] The hardness (or rigidity) of the second rigid portion 42 may be higher than the hardness (or rigidity) of the first bonding electrode 31. That is, the second rigid portion 42 may include a material having a hardness higher than the hardness of the material of the first bonding electrode 31.

[0048] By providing the second rigid portion 42, it is easier to improve the adhesion between the first bonding electrode 31 and the second bonding electrode, for example, in the same manner as the above-described electronic device. For example, the occurrence of open defects between the first bonding electrode 31 and the second bonding electrode 32 can be more suppressed. Alternatively, the distance between the first substrate 11 and the second substrate 12 can be adjusted by the first rigid portion 41 and the second rigid portion 42. Thereby, for example, deformation of the first bonding electrode 31 and the second bonding electrode 32 can be suppressed, and the occurrence of short-circuit defects can be more suppressed.

[0049] As described above, at least a part of the first rigid portion 41 overlaps with at least a part of the second rigid portion 42 in the Z direction. In this case, it is easier to improve the adhesion between the first bonding electrode 31 and the second bonding electrode 32 between the first rigid portion 41 and the second rigid portion 42. Or, when the first rigid portion 41 and the second rigid portion 42 are in contact, the first rigid portion 41 and the second rigid portion 42 function as, for example, stoppers. The occurrence of defects in bonding can be more suppressed.

[0050] As shown in FIG. 3(a), the length of the second rigid portion 42 in the X direction may be longer than the length of the first rigid portion 41 in the X direction. Thereby, for example, the influence of misalignment between the first rigid portion 41 and the second rigid portion 42 during bonding can be suppressed. Similarly, the length of the second rigid portion 42 in the Y direction may be longer than the length of the first rigid portion 41 in the Y direction.

[0051] The second rigid portion 42 may be provided between the second wiring portion 22 and the second substrate 12. The surface 42h of the second rigid portion 42 on the side of the second substrate 12 may be in contact with the surface 52h of the second insulating film 52 on the side of the first substrate 11. The second rigid portion 42 may be covered by the second wiring portion 22 and arranged so as to be included in the second wiring portion 22. The four side surfaces 42s of the second rigid portion 42 and the surface 42g of the second rigid portion 42 on the side of the first substrate 11 may be in contact with the second wiring portion 22. In this case, the surface 42g basically contacts the second bonding electrode 32 via the second wiring portion 22. However, for example, when the height of the second rigid portion 42 is higher than the height of the second wiring portion 22, the surface 42g and the second bonding electrode 32 may be in contact.

[0052] FIGS. 4(a) to 4(c) are schematic diagrams illustrating another electronic device according to the embodiment. FIG. 4(a) is a schematic cross-sectional view illustrating the electronic device 103 according to the embodiment. FIG. 4(b) is a schematic plan view illustrating the first structure 10. FIG. 4(c) is a schematic plan view illustrating the second structure 20.

[0053] In the electronic device 103, the shapes of the first rigid portion 41 and the second rigid portion 42 are different from those of the electronic device 102. Other than this, for the description of the structure of the electronic device 103, the same description as that of the electronic device 102 can be applied.

[0054] In this example, the first rigid portion 41 does not overlap the second rigid portion 42 in the Z direction. For example, at least a part of the first rigid portion 41 is located between a part 42a of the second rigid portion 42 and another part 42b of the second rigid portion 42 in a plane perpendicular to the Z direction (when viewed along the Z direction).

[0055]

[0054] More specifically, when viewed along the Z direction, the first rigid portion 41 is surrounded by the second rigid portion 42. As shown in FIG. 4(b), the first rigid portion 41 is located at the center of the first bonding electrode 31 when viewed along the Z direction. As shown in FIG. 4(c), the second rigid portion 42 has a rectangular opening at the center when viewed along the Z direction. The outer periphery and the inner periphery of the second rigid portion 42 are rectangular. The first rigid portion 41 is located inside the inner periphery of the second rigid portion 42 when viewed along the Z direction.

[0056] With such positions and shapes of the first rigid portion 41 and the second rigid portion 42, for example, the movement of the first rigid portion 41 in the X-Y plane is restricted by the second rigid portion 42. For example, in the bonding process described later, it is possible to suppress the displacement of the position of the first structure 10 with respect to the second structure 20 along the X-Y plane. Note that the shape of the first rigid portion 41 and the shape of the opening of the second rigid portion 42 are not limited to rectangles, and may be circular or polygonal.

[0057] FIG. 5 is a schematic cross-sectional view illustrating another electronic device according to the embodiment.

[0058] In the electronic device 104 shown in FIG. 5, the first structure 10 further includes an insulating film 53. The second structure 20 further includes an insulating film 54. In the electronic device 104, the position and shape of the first rigid portion 41 are different from those of the electronic device 100. For the rest, the same description as that of the electronic device 100 can be applied to the description of the structure of the electronic device 104.

[0058] The insulating film 53 is provided between the first wiring portion 21 and the first bonding electrode 31. The insulating film 53 is in contact with the first wiring portion 21 and the first bonding electrode 31. The first bonding electrode 31 is in contact with the first wiring portion 21 at an opening 53a provided in the insulating film 53.

[0059] The first rigid portion 41 is provided between the insulating film 53 and the second substrate 12. In this example, two first rigid portions 41 are provided between the insulating film 53 and the first bonding electrode 31. The position of the opening 53a of the insulating film 53 in the X direction is between the position of one first rigid portion 41 in the X direction and the position of the other first rigid portion 41 in the X direction. Alternatively, the first rigid portion 41 may be rectangular with an opening at the center. In this case, when viewed along the Z direction, the opening 53a of the insulating film 53 is located inside the inner periphery of the first rigid portion 41.

[0060] The insulating film 54 is provided between the second wiring portion 22 and the second bonding electrode 32. The insulating film 54 is in contact with the second wiring portion 22 and the second bonding electrode 32. The second bonding electrode 32 is in contact with the second wiring portion 22 at the opening 54a provided in the insulating film 54. Each of the insulating film 53 and the insulating film 54 contains, for example, at least one of silicon oxide, silicon nitride, and polyimide.

[0061] Also in the electronic device 104, similar to the electronic device 100, it is possible to suppress the occurrence of defects in the bonding between the first bonding electrode 31 and the second bonding electrode 32. Thereby, the yield of the electronic device can be improved. Note that the openings 53a and 54a do not have to be at the center of the bonding electrodes, and may be offset to one side, for example.

[0062] FIGS. 6(a) and 6(b) are schematic diagrams illustrating another electronic device according to the embodiment. FIG. 6(a) is a schematic plan view illustrating the electronic device 105 according to the embodiment. In FIG. 6(a), some elements are omitted for easy viewing to simplify the display. FIG. 6(b) is a schematic cross-sectional view illustrating the cross-section taken along line A-A shown in FIG. 6(a).

[0063] In the electronic device 105, the first structure 10 and the second structure 20 are each a semiconductor substrate (chip). As shown in FIG. 6(a), the planar shape of each of the first structure 10 and the second structure 20 is rectangular. Note that the plurality of elements included in the first structure 10 and the second structure 20 do not all have to be the same size and shape. The first structure 10 and the second structure 20 do not have to be the same size and shape as each other.

[0064] In the electronic device 105, the first structure 10 includes a plurality of first bonding electrodes 31 and a plurality of first rigid portions 41. The plurality of first bonding electrodes 31 are arranged, for example, in the X direction and the Y direction. In other words, the plurality of first bonding electrodes 31 are arranged in an array on the X-Y plane.

[0065] The second structure 20 includes a plurality of second bonding electrodes 32. The plurality of second bonding electrodes 32 are arranged, for example, in the X direction and the Y direction. The plurality of second bonding electrodes 32 are arranged corresponding to the plurality of first bonding electrodes 31. That is, each of the plurality of second bonding electrodes 32 is arranged to be connected to each of the plurality of first bonding electrodes 31. Specifically, when viewed along the Z direction, each of the plurality of second bonding electrodes 32 overlaps each of the plurality of first bonding electrodes 31. That is, when viewed along the Z direction, one second bonding electrode 32 overlaps one bonding electrode 31.

[0066] Each of the plurality of first rigid portions 41 is provided corresponding to each of the plurality of first bonding electrodes 31. When viewed along the Z direction, each of the plurality of first rigid portions 41 overlaps each of the plurality of first bonding electrodes 31. That is, when viewed along the Z direction, one first rigid portion 41 overlaps one bonding electrode 31. For example, when viewed along the Z direction, all of the first bonding electrodes 31 overlap at least one first rigid portion 41.

[0067] According to the electronic device 105, even when a plurality of bonding electrodes are provided, it is possible to suppress bonding defects at each bonding electrode in the same manner as the description of the above-described electronic device. Thereby, the yield of the electronic device can be further improved. Note that the shape and arrangement of the electrodes do not necessarily have to be uniform. The electrodes do not have to be aligned either. Also, the shapes of the hard portions do not all have to be the same. The arrangement of the hard portions can be changed depending on the location where the electrodes are arranged.

[0068] FIGS. 7(a) to 7(c) are schematic diagrams illustrating another electronic device according to the embodiment. FIG. 7(a) is a schematic plan view illustrating the electronic device 106 according to the embodiment. In FIG. 7(a), for ease of viewing, some elements are omitted to simplify the display. FIG. 7(b) is a schematic cross-sectional view illustrating the cross-section taken along line B-B shown in FIG. 7(a). FIG. 7(c) is a schematic cross-sectional view illustrating the cross-section taken along line C-C shown in FIG. 7(a).

[0069] The electronic device 106 is different from the electronic device 105 in the arrangement of the first hard portion 41. Otherwise, the same description as that of the electronic device 105 can be applied to the configuration of the electronic device 106.

[0070] As shown in FIG. 7(a), the first base 11 (the first structure 10) includes a central region C1 and an outer region S1 located outside the central region C1 in a plane perpendicular to the Z direction. That is, when viewed along the Z direction, at least a part of the central region C1 is located between at least a part of the outer region S1 and the center point Cp1 of the first base 11. In a plan view as shown in FIG. 7(a), the outer region S1 is arranged outside at least a part of the central region C1 when viewed from the center point Cp1.

[0071] A plurality of first bonding electrodes 31 are provided in each of the central region C1 and the outer region S1. In other words, a part of the plurality of first bonding electrodes 31 is provided in the central region C1, and another part of the plurality of first bonding electrodes 31 is provided in the outer region S1. In this example, the outer region S1 includes four corner portions of the region where the first bonding electrodes 31 are arranged in an array. The central region C1 may be a region including the outermost first bonding electrode 31 (for example, the first bonding electrode 31x shown in FIG. 7(a)) among the regions where the first bonding electrodes 31 are arranged in an array.

[0072] FIG. 7(b) illustrates a cross section of the central region C1, and FIG. 7(c) illustrates a cross section of the outer region S1. A plurality of first rigid portions 41 are provided in the central region C1 and not provided in the outer region S1. Each of the plurality of first rigid portions 41 overlaps with each of the plurality of first bonding electrodes 31 provided in the central region C1 when viewed along the Z direction. That is, when viewed along the Z direction, one first rigid portion 41 overlaps with one bonding electrode 31 provided in the central region C1.

[0073] In the central region of the chip, defects (for example, open defects) in the bonding between the bonding electrodes may be more likely to occur than in the outer region of the chip. For example, in the central region of the chip, the adhesion between the bonding electrodes during bonding may be lower than in the outer region. On the other hand, according to the embodiment, the first rigid portion 41 is provided in the central region C1. Thereby, for example, in the central region C1, similar to the description of the above-described electronic device, defects in bonding can be suppressed, and the yield of the electronic device can be improved. Note that the shape and arrangement of the electrodes do not necessarily have to be uniform. The electrodes do not have to be aligned. Also, the shapes of the rigid portions do not all have to be the same. The arrangement of the rigid portions can be changed according to the location where the electrodes are arranged.

[0074] Figs. 8(a) to 8(c) are schematic diagrams illustrating another electronic device according to the embodiment. Fig. 8(a) is a schematic plan view illustrating the electronic device 107 according to the embodiment. In Fig. 8(a), for ease of viewing, some elements are omitted to simplify the display. Fig. 8(b) is a schematic cross-sectional view illustrating the cross-section along line D-D shown in Fig. 8(a). Fig. 8(c) is a schematic cross-sectional view illustrating the cross-section along line E-E shown in Fig. 8(a).

[0075] The electronic device 107 is different from the electronic device 106 in the arrangement of the first rigid part 41. Otherwise, the same description as that of the electronic device 106 can be applied to the configuration of the electronic device 107.

[0076] Fig. 8(b) illustrates the cross-section of the central region C1, and Fig. 8(c) illustrates the cross-section of the outer region S1. A plurality of the first rigid parts 41 are provided in the outer region S1 and not in the central region C1. Each of the plurality of first rigid parts 41 overlaps with each of the plurality of first bonding electrodes 31 provided in the outer region S1 when viewed along the Z direction, that is, when viewed along the Z direction, one first rigid part 41 overlaps with one bonding electrode 31 provided in the outer region S1.

[0077] In the outer region of the chip, defects (such as short-circuit defects) in the bonding between the bonding electrodes may be more likely to occur than in the central region of the chip. For example, in the outer region of the chip, deformation of the bonding electrodes during bonding may be more likely to occur than in the central region. In contrast, according to the embodiment, the first rigid part 41 is provided in the outer region S1. Thereby, for example, in the outer region S1, similar to the description of the above-described electronic device, bonding defects can be suppressed, and the yield of the electronic device can be improved. Note that the shape and arrangement of the electrodes do not necessarily have to be uniform. The electrodes do not have to be aligned. Also, the shapes of the rigid parts do not all have to be the same. The arrangement of the rigid parts can be changed according to the location where the electrodes are arranged.

[0078] Figs. 9(a) and 9(b) are schematic diagrams illustrating another electronic device according to the embodiment. Fig. 9(a) is a schematic plan view illustrating the electronic device 108 according to the embodiment. Fig. 9(b) is an enlarged view of a part of Fig. 9(a). In Figs. 9(a) and 9(b), for ease of viewing, some elements are omitted to simplify the display.

[0079] In the electronic device 108, the first structure 10 and the second structure 20 are each a semiconductor substrate (wafer). The first structure 10 and the second structure 20 include a plurality of chip regions CR. The plurality of chip regions CR are arranged in the X direction and the Y direction.

[0080] Fig. 9(b) represents one of the plurality of chip regions CR. In this example, the same description as that of the electronic device 105 described with respect to Figs. 6(a) and 6(b) can be applied to the configuration of each chip region CR. For example, the first hard portions 41 are provided in all the chip regions CR. That is, in each of all the chip regions CR, when viewed along the Z direction, each of the plurality of bonding electrodes 31 overlaps with each of the plurality of first hard portions 41.

[0081] Thus, each structure (each substrate) may be a wafer. Even in this case, similar to the description of the above-described electronic device, defective bonding can be suppressed at each bonding electrode. Thereby, the yield of the electronic device can be improved.

[0082] Figs. 10(a) to 10(c) are schematic diagrams illustrating another electronic device according to the embodiment. Fig. 10(a) is a schematic plan view illustrating the electronic device 109 according to the embodiment. Fig. 10(b) is an enlarged view of a part of Fig. 10(a). In Figs. 10(a) and 10(b), for ease of viewing, some elements are omitted to simplify the display. Fig. 10(c) is a schematic cross-sectional view illustrating the cross-section along the F-F line shown in Fig. 10(b).

[0083] The electronic device 109 is different from the electronic device 108 in the arrangement of the first rigid part 41. Otherwise, the same explanations as those for the electronic device 108 can be applied to the configuration of the electronic device 109.

[0084] As shown in Fig. 10(a), the first substrate 11 (the first structure 10) includes a central region C2 and an outer region S2 located outside the central region C2 in a plane perpendicular to the Z direction. That is, when viewed along the Z direction, at least a part of the central region C2 is located between at least a part of the outer region S2 and the center point Cp2 of the first substrate 11. In a plan view as shown in Fig. 10(a), when viewed from the center point Cp2, the outer region S2 is arranged outside at least a part of the central region C2.

[0085] A plurality of chip regions CR are provided in each of the central region C2 and the outer region S2. In other words, a part of the plurality of chip regions CR is provided in the central region C2, and another part of the plurality of chip regions is provided in the outer region S2. The same explanations as those for the chip region CR described with respect to Fig. 9(b) can be applied to the configuration of the chip region CR provided in the central region C2. That is, for example, the first rigid part 41 is provided in all the chip regions CR in the central region C2.

[0086] Figs. 10(b) and 10(c) illustrate the chip regions CR provided in the outer region S2. As shown in Figs. 10(b) and 10(c), in the chip region CR of the outer region S2, the first structure 10 includes the first substrate 11, the first wiring part 21, the first bonding electrode 31, and the first insulating film 51, and the second structure 20 includes the second substrate 12, the second wiring part 22, the second bonding electrode 32, and the second insulating film 52. In this example, the plurality of first rigid parts 41 are not provided in the outer region S2.

[0087] In the central region of the wafer, defects (such as open defects) are more likely to occur in the bonding of bonding electrodes compared to the outer region of the wafer. For example, in the central region of the wafer, the adhesion between the bonding electrodes during bonding may be lower than that in the outer region. In contrast, according to the embodiment, the first hard portion 41 is provided in the central region C2. Thereby, for example, in the central region C2, similar to the description of the above-described electronic device, bonding defects can be suppressed, and the yield of the electronic device can be improved.

[0088] FIG. 11 is a schematic plan view illustrating another electronic device according to the embodiment. In FIG. 11, for ease of viewing, some elements are omitted to simplify the display. The electronic device 110 shown in FIG. 11 is different from the electronic device 109 in the arrangement of the first hard portion 41. Otherwise, the same description as that of the electronic device 108 can be applied to the configuration of the electronic device 110.

[0089] The same description as that of the chip region CR described with reference to FIGS. 10(b) and 10(c) can be applied to the configuration of the chip region CR provided in the central region C2 of the electronic device 110. That is, in this example, the plurality of first hard portions 41 are not provided in the central region C2.

[0090] The same description as that of the chip region CR described with reference to FIG. 9(b) can be applied to the configuration of the chip region CR provided in the outer region S2 of the electronic device 110. That is, for example, the first hard portion 41 is provided in all the chip regions CR in the outer region S2.

[0091] In the outer region of the wafer, defects (e.g., short-circuit defects) are likely to occur in the bonding of bonding electrodes as compared with the central region of the wafer. For example, in the outer region of the wafer, deformation of the bonding electrodes during bonding is likely to occur as compared with the central region. On the other hand, according to the embodiment, the first hard portion 41 is provided in the outer region S2. Thereby, for example, in the outer region S2, similar to the description of the above-described electronic device, defective bonding can be suppressed, and the yield of the electronic device can be improved.

[0092] Next, a method for manufacturing the electronic device according to the above-described embodiment will be described. FIGS. 12(a) to 12(f), FIGS. 13(a) and 13(b) are schematic diagrams illustrating a method for manufacturing an electronic device according to an embodiment. These figures represent a method for manufacturing the electronic device 100 described with reference to FIGS. 1(a) to 1(c). FIGS. 12(a) to 12(c) are process-sequential schematic cross-sectional views representing a part of the manufacturing process of the first structure 10. FIG. 12(d) is a schematic plan view representing the first structure 10 shown in FIG. 12(c). FIGS. 12(e) and 12(f) are process-sequential schematic cross-sectional views representing a part of the manufacturing process of the second structure 20.

[0093] As shown in FIG. 12(a), a first wiring portion 21 (and a first element portion) is formed on the first substrate 11 (wiring layer forming step). A part of the first wiring portion 21 is disposed on the first substrate 11.

[0094] As shown in FIG. 12(b), a first hard portion 41 is formed on the first wiring portion 21 (hard portion forming step). In the hard portion forming step, a first hard layer 41f is formed on at least a part of the first substrate 11 and the first wiring portion 21, and the first hard layer 41f is patterned to form the first hard portion 41.

[0095] In the description of the embodiments, forming a layer on an element may include not only directly forming the layer on the element but also indirectly forming the layer on the element. That is, forming a layer on an element means not only the case where the layer is in contact with the element but also the case where another layer may be formed between the layer and the element.

[0096] In this example, a first hard layer 41f is directly formed on the first wiring portion 21 and the first insulating film 51. That is, the first hard layer 41f is in contact with the first wiring portion 21 and the first insulating film 51. The first hard layer 41f is, for example, a silicon oxide film. Then, for example, the first hard layer 41f is patterned by photolithography and etching (for example, reactive ion etching). In patterning, for example, a resist film is formed on the target layer, and a part of the resist film is left by photolithography. Using the remaining resist film as a mask, the target layer is processed by etching, and then the resist film is peeled off. By patterning, the portion of the first hard layer 41f located on a part of the first wiring portion 21 remains, and the rest is removed. Thereby, the first hard portion 41 is formed.

[0097] As shown in FIG. 12(c), a metal layer 31f is formed on the first wiring portion 21 and the first hard portion 41, and the metal layer 31f is patterned to form the first bonding electrode 31 (electrode forming step).

[0098] In this example, a metal layer 31f is directly formed on the first wiring portion 21 and the first hard portion 41. That is, the metal layer 31f is in contact with the first wiring portion 21 and the first hard portion 41. Then, for example, the metal layer 31f is patterned by photolithography and etching (for example, reactive ion etching). By patterning, the portions of the metal layer 31f located on a part of the first wiring portion 21 and on the first hard portion 41 remain, and the rest is removed. Thereby, the first bonding electrode 31 is formed.

[0099] The first bonding electrode 31 may include a plurality of layers. For example, the first bonding electrode 31 includes a Ti / Pd layer (barrier metal layer) and an Au layer. In this case, for example, a Ti / Pd layer (a layer in which a Ti layer is laminated on a Pd layer) is formed and patterned on the first wiring portion 21 and the first hard portion 41. An Au layer is formed on the Ti / Pd layer, and the resist is peeled off. Thereby, the first bonding electrode 31 may be formed.

[0100] As shown in FIGS. 12(c) and 12(d), before the bonding process described later, the first bonding electrode 31 includes a first electrode portion 31b and a first protruding portion 31p. The first protruding portion 31p is a portion protruding in the Z direction from the first electrode portion 31b. For example, the first protruding portion 31p is a portion protruding corresponding to the first hard portion 41. The first hard portion 41 is located between the first protruding portion 31p and the first base 11. As shown in FIG. 12(d), the planar shape of the first protruding portion 31p is a shape corresponding to the planar shape of the first hard portion 41, and is rectangular in this example.

[0101] For example, the first bonding electrode 31 before the bonding process is stepped. That is, as shown in FIG. 12(c), the first electrode portion 31b has a first electrode surface 31bf, and the first protruding portion 31p has a first end surface 31pf having a different height from the first electrode surface 31bf. The first end surface 31pf is the tip surface of the first protruding portion 31p in the Z direction and protrudes in the Z direction from the first electrode surface 31bf. The first electrode surface 31bf and the first end surface 31pf each extend along the X-Y plane. Note that the height of the first hard portion 41 may be higher than the upper surface of the first bonding electrode 31.

[0102] Note that in the embodiment, the first bonding electrode 31 does not necessarily have to be stepped. For example, the first bonding electrode 31 may be conical or frustoconical. For example, in a cross-sectional view as shown in FIG. 12(c), the tip surface of the first protruding portion 31p may be not only linear but also curved or may have a corner.

[0103] As shown in FIG. 12(e), a second wiring portion 22 (and a second element portion) is formed on the second substrate 12 (wiring layer forming step). A part of the second wiring portion 22 is disposed on the second substrate 12.

[0104] As shown in FIG. 12(f), a metal layer 32f is formed on the second wiring portion 22, and the metal layer 32f is patterned to form a second bonding electrode 32 (electrode forming step).

[0105] FIGS. 13(a) and 13(b) are schematic cross-sectional views showing the process of joining the first structure 10 and the second structure 20 in sequence. As shown in FIGS. 13(a) and 13(b), the first bonding electrode 31 and the second bonding electrode 32 are joined (bonding step). Thereby, the first structure 10 and the second structure 20 are joined.

[0106] Specifically, as shown in FIG. 13(a), the first structure 10 in FIG. 12(c) and the second structure 20 in FIG. 12(f) are arranged. That is, between the first substrate 11 and the second substrate 12, the first structure 10 and the second structure 20 are overlapped so that the first bonding electrode 31 and the second bonding electrode 32 face each other. Then, the first bonding electrode 31 and the second bonding electrode 32 are brought into contact with each other and pressure-bonded. That is, a pressure is applied from the first structure 10 toward the second structure 20, and a pressure is applied from the second structure 20 toward the first structure 10. Thereby, in the Z direction, the first bonding electrode 31 and the second bonding electrode 32 are pressed against each other, and the first bonding electrode 31 and the second bonding electrode 32 are pressure-bonded.

[0107] In such a bonding step, first, the first protrusion 31p (the first end face 31pf) and the second bonding electrode 32 come into contact with each other, and pressure is applied. Along with the application of pressure, as shown in FIG. 13(b), the first protrusion 31p is crushed and pressure-bonded. Then, the first electrode portion 31b (the first electrode face 31bf) and the second bonding electrode 32 come into contact with each other and are pressure-bonded. As described above, the electronic device 100 can be manufactured. In this step, heat can be applied simultaneously with the pressure to enhance the pressure-bonding effect.

[0108] Thus, the bonding process includes bringing the first protrusion 31p into contact with the second bonding electrode 32 in the Z direction. Here, since the first bonding electrode 31 has the first protrusion 31p, the contact area between the bonding electrodes can be reduced at the beginning of the bonding process. That is, the contact area between the first protrusion 31p and the second bonding electrode 32 (for example, the area of the first end face 31pf) is smaller than the contact area between the bonding electrodes when the bonding electrodes do not have protrusions (for example, the area of the first bonding electrode). By reducing the contact area, the pressure per unit area can be increased. Thereby, for example, the first bonding electrode 31 and the second bonding electrode 32 can be easily bonded, and the occurrence of defects (such as open defects) in the bonding between the bonding electrodes can be suppressed. Therefore, the yield of the electronic device can be improved.

[0109] As described above, the first structure 10 is provided with the first hard portion 41. Thereby, the first protrusion 31p can be formed. For example, as described above, the hard portion forming process forms the first hard portion 41 by patterning the first hard layer 41f. Thereby, the first hard portion 41 and the first protrusion 31p can be selectively formed. Also, the position and shape of the first protrusion 31p can be easily controlled.

[0110] Note that in each manufacturing method according to the embodiment, for example, even when no hard portion is provided, a protrusion can be formed on the bonding electrode by combining multiple patterning processes. Also in this case, by reducing the contact area between the bonding electrodes, the occurrence of defects in the bonding can be suppressed.

[0111] The hard portion forming process may be performed before forming a part of the first wiring portion 21. For example, the first hard portion 41 is formed on the base 11 or the first insulating film 51. Thereby, the first hard portion 41 described with reference to FIG. 2(a) is formed. Thereafter, a part of the first wiring portion 21 is formed on the first base 11 and the first hard portion 41, and the first bonding electrode 31 is further formed thereon. Thereafter, by performing the bonding process in the same manner as above, the electronic device 101 described with reference to FIG. 2(a) can be manufactured.

[0112] FIG. 14(a) and FIG. 14(b) are schematic diagrams illustrating a manufacturing method of another electronic device according to an embodiment. FIG. 14(a) and FIG. 14(b) are schematic cross-sectional views in process order illustrating the bonding of the first structure 10 and the second structure 20. These figures represent the manufacturing method of the electronic device 102 described with reference to FIGS. 3(a) to 3(c). As shown in FIG. 14(a), the first structure 10 includes a first hard portion 41, and before the bonding process, the first bonding electrode 31 includes a first electrode portion 31b and a first protruding portion 31p. The second structure 20 includes a second hard portion 42. The second hard portion 42 can be formed by adding a hard portion forming process similar to that of the first structure 10 in the formation of the second structure 20. That is, for example, after the wiring layer forming process for forming the second wiring portion 22, a hard portion forming process for forming the second hard portion 42 by patterning is added. Thereafter, an electrode process for forming the second bonding electrode 32 is performed.

[0113] As shown in FIG. 14(a), before the bonding process, the second bonding electrode 32 includes a second electrode portion 32b and a second protruding portion 32p. The second protruding portion 32p is a portion protruding in the -Z direction from the second electrode portion 32b. For example, the second protruding portion 32p is a portion protruding corresponding to the second hard portion 42. That is, the second hard portion 42 is located between the second protruding portion 32p and the second substrate 12. The planar shape of the second protruding portion 32p is a shape corresponding to the planar shape of the second hard portion 42, and is rectangular in this example. Note that the -Z direction is the direction from the second substrate 12 toward the second bonding electrode 32, and is the reverse direction of the Z direction in FIG. 14(a).

[0114] For example, the second bonding electrode 32 before the bonding process is stepped. That is, as shown in FIG. 14(a), the second electrode portion 32b has a second electrode surface 32bf, and the second protruding portion 32p has a second end surface 32pf having a different height from the second electrode surface 32bf. The second end surface 32pf is the tip surface of the second protruding portion 32p in the -Z direction and protrudes in the -Z direction from the second electrode surface 32bf. The second electrode surface 32bf and the second end surface 32pf each extend along the X-Y plane.

[0115] In the embodiment, the second bonding electrode 32 does not necessarily have to be stepped. For example, the second bonding electrode 32 may be conical or frustoconical. For example, in a cross-sectional view as shown in FIG. 14(a), the tip surface of the second protruding portion 32p may be not only linear but also curved or may have corners.

[0116] As shown in FIGS. 14(a) and 14(b), the first bonding electrode 31 and the second bonding electrode 32 are bonded (bonding step). Thereby, the first structure 10 and the second structure 20 are bonded.

[0117] In the bonding step, first, the first bonding electrode 31 and the second protruding portion 32p (second end surface 32pf) come into contact with each other, and pressure is applied. In this example, the first protruding portion 31p (first end surface 31pf) and the second protruding portion 32p (second end surface 32pf) come into contact with each other. Along with the application of pressure, as shown in FIG. 14(b), the first protruding portion 31p and the second protruding portion 32p are crushed and crimped. Then, the first electrode portion 31b (first electrode surface 31bf) and the second electrode portion 32b (first electrode surface 32bf) come into contact with each other and are crimped. In this way, the electronic device 102 can be manufactured. At this time, the first hard portion 41 and the second hard portion 42 may come into contact with each other.

[0118] Also in this example, the bonding electrodes have protruding portions. Thereby, for example, the contact area between the bonding electrodes can be reduced, and it becomes easier to bond the first bonding electrode 31 and the second bonding electrode 32.

[0119] For example, as shown in FIG. 14(a), before the bonding step, the length of the second protruding portion 32p in the X direction is longer than the length of the first protruding portion 31p in the X direction. Thereby, for example, the influence of misalignment between the first bonding electrode 31 and the second bonding electrode 32 during bonding can be suppressed. When the pressure during bonding is large, the first hard portion 41 and the second hard portion 42 come into contact with each other, and it is suppressed that the combined thickness of the first bonding electrode 31 and the second bonding electrode 32 becomes thinner than the combined thickness of the first hard portion 41 and the second hard portion 42.

[0120] Figs. 15(a) to 15(c) are schematic diagrams illustrating a manufacturing method of another electronic device according to an embodiment. Figs. 15(a) and 15(b) are schematic cross-sectional views in process order illustrating the joining of the first structure 10 and the second structure 20. Fig. 15(c) is a schematic plan view illustrating the second structure 20 before the joining process. These figures represent the manufacturing method of the electronic device 103 described with reference to Figs. 4(a) to 4(c). As shown in Fig. 15(a), the first structure 10 includes a first hard portion 41, and before the joining process, the first joining electrode 31 includes a first electrode portion 31b and a first protruding portion 31p. The second structure 20 includes a second hard portion 42, and before the joining process, the second joining electrode 32 includes a second electrode portion 32b and a second protruding portion 32p. The manufacturing method of the electronic device 103 is different from the manufacturing method of the electronic device 102 described above in terms of the position and shape of the second hard portion 42 and the second protruding portion 32p.

[0121] As shown in Fig. 15(c), the planar shape of the second protruding portion 32p corresponds to the planar shape of the second hard portion 42, and in this example, it has a rectangular opening (recess) in the center. The outer periphery and the inner periphery of the second protruding portion 32p are rectangular.

[0122] In the joining process, for example, the first protruding portion 31p (the first end face 31pf) and the second electrode portion 32b (the second electrode face 32bf) come into contact, and the second protruding portion 32p (the second end face 32pf) and the first electrode portion 31b (the first electrode face 31bf) come into contact. That is, the joining process includes bringing the first protruding portion 31p and the recess (the second electrode portion 32b) of the second joining electrode 32 into contact in the Z direction. With the application of pressure, as shown in Fig. 15(b), the first protruding portion 31p and the second protruding portion 32p are crushed and crimped. In this way, the electronic device 103 can be manufactured.

[0123] Figs. 16(a) and 16(b) are schematic diagrams illustrating a manufacturing method of another electronic device according to an embodiment. Figures 16(a) and 16(b) are schematic cross-sectional views showing the steps of exemplifying the joining of the first structure 10 and the second structure 20 in order. As shown in Figure 16(a), in this example, before the joining step, one first joining electrode 31 of the first structure 10 includes one first electrode portion 31b and a plurality of first protruding portions 31p. In one first joining electrode 31, a plurality of first rigid portions 41 corresponding to the plurality of first protruding portions 31p are provided.

[0124] Similarly, as shown in Figure 16(a), in this example, before the joining step, one second joining electrode 32 of the second structure 20 includes one first electrode portion 32b and a plurality of second protruding portions 32p. In one second joining electrode 32, a plurality of second rigid portions 42 corresponding to the plurality of second protruding portions 32p are provided.

[0125] As shown in Figure 16(b), the first joining electrode 31 and the second joining electrode 32 are joined. At this time, for example, at least a part of each first protruding portion 31p and at least a part of each second protruding portion 32p are arranged so as to overlap in the Z direction. For example, at least a part of each first rigid portion 41 and at least a part of each second rigid portion 42 are arranged so as to overlap in the Z direction.

[0126] In this way, a plurality of first rigid portions 41 and a plurality of first protruding portions 31p may be provided for one first joining electrode 31. A plurality of second rigid portions 32 and a plurality of second protruding portions 32p may be provided for one second joining electrode 32. Even in such a case, since the joining electrode has a protruding portion, the first joining electrode 31 and the second joining electrode 32 can be easily joined.

[0127] Figures 17(a) to 17(c) are schematic views exemplifying a method of manufacturing another electronic device according to an embodiment. Figures 17(a) and 17(b) are schematic cross-sectional views showing the steps of exemplifying the joining of the first structure 10 and the second structure 20 in order. Figure 17(c) is a schematic plan view exemplifying the second structure 20 before the joining step. The first structure 10 shown in Figure 17(a) may be the same as the first structure 10 shown in Figure 13(a).

[0128] A recess 22p (opening) is provided in the second wiring portion 22 of the second structure 20. For example, as shown in FIG. 17(c), the recess 22p is a rectangular opening provided in the second wiring portion 22.

[0129] As shown in FIGS. 17(a) and 17(c), before the bonding process, the second bonding electrode 32 includes a second electrode portion 32b (recess) and a second protruding portion 32p. In this example, the second electrode portion 32b is a portion provided in the recess 22p of the second wiring portion 22. A part of the second electrode portion 32b is disposed within the recess 22p. That is, among the second bonding electrodes 32, the rectangular recess provided corresponding to the recess 22p of the second wiring portion 22 is the second electrode portion 32b. The second protruding portion 32p is a portion provided on the second wiring portion 22 around the recess 22p. In the plan view of FIG. 17(c), the second protruding portion 32p surrounds the second electrode portion 32b.

[0130] As shown in FIG. 17(a), in this example, the first protruding portion 31p and the second electrode portion 32b are arranged to overlap in the Z direction, and the first electrode portion 31b and the second protruding portion 32p are arranged to overlap in the Z direction. In the bonding process, for example, the first protruding portion 31p and the second electrode portion 32b (recess) come into contact with each other, and the second protruding portion 32p and the first electrode portion 31b come into contact with each other. That is, the bonding process includes bringing the first protruding portion 31p and the recess (second electrode portion 32b) of the second bonding electrode 32 into contact with each other in the Z direction.

[0131] In the formation of the recessed portion 22p, for example, after forming a conductive layer to be the second wiring portion 22 on the second substrate 12, the conductive layer is patterned by lithography, etching, or the like. Thereby, the second wiring portion 22 having the recessed portion 22p can be formed. Thereafter, a metal layer to be the second bonding electrode 32 is formed and patterned on the second wiring portion 22 including the recessed portion 22p. Thereby, unevenness corresponding to the unevenness of the second wiring portion 22 can be formed on the second bonding electrode 32. In this way, by patterning the second wiring portion 22, unevenness (that is, the second electrode portion 32b and the second protruding portion 32p) may be formed on the second bonding electrode 32. Even in such a case, since the bonding electrode has the protruding portion, it is possible to facilitate the bonding between the first bonding electrode 31 and the second bonding electrode 32.

[0132] Although the case of patterning the second wiring portion 22 has been exemplified, in the embodiment, unevenness (that is, the first electrode portion 31b and the first protruding portion 31p) may be formed on the first bonding electrode 31 by patterning the first wiring portion 21. Further, the position and shape of the unevenness to be formed are not limited to the above, and can be appropriately changed. For example, the recess (opening) provided in the first wiring portion 21 or the second wiring portion 22 is not limited to a rectangle, and may be circular, polygonal, or the like, and may be located at the center of the bonding electrode or at the end.

[0133] FIGS. 18(a) to 18(c) are schematic diagrams illustrating a manufacturing method of another electronic device according to the embodiment. These figures illustrate the manufacturing method of the electronic device 105 described with respect to FIGS. 6(a) and 6(b). That is, the first structure 10 and the second structure 20 are each a semiconductor substrate (chip). FIGS. 18(a) and 18(b) are schematic plan views showing the first structure 10 and the second structure 20 before the bonding process, respectively. In FIGS. 18(a) and 18(b), for ease of viewing, some elements are omitted to simplify the display. FIG. 18(c) is a schematic cross-sectional view illustrating the bonding process.

[0134] In the first structure 10 shown in Fig. 18(a), each first bonding electrode 31 includes a first electrode portion 31b and a first protruding portion 31p. Each first rigid portion 41 is located between each first protruding portion 31p and the first substrate 11 (first wiring portion 21). Such a first bonding electrode can be formed in the same manner as the manufacturing method described above. That is, the first rigid layer 41f is patterned to form the first rigid portion 41. A metal layer 31f is formed on the first rigid portion 41 and patterned to form the first bonding electrode 31.

[0135] In the second structure 20 shown in Fig. 18(b), no second protruding portion is provided on each second bonding electrode 32. However, similar to Fig. 14(a) or Fig. 15(a), a second protruding portion may be provided on each of the second bonding electrodes 32 in Fig. 18(b).

[0136] As shown in Fig. 18(c), the first structure 10 and the second structure 20 are overlapped so that the first bonding electrode 31 and the second bonding electrode 32 face each other, and the first bonding electrode 31 and the second bonding electrode 32 are crimped (bonding step). In the bonding step, first, each of the plurality of first protruding portions 31p contacts each of the plurality of second bonding electrodes 32, and pressure is applied. Then, each of the plurality of first electrode portions 31b contacts each of the plurality of second bonding electrodes 32 and is bonded.

[0137] Thus, a first protruding portion 31p may be provided on each of the plurality of first bonding electrodes 31. Thereby, for example, in each first bonding electrode 31, the contact area with the second bonding electrode 32 can be reduced, and the first bonding electrode 31 and the second bonding electrode 32 can be easily bonded.

[0138] Figs. 19(a) to 19(c) are schematic diagrams illustrating a manufacturing method of another electronic device according to the embodiment. These figures illustrate the manufacturing method of the electronic device 106 described with reference to FIGS. 7(a) to 7(c). FIGS. 19(a) and 19(b) are schematic plan views showing the first structure 10 and the second structure 20 before the bonding process, respectively. In FIGS. 19(a) and 19(b), for ease of viewing, some elements are omitted to simplify the display. FIG. 19(c) is a schematic cross-sectional view illustrating the bonding process.

[0139] As shown in FIG. 19(a), the first substrate 11 includes a central region C1 and an outer region S1 located outside the central region C1 in a plane perpendicular to the Z direction. In this example, a plurality of first rigid portions 41 are provided in the central region C1 and not provided in the outer region S1.

[0140] The first bonding electrodes 31 are provided in each of the central region C1 and the outer region S1. The plurality of first bonding electrodes 31 include an electrode including the first protruding portion 31p (first convex electrode) and an electrode not including the first protruding portion 31p (first non-convex electrode). The first bonding electrode 31 including the first protruding portion 31p is provided in the central region C1 and not provided in the outer region S1. The first bonding electrode 31 not including the first protruding portion 31p is provided in the outer region S1 and not provided in the central region C1.

[0141] As shown in FIG. 19(c), before the bonding process, the height H1 of the first convex electrode (the first bonding electrode 31 provided in the central region C1) is higher than the height H2 of the first non-convex electrode (the first bonding electrode 31 provided in the outer region S1). Therefore, the first convex electrode protrudes more toward the second substrate 12 side than the first non-convex electrode. Note that the height of the electrode is the length of the electrode along the Z direction. That is, the height of the first bonding electrode 31 is the distance from the first wiring portion 21 to the tip surface of the first bonding electrode 31.

[0142] The hard part forming step of forming the first hard part 41 forms a first hard layer 41f on the central region C1 and the outer region S1, and patterns the first hard layer 41f to selectively form a plurality of first hard parts in the central region C1. That is, by patterning, a part of the first hard layer 41f provided in a part of the central region C1 and the outer region S1 is removed, and a part provided on a part of the first wiring part 21 in the central region C1 is left.

[0143] The electrode forming step of forming the first bonding electrode 31 forms a metal layer 31f on the central region C1 and the outer region S1. Then, the electrode forming step patterns the metal layer 31f to selectively form a plurality of first bonding electrodes 31 in each of the central region C1 and the outer region S1.

[0144] In the second structure 20 shown in FIG. 19(b), no second protrusion is provided on each second bonding electrode 32. For example, the heights of all the second bonding electrodes 32 are substantially the same.

[0145] As shown in FIG. 19(c), the first structure 10 and the second structure 20 are overlapped so that the first bonding electrode 31 and the second bonding electrode 32 face each other, and the first bonding electrode 31 and the second bonding electrode 32 are pressure-bonded (bonding step). In this bonding step, first, in the central region C1, each first protrusion 31p and each second bonding electrode 32 come into contact with each other, and pressure is applied. Then, in the central region C1, each first electrode part 31b and each second bonding electrode 32 come into contact with each other and are bonded. In the outer region S1, each first bonding electrode 31 and each second bonding electrode 32 come into contact with each other and are bonded.

[0146] According to the embodiment, in each first bonding electrode 31 in the central region C1, the contact area with the second bonding electrode 32 can be reduced, and the first bonding electrode 31 and the second bonding electrode 32 can be easily bonded. The hard part forming step patterns the first hard layer 41f to form the first hard part 41. Thereby, the first hard part 41 and the first protrusion 31p can be selectively formed in the central region C1.

[0147] Figs. 20(a) to 20(c) are schematic diagrams illustrating a manufacturing method of another electronic device according to an embodiment. These figures represent the manufacturing method of the electronic device 107 described with reference to Figs. 8(a) to 8(c). Figs. 20(a) and 20(b) are schematic plan views respectively showing the first structure 10 and the second structure 20 before the bonding process. In Figs. 20(a) and 20(b), for the sake of clarity, some elements are omitted to simplify the display. Fig. 20(c) is a schematic cross-sectional view illustrating the bonding process.

[0148] As shown in Fig. 20(a), the first substrate 11 includes a central region C1 and an outer region S1 located outside the central region C1 in a plane perpendicular to the Z direction. In this example, a plurality of the first hard portions 41 are provided in the outer region S1 and not provided in the central region C1.

[0149] The first bonding electrodes 31 are provided in each of the central region C1 and the outer region S1. The plurality of first bonding electrodes 31 include an electrode (convex electrode) including the first protruding portion 31p and an electrode (non-convex electrode) not including the first protruding portion 31p. The first bonding electrode 31 including the first protruding portion 31p is provided in the outer region S1 and not provided in the central region C1. The first bonding electrode 31 not including the first protruding portion 31p is provided in the central region C1 and not provided in the outer region S1.

[0150] As shown in Fig. 20(c), before the bonding process, the height H3 of the convex electrode (the first bonding electrode 31 provided in the outer region S1) is higher than the height H4 of the non-convex electrode (the first bonding electrode 31 provided in the central region C1). Therefore, the convex electrode protrudes more toward the second substrate 12 side than the non-convex electrode.

[0151] The hard part forming step of forming the first hard part 41 forms a first hard layer 41f on the central region C1 and the outer region S1, and patterns the first hard layer 41f to selectively form a plurality of first hard parts in the outer region S1. That is, by patterning, a part of the outer region S1 and a part provided in the central region C1 of the first hard layer 41f are removed, and a part provided on a part of the first wiring part 21 in the outer region S1 is left.

[0152] The electrode forming step of forming the first bonding electrode 31 forms a metal layer 31f on the central region C1 and the outer region S1. Then, the electrode forming step patterns the metal layer 31f to selectively form a plurality of first bonding electrodes 31 in each of the central region C1 and the outer region S1. The second structure 20 shown in FIG. 20(b) is the same as the description of the second structure 20 in FIG. 19(b).

[0153] In the bonding step, first, in the outer region S1, each first protruding portion 31p and each second bonding electrode 32 come into contact with each other, and pressure is applied. Then, in the outer region S1, each first electrode portion 31b and each second bonding electrode 32 come into contact with each other and are bonded. In the central region C1, each first bonding electrode 31 and each second bonding electrode 32 come into contact with each other and are bonded.

[0154] According to the embodiment, in each first bonding electrode 31 in the outer region S1, the contact area with the second bonding electrode 32 can be reduced, and the first bonding electrode 31 and the second bonding electrode 32 can be easily bonded. The hard part forming step patterns the first hard layer 41f to form the first hard part 41. Thereby, the first hard part 41 and the first protruding portion 31p can be selectively formed in the outer region S1.

[0155] The length L1 of the first hard part 41 along the Z direction may be shorter than the length L2 of the first electrode part 31b along the Z direction. That is, the length L3 of the first protruding portion 31p along the Z direction may be shorter than the length L2 of the first electrode part 31b along the Z direction.

[0156] The length L1 of the first rigid portion 41 along the Z direction may be longer than the length L2 of the first electrode portion 31b along the Z direction. That is, the length L3 of the first protruding portion 31p along the Z direction may be longer than the length L2 of the first electrode portion 31b along the Z direction. In this case, for example, it is easier to make the first rigid portion 41 function as a stopper.

[0157] In the above manufacturing method, the case where the first structure 10 and the second structure 20 are each a chip has been described. However, the first structure 10 and the second structure 20 may each be a wafer. In that case, for example, the electronic device 108 (FIGS. 9(a) and 9(b)), the electronic device 109 (FIGS. 10(a) to 10(c)), or the electronic device 110 (FIG. 11) can be manufactured by a similar manufacturing method.

[0158] For example, regarding the manufacturing method of the electronic device 109 shown in FIG. 10, in the first structure 10 before bonding, the first bonding electrode 31 in the central region C2 is a convex electrode, and the first bonding electrode 31 in the outer region S2 is a non-convex electrode. For example, regarding the manufacturing method of the electronic device 110 shown in FIG. 11, in the first structure 10 before bonding, the first bonding electrode 31 in the central region C2 is a non-convex electrode, and the first bonding electrode 31 in the outer region S2 is a convex electrode.

[0159] In the above, the bonding between chips and the bonding between wafers have been exemplified. However, the embodiment may be the bonding between a chip and a wafer.

[0160] FIG. 21 is a schematic cross-sectional view illustrating another electronic device according to the embodiment. The electronic device 111 shown in Fig. 21 includes a first structure 10 and a second structure 20. The first structure 10 includes a first substrate 11, a first wiring portion 21, a first bonding electrode 31, and a first element portion 61. In this example, the first structure 10 is a sensor element formed by a MEMS process for detecting acceleration or angular velocity. For example, the first element portion 61 includes an electrode whose position is displaced by acceleration or the like generated in the first structure. For example, the capacitance of the electrode changes due to the displacement of the electrode. By detecting the capacitance, acceleration or the like can be detected. The first wiring portion 21 is electrically connected to the electrode of the first element portion 61.

[0161] The second structure 20 includes a second substrate 12, a second wiring portion 22, a second bonding electrode 32, and a second element portion 62. In this example, the second structure 20 is an LSI (Large-Scale Integration) chip. For example, the second element portion 62 includes an electrical element such as a field-effect transistor. For example, the second substrate 12 includes a semiconductor substrate 12a and a multilayer wiring portion 12b (interlayer insulating film) formed on the semiconductor substrate 12a. Electrical elements such as field-effect transistors are provided on the semiconductor substrate 12a. The second wiring portion 22 includes a wiring layer 22a provided on the second substrate 12 and a multilayer wiring layer 22b provided on the multilayer wiring portion 12b. The wiring layer 22a is electrically connected to the second element portion 62 via the multilayer wiring layer 22b. The second wiring portion 22 may include an electrode pad portion 22c. For example, power and signals are supplied to the LSI chip from the outside via the electrode pad portion 22c.

[0162] The second bonding electrode 32 is bonded to the first bonding electrode 31. As a result, the first structure 10, which is a sensor element formed by a MEMS process, is bonded to the second structure 20, which is an LSI chip. For example, the electrical signal detected by the first element portion 61 is input to the second element portion 62 via the first wiring portion 21, the first bonding electrode 31, the second bonding electrode 32, and the second wiring portion (wiring layer 22a, multilayer wiring layer 22b). In the second element portion 62, the signal detected by the first element portion 61 can be processed. Note that the illustration of wiring and the like is omitted.

[0163] For example, a first rigid portion 41 is provided on at least a part of the first bonding electrode 31 or the first wiring portion 21. For example, at least a part of the first bonding electrode 31 is a convex electrode before the bonding process. For example, a second rigid portion 42 is provided on at least a part of the second bonding electrode 32 or the second wiring portion 22. For example, at least a part of the second bonding electrode 32 is a convex electrode before the bonding process. Thus, similar to the above-described electronic device, the yield can also be improved in the electronic device 111.

[0164] FIG. 22 is a schematic cross-sectional view illustrating another electronic device according to the embodiment. The electronic device 112 shown in FIG. 22 includes a first structure 10, a second structure 20, and a third structure 30. The first structure 10 is positioned between the second structure 20 and the third structure 30. The first structure 10 is connected to the second structure 20 and is also connected to the third structure 30. Thus, the electronic device according to the embodiment may be a device in which three or more structures (for example, chips or wafers) are stacked.

[0165] The first structure 10 includes a first substrate 11, a first wiring portion 21, a first bonding electrode 31, a first element portion 61, and a fourth bonding electrode 34. The first substrate 11, the first bonding electrode 31, and the first element portion 61 are, for example, the same as those described in FIG. 21. The first wiring portion 21 includes a wiring layer 21a, a wiring layer 21b, and a wiring layer 21c. The wiring layer 21a is provided on the second structure 20 side of the first substrate 11. The wiring layer 21b is provided on the third structure 30 side of the first substrate. The wiring layer 21c connects the wiring layer 21a and the wiring layer 21c. The wiring layer 21c is, for example, a through via penetrating the first substrate 11. The fourth bonding electrode 34 contacts the wiring layer 21b and is electrically connected to the wiring layer 21b.

[0166] The second structure 20 is, for example, an LSI chip as described in FIG. 21. The first structure 10 and the second structure 20 are electrically connected in the same manner as described in FIG. 21.

[0167] The third structure 30 includes a third substrate 13, a third wiring portion 23, a third bonding electrode 33, and a third element portion 63. In this example, the third structure 30 is a MEMS that detects acceleration or pressure. For example, the third element portion 63 includes a weight or diaphragm that is displaced by pressure or the like applied to the third structure 30. For example, the third element portion 63 includes a sensor portion (e.g., a strain gauge) that detects the displacement of the weight or diaphragm. The sensor portion may be an electrode that detects the displacement of the weight or diaphragm by capacitance. The third wiring portion 23 is electrically connected to the sensor portion of the third element portion 63. The third bonding electrode 33 is in contact with the third wiring portion 23 and is electrically connected to the third wiring portion 23.

[0168] The third bonding electrode 33 is bonded to the fourth bonding electrode 34. Thereby, the third structure 30 is bonded to the first structure 10. The third structure 30, which is a MEMS, is electrically connected to the second structure 20, which is an LSI chip, via the first substrate 11. For example, the electrical signal detected by the third element portion 63 is input to the second element portion 62 via the third wiring portion 23, the third bonding electrode 33, the fourth bonding electrode 34, the first wiring portion 21 (wiring layers 21b, 21c, 21a), the first bonding electrode 31, the second bonding electrode 32, and the second wiring portion (wiring layer 22a, multilayer wiring layer 22b). In the second element portion 62, the signal detected by the third element portion 63 can be processed.

[0169] For example, similar to the first hard portion 41, a hard portion is provided on the third bonding electrode 33 or the third wiring portion 23. Alternatively, similar to the first hard portion 41, a hard portion is provided on the fourth bonding electrode 34 or the wiring layer 21b. For example, before bonding, at least a part of the third bonding electrode 33 or the fourth bonding electrode 34 is a convex electrode. Thereby, similar to the above-described electronic device, the yield can also be improved in the electronic device 112.

[0170] The electronic device and its manufacturing method according to the embodiment have been described above. Hereinafter, more specific examples will be described.

[0171] In recent years, three-dimensional stacking technology has been advanced to join semiconductor devices with different functions to form products with high technical difficulty in a single wafer process. A so-called microbump structure (connection electrode) is used for the joining.

[0172] For example, a plurality of Au bonding electrodes with a height of about 1 to 2 μm and a size of about 3 to 5 μm are formed on an LSI substrate (on which a control circuit or the like is formed). The method for forming the Au bonding electrodes is to pattern with a resist on the wiring and then form Au by electroplating to make electrodes. On the other hand, on another substrate having, for example, a MEMS sensor function, Au bonding electrodes are similarly formed. After each substrate is thinned and diced into chips, the bonding electrodes are opposed to each other and bonded by a thermocompression bonding method. A semiconductor chip having both a MEMS sensor function and a control function can be integrally formed.

[0173] However, when stress (load) is applied to the chip during bonding by the thermocompression bonding method, stress concentration occurs at the peripheral part of the chip, and problems such as only the peripheral part being bonded and the central part not being bonded easily occur. Also, when the stress during compression is increased, deformation of the Au electrode for bonding becomes large and it protrudes from the wiring, easily causing problems such as short-circuiting with another electrically separated wiring. Further, when bonding in the wafer state without dicing the chips, there may be a difference in bonding yield (short-circuit defect, open defect) between the peripheral part and the central part of the wafer.

[0174] In addition to the influence of stress and load during substrate or chip bonding, when forming electrodes by electroplating, there may be differences in electroplating growth within the chip or on the wafer surface due to the electroplating current density, that is, variations in electrode height. Similar to the above, problems such as partial non-bonding during bonding and deterioration of the yield easily occur.

[0175] On the other hand, in the embodiment, a step is formed on the surface portion of the bonding electrode at any position, and the height of the bonding electrode is partially changed to make the bonding between the electrodes more reliable in the bonding process such as thermocompression bonding. Further, a stopper structure is formed by the lower layer film (of the electrode) for forming the step structure, and even if excessive pressure is applied during bonding, deformation of the Au electrode can be suppressed, so that short - circuit of the wiring portion can be suppressed.

[0176] In the embodiment, in a plurality of micro - bump structures (bonding electrodes) formed on one or more wafers, chips, or substrates (for example, wafers, chips, substrates on which a CMOS circuit is formed, wafers, chips, substrates on which a sensor or the like is formed, or wafers, chips, substrates on which connection wiring is formed, etc.), the height of the bonding electrodes is different at any position within the wafer, chip, or substrate. For the bonding electrodes with different heights, there are a plurality of upper surfaces with different heights. A material having a greater hardness and rigidity than the material of the bonding electrode is formed below the bonding electrode, above or below the wiring connected thereto. Further, the embodiment includes a wafer, a chip, or a substrate bonded using the bonding electrode.

[0177] (Example 1) It is assumed that a substrate (for example, an LSI substrate) having a drive - detection circuit formed by a CMOS process on a silicon substrate and a sensor device formed by a MEMS process are formed on a substrate (for example, a MEMS substrate), and after being diced, they are bonded. The method for forming the bonding electrodes with partially different heights (referred to as convex electrodes for convenience) according to the embodiment is the same regardless of which substrate is applied. Therefore, in the following description, it is assumed that convex electrodes are formed on the LSI substrate side.

[0178] First, a drive circuit, an arithmetic circuit, etc. are formed on a silicon substrate by a general CMOS process or the like. The uppermost layer of the wiring layer on which the bonding electrodes are formed has a pattern adapted to the connected MEMS portion. The uppermost layer of the wiring is formed of, for example, Al wiring.

[0179] On the Al wiring at the location where the convex electrode is to be formed, a pattern is formed with a TEOS film as a spacer. For example, after forming the Al wiring, a TEOS film is deposited to a thickness of about 100 nm to 1 μm over the entire surface. Through lithography using a resist mask and anisotropic etching, the TEOS film is processed to form a TEOS pattern on the Al wiring corresponding to the location where the convex electrode is to be formed.

[0180] The arrangement varies in stress and load distribution depending on the bonding apparatus and method used, so it becomes an arrangement pattern that compensates for such variations. For example, when bonding chips together, pushing-in loads and stresses tend to concentrate on the peripheral portions of the chips. Therefore, convex bonding electrodes are mainly arranged in the central portions of the chips. Correspondingly, the TEOS spacers are arranged in the central portions of the chips. Conversely, in the case of an apparatus where the pushing-in load tends to concentrate on the central portion of the chip, it is effective to arrange convex-shaped electrodes on the peripheral portions of the chip. Therefore, the TEOS film spacers are formed to correspond to the electrodes corresponding to the peripheral portions of the chip. The shape of the spacer itself is, for example, when the size of the bonding electrode is 5 μm square, the size of the TEOS is 1 μm square.

[0181] Next, Ti / Pd is formed over the entire surface as a barrier metal. For example, its thickness is 100 / 50 nm. For example, it is formed by sputtering. Next, a pattern for forming the bonding electrode is formed by lithography. Au is formed at the locations patterned by lithography by electroplating. For example, its thickness is 1 to 2 μm. Next, after removing the resist, the barrier metal is removed by the Wet method to form the Au bonding electrode. At the locations where the TEOS film exists, the upper surface of the Au electrode becomes higher. The spacer is not a single layer. After forming the first spacer, a TEOS thin film is formed again, and patterning by lithography and etching can be performed to form a stepped convex portion.

[0182] On the MEMS substrate side as well, an Au bonding electrode is formed on the wiring layer where the bonding electrode is arranged. In this case, since it is not a convex shape, the barrier metal is directly formed on the wiring layer to form the bonding electrode without forming a TEOS film.

[0183] After thinning the wafers of the LSI substrate and the MEMS substrate to a desired thickness, they are diced into chips. Then, with the bonding surfaces facing each other, chips are bonded to each. Usually, one of the wafers is placed on a fixed stage, and the other is adsorbed on a movable stage. Then, the movable stage is brought closer so that the bonding surfaces (the Au bonding electrodes of each) come into contact. Alignment of the electrodes is performed by a bonding apparatus. In many cases, alignment marks are created in each chip in advance, optically read by the bonding apparatus, and alignment is performed by fine movement of the stage. A load is applied to one or both stages to thermocompression bond the bonding electrodes together. In the case of Au, the stage is heated to about 200°C to 400°C.

[0184] Since the area of the convex portion is smaller than the area of the entire bonding electrode, the pressure at the first contact point appears to be large, and the Au electrode is likely to deform. Therefore, it is easier to obtain a better electrical yield. In this way, a device in which the drive detection circuit of the LSI and the MEMS sensor unit are integrated can be formed.

[0185] (Example 2) Example 2 assumes the case of laminating wafers together. The method of forming the bonding electrodes is the same as in the case of Example 1, but the locations where convex electrodes are to be formed are in the central part (central region) or the peripheral part (outer region) of the wafer with respect to the wafer. Due to the pushing load distribution at the periphery or the center of the wafer by the wafer bonding apparatus used, the variation in the pushing load within the wafer surface corresponds to the bonding electrode yield.

[0186] In this case, the spacers formed on the wiring, i.e., the locations where the convex electrodes are to be arranged, are not formed on all chips with the same pattern for each chip. Instead, they are formed only on the chips in the central part of the wafer (when the pushing load is large in the peripheral part of the wafer).

[0187] Similar to Example 1, after forming, for example, a TEOS film as a spacer on the wiring, patterning is performed using a resist mask and processing is carried out by anisotropic etching. At this time, lithography is performed only on the central part of the wafer of the resist mask, and lithography is not performed on the peripheral part. When performing lithography using a stepper, the chips to be exposed are limited, and by exposing only the chips in the central part of the wafer, the resist can be left on the periphery. In the case of a full-surface exposure apparatus, data is created so that only the pattern of the spacer film is formed in the center with the pattern at the time of creating the reticle (photo mask). (However, in the case of a stepper or the like, there may be a pattern with a missing wafer periphery, but this will ultimately be a non-operating part as a product.)

[0188] Similar to Example 1, after forming, for example, a spacer of a TEOS film in the central part with respect to the wafer on the wiring layer, a barrier metal is formed over the entire surface. The lithography for forming the bonding Au electrode is the same as in Example 1, and the same pattern is used within the wafer surface. (The missing pattern is the same.)

[0189] The method for forming the Au electrode is also processed by plating or the like in the same manner as in Example 1, and the bonding Au electrode can be formed by performing resist removal, etching of the barrier metal, etc. At this time, a convex electrode is formed in the central part with respect to the wafer.

[0190] After thinning the wafer to a desired thickness, the wafers to be bonded are placed on the stage, and wafer bonding is performed by applying a load. After bonding, dicing is performed to form a stacked device by chipping.

[0191] If the variation in the pushing load of the wafer bonding apparatus is larger in the central part and the bonding yield of the peripheral part of the wafer is not good (open), it is formed in the peripheral part of the wafer by patterning the TEOS spacer film.

[0192] (Example 3) Example 3 is the case where the spacer is formed in the lower layer of the wiring layer. Before forming a wiring layer, for example, an Al wiring, a silicon nitride film is formed on an interlayer film, and spacers are formed only at the locations where convex electrodes are to be formed by resist patterning and anisotropic etching. Alternatively, the interlayer film itself is processed by resist patterning and etching to form steps corresponding to spacers in a desired region. Thereafter, Al is formed over the entire surface and patterned to form the wiring layer. At this time, patterning in a stepped shape is performed at desired locations of the wiring layer.

[0193] Next, a barrier metal is formed over the entire surface and patterned with a resist at the locations where bonding Au electrodes are to be formed. Au is formed by plating, and the resist and unnecessary barrier metal are removed to form the bonding electrodes. Since there are spacers or steps under the wiring layer, stepped bonding electrodes are formed in a desired region in the same manner as in Example 1.

[0194] (Example 4) Example 4 is a case where a spacer is used as a stopper structure. There are yield failures of bonding electrodes due to the pushing load distribution and stress distribution of the bonding device, and open failures due to non-contact between bonding electrodes. On the other hand, in order to prevent open failures, if the pushing amount (load / stress) is increased and pushed in excessively, the bonding electrode material may be deformed more than expected, and short failures may occur between the wiring layers where the electrodes are arranged. In that case, it is possible to avoid shorts due to deformation of the electrode material by preventing the substrates from approaching each other more than necessary. In this example, the distance between the bonding substrates is controlled by taking advantage of the fact that the spacer portion is less likely to be deformed even when stress is applied by bonding.

[0195] Convex electrodes are formed in the same manner as in Example 1 or 2. Since Au, which is the electrode material, has ductility, Au deforms when the electrodes are pressed against each other for bonding, but the TEOS film, which is a brittle material, does not deform. Therefore, the spacer TEOS film serves as a stopper, and the bonding distance of the device is maintained by the thickness of the spacer even when the load is large.

[0196] At this time, since the convex electrode intentionally increases the bonding load and stress so that the electrode deformation becomes large, it is desirable to make the spacer thick or to form spacers on both devices to be bonded. The arrangement may be such that the convex electrodes are arranged in a range where the substrate does not deform. The bonding process can be applied regardless of whether it is a wafer or a chip. The arrangement of the electrodes with spacers may be made only at the locations where the load is applied, in particular.

[0197] (Example 5) When a displacement may occur due to the application of a pushing load during bonding, this example is an example in which the spacer is made into an enclosure structure so that displacement does not occur. In this case, spacers are formed on the substrates on both sides to be bonded. The spacer on one side is patterned in a dot shape, and the opposite side is patterned in a "ロ" (square shape with an opening or recess in the center) shape. The dot-shaped spacer is arranged so as to be included in the "ロ" - shaped spacer during bonding. Even when a force acts such that the substrate tends to shift when a load is applied during bonding, for example, there is an anchor effect that can suppress the shift.

[0198] The present invention is not limited to the above examples, and various modifications can be made and implemented without departing from the gist of the present invention.

[0199] The method of forming the bonding electrode may be a plating method instead of a sputtering method. In this case, after forming the bonding electrode material (for example, Au) over the entire surface, the bonding electrode is formed by lithography and etching into a desired electrode shape. The spacer film is formed before sputtering the bonding electrode material.

[0200] Dummy electrodes that do not contribute electrically to bonding (for example, electrodes not electrically connected to the element portion) may be arranged and their shapes may be made convex. In particular, when the pressing pressure during substrate bonding becomes large, by arranging dummy electrodes that bear stress separately from the electrodes that are electrically bonded, the uniformity of the electrical bonding electrodes can be improved and the bonding yield can be improved.

[0201] Whether chips are joined together or wafers are joined together, convex electrodes may be formed on the entire surface of the wafer (all bonding electrodes). In this case, since the area of the convex portion is small, the contact area at the time of bonding (the area that first comes into contact) can be reduced, so sufficient bonding can be formed even with a small load. For example, even when there is a distribution in the pressing load and stress during bonding, the bonding yield can be improved by reducing the influence.

[0202] During bonding, two types of substrates or chips are attached, but bonding of three or more substrates or chips may be performed, such as bonding another substrate onto the substrate that has been bonded once. In this case (when the areas of the bonding electrodes are the same, that is, when the apparent pressing loads applied to each are about the same), if the load applied later is not made smaller than the load applied to the chip or wafer that was bonded first, the joint that was bonded first will be deformed by the load. As a result, there is a risk of short circuit due to deformation in the first joint, while sufficient bonding may not be achieved at the location to be bonded later. Therefore, by making the bonding electrode to be bonded second the above-described convex electrode, the apparent contact area related to bonding can be reduced, and the apparent pressing load and stress can be reduced. Therefore, for example, thermocompression bonding can proceed for the second bonding first, and the influence on the first bonding location can be reduced.

[0203] The embodiment also supports attaching a plurality of chips on one substrate. The substrates (wafers or chips) to be bonded can include at least any one of a CMOS circuit (LSI) having a control function, a MEMS electrode structure having electrodes and vias, inertial MEMS such as MEMS accelerometers and gyroscopes, sensor elements such as pressure sensors, memory elements such as DRAM and non-volatile memories, passive elements such as CMOS sensors, elements having a power control function, optical elements, high-frequency elements such as RF-MEMS, elements formed of compound semiconductors, and those having functions of wirings such as connection layers such as external bonding pads. However, the functions of the substrates (wafers or chips) to be bonded are not limited.

[0204] Regarding the substrates (wafers or chips) to be bonded, their size may be a 300 mm wafer or a wafer of 200 mm or less if it is a wafer. The size of the chips is not limited either.

[0205] According to an embodiment, an electronic device capable of improving the yield and a method for manufacturing the same can be provided.

[0206] In this specification, "electrically connected" includes not only the case of being connected by direct contact but also the case of being connected via other conductive members or the like.

[0207] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, regarding the specific configuration of each element included in the electronic device, as long as those skilled in the art can appropriately select from the known range and implement the present invention in the same manner to obtain the same effects, it is included in the scope of the present invention.

[0208] Combinations of any two or more elements of each specific example within a technically possible range are also included in the scope of the present invention as long as they include the gist of the present invention.

[0209] In addition, based on the electronic device described above as an embodiment of the present invention, all electronic devices that those skilled in the art can appropriately design and modify and implement also belong to the scope of the present invention as long as they include the gist of the present invention.

[0210] In addition, within the scope of the idea of the present invention, those skilled in the art can conceive of various modification examples and correction examples, and it is understood that those modification examples and correction examples also belong to the scope of the present invention.

[0211] Although some embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalent scope thereof.

Explanation of Reference Numerals

[0212] 10 First structure 11 First substrate 11f First surface 12 Second substrate 12a Semiconductor substrate 12b Multilayer wiring portion 12f Second surface 13 Third substrate 20 Second structure 21 First wiring portion 21a, 21b, 21c Wiring layers 21f Surface 22 Second bonding electrode 22 Second wiring portion 22a Wiring layer 22b Multilayer wiring layer 22c Electrode pad portion 22f Surface 23 Third wiring portion 30 Third structure 31 First bonding electrode 31b First electrode portion 31bf First electrode surface 31f First metal layer 31x First bonding electrode 31p First protruding portion 31pf First end face 32 Second bonding electrode 32b Second electrode portion 32bf Second electrode surface 32f Second metal layer 32p Second protruding portion 32pf Second end face 33 Third bonding electrode 34 Fourth bonding electrode 41 First rigid part 41f First rigid layer 41g, 41h Surfaces 41s Side surface 42 Second rigid part 42a, 42b Parts of the second rigid part 42g, 42h Surfaces 42s Side surface 51 First insulating film 51h Surface 52 Second insulating film 52h Surface 53 Third insulating film 53a Opening 54 Fourth insulating film 54a Opening 61, 62, 63 Element parts 100 - 112 Electronic devices C1, C2 Central regions CR Chip region Cp1, Cp2 Central points H1 - H4 Heights L1 - L3 Lengths R1, R2 Ranges S1, S2 Outer regions

Claims

1. A first structure including a first substrate, a first wiring portion provided on the first substrate, a first bonding electrode electrically connected to the first wiring portion, and a first hard portion; A second structure including a second substrate, a second wiring portion provided on the second substrate, and a second bonding electrode electrically connected to the second wiring portion; Comprising: The first bonding electrode and the second bonding electrode are bonded to each other between the first substrate and the second substrate; The first hard portion is provided between the first substrate and the second substrate, is located within a range where the first bonding electrode is provided when viewed along a first direction from the first substrate toward the first bonding electrode, is smaller than the first bonding electrode, and has a hardness higher than that of the first bonding electrode; An end portion of one of the first bonding electrode and the second bonding electrode in a second direction perpendicular to the first direction is in contact with the other of the first bonding electrode and the second bonding electrode, an electronic device.

2. The first hard portion is provided between the first bonding electrode and the first wiring portion, the electronic device according to claim 1.

3. The second structure includes a second hard portion provided between the first substrate and the second substrate, The second hard portion is located within a range where the second bonding electrode is provided when viewed along the first direction and has a hardness higher than that of the second bonding electrode, the electronic device according to claim 1 or 2.

4. At least a part of the first hard portion overlaps at least a part of the second hard portion in the first direction, the electronic device according to claim 3.

5. A first structure including a first substrate, a first wiring portion provided on the first substrate, a first bonding electrode electrically connected to the first wiring portion, and a first hard portion; A second structure including a second substrate, a second wiring portion provided on the second substrate, and a second bonding electrode electrically connected to the second wiring portion; Comprising: The first bonding electrode and the second bonding electrode are bonded to each other between the first substrate and the second substrate; The first hard portion is provided between the first substrate and the second substrate, is located within a range where the first bonding electrode is provided when viewed along a first direction from the first substrate toward the first bonding electrode, and has a hardness higher than that of the first bonding electrode; The second structure includes a second hard portion provided between the first substrate and the second substrate, The second hard portion is located within a range where the second bonding electrode is provided when viewed along the first direction, and has a hardness higher than that of the second bonding electrode. At least a part of the first hard portion is located between a part of the second hard portion and another part of the second hard portion when viewed along the first direction, the electronic device.

6. A plurality of the first bonding electrodes, the second bonding electrodes, and the first hard portions are provided. Each of the plurality of first hard portions overlaps with each of the plurality of first bonding electrodes when viewed along the first direction, the electronic device according to any one of claims 1 to 5.

7. A first structure including a first substrate, a first wiring portion provided on the first substrate, a first bonding electrode electrically connected to the first wiring portion, and a first hard portion. A second structure including a second substrate, a second wiring portion provided on the second substrate, and a second bonding electrode electrically connected to the second wiring portion. Comprising The first bonding electrode and the second bonding electrode are joined to each other between the first substrate and the second substrate. The first hard portion is provided between the first substrate and the second substrate, and is located within a range where the first bonding electrode is provided when viewed along a first direction from the first substrate toward the first bonding electrode, and has a hardness higher than that of the first bonding electrode. The first substrate includes a central region and an outer region located outside the central region in a plane perpendicular to the first direction. A plurality of the second bonding electrodes are provided. The first bonding electrode is electrically connected to a first element portion. The first element portion is provided in the first structure and includes at least one of a transistor, an electrode, a sensor element, a memory element, and a light-emitting element. A plurality of the first bonding electrodes are provided in each of the central region and the outer region. A plurality of the first hard portions are provided in the central region and not provided in the outer region. Each of the plurality of first hard portions overlaps with each of the plurality of first bonding electrodes provided in the central region when viewed along the first direction, the electronic device according to any one of claims 1 to 5.

8. A first structure including a first substrate, a first wiring portion provided on the first substrate, a first bonding electrode electrically connected to the first wiring portion, and a first hard portion. A second structure including a second substrate, a second wiring portion provided on the second substrate, and a second bonding electrode electrically connected to the second wiring portion. Comprising The first bonding electrode and the second bonding electrode are bonded to each other between the first substrate and the second substrate. The first hard portion is provided between the first substrate and the second substrate, and is located within a range where the first bonding electrode is provided when viewed along a first direction from the first substrate toward the first bonding electrode, and has a hardness higher than that of the first bonding electrode. The first substrate includes a central region and an outer region located outside the central region in a plane perpendicular to the first direction. A plurality of the second bonding electrodes are provided. A plurality of the first bonding electrodes are provided in each of the central region and the outer region. A plurality of the first hard portions are provided in the outer region and are not provided in the central region. Each of the plurality of the first hard portions overlaps with each of the plurality of the first bonding electrodes provided in the outer region when viewed along the first direction, an electronic device.

9. A first structure including a first substrate, a first wiring portion provided on the first substrate, a first bonding electrode electrically connected to the first wiring portion, and a first hard portion. A second structure including a second substrate, a second wiring portion provided on the second substrate, and a second bonding electrode electrically connected to the second wiring portion. Comprising: The first bonding electrode and the second bonding electrode are bonded to each other between the first substrate and the second substrate. The first hard portion is provided between the first substrate and the second substrate, and is located within a range where the first bonding electrode is provided when viewed along a first direction from the first substrate toward the first bonding electrode, and has a hardness higher than that of the first bonding electrode. The first bonding electrode includes at least one selected from the group consisting of gold, aluminum, copper, and iridium. The first hard portion includes at least one selected from the group consisting of silicon oxide, silicon nitride, tungsten, titanium nitride, palladium, and titanium, an electronic device.

10. Further comprising at least one of a first element portion provided on the first structure and electrically connected to the first wiring portion, and a second element portion provided on the second structure and electrically connected to the second wiring portion. Each of the first element portion and the second element portion includes at least one of a transistor, an electrode, a sensor element, a memory element, and a light-emitting element, the electronic device according to any one of claims 1 to 6, 8, 9.

11. The electronic device according to any one of Claims 1 to 10, wherein the first bonding electrode is thicker than the first rigid portion.

12. A first structure including a first substrate, a first wiring portion provided on the first substrate, and at least one first bonding electrode electrically connected to the first wiring portion; A second structure including a second substrate, a second wiring portion provided on the second substrate, and at least one second bonding electrode electrically connected to the second wiring portion; A method for manufacturing an electronic device including: A bonding step of bonding the first bonding electrode and the second bonding electrode; The at least one first bonding electrode includes an electrode including a first electrode portion and a first protruding portion protruding from the first electrode portion in a first direction from the first substrate toward the first bonding electrode; The bonding step includes bringing the first protruding portion into contact with the second bonding electrode in the first direction, and the first protruding portion and the second bonding electrode are crimped with the first protruding portion being crushed.

13. The first electrode portion has a first electrode surface extending along a plane perpendicular to the first direction; The first protruding portion protrudes from the first electrode surface in the first direction and has a first end surface extending along a plane perpendicular to the first direction; The manufacturing method according to Claim 12, wherein in the bonding step, the first electrode surface and the second bonding electrode are brought into contact with each other and crimped.

14. A first structure including a first substrate, a first wiring portion provided on the first substrate, and at least one first bonding electrode electrically connected to the first wiring portion; A second structure including a second substrate, a second wiring portion provided on the second substrate, and at least one second bonding electrode electrically connected to the second wiring portion; A method for manufacturing an electronic device including: A bonding step of bonding the first bonding electrode and the second bonding electrode; The at least one first bonding electrode includes an electrode including a first electrode portion and a first protruding portion protruding from the first electrode portion in a first direction from the first substrate toward the first bonding electrode; The bonding step includes bringing the first protruding portion into contact with the second bonding electrode in the first direction; The at least one second bonding electrode includes an electrode including a second electrode portion and a second protruding portion protruding from the second electrode portion in a direction from the second substrate toward the second bonding electrode. The joining step is a manufacturing method of bringing the second protruding portion into contact with the first joining electrode in the first direction.

15. The first structure includes a first hard portion provided between the first protruding portion and the first substrate, The manufacturing method according to any one of claims 12 to 14, wherein the first hard portion has a hardness higher than that of the first joining electrode.

16. A first structure including a first substrate, a first wiring portion provided on the first substrate, and at least one first joining electrode electrically connected to the first wiring portion, A second structure including a second substrate, a second wiring portion provided on the second substrate, and at least one second joining electrode electrically connected to the second wiring portion, A manufacturing method of an electronic device including: A joining step of joining the first joining electrode and the second joining electrode, The at least one first joining electrode includes an electrode including a first electrode portion and a first protruding portion protruding from the first electrode portion in a first direction from the first substrate toward the first joining electrode, The joining step includes bringing the first protruding portion into contact with the second joining electrode in the first direction, The first structure includes a first hard portion provided between the first protruding portion and the first substrate, The first hard portion has a hardness higher than that of the first joining electrode, The at least one second joining electrode includes a concave portion, The manufacturing method, wherein the joining step includes bringing the first protruding portion into contact with the concave portion in the first direction.

17. The manufacturing method according to claim 15 or 16, further comprising a hard portion forming step of forming a first hard layer on at least a part of the first substrate and the first wiring portion and patterning the first hard layer to form the first hard portion.

18. A first structure including a first substrate, a first wiring portion provided on the first substrate, and at least one first joining electrode electrically connected to the first wiring portion, A second structure including a second substrate, a second wiring portion provided on the second substrate, and at least one second joining electrode electrically connected to the second wiring portion, A manufacturing method of an electronic device including: A joining step of joining the first joining electrode and the second joining electrode, The at least one first joining electrode includes an electrode including a first electrode portion and a first protruding portion protruding from the first electrode portion in a first direction from the first substrate toward the first joining electrode, The bonding step includes bringing the first protrusion into contact with the second bonding electrode in the first direction. The first structure includes a first hard portion provided between the first protrusion and the first substrate. The first hard portion has a hardness higher than that of the first bonding electrode. The method further includes a hard portion forming step of forming a first hard layer on at least a part of the first substrate and the first wiring portion, and patterning the first hard layer to form the first hard portion. The first substrate includes a central region and an outer region located outside the central region in a plane perpendicular to the first direction. The hard portion forming step is a manufacturing method of forming the first hard layer on the central region and the outer region, and patterning the first hard layer to selectively form a plurality of the first hard portions in the central region.

19. A first structure including a first substrate, a first wiring portion provided on the first substrate, and at least one first bonding electrode electrically connected to the first wiring portion; A second structure including a second substrate, a second wiring portion provided on the second substrate, and at least one second bonding electrode electrically connected to the second wiring portion; A manufacturing method of an electronic device including: The method includes a bonding step of bonding the first bonding electrode and the second bonding electrode. The at least one first bonding electrode includes an electrode including a first electrode portion and a first protrusion protruding from the first electrode portion in a first direction from the first substrate toward the first bonding electrode. The bonding step includes bringing the first protrusion into contact with the second bonding electrode in the first direction. The first structure includes a first hard portion provided between the first protrusion and the first substrate. The first hard portion has a hardness higher than that of the first bonding electrode. The method further includes a hard portion forming step of forming a first hard layer on at least a part of the first substrate and the first wiring portion, and patterning the first hard layer to form the first hard portion. The first substrate includes a central region and an outer region located outside the central region in a plane perpendicular to the first direction. The hard portion forming step is a manufacturing method of forming the first hard layer on the central region and the outer region, and patterning the first hard layer to selectively form a plurality of the first hard portions in the outer region.

20. A first structure including a first substrate, a first wiring portion provided on the first substrate, and at least one first bonding electrode electrically connected to the first wiring portion; A second structure including a second substrate, a second wiring portion provided on the second substrate, and at least one second bonding electrode electrically connected to the second wiring portion; A method of manufacturing an electronic device including: A bonding step of bonding the first bonding electrode and the second bonding electrode; The at least one first bonding electrode includes an electrode including a first electrode portion and a first protruding portion protruding from the first electrode portion in a first direction from the first substrate toward the first bonding electrode; The bonding step includes bringing the first protruding portion into contact with the second bonding electrode in the first direction; The first substrate includes a central region and an outer region located outside the central region in a plane perpendicular to the first direction; A plurality of the second bonding electrodes are provided; A plurality of the first bonding electrodes are provided in each of the central region and the outer region; The electrode including the first protruding portion is provided in the central region; Before the bonding step, a height of the electrode including the first protruding portion provided in the central region is higher than a height of the first bonding electrode provided in the outer region. A manufacturing method.

21. A first structure including a first substrate, a first wiring portion provided on the first substrate, and at least one first bonding electrode electrically connected to the first wiring portion; A second structure including a second substrate, a second wiring portion provided on the second substrate, and at least one second bonding electrode electrically connected to the second wiring portion; A method of manufacturing an electronic device including: A bonding step of bonding the first bonding electrode and the second bonding electrode; The at least one first bonding electrode includes an electrode including a first electrode portion and a first protruding portion protruding from the first electrode portion in a first direction from the first substrate toward the first bonding electrode; The bonding step includes bringing the first protruding portion into contact with the second bonding electrode in the first direction; The first substrate includes a central region and an outer region located outside the central region in a plane perpendicular to the first direction; A plurality of the second bonding electrodes are provided; A plurality of the first bonding electrodes are provided in each of the central region and the outer region; The electrode including the first protruding portion is provided in the outer region. A manufacturing method in which, before the bonding step, the height of the electrode including the first protrusion provided in the central region is higher than the height of the first bonding electrode provided in the outer region.

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