Metallized semiconductor die and method of manufacturing same - Patent Application 20070122997

Abstract

The invention comprises a semiconductor die (2) comprising a base body (20) comprising a semiconductor material, a surface having two contact areas (4) provided with contact pads (6) by which the die (2) can be electrically contacted, and two metal caps (11) applied directly to the contact pads (6).

Description

[Technical Field]

[0001] The present invention relates to metallized semiconductor dies and methods for fabricating and metallizing semiconductor dies. [Background technology]

[0002] In consumer electronic devices, ESD (electrostatic discharge) protection is essential to ensure robustness in harsh transient environments. Transient voltage suppression (TVS) diodes, fabricated as surface-mounted devices (SMD) or chip-size package (CSP) devices, are widely used to protect electronic devices at the system level. To meet future device miniaturization targets, CSP devices fabricated by wafer-level chip-scale packaging (WLCSP) technology are increasingly being used to miniaturize semiconductor components.

[0003] State-of-the-art semiconductor dies are manufactured with different passivation layers and contact areas in several steps.

[0004] DE 102005004160 discloses a semiconductor component manufactured by WLCSP technology, which comprises a passivation layer, electrical contact areas and contact pads applied to the electrical contact areas.

[0005] U.S. Patent Application Publication No. 2014 / 26488 describes the fabrication of semiconductor dies from a wafer with a passivation step after the die is singulated. Two contact pads are formed on the surface of each semiconductor die, and then the semiconductor dies are singulated from the wafer. A passivation layer is applied to the singulated dies but does not cover the contact pads.

[0006] U.S. Patent Application Publication No. 2012 / 104414 describes another method for fabricating semiconductor dies from a wafer. Two contact pads are applied to one surface of each semiconductor die, and a passivation layer is formed on the opposite surface of the wafer. The dies are then separated from the wafer.

[0007] WO 2018 / 151405 describes a chip package in which a semiconductor chip is embedded in an insulator.

[0008] DE 10 2011 056 515 A1 discloses an electrical SMD component based on a passivated ceramic or semiconductor body with an internal electrode to which external contact pads and a metal cap are applied.

[0009] JP 2012-4480 A relates to a process for applying external metallization to a multilayer ceramic body and subsequently curing the metallization layer. In particular, a metal paste is applied to the side of the ceramic body by screen printing, then dried and sintered at high temperature to harden.

[0010] JP 2002-184645 A relates to a method for manufacturing terminal electrodes in which the end of a chip is dipped in a silver conductive paste to form a coating film, which is dried and then sintered at 600° C. or higher, after which a nickel or tin coating is applied. Summary of the Invention [Problem to be solved by the invention]

[0011] In view of the shortcomings of state of the art methods, it is an object of the present invention to disclose an improved semiconductor die and method for manufacturing the semiconductor die.

[0012] This objective is at least partially met by the disclosed semiconductor die and manufacturing method. [Means for solving the problem]

[0013] The semiconductor die comprises a base body containing a semiconductor material, a surface having two contact areas with contact pads to allow electrical contact of the die, and two metal caps applied directly to the contact pads.

[0014] The base body of the die comprises a semiconductor material. The base body can consist primarily of the semiconductor material. The semiconductor material may comprise a silicon (Si) material. A die based on a semiconductor material can be used as a TVS diode for ESD protection applications. In further embodiments, the die may be used as a microelectromechanical system (MEMS) device for different applications. Alternatively or additionally, the die may comprise a mineral material. The mineral material may comprise a ceramic. The die may be used as a capacitor, a varistor, or a thermistor.

[0015] Applying a metal cap to the contact pad has several advantages.

[0016] First, the die can be electrically contacted externally by a metal cap with a surface area significantly larger than the contact pads. A passivation layer prevents current flow between the metal cap and areas of the die other than the contact pads.

[0017] Furthermore, it is even possible to reduce the size of the contact pads: the smaller the contact pads, the greater the distance between them can be, which reduces undesirable effects such as leakage currents and parasitic capacitance.

[0018] Furthermore, the large outer surface area of the metal cap simplifies the assembly process of the die onto other devices, such as PCBs (printed circuit boards).The described metal caps preferably exhibit excellent solder wetting properties.

[0019] The additional metallization of the dies provided by the metal caps further increases their stability, particularly the bending and shear strength of the entire die.

[0020] In summary, by applying a metal cap to the electrical contact area of a die such as a TVS diode, the electrical characteristics of the die can be improved, the assembly process of the die on the PCB can be simplified, and stable and secure electrical contact between the die and external devices can be achieved.

[0021] The die may have a rectangular parallelepiped shape with six rectangular sides.

[0022] Preferably, the base body is monolithic and does not comprise any further components or structural elements.

[0023] In one embodiment, the semiconductor die further comprises two intermediate layers connecting the contact regions with the contact pads.

[0024] The contact area, the optional intermediate layer, and the contact pad each comprise a conductive material. Preferably, the contact area, the optional intermediate layer, and the contact pad comprise a conductive metal or a mixture of metals. The material composition of each of the three described structural elements differs from each other. For example, the contact area comprises a material selected from aluminum or copper, and the contact pad comprises a material selected from copper, nickel, or gold.

[0025] The contact areas are configured to electrically contact the semiconductor material of the base body, while the contact pads are configured to contact external electrical contacts. The intermediate layer is configured to electrically and mechanically connect the contact areas and the contact pads. The intermediate layer allows for an optimized connection between the contact pads and the contact areas.

[0026] Additionally, a method of fabricating and metallizing a semiconductor die is disclosed that includes several steps. The numbering of the steps below does not dictate the order in which the steps are performed. The steps may be performed in numerical order.

[0027] Any feature of the semiconductor die described above may be applied to a semiconductor die manufactured by the following method, and vice versa.

[0028] In a first step, a die is provided that includes a base body containing a semiconductor material and a surface having two contact areas for electrically contacting the die, which may be configured to function as a diode, for example as a TVS diode.

[0029] The contact areas are provided with contact pads applied thereto, which serve as electrical contact elements between external contacts and the contact areas of the die or optional intermediate layers, such as electrical contacts on a printed circuit board (PCB).

[0030] In a second step, a passivation layer for electrical passivation is applied to the surface of the die. The passivation layer may cover the entire surface of the die except for the non-passivated areas, thereby providing areas without passivation, i.e., the non-passivated areas, that allow external access to each contact pad. The passivation layer electrically insulates the surface of the die. Furthermore, the passivation layer protects the die from environmental influences or physical and chemical reactions. Preferably, the entire surface of the die except for the contact pads or at least a portion of each contact pad is passivated.

[0031] In a preferred embodiment, the passivation layer may be applied by an ALD (atomic layer deposition) process or a CVD (chemical vapor deposition) process. Areas that are not to be passivated (non-passivated areas) may be covered with protective tape during the passivation process.

[0032] In the third step, a portion of the die's surface is covered with a metal cap through a metallization process, which directly contacts the contact pad.

[0033] In a preferred embodiment, the steps are performed in the order listed.

[0034] In one embodiment, the front surface of the die comprises at least a first contact area disposed near a first side of the die and a second contact area disposed near a second side of the die. In a preferred embodiment, the second side is disposed opposite the first side, and the first and second sides are perpendicular to the front surface.

[0035] The die may have a rectangular parallelepiped shape with six rectangular sides.

[0036] The described geometry is advantageous for assembling the die on a PCB, for example.

[0037] In one embodiment, the metallizing step may include several further steps.

[0038] In a first further step, the die is loaded on a first side onto a first metallization tape. The metallization tape may be a polymer tape with an adhesive layer. The adhesive layer may be thermally releasable, meaning that the tape can be peeled off from the die by heating it to a predetermined temperature. The metallization tape supports the die and protects the first side during the first metallization step.

[0039] In a next step, the continuous area of the die not covered by the first metallization tape, including at least one contact pad, is metallized.

[0040] Preferably, a region on the front side of the die is metallized. Additionally, portions of the second side and the other side adjacent to the second side may be metallized.

[0041] The first side is then released from the first metallization tape.

[0042] In one embodiment, the metallizing step includes loading the die on a first side into a first metallization tape, metallizing a continuous area of the die not covered by the first metallization tape including at least one contact pad, loading the die on a second side into a second metallization tape, and metallizing a continuous area of the die not covered by the second metallization tape including at least one contact pad.

[0043] In a preferred embodiment, the metallizing step includes the steps of loading a first surface of the die onto a first metallization tape, metallizing a continuous area on the front surface and second side surface of the die, loading the second side surface onto a second metallization tape, and metallizing a continuous area on the front surface and first side surface of the die, wherein the continuous area comprises a second contact pad on the front surface, the second contact pad contacting the second contact area of the die.

[0044] By providing two contact pads, an electrical circuit can be designed. In a further embodiment, the diode comprises several contact areas with contact pads.

[0045] The contact pads comprise a conductive metal such as copper, nickel, or gold.

[0046] In one embodiment, the method includes the further steps of hardening the metal cap on the second side of the die after the first metallization step, and hardening the metal cap on the first side of the die after the second metallization step.

[0047] The curing step may be performed by heat treatment, for example by holding the die at a particular temperature for a particular period of time.

[0048] In one embodiment, the method includes the further steps of releasing the first side from the first metallization tape after the first metallization step and releasing the second side from the second metallization tape after the second metallization step.

[0049] The first metallization tape is released before the second metallization step. Therefore, the first metallization tape can be used as the second metallization tape. Both metallization tapes can be provided with a heat-release adhesive layer and can therefore be peeled off by heating. The release step can be performed after the aforementioned curing step.

[0050] In a preferred embodiment, the contact pads are completely covered by a metal cap after metallization, so that the die is externally contacted via the metal cap in a reliable and safe manner, more precisely, the metal cap is configured to electrically connect the die to external electrical contacts.

[0051] In one embodiment, the metal cap is applied directly to the passivation layer, with no additional layers between the contact pads and the passivation layer. The direct application of the contact pads improves their attachment to the die.

[0052] In one embodiment, the metal cap is applied continuously to the edge perpendicular to the front surface and to the four side surfaces adjacent to the edge surface of the die.

[0053] Because metal caps are applied to several sides of each die, the TVS diodes can be further assembled without orientation requirements.

[0054] In one embodiment, the metal cap is applied by an immersion process, which allows for metallization of the die in a simple and equally inexpensive manner.

[0055] In one embodiment, the metal cap comprises two or three different layers applied by two or three metallization steps, for example by two or three immersion steps. The metallization layers are preferably stacked on top of each other.

[0056] The first layer, applied directly to the contact pads and surrounding passivation layer, may comprise a soft metallization mixture including Ag or Cu and a polymer, where the soft properties of the first layer material reduce or prevent mechanical or thermomechanical stress effects such as crack development at the interface between the die and the passivation layer or between the passivation layer and the metal cap.

[0057] The second layer, applied directly to the first layer, comprises a good electrical conductor such as Cu or Ni or an Ag-Pd alloy and protects the first layer from environmental influences and chemical or physical reactions.

[0058] The third layer, applied directly onto the second layer, is configured as an oxidation protection layer and comprises a suitable metal such as Au or Sn.

[0059] All three layers are electrically conductive.

[0060] In one embodiment, the metal cap comprises a metal or mixture of metals that is different from the metal or mixture of metals of the contact pad, e.g., Ni and / or Cu and / or Au. In a preferred embodiment, the first layer of the metal cap comprises another metal than the contact pad.

[0061] In one embodiment, the passivation layer is applied by an atomic layer deposition process. Preferably, the atomic layer deposition process is carried out at a temperature below 80° C., more preferably at room temperature.

[0062] In so-called CVD (Chemical Vapor Deposition) processes, reactive species react in the gas phase under controlled atmosphere and elevated temperatures to deposit a layer. CVD processes are typically carried out at relatively high temperatures that can potentially introduce impurities from the gas atmosphere into the layer of deposited material. Technically, such high deposition temperatures required for CVD processes limit the choice of materials, including the tapes, involved in the process, and therefore their functionality.

[0063] On the other hand, the ALD process has the major advantage of being able to deposit layers at low temperatures with high uniformity and quality. Generally, ALD, as a variant of the CVD process, involves the deposition of monolayers on any target substrate. Multiple monolayers can be deposited by systematically repeating a cycle that involves introducing gaseous precursors into the deposition chamber, reacting the gaseous precursors with the target surface, and purging the chamber with an inert gas to remove any unchemisorbed precursors. In this method, ALD processes are preferred due to the tape introduced and the specific passivation material required due to the critical properties (electrical, mechanical, etc.) desired for the passivation layer.

[0064] In one embodiment, the die is manufactured by a wafer level chip scale packaging process.

[0065] In a wafer level chip scale packaging process, multiple dies contained within a wafer, for example a silicon wafer, can be manufactured in parallel.

[0066] The dies may be singulated from the wafer after assembly of the electrical components on the dies.

[0067] Preferably, the dies are singulated by dicing before the grinding (DBG) process. In the dicing before grinding process, the wafer is first half-cut into dies from its front side, which holds the electrical components. After the dicing step, the dies are still connected at their back sides. In a second step, the front side is covered with a protective tape. In a further step, the dies are completely singulated by grinding from the back side. After the dies are singulated, the protective tape can be removed.

[0068] Further passivation and metallization steps can be performed simultaneously in parallel on all die singulated from a single wafer.

[0069] Thus, the wafer level chip scale packaging process simplifies and accelerates the described manufacturing process.

[0070] Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. Similar or apparently identical elements in the figures are designated by the same reference numerals. The figures and the proportions of the figures are not to scale. The present invention is not limited to the following embodiments. [Brief explanation of the drawings]

[0071] [Figure 1] 1 illustrates a schematic diagram of a manufacturing process of a TVS diode in a wafer-level chip-scale packaging process. [Figure 2] 1 shows a cross-sectional view of a first embodiment of a TVS diode; [Figure 3] 1 shows a cross-sectional view of a second embodiment of a TVS diode. DETAILED DESCRIPTION OF THE INVENTION

[0072] In a first step of the so-called back-end process, a TVS diode semiconductor wafer 1 is prepared. The wafer 1 is configured to be separated into several rectangular parallelepiped TVS diode dies 2. The wafer comprises a silicon-based body and electrical components 3 that are surrounded by the body or applied to the front side of the body in a so-called front-end process. The TVS diode wafer 1 comprises several identical sections that are subsequently separated into several rectangular parallelepiped TVS diode dies 2. The TVS diodes 2 are configured as semiconductor chips.

[0073] In a second step, a metal layer 4 is sputtered onto the front side of the wafer 1. The metal layer 4 comprises at least titanium and / or copper. The front side is defined as the side of the wafer 1 on which the electrical components 3 are applied. Based on the sputtered metal layer 4, electrical contact areas are designed for electrically connecting the TVS diode to external contacts.

[0074] In a third step, a mask layer 5 is applied to the front surface by photolithography, which covers the entire front surface except in the area of the contact areas where the contact pads 6 will be applied in the next step.

[0075] In a next step, contact pads 6 are applied onto the contact areas by electroplating. After electroplating, the mask layer 5 is removed by a stripping process.

[0076] The steps described above provide a TVS diode wafer 1 having contact pads 6 for external electrical contacts.

[0077] The following procedure, which includes another number of steps, singulates the wafer 1 into semiconductor dies 2 and electrically passivates the dies.

[0078] In a first step, the wafer 1 is divided into half-cut dies from the front side by a dicing saw. Dicing is performed before grinding (dicing before grinding process, DBG). In different processes, the wafer 1 may be separated in different ways.

[0079] After half-cut dicing is performed, in a second step, the front side of the wafer 1 is covered with a back grinding tape 7. The back grinding tape 7 protects the front side of the wafer 1 and the applied electrical structures from damage during grinding. In a third step, the wafer 1 is completely singulated into rectangular dies by grinding from the back side of the wafer 1, which is opposite to the front side.

[0080] In other processes, the die 2 can be manufactured in a cylindrical shape or in a different shape.

[0081] In the next step, a transfer tape 8 is laminated onto the backside of the ground die 2. The transfer tape 8 is used to transfer the die 2 from the backside grinding tape 7 to a film frame carrier 9. The film frame carrier 9 is a similar tape to the backside grinding tape 7. However, due to the different adhesive layers, the film frame carrier 9 does not cover the entire front side of the singulated die 2. In contrast to the backside grinding tape 7, the film frame carrier 9 only covers the contact areas of the contact pads 6 on the front side of the die 2. After the contact areas are covered by the film frame carrier 9, which also supports the die 2, the transfer tape 8 is peeled off.

[0082] In the following process, all six sides of the singulated die 2 are passivated in one step by an ALD (atomic layer deposition) process. Only the contact areas of the contact pads 6 covered by the film frame carrier 9 are not passivated during the ALD process. The advantage of the ALD process is that the process can be carried out at low temperatures below 80°C, preferably at room temperature.

[0083] After the passivation process is completed, the die 2 is supported by the thermal release tape 10 and the film frame carrier 9 is peeled off. The sidewall passivated TVS diode can be peeled off from the thermal release tape 10 by heating it to a predetermined temperature.

[0084] The following steps describe the procedure for applying the metal caps 11 to the semiconductor dies 2. Each die 2 is configured as a six-sided passivated rectangular TVS diode with two contact pads 6 providing contact areas on its front side.

[0085] One contact pad 6 is disposed on the front surface near a first side of the die 2, and the other contact pad is disposed on the front surface near a second side of the die 2. The first and second sides are perpendicular to the front surface and opposite each other.

[0086] To apply the metal cap 11, a first side of the die 2 perpendicular to the front surface is loaded onto the thermal release tape 10. Several dies 2 can be loaded onto the thermal release tape 10 at the same time. For example, all dies 2 separated from a single wafer 1 can be loaded onto the thermal release tape 10 at the same time.

[0087] Next, the semiconductor dies 2 supported on their first sides by thermal release tape 10 are dipped into a metal paste to apply metal caps 11 to all dies 2 simultaneously.

[0088] In a first dipping step, the die 2 is dipped into a metal paste, whereby a metal cap 11 is applied to at least the second side and to at least a portion of the side of the die perpendicular to the second side, including the contact pads near the second side. The dipping-applied metal cap 11 is dried at an elevated temperature for 10 to 60 minutes.

[0089] Hereinafter, the die 2 is transferred to another thermal release tape 10 attached to the second side of the die 2, and the first side of the die 2 is immersed in a metal melt in a second immersion step to metallize the first side of the die 2 opposite the already metallized second side. In one embodiment, the same thermal release tape 10 can be used in both immersion steps. After immersing the first side in the metal melt, a metal cap 11 is applied to at least the first side and to a portion of the side perpendicular to the first side that has not been covered by the metal cap 11, including at least a contact pad near the first side. The immersion-applied metal cap 11 is then dried in a second drying step.

[0090] After both metal caps 11 are dried, the die 2 is released from the thermal release tape 10 by increasing the temperature. The metal caps 11 can be hardened by the following heat treatment step.

[0091] The metal cap 11 is electrically conductive and is in direct contact with the contact area of the contact pad 6 .

[0092] 2 shows a rectangular parallelepiped TVS diode die 2 fabricated by the aforementioned process. The dimensions of the TVS diode die 2 are 300-1000 μm in length, 100-500 μm in width, and 50-200 μm in height. The dimensions are preferably 600×300×150 μm or 400×200×100 μm (length×width×height).

[0093] Here, length is the dimension of the TVS diode die between the first and second side faces, width is the dimension of the edge between the first side face and the front face or the second side face and the front face, and height is the dimension of the edge of the first or second side face perpendicular to the front face.

[0094] The TVS diode die 2 comprises a semiconductor-based body 20 preferably comprising a silicon-based material and electrical components embedded in the silicon-based material, the silicon-based material including at least silicon and further optional elements.

[0095] The base body 20 has a rectangular parallelepiped shape. Two contact pads 6 are applied to the front surface of the base body 20 and electrically contact the electrical components embedded in the base body 20. The contact pads 6 are applied near two opposite edges of the front surface. The first contact pad 6A is located near the edge between the front side and the first side surface 2A, and the second contact pad 6B is located near the edge between the front side and the second side surface 2B.

[0096] The contact pads 6 comprise a conductive metal such as copper, nickel or gold. The dimensions of the contact pads 6 are, for example, up to 300 μm in width, up to 100 μm in length and about 5 μm to 10 μm in height, e.g., 6.5 μm. The distance between two contact pads 6 in the length direction is, for example, 300 μm, or preferably more than 400 μm.

[0097] The diode further comprises a passivation layer 21, for example comprising Al2O3 and / or TiO2. The thickness of the passivation layer 21 is 100-200 nm. The passivation layer 21 is applied to all six sides of the rectangular diode, except for the contact areas of the contact pads 6. The contact areas may include the entire surface or a portion of the surface of the contact pads 6.

[0098] Leakage currents or parasitic capacitance effects can occur between two contact pads 6. Smaller contact pads 6 make it possible to increase the distance between the contact pads 6 and thus reduce said parasitic effects.

[0099] The diode further comprises a metal cap 11 applied to the first and second sides of the diode and to portions of the sides perpendicular to the first and second sides that are adjacent to the first and second sides.

[0100] The metal cap 11 has, for example, the shape of a rectangular parallelepiped cap.

[0101] The metal cap 11 comprises several layers of different materials. For example, the metal cap 11 comprises three layers. The first layer is in direct contact with the contact pads and / or the passivation layer 21. The first layer may comprise a soft metallization mixture comprising Ag or Cu and a polymer.

[0102] The second layer comprises a conductive metal such as Cu or Ni.

[0103] The third layer is configured as an oxidation protection layer and comprises a suitable metal such as Au or Sn.

[0104] It should be mentioned that the electrical performance (e.g., capacitance) of the TVS diode can be adjusted by changing the passivation layer (e.g., material and thickness) and also by changing the type of Si substrate (e.g., selection of non-epi or low-doped material). These adjustments, together with appropriate contact pad / metal cap design, allow the disclosed diode to address various applications requiring different electrical specifications (e.g., different capacitance).

[0105] 3, a further intermediate layer 46 is positioned between the metal layer 4 and the contact pad 6. The intermediate layer 46 electrically and mechanically connects the metal layer 4 and the contact pad 6. The intermediate layer 46 is firmly bonded to the adjacent metal layer 4 and contact pad 6.

[0106] The intermediate layer 46 can improve and strengthen the connection between the metal layer 4 and the contact pad 6 .

[0107] The intermediate layer 46 comprises a conductive material, for example, a conductive metal.

[0108] The material of the intermediate layer 46 may be different from the material of the metal layer 4 and the contact pads 6 .

[0109] Furthermore, the embodiment of FIG. 3 is similar or identical to the embodiment shown in FIG. [Explanation of symbols]

[0110] 1 wafer 2 TVS diode dies 2A Diode First Side 2B The second side of the diode 3. Electrical Components 4 metal layer 46 Middle Class 5 Mask Layer 6 contact pads 6A First Contact Pad 6B Second contact pad 7 Back grinding tape 8 Transfer Tape 9 Film Frame Carriers 10 Heat-Releasable Tape 11 Metal Cap 20 Base body 21 Passivation Layer

Claims

1. A semiconductor die (2) comprising a base body (20) containing a semiconductor material and a front surface having two contact areas (4) provided with contact pads (6) by which the semiconductor die (2) can be electrically contacted, a first contact area of the two contact areas (4) is located near a first side of the die (2), a second contact area of the two contact areas (4) is located near a second side of the die (2), the second side is located opposite the first side, and the first side and the second side are perpendicular to the front surface; the contact area is a structural element comprising a conductive metal; Furthermore, it comprises two metal caps (11) applied directly to the contact pads (6). the metal cap (11) is applied continuously to the first side and the second side of the semiconductor die (2) and to each of four sides adjacent to the first side or the second side, respectively; The semiconductor die (2) further comprises two intermediate layers (46) connecting said contact areas (4) with said contact pads (6).

2. 2. The semiconductor die (2) of claim 1, further comprising a passivation layer (21) for electrical passivation of the surface of the semiconductor die (2), with passivation-free areas providing external access to each contact pad (6).

3. A method for manufacturing a semiconductor die (2), comprising the steps of: a step of providing a semiconductor die (2), the semiconductor die (2) comprising a base body (20) including a semiconductor material and a surface having two contact areas (4) provided with contact pads (6) by which the semiconductor die (2) can be electrically contacted, a first of the two contact areas (4) being arranged near a first side of the die (2) and a second of the two contact areas (4) being arranged near a second side of the die, the second side being arranged opposite the first side, the first side and the second side being perpendicular to a front surface, the contact areas being structural elements comprising a conductive metal, the semiconductor die (2) further comprising two intermediate layers (46) connecting the contact areas (4) with the contact pads (6); applying a passivation layer (21) for electrical passivation to the surface of the semiconductor die, thereby providing passivation-free areas that allow external access to each contact pad (6); metallizing a portion of the surface of the semiconductor die (2) with a metal cap (11) that is in direct contact with the contact pads (6), the metal cap (11) being applied successively to the first side and the second side of the semiconductor die (2) and to each of four sides adjacent to the first side or the second side, respectively; A method comprising:

4. The method of claim 3 , wherein the steps are performed in the order listed.

5. said surface having said two contact areas (4) is the front surface, a first contact area of the two contact areas (4) is disposed near a first side of the semiconductor die (2), a second contact area of the two contact areas (4) is disposed near a second side of the semiconductor die (2), the second side is disposed opposite the first side, and the first side and the second side are perpendicular to the front surface; The metal cap (11) is applied continuously to the first side and the second side of the semiconductor die (2) and to each of four sides adjacent to the first side or the second side, respectively; The method of claim 3.

6. a first metallization step of loading the semiconductor die (2) on a first side into a first metallization tape (10) and metallizing a continuous area of the semiconductor die (2) not covered by the first metallization tape (10), including at least one contact pad (6); loading the semiconductor die (2) on a second side into a second metallization tape (10); and a second metallization step of metallizing a continuous area of the semiconductor die (2) not covered by the second metallization tape (10), including at least one contact pad (6). The method of claim 4, comprising:

7. 7. The method of claim 6, wherein the first and second metallization tapes (10) are polymer tapes with adhesive layers.

8. curing the metal cap (11) on the second side of the semiconductor die (2) after the first metallization step; and curing the metal cap (11) on the first side of the semiconductor die (2) after the second metallization step. The method of claim 6 further comprising:

9. Releasing the semiconductor die (2) from the first metallization tape (10) after the first metallization step and optional first curing step, and releasing the semiconductor die (2) from the second metallization tape (10) after the second metallization step and optional second curing step. The method of claim 6 further comprising:

10. 4. The method of claim 3, wherein the semiconductor die (2) is externally contacted through the metal cap (11).

11. 11. The method of claim 10, wherein the semiconductor die (2) is externally contacted by soldering the metal cap (11) to a printed circuit board.

12. 4. The method of claim 3, wherein the metal cap (11) is applied directly to the passivation layer (21).

13. 4. The method of claim 3, wherein the metal cap (11) is applied by a dipping process.

14. 4. The method of claim 3, wherein the metal cap (11) comprises two or three different stacks applied by two or three metallization steps.

15. 4. The method of claim 3, wherein the metal cap (11) comprises a metal or a mixture of metals different from the metal or mixture of metals of the contact pad (6).

16. The method of claim 3, wherein the passivation layer (21) is applied by an atomic layer deposition process.

17. 17. The method of claim 16, wherein the atomic layer deposition process is carried out at a temperature less than 80°C.

18. 4. The method of claim 3, wherein several semiconductor dies (2) are manufactured in parallel by a wafer (1) level chip scale packaging process.

19. A method for manufacturing a semiconductor die (2), comprising: The method comprises the steps of: providing a semiconductor die (2), the semiconductor die (2) having a base body (20) containing a semiconductor material and a surface having two contact areas (4) provided with contact pads (6) to which the semiconductor die (2) can be electrically contacted; applying a passivation layer (21) for electrical passivation to the surface of the semiconductor die, thereby providing a passivation-free area that allows external access to each contact pad (6); and metallizing a portion of the surface of the semiconductor die (2) with a metal cap (11) that is in direct contact with the contact pads (6). Including, the steps are performed in the order listed; The method further includes loading the semiconductor die (2) on a first side into a first metallization tape (10), metallizing a continuous area of the semiconductor die (2) not covered by the first metallization tape (10) including at least one contact pad (6), loading the semiconductor die (2) on a second side into a second metallization tape (10), and metallizing a continuous area of the semiconductor die (2) not covered by the second metallization tape (10) including at least one contact pad (6).

20. A method for manufacturing a semiconductor die (2), comprising: The method comprises the steps of: providing a semiconductor die (2), the semiconductor die (2) having a base body (20) containing a semiconductor material and a surface having two contact areas (4) provided with contact pads (6) to which the semiconductor die (2) can be electrically contacted; applying a passivation layer (21) for electrical passivation to the surface of the semiconductor die, thereby providing a passivation-free area that allows external access to each contact pad (6); and metallizing a portion of the surface of the semiconductor die (2) with a metal cap (11) that is in direct contact with the contact pads (6). Including, said passivation layer (21) being applied by an atomic layer deposition process; The method, wherein the atomic layer deposition process is carried out at a temperature less than 80°C.

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