Semiconductor Devices

Abstract

To provide a semiconductor device with a high withstanding voltage.SOLUTION: A semiconductor device comprises: a first electrode; a first semiconductor layer of a first conductivity type provided on the first electrode; a second semiconductor layer of the first conductivity type provided on the first semiconductor layer; a first semiconductor region of a second conductivity type provided on the second semiconductor layer; a first insulating film provided in a trench reaching the second semiconductor layer from on the first semiconductor region so as to be opposed to the second semiconductor layer, and in which the dielectric constant of its upper part is higher than that of its lower part; a second electrode provided in the trench so as to be opposed to the first semiconductor region; a second insulating film provided on the first insulating film in the trench and between the second electrode and the first semiconductor region; a second semiconductor region of the first conductivity type provided on the first semiconductor region; an interlayer insulating film provided on the second electrode; and a third electrode provided on the interlayer insulating film and electrically connected with the second semiconductor region.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] Semiconductor devices such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used for applications such as power conversion, etc. It is preferable for such semiconductor devices to have a high breakdown voltage. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-060298 Summary of the Invention [Problem to be solved by the invention]

[0004] The problem to be solved by the present invention is to provide a semiconductor device with high breakdown voltage. [Means for solving the problem]

[0005] The semiconductor device of the embodiment includes a first electrode, a first semiconductor layer of a first conductivity type provided on the first electrode, a second semiconductor layer of the first conductivity type provided on the first semiconductor layer, a first semiconductor region of a second conductivity type provided on the second semiconductor layer, and a dielectric constant layer having a higher dielectric constant at the top than at the bottom, which is provided in a trench extending from above the first semiconductor region to the second semiconductor layer and facing the second semiconductor layer. The insulating layer includes a first insulating portion which is a silicon oxide film, a fifth insulating portion which is a silicon nitride film provided on the first insulating portion, and a second insulating portion which is a SiON film provided between the first insulating portion and the fifth insulating portion. The semiconductor device comprises a first insulating film, a second electrode provided in the trench facing the first semiconductor region, a second insulating film provided on the first insulating film in the trench between the second electrode and the first semiconductor region, a second semiconductor region of the first conductivity type provided on the first semiconductor region, an interlayer insulating film provided on the second electrode, and a third electrode provided on the interlayer insulating film and electrically connected to the second semiconductor region. [Brief explanation of the drawings]

[0006] [Figure 1] 1 is a schematic cross-sectional view of a semiconductor device according to an embodiment; [Figure 2] 1 is a schematic cross-sectional view of a main part of a semiconductor device according to an embodiment; [Figure 3] FIG. 10 is a schematic cross-sectional view of a semiconductor device according to another aspect of the embodiment. [Figure 4] FIG. 10 is a schematic cross-sectional view of a semiconductor device according to another aspect of the embodiment. [Figure 5] FIG. 10 is a schematic cross-sectional view of a semiconductor device according to another aspect of the embodiment. [Figure 6] 3A to 3C are schematic cross-sectional views illustrating a manufacturing process of the semiconductor device according to the embodiment. [Figure 7] 3A to 3C are schematic cross-sectional views illustrating a manufacturing process of the semiconductor device according to the embodiment. [Figure 8] 3A to 3C are schematic cross-sectional views illustrating a manufacturing process of the semiconductor device according to the embodiment. [Figure 9] 3A to 3C are schematic cross-sectional views illustrating a manufacturing process of the semiconductor device according to the embodiment. [Figure 10] 3A to 3C are schematic cross-sectional views illustrating a manufacturing process of the semiconductor device according to the embodiment. [Figure 11] FIG. 10 is a schematic cross-sectional view of a main part of a semiconductor device according to a comparative example. [Figure 12] 1 is a schematic cross-sectional view illustrating the operation and effect of the semiconductor device according to the embodiment; DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following description, the same components will be denoted by the same reference numerals, and the description of components that have already been described will be omitted as appropriate.

[0008] In this specification, in order to indicate the positional relationship of parts, etc., the upward direction of the drawing will be described as "up" and the downward direction of the drawing will be described as "down." In this specification, the concepts of "up" and "down" do not necessarily refer to the direction of gravity.

[0009] The following description will be given taking as an example a case where the first conductivity type is n-type and the second conductivity type is p-type.

[0010] In the following description, n + , n, n - and p + , p, p - The notation indicates the relative level of impurity concentration in each conductivity type. + has a relatively higher n-type impurity concentration than n, - indicates that the n-type impurity concentration is relatively lower than that of n. + has a relatively higher p-type impurity concentration than p, - indicates that the p-type impurity concentration is relatively lower than that of p. + type, n - The type is simply n-type, p + type, p - The type is sometimes simply referred to as p-type.

[0011] (Embodiment) The semiconductor device of the embodiment includes a first electrode, a first semiconductor layer of a first conductivity type provided on the first electrode, a second semiconductor layer of the first conductivity type provided on the first semiconductor layer, a first semiconductor region of a second conductivity type provided on the second semiconductor layer, a first insulating film provided opposite the second semiconductor layer in a trench extending from above the first semiconductor region to the second semiconductor layer, the first insulating film having a higher dielectric constant in the upper part than in the lower part, a second electrode provided in the trench opposite the first semiconductor region, a second insulating film provided on the first insulating film in the trench between the second electrode and the first semiconductor region, a second semiconductor region of the first conductivity type provided on the first semiconductor region, an interlayer insulating film provided on the second electrode, and a third electrode provided on the interlayer insulating film and electrically connected to the second semiconductor region.

[0012] 1 is a schematic cross-sectional view of a semiconductor device 100 according to an embodiment. The semiconductor device 100 is, for example, a vertical MOSFET.

[0013] The semiconductor device 100 includes a drain layer 10, a drift layer 12, a base region 14, a source region 16, a contact region 18, a trench 20, a field plate electrode 24, a first insulating film 26, a gate insulating film 28, an HDP protective film 30, a gate electrode 40, a drain electrode 60, a source electrode 66, and an interlayer insulating film 70.

[0014] The drain layer 10 is an example of a first semiconductor layer. The drift layer 12 is an example of a second semiconductor layer. The base region 14 is an example of a first semiconductor region. The source region 16 is an example of a second semiconductor region. The gate insulating film 28 is an example of a second insulating film. The HDP protective film 30 is an example of a third insulating film. The gate electrode 40 is an example of a second electrode. The drain electrode 60 is an example of a first electrode. The source electrode 66 is an example of a third electrode.

[0015] The drain layer 10 is a layer that functions as the drain of the MOSFET. The drain layer 10 is, for example, + The present invention includes semiconductor materials of the type.

[0016] The drain electrode 60 is provided below the drain layer 10 and is electrically connected to the drain layer 10 .

[0017] The drift layer 12 is provided on the drain layer 10. The drift layer 12 is, for example, - The present invention includes semiconductor materials of the type.

[0018] Here, an X direction, a Y direction perpendicular to the X direction, and a Z direction perpendicular to the X and Y directions are defined. The drain layer 10 and the drift layer 12 are layers provided parallel to an XY plane parallel to the X and Y directions. The Z direction is the direction in which the drain layer 10 and the drift layer 12 are stacked. FIG. 1 is a schematic cross-sectional view of a semiconductor device 100 in the YZ plane.

[0019] The base region 14 is provided on the drift layer 12. The base region 14 is a region that forms a channel when a voltage is applied to the gate electrode 40, allowing carriers to flow between the source region 16 and the drain layer 10. The base region 14 includes, for example, a p-type semiconductor material. The semiconductor device 100 has base regions 14a, 14b, and 14c.

[0020] The source region 16 is provided on the base region 14. When an appropriate voltage is applied to the gate electrode 40, carriers flow between the source region 16 and the drain layer 10. The source region 16 may be, for example, an n + The semiconductor device 100 includes source regions 16a, 16b, 16c, and 16d.

[0021] The contact region 18 is provided on the base region 14 and is electrically connected to the base region 14 and the source region 16. The contact region 18 is provided to improve the electrical contact between the base region 14 and the source electrode 66. The contact region 18 is, for example, p + The present invention includes semiconductor materials of the type.

[0022] The trench 20 is provided so as to extend from above the base region 14 to the drift layer 12. The semiconductor device 100 has a trench 20a and a trench 20b.

[0023] The first insulating film 26 is provided in the trench 20 so as to face the drift layer 12. However, the form of the first insulating film 26 is not limited to this. For example, the first insulating film 26 is formed by, for example, a high density plasma-chemical vapor deposition (HDP-CVD) method. The first insulating film 26a is provided in the trench 20a. The first insulating film 26b is provided in the trench 20b.

[0024] Here, the first insulating film 26 has a first insulating portion 42, a second insulating portion 44, a third insulating portion 46, a fourth insulating portion 48, and a fifth insulating portion 50. The second insulating portion 44 is provided on the first insulating portion 42. The third insulating portion 46 is provided on the second insulating portion 44. The fourth insulating portion 48 is provided on the third insulating portion 46. The fifth insulating portion 50 is provided on the fourth insulating portion 48. In other words, the first insulating portion 42, the second insulating portion 44, the third insulating portion 46, the fourth insulating portion 48, and the fifth insulating portion 50 are provided in order from bottom to top or from bottom to top within the trench 20.

[0025] The dielectric constant of the first insulating film 26 preferably increases from bottom to top. In other words, the dielectric constant of the first insulating film 26 preferably decreases from top to bottom. For this reason, in the semiconductor device 100 of the embodiment, the dielectric constant of the second insulating portion 44 is higher than the dielectric constant of the first insulating portion 42. The dielectric constant of the third insulating portion 46 is higher than the dielectric constant of the second insulating portion 44. The dielectric constant of the fourth insulating portion 48 is higher than the dielectric constant of the third insulating portion 46. The dielectric constant of the fifth insulating portion 50 is higher than the dielectric constant of the fourth insulating portion 48.

[0026] The first insulating film 26 does not necessarily have to have the first insulating portion 42, the second insulating portion 44, the third insulating portion 46, the fourth insulating portion 48, and the fifth insulating portion 50. For example, the composition of the first insulating film 26 may continuously change, so that the dielectric constant of the first insulating film 26 increases from bottom to top.

[0027] In addition, a HDP (High Density Plasma) insulating film 30 is provided between the first insulating film 26 (first insulating portion 42, second insulating portion 44, third insulating portion 46, fourth insulating portion 48, and fifth insulating portion 50) and the drift layer 12.

[0028] Furthermore, the field plate electrode 24 is provided in the first insulating film 26 in the trench 20. For example, if the first insulating film 26 has a first insulating portion 42, a second insulating portion 44, a third insulating portion 46, a fourth insulating portion 48, and a fifth insulating portion 50, the lower end of the field plate electrode 24 is provided in the first insulating portion 42. The upper end of the field plate electrode 24 is provided in the fifth insulating portion 50.

[0029] The first insulating portion 42, the second insulating portion 44, the third insulating portion 46, the fourth insulating portion 48, the fifth insulating portion 50, the HDP protective film 30, and the field plate electrode 24 will be described below.

[0030] The first insulating portion 42 is provided at the bottom of the trench 20. The first insulating portion 42 is preferably a silicon oxide film. The first insulating portion 42 is also preferably an SiOF film (fluorine-added silicon oxide film). However, the first insulating portion 42 is not limited to a silicon oxide film or an SiOF film. The first insulating portion 42a is provided in the trench 20a. The first insulating portion 42b is provided in the trench 20b.

[0031] The fifth insulating portion 50 is provided in the trench 20 on the first insulating portion 42. The fifth insulating portion 50 is preferably a silicon nitride film. However, the fifth insulating portion 50 is not limited to a silicon nitride film. The fifth insulating portion 50a is provided in the trench 20a. The fifth insulating portion 50b is provided in the trench 20b.

[0032] For example, when the first insulating portion 42 is a silicon oxide film or an SiOF film and the fifth insulating portion 50 is a silicon nitride film, the dielectric constant above the first insulating film 26 is higher than the dielectric constant below the first insulating film 26.

[0033] The second insulating portion 44 is provided between the first insulating portion 42 and the fifth insulating portion 50. The second insulating portion 44a is provided in the trench 20a. The second insulating portion 44b is provided in the trench 20b.

[0034] The third insulating portion 46 is provided between the second insulating portion 44 and the fifth insulating portion 50. The third insulating portion 46a is provided in the trench 20a. The third insulating portion 46b is provided in the trench 20b.

[0035] The fourth insulating portion 48 is provided between the third insulating portion 46 and the fifth insulating portion 50. The fourth insulating portion 48a is provided in the trench 20a. The fourth insulating portion 48b is provided in the trench 20b.

[0036] The dielectric constant of the second insulating portion 44 is preferably higher than the dielectric constant of the first insulating portion 42 and lower than the dielectric constant of the fifth insulating portion 50. The dielectric constant of the third insulating portion 46 is preferably higher than the dielectric constant of the second insulating portion 44 and lower than the dielectric constant of the fifth insulating portion 50. The dielectric constant of the fourth insulating portion 48 is preferably higher than the dielectric constant of the third insulating portion 46 and lower than the dielectric constant of the fifth insulating portion 50.

[0037] For example, the second insulating portion 44, the third insulating portion 46, and the fourth insulating portion 48 are preferably SiON films. For example, it is preferable to set the nitrogen concentration of the third insulating portion 46 higher than that of the second insulating portion 44, and the nitrogen concentration of the fourth insulating portion 48 higher than that of the third insulating portion 46. This is because the dielectric constant of the second insulating portion 44 can be made higher than that of the first insulating portion 42 and lower than that of the fifth insulating portion 50. Furthermore, the dielectric constant of the third insulating portion 46 can be made higher than that of the second insulating portion 44 and lower than that of the fifth insulating portion 50. Furthermore, the dielectric constant of the fourth insulating portion 48 can be made higher than that of the third insulating portion 46 and lower than that of the fifth insulating portion 50.

[0038] The gate electrode 40 is provided on the fifth insulating portion 50 in the trench 20, facing the base region 14. For example, the gate electrode 40 is in contact with the fifth insulating portion 50. However, the gate electrode 40 does not have to be in contact with the fifth insulating portion 50. The gate electrode 40 functions as the gate of the MOSFET.

[0039] The gate insulating film 28 is provided on the fifth insulating portion 50 (first insulating film 26) in the trench 20, between the gate electrode 40 and the base region 14. The film thickness of the gate insulating film 28 in the Y direction is thinner than the film thickness of the first insulating film 26 in the Y direction. The gate insulating films 28a1 and 28a2 are provided in the trench 20a. The gate insulating films 28b1 and 28b2 are provided in the trench 20b. The gate insulating film 28 functions as a gate insulating film of the MOSFET. The gate insulating film 28 contains, for example, silicon oxide.

[0040] In the above case, the gate electrode 40 is in direct contact with the side surface of the gate insulating film 28 and the upper surface of the fifth insulating portion 50.

[0041] The field plate electrode 24 is provided, for example, to flatten the electric field distribution in the drift layer in the trench depth direction and increase the breakdown voltage. The field plate electrode 24 includes, for example, polysilicon containing conductive impurities. The field plate electrode 24a is provided in the trench 20a. The field plate electrode 24b is provided in the trench 20b.

[0042] The HDP protective film 30 is provided below the gate insulating film 28 in the trench 20, between the first insulating film 26 and the drift layer 12. The HDP protective film 30 is a film for protecting the source region 16 and the base region 14 so that they are not etched when the first insulating film 26 is formed. The HDP protective film 30a is provided to cover the inner surface of the trench 20a. The first insulating film 26a is formed along the surface of the HDP protective film 30a. The HDP protective film 30b is provided to cover the inner surface of the trench 20b. The first insulating film 26b is formed along the surface of the HDP protective film 30b. The HDP protective film 30 contains, for example, silicon oxide.

[0043] The interlayer insulating film 70 is provided on the source region 16, the gate electrode 40, and the gate insulating film 28. The interlayer insulating film 70 includes, for example, silicon oxide.

[0044] The source electrode 66 is provided on the source region 16, the contact region 18, the gate insulating film 28, and the interlayer insulating film 70. The source electrode 66 is electrically insulated from the gate electrode 40 by the interlayer insulating film 70.

[0045] The semiconductor material used for the drain layer 10, the drift layer 12, the base region 14, and the source region 16 is, for example, silicon (Si), but the semiconductor material used for the drain layer 10, the drift layer 12, the base region 14, and the source region 16 may be other semiconductor materials, such as silicon carbide (SiC), gallium nitride (GaN), or gallium arsenide (GaAs).

[0046] When Si is used as the semiconductor material, for example, arsenic (As), phosphorus (P) or antimony (Sb) can be used as the n-type impurity, and for example, B (boron) can be used as the p-type impurity.

[0047] The field plate electrode 24 and the gate electrode 40 include a conductive material such as polysilicon containing conductive impurities.

[0048] The drain electrode 60 and the source electrode 66 include a conductive material such as Al.

[0049] Fig. 2 is a schematic cross-sectional view of a main part of the semiconductor device 100 according to the embodiment. Fig. 2 is a schematic cross-sectional view of the semiconductor device 100 in the XZ plane passing through the field plate electrode 24. Note that the drain layer 10 and the drain electrode 60 are not shown.

[0050] The field plate electrode 24 has an upwardly extending portion 55. The field plate electrode 24 is electrically connected to a part of the source electrode 66 using this upwardly extending portion 55. In this way, the field plate electrode 24 is electrically connected to the source electrode 66. However, the manner of electrical connection between the field plate electrode 24 and the source electrode 66 is not limited to this.

[0051] 3 is a schematic cross-sectional view of a main part of a semiconductor device 110 according to another aspect of the embodiment. Unlike the semiconductor device 100, the semiconductor device 110 does not include the HDP protective film 30. The HDP protective film 30 does not necessarily have to be provided.

[0052] 4 is a schematic cross-sectional view of a main portion of a semiconductor device 120 according to another aspect of the embodiment. Unlike the semiconductor device 100, the semiconductor device 120 does not include a field plate electrode 24. The field plate electrode 24 is replaced by a first insulating portion 42, a second insulating portion 44, a third insulating portion 46, a fourth insulating portion 48, and a fifth insulating portion 50. In this manner, the field plate electrode 24 does not necessarily have to be provided.

[0053] 5 is a schematic cross-sectional view of a main portion of a semiconductor device 130 according to another aspect of the embodiment. Unlike the semiconductor device 110, the semiconductor device 130 does not include a field plate electrode 24. The field plate electrode 24 is replaced by a first insulating portion 42, a second insulating portion 44, a third insulating portion 46, a fourth insulating portion 48, and a fifth insulating portion 50. In this manner, the field plate electrode 24 does not necessarily have to be provided.

[0054] 6 to 10 are schematic cross-sectional views showing the manufacturing process of the semiconductor device according to the embodiment.

[0055] First, the drift layer 12 is formed on the drain layer 10. For example, the drain layer 10 is a semiconductor substrate, such as a Si substrate, and the drift layer 12 is formed on the drain layer 10 by epitaxial growth. However, the manufacturing process of the drain layer 10 and the drift layer 12 is not limited to the above. Next, a trench 20 reaching the drift layer 12 is formed using, for example, photolithography and RIE (Reactive Ion Etching) (FIG. 6).

[0056] Next, a thermal oxide film (not shown) is formed on the upper surface of the drift layer 12 and the inner wall of the trench 20 and then peeled off. Next, an HDP protective film 30 containing silicon oxide is formed on the upper surface of the drift layer 12 and the inner wall of the trench 20 by, for example, plasma CVD (Chemical Vapor Deposition) (FIG. 7).

[0057] Next, a first insulating portion 42, a second insulating portion 44, a third insulating portion 46, a fourth insulating portion 48, and an insulating film 49 are formed in this order in the trench 20, for example, by HDP-CVD (High Density Plasma-Chemical Vapor Deposition). Next, the upper surface of the insulating film 49 is planarized by, for example, CMP (Chemical Mechanical Polishing) (FIG. 8). Here, the insulating film 49 is an insulating film that will become part of the fifth insulating portion 50. An insulating film 49a is formed in the trench 20a. An insulating film 49b is formed in the trench 20b.

[0058] Here, when the first insulating portion 42 is a silicon oxide film, the raw material gas used to form the first insulating portion 42 is, for example, SiH4 gas and N2O gas, or SiH4 gas and O2 gas. Also, when the first insulating portion 42 is an SiOF film, for example, NF3 gas, CF4 gas, C2F6 gas, or SiF4 gas is preferably used to add F (fluorine) to the silicon oxide film.

[0059] Furthermore, when the second insulating portion 44, the third insulating portion 46, and the fourth insulating portion 48 are SiON films, the source gases used to form the second insulating portion 44, the third insulating portion 46, and the fourth insulating portion 48 are, for example, SiH4 gas, N2O gas, and NH3 gas, or SiH4 gas and N2O gas. To increase the nitrogen concentration in the insulating film, for example, the concentration of N2O gas or NH3 gas in the source gas is increased.

[0060] Furthermore, when the fifth insulating section 50 is a SiN film, the raw material gas used to form the fifth insulating section 50 is, for example, SiH4 gas and NH3 gas.

[0061] Next, using, for example, photolithography and dry etching, an opening 92 is formed in the trench 20, penetrating the second insulating portion 44, the third insulating portion 46, the fourth insulating portion 48, and the insulating film 49 to reach the first insulating portion 42 (FIG. 9). An opening 92a is formed in the trench 20a. An opening 92b is formed in the trench 20b.

[0062] Next, using, for example, CVD and etch-back, field plate electrode 24 containing polysilicon containing conductive impurities is formed in opening 92. Next, insulating film 51 containing, for example, the same material as insulating film 49 is formed on top of field plate electrode 24 (FIG. 10). Insulating film 51a is formed in trench 20a. Insulating film 51b is formed in trench 20b. Insulating film 49 and insulating film 51 are insulating films that will become fifth insulating section 50.

[0063] Next, the base region 14, the source region 16, the gate insulating film 28, the gate electrode 40, the interlayer insulating film 70, the source electrode 66, and the drain electrode 60 are formed as appropriate to obtain the semiconductor device 100 of the embodiment.

[0064] Next, the effects of the semiconductor device of the embodiment will be described.

[0065] FIG. 11 is a schematic cross-sectional view of a main part of a semiconductor device as a comparative example of the embodiment.

[0066] An insulating film 210 is formed in the trench 200. The thickness of the insulating film 210 is thin in the upper part of the trench 200 and becomes thicker toward the bottom of the trench 200. An insulating film having such a shape is called a "graded field plate insulating film." In contrast, an insulating film whose thickness does not change significantly between the upper and lower parts of the trench is called a "straight field plate insulating film."

[0067] FIG. 12 is a schematic diagram illustrating the effects of the semiconductor device according to the embodiment. FIG. 12 is a schematic diagram illustrating the electric field in the trench depth direction for both the inclined field plate insulating film and the straight field plate insulating film. The "trench depth direction" corresponds to the opposite direction to the Z direction in FIG. 1 , for example. According to the inventor's extensive research, in the case of the straight field plate insulating film, there are areas where the electric field strength is low. On the other hand, in the case of the inclined field plate insulating film, the electric field strength in the trench depth direction is less likely to differ compared to the case of the straight field plate insulating film. The breakdown voltage of the semiconductor device is determined by the value obtained by integrating the electric field with the trench depth. Therefore, employing the inclined field plate insulating film can increase the breakdown voltage of the semiconductor device. Furthermore, employing the inclined field plate insulating film is believed to enable the same breakdown voltage to be obtained and the drift resistance to be reduced even when the n-type impurity concentration of the drift layer 12 is increased.

[0068] However, the thickness of the graded field plate insulating film varies in the trench depth direction. It is considered difficult to consistently create such a shape with high reproducibility. To achieve such a shape, it is possible to increase the area occupied by trench 20 in drift layer 12 and ensure an appropriate change in insulating film thickness. However, this would likely increase the on-resistance.

[0069] Therefore, the semiconductor device of the embodiment includes a first insulating film that is provided in the trench 20 that extends from the base region 14 to the drift layer 12, facing the drift layer 12, and has a higher dielectric constant above than below.

[0070] The equivalent oxide thickness of an insulating film is determined by (insulating film thickness) × (dielectric constant of silicon oxide) / (dielectric constant of insulating film). The higher the dielectric constant of an insulating film, the thinner its equivalent oxide thickness. Therefore, by making the dielectric constant higher above the first insulating film than below it, it is possible to realize a structure in which the equivalent oxide thickness is thinner in the upper part. As a result, taking such equivalent oxide thickness into consideration, the semiconductor device of the embodiment can realize a semiconductor device having the above-mentioned inclined field plate insulating film. Therefore, the semiconductor device of the embodiment can provide a semiconductor device with high breakdown voltage.

[0071] In order to increase the breakdown voltage of the semiconductor device, it is preferable to make the difference in dielectric constant between the upper and lower portions of the first insulating film as large as possible. A silicon oxide film or an SiOF film is preferably used as an insulating film with a low dielectric constant. Such a silicon oxide film or an SiOF film is preferably provided at the lowermost portion of the trench 20 as the first insulating portion 42 included in the first insulating film 26, for example. This is because it becomes possible to make the difference in dielectric constant as large as possible.

[0072] Furthermore, a silicon nitride film is preferably used as an insulating film with a high dielectric constant. Such a silicon nitride film is preferably provided on the first insulating part 42, for example, as the fifth insulating part 50 included in the first insulating film 26. This is because it makes it possible to maximize the difference in dielectric constant between the upper and lower parts of the first insulating film.

[0073] On the other hand, the gate insulating film is preferably a silicon oxide film, since this can suppress leakage current and has high reliability.

[0074] The second insulating portion 44, the third insulating portion 46, and the fourth insulating portion 48 are preferably SiON films, because it is possible to easily form insulating films having a dielectric constant between that of a silicon oxide film or SiOF film and that of a SiN film.

[0075] According to the semiconductor device of the embodiment, it is possible to provide a semiconductor device with high breakdown voltage.

[0076] Although several embodiments and examples of the present invention have been described, these embodiments and examples are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0077] 10 drain layer (first semiconductor layer) 12 Drift layer (second semiconductor layer) 14 base region (first semiconductor region) 16 source region (second semiconductor region) 18 Contact Area 20 Trench 24 Field plate electrode 26 First insulating film 28 Gate insulating film (second insulating film) 30 HDP protective film (third insulating film) 40 gate electrode (second electrode) 42 First insulation section 44 Second insulation section 46 Third insulation section 48 Fourth Insulation Section 50 5th insulation section 60 Drain electrode (first electrode) 66 Source electrode (third electrode) 70 Interlayer insulating film 100 Semiconductor device 110 Semiconductor device 120 Semiconductor device 130 Semiconductor devices

Claims

1. A first electrode; a first semiconductor layer of a first conductivity type provided on the first electrode; a second semiconductor layer of a first conductivity type provided on the first semiconductor layer; a first semiconductor region of a second conductivity type provided on the second semiconductor layer; a first insulating film including: a first insulating portion which is provided in a trench extending from above the first semiconductor region to the second semiconductor layer, facing the second semiconductor layer, the first insulating portion having a higher dielectric constant at the top than at the bottom, the first insulating portion being a silicon oxide film; a fifth insulating portion which is provided on the first insulating portion and is a silicon nitride film; and a second insulating portion which is provided between the first insulating portion and the fifth insulating portion and is a SiON film; a second electrode provided in the trench so as to face the first semiconductor region; a second insulating film provided on the first insulating film in the trench between the second electrode and the first semiconductor region; a second semiconductor region of a first conductivity type provided on the first semiconductor region; an interlayer insulating film provided on the second electrode; a third electrode provided on the interlayer insulating film and electrically connected to the second semiconductor region; A semiconductor device comprising:

2. A first electrode; a first semiconductor layer of a first conductivity type provided on the first electrode; a second semiconductor layer of a first conductivity type provided on the first semiconductor layer; a first semiconductor region of a second conductivity type provided on the second semiconductor layer; a first insulating film including: a first insulating portion which is provided in a trench extending from above the first semiconductor region to the second semiconductor layer, facing the second semiconductor layer, the first insulating portion having a higher dielectric constant at the top than at the bottom, the first insulating portion being a SiOF film; a fifth insulating portion which is provided on the first insulating portion and is a silicon nitride film; and a second insulating portion which is provided between the first insulating portion and the fifth insulating portion and is a SiON film; a second electrode provided in the trench so as to face the first semiconductor region; a second insulating film provided on the first insulating film in the trench between the second electrode and the first semiconductor region; a second semiconductor region of a first conductivity type provided on the first semiconductor region; an interlayer insulating film provided on the second electrode; a third electrode provided on the interlayer insulating film and electrically connected to the second semiconductor region; A semiconductor device comprising:

3. The first insulating portion is provided at the bottom of the trench.

3. The semiconductor device according to claim 1.

4. the second electrode is in direct contact with the fifth insulating portion; 4. The semiconductor device according to claim 1.

5. the second insulating film is a silicon oxide film; 5. The semiconductor device according to claim 1.

6. 6. The semiconductor device according to claim 1, further comprising a third insulating film, which is a silicon oxide film, provided in the trench between the first insulating film and the second semiconductor layer.

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