Semiconductor Devices
The semiconductor device design uses an aluminum wire to mitigate bonding damage from copper wires by interposing it between the semiconductor element and copper wires, enhancing reliability and electrical connection.
Patent Information
- Application Number
- JP2021133171
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-08-18
- Publication Date
- 2025-08-13
- Estimated Expiration
- 2041-08-18
AI Technical Summary
Copper wires, used for bonding semiconductor chips in power modules, are harder than aluminum wires and pose a risk of bonding damage to the semiconductor chips.
A semiconductor device design that includes a first metal wire, such as an aluminum wire, bonded to a semiconductor element's electrode, with a second metal wire, such as a copper wire, connected to a second metal pad through the first metal wire, thereby reducing the impact on the semiconductor element during bonding.
This design reduces bonding damage to the semiconductor element, improving the reliability and electrical connection of the semiconductor device.
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Abstract
Description
[Technical Field]
[0001] The embodiments relate to a semiconductor device. [Background technology]
[0002] It is preferable to mount semiconductor chips built into power modules for power control using copper wires, which have low electrical resistance. However, copper wires are harder than, for example, aluminum wires, and there is a risk of bonding damage to the semiconductor chips. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-324604 Summary of the Invention [Problem to be solved by the invention]
[0004] The embodiments provide a semiconductor device with improved reliability. [Means for solving the problem]
[0005] A semiconductor device according to an embodiment includes a base member, a semiconductor element, a first metal wire, and a second metal wire. The base member has a first surface and a second surface opposite the first surface, and the first metal pad and the second metal pad are spaced apart from each other on the first surface. The semiconductor element is mounted on the first metal pad and has a first electrode provided on the surface opposite the first metal pad. The first metal wire is bonded to the first electrode of the semiconductor element. The second metal wire has a first end bonded to the first metal wire and a second end bonded to the second metal pad. The first metal wire is not connected to the second metal pad. [Brief explanation of the drawings]
[0006] [Figure 1] 1 is a schematic cross-sectional view showing a semiconductor device according to an embodiment; [Figure 2] 5A to 5C are schematic cross-sectional views showing a mounting process of the semiconductor device according to the embodiment. [Figure 3] FIG. 10 is a schematic plan view showing a semiconductor device according to a modified example of the embodiment. [Figure 4] FIG. 10 is a schematic cross-sectional view showing a semiconductor device according to another modified example of the embodiment. [Figure 5] FIG. 10 is a schematic cross-sectional view showing a semiconductor device according to yet another modified example of the embodiment. [Figure 6] FIG. 10 is a schematic cross-sectional view showing a semiconductor device according to another modified example of the embodiment. [Figure 7] FIG. 1 is a schematic cross-sectional view showing a power module according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0007] Hereinafter, embodiments will be described with reference to the drawings. Identical parts in the drawings are assigned the same numbers, and detailed descriptions thereof will be omitted as appropriate, and different parts will be described. Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc., are not necessarily the same as those in reality. Furthermore, even when the same part is shown, the dimensions and ratios may be different depending on the drawing.
[0008] Furthermore, the arrangement and configuration of each part will be explained using the X-axis, Y-axis, and Z-axis shown in each figure. The X-axis, Y-axis, and Z-axis are mutually perpendicular and represent the X-direction, Y-direction, and Z-direction, respectively. In addition, the Z-direction may be explained as upward and the opposite direction as downward.
[0009] 1 is a schematic cross-sectional view showing a semiconductor device 1 according to an embodiment. The semiconductor device 1 includes a switching element made of, for example, silicon, silicon carbide, or gallium nitride.
[0010] 1, the semiconductor device 1 includes a semiconductor element 10, a base member 20, a first metal wire 30, and a second metal wire 40. The semiconductor element 10 is, for example, a Schottky diode.
[0011] The base member 20 includes, for example, an insulating member 21, a first metal pad 23, a second metal pad 25, and a metal film 26. The insulating member 21 is, for example, a ceramic member containing aluminum oxide or aluminum nitride. The first metal pad 23 and the second metal pad 25 are, for example, metal films containing copper. The metal film 26 includes, for example, copper.
[0012] The base member 20 has, for example, a first surface 20a and a second surface 20b. The second surface 20b is located opposite the first surface 20a. The first surface 20a and the second surface 20b are, for example, surfaces of an insulating member 21. The first metal pad 23 and the second metal pad 25 are provided on the first surface 20a of the insulating member 21 and spaced apart from each other. The metal film 26 is provided on the second surface 20b of the insulating member 21.
[0013] The semiconductor element 10 is mounted on the first metal pad 23. The semiconductor element 10 has a first electrode 13 (see FIG. 2(a)) on the surface opposite to the first metal pad 23. The first electrode 13 is, for example, an anode electrode. The first electrode 13 includes, for example, aluminum.
[0014] 1, the first metal wire 30 is bonded to the surface of the semiconductor element 10 opposite to the first metal pad 23. The first metal wire 30 is bonded, for example, to the first electrode 13. The first metal wire 30 is, for example, an aluminum wire.
[0015] The second metal wire 40 is bonded onto the first metal wire 30. The second metal wire has a first end 40a and a second end 40b. The first end 40a is bonded onto the first metal wire 30. The second end 40b is bonded onto the second metal pad 25. In other words, the semiconductor element 10 is electrically connected to the second metal pad 25 via the second metal wire 40. The second metal wire 40 is, for example, a copper wire.
[0016] 2(a) and 2(b) are schematic cross-sectional views showing the mounting process of the semiconductor device 1 according to the embodiment. Fig. 2(a) is a cross-sectional view showing the bonding process of the first metal wire 30. Fig. 2(b) is a cross-sectional view showing the bonding process of the second metal wire 40.
[0017] The semiconductor element 10 further includes a back surface electrode 14 provided on the back surface facing the first metal pad 23. The back surface electrode 14 is, for example, a cathode electrode. The back surface electrode 14 is electrically connected to the first metal pad 23 via, for example, a conductive connecting member (not shown).
[0018] 2(a), the first metal wire 30 is bonded onto the first electrode 13 of the semiconductor element 10. The first metal wire 30 is connected to the first electrode 13 by, for example, wedge bonding. The first electrode 13 includes, for example, the same material as the material of the first metal wire 30. The first electrode 13 is, for example, an aluminum electrode.
[0019] The first metal wire 30 is provided, for example, in a looped shape and is bonded to two locations on the first electrode 13. Furthermore, the first metal wire 30 is cut on the first electrode 13 and is provided so as not to extend outside the semiconductor element 10. The first metal wire 30 is not connected to the second metal pad 25.
[0020] The first metal wire 30 has, for example, a first end 30a and a second end 30b. The first end 30a and the second end 30b are crushed by, for example, a wedge tool WT and connected to the first electrode 13.
[0021] 2(b), the second metal wire 40 is bonded to the semiconductor element 10 and the second metal pad 25. The second metal wire 40 is connected to the semiconductor element 10 via the first metal wire 30 by, for example, wedge bonding. The second metal wire 40 is also connected to the second metal pad 25.
[0022] The second metal wire 40 has a first end 40a and a second end 40b. The first end 40a is formed in a looped shape and is connected to two points on the first electrode 13. The loop of the first end 40a is formed higher than the loop of the first metal wire 30. The first end 40a is bonded onto, for example, the first end 30a and the second end 30b of the first metal wire 30. Meanwhile, the second end 40b is bonded onto the second metal pad 25.
[0023] The first metal wire 30 may include, for example, but not limited to, an aluminum wire and a copper wire, and may include, for example, a material having a lower hardness than the material of the second metal wire 40. 13 The second metal wire 40 includes a material having a lower hardness than the material of the second metal wire 40.
[0024] For example, when the second metal wire 40 is directly bonded to the first electrode 13 without using the first metal wire 30, the bonding damage to the semiconductor element 10 is greater than the damage caused when the first metal wire 30 is bonded to the first electrode 13. Therefore, by interposing the first metal wire 30 between the semiconductor element 10 and the second metal wire 40, the impact applied to the semiconductor element 10 during bonding can be reduced, and the bonding damage to the semiconductor element 10 can be reduced. This can improve the reliability of the semiconductor device 1.
[0025] Fig. 3 is a schematic plan view showing a semiconductor device 2 according to a modified example of the embodiment. Fig. 3 is a plan view showing a semiconductor element 10, a second metal pad 25, and a third metal pad 27. In this example, the semiconductor element 10 is a MOSFET or an IGBT (Insulated Gate Bipolar Transistor).
[0026] The base member 20 (see FIG. 1) further includes a third metal pad 27. The third metal pad 27 is provided on the surface of the insulating member 21 together with the first metal pad 23 and the second metal pad 25. The third metal pad 27 is provided at a distance from the first metal pad 23 and the second metal pad 25.
[0027] The semiconductor element 10 includes a first electrode 13 and a second electrode 15. The first electrode 13 is, for example, a source electrode or an emitter electrode. The second electrode 15 is, for example, a control pad. The second electrode 15 is, for example, electrically connected to a gate electrode (not shown) provided between the first electrode 13 and a semiconductor layer (not shown). The semiconductor element 10 also has, for example, a drain electrode or a collector electrode on the back surface side (not shown).
[0028] 3, the first metal wire 30 is bonded onto the first electrode 13. The first metal wire 30 has a first end 30a and a second end 30b. The first metal wire 30 has a loop between the first end 30a and the second end 30b, and the first end 30a and the second end 30b are connected to the first electrode 13. In addition, the first metal wire 30 is, for example, cut above the first electrode 13 so as not to extend outside the first electrode 13.
[0029] The second metal wire 40 has a first end 40a and a second end 40b. The first end 40a has a loop and is bonded onto the first end 30a and the second end 30b of the first metal wire 30. Meanwhile, the second end 40b is bonded onto the second metal pad 25. The second metal wire 40 is electrically connected to the first electrode 13 via the first metal wire 30 and is also electrically connected to the second metal pad 25.
[0030] 3, a plurality of pairs of the first metal wire 30 and the second metal wire 40 may be provided. In this example, the first metal wire 30 has a lower hardness than the second metal wire 40. In addition, the first metal wire 30 is not connected to the second metal pad 25.
[0031] By bonding the second metal wire 40 onto the first metal wire 30, the impact applied to the semiconductor element 10 during bonding of the second metal wire 40 can be alleviated, and bonding damage to the semiconductor element 10 can be reduced.
[0032] The second electrode 15 is electrically connected to the third metal pad 27 via a third metal wire 50. The third metal wire 50 has a first end 50a and a second end 50b. The first end 50a is bonded onto the second electrode 15. The second end 50b is bonded onto the third metal pad 27.
[0033] The third metal wire 50 contains the same material as the first metal wire 30. The third metal wire 50 is, for example, an aluminum wire. A large current does not flow between the second electrode 15 and the third metal pad 27, as would flow between the first electrode 13 and the second metal pad 25, for example. Therefore, the same material as the first metal wire 30 can be used for the third metal wire 50. The third metal wire 50 is bonded to the second electrode 15 and the third metal pad 27 in the same process as the first metal wire 30, for example.
[0034] Fig. 4 is a schematic plan view showing a semiconductor device 3 according to another modified example of the embodiment. Fig. 4 is a plan view showing a semiconductor element 10, a second metal pad 25, and a third metal pad 27. In this example, the semiconductor element 10 is also a MOSFET or an IGBT (Insulated Gate Bipolar Transistor).
[0035] 4, the first electrode 13 is electrically connected to the second metal pad 25 via the second metal wire 40. The second metal wire 40 is bonded onto the first electrode 13 via the first metal wire 30. The first metal wire 30 is cut on the first electrode 13 and does not extend outside the first electrode 13. In addition, the first metal wire 30 is not connected to the second metal pad 25.
[0036] The semiconductor device 3 includes a fourth metal wire 60. The fourth metal wire 60 electrically connects the second electrode 15 and the third metal pad 27. The fourth metal wire 60 includes the same material as the second metal wire 40. The fourth metal wire 60 is, for example, a copper wire.
[0037] The fourth metal wire 60 has a first end 60a and a second end 60b. The first end 60a is bonded onto the second electrode 15, for example, via a buffer material 55. The second end 60b is bonded onto the third metal pad 27.
[0038] The buffer material 55 has a hardness lower than that of the fourth metal wire 60. The buffer material 55 includes, for example, the same material as the first metal wire 30. The buffer material 55 includes, for example, aluminum. The buffer material 55 is provided by, for example, connecting a metal wire to the second electrode 15 by wedge bonding and then cutting the metal wire on the second electrode 15.
[0039] In this example, too, by providing a buffer material 55, the impact applied to the semiconductor element 10 when bonding the fourth metal wire 60 onto the second electrode 15 can be alleviated, thereby reducing bonding damage to the semiconductor element 10.
[0040] Fig. 5 is a schematic plan view showing a semiconductor device 4 according to yet another modified example of the embodiment. Fig. 5 is a plan view showing a semiconductor element 10, a second metal pad 25, and a third metal pad 27. In this example, the semiconductor element 10 is also a MOSFET or an IGBT (Insulated Gate Bipolar Transistor).
[0041] As shown in Fig. 5, the first electrode 13 is electrically connected to the second metal pad 25 via a second metal wire 40. The second metal wire 40 is bonded onto the first electrode 13 via buffer members 33a and 33b. The buffer members 33a and 33b are provided, for example, by connecting a metal wire to the first electrode 13 by wedge bonding and then cutting the metal wire above the first electrode 13. Department The materials 33a and 33b have a hardness lower than that of the second metal wire 40. Department The materials 33a and 33b include, for example, aluminum.
[0042] The second electrode 15 is electrically connected to the third metal pad 27 via a third metal wire 50. The third metal wire 50 has a first end 50a bonded onto the second electrode 15 and a second end 50b bonded onto the third metal pad 27. The third metal wire 50 is a buffer. Department The third metal wire 50 includes the same material as the materials 33a and 33b. The third metal wire 50 is, for example, an aluminum wire.
[0043] In this example, too, Department By bonding the ends of the second metal wires 40 onto the materials 33a and 33b, the impact applied to the semiconductor element 10 can be alleviated, and bonding damage to the semiconductor element 10 can be reduced.
[0044] Fig. 6 is a schematic plan view showing a semiconductor device 5 according to another modification of the embodiment. Fig. 6 is a plan view showing a semiconductor element 10, a second metal pad 25, and a third metal pad 27. In this example, the semiconductor element 10 is a MOSFET or an IGBT (Insulated Gate Bipolar Transistor). The semiconductor device 5 includes a fifth metal wire 43 and a sixth metal wire 45 instead of the second metal wire 40.
[0045] 6, the first metal wire 30 is bonded onto the first electrode 13. The first metal wire 30 has a loop between a first end 30a and a second end 30b, and the first end 30a and the second end 30b are connected to the first electrode 13. The first metal wire 30 is also provided so as not to extend outside the first electrode 13.
[0046] The fifth metal wire 43 has an end bonded onto the first end 30a of the first metal wire 30 and an end bonded onto the second metal pad 25. The sixth metal wire 45 has an end bonded onto the second end 30b of the first metal wire 30 and an end bonded onto the second metal pad 25. The fifth metal wire 43 and the sixth metal wire electrically connect the first electrode 13 and the second metal pad 25.
[0047] 6, there may be provided a plurality of sets of the first metal wire 30, the fifth metal wire 43, and the sixth metal wire 45. The first metal wire 30 has a lower hardness than the fifth metal wire 43 and the sixth metal wire 45. The fifth metal wire 43 and the sixth metal wire 45 are, for example, copper wires.
[0048] In this example, by bonding the fifth metal wire 43 and the sixth metal wire 45 onto the first metal wire 30, the impact on the semiconductor element 10 can be alleviated and bonding damage to the semiconductor element 10 can be reduced.
[0049] The second electrode 15 is electrically connected to the third metal pad 27 via a third metal wire 50. The third metal wire 50 has a first end 50a bonded onto the second electrode 15 and a second end 50b bonded onto the third metal pad 27.
[0050] 7 is a schematic cross-sectional view showing a power module 6 according to the embodiment. The power module 6 is, for example, a power converter incorporating a semiconductor device 2. The semiconductor device 2 is disposed inside a case 120, for example.
[0051] In this example, the base member 20 of the semiconductor device 2 includes a first metal pad 23 and a second metal pad 24. 3 The semiconductor element 10 includes a metal pad 27. The semiconductor element 10 is mounted with its back surface facing the first metal pad 23. An electrode on the back surface of the semiconductor element 10 is electrically connected to the first metal pad 23 via, for example, a conductive die mount material 17.
[0052] The base member 20 is mounted on the heat sink 130 via, for example, a solder material 135. The solder material 135 connects the back surface of the base member 20 to the heat sink 130. The heat sink 130 is, for example, a metal plate containing copper. Heat generated during operation of the semiconductor device 2 is dissipated to the outside via the base member 20 and the heat sink 130.
[0053] The case 120 is provided so as to surround the heat sink 130 and the semiconductor device 2. The bottom of the case 120 is in contact with the heat sink 130.
[0054] The case 120 has connection terminals 123 and 125. The semiconductor device 2 disposed inside the case 120 is electrically connected to an external circuit via the connection terminals 123 and 125.
[0055] The connection terminal 123 is electrically connected to the first electrode 13 of the semiconductor element 10 via, for example, a second metal wire 40 (see FIG. 3). The second metal wire 40 is bonded onto the first electrode 13 via the first metal wire 30.
[0056] The connection terminal 125 is electrically connected to the first metal pad 23 of the base member 20 via, for example, the fifth metal wire 70. That is, the connection terminal 125 is electrically connected to the electrode on the back surface side of the semiconductor element 10 via the fifth metal wire 70 and the first metal pad 23.
[0057] Furthermore, the second electrode 15 (see FIG. 3) of the semiconductor element 10 is electrically connected to a third metal pad 27 of the base member 20 via, for example, a third metal wire 50. The third metal pad 27 is electrically connected to a control signal terminal (not shown) provided on the case 120.
[0058] The semiconductor device 2 is immersed in, for example, a gel-like insulating material 140. The insulating material 140 is filled into the space surrounded by the case 120 and the heat sink 130. Furthermore, the space surrounded by the case 120 and the heat sink 130 is sealed by a lid 150 connected to the upper end of the case 120.
[0059] In the power module 6, a large current flows between the connection terminal 123 and the connection terminal 125. 2 It is preferable to use, for example, a copper wire as the metal wire 40. Furthermore, by bonding the second metal wire 40 onto the first electrode 13 via the first metal wire 30, the reliability of the electrical connection between the first electrode 13 and the connection terminal 123 can be improved.
[0060] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]
[0061] DESCRIPTION OF SYMBOLS 1, 2, 3, 4, 5...Semiconductor device, 6...Power module, 10...Semiconductor element, 13...First electrode, 14...Back surface electrode, 15...Second electrode, 17...Die mount material, 20...Base member, 20a...First surface, 20b...Second surface, 21, 140...Insulating member, 23...First metal pad, 25...Second metal pad, 26...Metal film, 27...Third metal pad, 30...First metal wire, 30a...First end, 30b...Second end, 40...Second metal wire, 40a, 50a, 60a...First end, 40b, 50b, 60b...Second end, 50...Third metal wire, 55...Buffer material, 60...Fourth metal wire, 70...Fifth metal wire, 120...Case, 123, 125...Connection terminal, 130...Heat sink, 135...Solder material, 150...Lid, WT...Wedge tool
Claims
1. a base member including a first metal pad and a second metal pad, the base member having a first surface and a second surface opposite the first surface, the first metal pad and the second metal pad being spaced apart from each other and arranged on the first surface; a semiconductor element mounted on the first metal pad and having a first electrode provided on a surface opposite to the first metal pad; a first metal wire bonded onto the first electrode of the semiconductor element; a second metal wire including a first end bonded onto the first metal wire and a second end bonded onto the second metal pad, the first end being formed in a looped shape and including both ends of the looped shape; Equipped with the first metal wire is not connected to the second metal pad; the first metal wire has a looped shape; a first end and a second end of the first metal wire connected to the first metal pad and both ends of the first end portion; A semiconductor device, wherein a portion of the first metal wire between the first end and the second end is spaced from the first metal pad and a portion of the first end between both ends.
2. The semiconductor device according to claim 1 , wherein the second metal wire has a hardness higher than that of the first metal wire.
3. the first metal wire includes aluminum; The semiconductor device according to claim 2 , wherein the second metal wire contains copper.
4. 4. The semiconductor device according to claim 1, wherein the second metal wire has a hardness higher than that of the first electrode of the semiconductor element.
5. a third metal wire connected to the semiconductor element; the base member further includes a third metal pad on the first surface, the third metal pad being aligned with the first metal pad and the second metal pad; the semiconductor element further includes a second electrode provided on the surface thereof and spaced apart from the first electrode; 5. The semiconductor device according to claim 1, wherein the second electrode is electrically connected to the third metal pad via the third metal wire.
6. The semiconductor device according to claim 5 , wherein the third metal wire contains the same material as the first metal wire.
7. a buffer member bonded onto the second electrode; the third metal wire is bonded to the second electrode via the buffer member; the third metal wire comprises the same material as the second metal wire; The semiconductor device according to claim 5 , wherein the buffer member includes the same material as the first metal wire.
Citation Information
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