Nitride semiconductor light emitting device

Abstract

A nitride semiconductor light emitting device capable of improving light output is provided. [Solution] A nitride semiconductor light-emitting device includes a substrate whose growth plane is the c-plane, a buffer layer formed on the growth plane, an n-type semiconductor layer containing Al, Ga, and N formed on the buffer layer, an active layer formed on the n-type semiconductor layer and having at least one well layer containing Al, Ga, and N, and a p-type semiconductor layer formed on the active layer. The nitride semiconductor light-emitting device emits ultraviolet light with a center wavelength of 365 nm or less. When the well layer closest to the p-type semiconductor layer among the at least one well layer is defined as a target well layer, the ratio Cw / Cn of the carbon concentration Cw of the target well layer to the carbon concentration Cn of the n-type semiconductor layer is 3.0 / 100 or less.

Description

[Technical Field]

[0001] The present invention relates to a nitride semiconductor light emitting device. [Background technology]

[0002] Patent Document 1 discloses a group III nitride semiconductor light emitting device that emits ultraviolet light in a short wavelength band. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-111370 Summary of the Invention [Problem to be solved by the invention]

[0004] In nitride semiconductor light-emitting devices that emit ultraviolet light in a short wavelength band, it is more difficult to improve the light output than in light-emitting devices that emit light in other wavelength bands.

[0005] The present invention has been made in view of the above circumstances, and has an object to provide a nitride semiconductor light-emitting device capable of improving light emission output. [Means for solving the problem]

[0006] In order to achieve the above-mentioned object, the present invention provides a nitride semiconductor light-emitting device comprising: a substrate whose growth surface is a c-plane; a buffer layer formed on the growth surface; an n-type semiconductor layer containing Al, Ga, and N formed on the buffer layer; an active layer formed on the n-type semiconductor layer and having at least one well layer containing Al, Ga, and N; and a p-type semiconductor layer formed on the active layer, wherein the nitride semiconductor light-emitting device emits ultraviolet light having a central wavelength of 365 nm or less; and when a well layer of the at least one well layer that is closest to the p-type semiconductor layer is defined as a target well layer, the ratio Cw / Cn of the carbon concentration Cw of the target well layer to the carbon concentration Cn of the n-type semiconductor layer is 3.0 / 100 or less. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide a nitride semiconductor light emitting device capable of improving light output. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a schematic diagram illustrating a configuration of a nitride semiconductor light emitting device according to an embodiment. [Figure 2] 10 is a graph showing the carbon concentration distribution and Al secondary ion intensity distribution of Sample 2 in an experimental example. [Figure 3] 10 is a graph showing the carbon concentration distribution and Al secondary ion intensity distribution of Sample 7 in an experimental example. [Figure 4] 10 is a graph showing the relationship between the ratio Cw / Cn and the light emission output in an experimental example. [Figure 5] 10 is a graph showing the relationship between the carbon concentration Cw of a target well layer and the light emission output in an experimental example. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Embodiment Mode] An embodiment of the present invention will be described with reference to Fig. 1. The embodiment described below is shown as a preferred specific example for carrying out the present invention, and although various technically preferable technical matters are specifically exemplified, the technical scope of the present invention is not limited to this specific embodiment.

[0010] (Nitride semiconductor light emitting device 1) FIG. 1 is a schematic diagram illustrating the configuration of a nitride semiconductor light-emitting element 1. Note that in FIG. 1, the dimensional ratios in the stacking direction of the semiconductor layers of the nitride semiconductor light-emitting element 1 (hereinafter also simply referred to as "light-emitting element 1") do not necessarily match the actual ones. Hereinafter, the stacking direction of the semiconductor layers of the light-emitting element 1 will be referred to as the vertical direction. Also, one side in the vertical direction, on which the semiconductor layers of the substrate 2 are grown (e.g., the upper side in FIG. 1), will be referred to as the upper side, and the opposite side (e.g., the lower side in FIG. 1) will be referred to as the lower side. Note that the expressions "upper" and "lower" are used for convenience and do not limit the orientation of the light-emitting element 1 relative to the vertical direction, for example, when the light-emitting element 1 is in use.

[0011] The light-emitting element 1 is, for example, a light-emitting diode (LED) or a semiconductor laser (LD: Laser Diode). In this embodiment, the light-emitting element 1 is a light-emitting diode that emits light with a wavelength in the ultraviolet region. In particular, the light-emitting element 1 in this embodiment emits ultraviolet light with a central wavelength of 240 nm or more and 365 nm or less. The light-emitting element 1 can be used in fields such as sterilization (e.g., air purification, water purification, etc.), medical care (e.g., phototherapy, measurement and analysis, etc.), UV curing, etc.

[0012] The light-emitting element 1 includes a buffer layer 3, an n-type semiconductor layer 4, a compositionally graded layer 5, an active layer 6, an electron blocking layer 7, and a p-type semiconductor layer 8, which are arranged in this order on a substrate 2. The light-emitting element 1 also includes an n-side electrode 11 provided on the n-type semiconductor layer 4, and a p-side electrode 12 provided on the p-type semiconductor layer 8.

[0013] The substrate 2 is made of a material that transmits the light emitted by the active layer 6. In this embodiment, the substrate 2 is a sapphire (Al2O3) substrate. The growth plane 21 formed on the upper surface of the substrate 2 is a c-plane. This c-plane may have an off-axis angle. If the semiconductor layers of the light-emitting device 1 are stacked on the growth plane 21, which is a polar c-plane, an internal electric field (piezoelectric field) generated in the well layer 62 (described below) of the active layer 6 becomes large, which tends to reduce the light output. In the light-emitting device 1 of this embodiment, the carbon (C) concentration of the active layer 6 is devised as described below so that the light output can be improved even in such a situation where an internal electric field is likely to be generated in the active layer 6. Note that the substrate 2 may be, for example, an aluminum nitride (AlN) substrate or an aluminum gallium nitride (AlGaN) substrate.

[0014] The semiconductor constituting the light emitting element 1 is, for example, Al a Ga b In 1-a-b In this embodiment, a group III nitride semiconductor having two to four elements represented by the formula N (0≦a≦1, 0≦b≦1, 0≦a+b≦1) can be used. c Ga 1-c The semiconductor material uses a binary or ternary group III nitride semiconductor represented by N (0≦c≦1). Some of these group III elements may be replaced with boron (B), thallium (Tl), etc. Also, some of the nitrogen may be replaced with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), etc.

[0015] The buffer layer 3 is formed on the substrate 2. In this embodiment, the buffer layer 3 is made of aluminum nitride. When the substrate 2 is an aluminum nitride substrate or an aluminum gallium nitride substrate, the buffer layer 3 does not necessarily have to be provided.

[0016] The n-type semiconductor layer 4 is formed on the buffer layer 3. The n-type semiconductor layer 4 is, for example, Al doped with n-type impurities. r Ga 1-rThe n-type cladding layer is formed of AlN (0≦r≦1). In this embodiment, silicon (Si) is used as the n-type impurity. The same applies to semiconductor layers containing n-type impurities other than the n-type semiconductor layer 4. Note that germanium (Ge), selenium (Se), tellurium (Te), etc. may also be used as the n-type impurity. The Al composition ratio r of the n-type semiconductor layer 4 is, for example, 45% or more and 65% or less. The n-type semiconductor layer 4 may have a single-layer structure or a multi-layer structure. Note that the Al composition ratio is also referred to as the AlN mole fraction.

[0017] The compositionally graded layer 5 is formed on the n-type semiconductor layer 4. The compositionally graded layer 5 is made of Al s Ga 1-s N (0≦s≦1). The Al composition ratio at each position in the vertical direction of the composition gradient layer 5 increases toward the upper side. Note that the composition gradient layer 5 may include a region in which the Al composition ratio does not increase toward the upper side, for example, in a very small region in the vertical direction (for example, a region of 5% or less of the entire vertical direction of the composition gradient layer 5).

[0018] The Al composition ratio of the lower end of the composition gradient layer 5 is preferably approximately the same (for example, within a difference of 5%) as the Al composition ratio of the upper end of the n-type semiconductor layer 4 adjacent to the lower side of the composition gradient layer 5. Furthermore, the Al composition ratio of the upper end of the composition gradient layer 5 is preferably approximately the same (for example, within a difference of 5%) as the Al composition ratio of the lower end of the barrier layer 61 adjacent to the upper side of the composition gradient layer 5.

[0019] The active layer 6 is formed on the compositionally graded layer 5. The active layer 6 of this embodiment has a multiple quantum well structure having a plurality of well layers 62. In this embodiment, the active layer 6 has three barrier layers 61 and three well layers 62, and the barrier layers 61 and the well layers 62 are alternately stacked. In the active layer 6, the barrier layer 61 is located at the lower end and the well layer 62 is located at the upper end. However, the active layer 6 is not limited to this, and may be a multiple quantum well structure having two or four or more well layers 62, or a single quantum well structure having only one well layer 62.

[0020] The active layer 6 has its bandgap adjusted so that it can emit ultraviolet light with a central wavelength of 240 nm or more and 365 nm or less. When the active layer 6 has a multiple quantum well structure as in this embodiment, from the viewpoint of improving the emission output, the central wavelength of the ultraviolet light emitted by the active layer 6 is preferably 250 nm or more and 300 nm or less, and more preferably 260 nm or more and 290 nm or less.

[0021] Each barrier layer 61 is formed of Al t Ga 1-t N (0 < t ≦ 1). The Al composition ratio t of each barrier layer 61 is, for example, 75% or more and 95% or less. Also, the film thickness of each barrier layer 61 is, for example, 2 nm or more and 50 nm or less.

[0022] Each well layer 62 is formed of Al u Ga 1-u N (0 < u < 1). The Al composition ratio u of each well layer 62 is smaller than the Al composition ratio t of the barrier layer 61 (that is, u < t). For example, the Al composition ratio u is 25% or more and 55% or less. Also, the film thickness of each well layer 62 is, for example, 2 nm or more and 6 nm or less.

[0023] Of the multiple well layers 62, the well layer 62 located closest to the p-type semiconductor layer 8 is defined as the target well layer 62a. In this case, the ratio Cw / Cn of the carbon concentration Cw of the target well layer 62a to the carbon concentration Cn of the n-type semiconductor layer 4 is preferably 3.0 / 100 or less. As shown in the experimental examples described below, this configuration has been confirmed to improve the light-emitting output of the light-emitting device 1 even under conditions in which semiconductor layers are stacked on the c-plane growth surface 21 and an internal electric field is likely to be generated in the well layer 62. The target well layer 62a emits light more strongly than the other well layers 62. Setting the ratio Cw / Cn of the carbon concentration Cw of the target well layer 62a to the carbon concentration Cn of the n-type semiconductor layer 4 to 3.0 / 100 or less reduces the proportion of carbon as an impurity contained in the target well layer 62a, improving the crystallinity of the target well layer 62a and, as a result, improving the light-emitting output. From the viewpoint of further improving the light output of the light-emitting element 1, the ratio Cw / Cn is preferably 1.4 / 100 or less. The ratio Cw / Cn is preferably 0.6 / 100 or more. If the ratio Cw / Cn is less than 0.6 / 100, it may become necessary to set the growth temperature of at least one of the n-type semiconductor layer 4 and the active layer 6 to a temperature that is not suitable for crystal growth, which may result in a deterioration in the crystallinity of the n-type semiconductor layer 4 and the active layer 6. The carbon concentration Cn of the n-type semiconductor layer 4 is the carbon concentration at the center position in the stacking direction (vertical direction) of the n-type semiconductor layer 4, and the carbon concentration Cw of the target well layer 62a is the carbon concentration at the center position in the stacking direction (vertical direction) of the target well layer 62a.

[0024] The carbon concentration Cw of the target well layer 62a is 4.3×10 16 [atoms / cm 3 ] or less. As a result, it has been confirmed that the light emission output of the light emitting device 1 is improved, as will be shown in the experimental examples described later. From the viewpoint of further improving the light emission output, the carbon concentration Cw of the target well layer 62a is set to 3.0×10 16 [atoms / cm 3 ] or less. The carbon concentration Cw of the target well layer 62a can be adjusted by, for example, devising manufacturing conditions as described below. Furthermore, when the active layer 6 has a single quantum well structure having only one well layer 62, the target well layer 62a is that one well layer 62.

[0025] The carbon concentration at each position in the vertical direction of the n-type semiconductor layer 4 is 8.6×10 17 [atoms / cm 3 or more and preferably 2.6×10 18 [atoms / cm 3 or less. In the light-emitting element 1 of this embodiment, it has been confirmed that the light emission output is improved within such a range.

[0026] The electron blocking layer 7 is formed on the active layer 6. The electron blocking layer 7 has a role of improving the electron injection efficiency into the active layer 6 by suppressing the occurrence of an overflow phenomenon in which electrons leak from the active layer 6 to the p-type semiconductor layer 8 side (hereinafter also referred to as an electron blocking effect). The electron blocking layer 7 has a laminated structure in which a first layer 71 and a second layer 72 are laminated in order from the lower side.

[0027] The first layer 71 is provided on the active layer 6. The first layer 71 is made of, for example, Al v Ga 1-v N (0 < v ≦ 1). The Al composition ratio v of the first layer 71 is, for example, 90% or more, and in this embodiment, it is made of aluminum nitride. The film thickness of the first layer 71 is, for example, 0.5 nm or more and 5.0 nm or less.

[0028] The second layer 72 is made of, for example, Al w Ga 1-w N (0 < w < 1). The Al composition ratio w of the second layer 72 is smaller than the Al composition ratio v of the first layer 71 (that is, w < v), and is, for example, 70% or more and 90% or less. The film thickness of the second layer 72 is larger than the film thickness of the first layer 71, and is, for example, 15 nm or more and 100 nm or less.

[0029] Since the semiconductor layer with a larger Al composition ratio has a larger electrical resistance value, if the film thickness of the first layer 71 with a relatively high Al composition ratio is made too large, an excessive increase in the overall electrical resistance value of the light-emitting device 1 will occur. Therefore, it is preferable to make the film thickness of the first layer 71 somewhat small. On the other hand, if the film thickness of the first layer 71 is made small, the probability that electrons tunnel through the first layer 71 from the lower side to the upper side can increase. Therefore, in the light-emitting device 1 of the present embodiment, by forming the second layer 72 on the first layer 71, the electrons are suppressed from tunneling through the entire electron blocking layer 7.

[0030] Each of the first layer 71 and the second layer 72 can be an undoped layer, a layer containing n-type impurities, a layer containing p-type impurities, or a layer containing both n-type and p-type impurities. As the p-type impurity, magnesium (Mg) can be used, but in addition to magnesium, zinc (Zn), beryllium (Be), calcium (Ca), strontium (Sr), barium (Ba), carbon (C), etc. may also be used. The same applies to semiconductor layers containing other p-type impurities. When each electron blocking layer 7 contains impurities, the impurities contained in each electron blocking layer 7 may be contained in the entire electron blocking layer 7 or may be contained in a part of each electron blocking layer 7.

[0031] The p-type semiconductor layer 8 is formed on the electron blocking layer 7. The p-type semiconductor layer 8 has a smaller Al composition ratio than the electron blocking layer 7 and is formed of Al x Ga 1-x N (0≦x<1). In the present embodiment, the p-type semiconductor layer 8 has a stacked structure in which a p-type clad layer 81 and a p-type contact layer 82 are stacked in order from the lower side.

[0032] The p-type clad layer 81 is provided so as to be in contact with the second layer 72. The p-type clad layer 81 is composed of Al y Ga 1-y N (0<y<1). The Al composition ratio y of the p-type clad layer 81 is, for example, 45% or more and 65% or less. The film thickness of the p-type clad layer 81 is, for example, 9 nm or more and 105 nm or less.

[0033] The p-type contact layer 82 is a layer to which the p-side electrode 12 described below is connected, and is doped with a high concentration of p-type impurities. The p-type contact layer 82 is configured to have a low Al composition ratio (for example, 10% or less) to achieve ohmic contact with the p-side electrode 12, and from this perspective, it is preferably formed from p-type gallium nitride (GaN). The thickness of the p-type contact layer 82 is, for example, 3 nm or more and 50 nm or less. The p-type semiconductor layer 8 may be a single layer or multiple layers.

[0034] The n-side electrode 11 is formed on an exposed surface 41 of the n-type semiconductor layer 4 that is exposed above the active layer 6. The n-side electrode 11 may be, for example, a multilayer film in which titanium (Ti), aluminum, titanium, and titanium nitride (TiN) are laminated in this order on the n-type semiconductor layer 4.

[0035] The p-side electrode 12 is formed on the upper surface of the p-type semiconductor layer 8. The p-side electrode 12 can be made of, for example, rhodium (Rh). In this embodiment, the p-side electrode 12 is a reflective electrode having a reflectance of 50% or more, preferably 60% or more, at the center wavelength of light emitted from the active layer 6, but is not limited to this.

[0036] The light-emitting element 1 is flip-chip mounted on a package substrate (not shown) for use. That is, the side of the light-emitting element 1 on which the n-side electrode 11 and the p-side electrode 12 are provided in the up-down direction faces the package substrate, and the n-side electrode 11 and the p-side electrode 12 are mounted on the package substrate via connecting members such as gold bumps. Light from the flip-chip mounted light-emitting element 1 is extracted from the substrate 2 side (i.e., the bottom side).

[0037] (Method of manufacturing nitride semiconductor light emitting element 1) Next, an example of a method for manufacturing the light emitting device 1 of this embodiment will be described. In this embodiment, a buffer layer 3, an n-type semiconductor layer 4, a compositionally graded layer 5, an active layer 6, an electron blocking layer 7, and a p-type semiconductor layer 8 are epitaxially grown in this order on a disk-shaped substrate 2 by metal organic chemical vapor deposition (MOCVD). That is, in this embodiment, the disk-shaped substrate 2 is placed in a chamber, and source gases for each semiconductor layer to be formed on the substrate 2 are introduced into the chamber, thereby forming each semiconductor layer on the substrate 2. As source gases for epitaxially growing each semiconductor layer, trimethylaluminum (TMA) as an aluminum source, trimethylgallium (TMG) as a gallium source, ammonia (NH) as a nitrogen source, tetramethylsilane (TMSi) as a silicon source, and biscyclopentadienylmagnesium (CpMg) as a magnesium source can be used.

[0038] The MOCVD method is also called metal organic vapor phase epitaxy (MOVPE). When epitaxially growing each semiconductor layer on the substrate 2, other epitaxial growth methods such as molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HVPE) can also be used.

[0039] In the manufacturing method of the light-emitting device 1 of this embodiment, the ratio Cw / Cn of the carbon concentration Cw of the target well layer 62a to the carbon concentration Cn of the n-type semiconductor layer 4 is designed to be low as described above during the formation of the n-type semiconductor layer 4 and the active layer 6. The carbon concentration of a specific semiconductor layer may vary depending on the growth temperature, the flow balance of various source gases, the state of the manufacturing apparatus (MOCVD apparatus in this embodiment) (e.g., the state of deposition on the inner surface of the reaction chamber), etc. during the formation of that semiconductor layer. As an example, the carbon concentration of a specific semiconductor layer tends to increase as the growth temperature during the formation of that semiconductor layer increases. In this embodiment, the growth temperature of the active layer 6 is lower than that of the n-type semiconductor layer 4, and the growth temperature of the active layer 6 is 1050±50°C, and the growth temperature of the n-type semiconductor layer 4 is 1100±80°C.

[0040] After each semiconductor layer is formed on the disk-shaped substrate 2, a mask is formed on a portion of the p-type semiconductor layer 8, i.e., on a portion other than the portion that will become the exposed surface 41 of the n-type semiconductor layer 4. Then, the region where the mask is not formed is removed by etching from the top surface of the p-type semiconductor layer 8 to partway up and down the n-type semiconductor layer 4. As a result, an exposed surface 41 that is exposed upward is formed on the n-type semiconductor layer 4. After the exposed surface 41 is formed, the mask is removed.

[0041] Next, an n-side electrode 11 is formed on the exposed surface 41 of the n-type semiconductor layer 4, and a p-side electrode 12 is formed on the p-type semiconductor layer 8. The n-side electrode 11 and the p-side electrode 12 may be formed by a well-known method such as an electron beam evaporation method or a sputtering method. The completed product is cut into pieces of desired dimensions, and a plurality of light-emitting elements 1 as shown in FIG. 1 are manufactured from one wafer.

[0042] (Actions and Effects of the Embodiments) In the light-emitting device 1 of this embodiment, the ratio Cw / Cn of the carbon concentration Cw in the target well layer 62a to the carbon concentration Cn in the n-type semiconductor layer 4 is 3.0 / 100 or less. Therefore, even in the light-emitting device 1 that emits light in a short wavelength band (for example, ultraviolet light with a center wavelength of 365 nm or less), the light emission output can be improved. This value is supported by experimental examples described later.

[0043] Furthermore, the ratio Cw / Cn further satisfies 1.4 / 100 or less, which further improves the light output of the light-emitting element 1. This value is also supported by experimental examples described later.

[0044] The carbon concentration Cw of the target well layer 62a is 4.3×10 16 [atoms / cm 3 ] is satisfied. Therefore, the light output of the light-emitting element 1 is further improved. This value is also supported by experimental examples to be described later.

[0045] The carbon concentration Cw of the target well layer 62a is 3.0×10 16 [atoms / cm 3 ] below is further satisfied. Therefore, the light output of the light-emitting element 1 is further improved. This value is also supported by experimental examples described later.

[0046] As described above, according to this embodiment, it is possible to provide a nitride semiconductor light emitting device capable of improving light output.

[0047] [Experimental Example] This experimental example is an example in which the relationship between the ratio Cw / Cn of the carbon concentration Cw in the target well layer 62a to the carbon concentration Cn in the n-type semiconductor layer 4 and the light emission output of the wafer, and the relationship between the carbon concentration in the target well layer 62a in the active layer 6 and the light emission output of the wafer were evaluated.

[0048] In this embodiment, eight wafers, Samples 1 to 8, were prepared, each having a different carbon concentration distribution in the active layer 6. Table 1 shows the common configuration of the wafers for Samples 1 to 8. Unless otherwise specified, Samples 1 to 8 are wafers having the same basic configuration as the light-emitting device 1 in the embodiment. Note that, among the symbols used in the experimental examples, the same symbols used in the embodiment represent the same components, etc. as those in the embodiment, unless otherwise specified.

[0049] [Table 1]

[0050] The Al composition ratio of each layer listed in Table 1 is a value estimated from the Al secondary ion intensity measured by secondary ion mass spectrometry (SIMS). The column for composition gradient layer in Table 1 indicates that the Al composition ratio at each position in the vertical direction of the composition gradient layer gradually increases from 55% to 85% from the bottom to the top of the composition gradient layer.

[0051] Next, the carbon concentration Cw of the target well layer 62a, the carbon concentration Cn of the n-type semiconductor layer 4, the ratio Cw / Cn, and the light emission output of each of the wafers for Samples 1 to 8 are shown in Table 2 below.

[0052] [Table 2]

[0053] The carbon concentration Cw of the target well layer 62a and the carbon concentration Cn of the n-type semiconductor layer 4 listed in Table 2 were calculated from SIMS measurements. As can be seen from Table 2, the carbon concentration Cw of the target well layer 62a varies among Samples 1 to 8. Accordingly, the ratio Cw / Cn also varies among Samples 1 to 8. Samples 1 to 8 were manufactured under roughly the same conditions, but the conditions of the MOCVD apparatus (e.g., the thickness of the deposition on the inner surface of the reaction chamber) differed depending on the timing of manufacturing, which is thought to have caused the carbon concentration Cw of the target well layer 62a to fluctuate.

[0054] Among samples 1 to 8, samples 1 to 5 have a Cw / Cn ratio of 3.0 / 100 or less, i.e., satisfy the configuration of the embodiment. On the other hand, samples 6 to 8 have a Cw / Cn ratio of more than 3.0 / 100, and do not satisfy the configuration of the embodiment.

[0055] As an example, the carbon concentration distribution and Al secondary ion intensity distribution of sample 2 that satisfies the configuration of the embodiment are shown in FIG. 2, and the carbon concentration distribution and Al secondary ion intensity distribution of sample 7 that does not satisfy the configuration of the embodiment are shown in FIG. 3. The measurement depth on the horizontal axis in FIGS. 2 and 3 represents the vertical distance from the top surface of p-type contact layer 82. In FIGS. 2 and 3, the boundary positions of each semiconductor layer are indicated by thin solid lines in the vertical direction. Note that in FIGS. 2 and 3, the carbon concentration at each position in the n-type semiconductor layer 4 in the vertical direction was roughly constant, so only a portion of the n-type semiconductor layer 4 (the upper region) is excerpted.

[0056] A current of 20 mA was applied to each of Samples 1 to 8 while they were on the wafer, and the optical output was measured. The optical output of each sample was measured using a photodetector installed below the sample (i.e., on the substrate 2 side). The results are shown in the "Optical Output" column of Table 2 and in FIGS. 4 and 5. FIG. 4 is a graph showing the relationship between the ratio Cw / Cn and the optical output. FIG. 5 is a graph showing the relationship between the carbon concentration Cw in the target well layer 62a and the optical output.

[0057] 4 also shows that the light emission output is particularly improved when the ratio Cw / Cn is 3.0 / 100 or less. Therefore, it is preferable that the ratio Cw / Cn is 3.0 / 100 or less. From the same perspective, it is preferable that the ratio Cw / Cn is 1.4 / 100 or less.

[0058] From FIG. 5, the carbon concentration Cw of the target well layer 62a is 4.3×10 16 [atoms / cm 3 5, when the carbon concentration Cw of the target well layer 62a is 4.3×10 16 [atoms / cm 3 ], the change in the light emission output in response to the change in the carbon concentration Cw of the target well layer 62a is small. 16 [atoms / cm 3] or less, the light emission output improves as the carbon concentration Cw of the target well layer 62a decreases. 16 [atoms / cm 3 In particular, it is preferable that the carbon concentration Cw of the target well layer 62a is 3.0×10 16 [atoms / cm 3 Therefore, it can be seen that the carbon concentration Cw of the target well layer 62a is expected to be 3.0×10 16 [atoms / cm 3 ] or less.

[0059] It is conceivable that if the carbon concentration Cw of the target well layer 62a is excessively low, the light emission output will decrease. For example, the carbon concentration Cw of the target well layer 62a tends to decrease as the growth temperature during the formation of the active layer 6 is reduced. However, if the growth temperature during the formation of the active layer 6 is excessively low, the active layer 6 will not grow properly, and the light emission output will decrease significantly. From this perspective, for example, the carbon concentration Cw of the target well layer 62a is set to 1.6×10 16 [atoms / cm 3 ] or more may be used.

[0060] (Summary of the embodiment) Next, the technical ideas grasped from the above-described embodiments will be described by using the reference numerals and the like in the embodiments. However, the reference numerals and the like in the following description do not limit the components in the claims to the members and the like specifically shown in the embodiments.

[0061] [1] A first embodiment of the present invention is a nitride semiconductor light-emitting device 1 comprising: a substrate 2 having a growth surface 21 which is a c-plane; a buffer layer 3 formed on the growth surface 21; an n-type semiconductor layer 4 formed on the buffer layer 3 and containing Al, Ga, and N; an active layer 6 formed on the n-type semiconductor layer 4 and having at least one well layer 62 containing Al, Ga, and N; and a p-type semiconductor layer 8 formed on the active layer 6, wherein the nitride semiconductor light-emitting device 1 emits ultraviolet light having a center wavelength of 365 nm or less; and when the well layer 62 of the at least one well layer 62 closest to the p-type semiconductor layer 8 is designated as a target well layer 62a, the ratio Cw of the carbon concentration Cw of the target well layer 62a to the carbon concentration Cn of the n-type semiconductor layer 4, Cw / Cn, is 3.0 / 100 or less. This improves the light emission output of the nitride semiconductor light emitting device 1.

[0062] [2] A second embodiment of the present invention is the first embodiment, wherein the ratio Cw / Cn further satisfies 1.4 / 100 or less. This improves the light emission output of the nitride semiconductor light emitting device 1.

[0063] [3] A third embodiment of the present invention is the first or second embodiment, wherein the carbon concentration Cw of the target well layer 62a is 4.3 × 10 16 [atoms / cm 3 ] or less. This improves the light emission output of the nitride semiconductor light emitting device 1.

[0064] [4] A fourth embodiment of the present invention is the third embodiment, wherein the carbon concentration Cw of the target well layer 62a is 3.0 × 10 16 [atoms / cm 3 ] and further satisfy the following: This improves the light emission output of the nitride semiconductor light emitting device 1.

[0065] (Addendum) Although the embodiments of the present invention have been described above, the invention according to the claims is not limited to the above-described embodiments. It should be noted that not all of the combinations of features described in the embodiments are necessarily essential to the means for solving the problems of the invention. Furthermore, the present invention can be appropriately modified and implemented within the scope of its spirit. [Explanation of symbols]

[0066] 1...Nitride semiconductor light emitting device 2...Substrate 21…Growth aspect 3...Buffer layer 4...n-type semiconductor layer 6…Active layer 62...Well layer 62a...Target well layer 8...p-type semiconductor layer Cn...carbon concentration in n-type semiconductor layer Cw: Carbon concentration in the target well layer

Claims

1. a substrate whose c-plane is the growth surface; a buffer layer formed on the growth surface; an n-type semiconductor layer containing Al, Ga, and N formed on the buffer layer; an active layer formed on the n-type semiconductor layer and having at least one well layer containing Al, Ga, and N; a p-type semiconductor layer formed on the active layer, Emits ultraviolet light with a central wavelength of 365 nm or less, When the well layer closest to the p-type semiconductor layer among the at least one well layer is defined as a target well layer, a ratio Cw / Cn of a carbon concentration Cw of the target well layer to a carbon concentration Cn of the n-type semiconductor layer is 3.0 / 100 or less. Nitride semiconductor light emitting device.

2. The ratio Cw / Cn further satisfies 1.4 / 100 or less. The nitride semiconductor light emitting device according to claim 1 .

3. The carbon concentration Cw of the target well layer is 4.3×10 １６ [atoms / cm ３ ]or less, The nitride semiconductor light-emitting device according to claim 1 or 2.

4. The carbon concentration Cw of the target well layer is 3.0×10 １６ [atoms / cm ３ ]and also satisfy the following: The nitride semiconductor light emitting device according to claim 3 .

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