Semiconductor manufacturing equipment components

Abstract

A semiconductor manufacturing equipment component that contributes to suppressing electrical discharge is provided, comprising: a dielectric substrate; a plug placement hole that vertically penetrates the dielectric substrate; a plug that is embedded in the plug placement hole and has an upper surface and a lower surface; a conductive base plate that is bonded to the lower surface of the dielectric substrate via a bonding layer; and a gas supply path that passes through the base plate and the bonding layer and supplies a gas to the plug, the plug being made of a dielectric material, the plug having a dense portion, a gas flow path that has a lower dielectric constant than the dense portion and penetrates the plug for flowing the gas, and a voltage drop promotion portion that has a lower dielectric constant than the dense portion and does not form a flow path for flowing the gas.

Description

[Technical Field]

[0001] The present invention relates to a member for a semiconductor manufacturing device. [Background technology]

[0002] Conventionally, semiconductor manufacturing equipment components have been known that are used for holding wafers, controlling their temperature, transporting them, etc. These types of semiconductor manufacturing equipment components are also called wafer mounting tables, electrostatic chucks, susceptors, etc., and generally have the function of applying electrostatic attraction power to a built-in electrode to attract the wafer by electrostatic force, and some are also known to have the function of controlling the wafer temperature by flowing gas between the wafer mounting surface and the wafer to be attracted.

[0003] A known component for semiconductor manufacturing equipment includes, for example, a dielectric substrate having an upper surface for placing a wafer thereon, a gas passage that passes through the dielectric substrate in the vertical direction, and a conductive base plate joined to the lower surface of the dielectric substrate.

[0004] In such semiconductor manufacturing equipment components, a large potential difference can occur between the wafer and the base plate, which can lead to discharge (dielectric breakdown) between the wafer and the base plate through the gas passage. For this reason, various technologies for placing plugs in the gas passages have been investigated to suppress discharge. Plugs are often made of porous materials. Without a plug, for example, when RF voltage is applied, gas molecules are ionized, resulting in electrons that accelerate and collide with other gas molecules, causing glow discharge and eventually arc discharge. However, with a plug, the electrons strike the plug before colliding with other gas molecules, suppressing discharge.

[0005] Patent Document 1 proposes a plug having a gas flow path portion that bends and penetrates a dense main body portion in the thickness direction. It also proposes making at least a portion of the entire length of the gas flow path portion insulating and porous.

[0006] Patent Document 2 discloses an electrostatic chuck comprising: a ceramic dielectric substrate having a first main surface on which an object to be attracted is placed and a second main surface opposite the first main surface; a base plate supporting the ceramic dielectric substrate and having a gas inlet passage; and a first porous portion provided between the base plate and the first main surface of the ceramic dielectric substrate and at a position facing the gas inlet passage, wherein the ceramic dielectric substrate has a first hole portion located between the first main surface and the first porous portion, and the first porous portion has a porous portion having a plurality of holes and a first dense portion that is denser than the porous portion, and when projected onto a plane perpendicular to a first direction from the base plate toward the ceramic dielectric substrate, the first dense portion and the first hole portion overlap, but the porous portion and the first hole portion do not overlap.

[0007] Patent Document 3 describes an electrostatic chuck comprising: a ceramic dielectric substrate having a first main surface on which an object to be attracted is placed and a second main surface opposite the first main surface; a base plate supporting the ceramic dielectric substrate and having a gas inlet passage; and a first porous portion provided between the base plate and the first main surface of the ceramic dielectric substrate and facing the gas inlet passage, wherein the first porous portion has a plurality of sparse portions having a plurality of holes and a dense portion having a density higher than that of the sparse portions, each of the plurality of sparse portions extending in a first direction from the base plate toward the ceramic dielectric substrate, the dense portion being located between the plurality of sparse portions, the sparse portion having the holes and a wall portion provided between the holes, and wherein a minimum value of a dimension of the wall portion is smaller than a minimum value of a dimension of the dense portion in a second direction substantially perpendicular to the first direction.

[0008] Patent Document 4 describes an invention aimed at providing a holding device capable of controlling the temperature of an object with high precision while reducing the occurrence of abnormal discharge. Specifically, the holding device described includes a ceramic substrate having a first surface for holding an object and a second surface opposite the first surface, a base member disposed on the second surface side of the ceramic substrate and having a third surface opposite the ceramic substrate, and a bonding material disposed between the ceramic substrate and the base member, wherein (1) the ceramic substrate and the base member are formed with a flow path that allows a fluid to move between an outlet hole provided in the first surface and an inlet hole provided in the third surface, or (2) the ceramic substrate is formed with a flow path that allows a fluid to move between an outlet hole provided in the first surface and an inlet hole provided in the second surface, the flow path having a porous ceramic region, the porous ceramic region including a sparse region and a dense region that has a lower porosity than the sparse region and is disposed closer to the first surface than the sparse region.

[0009] In Patent Document 5, a wafer mounting table is provided with an insulating first porous portion disposed in a through-hole of a ceramic plate and an insulating second porous portion fitted in a recess provided on the ceramic plate side of a base plate so as to face the first porous portion. Gas supplied to a gas inlet passage passes through the second and first porous portions and flows into the space between the wafer mounting surface and the wafer, where it is used to cool the object. The publication states that the presence of the first and second porous portions ensures the flow rate of gas from the gas inlet passage to the wafer mounting surface while suppressing the occurrence of discharge (arc discharge) caused by plasma during wafer processing. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Japanese Patent Publication No. 2022-119338 [Patent Document 2] Japanese Patent Publication No. 2022-31333 [Patent Document 3] Japanese Patent Application Publication No. 2019-165194 [Patent Document 4] Japanese Patent Publication No. 2022-176701 [Patent Document 5] Japanese Patent Publication No. 2020-72262 Summary of the Invention [Problem to be solved by the invention]

[0011] As described above, in order to suppress discharges occurring between the wafer and the base plate in semiconductor manufacturing equipment components, various technologies have been proposed to improve the structure near the plug located in the gas passage that penetrates the dielectric substrate in the vertical direction. However, it is believed that developing a technology to suppress discharges using a different approach would be meaningful for the technological advancement of semiconductor manufacturing equipment components. In particular, there is still room for improvement in technology to suppress discharges occurring near the joint between the dielectric substrate and the base plate in the gas passage that penetrates the dielectric substrate in the vertical direction.

[0012] In view of the above circumstances, in one embodiment, the present invention aims to provide a component for semiconductor manufacturing equipment that helps to suppress discharges that occur near the joint between the dielectric substrate and the base plate in a gas passage that penetrates the dielectric substrate in the vertical direction. [Means for solving the problem]

[0013] The present inventors have conducted extensive research to solve the above problems and have created the present invention, which is exemplified below.

[0014] [Aspect 1] a dielectric substrate having an upper surface for placing a wafer thereon and a lower surface opposite to the upper surface; a plug placement hole that penetrates the dielectric substrate in the vertical direction; a plug embedded in the plug placement hole and having an upper surface and a lower surface; a conductive base plate bonded to a lower surface of the dielectric substrate via a bonding layer; a gas supply path that passes through the base plate and the bonding layer and supplies gas to the plug; Equipped with the plug is made of a dielectric material, The plug is The dense part and a gas flow path having a dielectric constant lower than that of the dense portion and penetrating the plug for allowing the gas to flow; a voltage drop promotion portion having a lower dielectric constant than the dense portion and not forming a flow path for the gas to flow; Components for semiconductor manufacturing equipment. [Aspect 2] 2. The semiconductor manufacturing equipment member according to claim 1, wherein the dense portion has a relative dielectric constant of greater than 7, and the voltage drop promoting portion has a relative dielectric constant of 7 or less. [Aspect 3] A semiconductor manufacturing equipment member according to aspect 1 or 2, wherein the plug placement hole has a truncated cone space with an upper opening area larger than an area of ​​a lower opening, and the plug has a truncated cone shape corresponding to the plug placement hole. [Aspect 4] 4. The semiconductor manufacturing equipment member according to any one of aspects 1 to 3, wherein at least a portion of the gas flow path is porous. [Aspect 5] 5. The semiconductor manufacturing equipment member according to any one of aspects 1 to 4, wherein the voltage drop promoting portion is porous. [Aspect 6] a dielectric substrate having an upper surface for placing a wafer thereon and a lower surface opposite to the upper surface; a plug placement hole that penetrates the dielectric substrate in the vertical direction; a plug embedded in the plug placement hole and having an upper surface and a lower surface; a conductive base plate bonded to a lower surface of the dielectric substrate via a bonding layer; a gas supply path that passes through the base plate and the bonding layer and supplies gas to the plug; Equipped with the plug is made of a dielectric material, The plug is The dense part and a gas passage through the plug for the flow of the gas; a gas introduction space communicating with the gas supply path and the gas flow path is provided between a lower surface of the plug and the bonding layer; a dielectric that allows the gas to flow is disposed in the gas introduction space; Components for semiconductor manufacturing equipment. [Aspect 7] 7. A member for a semiconductor manufacturing equipment according to embodiment 6, wherein the dielectric that allows the gas flow has a relative dielectric constant of 1 to 11. [Aspect 8] 8. The member for a semiconductor manufacturing equipment according to embodiment 6 or 7, wherein the dense portion has a relative dielectric constant of greater than 7. [Aspect 9] 9. A member for a semiconductor manufacturing equipment according to any one of aspects 6 to 8, wherein the vertical distance from the inlet of the gas flow channel through the gas introduction space to the upper surface of the bonding layer is 500 μm or less. [Aspect 10] 10. The member for a semiconductor manufacturing equipment according to any one of aspects 6 to 9, wherein at least a part of the gas flow channel is porous. [Aspect 11] 11. The semiconductor manufacturing equipment member according to any one of aspects 6 to 10, wherein the gas flow path is porous. [Aspect 12] A member for a semiconductor manufacturing equipment according to any one of aspects 6 to 11, wherein the plug placement hole has a truncated cone space in which the area of ​​the upper opening is larger than the area of ​​the lower opening, and the plug has a truncated cone shape corresponding to the plug placement hole. [Effects of the Invention]

[0015] A semiconductor manufacturing equipment component according to one embodiment of the present invention is effective in suppressing discharges that occur between a wafer and a base plate, particularly discharges that occur near the joint between the dielectric substrate and the base plate in a gas passage that passes through the dielectric substrate in the vertical direction. [Brief explanation of the drawings]

[0016] [Figure 1] 1 is a schematic longitudinal sectional view of a semiconductor manufacturing equipment member according to one embodiment of the present invention. [Figure 2] FIG. 2 is a partially enlarged view of FIG. [Figure 3] FIG. 1 is a schematic plan view of a dielectric substrate according to an embodiment. [Figure 4] Schematic diagram showing the mechanism by which the potential decreases from the wafer toward the bonding layer in a semiconductor manufacturing equipment member. [Figure 5] FIG. 10 is a schematic vertical cross-sectional view of a semiconductor manufacturing equipment member according to another embodiment of the present invention. [Figure 6] 1A to 1C are diagrams showing a manufacturing process of a semiconductor manufacturing equipment member according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0017] Next, embodiments of the present invention will be described in detail with reference to the drawings. It should be understood that the present invention is not limited to the following embodiments, and that appropriate design changes, improvements, and the like may be made based on the common knowledge of those skilled in the art without departing from the spirit of the present invention. Furthermore, in this specification, "upper" and "lower" are used for convenience to represent the relative positional relationship when the semiconductor manufacturing equipment component is placed on a horizontal surface with the base plate facing downwards, and do not represent absolute positional relationships. Therefore, depending on the orientation of the semiconductor manufacturing equipment component, "upper" and "lower" may become "lower" and "upper," "left" and "right," or "front" and "rear."

[0018] <1. Composition of semiconductor manufacturing equipment components> Referring to FIGS. 1 and 2, a semiconductor manufacturing equipment member 10 according to one embodiment of the present invention includes: a dielectric substrate 20 having an upper surface 21 for placing a wafer thereon and a lower surface 23 opposite to the upper surface 21; a plug placement hole 50 penetrating the dielectric substrate 20 in the vertical direction; a plug 55 embedded in the plug placement hole 50 and having an upper surface 55b and a lower surface 55c; a conductive base plate 30 bonded to the lower surface 23 of the dielectric substrate 20 via a bonding layer 40; a gas supply path 60 for supplying gas to the plug 55 through the base plate 30 and the bonding layer 40; Equipped with.

[0019] The dielectric substrate 20 may be a circular plate (e.g., 300 to 400 mm in diameter) made of ceramic, such as sintered alumina or sintered aluminum nitride. The thickness of the dielectric substrate 20 is not limited, but from the viewpoint of increasing the fixing strength of the plug 55, the thickness from the upper opening 50b to the lower opening 50c is preferably 1 mm or more. Furthermore, from the viewpoints of reducing heat transfer and manufacturing costs of the dielectric substrate 20, the thickness is preferably 5 mm or less, more preferably 3 mm or less, and even more preferably 2 mm or less. Therefore, the thickness from the upper opening 50b to the lower opening 50c is, for example, preferably 1 to 5 mm, more preferably 1 to 3 mm, and even more preferably 1 to 2 mm. Here, the thickness from the upper opening 50b to the lower opening 50c refers to the distance D1 from the center of gravity G1 of the upper opening 50b to the center of gravity G2 of the lower opening 50c. The height of the upper opening 50b is equal to the height of the reference plane 21c of the upper surface 21 of the dielectric substrate 20. The height of the lower opening 50 c is equal to the height of the lower surface 23 of the dielectric substrate 20 .

[0020] The upper surface 21 of the dielectric substrate 20 has a wafer mounting surface on which a wafer W is mounted. The dielectric substrate 20 incorporates an electrode 22. As shown in FIG. 3, a ring-shaped seal band 21a is formed on the upper surface 21 of the dielectric substrate 20 along the outer edge, and a plurality of small protrusions 21b are formed on the entire inner surface of the seal band 21a. The shape of the small protrusions 21b is not limited, but may be, for example, a cylindrical or rectangular column. The seal band 21a and the small protrusions 21b preferably have the same height, which is, for example, 5 to 100 μm, and typically 10 to 30 μm. The electrode 22 is a planar electrode used as an electrostatic electrode and is connected to an external DC power supply via a power supply member (not shown). A low-pass filter may be disposed along the power supply member. The power supply member is electrically insulated from the bonding layer 40 and the base plate 30. When a DC voltage is applied to this electrode 22, the wafer W is attracted and fixed to the wafer mounting surface (specifically, the upper surfaces of the seal bands 21a and the small protrusions 21b) by electrostatic attraction, and when the application of the DC voltage is stopped, the wafer W is released from the attracting and fixing state to the wafer mounting surface. Note that the portion of the upper surface 21 of the dielectric substrate 20 on which the seal bands 21a and the small protrusions 21b are not provided is referred to as the reference surface 21c.

[0021] A heater electrode (resistance heating element) may be built in instead of or in addition to the electrostatic electrode as the electrode 22. In this case, a heater power supply is connected to the heater electrode. The dielectric substrate 20 may have one layer of electrodes built in, or two or more layers of electrodes spaced apart.

[0022] The conductive base plate 30 is a circular plate (having the same diameter as or larger than the dielectric substrate 20) with good electrical and thermal conductivity. A refrigerant flow path 32 through which a refrigerant circulates may be formed within the base plate 30. The refrigerant flowing through the refrigerant flow path 32 is preferably a liquid, preferably electrically insulating. Examples of electrically insulating liquids include fluorine-based inert liquids. The refrigerant flow path 32 can be formed, for example, in a single stroke across the entire base plate 30 in a plan view, from one end (inlet) to the other end (outlet). One end and the other end of the refrigerant flow path 32 are connected to a supply port and a recovery port, respectively, of an external refrigerant device (not shown). The refrigerant supplied from the supply port of the external refrigerant device to one end of the refrigerant flow path 32 passes through the refrigerant flow path 32, returns from the other end of the refrigerant flow path 32 to the recovery port of the external refrigerant device, and is temperature-adjusted before being supplied again from the supply port to one end of the refrigerant flow path 32. The base plate 30 is connected to a radio frequency (RF) power source and can also be used as an RF electrode.

[0023] Examples of materials for the base plate 30 include metal materials and composite materials of metal and ceramics. Metal materials include Al, Ti, Mo, W, and alloys thereof. Composite materials of metal and ceramics include metal matrix composites (MMCs) and ceramic matrix composites (CMCs). Specific examples of such composite materials include materials containing Si, SiC, and Ti (also called SiSiCTi), porous SiC materials impregnated with Al and / or Si, and composite materials of Al2O3 and TiC. A material in which porous SiC is impregnated with Al is called AlSiC, and a material in which porous SiC is impregnated with Si is called SiSiC. It is preferable to select a material for the base plate 30 that has a thermal expansion coefficient close to that of the material of the dielectric substrate 20. For example, if the dielectric substrate 20 is made of alumina, the base plate is preferably made of SiSiCTi or AlSiC.

[0024] As shown in FIG. 2 , the upper surface 31 of the base plate 30 is bonded to the lower surface 23 of the dielectric substrate 20 via a bonding layer 40. The bonding layer 40 is formed, for example, by thermal compression bonding (TCB). TCB is a well-known method in which a metal bonding material is sandwiched between two components to be bonded and heated to a temperature below the solidus temperature of the metal bonding material while pressure bonding the two components. The bonding layer 40 can be formed of a metal bonding layer using, for example, an Al-Mg bonding material or an Al-Si-Mg bonding material. The bonding layer 40 may also be formed of solder or a metal brazing material. Alternatively, the bonding layer 40 may be formed of a resin adhesive layer instead of a metal bonding layer. Examples of materials for the resin adhesive layer include a silicone resin adhesive, an epoxy resin adhesive, and an acrylic resin adhesive. To improve the uniformity of the thickness of the resin adhesive layer, a spacer (not shown) may be placed between the upper surface 31 of the base plate 30 and the lower surface 23 of the dielectric substrate 20.

[0025] The bonding layer 40 has a through hole 42. The through hole 42 is located opposite the large-diameter portion 34a of the gas hole 34. The through hole 42 is located coaxially with the large-diameter portion 34a, and the diameter of the through hole 42 may be the same as the diameter of the large-diameter portion 34a. In this specification, "matching" includes not only a perfect match but also a substantial match (e.g., within a tolerance range) (the same applies hereinafter). In this embodiment, the gas hole 34 and the through hole 42 correspond to a gas supply path 60 that passes through the base plate 30 and the bonding layer 40 and supplies gas to the plug 55. A plurality of through holes 42 may be provided for one plug 55. In this case, the plurality of through holes 42 are preferably provided point-symmetrically with respect to the central axis extending in the vertical direction of the plug 55. Providing multiple through holes 42 rather than a single large through hole 42 allows the size of each through hole 42 to be smaller, thereby reducing the risk of discharge. Providing multiple through holes 42 also ensures the necessary gas flow rate.

[0026] As shown in FIGS. 1 and 2 , the plug arrangement hole 50 is a hole that penetrates the dielectric substrate 20 in the vertical direction. The plug arrangement hole 50 is a gas passage that extends from the lower surface 23 of the dielectric substrate 20 to the reference plane 21c of the upper surface 21. The horizontal opening diameter of the plug arrangement hole 50 (meaning the equivalent circular diameter when the cross section of the plug arrangement hole is not circular) is not limited, but can be, for example, within a range of 1 to 5 mm at any height position, and typically within a range of 3 to 4 mm. The diameter of the plug arrangement hole 50 may be constant or may vary from the lower surface 23 to the upper surface 21 of the dielectric substrate 20. In one embodiment, the diameter of the plug arrangement hole 50 decreases from top to bottom, and the plug arrangement hole 50 may have a tapered inner circumferential surface 50a in which the area of ​​the upper opening 50b is larger than the area of ​​the lower opening 50c. The tapered inner peripheral surface 50a of the plug mounting hole 50 makes it easier for the plug 55 to stop at a predetermined height in the plug mounting hole 50 when being inserted into the plug mounting hole 50, thereby enabling the plug to be inserted into the plug mounting hole with high positioning accuracy. Furthermore, the plug is less likely to be removed downward, but is relatively easy to remove upward, making it easier to replace the plug. Furthermore, the increased creepage distance also serves to suppress discharge. The plug mounting hole 50 may have a space shaped like a truncated cone or a truncated pyramid, for example.

[0027] The inclination angle α of the inner circumferential surface 50a of the plug arrangement hole 50 with respect to the lower opening 50c is preferably 70° or more, and more preferably 75° or more, from the viewpoints of increasing the fixing strength of the plug 55 and preventing the volume of the plug 55 from becoming excessively large to ensure space for arranging electrodes around it. Furthermore, the inclination angle α is preferably 87° or less, and more preferably 85° or less, from the viewpoints of improving the positioning accuracy in the height direction of the plug when the plug 55 is press-fitted downward into the plug arrangement hole 50, facilitating replacement of the plug 55, and lengthening the creepage distance to suppress discharge. Therefore, the inclination angle α is preferably, for example, 70° to 87°, and more preferably 75° to 85°.

[0028] As shown in FIG. 3 , the semiconductor manufacturing equipment member 10 according to this embodiment has a plurality of plug arrangement holes 50 (six in this example). A plug 55 is embedded in the plug arrangement hole 50. The plug 55 has a gas flow path 55d penetrating the interior of the plug 55. In one embodiment, the gas flow path 55d has one opening on the lower surface 55c of the plug 55 and the other opening on the upper surface 55b, penetrating the interior of the plug 55 in the vertical direction. In another embodiment, the gas flow path 55d has one opening on the lower surface 55c of the plug 55 and the other opening on the outer peripheral surface 55a, penetrating the interior of the plug 55. The outer peripheral surface 55a of the plug 55 and the inner peripheral surface 50a of the plug arrangement hole 50 may be bonded with an adhesive, but it is preferable that they be directly fitted together without an adhesive. Direct fitting between the plug 55 and the plug arrangement hole 50 prevents voids from forming between the plug 55 and the plug arrangement hole 50 due to deterioration caused by corrosion or erosion of the adhesive. This provides the advantage of being able to suppress discharge and detachment of the plug 55 caused by deterioration of the adhesive.

[0029] As shown in Figures 1 and 2, when observing a longitudinal cross section obtained by cutting the dielectric substrate 20 in the thickness direction, from the viewpoint of improving the fixing strength of the plug 55, it is preferable that the inner peripheral surface 50a of the plug arrangement hole 50 is in contact with the outer peripheral surface 55a of the plug 55 in a parallel positional relationship. In other words, the outer peripheral surface 55a of the plug 55 has the same inclination angle as the inner peripheral surface 50a of the plug arrangement hole 50. Therefore, in a preferred embodiment, the plug has an outer shape that is the same shape as the plug arrangement hole (e.g., a truncated cone or a truncated pyramid). This makes it possible to Placement hole 50 This increases the area where the inner peripheral surface 50a of the plug 55 comes into contact with the outer peripheral surface 55a of the plug 55, thereby achieving high fixing strength.

[0030] An example of a direct fitting method is to embed the plug 55 by press-fitting it into the plug positioning hole 50. In this case, in order to obtain the desired fixing strength, it is preferable that the horizontal cross-sectional diameter of the plug 55 at any height position before press-fitting is slightly larger (for example, by about 5 to 20 μm in equivalent circle diameter) than the horizontal cross-sectional diameter of the plug positioning hole 50 at the same height position. Another example of a direct fitting method is to thread a male thread portion provided on the outer peripheral surface 55a of the plug 55 into a female thread portion provided on the inner peripheral surface 50a of the plug positioning hole 50. Furthermore, the plug 55 may be formed by injecting a paste-like ceramic mixture, which serves as a precursor of the plug 55, into the plug positioning hole 50 of the dielectric substrate 20 and firing it.

[0031] The plug 55 can be made of a dielectric material. Specifically, the material for the plug 55 can be an electrically insulating ceramic, which can contain, for example, one or more materials selected from aluminum oxide and aluminum nitride. The plug 55 can also be made of only one or two materials selected from aluminum oxide and aluminum nitride, excluding impurities. Furthermore, to maintain the fixing strength of the plug 55, it is preferable that the difference in thermal expansion coefficient between the plug 55 and the dielectric substrate 20 is small. For this reason, it is preferable that the material for the plug 55 and the material for the dielectric substrate 20 both contain one or more materials selected from aluminum oxide and aluminum nitride, and it is more preferable that the material compositions are the same.

[0032] The height position of the upper surface 55b of the plug 55 is not limited. Therefore, it may be the same height as the reference surface 21c of the dielectric substrate 20, or it may be a different height. However, it is preferable that the height position of the upper surface 55b of the plug 55 is the same height as the reference surface 21c. If the upper surface 55b of the plug 55 is to be lower than the reference surface 21c, it is preferable to place it at a position lower by 0.5 mm or less (preferably 0.2 mm or less, more preferably 0.1 mm or less) in order to suppress the occurrence of discharge. If the upper surface of the plug 55 is to be higher than the reference surface 21c, there is no particular limitation as long as it is lower than the upper surfaces of the small protrusions 21b and the outflow of gas from the plug 55 is not hindered.

[0033] There is no particular limitation on the height position of the lower surface 55c of the plug 55. Therefore, it may be at the same height as the lower surface 23 of the dielectric substrate 20, or may be at a different height. For example, the lower surface 55c of the plug 55 may protrude downward from the lower surface 23 of the dielectric substrate 20, or the lower surface 55c of the plug 55 may protrude downward from the lower surface 23 of the dielectric substrate 20. 23 However, the gas may be supplied to the lower surface of the plug 55. 55c For the reason that gas can be easily introduced from the lower surface 55c of the plug 55, it is preferable to provide a gas introduction space 55e communicating with the gas supply path 60 between the lower surface 55c of the plug 55 and the bonding layer 40. The gas introduction space 55e can be formed by, for example, a recess provided in the lower surface 55c of the plug 55.

[0034] From the viewpoint of ensuring gas permeability, the vertical distance D2 from the inlet 55d1 of the gas flow path 55d through the gas introduction space 55e to the upper surface 40a of the bonding layer 40 is preferably 0.01 mm or more, and more preferably 0.05 mm or more. On the other hand, from the viewpoint of suppressing discharge, the distance D2 is preferably 0.5 mm or less, more preferably 0.1 mm or less, and even more preferably 0.05 mm or less. Therefore, the distance D2 is, for example, preferably 0.01 to 0.5 mm, more preferably 0.01 to 0.1 mm, and even more preferably 0.01 to 0.05 mm.

[0035] 4 shows a schematic diagram of the mechanism by which the potential decreases from the wafer W toward the bonding layer 40 when the plug 55 and the gas introduction space 55e are considered as capacitors with capacitances Ca and Cb, respectively, in the semiconductor manufacturing equipment member 10 according to this embodiment. If the gas introduction space 55e is provided between the lower surface 55c of the plug 55 and the bonding layer 40, Vb in the gas introduction space 55e is large, and therefore discharge is likely to occur in this vicinity. Since V = Va + Vb, Vb can be reduced by increasing Va in the plug 55. In order to increase Va, Ca can be reduced, but this requires the relative dielectric constant ε of the plug 55 to be reduced. r1 This can be achieved by reducing

[0036] Therefore, in one embodiment of the present invention, the plug 55 has a dense portion 55f, a gas flow path 55d that has a lower dielectric constant than that of the dense portion 55f and penetrates the plug 55 for allowing a gas to flow, and a voltage drop acceleration portion 55g that has a lower dielectric constant than that of the dense portion 55f and does not form a flow path for a gas to flow. By having the voltage drop acceleration portion 55g in the plug 55 in addition to the gas flow path 55d, the overall dielectric constant of the plug 55 can be further reduced.

[0037] The dense portion 55f refers to a portion of the plug 55 that has a porosity of 5% or less. Therefore, the voltage drop promotion portion 55g must have a porosity of more than 5%. The partial porosity of the plug 55 is measured by the following method. First, the plug 55 is cut so that a cross section passing through the central axis extending in the vertical direction of the plug 55 is exposed. Next, the portion of the cross section to be measured for porosity is observed at a magnification of 3000 times and a resolution of 2200 μm using a scanning electron microscope (SEM). 2 The area ratio of pores observed in that area is determined. Specifically, by analyzing the SEM image, a threshold is determined using discriminant analysis (Otsu's binarization) from the brightness distribution of the brightness data of pixels in the image. Then, based on the determined threshold, each pixel in the image is binarized into object and pore areas, and the areas of the object and pore areas are calculated. Then, the ratio of the area of ​​the pores to the total area (the total area of ​​the object and pore areas) is determined, and this is the porosity of the area being measured.

[0038] The voltage drop promotion portion 55g may be provided in one location or in two or more locations on the plug 55. The voltage drop promotion portion 55g may be provided only inside the plug 55, or may have a portion exposed on the upper surface 55b and / or the lower surface 55c of the plug 55. Since the outer peripheral surface 55a of the plug 55 is preferably dense as described below, it is preferable that the voltage drop promotion portion 55g does not have a portion exposed on the outer peripheral surface 55a.

[0039] From the viewpoint of increasing the voltage drop in the plug 55, the upper limit of the dielectric constant of the voltage drop promotion portion 55g is preferably 7 or less, more preferably 5 or less. Furthermore, from the viewpoint of preventing a decrease in the strength and toughness of the plug and the occurrence of cracks and chipping, the lower limit of the dielectric constant of the voltage drop promotion portion 55g is preferably 1 or more, more preferably 2 or more, and even more preferably 3 or more. Therefore, the dielectric constant of the voltage drop promotion portion 55g is preferably, for example, 1 to 7, more preferably 2 to 5, and even more preferably 3 to 5. The dielectric constant of the voltage drop promotion portion 55g can be adjusted by the density and porosity as well as the material constituting the voltage drop promotion portion 55g. For example, the dielectric constant can be reduced by increasing the porosity or decreasing the density of the voltage drop promotion portion 55g, whereas the dielectric constant can be increased by decreasing the porosity or increasing the density of the voltage drop promotion portion 55g.

[0040] On the other hand, from the viewpoint of suppressing dielectric breakdown between the electrode and the ceramic, the lower limit of the relative dielectric constant of the dense portion 55f is preferably greater than 7, and even more preferably equal to or greater than 8. Furthermore, from the viewpoint of dropping the voltage, the upper limit of the relative dielectric constant of the dense portion 55f is preferably equal to or less than 11. Therefore, the relative dielectric constant of the dense portion 55f is preferably, for example, greater than 7 and equal to or less than 11, and more preferably 8 to 11.

[0041] In this specification, the relative dielectric constants of the dense portion 55f and the voltage drop promotion portion 55g of the plug 55 are measured by an impedance analyzer (for example, an impedance analyzer 4291A manufactured by Keysight Technologies) under a normal temperature and humidity environment. measurement will be done.

[0042] From the viewpoint of increasing the voltage drop in the plug 55, the lower limit of the volume of the plug occupied by the voltage drop promotion portion 55g is preferably 10% or more. Furthermore, when the porosity is increased to decrease the density in order to achieve a low dielectric constant, if the density is reduced too much, the strength and toughness of the plug may decrease, making cracks and chipping more likely to occur. Therefore, the upper limit of the volume of the plug occupied by the voltage drop promotion portion 55g is preferably 50% or less, more preferably 30% or less, and even more preferably 20% or less. Therefore, the volume of the plug occupied by the voltage drop promotion portion 55g is preferably 10 to 50%, more preferably 10 to 30%, and even more preferably 10 to 20%.

[0043] The plug 55 preferably has a dense outer peripheral surface 55a. If the plug 55 has a dense outer peripheral surface 55a, when the plug 55 is directly fitted to the inner peripheral surface 50a of the plug placement hole 50, sufficient frictional force acts, thereby increasing the fixing strength of the plug 55. A dense outer peripheral surface 55a means that the porosity of the outer peripheral surface 55a is 5% or less. The porosity of the outer peripheral surface 55a is preferably 1% or less, and more preferably 0.5% or less. The porosity of the outer peripheral surface 55a is measured by the following method. The plug 55 is cut so that a cross section perpendicular to the outer peripheral surface 55a of the plug 55 is exposed. Next, a portion of the cross section extending from the outer peripheral surface 55a to a thickness of 100 μm is observed at a magnification of 3000 times and a depth of 2200 μm using a scanning electron microscope (SEM). 2 The area ratio of pores observed in the thickness portion is determined. Specifically, the SEM image is analyzed, and a threshold is determined using a discriminant analysis method (Otsu's binarization) based on the brightness distribution of the brightness data of pixels in the image. Then, based on the determined threshold, each pixel in the image is binarized into an object portion and a pore portion, and the area of ​​the object portion and the area of ​​the pore portion are calculated. Then, the ratio of the area of ​​the pore portion to the total area (the total area of ​​the object portion and the pore portion) is determined. Similar measurements are performed at five locations on the same plug 55, and the average of the five measurements is taken as the porosity of the outer peripheral surface 55a of the plug 55.

[0044] Furthermore, when the outer peripheral surface 55a of the plug 55 is directly fitted into the inner peripheral surface 50a of the plug mounting hole 50, it is preferable that the inner peripheral surface 50a of the plug mounting hole 50 is also dense in order to increase the fixing strength due to friction of the plug 55. A dense inner peripheral surface 50a means that the porosity of the inner peripheral surface 50a is 5% or less. Therefore, the porosity of the inner peripheral surface 50a is preferably 1% or less, and more preferably 0.5% or less. Since the inner peripheral surface 50a is a part of the dielectric substrate 20, in this specification the porosity value of the dielectric substrate 20 is regarded as the porosity of the inner peripheral surface 50a. The porosity of the dielectric substrate 20 is defined as the open porosity measured in accordance with JIS R1634:1998, and the average value of the open porosity of five samples taken without bias from the dielectric substrate 20 is taken as the measured value.

[0045] The plug 55 has a gas flow path 55d penetrating through its interior. The structure of the gas flow path 55d is not particularly limited as long as gas flowing in through an inlet 55d1 provided on the lower surface 55c of the plug 55 flows through the gas flow path 55d provided inside the plug 55 and can flow out through an outlet 55d2 provided on the upper surface 55b of the plug 55. For example, the gas flow path 55d may be formed by forming one or more gas flow paths penetrating in the vertical direction adjacent to the dense portion 55f that does not allow gas flow. In this case, the gas flowing in from the lower surface 55c of the plug 55 flows through the gas flow path 55d and flows out from the upper surface 55b of the plug 55. The gas flow path may be configured as a straight path, a curved path, or a combination of both. However, from the viewpoint of suppressing discharge, a shape in which the length of the flow path is longer than the length of the plug 55 in the vertical direction, such as a bent shape such as a spiral or zigzag shape, is preferred.

[0046] The gas flow path 55d may be hollow, but at least a portion of it may be porous as long as it allows gas flow. When at least a portion of the gas flow path 55d is porous, gas flowing in from the lower surface 55c of the plug 55 flows through the gas flow path 55d, which is formed by a large number of continuous pores, and then flows out from the upper surface 55b of the plug 55. Because the gas flow path is formed by three-dimensionally connected pores (e.g., a three-dimensional network) within the porous structure, the effective length of the gas flow path 55d is longer than when the gas flow path 55d is hollow, which reduces the likelihood of electrical discharge. It is also possible to form one or more additional gas flow paths within the porous gas flow path. Furthermore, when the gas flow path 55d is porous, the width of the gas flow path 55d may be expanded in a portion to maintain the voltage drop promotion function similar to that of the voltage drop promotion portion 55g.

[0047] Therefore, the gas flow passage 55d may be hollow or porous. Preferably, at least a portion of the gas flow passage 55d is porous. The gas flow passage 55d being hollow means that the porosity of the gas flow passage 55d is 100%. The gas flow passage 55d being porous means that the porosity of the gas flow passage 55d is greater than 5% and less than 100%. If the gas flow passage 55d is porous, a larger porosity of the gas flow passage 55d is preferable to reduce the airflow resistance. Therefore, the porosity of the gas flow passage 55d is preferably 10% or more, more preferably 40% or more. On the other hand, the porosity of the gas flow passage 55d is preferably 50% or less in order to increase the flow passage length of the plug 55 and ensure structural strength. Therefore, the porosity of the gas flow passage 55d is preferably, for example, 10% to 50%, more preferably 40% to 50%. The porosity of the gas flow passage 55d is measured by mercury intrusion porosimetry (JIS R1655:2003).

[0048] Examples of methods for manufacturing the plug 55 having such a dense portion, voltage drop acceleration portion, and gas flow path include a method of firing a green body formed using additive manufacturing technology such as a 3D printer, and a method of firing a green body mold-cast using a master model produced by the lost-wax casting method. Mold-cast molding is disclosed, for example, in Japanese Patent No. 7144603. Furthermore, when the voltage drop acceleration portion 55g is made of a different material, a method of dividing the plug, changing the material of the portion that will become the voltage drop acceleration portion 55g, and co-firing the resulting material may be used.

[0049] 4 again, it can be seen that increasing Cb is also effective in reducing Vb and suppressing discharge. This is because the relative dielectric constant ε r2 This can be achieved by raising the temperature of the bonding layer 40. Therefore, in one embodiment of the semiconductor manufacturing equipment member 10, a gas inlet space 55e is provided with a dielectric 55h that allows gas flow, in other words, is permeable. To enhance the discharge suppression effect, the dielectric 55h is preferably in contact with both the bonding layer 40 and the plug 55.

[0050] The dielectric constant of the dielectric 55h is preferably 1 or more, more preferably 3 or more, in order to improve the discharge suppression effect. On the other hand, it is preferable that the dielectric constant of the dielectric 55h is not excessively large, in order to reduce the voltage drop. Therefore, the dielectric constant of the dielectric 55h is preferably 11 or less, more preferably 7 or less. The dielectric constant of the dielectric 55h may be, for example, 1 or more and 11 or less, or 1 or more and 7 or less.

[0051] In this specification, the relative dielectric constant of the dielectric 55h is measured in an environment of normal temperature and humidity using an impedance analyzer (for example, 4291A manufactured by Keysight Technologies).

[0052] The porosity of the dielectric 55h is preferably small from the viewpoint of increasing the relative dielectric constant. Therefore, the porosity of the dielectric 55h is preferably 50% or less. On the other hand, the porosity of the dielectric 55h is preferably large in order to reduce the airflow resistance. Therefore, the porosity of the dielectric 55h is preferably 10% or more, and more preferably 40% or more. Therefore, the porosity of the dielectric 55h is preferably, for example, 10% or more and 50% or less, and more preferably 40% or more and 50% or less. The porosity of the dielectric 55h is measured by the following method. First, the dielectric 55h is cut so that a cross section passing through the central axis extending in the vertical direction of the dielectric 55h is exposed. Next, the portion of the cross section to be measured for porosity is measured by a scanning electron microscope (SEM) at a magnification of 3000 times and a resolution of 2200 μm. 2 The area ratio of the pores observed in that area is determined. Specifically, by performing image analysis on the SEM image, a threshold is determined using discriminant analysis (Otsu's binarization) from the brightness distribution of the brightness data of the pixels in the image. Then, based on the determined threshold, each pixel in the image is binarized into an object portion and a pore portion, and the area of ​​the object portion and the area of ​​the pore portion are calculated. Then, the ratio of the area of ​​the pore portion to the total area (the total area of ​​the object portion and the pore portion) is determined. Similar measurements are performed at five locations on the same dielectric 55h, and the average value of the five locations is taken as the porosity of the dielectric 55h.

[0053] The dielectric 55h can be made of, for example, ceramics. More specifically, it can be made of the same materials as those described in the description of the plug 55, such as aluminum oxide and / or aluminum nitride, but a repeated description will be omitted. The dielectric 55h can also be fibrous or porous. By using fibrous or porous ceramics, the effect of suppressing discharge can be enhanced while suppressing an increase in airflow resistance.

[0054] The porosity of the plug 55 and the dielectric 55h can be controlled, for example, by adjusting the content of the pore-forming material in the raw material composition before firing the ceramics that constitute them. For example, to densify the outer peripheral surface of the plug, the amount of pore-forming material near the outer peripheral surface may be partially reduced or not used. Also, to densify the inner peripheral surface of the plug placement hole, the amount of pore-forming material near the inner peripheral surface may be partially reduced or not used.

[0055] 2 , the gas supply path 60 for supplying gas to the gas flow path 55d of the plug 55 through the base plate 30 and the bonding layer 40 includes, for example, a through hole 42 that penetrates the bonding layer 40 in the vertical direction and a gas hole 34 that communicates with the through hole 42 and penetrates the base plate 30 from the upper surface 31 to the lower surface 33. In this embodiment, the base plate 30 may further include a large diameter portion 34a that is provided on the upper surface 31 of the base plate 30 at a position facing the through hole 42. By providing the through hole 42 and the large diameter portion 34a, when the plug 55 is placed in the plug placement hole 50, even if there is a manufacturing error in the plug placement hole 50 and / or the plug 55, a space that allows the plug 55 to enter is created, and therefore such manufacturing error can be absorbed.

[0056] There are no particular limitations on the configuration of the gas supply path 60. For example, as in a semiconductor manufacturing equipment member 10 according to another embodiment of the present invention shown in FIG. 5, the base plate 30 may be provided with one or more ring portions 64a whose passages extend concentrically with the base plate 30 in a plan view, one or more gas inlet portions 64b that supply gas introduced from the lower surface 33 of the base plate 30 to the ring portion 64a, and a distributor 64c that distributes the gas from the ring portion 64a to each plug 55. In this embodiment, the upper end of the distributor 64c communicates with the through-hole 42 of the bonding layer 40. 5 1, the same components as those in the embodiment shown in Fig. 1 are denoted by the same reference numerals. The number of gas inlet portions 64b may be less than the number of distributors 64c, for example, it may be one. In this way, the number of gas pipes connected to the base plate 30 can be less than the number of plugs 55. Other auxiliary passages not shown may be provided.

[0057] Lift pin holes may also be provided that penetrate the semiconductor manufacturing equipment member 10. The lift pin holes are holes for inserting lift pins that move the wafer W up and down relative to the upper surface 21 of the dielectric substrate 20. When the wafer W is supported by, for example, three lift pins, the lift pin holes are provided in three locations.

[0058] <2. How to use semiconductor manufacturing equipment parts> Next, an example of how to use the semiconductor manufacturing equipment member 10 configured as described above will be described. First, with the semiconductor manufacturing equipment member 10 installed in a chamber (not shown), a wafer W is placed on the upper surface 21 of the dielectric substrate 20. Then, the chamber is depressurized using a vacuum pump to adjust the chamber to a predetermined degree of vacuum, and a voltage is applied to the electrodes 22 of the dielectric substrate 20 to generate an electrostatic adsorption force, thereby adsorbing and fixing the wafer W to the wafer mounting surface (specifically, the upper surfaces of the seal bands 21a and the small protrusions 21b).

[0059] Next, the chamber is filled with a reactive gas atmosphere at a predetermined pressure (e.g., several tens to several hundreds of Pa). In this state, a high-frequency voltage such as an RF voltage is applied between an upper electrode (not shown) provided on the ceiling of the chamber and the base plate 30 of the semiconductor manufacturing equipment member 10 to generate plasma. The surface of the wafer W is processed by the generated plasma. A coolant circulates through the coolant flow path 32 of the base plate 30. A backside gas is introduced into the gas supply path 60 from a gas cylinder (not shown). A thermally conductive gas (e.g., He gas) can be used as the backside gas. The backside gas is supplied to the multiple plug placement holes 50 through the gas supply path 60 and is supplied and sealed in the space between the back surface of the wafer W and the reference surface 21c of the wafer mounting surface. The presence of this backside gas efficiently conducts heat between the wafer W and the dielectric substrate 20.

[0060] Furthermore, the provision of the plug 55 in the plug arrangement hole 50 can suppress discharge within the plug arrangement hole 50. Without the plug 55, electrons generated as a result of ionization of gas molecules by application of RF voltage accelerate and collide with other gas molecules, causing glow discharge and eventually arc discharge; however, with the plug 55, the electrons strike the plug 55 before colliding with other gas molecules, suppressing discharge.

[0061] <3. Manufacturing methods for semiconductor manufacturing equipment components> Next, a method for manufacturing the semiconductor manufacturing equipment member 10 will be exemplarily described with reference to Fig. 6. Fig. 6 is a manufacturing process diagram of the semiconductor manufacturing equipment member 10 according to one embodiment of the present invention. First, a dielectric substrate 20, a base plate 30, and a metal bonding material 90 are prepared (Fig. 6A). The dielectric substrate 20 incorporates an electrode 22 and is provided with a plug arrangement hole 50. The dielectric substrate 20 can be manufactured by hot-pressing and firing a ceramic compact. The ceramic compact may be manufactured by stacking a plurality of tape compacts, by a mold casting method, or by compressing ceramic powder. Next, the plug arrangement hole 50 is formed in the dielectric substrate 20. The plug arrangement hole 50 is formed so as to penetrate the dielectric substrate 20 in the vertical direction, avoiding the electrode 22. The base plate 30 has a coolant flow path 32 and a gas hole 34. The gas hole 34 has a large diameter portion 34a facing the upper surface 31. The base plate 30 having the coolant flow path 32 can be manufactured, for example, by bonding a plurality of MMC plate members, in which grooves and holes corresponding to the coolant flow paths 32 are formed by machining, using a method such as TCB (thermal compression bonding). The gas hole 34 can be formed by machining the base plate 30 after the coolant flow paths 32 have been formed. The metal bonding material 90 has a through hole 92 at a position facing the large diameter portion 34a of the gas hole 34. The through hole 92 can be formed by machining.

[0062] Next, a metal bonding material 90 is sandwiched between the lower surface 23 of the dielectric substrate 20 and the upper surface 31 of the base plate 30 to form a laminate. At this time, it is preferable to laminate the dielectric substrate 20 so that the plug placement hole 50, the through hole 92 of the metal bonding material 90, and the gas hole 34 of the base plate 30 are coaxial. The laminate is then pressed and bonded at a temperature below the solidus temperature of the metal bonding material 90 (e.g., a temperature 20°C below the solidus temperature but below the solidus temperature), and then returned to room temperature (TCB). As a result, the metal bonding material 90 and the through hole 92 become the bonding layer 40 and the through hole 42, respectively, resulting in a bonded body 94 in which the dielectric substrate 20 and the base plate 30 are bonded by the bonding layer 40 ( FIG. 6B ). The metal bonding material 90 preferably has a thickness of approximately 100 μm (e.g., 80 to 240 μm).

[0063] Next, a truncated cone-shaped plug 55 is prepared, having a dense portion 55f, a gas flow path 55d, a voltage drop promotion portion 55g, and a gas introduction space 55e (FIG. 6B). A dielectric 55h that allows gas flow can be placed in the gas introduction space 55e. The height of the plug 55 is the same as the depth of the plug arrangement hole 50, which is a truncated cone space (i.e., the height of the dielectric substrate 20). Next, the plug 55 is press-fitted into the plug arrangement hole 50 from the upper opening 50b toward the lower opening 50c of the dielectric substrate 20. Alternatively, the plug 55 may be attached by forming a male thread on the outer peripheral surface 55a of the plug 55, which has been formed in advance by firing or the like, and forming a female thread on the inner peripheral surface 50a of the plug arrangement hole 50. The plug 55 is then screwed into the plug arrangement hole 50, and the male thread of the plug 55 and the female thread of the plug arrangement hole 50 are threadedly engaged. Furthermore, a paste-like ceramic mixture that serves as a precursor of the plug 55 may be poured into the plug placement hole 50 of the dielectric substrate 20 and fired to form the plug 55. Thereafter, the semiconductor manufacturing equipment member 10 is completed by appropriately undergoing processes such as adjusting the overall shape (FIG. 6C). [Explanation of symbols]

[0064] 10: Semiconductor manufacturing equipment components 20: Dielectric substrate 21:Top surface 21a: Seal band 21b: small protrusion 21c: Reference plane 22: Electrode 23: Bottom surface 30: Base plate 31:Top surface 32: Coolant flow path 33: Bottom surface 34: Gas hole 34a: Large diameter section 40: Bonding layer 40a:Top surface 42:Through hole 50: Plug placement hole 50a: Inner surface 50b:Top opening 50c: Bottom opening 55: Plug 55a: Outer surface 55b:Top surface 55c: Bottom surface 55d: Gas flow path 55d1: Entrance 55d2 :Exit 55e: Gas introduction space 55f: Dense part 55g: Voltage drop promotion part 55h: Dielectric 60: Gas supply line 64a: Ring section 64b: Gas inlet 64c:Distribution section 90: Metal bonding material 92:Through hole 94 :zygote

Claims

1. a dielectric substrate having an upper surface for placing a wafer thereon and a lower surface opposite to the upper surface; a plug placement hole that penetrates the dielectric substrate in the vertical direction; a plug embedded in the plug placement hole and having an upper surface and a lower surface; a conductive base plate bonded to a lower surface of the dielectric substrate via a bonding layer; a gas supply path that passes through the base plate and the bonding layer and supplies gas to the plug; Equipped with the plug is made of a dielectric material, The plug is The dense part and a gas flow path having a lower dielectric constant than the dense portion and penetrating the plug for allowing the gas to flow; a voltage drop promotion portion having a lower dielectric constant than the dense portion and not forming a flow path for the gas to flow; Components for semiconductor manufacturing equipment.

2. 2. The semiconductor manufacturing equipment member according to claim 1, wherein the dense portion has a relative dielectric constant of greater than 7, and the voltage drop promoting portion has a relative dielectric constant of 7 or less.

3. 3. A semiconductor manufacturing device member according to claim 1, wherein the plug placement hole has a truncated cone space in which the area of ​​an upper opening is larger than the area of ​​a lower opening, and the plug has a truncated cone shape corresponding to the plug placement hole.

4. 3. The semiconductor manufacturing equipment member according to claim 1, wherein at least a portion of the gas flow path is porous.

5. 3. A semiconductor manufacturing equipment member according to claim 1, wherein the voltage drop promoting portion is porous.

6. a dielectric substrate having an upper surface for placing a wafer thereon and a lower surface opposite to the upper surface; a plug placement hole that penetrates the dielectric substrate in the vertical direction; a plug embedded in the plug placement hole and having an upper surface and a lower surface; a conductive base plate bonded to a lower surface of the dielectric substrate via a bonding layer; a gas supply path that passes through the base plate and the bonding layer and supplies gas to the plug; Equipped with the plug is made of a dielectric material, The plug is The dense part and a gas passage through the plug for the flow of the gas; a gas introduction space communicating with the gas supply path and the gas flow path is provided between a lower surface of the plug and the bonding layer; A dielectric that allows the gas to flow is disposed in the gas introduction space. Components for semiconductor manufacturing equipment.

7. 7. The semiconductor manufacturing equipment member according to claim 6, wherein the dielectric that allows the gas flow has a relative dielectric constant of 1 to 11.

8. 8. A semiconductor manufacturing equipment member according to claim 6, wherein the dense portion has a relative dielectric constant of greater than 7.

9. 8. The semiconductor manufacturing equipment member according to claim 6, wherein the vertical distance from the inlet of the gas flow path through the gas introduction space to the upper surface of the bonding layer is 500 [mu]m or less.

10. 8. The semiconductor manufacturing equipment member according to claim 6, wherein at least a part of the gas flow path is porous.

11. 8. A semiconductor manufacturing equipment member according to claim 6, wherein the gas flow path is porous.

12. 8. A semiconductor manufacturing device member according to claim 6, wherein the plug placement hole has a truncated cone space in which the area of ​​an upper opening is larger than the area of ​​a lower opening, and the plug has a truncated cone shape corresponding to the plug placement hole.

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