Low temperature thermal high quality dielectric film

Abstract

A technique for depositing a dense dielectric film for patterning applications is described. More specifically, a method for processing a substrate is provided. The method includes flowing a precursor-containing gas mixture into a processing space of a processing chamber having a substrate disposed on an electrostatic chuck. The substrate is maintained at a pressure between about 0.1 mTorr and about 10 Torr. A plasma is generated at the substrate level by applying a first RF bias to the electrostatic chuck to deposit a dielectric film on the substrate. The dielectric film has a refractive index ranging from about 1.5 to about 3. [Selected Figure] Figure 2

Description

[Technical Field]

[0001]

[0002] FIELD OF THE DISCLOSURE Embodiments of the present disclosure relate to the field of electronic device manufacturing, and in particular to integrated circuit (IC) manufacturing. More specifically, embodiments of the present disclosure provide methods for depositing dielectric films that can be used for patterning applications. [Background technology]

[0002]

[0003] Integrated circuits have evolved into complex devices that can contain millions of transistors, capacitors, and resistors on a single chip. Evolution in chip design continually requires faster circuits and greater circuit density. The demand for faster circuits with greater circuit density places corresponding demands on the materials used to fabricate such integrated circuits. In particular, as the dimensions of integrated circuit components shrink, it is necessary to use low-resistivity conductive materials as well as low-dielectric-constant insulating materials to obtain adequate electrical performance from such components.

[0003]

[0004] The demand for greater integrated circuit density also places demands on the process sequences used to manufacture integrated circuit components. For example, in a process sequence using conventional photolithography techniques, a layer of energy-sensitive resist is formed over a stack of material layers disposed on a substrate. The energy-sensitive resist layer is exposed to an image of a pattern to form a photoresist mask. The mask pattern is then transferred to one or more of the material layers of the stack using an etching process. The chemical etchant used in the etching process is selected to have a higher etch selectivity for the material layers of the stack than for the energy-sensitive resist mask. That is, the chemical etchant etches one or more layers of the material stack at a much faster rate than the energy-sensitive resist. The etch selectivity for one or more material layers of the stack over the resist prevents the energy-sensitive resist from being consumed before the pattern transfer is complete.

[0004]

[0005] As pattern dimensions shrink, the thickness of the energy-sensitive resist must be correspondingly scaled down to control pattern resolution. Many emerging applications in industry have very low thermal budgets below 400°C (e.g., cross-point memory flow). Therefore, there is a need to deposit high-quality dielectric films for patterning and other applications that meet this stringent thermal budget without sacrificing film quality. Summary of the Invention

[0005]

[0006] Apparatus and methods for manufacturing integrated circuits are described. In one or more embodiments, a method for forming a film on a substrate is described. In one embodiment, a film is formed on a substrate by flowing a precursor-containing gas mixture into a processing volume of a processing chamber having the substrate disposed on an electrostatic chuck. The substrate is maintained at a pressure ranging from about 0.1 mTorr to about 10 Torr and a temperature ranging from about -50°C to about 150°C. A plasma is generated at the substrate level by applying a first RF bias to the electrostatic chuck to deposit a dielectric film on the substrate having a refractive index ranging from about 1.5 to about 3.

[0006]

[0007] In one or more embodiments, a method of forming a film on a substrate is described. In one embodiment, a film is formed on a substrate by flowing a precursor-containing gas mixture into a process space of a process chamber having the substrate disposed on an electrostatic chuck, the precursor-containing gas mixture being selected from the group consisting of silane (SiH), triethoxysilane (SiH(OEt)), tetraethoxysilane (tetraethyl orthosilicate; Si(OEt) or TEOS), disilane (SiH), SiH(CH), dimethylsilane (SiH(CH), methylsilane (SiHCH), dichlorosilane (SiHCl), silicon tetrachloride (SiCl), silicon tetrafluoride (SiF), trichlorosilane (HSiCl), methylsilane (CHSiH), trimethylsilane (CH), 10Si), 1,1,3,3-tetramethyldisiloxane (TMDZ), 1,3,5-trisilapentane (TSP), (bis(tertiarybutylamino)silane (BTBAS), (bis(diethylamino)silane (BDEAS), tris(dimethylamino)silane (TDMAS), (Si[N(tBu)CH=CHN(tBu)](OEt)2 (Si-TBES), Si[N(tBu)CH=CHN(tBu)](H)NH2 (Si-TBAS), germane (GeH4), germanium tetrachloride The method includes depositing a dielectric film on the substrate, the dielectric film having a refractive index ranging from about 1.5 to about 3, and the substrate includes one or more precursors selected from germanium (GeCl4), germanium tetrafluoride (GeF4), t-butylgermane (GeH(CH3)3), NO, O, NH3, N2, H2, C2H2, or C3H6. The substrate is maintained at a pressure ranging from about 0.1 mTorr to about 10 Torr. A plasma is generated at the substrate level by applying a first RF bias and a second RF bias to the electrostatic chuck to deposit a dielectric film on the substrate, the dielectric film having a refractive index ranging from about 1.5 to about 3.

[0007]

[0008] In one or more embodiments, a method for forming a film on a substrate is described. In one embodiment, a film is formed on a substrate by flowing a precursor-containing gas mixture into a processing space of a processing chamber having a substrate disposed on an electrostatic chuck. The processing space is maintained at a pressure ranging from about 0.1 mTorr to about 10 Torr. A plasma is generated at the substrate level by applying a first RF bias and a second RF bias to the electrostatic chuck to deposit a dielectric film having a refractive index ranging from about 1.5 to about 3 on the substrate. A patterned photoresist layer is formed on the dielectric film. The dielectric film is etched with a pattern corresponding to the patterned photoresist layer. The pattern is etched into the substrate. Material is deposited in the etched portions of the dielectric film.

[0008]

[0009] In order that the above-mentioned features of the present disclosure may be understood in detail, a more particular description of the present disclosure, briefly summarized above, will be obtained by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the present disclosure may admit of other equally effective embodiments, and therefore the accompanying drawings merely illustrate typical embodiments of the present disclosure and should not be considered as limiting the scope of the present disclosure. The embodiments described herein are illustrated by way of example and not by way of limitation in the figures of the accompanying drawings, in which like reference numerals indicate like elements. [Brief explanation of the drawings]

[0009] [Figure 1A]

[0010] 1 illustrates a schematic cross-sectional view of a deposition system that can be used to practice embodiments described herein. [Figure 1B]

[0011] FIG. 1 shows a schematic cross-sectional view of another deposition system that can be used to practice embodiments described herein. [Figure 2]

[0012] 1A and 1B show schematic cross-sectional views of an electrostatic chuck that can be used in the apparatus of FIGS. 1A and 1B to implement embodiments described herein. [Figure 3]

[0013] 1 illustrates a flow diagram of a method for forming a dielectric film on a substrate, according to one or more embodiments. [Figure 4]

[0014] AB show one embodiment of a sequence for forming a dielectric film on a film stack formed on a substrate, according to one or more embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0010]

[0015] Before describing several example embodiments of the present disclosure, it is to be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description. The present disclosure is capable of other embodiments and of being practiced or carried out in various ways.

[0011]

[0016] Many of the details, dimensions, angles, and other features shown in the drawings are merely illustrative of particular embodiments. Thus, other embodiments may have other details, components, dimensions, angles, and features without departing from the spirit or scope of the present disclosure. Additionally, further embodiments of the present disclosure may be practiced without including some of the details described below.

[0012]

[0017] As used herein, "substrate," "substrate surface," and the like refer to any substrate or material surface formed on a substrate on which processing is performed. For example, substrate surfaces on which processing may be performed include, but are not limited to, materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, but are not limited to, semiconductor wafers. Substrates may be subjected to pretreatment processes to polish, etch, reduce, oxidize, hydroxylate (or generate or graft target chemical moieties to impart chemical functionality), anneal, and / or bake the substrate surface. In addition to processing directly on the surface of the substrate itself, in the present disclosure, any of the disclosed film processing steps may be performed on an underlying layer formed on the substrate, as disclosed in more detail below, and the term "substrate surface" is intended to include such underlying layers as the context indicates. Thus, for example, when a film / layer or partial film / layer is being deposited on a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface. What a given substrate surface comprises will depend on what material is being deposited as well as the particular chemistry used.

[0013]

[0018] As used herein and in the appended claims, the terms "reactive compound," "reactive gas," "reactive species," "precursor," "process gas," and the like are used interchangeably to mean a substance having species capable of reacting with a substrate surface or materials on a substrate surface in a surface reaction (e.g., chemisorption, oxidation, reduction). For example, a first "reactive gas" may simply adsorb onto the surface of the substrate and be available for further chemical reaction with a second reactive gas.

[0014]

[0019] As used herein and in the appended claims, the terms "precursor," "reactant," "reactive gas," and the like are used interchangeably to refer to any gaseous species capable of reacting with the substrate surface.

[0015]

[0020] As used herein, "chemical vapor deposition" refers to a process in which a substrate surface is exposed to precursors and / or co-reagents simultaneously or substantially simultaneously. As used herein, "substantially simultaneously" refers to either co-flow or where there is overlap for the majority of the precursor exposure.

[0016]

[0021] Plasma-enhanced chemical vapor deposition (PECVD) is widely used to deposit films due to its cost-effectiveness and versatility in film properties. In a PECVD process, a hydrocarbon source, such as a gaseous or liquid hydrocarbon vapor entrained in a carrier gas, is introduced into a PECVD chamber. A plasma-initiating gas, typically helium, is also introduced into the chamber. A plasma is then initiated in the chamber, generating excited CH radicals. The excited CH radicals chemically bond to the surface of a substrate placed in the chamber, forming a desired amorphous carbon film thereon. The embodiments described herein with respect to PECVD processes can be implemented using any suitable thin film deposition system. Any apparatus descriptions provided herein are exemplary and should not be construed as limiting or limiting the scope of the embodiments described herein.

[0017]

[0022] Many applications in the semiconductor industry have very low thermal budgets, below 400°C, and in some situations even below 300°C. Typically, PECVD processes suffer significant film quality at low temperatures. Advantageously, embodiments described herein provide methods for depositing high-quality dielectric films for patterning and other applications that meet this stringent thermal budget without sacrificing film quality.

[0018]

[0023] Embodiments described herein include improved methods for producing dielectric films with high density (e.g., greater than 1.8 g / cc), high refractive index (e.g., greater than 1.5), and low stress (e.g., below -500 MPa). In one or more embodiments, the density and stress depend on the particular film being produced, but films of one or more embodiments have similar or improved density and stress when compared to films produced at much higher temperatures. Dielectric films produced according to embodiments described herein are essentially amorphous and have much higher densities (e.g., greater than 1.8 g / cc) and higher etch selectivities, along with lower stress (below -500 MPa) than current patterned films. Generally, the deposition processes described herein are also fully compatible with current integration schemes for hardmask applications.

[0019]

[0024] In some embodiments, the dielectric films described herein may be formed from a variety of silane (SiH), triethoxysilane (SiH(OEt)), tetraethoxysilane (tetraethyl orthosilicate; Si(OEt) or TEOS), disilane (SiH), SiH(CH), dimethylsilane (SiH(CH), methylsilane (SiHCH), dichlorosilane (SiHCl), silicon tetrachloride (SiCl), silicon tetrafluoride (SiF), trichlorosilane (HSiCl), methylsilane (CHSiH), trimethylsilane (CH), 10Si), 1,1,3,3-tetramethyldisiloxane (TMDZ), 1,3,5-trisilapentane (TSP), (bis(tertiarybutylamino)silane (BTBAS), (bis(diethylamino)silane (BDEAS), tris(dimethylamino)silane (TDMAS), (Si[N(tBu)CH=CHN(tBu)](OEt)2(Si-TBES), Si[N(tBu)CH=CHN(tB u)](H)NH2(Si-TBAS), germane (GeH4), germanium tetrachloride (GeCl4), germanium tetrafluoride (GeF4), t-butylgermane (GeH(CH3)3), N2O, O2, NH3, N2, H2, C2H2, or C3H6.

[0020]

[0025] The deposition process may be performed at temperatures of about -50°C, about -45°C, about -40°C, about -35°C, about -30°C, about -25°C, about -20°C, about -15°C, about -10°C, about -5°C, about 0°C, about 5°C, about 10°C, about 15°C, about 20°C, about 25°C, about 30°C, about 35°C, about 40°C, about 45°C, about 50°C, about 55°C, about 60°C, about It may be carried out at a temperature ranging from about -50°C to about 150°C, including 65°C, about 70°C, about 75°C, about 80°C, about 85°C, about 90°C, about 95°C, about 100°C, about 105°C, about 110°C, about 115°C, about 120°C, about 125°C, about 130°C, about 135°C, about 140°C, about 145°C, and about 150°C.

[0021]

[0026] The deposition process may be carried out in a process volume at a pressure ranging from about 0.1 mTorr to 10 Torr, including pressures of about 0.1 mTorr, about 1 mTorr, about 10 mTorr, about 100 mTorr, about 500 mTorr, about 1 Torr, about 2 Torr, about 3 Torr, about 4 Torr, about 5 Torr, about 6 Torr, about 7 Torr, about 8 Torr, about 9 Torr, and about 10 Torr.

[0022]

[0027] The precursor-containing gas mixture is composed of helium (He), argon (Ar), xenon (Xe), Krypton (Kr),The method may further include one or more diluent gases selected from nitrogen (N2), or hydrogen (H2). The diluent gas in some embodiments includes a compound that is inert to the reactants and substrate materials.

[0023]

[0028] The precursor-containing gas mixture may further include an etchant gas, such as Cl2, CF4, or NF3, to improve film quality.

[0024]

[0029] The plasma (e.g., capacitively coupled plasma) can be formed from either top and bottom electrodes or side electrodes. The electrodes can be formed from a single powered electrode, dual powered electrodes, or more electrodes with multiple frequencies, such as, but not limited to, 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, and 100 MHz, which are used alternatively or simultaneously in a CVD system with any or all of the reactive gases listed herein to deposit thin dielectric films. In some embodiments, the plasma is a capacitively coupled plasma (CCP). In some embodiments, the plasma is an inductively coupled plasma (ICP). In some embodiments, the plasma is a microwave plasma.

[0025]

[0030] In some embodiments, the dielectric film is deposited in the chamber with the substrate pedestal maintained at 10° C., the pressure maintained at 2 mTorr, and a plasma generated at the wafer level (i.e., direct plasma) by applying a bias of 2500 watts (13.56 MHz) to the electrostatic chuck. In some embodiments, an additional RF power of 1000 watts at 2 MHz is also supplied to the electrostatic chuck to generate a dual-bias plasma at the wafer level.

[0026]

[0031] 1A shows a schematic diagram of a substrate processing system 132 that can be used to perform dielectric film deposition according to embodiments described herein. The substrate processing system 132 includes a processing chamber 100 coupled to a gas panel 130 and a controller 110. The processing chamber 100 generally includes a top wall 124, a sidewall 101, and a bottom wall 122 that define a processing space 126. A substrate support assembly 146 is disposed within the processing space 126 of the processing chamber 100. The substrate support assembly 146 generally includes an electrostatic chuck 150 supported by a stem 160. The electrostatic chuck 150 can typically be fabricated from aluminum, ceramic, and other suitable materials. The electrostatic chuck 150 can be vertically moved within the processing chamber 100 using a displacement mechanism (not shown).

[0027]

[0032] A vacuum pump 102 is connected to a port formed in the bottom of the processing chamber 100. The vacuum pump 102 is used to maintain a desired gas pressure within the processing chamber 100. The vacuum pump 102 also evacuates post-process gases and by-products from the processing chamber 100.

[0028]

[0033] The substrate processing system 132 may further include additional devices for controlling the chamber pressure, such as valves (e.g., throttle valves and isolation valves) disposed between the processing chamber 100 and the vacuum pump 102 to control the chamber pressure.

[0029]

[0034] A gas distribution assembly 120 having a plurality of apertures 128 is disposed at the top of the processing chamber 100 above the electrostatic chuck 150. The apertures 128 of the gas distribution assembly 120 are utilized to introduce process gases into the processing chamber 100. The apertures 128 may have various sizes, numbers, distributions, shapes, designs, and diameters to facilitate the flow of various process gases for various process requirements. The gas distribution assembly 120 is coupled to a gas panel 130 that enables various gases to be supplied to the processing space 126 during processing. A plasma is formed from the process gas mixture exiting the gas distribution assembly 120, facilitating the thermal decomposition of the process gases and depositing material on the surface 191 of the substrate 190.

[0030]

[0035] The gas distribution assembly 120 and the electrostatic chuck 150 may form a pair of spaced-apart electrodes within the process space 126. One or more RF power sources 140 provide a bias potential to the gas distribution assembly 120 through an optional matching network 138 to facilitate generation of a plasma between the gas distribution assembly 120 and the electrostatic chuck 150. Alternatively, the RF power sources 140 and the optional matching network 138 may be coupled to the gas distribution assembly 120, the electrostatic chuck 150, or both the gas distribution assembly 120 and the electrostatic chuck 150, or may be coupled to an antenna (not shown) located outside the process chamber 100. In some embodiments, the RF power sources 140 may generate power at a frequency of 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz. In one embodiment, RF power source 140 may provide between about 100 Watts and about 3,000 Watts at frequencies from about 50 kHz to about 13.56 MHz, and in another embodiment, RF power source 140 may provide between about 500 Watts and about 1,800 Watts at frequencies from about 50 kHz to about 13.56 MHz.

[0031]

[0036] The controller 110 includes a central processing unit (CPU) 112, memory 116, and support circuits 114 utilized to control process sequences and regulate gas flow from the gas panel 130. The central processing unit (CPU) 112 may be any form of general-purpose computer processor that may be used in an industrial environment. Software routines may be stored in the memory 116, such as random access memory, read-only memory, floppy or hard disk drive, or other form of digital storage. The support circuits 114 are typically coupled to the central processing unit (CPU) 112 and may include cache, clock circuits, input / output systems, power supplies, etc. Bidirectional communication between the controller 110 and the various components of the substrate processing system 132 is handled through a number of signal cables collectively referred to as a signal bus 118, some of which are shown in FIG. 1A.

[0032]

[0037] 1B shows a schematic cross-sectional view of another substrate processing system 180 that can be used to practice embodiments described herein. The substrate processing system 180 is similar to the substrate processing system 132 of FIG. 1A, except that the substrate processing system 180 is configured to flow process gases from a gas panel 130 across a surface 191 of a substrate 190 through a sidewall 101. In addition, the gas distribution assembly 120 shown in FIG. 1A is replaced with an electrode 182. The electrode 182 can be configured for secondary electron generation. In one embodiment, the electrode 182 is a silicon-containing electrode.

[0033]

[0038] FIG. 2 shows a schematic cross-sectional view of a substrate support assembly 146 used in the processing systems of FIGS. 1A and 1B, which can be used to implement embodiments described herein. Referring to FIG. 2, an electrostatic chuck 150 may include an embedded heater element 170 suitable for controlling the temperature of a substrate 190 supported on an upper surface 192 of the electrostatic chuck 150. The electrostatic chuck 150 may be resistively heated by applying current from a heater power supply 106 to the heater element 170. The heater power supply 106 may be coupled through an RF filter 216. The RF filter 216 may be used to protect the heater power supply 106 from RF energy. The heater element 170 may be made of nickel-chromium wire enclosed in a nickel-iron-chromium alloy (e.g., INCOLOY®) sheathed tube. The current supplied by the heater power supply 106 is adjusted by a controller 110 to control the heat generated by the heater element 170 and maintain the substrate 190 and electrostatic chuck 150 at a substantially constant temperature during film deposition. The current supplied can be adjusted to selectively control the temperature of the electrostatic chuck 150 between about -50°C and about 150°C.

[0034]

[0039] 1A and 1B, a temperature sensor 172, such as a thermocouple, may be embedded within the electrostatic chuck 150 to monitor the temperature of the electrostatic chuck 150 in a conventional manner. The measured temperature is used by the controller 110 to control the power supplied to the heater element 170 to maintain the substrate at a desired temperature.

[0035]

[0040] 2 , the electrostatic chuck 150 includes a chuck electrode 210, which may be a mesh of conductive material. The chuck electrode 210 may be embedded within the electrostatic chuck 150. The chuck electrode 210 is coupled to a chuck power supply 212 that, when energized, electrostatically clamps the substrate 190 to the upper surface 192 of the electrostatic chuck 150.

[0036]

[0041] The chuck electrode 210 may be configured as a monopolar or bipolar electrode, or may have another suitable configuration. The chuck electrode 210 is coupled through an RF filter 214 to a chuck power supply 212, which provides DC power for electrostatically clamping the substrate 190 to the upper surface 192 of the electrostatic chuck 150. The RF filter 214 prevents the RF power utilized to form a plasma within the processing chamber 100 from damaging electrical equipment or posing an electrical hazard outside the chamber. The electrostatic chuck 150 may be fabricated from a ceramic material such as AlN or Al2O3. Alternatively, the electrostatic chuck 150 may be fabricated from a polymer, such as polyimide, polyetheretherketone (PEEK), or polyaryletherketone (PAEK).

[0037]

[0042] The power application system 220 is coupled to the substrate support assembly 146. The power application system 220 may include a heater power supply 106, a chuck power supply 212, a first radio frequency (RF) power supply 230, and a second RF power supply 240. An embodiment of the power application system 220 may further include a controller 110 and a sensor device 250 in communication with the controller 110 and both the first radio frequency (RF) power supply 230 and the second RF power supply 240.

[0038]

[0043] The controller 110 may also be utilized to control plasma from the processing gas by application of RF power from the first radio frequency (RF) power source 230 and the second radio frequency power source 240 to deposit a layer of material on the substrate 190.

[0039]

[0044] As described above, the electrostatic chuck 150 includes a chucking electrode 210 that can function in one aspect to chucking the substrate 190 while also functioning as a first RF electrode. The electrostatic chuck 150 may also include a second RF electrode 260, which, in conjunction with the chucking electrode 210, can apply RF power to regulate the plasma. A first radio frequency (RF) power source 230 can be coupled to the second RF electrode 260, while a second RF power source 240 can be coupled to the chuck electrode 210. A first matching network and a second matching network can be supplied to the first radio frequency (RF) power source 230 and the second RF power source 240, respectively. The second RF electrode 260 can be a solid metal plate of conductive material as shown. Alternatively, the second RF electrode 260 can be a mesh of conductive material.

[0040]

[0045] The first radio frequency (RF) power source 230 and the second RF power source 240 may generate power at the same frequency or different frequencies. In some embodiments, one or both of the first radio frequency (RF) power source 230 and the second RF power source 240 may independently generate power at a frequency ranging from 350 KHz to approximately 100 MHz, including, but not limited to, 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz. In some embodiments, the first radio frequency (RF) power source 230 may generate power at a frequency of 13.56 MHz and the second RF power source 240 may generate power at a frequency of 2 MHz, or vice versa. The RF power from one or both of the first radio frequency (RF) power source 230 and the second RF power source 240 may be varied to tailor the plasma. For example, sensor device 250 may be used to monitor RF energy from one or both of first radio frequency (RF) power source 230 and second RF power source 240. Data from sensor device 250 may be communicated to controller 110, which may be utilized to vary the power applied by first radio frequency (RF) power source 230 and second RF power source 240.

[0041]

[0046] Generally, the following exemplary deposition process parameters may be used to form an as-deposited dielectric film: The wafer temperature may range from about -50°C to about 150°C, including but not limited to, from about 10°C to about 100°C, or from about 10°C to about 50°C. The chamber pressure may range from about 0.1 mTorr to about 10 Torr, including but not limited to, from about 2 mTorr to about 50 mTorr, or from about 2 mTorr to about 10 mTorr. The flow rate of the precursor-containing gas mixture may range from about 10 sccm to about 1,000 sccm, including but not limited to, from about 100 sccm to about 200 sccm, or from about 150 sccm to about 200 sccm. The flow rate of the dilution gas can range from about 50 sccm to about 50,000 sccm, including, but not limited to, from about 50 sccm to about 1000 sccm, or from about 50 sccm to about 100 sccm, individually.

[0042]

[0047] The dielectric film may be deposited to a thickness in the range of about 5 Å to about 60,000 Å, including in the range of about 300 Å to about 10,000 Å, in the range of about 2000 Å to about 3000 Å, or in the range of about 5 Å to about 200 Å.

[0043]

[0048] The dielectric films, as deposited, may have a refractive index or n-value (n@633 nm) greater than about 1.5, such as from about 1.6 to about 3.0 (including about 1.5, about 1.6, about 1.7, about 1.8, about 1.9, about 2.0, about 2.1, about 2.2, about 2.3, about 2.4, about 2.5, about 2.6, about 2.7, about 2.8, about 2.9, or about 3.0). In one or more embodiments, the films are silicon oxide and have a refractive index of about 1.5. In a further embodiment, the films are silicon nitride and have a refractive index of about 1.9 to about 2.0. The method of one or more embodiments advantageously enables the production of high quality films and low temperatures with properties similar to or improved upon films prepared by high temperature CVD or high temperature PECVD. The as-deposited dielectric film may have an extinction coefficient or k value (k(at 633 nm)) greater than 0.1, such as from about 0.2 to about 0.3 (including about 0.2, about 0.21, about 0.22, about 0.23, about 0.24, about 0.25, about 0.26, about 0.27, about 0.28, about 0.29, about 0.30). The dielectric film as deposited can have a stress (MPa) of less than about -300 MPa, for example, from about -600 MPa to about -300 MPa, from about -600 MPa to about -500 MPa (including about -600 MPa, about -575 MPa, about -550 MPa, about -525 MPa, about -500 MPa, about -475 MPa, about -450 MPa, about -425 MPa, about -400 MPa, about -375 MPa, about -350 MPa, about -325 MPa, or about -300 MPa).

[0044]

[0049] In one or more embodiments, the density of the dielectric film is greater than 1.8 g / cc, including greater than 1.9 g / cc, and including greater than 2.0 g / cc. In one or more embodiments, the density of the dielectric film is about 2.1 g / cc. In one or more embodiments, the density of the dielectric film ranges from about 1.8 g / cc to greater than about 2.2 g / cc. In one or more embodiments, the density of the dielectric film is greater than about 2.2 g / cc.

[0045]

[0050] Another advantage of the method of one or more embodiments is that lower temperature processes can be used to produce dielectric films with desired density and transparency. Typically, higher substrate temperatures during deposition are a process parameter used to promote the formation of denser films. Surprisingly, when using the precursors and methods of one or more embodiments together, the substrate temperature can be lowered during deposition to, for example, below about −40° C., below about 0° C., below about 10° C., below about room temperature, or about 22° C. to about 26° C., while still producing films with desired densities, i.e., dielectric films with densities greater than about 1.8 g / cc (including greater than about 1.9 g / cc and greater than about 2.0 g / cc). Thus, the method of one or more embodiments can produce relatively dense films, particularly dense carbon films, with absorption coefficients as low as about 0.04.

[0046]

[0051] 3 shows a flow diagram of a method 300 for forming a dielectric film on a film stack disposed on a substrate, according to one embodiment of the present disclosure. The dielectric film formed on the film stack can be used, for example, as an insulating layer within the film stack.

[0047]

[0052] 4A-4B are schematic cross-sectional views illustrating a sequence for forming a dielectric film on a film stack disposed on a substrate, according to method 300. While method 300 is described below with reference to a dielectric layer that may be formed on a film stack utilized to fabricate a stepped structure in a film stack for a three-dimensional semiconductor device, method 300 may also be advantageously used in other device manufacturing applications. Additionally, it should also be understood that the operations illustrated in FIG. 3 may be performed simultaneously and / or in a different order than that illustrated in FIG. 3.

[0048]

[0053] Method 300 begins at step 310 by placing a substrate, such as substrate 400 shown in FIG. 4A, into a processing chamber, such as processing chamber 100 shown in FIG. 1A or 1B. Substrate 400 may be substrate 190 shown in FIGS. 1A, 1B, and 2. Substrate 400 may be disposed on, for example, an electrostatic chuck, such as top surface 192 of electrostatic chuck 150. Substrate 400 may be a silicon-based material or any suitable insulating or conductive material, as desired, and has a film stack 404 disposed thereon that may be utilized to form structures 402, such as stair-like structures, within film stack 404.

[0049]

[0054] As shown in the exemplary embodiment illustrated in FIG. 4A, the substrate 400 can have a substantially planar surface, a non-planar surface, or a substantially planar surface with structures formed thereon. A film stack 404 is formed on the substrate 400. In one embodiment, the film stack 404 can be utilized to form gate structures, contact structures, or interconnect structures in a front-end or back-end process. The method 300 can be performed on the film stack 404 to form stepped structures used in memory structures such as NAND structures. In one embodiment, the substrate 400 can be a material such as crystalline silicon (e.g., Si(100) or Si(111)), silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon substrates and patterned or unpatterned silicon-on-insulator (SOI) substrates, carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, or sapphire. Substrate 400 can have a variety of dimensions, including 200 mm, 300 mm, and 450 mm, or other diameter substrates, as well as rectangular or square panels. Unless otherwise noted, the embodiments and examples described herein are performed on substrates including 200 mm diameter, 300 mm diameter, or 450 mm diameter substrates. In embodiments in which an SOI structure is utilized for substrate 400, substrate 400 can include a buried dielectric layer disposed on a silicon crystalline substrate. In the embodiments shown herein, substrate 400 can be a crystalline silicon substrate.

[0050]

[0055] In one embodiment, a film stack 404 disposed on a substrate 400 can have multiple vertically stacked layers. The film stack 404 can include pairs including a first layer (designated as 408a1, 408a2, 408a3, . . . , 408an) and a second layer (designated as 408b1, 408b2, 408b3, . . . , 408bn) repeatedly formed within the film stack 404. The pairs include alternating first layers (designated as 408a1, 408a2, 408a3, . . . , 408an) and second layers (designated as 408b1, 408b2, 408b3, . . . , 408bn) repeatedly formed until a predetermined number of pairs of first and second layers is achieved.

[0051]

[0056] The film stack 404 can be part of a semiconductor chip, such as a three-dimensional memory chip. Note that although three repeating layers of first layers (shown as 408a1, 408a2, 408a3, . . . , 408an) and second layers (shown as 408b1, 408b2, 408b3, . . . , 408bn) are shown in Figures 4A-4B, any desired number of repeating pairs of first and second layers can be utilized as needed.

[0052]

[0057] In one embodiment, the film stack 404 may be utilized to form multiple gate structures for a three-dimensional memory chip. The first layers 408a1, 408a2, 408a3,..., 408an formed in the film stack 404 may be first dielectric layers according to one or more embodiments, and the second layers 408b1, 408b2, 408b3,..., 408bn may be second dielectric layers according to one or more embodiments. Suitable dielectric films according to one or more embodiments may be utilized to form the first layers 408a1, 408a2, 408a3, 408an and / or the second layers 408b1, 408b2, 408b3, 408bn, including, but not limited to, one or more of silicon, silicon nitride, silicon carbide, silicon oxide, silicon oxycarbide, silicon oxycarbonitride, silicon oxynitride, titanium nitride, or composites of oxide and nitride, at least one or more oxide layers sandwiching nitride layers, and combinations thereof, among others.

[0053]

[0058] In some embodiments, the dielectric layer may be a high-k material having a dielectric constant greater than 4. Suitable examples of high-k materials include, but are not limited to, hafnium dioxide (HfO), zirconium dioxide (ZrO), hafnium silicon oxide (HfSiO), hafnium aluminum oxide (HfAlO), zirconium silicon oxide (ZrSiO), tantalum dioxide (TaO), aluminum oxide, aluminum-doped hafnium dioxide, bismuth strontium titanium (BST), and platinum zirconium titanium (PZT), among others.

[0054]

[0059] In one particular example, the first layers 408a1, 408a2, 408a3, ..., 408an are silicon oxide layers, and the second layers 408b1, 408b2, 408b3, ..., 408bn are silicon nitride layers or polysilicon layers disposed on the first layers 408a1, 408a2, 408a3, ..., 408an. In one embodiment, the thickness of the first layers 408a1, 408a2, 408a3, ..., 408an may be controlled to between about 50 Å and about 1000 Å, such as about 500 Å, and the thickness of each second layer 408b1, 408b2, 408b3, ..., 408bn may be controlled to between about 50 Å and about 1000 Å, such as about 500 Å. The film stack 404 may have a total thickness between about 100 Å and about 2000 Å. In one embodiment, the total thickness of the film stack 404 is from about 3 microns to about 10 microns, and will vary as technology advances.

[0055]

[0060] The dielectric film of one or more embodiments may be formed on any surface or portion of the substrate 400 with or without the film stack 404 present on the substrate 400 .

[0056]

[0061] In step 320, a chucking voltage is applied to the electrostatic chuck to clamp the substrate 400 to the electrostatic chuck. In some embodiments, the substrate 400 is disposed on the upper surface 192 of the electrostatic chuck 150, which supports and clamps the substrate 400 during processing. The electrostatic chuck 150 closely planarizes the substrate 400 against the upper surface 192 to prevent backside deposition. An electrical bias is supplied to the substrate 400 via the chuck electrode 210. The chuck electrode 210 may be in electronic communication with a chuck power supply 212, which provides the bias voltage to the chuck electrode 210. In one embodiment, the chucking voltage is between about 10 volts and about 3000 volts. In one embodiment, the chucking voltage is between about 100 volts and about 2000 volts. In one embodiment, the chucking voltage is between about 200 volts and about 1000 volts.

[0057]

[0062] Several process parameters may be adjusted during step 320. In one embodiment suitable for processing a 300 mm substrate, the process pressure in the process space may be maintained from about 0.1 mTorr to about 10 Torr, including from about 2 mTorr to about 50 mTorr, or from about 5 mTorr to about 20 mTorr. In one embodiment suitable for processing a 300 mm substrate, the process temperature and / or substrate temperature may be maintained from about −50° C. to about 250° C., including from about 0° C. to about 50° C., or from about 10° C. to about 20° C.

[0058]

[0063] In one embodiment, a constant chucking voltage is applied to the substrate 400. In one embodiment, the chucking voltage may be pulsed to the electrostatic chuck 150. In some embodiments, a backside gas may be applied to the substrate 400 while the chucking voltage is being applied to control the temperature of the substrate. The backside gas may include, but is not limited to, helium (He), argon (Ar), etc.

[0059]

[0064] In step 330, a plasma is generated at the substrate level by applying a first RF bias to the electrostatic chuck. The plasma generated at the substrate level may be generated in a plasma region between the substrate and the electrostatic chuck. The first RF bias may be from about 10 watts to about 3000 watts at a frequency ranging from about 350 KHz to about 100 MHz, including, but not limited to, 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz. In one embodiment, the first RF bias is supplied at a frequency of about 13.56 MHz and with a power between about 2500 Watts and about 3000 Watts. In one embodiment, the first RF bias is supplied to the electrostatic chuck 150 via the second RF electrode 260. The second RF electrode 260 may be in electronic communication with a first radio frequency (RF) power source 230, which supplies a bias voltage to the second RF electrode 260. In one embodiment, the bias power is between about 10 Watts and about 3000 Watts. In one embodiment, the bias power is between about 2000 Watts and about 3000 Watts. In one embodiment, the bias power is between about 2500 Watts and about 3000 Watts. The first radio frequency (RF) power source 230 may generate power at a frequency ranging from about 350 KHz to about 100 MHz, including, but not limited to, 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz.

[0060]

[0065] In some embodiments, step 330 further includes applying a second RF bias to the electrostatic chuck. The second RF bias can be from about 10 watts to about 3000 watts at a frequency ranging from about 350 KHz to about 100 MHz, including, but not limited to, 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz. In one embodiment, the second RF bias is supplied at a frequency of about 2 MHz and with a power between about 800 Watts and about 1200 Watts. In one embodiment, the second RF bias is supplied to the substrate 400 via the chuck electrode 210. The chuck electrode 210 can be in electronic communication with a second RF power source 240 that supplies a bias voltage to the chuck electrode 210. In one embodiment, the bias power is between about 10 Watts and about 3000 Watts. In one embodiment, the bias power is between about 500 Watts and about 1500 Watts. In one embodiment, the bias power is between about 800 Watts and about 1200 Watts. The second RF power source 240 may generate power at a frequency ranging from about 350 KHz to about 100 MHz, including, but not limited to, 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz. In one embodiment, the chuck voltage supplied in step 320 is maintained during step 330.

[0061]

[0066] In some embodiments, during step 330, a first RF bias may be supplied to the substrate 400 via the chuck electrode 210 and a second RF bias may be supplied to the substrate 400 via the second RF electrode 260. In one embodiment, the first RF bias is about 2500 Watts (13.56 MHz) and the second RF bias is about 1000 Watts (2 MHz).

[0062]

[0067] During step 340, a precursor-containing gas mixture flows into the processing space 126 to form a dielectric film on the film stack. The precursor-containing gas mixture can be flowed into the processing space 126 either from the gas panel 130, through the gas distribution assembly 120, or through the sidewall 101. The precursor-containing gas mixture can include one or more precursors as described herein. The precursor-containing gas mixture can further include an inert gas, a diluent gas, a nitrogen-containing gas, an etchant gas, or a combination thereof. The precursor can be a liquid or a gas, but a preferred precursor would be a vapor at room temperature to simplify the hardware required to meter, control, and deliver the material to the chamber. In some embodiments, the chuck voltage supplied during step 320 is maintained during step 340. In some embodiments, the process conditions established during step 320 and the plasma formed during step 330 are maintained during step 340.

[0063]

[0068] In some embodiments, the precursor-containing gas mixture further comprises one or more diluent gases, such as helium (He), argon (Ar), xenon (Xe), among others. Krypton (Kr), A suitable diluent gas, such as hydrogen (H), nitrogen (N), ammonia (NH), or a combination thereof, can be added to the gas mixture if desired. Argon (Ar), helium (He), and nitrogen (N) are used to control the density and deposition rate of the dielectric film. In some cases, the addition of N and / or NH can be used to control the hydrogen ratio of the dielectric film, as discussed below. Alternatively, no diluent gas may be used during deposition.

[0064]

[0069] In some embodiments, the precursor-containing gas mixture further comprises one or more nitrogen-containing gases. Suitable nitrogen-containing compounds include, for example, pyridine, aliphatic amines, amines, nitriles, ammonia, and similar compounds.

[0065]

[0070] In some embodiments, the precursor-containing gas mixture further includes an inert gas. In some embodiments, an inert gas, such as argon (Ar) and / or helium (He), can be supplied into the process space 126 along with the precursor-containing gas mixture. Other inert gases, such as nitrogen (N) and nitric oxide (NO), can also be used to control the density and deposition rate of the dielectric film. In addition, various other process gases can be added to the precursor-containing gas mixture to modify the properties of the dielectric film material. In one embodiment, the other process gas can be a reactive gas, such as hydrogen (H), ammonia (NH), a mixture of hydrogen (H) and nitrogen (N), or a combination thereof. The addition of H and / or NH can be used to control the hydrogen ratio of the deposited dielectric film. The hydrogen ratio present in the dielectric film can provide control of layer properties, such as reflectivity.

[0066]

[0071] In some embodiments, the precursor-containing gas mixture further comprises an etchant gas. Suitable etchant gases include chlorine (Cl), carbon tetrafluoride (CF), nitrogen trifluoride (NF), or combinations thereof.

[0067]

[0072] In some embodiments, the dielectric film 412 is exposed to hydrogen radicals after it is formed on the substrate during step 340. In some embodiments, the dielectric film 412 is exposed to hydrogen radicals during the deposition process of step 340. In some embodiments, the hydrogen radicals are formed in an RPS and delivered to the process space.

[0068]

[0073] In step 350, after the dielectric film 412 is formed on the substrate, the substrate is de-chucked. During step 350, the chucking voltage is turned off. The reactive gases are stopped and, optionally, purged from the processing chamber. In one embodiment, during step 350, the RF power is reduced (e.g., to 200 W). Optionally, the controller 110 monitors impedance changes to determine whether the electrostatic charge is dissipated to ground through the RF path. Once the substrate is de-chucked from the electrostatic chuck, remaining gas is purged from the processing chamber. The processing chamber is pumped down, and the substrate is moved up on lift pins and transferred out of the chamber.

[0069]

[0074] After the dielectric film 412 is formed on the substrate, the dielectric film 412 can be used in an etching process as a patterning mask to form three-dimensional structures, such as staircase structures. The dielectric film 412 can be patterned using standard photoresist patterning techniques. A patterned photoresist (not shown) can be formed on the dielectric film 412. The dielectric film 412 can be etched in a pattern corresponding to the patterned photoresist layer, which can then etch the pattern into the substrate 400. Material can be deposited in the etched portions of the dielectric film 412. The dielectric film 412 can be removed using a solution containing hydrogen peroxide and sulfuric acid. One exemplary solution containing hydrogen peroxide and sulfuric acid is known as a piranha solution or piranha etch. The dielectric film 412 can also be removed using etching chemistries containing oxygen and halogens, including, but not limited to, chlorine (Cl), fluorine (F), iodine (I), bromine (Br), and astatine (At). For example, the dielectric film 412 may be removed using an etching chemistry including Cl / O, CF / O, or Cl / O / CF. The dielectric film 412 may be removed by a chemical mechanical polishing (CMP) process.

[0070]

[0075] The processes may generally be stored in memory as software routines that, when executed by a processor, cause the processing chamber to perform the processes of the present disclosure. The software routines may also be stored and / or executed by a second processor (not shown) located remotely from the hardware being controlled by the processor. Some or all of the methods of the present disclosure may also be performed in hardware. Thus, the processes may be implemented in software and executed in hardware using a computer system, for example, as an application-specific integrated circuit or other type of hardware implementation, or as a combination of software and hardware. The software routines, when executed by a processor, transform a general-purpose computer into a special-purpose computer (controller) that controls chamber operation so that processes are performed.

[0071]

[0076] The present disclosure will now be described with reference to the following examples. Before describing certain exemplary embodiments of the present disclosure, it is to be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description. The present disclosure is capable of other embodiments and of being practiced or carried out in various ways. [Example]

[0072]

[0077] Example

[0078] Example 1

[0079] The temperature was 100°C, the pressure was 400 mTorr, and the processing gases were 30 sccm of SiH4, 100 sccm of NH3, and N 2Low-temperature, high-quality silicon nitride dielectric films were fabricated in a CVD reactor using argon (Ga) and Ar(g) as diluents, applying 200 watts of RF (13.56 MHz) power through the substrate pedestal (electrostatic chuck). The resulting dielectric film had a refractive index (RI) of 1.82 (633 nm), which was significantly higher than that of dielectric films formed by PECVD at the same temperature. The RI improved with higher tuning power and lower pressure. The primary and secondary RF frequencies could be any combination of 350 kHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, and 100 MHz.

[0073]

[0080] Use of the terms "a," "an," and "the" and similar referents in the context of describing the materials and methods discussed herein (particularly in the context of the claims below) should be construed to encompass both the singular and the plural unless otherwise indicated herein or clearly contradicted by context. The recitation of ranges of values ​​herein is merely intended to serve as a shorthand method of referring individually to each individual value falling within the range, unless otherwise indicated herein, and each individual value is incorporated herein as if it were individually listed herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or clearly contradicted by context. The use of any and all examples, or exemplary language (e.g., "such as") provided herein, is intended merely to better describe the materials and methods and does not limit the scope unless specifically claimed. No language herein should be construed as indicating any non-claimed element as essential to the practice of the disclosed materials and methods.

[0074]

[0081] Throughout this specification, references to "one embodiment," "a particular embodiment," "one or more embodiments," or "an embodiment" mean that a particular feature, structure, material, or characteristic described in connection with an embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of phrases such as "in one or more embodiments," "a particular embodiment," "in one embodiment," or "an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment of the present disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.

[0075]

[0082] Although the disclosure herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed method and apparatus without departing from the spirit and scope of the disclosure. Therefore, it is intended that the disclosure cover modifications and variations that come within the scope of the appended claims and their equivalents.

Claims

1. 1. A method of processing a substrate, comprising: flowing a precursor-containing gas mixture into a process space of a process chamber having a substrate disposed on an electrostatic chuck; maintaining the substrate at a pressure in the range of 0.1 mTorr to 10 Torr and a temperature in the range of −50° C. to 150° C.; applying a first RF bias to the electrostatic chuck to generate a plasma at a substrate level and depositing a dielectric film on the substrate having a refractive index in the range of 1.5 to 3 at 633 nm; Including, The precursor-containing mixed gas is triethoxysilane (SiH(OEt) ３ ), tetraethoxysilane (tetraethyl orthosilicate; Si(OEt) ４ or TEOS), dichlorosilane (SiH ２ Cl ２ ), silicon tetrachloride (SiCl ４ ), silicon tetrafluoride (SiF ４ ), trichlorosilane (HSiCl ３ ), 1,1,3,3-tetramethyldisiloxane (TMDZ), (bis(tertiarybutylamino)silane (BTBAS), (bis(diethylamino)silane (BDEAS), tris(dimethylamino)silane (TDMAS), (Si[N(tBu)CH=CHN(tBu)](OEt) ２ (Si-TBES), Si[N(tBu)CH=CHN(tBu)](H)NH ２ (Si-TBAS), germanium (GeH ４ ), germanium tetrachloride (GeCl ４ ), germanium tetrafluoride (GeF ４ ), t-butylgermane (GeH(CH ３ ) ３ ) one or more precursors selected from method.

2. 10. The method of claim 1, further comprising applying a second RF bias to the electrostatic chuck to generate the plasma at the substrate level, wherein the second RF bias is provided at a power in the range of 10 Watts to 3000 Watts and at a frequency in the range of 350 KHz to 100 MHz, or the second RF bias is provided at a power in the range of 800 Watts to 1200 Watts at a frequency of 2 MHz.

3. 10. The method of claim 1, wherein the first RF bias is provided at a power in a range of 10 Watts to 3000 Watts and at a frequency in a range of 350 KHz to 100 MHz, or the first RF bias is provided at a power in a range of 2500 Watts to 3000 Watts at a frequency of 13.56 MHz.

4. The method of claim 1 , further comprising applying a chucking voltage to the substrate disposed on the electrostatic chuck.

5. The precursor-containing mixed gas may be helium (He), argon (Ar), xenon (Xe), krypton (Kr), nitrogen (N ２ ), or hydrogen (H ２ 10. The method of claim 1, further comprising one or more diluent gases selected from:

6. 10. The method of claim 1, wherein the dielectric film comprises one or more of silicon, silicon nitride, silicon carbide, silicon oxide, silicon oxycarbide, silicon oxycarbonitride, silicon oxynitride, titanium nitride, or a composite of oxide and nitride.

7. 1. A method of processing a substrate, comprising: Flowing a precursor-containing gas mixture into a process space of a process chamber having a substrate disposed on an electrostatic chuck, the precursor-containing gas mixture comprising triethoxysilane (SiH(OEt) ３ ), tetraethoxysilane (tetraethyl orthosilicate; Si(OEt) ４ or TEOS), dichlorosilane (SiH ２ Cl ２ ), silicon tetrachloride (SiCl ４ ), silicon tetrafluoride (SiF ４ ), trichlorosilane (HSiCl ３ ), 1,1,3,3-tetramethyldisiloxane (TMDZ), (bis(tertiarybutylamino)silane (BTBAS), (bis(diethylamino)silane (BDEAS), tris(dimethylamino)silane (TDMAS), (Si[N(tBu)CH=CHN(tBu)](OEt) ２ (Si-TBES), Si[N(tBu)CH=CHN(tBu)](H)NH ２ (Si-TBAS), germanium (GeH ４ ), germanium tetrachloride (GeCl ４ ), germanium tetrafluoride (GeF ４ ), t-butylgermane (GeH(CH ３ ) ３ ) into a process space of a process chamber having a substrate disposed on an electrostatic chuck; maintaining the substrate at a pressure in the range of 0.1 mTorr to 10 Torr and at a temperature in the range of −50° C. to 150° C.; applying a first RF bias and a second RF bias to the electrostatic chuck to generate a plasma at a substrate level and deposit a dielectric film on the substrate having a refractive index in the range of 1.5 to 3 at 633 nm; A method comprising:

8. 8. The method of claim 7, wherein the first RF bias is provided at a frequency of 13.56 MHz and at a power in the range of 2500 watts to 3000 watts.

9. 8. The method of claim 7, wherein the second RF bias is provided at a frequency of 2 MHz and at a power in the range of 800 watts to 1200 watts.

10. 1. A method of processing a substrate, comprising: flowing a precursor-containing gas mixture into a process space of a process chamber having a substrate disposed on an electrostatic chuck; maintaining the processing space at a pressure in the range of 0.1 mTorr to 10 Torr and a temperature in the range of −50° C. to 150° C.; applying a first RF bias and a second RF bias to the electrostatic chuck to generate a plasma at a substrate level and deposit a dielectric film on the substrate having a refractive index in the range of 1.5 to 3 at 633 nm; forming a patterned photoresist layer on the dielectric film; etching the dielectric film in a pattern corresponding to the patterned photoresist layer to provide an etched portion of the dielectric film; Etching the pattern into the substrate; depositing a material onto the etched portion of the dielectric film; Including, The precursor-containing mixed gas is triethoxysilane (SiH(OEt) ３ ), tetraethoxysilane (tetraethyl orthosilicate; Si(OEt) ４ or TEOS), dichlorosilane (SiH ２ Cl ２ ), silicon tetrachloride (SiCl ４ ), silicon tetrafluoride (SiF ４ ), trichlorosilane (HSiCl ３ ), 1,1,3,3-tetramethyldisiloxane (TMDZ), (bis(tertiarybutylamino)silane (BTBAS), (bis(diethylamino)silane (BDEAS), tris(dimethylamino)silane (TDMAS), (Si[N(tBu)CH=CHN(tBu)](OEt) ２ (Si-TBES), Si[N(tBu)CH=CHN(tBu)](H)NH ２ (Si-TBAS), germanium (GeH ４ ), germanium tetrachloride (GeCl ４ ), germanium tetrafluoride (GeF ４ ), t-butylgermane (GeH(CH ３ ) ３ ) one or more precursors selected from method.

11. 11. The method of claim 10, wherein the first RF bias is provided at a frequency between 350 KHz and 100 MHz and at a power in the range of 10 Watts to 3000 Watts.

12. 11. The method of claim 10, wherein the second RF bias is provided at a frequency in the range of 350 KHz to 100 MHz and at a power in the range of 10 Watts to 3000 Watts.

13. The precursor-containing mixed gas may be helium (He), argon (Ar), xenon (Xe), krypton (Kr), nitrogen (N ２ ), or hydrogen (H ２ 11. The method of claim 10, further comprising one or more diluent gases selected from:

14. 11. The method of claim 1, 7 or 10, wherein the dielectric film is a high dielectric film having a dielectric constant greater than 4.

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