Preventing losses during atomic layer deposition

Abstract

A method for depositing silicon oxide on a carbon-based film on a substrate includes adsorbing a silicon-containing reactant on the substrate surface, generating oxygen radicals from NO, and exposing the adsorbed silicon-containing reactant to the oxygen radicals to form a silicon oxide film. In some embodiments, the carbon-based film forms features with sidewalls. The method results in low carbon loss and near-vertical sidewalls. Embodiments of this method are performed at high temperatures to promote high-quality deposition.

Description

[Background technology]

[0001] [Incorporated by reference] PCT applications are filed concurrently herewith as part of this application. Each application to which this application claims the benefit of or priority to a concurrently filed PCT application is hereby incorporated by reference in its entirety for all purposes.

[0002] During integrated circuit (IC) fabrication, silicon oxide films may be deposited on carbon-based layers. For example, multiple patterning techniques, such as self-aligned double patterning (SADP), may use silicon oxide layers on carbon-based cores. Maintaining pattern uniformity in such techniques can be difficult.

[0003] The discussion of the background art provided herein is for the purpose of generally presenting the contents of the present disclosure, and the inventions of the presently named inventors are not admitted expressly or impliedly as prior art to the present disclosure, to the extent that they are described in this background art section or in aspects of the description that are not prior art at the time of filing. Summary of the Invention

[0004] A method for depositing silicon oxide on a carbon-based film on a substrate includes adsorbing a silicon-containing reactant on the substrate surface, generating oxygen radicals from NO, and exposing the adsorbed silicon-containing reactant to the oxygen radicals to form a silicon oxide film. In some embodiments, the carbon-based film forms features with sidewalls. The method results in low carbon loss and nearly vertical sidewalls. Embodiments of the method are performed at elevated temperatures that promote high-quality deposition. One aspect of the disclosure relates to a method for providing a substrate having carbon-based features thereon, the carbon-based features having exposed sidewalls and spaced thereon by gaps, and depositing a silicon oxide liner film in the gaps by a plasma-enhanced atomic layer deposition (PEALD) process, the PEALD including multiple cycles of (a) introducing a silicon-containing reactant into a reaction chamber having the substrate therein to adsorb a first reactant on the substrate surface, (b) generating oxygen radicals from NO, and (c) exposing the adsorbed silicon-containing reactant to the oxygen radicals to form a silicon oxide liner film in the gaps, wherein the substrate temperature during deposition is at least 100° C.

[0005] In some embodiments, the method includes depositing a silicon oxide liner film in the gap followed by PEALD using a reaction of a silicon-containing reactant with oxygen (O. In some embodiments, the method includes at least partially filling the gap with silicon oxide using PEALD using a reaction of a silicon-containing reactant with NO.

[0006] In some embodiments, the substrate temperature during deposition is at least 150° C. In some embodiments, the substrate temperature during deposition is at least 200° C.

[0007] In some embodiments, the method includes periodically exposing the substrate to a suppressing plasma during the PEALD process. In some such embodiments, the suppressing plasma is generated from a suppressing gas generated from one of a fluorine-containing compound, molecular nitrogen (N), argon (Ar), helium (He), molecular hydrogen (H), ammonia (NH), an amine, a diol, an aminoalcohol, a thiol, or a combination thereof.

[0008] In some embodiments, the silicon-containing reactant is an aminosilane. In some such embodiments, the aminosilane has two or more amine groups attached to a central silicon atom.

[0009] Another aspect of the present disclosure relates to a method including: (a) providing a substrate having carbon-based features thereon, the carbon-based features having exposed sidewall surfaces and separated by gaps; (b) performing multiple cycles of: (i) introducing a silicon-containing reactant into a reaction chamber having the substrate therein to adsorb a first reactant on the substrate surface; (ii) generating oxygen radicals from NO; and (iii) exposing the adsorbed silicon-containing reactant to the oxygen radicals to form a silicon oxide liner film in the gap; and (c) after (b), exposing the gap to a suppressing plasma.

[0010] In some embodiments, the method includes (d) filling the gap with a silicon oxide film after (c). In some such embodiments, (d) includes using a plasma generated from oxygen (O) as the oxidizer. In some embodiments, (d) includes using a plasma generated from N2O and O2 as the oxidizers. In some embodiments, (d) is performed at a different substrate temperature than (b). In some embodiments, (d) is performed at the same substrate temperature as (b).

[0011] In some embodiments, the method includes repeating (b) after (c). In some embodiments, the method includes repeating (b) and (c) one or more times after (c). In some embodiments, the substrate temperature is at least 100°C throughout the process. In some embodiments, the substrate temperature is at least 150°C throughout the process. In some embodiments, the substrate temperature is at least 200°C throughout the process.

[0012] These and other aspects of the present disclosure are further described below with reference to the drawings. [Brief explanation of the drawings]

[0013] [Figure 1] Schematic of a carbon-based feature without material loss compared to a carbon-based feature with material loss.

[0014] [Figure 2] 1 is a process flow diagram of a method according to an embodiment of the disclosure. [Figure 3] 1 is a process flow diagram of a method according to an embodiment of the disclosure. [Figure 4] 1 is a process flow diagram of a method according to an embodiment of the disclosure.

[0015] [Figure 5A] 1 is a schematic diagram of a patterning method using a method according to a disclosed embodiment. [Figure 5B] 1 is a schematic diagram of a patterning method using a method according to a disclosed embodiment. [Figure 5C] 1 is a schematic diagram of a patterning method using a method according to a disclosed embodiment. [Figure 5D] 1 is a schematic diagram of a patterning method using a method according to a disclosed embodiment.

[0016] [Figure 6] Schematic of a carbon-based feature showing the location of critical dimension (CD) measurements.

[0017] [Figure 7]Table showing average normalized CD measurements after atomic layer deposition processes with various oxidizers (O2 and NO) at various temperatures.

[0018] [Figure 8] Graph comparing CD after ALD with O2 and CD after ALD with NO.

[0019] [Figure 9] FIG. 1 is a diagram of a processing station that may be used to perform operations according to the disclosed embodiments.

[0020] [Figure 10] FIG. 1 is a diagram of a multi-station device that may be used to perform operations in accordance with the disclosed embodiments.

[0021] [Figure 11] FIG. 1 is a block diagram of a processing system suitable for deposition processes described herein in accordance with certain embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0022] In the following description, several specific details are set forth to provide a thorough understanding of the present embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with specific embodiments, it will be understood that they are not intended to limit the disclosed embodiments.

[0023] The fabrication of semiconductor devices typically involves depositing one or more thin films in an integrated manufacturing process and may include a patterning step. Multi-patterning techniques are used to fabricate advanced integrated circuits (such as those with small features, high aspect ratios, or 2x nm or 1x nm nodes). The term "1x" node refers to a process node between 10 nm and 19 nm, and the term "2x" node refers to a process node between 20 nm and 29 nm. An example of multi-patterning is self-aligned double patterning (SADP), which creates twice the features of patterns formed by conventional lithography. As devices become smaller, narrower half-pitch features may be achieved using advanced multi-patterning techniques such as quadruple patterning ("quad patterning").

[0024] During multi-patterning techniques, a silicon dioxide film may be deposited on the carbon-based layer. In some techniques, for example, a silicon dioxide film deposited on a carbon-based core is used to form spacers around the core. By depositing two spacers on each carbon-based core, patterning density can be doubled. In this integration process, and other integration processes in which a silicon dioxide film is deposited on the sidewalls of carbon-based features, preventing material loss from the carbon-based film can be difficult. For example, referring to FIG. 1 , a rammed structure containing carbon-based features 105 is shown at 110. These may be patterned features formed as part of a patterning technique, or may be hard mask materials. Examples of carbon-based materials include amorphous carbon-based films, such as spin-on carbon, and polymeric carbon-based films. Such carbon-based films may contain several polymeric mixtures, crosslinkers, additives, etc. Generally, carbon-based films have more than 50% (atomic) carbon.

[0025] At 120, the structure is shown after undergoing a process that damages the carbon-based feature 105. Specifically, material is lost from the sidewalls 106 such that the sidewalls 106 are no longer vertical. While the silicon dioxide film is not depicted in FIG. 1 for ease of illustration, material loss can occur due to atomic layer deposition (ALD) of silicon dioxide on the carbon-based features. Provided herein is a method for depositing a silicon dioxide film by ALD that results in low loss and near-vertical sidewalls, as shown at 130. Additionally, as described further below, embodiments of this method are performed at high temperatures that promote high-quality deposition.

[0026] FIG. 2 illustrates an example of a process flow that may be used to deposit a silicon oxide film on a carbon-based layer. The process begins in operation 201, where a substrate is provided having carbon-based features with sidewalls and gaps. The substrate may be a semiconductor substrate, such as a 300 mm or 450 mm silicon wafer, that has undergone IC fabrication. Typically, one or more layers, or dielectric, conductive, and / or semiconductive materials, are deposited on the semiconductor substrate. The specific example in FIG. 2 also includes carbon-based features with sidewalls and gaps between the features. An example is shown in FIG. 1 at 110, including carbon-based features 105 on a substrate and gaps between the carbon-based features. The sidewalls of the carbon-based features are exposed.

[0027] 1 and 2 are for carbon-based features, the deposition methods described herein may be used for other oxidation-sensitive materials (cobalt, germanium-antimony-tellurium, silicon, silicon germanium, etc.) Additionally, the methods may be used to deposit silicon oxide films on a planar surface or a single feature.

[0028] In some embodiments, the substrate includes an initial pattern of carbon-based features formed in a previous fabrication operation. The carbon-based features may be spin-on carbon features and may be referred to as a patterned hardmask layer or a patterned spin-on hardmask layer. The carbon-based features may be characterized by height, width, and one or more of feature density, pitch, and gap width. In one example, each feature may have a width of 100 nm, and the gap between features may be about 50 nm.

[0029] The substrate is provided to a chamber capable of performing plasma-enhanced atomic layer deposition (PEALD). A further description of such a chamber is provided below. Next, in operation 203, a silicon oxide liner is deposited by PEALD using N2O as the oxidizer.

[0030] The PEALD process uses surface-mediated deposition reactions to deposit films layer by layer in cycles. By way of example, a PEALD cycle may include the following operations: (i) precursor delivery / adsorption, (ii) purging the precursor from the chamber, (iii) delivery and plasma ignition of a second reactant, and (iv) purging by-products from the chamber. The reaction of the second reactant with the adsorbed precursor to form a film on the surface of the substrate affects the film's composition and properties, such as non-uniformity, stress, wet etch rate, dry etch rate, and electrical properties (e.g., breakdown voltage, leakage current).

[0031] In one example of an ALD process, a substrate surface containing surface active sites is exposed to a gas-phase distribution of a first precursor (e.g., a silicon-containing precursor) in an amount provided to a chamber housing the substrate. Molecules of this first precursor, including chemisorbed and / or physisorbed species of the first precursor, are adsorbed on the substrate surface. It should be understood that when a compound adsorbs on a substrate surface as described herein, the adsorbed layer may include both the compound and its derivatives. For example, an adsorbed layer of a silicon-containing precursor may include not only the silicon-containing precursor but also its derivatives. After the first precursor administration, the chamber is evacuated to remove most or all of the remaining first precursor in the gas phase, leaving primarily or only adsorbed species. In some embodiments, the chamber need not be completely evacuated. For example, the reactor may be evacuated so that the partial pressure of the first precursor in the gas phase is low enough to mitigate reaction. A second reactant (e.g., NO) is introduced into the chamber so that some of these molecules react with the surface-adsorbed first precursor. The second reactant reacts after a brief application of an active source, such as a plasma. The chamber may then be evacuated again to remove unbound second reactant molecules. As noted above, in some embodiments, the chamber may not be fully evacuated. Additional PEALD cycles may be used to build up the film thickness.

[0032] Below are provided examples of silicon-containing reactants that can be used. In the example of Figure 2, the oxidizer is nitrous oxide (NO). In some embodiments, nitrous oxide is provided as the only oxidizer; that is, no other oxidizer, such as oxygen, is provided. By using NO, the PEALD process can deposit SiO films without degrading carbon.

[0033] Unlike other PEALD processes, which are kept at low temperatures to avoid carbon degradation, the temperature is not particularly limited in the methods described herein. In some embodiments, relatively high temperatures are used to deposit quality films and / or promote void-free gap filling. In such embodiments, the temperature may be greater than 100°C, greater than 150°C, or even 190°C. In some embodiments, for example, PEALD may be performed at 200°C. Other temperature ranges (e.g., greater than 100°C but less than 300°C, greater than 100°C but less than 250°C, or 150-250°C inclusive) may be used. Higher temperatures (e.g., up to 400°C) may also be used if the thermal budget allows. The ability to operate at higher temperatures can be advantageous in enabling subsequent processing (e.g., dielectric deposition) without the need to increase the temperature in the chamber or switch to a different chamber.

[0034] The HFRF power may be relatively low and may depend on the sensitivity of the carbon material. For example, the HFRF power may be about 100 W to about 350 W per station for a 300 mm wafer. The plasma power may be scaled proportionally to the wafer surface area.

[0035] After operation 203, in operation 205, silicon oxide is deposited on the liner layer by PEALD. In many embodiments, operation 205 is a continuation of operation 203, using the same reactants and process conditions (temperature, RF power, etc.). In particular, operation 205 may use the same substrate temperature as operation 203. That is, because operation 203 does not damage the underlying carbon-based layer, relatively high temperatures may be used for operations 203 and 205. Operation 205 may be performed to deposit the remainder of the silicon oxide film. This may include depositing silicon oxide with or without complete gap filling between carbon-based features, depending on the specific application. The latter may be performed, for example, to form spacers in a multi-patterning process. In some embodiments, operation 205 may include adding oxygen (O) to the NO oxidizer or switching from NO to O.

[0036] Below is provided an example of how the process of FIG. 2 can be integrated into a multi-patterning method.

[0037] FIG. 3 depicts a process flow diagram of a single PEALD cycle using NO, which may be performed as part of operation 203 and / or operation 205. In operation 302, a substrate is exposed to a silicon-containing precursor to adsorb the precursor onto the surface of the feature. This operation may be self-regulating. In some embodiments, the precursor adsorbs onto fewer than all active sites on the feature surface. In operation 304, the processing chamber is purged as needed to remove unadsorbed silicon-containing precursor. In operation 306, the substrate is exposed to a plasma generated from NO to form a silicon oxide layer. A carrier gas such as N may be used. The species generated by plasma generation are primarily oxygen radicals, which react with the adsorbed silicon-containing precursor layer to form silicon oxide and unreacted nitrogen. Plasmas generated from O typically have a range of different oxidizing species. With NO, the reactive species are primarily limited to oxygen radicals. In operation 308, the processing chamber is purged as needed to remove byproducts from the reaction of the silicon-containing precursor with the oxidizing agent. Operations 302-308 are repeated for several cycles to deposit silicon oxide to a desired thickness in the feature.

[0038] It should be noted that the processes described herein are not limited to any particular reaction mechanism. Thus, the process described with respect to FIG. 3 includes all oxide deposition processes using sequential exposure to a silicon-containing reactant and an oxidizing plasma, including processes that are not strictly self-limiting. The process includes a sequence in which one or more gases used to generate the plasma are continuously flowed throughout the process with intermittent plasma ignition. Furthermore, in some embodiments, thermal ALD using the chemistries described may be employed.

[0039] To deposit silicon oxide, one or more silicon-containing precursors may be used. Silicon-containing precursors suitable for use with disclosed embodiments include polysilanes (H3Si-(SiH2) n —SiH3 (n≧0)). Examples of silanes include silane (SiH4), disilane (Si2H6), and organosilanes (methylsilane, ethylsilane, isopropylsilane, t-butylsilane, dimethylsilane, diethylsilane, di-t-butylsilane, allylsilane, sec-butylsilane, thexylsilane, isoamylsilane, t-butyldisilane, di-t-butyldisilane, etc.).

[0040] Halosilanes contain at least one halogen group and may or may not contain hydrogen and / or carbon groups. Examples of halosilanes include iodosilanes, bromosilanes, chlorosilanes, and fluorosilanes. Halosilanes, particularly fluorosilanes, can form reactive halide species capable of etching silicon materials when a plasma is generated; however, in some embodiments, the formation of reactive halide species by the halosilane may be mitigated because the halosilane is not introduced into the chamber when the plasma is generated. Specific chlorosilanes include tetrachlorosilane, trichlorosilane, dichlorosilane, monochlorosilane, chloroallylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, t-butylchlorosilane, di-t-butylchlorosilane, chloroisopropylsilane, chloro-sec-butylsilane, t-butyldimethylchlorosilane, thexyldimethylchlorosilane, and the like.

[0041] Aminosilanes contain at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogen, oxygen, halogens, and carbon. Examples of aminosilanes include mono-, di-, tri-, and tetraaminosilanes (HSi(NH), HSi(NH), HSi(NH), and Si(NH), respectively), as well as substituted mono-, di-, tri-, and tetraaminosilanes (e.g., t-butylaminosilane, methylaminosilane, tert-butylsilaneamine, bis(tert-butylamino)silane (SiH(NH)). (CH3)3)2 (BTBAS), tert-butylsilyl carbamate, SiH(CH3)-(N(CH3)2)2, SiHCl-(N(CH3)2)2, (Si(CH3)2NH)3, etc. A further example of an aminosilane is trisilylamine (N(SiH3)). In some embodiments, aminosilanes with two or more amine groups attached to the central Si atom may be used. These may cause less damage than aminosilanes with only a single amine group attached.

[0042] 3 may be used to deposit SiO in operation 203, and in some embodiments, in operation 205. If a different oxidizing agent is used in operation 205, the PEALD cycle is modified accordingly.

[0043] In some embodiments, either or both of operations 203 and 205 may include an inhibiting operation and / or an etching operation. FIG. 4 is a process flow diagram illustrating gap-filling operations using a periodic inhibiting plasma. In FIG. 4, n cycles of PEALD are performed to deposit silicon oxide, where n is an integer greater than or equal to 1. An example of one PEALD cycle is described above in connection with FIG. 3. Next, in operation 404, the substrate is exposed to an inhibiting plasma. Examples of gases used to generate the inhibiting plasma gas may include fluorine-containing compounds (such as nitrogen trifluoride (NF), molecular nitrogen (N), argon (Ar), helium (He), molecular hydrogen (H), ammonia (NH), amines, diols, diamines, aminoalcohols, thiols, or combinations thereof). The inhibiting plasma can facilitate bottom-up gap-filling by forming a passivated surface, increasing the nucleation barrier of the deposited ALD film. When the suppression plasma interacts with the material in the gap, geometric shadowing effects cause the material at the bottom of the gap to experience much less plasma processing than the material located at the top of the gap or near the field. As a result, deposition at the top of the gap is selectively suppressed, while deposition at the bottom of the feature proceeds with little or no suppression. As a result, bottom-up fill is promoted. As shown in FIG. 4, exposure to the suppression plasma occurs every n cycles of PEALD, where n is an example value between 5 and 10. Operations 402 and 404 are repeated m times to appropriately shape the deposition profile and fill the gap. Then, in operation 406, the deposition may be terminated with one or more cycles of PEALD. The process shown in FIG. 4 may be implemented to perform operations 203 and 205, or operation 205 as needed. An etch operation may be used in addition to or instead of the suppression operation to shape the profile and provide superior gap fill. In some embodiments, operation 205 may include multiple cycles of PEALD-suppression.

[0044] An example of a method using the low-loss PEALD deposition described herein is described below in connection with Figures 5-8. Shown is a semiconductor substrate including, on top of a substrate surface 504, a layer formed into a carbon-based feature 505 that may be lithographically defined in a previous process. The carbon-based feature may, in some embodiments, be formed on a multi-layer stack that may include one or more mask layers and target layers. The multi-layer stack may also include one or more barrier layers, cap layers, or etch stop layers.

[0045] As described herein with reference to Figures 2-4, a silicon oxide layer 511 is deposited on the carbon-based feature 505. This is shown in Figure 5B. The silicon oxide layer is deposited to a uniform thickness without affecting the width or dimensions of the carbon-based feature. A directional etching operation can then be performed to selectively remove the oxide layer from the substrate surface and the top surface of the carbon-based feature, thereby exposing the carbon-based feature of the initial pattern while leaving the oxide layer formed on the sidewall. This is shown in Figure 5C, which includes the carbon-based feature 505 and sidewall silicon oxide spacers 512. An ashing operation can then be performed to selectively remove the carbon-based feature 505 while leaving the sidewall silicon oxide spacers 512 and the oxide layer forming the sidewall. Figure 5D shows the resulting pattern. The number of features of the initial pattern is doubled. By using NO2 as the oxidizer, only a small amount of carbon is consumed from the carbon-based feature. The features and gaps of the resulting pattern have approximately uniform critical dimensions. The resulting double pattern may act as a mask to transfer to an underlying layer, which may be the target layer or another layer in a multi-layer stack.

[0046] Silicon oxide was deposited on multiple adjacent carbon-based features using PEALD with O2 and NO as the oxide at various temperatures. Critical dimensions were measured at the top, middle, and bottom of the gap between two adjacent features, as shown schematically in Figure 6. The HFRF power was 400 W, and the chamber pressure was 1.8 T. The silicon precursor dose time ranged from 0.5 to 2 seconds, and the RF on-time (oxidation) ranged from 0.2 to 5 seconds. Figure 7 shows the average normalized CD at 50°C, 100°C, and 200°C for O2, the average normalized CD at 100°C and 200°C for NO, and the average normalized CD without treatment. The average normalized CD is plotted as a function of temperature for the O2 and NO processes. As shown in Figure 8, the CD for NO is lower at each temperature, indicating less carbon loss. Device

[0047] 9 schematically illustrates an embodiment of a processing station 900 that may be used to deposit material using atomic layer deposition (ALD), which may be plasma-enhanced as described above. For simplicity, processing station 900 is depicted as a stand-alone processing station having a processing chamber body 902 for maintaining a low-pressure environment, although it will be appreciated that a typical processing tool environment may include multiple processing stations 900. Furthermore, it will be appreciated that in some embodiments, one or more hardware parameters of processing station 900 (including those described in more detail below) may be programmably adjusted by one or more computer controllers.

[0048] The processing station 900 is in fluid communication with a reactant delivery system 901 for supplying process gases to a distribution showerhead 906. The reactant delivery system 901 includes a mixing vessel 904 for mixing and / or conditioning process gases for delivery to the showerhead 906. One or more mixing vessel inlet valves 920 may control the introduction of process gases into the mixing vessel 904. Similarly, a showerhead inlet valve 905 may control the introduction of process gases to the showerhead 906.

[0049] Some reactants, such as BTBAS, may be stored in liquid form prior to evaporation upon delivery to a processing station. For example, the embodiment of FIG. 9 includes an evaporation point 903 that evaporates the liquid reactant delivered to a mixing vessel 904. In some embodiments, the evaporation point 903 may be a heated vaporizer. The reactant vapor produced from such a vaporizer may condense in downstream supply lines. Exposure of incompatible gases to the condensed reactant will form small particles. These small particles can clog piping, interfere with valve operation, and contaminate the substrate. Some approaches to addressing these issues include sweeping and / or evacuating the supply lines to remove residual reactants. However, sweeping the supply lines can increase the cycle time of the processing station and reduce processing station throughput. Thus, in some embodiments, the supply lines downstream of the evaporation point 903 may be heat traced. In some examples, the mixing vessel 904 may also be heat traced. In one non-limiting example, the piping downstream of the evaporation point 903 has a temperature profile that increases from about 100° C. to about 150° C. at the mixing vessel 904 .

[0050] In some embodiments, the liquid reactant may be vaporized in a liquid injector. For example, the liquid injector may inject pulses of the liquid reactant into a carrier gas stream upstream of the mixing vessel. In some situations, the liquid injector may vaporize the reactant by switching the liquid from high pressure to low pressure. In other situations, the liquid injector atomizes the liquid into dispersed microdroplets, which are then vaporized in a heated feed tube. It will be appreciated that the smaller droplets evaporate faster than larger droplets, reducing the delay between liquid injection and complete evaporation. Faster evaporation allows for a shorter length of piping downstream from the evaporation point 903. In some situations, the liquid injector may be attached directly to the mixing vessel 904. In other situations, the liquid injector may be attached directly to the showerhead 906.

[0051] In some embodiments, a liquid flow controller upstream of the evaporation point 903 may be provided to control the mass flow rate of the liquid for evaporation and delivery to the processing station 900. For example, the liquid flow controller (LFC) may include a thermal mass flow meter (MFM) located downstream of the LFC. A plunger valve of the LFC may then be adjusted in response to a feedback control signal provided by a proportional-integral-derivative (PID) controller in electrical communication with the MFM. However, stabilizing the liquid flow using feedback control may take more than one second, which may extend the time to dispense the liquid reactant. Thus, in some embodiments, the LFC may be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, the LFC may be dynamically switched from a feedback control mode to a direct control mode by shutting down the sense tube and PID controller of the LFC.

[0052] The showerhead 906 distributes process gases toward the substrate 912. In the embodiment shown in Figure 9, the substrate 912 is located below the showerhead 906 and is shown resting on a pedestal 908. It will be appreciated that the showerhead 906 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to the substrate 912.

[0053] In some embodiments, a microspace 907 is located below the showerhead 906. Performing ALD and / or CVD processes in the microspace rather than the full volume of the processing station can reduce reactant exposure and sweep times, reduce process condition (e.g., pressure, temperature, etc.) change times, and limit exposure of the processing station robot to process gases. Examples of microspace sizes include, but are not limited to, volumes of 0.1 to 2 liters. This microspace also impacts manufacturing throughput; while the deposition rate per cycle is reduced, cycle time is also reduced. In certain cases, the latter effect can be significant enough to increase the overall throughput of the module for a particular target film thickness.

[0054] In some embodiments, the pedestal 908 may be raised or lowered to expose the substrate 912 to the microvolume 907 and / or to change the volume of the microvolume 907. For example, during a substrate transfer phase, the pedestal 908 may be lowered to allow the substrate 912 to be placed on the pedestal 908. During a deposition process phase, the pedestal 908 may be raised to position the substrate 912 within the microvolume 907. In some embodiments, the microvolume 907 completely surrounds the substrate 912 and a portion of the pedestal 908, forming a high flow impedance region during the deposition process.

[0055] If desired, the pedestal 908 may be raised or lowered during a portion of the deposition process to adjust the process pressure, reactant concentration, etc., inside the mini-volume 907. In one situation where the processing chamber body 902 remains at base pressure during the deposition process, lowering the pedestal 908 may allow the mini-volume 907 to be evacuated. Examples of mini-volume to processing chamber volume ratios include, but are not limited to, volume ratios of 1:900 to 1:10. It will be appreciated that in some embodiments, the pedestal height may be programmatically adjusted by a suitable computer controller.

[0056] In other situations, adjusting the height of the pedestal 908 may allow for variations in plasma density during plasma activation and / or plasma treatment cycles involved in the deposition process. At the end of a deposition process step, the pedestal 908 may be lowered during another substrate transfer step to allow for removal of the substrate 912 from the pedestal 908.

[0057] While the exemplary microcavity variations described herein refer to a height-adjustable pedestal, in some embodiments, the position of the showerhead 906 may be adjusted relative to the pedestal 908 to vary the volume of the microcavity 907. Furthermore, it will be appreciated that the vertical position of the pedestal 908 and / or the showerhead 906 may be altered by any suitable mechanism within the scope of the present disclosure. In some embodiments, the pedestal 908 may include a rotation axis for rotating the orientation of the substrate 912. It will be appreciated that in some embodiments, one or more of these exemplary adjustments may be programmatically implemented by one or more suitable computer controllers.

[0058] Returning to the embodiment shown in FIG. 9 , the showerhead 906 and pedestal 908 are in electrical communication with an RF power source 914 and matching network 916 for powering the plasma. In some embodiments, the plasma energy may be controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power source 914 and matching network 916 may be operated at any suitable power to generate a plasma having a desired composition of radical species. Examples of suitable powers are included above. Similarly, the RF power source 914 may provide RF power at any suitable frequency. In some embodiments, the RF power source 914 may be configured to control high-frequency and low-frequency RF power sources independent of each other. Examples of low-frequency RF frequencies may include, but are not limited to, frequencies between 50 kHz and 900 kHz. Examples of high-frequency RF frequencies may include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz. It will be appreciated that any suitable parameters may be adjusted individually or continuously to provide plasma energy for surface reactions. In one non-limiting example, the plasma power may be intermittently pulsed to reduce ion bombardment with the substrate surface for a continuously powered plasma.

[0059] In some embodiments, the plasma may be monitored in situ by one or more plasma monitors. In some situations, plasma power may be monitored by one or more voltage and current sensors (e.g., VI probes). In other situations, plasma density and / or process gas concentration may be measured by one or more optical emission spectroscopy (OES) sensors. In some embodiments, one or more plasma parameters may be programmatically adjusted based on measurements from such in-situ plasma monitors. For example, OES sensors may be used in a feedback loop to provide programmatic control of plasma power. In some embodiments, other monitors may be used to monitor the plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) sensors, acoustic monitors, and pressure transformers.

[0060] In some embodiments, the plasma may be controlled by input / output control (IOC) sequence instructions. In one example, instructions for setting plasma conditions for a plasma process step may be included in a corresponding plasma activation recipe step of a deposition process recipe. In some cases, process recipe steps may be arranged sequentially such that all instructions for a deposition process step are executed simultaneously with that process step. In some embodiments, instructions for setting one or more plasma parameters may be included in a recipe step prior to the plasma process step. For example, a first recipe step may include instructions for setting flow rates of an inert gas and / or a reactive gas, instructions for setting a plasma generator to a power setpoint, and a time delay instruction for the first recipe step. A subsequent second recipe step may include instructions for turning on the plasma generator and a time delay instruction for the second recipe step. A third recipe step may include instructions for turning off the plasma generator and a time delay instruction for the third recipe step. It will be appreciated that these recipe steps may be further subdivided and / or repeated in any suitable manner within the scope of this disclosure.

[0061] In some deposition processes, plasma strikes last for periods of about several seconds or longer. In certain embodiments, shorter plasma strikes may be used. These may be about 10 ms to 1 second (typically about 20-80 ms), with 50 ms being a specific example. Such very short RF plasma strikes require extremely rapid plasma stabilization. To achieve this, the plasma generator may be configured so that the impedance match is preset to a specific voltage while allowing the frequency to float. Traditionally, RF plasmas are generated at an RF frequency of about 13.56 MHz. In various embodiments disclosed herein, the frequency can float to values ​​different from this standard value. By floating the frequency while fixing the impedance match to a predetermined voltage, the plasma can stabilize more quickly. This result can be important when using the very short plasma strikes associated with some types of deposition cycles.

[0062] In some embodiments, the pedestal 908 may be temperature controlled by a heater 910. Additionally, in some embodiments, pressure control of the deposition processing station 900 may be provided by a butterfly valve 918. As shown in the embodiment of Figure 9, the butterfly valve 918 regulates the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of the processing station 900 may be adjusted by changing the flow rate of one or more gases introduced into the processing station 900.

[0063] FIG. 10 shows a schematic diagram of an embodiment of a multi-station processing tool 1000 including an input load lock 1002 and an output load lock 1004, either or both of which may include a remote plasma source. A robot 1006 is configured to move wafers at atmospheric pressure from a cassette loaded via a pod 1008 to the input load lock 1002 through an atmospheric port 1010. The wafer is placed on a pedestal 1012 of the input load lock 1002 by the robot 1006, the atmospheric port 1010 is closed, and the load lock is pumped down. If the input load lock 1002 includes a remote plasma source, the wafer may be exposed to a remote plasma treatment within the load lock before being introduced into a processing chamber 1014. The wafer may also be heated in the input load lock 1002, for example, to remove moisture and adsorbed gases. A chamber transfer port 1016 to the processing chamber 1014 is then opened, and another robot (not shown) places the wafer for processing on a pedestal in the first station shown within the reactor. It will be appreciated that although the embodiment shown in FIG. 10 includes a load lock, in some embodiments direct wafer entry into the processing station may be provided.

[0064] The illustrated processing chamber 1014 includes four processing stations, numbered 1 through 4 in the embodiment shown in FIG. 10. Each station has a heated pedestal (1018 for station 1) and a gas line inlet. It will be appreciated that in some embodiments, each processing station may have different or multiple purposes. While the illustrated processing chamber 1014 includes four stations, it will be understood that a processing chamber according to the present disclosure may have any suitable number of stations. For example, a processing chamber may have five or more stations in some embodiments, but may have three or fewer stations in other embodiments.

[0065] FIG. 10 also illustrates an embodiment of a wafer transport system 1090 for transporting wafers within the processing chamber 1014. In some embodiments, the wafer transport system 1090 may transport wafers between various processing stations and / or between processing stations and load locks. It will be appreciated that any suitable wafer transport system may be used. Non-limiting examples include a wafer carousel and a wafer transport robot. FIG. 10 also illustrates an embodiment of a system controller 1050 used to control process conditions and hardware states of the processing tool 1000. The system controller 1050 may include one or more memory devices 1056, one or more mass storage devices 1054, and one or more processors 1052. The processor 1052 may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc.

[0066] In some embodiments, the system controller 1050 controls all operations of the processing tool 1000. The system controller 1050 executes system control software 1058 stored on the mass storage device 1054, loaded into the memory device 1056, and executed on the processor 1052. The system control software 1058 may include instructions for controlling the timing, mixture of gases, chamber and / or station pressures, chamber and / or station temperatures, purge conditions and timing, wafer temperature, RF power levels, RF frequency, substrate position, pedestal position, chuck position, and / or susceptor position, and other parameters of a particular process being performed by the processing tool 1000. The system control software 1058 may be configured in any suitable manner. For example, various processing tool component subroutines or control objects may be created to control the operation of the processing tool components necessary to perform various processing tool processes in accordance with the disclosed methods. The system control software 1058 may be coded in any suitable computer-readable programming language.

[0067] In some embodiments, the system control software 1058 may include input / output control (IOC) sequence instructions for controlling the various parameters described above. For example, each step of the PEALD process may include one or more instructions for execution by the system controller 1050. Instructions for setting the process conditions for a PEALD process step may be included in the corresponding PEALD recipe step. In some embodiments, the PEALD recipe steps may be arranged in a sequence such that all instructions for a PEALD process step are executed simultaneously with that process step.

[0068] In some embodiments, other computer software and / or programs stored on the mass storage device 1054 and / or memory device 1056 associated with the system controller 1050 may be used. Examples of programs or program sections for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program.

[0069] The substrate positioning program may include program codes for processing tool components used to place the substrate on the pedestal 1018 and control the spacing between the substrate and other components of the processing tool 1000 .

[0070] The process gas control program may include code for controlling gas composition and flow rates to stabilize pressure within the process station, and, if necessary, code for flowing gases to one or more process stations prior to deposition. The process gas control program may include code for controlling gas composition and flow rates within any disclosed ranges. The pressure control program may include code for controlling pressure within the process station, for example, by controlling a throttle valve in the process station's exhaust system, gas flow to the process station, etc. The pressure control program may include code for maintaining pressure within the process station within any disclosed pressure range.

[0071] The heater control program may include code for controlling current to a heating device used to heat the substrate. Alternatively, the heater control program may control the supply of a heat transfer gas (such as helium) to the substrate. The heater control program may include instructions for maintaining the substrate temperature within any disclosed range.

[0072] The plasma control program may include code for setting the RF power level and frequency applied to the processing electrodes of one or more processing stations, for example, using any of the RF power levels disclosed herein. The plasma control program may also include code for controlling the duration of each plasma exposure.

[0073] In some embodiments, there may be a user interface associated with the system controller 1050. The user interface may include a display screen, software display of images of equipment and / or process conditions, and user input devices (pointing device, keyboard, touch screen, microphone, etc.).

[0074] In some embodiments, the parameters adjusted by the system controller 1050 may relate to process conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (e.g., RF power level, frequency, and exposure time), etc. These parameters may be provided to the user in the form of a recipe and entered using a user interface.

[0075] Signals for monitoring the process may be provided from various process tool sensors by analog and / or digital input connections of the system controller 1050. Signals for controlling the process may be output at analog and digital output connections of the process tool 1000. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (e.g., pressure gauges), thermocouples, etc. Appropriately programmed feedback control algorithms may be used with data from these sensors to maintain process conditions.

[0076] Any suitable chamber may be used to implement the disclosed embodiments. Examples of deposition systems include, but are not limited to, the ALTUS® product family, VECTOR® product family, STRIKER® product family, and / or SPEED® product family, each available from Lam Research Corporation of Fremont, California, or various other commercially available processing systems. Two or more of these stations may perform the same function. Similarly, two or more stations may perform different functions. Each station may be designed / configured to perform a particular desired function / method. In some embodiments, a single-station chamber is provided.

[0077] FIG. 11 is a block diagram of a processing system suitable for the deposition processes described herein, according to certain embodiments. The system 1100 includes a transfer module 1103. The transfer module 1103 provides a clean, pressurized environment to minimize the risk of substrate contamination as processed substrates move between various reactor modules. Two multi-station reactors 1109 and 1110 are attached to the transfer module 1103, each capable of performing atomic layer deposition (ALD) and / or chemical vapor deposition (CVD) according to certain embodiments. The reactors 1109 and 1110 may include multiple stations 1111, 1113, 1115, and 1117 that can perform operations sequentially or non-sequentially according to disclosed embodiments. These stations may include a heated pedestal or substrate support, one or more gas inlets, showerheads, or distribution plates. As noted above, a single-station reactor is used in some embodiments.

[0078] The transfer module 1103 may also be fitted with one or more single-station or multi-station modules 1107 capable of performing plasma or chemical (non-plasma) pre-cleaning or any other process described with respect to the disclosed methods. In some cases, the module 1107 may be used for various processes, such as to prepare substrates for deposition processes. The module 1107 may also be designed / configured to perform various other processes, such as etching or polishing. The system 1100 also includes one or more wafer source modules 1101 in which wafers are stored before and after processing. An atmospheric robot (not shown) in the atmospheric transfer chamber 1119 may initially move wafers from the wafer source module 1101 to a load lock 1121. A wafer transfer device (typically a robotic arm device) in the transfer module 1103 moves wafers from the load lock 1121 to the transfer module 1103 and between modules attached to the transfer module 1103.

[0079] In various embodiments, a system controller 1129 is used to control process conditions during deposition. The controller 1129 will typically include one or more memory devices and one or more processors. The processor may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc.

[0080] The controller 1129 may control all operations of the deposition apparatus. The system controller 1129 executes system control software that includes instruction sets for controlling the timing, mixture of gases, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters of a particular process. In some embodiments, other computer programs stored in a memory device associated with the controller 1129 may be used.

[0081] Typically, there will be a user interface associated with the controller 1129. The user interface may include a display screen, software display of images of equipment and / or process conditions, and user input devices (pointing device, keyboard, touch screen, microphone, etc.).

[0082] The system control logic may be configured in any suitable manner. In general, logic can be designed or configured in hardware and / or software. Instructions for controlling the drive circuitry may be hard-coded or provided as software. The instructions may be provided by "programming." Such programming is understood to include any form of logic, including hard-coded logic in digital signal processors, application-specific integrated circuits, and other devices with specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may be executed on a general-purpose processor. The system control software may be coded in any suitable computer-readable programming language.

[0083] The computer program code for controlling the germanium-containing reducing agent pulses, hydrogen flow, tungsten-containing precursor pulses, and other processes in the process sequence can be written in any suitable computer-readable programming language (e.g., assembly language, C, C++, Pascal, Fortran, or others). Compiled object code or scripts are executed by a processor to perform the tasks identified in the program. Also, as noted, the program code may be hard-coded.

[0084] The controller parameters relate to process conditions (e.g., process gas composition and flow rate, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature). These parameters may be provided to the user in the form of a recipe and entered using a user interface. Signals for monitoring the process may be provided by analog and / or digital input connections of the system controller 1129. Signals for controlling the process are output at analog and digital output connections of the deposition apparatus 1100.

[0085] The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be created to control the operation of the chamber components necessary to perform a deposition process (and possibly other processes) according to disclosed embodiments. Examples of programs or program sections for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0086] In some embodiments, the controller 1129 is part of a system, such as may be part of the examples described above. Such systems may include semiconductor processing equipment, including processing tools, chambers, processing platforms, and / or specific processing components (such as wafer pedestals and gas flow systems). These systems may be integrated with electronics for controlling operations before, during, and after processing of semiconductor wafers or substrates. These electronics may be referred to as a "controller," which may control various components or subcomponents of the system. Depending on the processing requirements and / or type of system, the controller 1129 may be programmed to control any of the processes disclosed herein, including supply of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, flow rate settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid supply settings, position operation settings, wafer transfer to and from tools and other transfer tools and / or load locks connected to a particular system.

[0087] Generally, in various embodiments, a controller may be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, etc. Integrated circuits include chips in firmware format that store program instructions, digital signal processors (DSPs), chips defined as application-specific integrated circuits (ASICs), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various personalizations (or program files) that define operational parameters for performing a particular process on or for a semiconductor wafer or for a system. In some embodiments, the operational parameters may be part of a recipe defined by a process engineer to accomplish one or more processing steps in the manufacture of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0088] In some embodiments, the controller may be part of or coupled to a computer integrated with, coupled to, or otherwise networked to the system. For example, the controller may be in the “cloud” that enables remote access of wafer processing or may be all or part of a fab host computer system. The computer enables remote access to the system to monitor the progress of manufacturing operations, examine the history of past manufacturing operations, and examine trends or performance metrics from multiple manufacturing operations to modify parameters of a current process, set up processing steps following a current process, or initiate a new process. In some embodiments, a remote computer (e.g., a server) can provide process recipes to the system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings that are then communicated from the remote computer to the system. In some examples, the controller receives instructions in the form of data specifying parameters for each processing step to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed and the type of tool to which the controller connects or controls. Thus, as described above, the controller may be distributed, for example, by including one or more separate controllers networked together and cooperating toward a common purpose, such as the processes and controls described herein. An example of a controller distributed for such purposes includes one or more integrated circuits on the chamber that are located remotely (e.g., at the platform level or as part of a remote computer) and communicate with one or more integrated circuits that cooperate to control the process in the chamber.

[0089] Without limitation, example systems may include plasma etch chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel edge etch chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etch (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing chambers related to or usable in the fabrication and / or manufacturing of semiconductor wafers.

[0090] As noted above, depending on the process steps being performed by the tool, the controller may be in communication with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools installed throughout the factory, a main computer, another controller, or tools used to transport materials to and from tool locations and / or load ports in a semiconductor manufacturing factory to transport wafer containers. Conclusion

[0091] Although the above embodiments have been described in some detail for clarity of understanding, it will be apparent that certain changes and modifications may be made within the scope of the appended claims. It should be noted that there are many other ways of implementing the processes, systems, and apparatus of the present embodiments. Therefore, the present embodiments should be considered illustrative rather than restrictive, and should not be limited to the details set forth herein.

Claims

1. 1. A method comprising: providing a substrate having carbon-based features thereon, the carbon-based features having exposed sidewall surfaces and separated by gaps; A silicon oxide liner film is deposited in the gap by a plasma-enhanced atomic layer deposition (PEALD) process, the PEALD process comprising: (a) introducing a silicon-containing reactant into a reaction chamber having the substrate therein, causing a first reactant to adsorb on the substrate surface; (b) depositing N 2 (c) exposing the adsorbed silicon-containing reactant to the oxygen radicals to form the silicon oxide liner film in the gap for multiple cycles, wherein the substrate temperature during deposition is at least 100° C.; After depositing the silicon oxide liner film in the gap, the method comprises depositing a silicon oxide film in the gap by PEALD using a reaction of the silicon-containing reactant with oxygen (O 2 ).

2. 10. The method of claim 1 further comprising: The silicon-containing reactant and N 2 at least partially filling the gap with silicon oxide by PEALD using a reaction with O.

3. 10. The method of claim 1, The method wherein the substrate temperature during deposition is at least 150°C.

4. 10. The method of claim 1, The method wherein the substrate temperature during deposition is at least 200°C.

5. 10. The method of claim 1 further comprising: The method further comprising periodically exposing the substrate to a suppressing plasma during PEALD deposition.

6. 6. The method of claim 5, The suppressing plasma may include fluorine-containing compounds, molecular nitrogen (N 2 ), argon (Ar), helium (He), hydrogen molecules (H 2 ), ammonia (NH 3 ), an inhibitor gas generated from one of an amine, a diol, an amino alcohol, a thiol, or a combination thereof.

7. 10. The method of claim 1, The method wherein the silicon-containing reactant is an aminosilane.

8. 8. The method of claim 7, The method wherein the aminosilane has two or more amine groups attached to a central silicon atom.

9. 1. A method comprising: (a) providing a substrate having carbon-based features thereon, the carbon-based features having exposed sidewall surfaces and separated by gaps; (b) (i) introducing a silicon-containing reactant into a reaction chamber having the substrate therein, and allowing the first reactant to adsorb onto the substrate surface; and (ii) 2 (iii) performing multiple cycles of generating oxygen radicals from O and exposing the adsorbed silicon-containing reactant to the oxygen radicals to form a silicon oxide liner film in the gap; (c) after (b), exposing the gap to a suppressing plasma; A method comprising:

10. 10. The method of claim 9, further comprising: (d) after (c), filling the gap with silicon dioxide.

11. 11. The method of claim 10, (d) is oxygen (O 2 ) as an oxidizer.

12. 12. The method of claim 11, (d) is N 2 O and O 2 using a plasma generated from the

13. 11. The method of claim 10, (d) is carried out at a different substrate temperature than (b).

14. 11. The method of claim 10, (d) is carried out at the same substrate temperature as (b).

15. 10. The method of claim 9, further comprising: (c) followed by repeating (b).

16. 10. The method of claim 9, further comprising: (c) followed by repeating (b) and (c) one or more times.

17. 10. The method of claim 9, The method wherein the substrate temperature is at least 100° C. throughout (a) through (c).

18. 10. The method of claim 9, The method wherein the substrate temperature is at least 150° C. throughout (a) through (c).

19. 10. The method of claim 9, The method wherein the substrate temperature is at least 200° C. throughout (a) through (c).

20. A method comprising: providing a substrate having carbon-based features thereon, the carbon-based features having exposed sidewall surfaces and separated by gaps; depositing a silicon oxide liner film in the gap by a plasma-enhanced atomic layer deposition (PEALD) process, the PEALD process including multiple cycles of (a) introducing a silicon-containing reactant into a reaction chamber having the substrate therein and adsorbing a first reactant on a surface of the substrate; (b) generating oxygen radicals from N2O; and (c) exposing the adsorbed silicon-containing reactant to the oxygen radicals to form the silicon oxide liner film in the gap, wherein the substrate temperature during deposition is at least 100°C; depositing silicon oxide to completely fill the gap.

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