Semiconductor substrate and damascene wiring structure

Abstract

To provide a semiconductor substrate having a highly reliable recess and a damascene wiring structure using the semiconductor substrate.SOLUTION: A semiconductor substrate according to an embodiment has a main surface in which a recess is provided, the recess has a bottom surface, a side surface, and an inclined surface, the inclined surface is connected to the bottom surface and the side surface between them and inclined relative to the bottom surface and the side surface so as to form an obtuse angle with the bottom surface and the side surface, and the surface orientation of the bottom surface, the surface orientation of the side surface, and the surface orientation of the inclined surface are different from each other.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor substrates and damascene wiring structures. [Background technology]

[0002] Conventionally, a method for manufacturing a silicon substrate (semiconductor substrate) having a recess formed therein is known in which a recess is formed in a silicon substrate using the Bosch process, and then scallops (microscopic uneven structures) formed on the side surfaces of the recess are removed by dry etching (see Patent Documents 1 to 5). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-206991 [Patent Document 2] Japanese Patent Application Laid-Open No. 2014-13821 [Patent Document 3] Japanese Patent Application Laid-Open No. 2008-34508 [Patent Document 4] US Patent Application Publication No. 2008 / 0023846 [Patent Document 5] US Patent Application Publication No. 2007 / 0281474 Summary of the Invention [Problem to be solved by the invention]

[0004] For example, in an electromagnetically driven mirror (so-called MEMS mirror) that utilizes MEMS technology, it may be desirable to form a highly reliable recess (e.g., a recess with a narrow pitch, a high aspect ratio, and no scallops) in order to provide a low-resistance drive coil in the limited space within the movable part. The inventors have discovered that using dry etching to remove the scallops formed on the side surfaces of the recess in the above-described case has the following problems. Specifically, when isotropic dry etching is used, the width of the opening side of the recess increases, making it impossible to achieve narrow-pitch wiring (wiring embedded in the recess). Furthermore, it is difficult for the etching gas to reach the bottom of the recess, making it difficult to remove the scallops near the bottom of the recess. Furthermore, when anisotropic dry etching is used, only the bottom surface of the recess is likely to be etched, making it difficult to properly remove the scallops formed on the side surfaces of the recess.

[0005] An object of one aspect of the present disclosure is to provide a semiconductor substrate having a highly reliable recessed portion and a damascene wiring structure using the semiconductor substrate. [Means for solving the problem]

[0006] A semiconductor substrate according to one aspect of the present disclosure includes a main surface having a recessed portion, the recessed portion having a bottom surface, a side surface, and an inclined surface, the inclined surface being connected to the bottom surface and the side surface between them and inclined relative to the bottom surface and the side surface so as to form an obtuse angle with the bottom surface and the side surface, and the plane orientation of the bottom surface, the plane orientation of the side surface, and the plane orientation of the inclined surface are different from one another.

[0007] The bottom surface may be a surface along the (100) plane, the side surface may be a surface along the (110) plane, and the inclined surface may be a surface along the (111) plane.

[0008] The recess has a first groove portion extending in a first direction along the main surface, and a second groove portion sharing a bottom surface with the first groove portion and extending in a second direction along the main surface intersecting the first direction, the first groove portion having a first side surface and a first inclined surface between the bottom surface and the first side surface and connected to the bottom surface and the first side surface, the second groove portion having a second side surface and a second inclined surface between the bottom surface and the second side surface and connected to the bottom surface and the second side surface, the second inclined surface being inclined to the bottom surface and the second side surface, intermediate surfaces are formed between the first side surface and the second side surface and between the first inclined surface and the second inclined surface, the intermediate surfaces being connected to the first side surface, the second side surface, the first inclined surface, the second inclined surface, and the bottom surface, and the angles formed by the intermediate surfaces with each of the first side surface and the second side surface may be obtuse angles.

[0009] The semiconductor substrate may further include a first silicon layer, a second silicon layer, and an intermediate layer disposed between the first silicon layer and the second silicon layer, and the main surface may be a surface of the first silicon layer opposite to the intermediate layer.

[0010] The recess may be a groove extending along the main surface, and the length of the bottom surface may be longer than the length of the inclined surface in a cross section perpendicular to the extending direction of the recess.

[0011] The difference between the first angle formed by the bottom surface and the inclined surface and the second angle formed by the side surface and the inclined surface may be 30 degrees or less.

[0012] The bottom surface may have a curved shape that is convex on the side opposite to the opening side of the recess.

[0013] A damascene wiring structure according to another aspect of the present disclosure may include the semiconductor substrate, an insulating layer, a wiring portion, and a cap layer, wherein the recess is a groove extending along the main surface, the wiring portion is provided within the groove, the insulating layer is provided between the inner surface of the groove and the wiring portion, and the cap layer is provided to cover the wiring portion. [Effects of the Invention]

[0014] According to one aspect of the present disclosure, it is possible to provide a semiconductor substrate having a highly reliable recess and a damascene wiring structure using the semiconductor substrate. [Brief explanation of the drawings]

[0015] [Figure 1] FIG. 1 is a plan view of a mirror device including a damascene wiring structure according to one embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Figure 3] FIG. 3 is an enlarged view of FIG. [Figure 4] FIG. 4 is an enlarged view of FIG. [Figure 5] FIG. 5 is a plan view of an SOI wafer used in the manufacture of a damascene wiring structure. [Figure 6] Figure 6(a) is a diagram showing a schematic diagram of the structure of the substrate before the groove portion is formed, Figure 6(b) is a diagram showing the cross-sectional shape of the groove portion formed by the first step, and Figure 6(c) is a diagram showing the cross-sectional shape of the groove portion formed by the second step. [Figure 7] FIG. 7(a) is an SEM image of the bottom of the groove formed in the first step, and FIG. 7(b) is an SEM image of the bottom of the groove formed in the third step. [Figure 8] 8(a) and 8(b) are cross-sectional views for explaining a method for manufacturing a damascene wiring structure. [Figure 9] 9(a) and 9(b) are cross-sectional views for explaining a method for manufacturing a damascene wiring structure. [Figure 10] 10(a) and 10(b) are cross-sectional views for explaining a method for manufacturing a damascene wiring structure. [Figure 11] FIG. 11 is a perspective view schematically showing a corner of a damascene wiring structure. [Figure 12] FIG. 12 is a cross-sectional view of a damascene wiring structure according to a first modification. [Figure 13] FIG. 13 is a cross-sectional view of a damascene wiring structure according to a second modification. [Figure 14]FIG. 14(a) is a cross-sectional view of a damascene wiring structure according to a third modified example, and FIG. 14(b) is a cross-sectional view of a damascene wiring structure according to a fourth modified example. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same or equivalent elements are designated by the same reference numerals, and redundant description will be omitted.

[0017] [Mirror device configuration] FIG. 1 is a plan view of a mirror device 1 (actuator device) configured to include a damascene wiring structure 100 (see FIG. 2) according to one embodiment. As shown in FIG. 1, the mirror device 1 includes a support section 2, a first movable section 3, a second movable section 4, a pair of first connectors 5 and 6, a pair of second connectors 7 and 8, and a magnetic field generator 9. The support section 2, the first movable section 3, the second movable section 4, the first connectors 5 and 6, and the second connectors 7 and 8 are integrally formed by, for example, a semiconductor substrate (substrate 30). In other words, the mirror device 1 is configured as a MEMS (Micro Electro Mechanical Systems) device.

[0018] In the mirror device 1, a first movable part 3 having a mirror surface 10 is oscillated around a first axis X1 and a second axis X2 that are perpendicular to each other. The mirror device 1 can be used, for example, in an optical switch for optical communication, an optical scanner, etc. The magnetic field generating part 9 is formed, for example, by a permanent magnet in a Halbach array. The magnetic field generating part 9 generates a magnetic field that acts on coils 21 and 22, which will be described later.

[0019] The support part 2 has, for example, a rectangular outer shape in a plan view and is formed in a frame shape. The support part 2 is arranged on one side of the magnetic field generator 9 in a direction perpendicular to the mirror surface 10. The first movable part 3 is arranged inside the support part 2 and spaced apart from the magnetic field generator 9. Note that "plan view" means a view from a direction perpendicular to the mirror surface 10, in other words, a view from a direction perpendicular to a main surface 31 of a substrate 30 described later.

[0020] The first movable section 3 has a placement section 3a, a frame section 3b surrounding the placement section 3a, and a plurality of (four in this example) connecting sections 3c connecting the placement section 3a and the frame section 3b to each other. The placement section 3a is formed, for example, in a circular shape in a plan view. A circular mirror surface 10, for example, is provided on the surface of the placement section 3a opposite to the magnetic field generating section 9. The mirror surface 10 is made of a reflective film made of, for example, aluminum, an aluminum-based alloy, silver, a silver-based alloy, gold, a dielectric multilayer film, or the like.

[0021] The frame portion 3b has, for example, a rectangular outer shape in a plan view and is formed in a frame shape. The connecting portions 3c are arranged on both sides of the arrangement portion 3a on the first axis X1 and on both sides of the arrangement portion 3a on the second axis X2, and connect the arrangement portion 3a and the frame portion 3b to each other on the first axis X1 or the second axis X2.

[0022] The second movable part 4 has, for example, a rectangular outer shape in a plan view and is formed in a frame shape. The second movable part 4 is disposed inside the support part 2 so as to surround the first movable part 3 while being spaced apart from the magnetic field generating part 9.

[0023] The first connecting portions 5, 6 are arranged on both sides of the first movable portion 3 on the first axis X1. Each of the first connecting portions 5, 6 connects the first movable portion 3 and the second movable portion 4 to each other on the first axis X1 so that the first movable portion 3 can swing around the first axis X1. Each of the first connecting portions 5, 6 extends linearly along the first axis X1, for example.

[0024] The second connecting portions 7, 8 are disposed on both sides of the second movable portion 4 on the first axis X1. Each second connecting portion 7, 8 connects the second movable portion 4 and the support portion 2 to each other on the second axis X2 so that the second movable portion 4 can swing around the second axis X2. Each second connecting portion 7, 8 extends linearly along the second axis X2, for example.

[0025] The mirror device 1 further includes coils 21 and 22, a plurality of wirings 12, 13, 14, and 15, and a plurality of electrode pads 25, 26, 27, and 28. The coil 21 is embedded in, for example, the frame portion 3b of the first movable portion 3, and extends in a spiral shape in a planar view. The coil 22 is embedded in, for example, the second movable portion 4, and extends in a spiral shape in a planar view. Each of the coils 21 and 22 is made of a metal material such as copper.

[0026] A plurality of electrode pads 25, 26, 27, and 28 are provided on the support portion 2. The wiring 12 electrically connects one end of the coil 21 to the electrode pad 25. The wiring 12 extends from one end of the coil 21 to the electrode pad 25 via the first connecting portion 5, the second movable portion 4, and the second connecting portion 7. The wiring 13 electrically connects the other end of the coil 21 to the electrode pad 26. The wiring 13 extends from the other end of the coil 21 to the electrode pad 26 via the first connecting portion 6, the second movable portion 4, and the second connecting portion 8.

[0027] The wiring 14 electrically connects one end of the coil 22 to the electrode pad 27. The wiring 14 extends from one end of the coil 22 to the electrode pad 27 via the second connecting portion 8. The wiring 15 electrically connects the other end of the coil 22 to the electrode pad 28. The wiring 15 extends from the other end of the coil 22 to the electrode pad 28 via the second connecting portion 7.

[0028] In the mirror device 1 configured as described above, when a drive signal for linear movement is input to the coil 22 via the electrode pads 27, 28 and the wiring 14, 15, a Lorentz force acts on the coil 22 due to interaction with the magnetic field generated by the magnetic field generating unit 9. By utilizing the balance between the Lorentz force and the elastic forces of the second connecting units 7, 8, the mirror surface 10 (first movable unit 3) can be moved linearly together with the second movable unit 4 around the second axis X2.

[0029] On the other hand, when a drive signal for resonant operation is input to the coil 21 via the electrode pads 25, 26 and the wiring 12, 13, a Lorentz force acts on the coil 21 due to interaction with the magnetic field generated by the magnetic field generating unit 9. By utilizing the Lorentz force and the resonance of the first movable part 3 at the resonant frequency, the mirror surface 10 (first movable part 3) can be made to resonate around the first axis X1.

[0030] [Damascene wiring structure] 2 to 4, the damascene wiring structure 100 of the coils 21 and 22 will be described. Since the coils 21 and 22 have the same configuration, the following description will focus on the coil 22, and the description of the coil 21 will be omitted.

[0031] As described above, the coil 22 is provided on the second movable part 4. The second movable part 4 is formed, for example, by the first silicon layer 81 of the substrate 30. The substrate 30 is a semiconductor substrate such as an SOI (Silicon on Insulator) substrate. The substrate 30 has, for example, a first silicon layer 81, a second silicon layer 82, and an insulating layer 83 disposed between the first silicon layer 81 and the second silicon layer 82 (see FIGS. 6 and 8 to 10). The support part 2 is formed by the first silicon layer 81, the second silicon layer 82, and the insulating layer 83, and the first movable part 3, the second movable part 4, the first connecting parts 5 and 6, and the second connecting parts 7 and 8 are formed by the first silicon layer 81. The substrate 30 has a main surface 31. In this example, the main surface 31 is the surface of the first silicon layer 81 opposite to the insulating layer 83.

[0032] The main surface 31 is provided with a groove 33 (recess). The groove 33 has a shape corresponding to the coil 21 and extends in a spiral shape in a plan view in this example. In a cross section perpendicular to the extension direction of the groove 33, the groove 33 has, for example, a rectangular shape. The inner surface of the groove 33 is composed of a bottom surface 33a, a side surface 33b, and an inclined surface 33c connected to the bottom surface 33a and the side surface 33b. The inclined surface 33c is inclined with respect to the bottom surface 33a and the side surface 33b so as to form an obtuse angle (approximately 135 degrees in this embodiment) with the bottom surface 33a and the side surface 33b. Note that although only one cross section is shown in FIGS. 2 to 4, for example, the damascene wiring structure 100 is uniformly configured with respect to the extension direction of the groove 33 and has the same configuration in any cross section perpendicular to the extension direction of the groove 33. However, the damascene wiring structure 100 does not necessarily have to be configured uniformly in the direction in which the trenches 33 extend.

[0033] The damascene wiring structure 100 includes a substrate 30 as a base, an insulating layer 40, a metal layer 50, a wiring portion 60, and a cap layer 70. The insulating layer 40 is provided on the main surface 31 and the inner surfaces of the groove 33 (bottom surface 33a, side surface 33b, and inclined surface 33c; the same applies below). More specifically, the insulating layer 40 has a first portion 41 provided on the inner surface of the groove 33, and a second portion 42 formed integrally with the first portion 41 and provided on the main surface 31. A boundary portion 43 between the first portion 41 and the second portion 42 in the insulating layer 40 is located on the boundary portion between the main surface 31 and the groove 33 in the substrate 30.

[0034] The insulating layer 40 is composed of a first layer 44 and a second layer 45. The first layer 44 is composed of an oxide film and is provided on the main surface 31 and the inner surface of the groove portion 33. The oxide film that constitutes the first layer 44 is, for example, a silicon oxide film (SiO2) formed by thermally oxidizing silicon. The second layer 45 is composed of a nitride film and is provided on the first layer 44. The nitride film that constitutes the second layer 45 is, for example, a silicon nitride film (SiN). The first portion 41 and the boundary portion 43 are composed of the first layer 44 and the second layer 45, and the second portion 42 is composed of the first layer 44.

[0035] The metal layer 50 is provided on the first portion 41 of the insulating layer 40. That is, the metal layer 50 is provided on the inner surface of the groove portion 33 via the first portion 41. The metal layer 50 is made of a metal material such as titanium (Ti). The metal layer 50 can function, for example, as a seed layer for stably forming the wiring portion 60 on the semiconductor substrate and as a barrier layer for preventing diffusion of metal elements contained in the wiring portion 60 into the first silicon layer 81.

[0036] The wiring portion 60 is formed on the metal layer 50 embedded in the groove 33. That is, the wiring portion 60 is provided in the groove 33 via the first portion 41 of the insulating layer 40 and the metal layer 50. The wiring portion 60 is made of a metal material such as copper (Cu). The shape of the metal layer 50 in a cross section perpendicular to the extension direction of the wiring portion 60 (in other words, the extension direction of the groove 33) corresponds to the cross-sectional shape of the groove 33, and in this example, is substantially rectangular. Note that, as in the present embodiment, when the wiring portion 60 extends in a spiral shape in a plan view and has a first portion extending in a direction parallel to the first axis X1 and a second portion extending in a direction parallel to the second axis X2, the extension direction of the wiring portion 60 is parallel to the first axis X1 in the first portion and parallel to the second axis X2 in the second portion. Alternatively, when the wiring portion 60 extends in a curved or curved manner, the extending direction of a certain portion of the wiring portion 60 may be the tangent direction of that portion.

[0037] The cap layer 70 is provided to cover the second portion 42 of the insulating layer 40, the end portion 51 of the metal layer 50, and the wiring portion 60. In this example, the cap layer 70 extends in a planar manner parallel to the main surface 31. The thickness T1 of the cap layer 70 is greater than the thickness T2 of the insulating layer 40. The cap layer 70 is made of, for example, a silicon nitride film and has insulating properties. In other words, the cap layer 70 is made of the same material as the second layer 45 of the insulating layer 40.

[0038] As shown in FIG. 4 , a surface 41a of the first portion 41 of the insulating layer 40 opposite the substrate 30 is, for example, a flat surface perpendicular to the main surface 31. A surface 42a of the second portion 42 of the insulating layer 40 opposite the substrate 30 is, for example, a flat surface parallel to the main surface 31. The surface 42a is in contact with the cap layer 70. As an example, in the present embodiment, the surface 43a of the boundary portion 43 opposite the substrate 30 includes an inclined surface 43b inclined with respect to a direction A1 perpendicular to the main surface 31 when viewed from the extending direction of the wiring portion 60. More specifically, the inclined surface 43b is inclined outward with respect to the surface 41a of the first portion 41 (so that the further away from the bottom surface 33a of the groove 33 the farther from the center of the groove 33 it is). In this example, the inclined surface 43b is curved convexly toward the side opposite the substrate 30.

[0039] An end 51 of the metal layer 50 is disposed between the cap layer 70 and the inclined surface 43 b. More specifically, the end 51 has a portion that is disposed in the space formed between the cap layer 70 and the inclined surface 43 b in the direction A1 perpendicular to the main surface 31.

[0040] The end portion 51 has a first surface 51a, a second surface 51b that is continuous with the first surface 51a, and a third surface 51c that is continuous with the first surface 51a on the side opposite to the second surface 51b. The first surface 51a is along the cap layer 70 and is bonded to the cap layer 70. In this example, the first surface 51a is a flat surface and is located on the same plane as a surface 42a of the second portion 42 of the insulating layer 40 and a surface 60a of a wiring portion 60, which will be described later.

[0041] The second surface 51b is aligned with the inclined surface 43b and bonded to the inclined surface 43b. Similar to the inclined surface 43b, the second surface 51b is inclined outward with respect to the direction A1 perpendicular to the main surface 31. The second surface 51b is curved concavely toward the side opposite the substrate 30. The second surface 51b is in contact with the second layer 45 that constitutes the boundary portion 43 of the insulating layer 40. That is, the portion of the insulating layer 40 that contacts the second surface 51b (in this example, the second layer 45 that constitutes the boundary portion 43) is made of the same material (silicon nitride film) as the portion of the cap layer 70 that contacts the first surface 51a. As described above, in this example, the entire cap layer 70 is made of a silicon nitride film. This increases the bonding strength between the insulating layer 40 and the cap layer 70.

[0042] The third surface 51c is the surface of the end portion 51 opposite to the second surface 51b. When viewed from the extension direction of the wiring portion 60, the third surface 51c is inclined outward with respect to direction A1. The degree of inclination of the third surface 51c with respect to direction A1 is gentler than the degree of inclination of the second surface 51b with respect to direction A1. As a result, the thickness of the end portion 51 in direction A2 parallel to the main surface 31 gradually increases toward the tip of the end portion 51. A portion 61 of the wiring portion 60 located at the boundary between the metal layer 50 and the cap layer 70 is embedded between the cap layer 70 and the third surface 51c. More specifically, the portion 61 of the wiring portion 60 is disposed in the space formed between the cap layer 70 and the third surface 51c in direction A1.

[0043] At the end 51, the first surface 51a and the second surface 51b form an acute angle. In other words, the angle θ formed by the first surface 51a and the second surface 51b is smaller than 90 degrees. That is, the thickness of the end 51 in the direction A1 perpendicular to the main surface 31 gradually decreases toward the tip of the end 51 (for example, the apex formed by the first surface 51a and the second surface 51b). The angle θ may be, for example, 15 degrees to 88 degrees. The end 51 of the metal layer 50 is not provided on the second portion 42 of the insulating layer 40.

[0044] The thickness (minimum thickness) of the end portion 51 in the direction A2 parallel to the main surface 31 is greater than the thickness of the portion of the metal layer 50 other than the end portion 51 (for example, a portion of the metal layer 50 located in the middle in the direction A1 perpendicular to the main surface 31, or a portion of the metal layer 50 located on the first portion 41 of the insulating layer 40). The thickness (maximum thickness) of the tip portion of the metal layer 50 in the direction A1 is smaller than the thickness T2 of the insulating layer 40. Here, the "tip portion of the metal layer 50" refers to a portion of the metal layer 50 whose thickness in the direction A2 parallel to the main surface 31 is greater than its thickness in the direction A1 perpendicular to the main surface 31.

[0045] In this example, the surface 60a of the wiring portion 60 that comes into contact with the cap layer 70 is located on the same plane as the surface 42a of the second portion 42 of the insulating layer 40. The surface 42a is the surface of the insulating layer 40 that comes into contact with the cap layer 70. The surface 70a of the cap layer 70 facing the substrate 30 is a flat surface.

[0046] As described above, the groove 33 extends in a spiral shape in a plan view. As a result, as shown in FIG. 2, the groove 33 has a plurality of adjacent portions 34. The spacing B between the portions 34 is smaller than the width W of the groove 33. The width W of the groove 33 is smaller than the depth D of the groove 33. The depth D of the groove 33 is, for example, the distance between the main surface 31 and the bottom surface 33a in the direction A1 perpendicular to the main surface 31. The distance L between the bottom surface 33a of the groove 33 and the opposite surface of the substrate 30 opposite the main surface 31 in the direction A1 perpendicular to the main surface 31 is larger than the depth D of the groove 33. In this example, the opposite surface is the surface 81a of the first silicon layer 81 on the insulating layer 83 side (opposite the main surface 31).

[0047] [Method of manufacturing a damascene wiring structure] Next, a method for manufacturing the damascene wiring structure 100 (first to eighth steps) will be described with reference to Figures 5 to 10. The method for manufacturing the damascene wiring structure 100 includes a method for manufacturing a semiconductor substrate (substrate 30) having a groove 33 (first to third steps). Note that Figure 6 and Figures 8 to 10 show each part schematically. In particular, Figures 8(b), 9(a), 9(b), 10(a), and 10(b) omit illustration of the inclined surface 33c, and the groove 33 is simplified.

[0048] In this embodiment, as an example, a substrate 30 having a groove 33 is manufactured from an SOI wafer SW as shown in FIG. 5. That is, a plurality of substrates 30 are obtained by cutting the SOI wafer SW into an appropriate shape. As shown in FIG. 6(a), the substrate 30 included in the SOI wafer SW has a first silicon layer 81, a second silicon layer 82, and an insulating layer 83. The thickness of the first silicon layer 81 is, for example, about 30 to 150 μm, and the thickness of the second silicon layer 82 is, for example, about 625 μm.

[0049] The SOI wafer SW has an orientation flat OF, which is a (110) plane, and a main surface 31, which is a (100) plane. In FIG. 5 , the Z-axis direction is perpendicular to the main surface 31, the X-axis direction is along the orientation flat OF as viewed from the Z-axis direction, and the Y-axis direction is perpendicular to both the Z-axis direction and the X-axis direction. The silicon crystal contained in the SOI wafer SW is a cubic crystal. Therefore, in the example of FIG. 5 , a plane parallel to a plane perpendicular to the Y-axis direction (XZ plane) and a plane perpendicular to the X-axis direction (YZ plane) both constitute equivalent crystal planes (i.e., (110) planes). Furthermore, a plane inclined at 45 degrees to the (100) plane as viewed from the Z-axis direction both constitutes an equivalent crystal plane (i.e., (100) plane). The X-axis direction corresponds to a direction parallel to one of the first axis X1 and the second axis X2 shown in FIG. 1, and the Y-axis direction corresponds to a direction parallel to the other of the first axis X1 and the second axis X2. Note that, depending on the processing accuracy when fabricating the SOI wafer SW, the crystal orientation of the orientation flat OF may not strictly coincide with (110). In other words, the crystal orientations of the above-mentioned planes do not necessarily have to coincide perfectly, and may include some deviation.

[0050] (1st step) First, a process including isotropic etching is performed on the main surface 31 of the substrate 30. The "process including isotropic etching" is, for example, the Bosch process. In the Bosch process, a groove is formed by isotropic dry etching, and a protective film is formed on the inner wall of the groove. Then, only the protective film at the bottom of the groove is removed by anisotropic dry etching, and the groove is again formed by isotropic dry etching. In the Bosch process, this process is repeated to further dig the groove. As a result, as shown in FIGS. 6(b) and 7(a), a groove 32 having a bottom surface 32a and a side surface 32b on which scallops S are formed is formed. FIG. 6(b) shows a cross section perpendicular to the extension direction of the groove 32. FIG. 7(a) is an SEM image of the bottom of the groove 32 (a portion including the bottom surface 32a). The groove 32 is formed to extend in a direction parallel to the X-axis or Y-axis direction. The scallops S are minute uneven structures formed on the side surface 32b.

[0051] As shown in FIG. 7(b), the bottom surface 33a, the side surface 33b, and the inclined surface 33c are integrally (continuously) formed. In a cross section perpendicular to the extension direction of the groove 33, the length of the bottom surface 33a is longer than the length of the inclined surface 33c. A boundary line is formed between the side surface 33b and the inclined surface 33c, separating the side surface 33b and the inclined surface 33c. That is, the boundary between the side surface 33b and the inclined surface 33c is clear, and the corner between the side surface 33b and the inclined surface 33c is not gently curved. The difference between the first angle formed by the bottom surface 33a and the inclined surface 33c and the second angle formed by the side surface 33b and the inclined surface 33c is 30 degrees or less. In this embodiment, the first angle is the angle formed between the (100) plane and the (111) plane, and is approximately 125.3°. The second angle is the angle between the (110) plane and the (111) plane, and is approximately 144.7 degrees. Therefore, the angle between the first angle and the second angle is approximately 19.4 degrees. The inclined surface 33c is flat. As a result, at a predetermined height, the thickness t1 of the substrate 30 increased by the inclined surface 33c is greater than the thickness t2 of the substrate 30 increased by the inclined surface if the inclined surface were a curved surface C (a curved surface that is concave with respect to the space within the groove). Therefore, the flat inclined surface 33c can suitably increase the thickness of the substrate 30 near the bottom surface 33a of the groove 33, thereby stabilizing the groove 33 structurally. The bottom surface 33a is curved at least more than the inclined surface 33c so as to be convex toward the side opposite the opening of the groove 33. The curved shape of bottom surface 33a allows bottom surface 33a and inclined surface 33c to be gently connected, which effectively prevents stress from concentrating at the corner between bottom surface 33a and inclined surface 33c.

[0052] The scallops S are inevitably generated due to the nature of the grooves formed by the alternating isotropic dry etching, the formation of a protective film, and the anisotropic dry etching described above. If the fourth and subsequent processes are performed while the scallops S remain, voids (air gaps) may occur between the insulating layer 40 (second layer 45) and the metal layer 50, or cracks (fractures) may occur in the insulating layer 40. These voids may become structural weak points in the damascene wiring structure 100. Furthermore, these cracks may cause current flowing through the wiring portion 60 to leak to the substrate 30. In other words, the metal (metal layer 50 and wiring portion 60) formed on the insulating layer 40 may come into contact with a portion of the substrate 30 through the cracks.

[0053] (Second and third steps) In order to avoid defects caused by the scallops S (i.e., the occurrence of voids or cracks, etc.) as described above, the second and third steps are performed. First, a hydrophilic treatment is performed on the side surface 32b of the groove portion 32 (second step). The hydrophilic treatment is, for example, a treatment of performing O2 ashing on the side surface 32b, or a treatment of immersing the side surface 32b in a surfactant, alcohol, or the like. Note that, instead of (or in combination with) the hydrophilic treatment described above, a degassing treatment may be performed on the groove portion 32. For example, a degassing treatment may be performed to degas the solution present in the groove portion 32. The degassing treatment is a treatment for making it easier to fill the groove portion 32 with an etching solution, and is also a type of hydrophilic treatment.

[0054] Next, anisotropic wet etching is performed on the grooves 32 including the scallops S while the bottom surfaces 32a of the grooves 32 are present (third step). Examples of the etching solution (etchant) that can be used include tetramethylammonium hydroxide (TMAH) and potassium hydroxide (KOH). Here, "a state in which the bottom surfaces 32a of the grooves 32 are present" refers to a state in which the grooves 32 are blind holes (grooves). In other words, "a state in which the bottom surfaces 32a of the grooves 32 are present" refers to a state other than the state in which the bottoms of the grooves 32 are removed (i.e., a state in which the grooves 32 are through holes that penetrate from the main surface 31 to the surface of the second silicon layer 82 opposite the insulating layer 83).

[0055] By performing the wet etching, the scallops S formed on the side surfaces 32b of the trench 32 are removed, and the side surfaces 32b are flattened. As a result, as shown in FIGS. 6(c) and 7(b), trench 33 having flat side surfaces 33b from which the scallops S have been removed is obtained. FIG. 6(c) shows a cross section perpendicular to the extension direction of trench 33. FIG. 7(b) is an SEM image of the bottom (a portion including bottom surface 33a) of trench 33. In this embodiment, as shown in FIG. 5, trench 33 is obtained as a first trench 133 extending along the Y-axis direction (first direction) and a second trench 233 extending along the X-axis direction (second direction). 5, in both the first groove portion 133 and the second groove portion 233, the bottom surface 33a is formed by a surface along the (100) plane (i.e., a surface substantially parallel to the (100) plane), and the side surface 33b is formed by a surface along the (110) plane (i.e., a surface substantially parallel to the (110) plane). Furthermore, the inclined surface 33c is formed by a surface along the (111) plane (i.e., a surface substantially parallel to the (111) plane) that is inclined at 54.7 degrees with respect to both the (100) plane and the (110) plane. In other words, the plane orientations of the bottom surface 33a, the side surface 33b, and the inclined surface 33c are all different. Thus, the groove portion 33 differs from the groove portion 32 not only in that the scallops S are removed, but also in the shape of the corners of the bottom (i.e., the region where the bottom surface and the side surface are connected).

[0056] The shape of the inner surface of the groove 33 as described above is formed by the difference in etching rate depending on the plane orientation. Specifically, at the corners of the bottom of the groove 33, the etching rate in the direction perpendicular to the (111) plane is slower than the etching rate in the direction perpendicular to the (100) plane (i.e., the depth direction of the groove 33) and the etching rate in the direction perpendicular to the (110) plane (i.e., the width direction of the groove 33). This forms an inclined surface 33c along the (111) plane.

[0057] Although the hydrophilization or degassing treatment (second step) described above is performed before the third step of performing anisotropic wet etching, a degassing treatment (second step) may be performed on the grooves 32 simultaneously with the wet etching in the third step instead of (or in combination with) the hydrophilization or degassing treatment. The degassing treatment on the grooves 32 is a treatment that uses, for example, ultrasound, to remove reactive gases (e.g., hydrogen) generated in the grooves 32 as a result of a reaction between the substrate 30 and the etching solution during wet etching, or gases (e.g., carbon dioxide, oxygen, nitrogen, etc.) dissolved in the etching solution in the grooves 32.

[0058] Furthermore, in order to appropriately adjust the difference in etching rate between the above-mentioned plane orientations, a chemical solution that affects the anisotropy of the etching rate (e.g., surfactant NCW, IPA (isopropyl alcohol), etc.) may be added to the etching solution in the second step, thereby making it possible to appropriately adjust the shape of the groove portion 33 (inclined surface 33c).

[0059] 8(a), a substrate 30 having grooves 33 formed in a main surface 31 is obtained by the above-described method for manufacturing a semiconductor device (treatments up to the third step), as shown in FIG. 8(a). The depth of the grooves 33 is, for example, about 5 to 30 μm.

[0060] (4th step) 8(b), an insulating layer 40 is formed on the main surface 31 of the substrate 30. The insulating layer 40 has a first portion 41 provided on the inner surface of the groove 33 and a second portion 42 formed integrally with the first portion 41 and provided on the main surface 31. More specifically, a first layer 44 made of a silicon oxide film (thermal oxide film) is formed on the main surface 31 and the inner surface of the groove 33, and then a second layer 45 made of a silicon nitride film (LP-SiN) is formed on the first layer 44. The thicknesses of the first layer 44 and the second layer 45 are, for example, about 100 to 1000 nm.

[0061] More specifically, in the fourth step, the insulating layer 40 is formed such that a surface 43a of the boundary portion 43 between the first portion 41 and the second portion 42 in the insulating layer 40 opposite the substrate 30 includes an inclined surface 43b inclined with respect to the direction A1 perpendicular to the main surface 31 when viewed from the extending direction of the wiring portion 60 (see FIG. 4). For example, by forming a first layer 44 made of a silicon oxide film and a second layer 45 made of a silicon nitride film on the main surface 31 and the inner surface of the groove portion 33, the inclined surface 43b is formed on the surface 43a of the boundary portion 43. This is because an inclined shape can be easily formed in the first layer 44 made of a silicon oxide film.

[0062] (5th step) 9(a), a metal layer 50 is formed on the first portion 41 and the second portion 42 of the insulating layer 40. In a fifth step, a metal layer 55 is formed on the metal layer 50. The metal layer 55 is made of a metal material such as copper. The metal layer 55 functions as a seed layer together with the metal layer 50. The metal layer 50 and the metal layer 55 are formed by, for example, sputtering, but may also be formed by atomic layer deposition (ALD), chemical vapor deposition (CVD), ion plating, or electroless plating. The total thickness of the metal layer 50 and the metal layer 55 is, for example, about 10 nm to 3000 nm.

[0063] (6th step) 9(b), the wiring portion 60 is formed on the metal layer 50 embedded in the groove portion 33. The wiring portion 60 is formed, for example, by plating. The wiring portion 60 is formed, for example, so that the average thickness of the wiring portion 60 on the main surface 31 is 1 μm or more. In this example, since the metal layer 55 is made of the same material as the wiring portion 60, the wiring portion 60 and the metal layer 55 may be integrated when the wiring portion 60 is formed, and the interface between the wiring portion 60 and the metal layer 55 may disappear. In this case, the metal layer 55 can be considered to constitute the wiring portion 60.

[0064] (7th step) 10(a), the metal layer 50, the metal layer 55, and the wiring portion 60 on the second portion 42 of the insulating layer 40 are removed by, for example, chemical mechanical polishing (CMP) so as to expose the second portion 42 of the insulating layer 40. In a seventh step, the insulating layer 40, the metal layer 50, the metal layer 55, and the wiring portion 60 are subjected to chemical mechanical polishing from the side opposite the substrate 30. A portion of each of the insulating layer 40, the metal layer 50, the metal layer 55, and the wiring portion 60 on the side opposite the main surface 31 or the bottom surface 33a in the direction A1 perpendicular to the main surface 31 is removed, thereby planarizing the insulating layer 40, the metal layer 50, the metal layer 55, and the wiring portion 60. At this time, in this example, the portion of the second layer 45 of the insulating layer 40 that constitutes the second portion 42 is removed.

[0065] (8th step) 10(b), a cap layer 70 is formed to cover the second portion 42 of the insulating layer 40, the end portion 51 of the metal layer 50, and the wiring portion 60. The cap layer 70 is made of, for example, a silicon nitride film (PE-SiN) and is formed to a thickness of about 200 to 3000 nm. Then, the second silicon layer 82 and the insulating layer 83 are removed by etching or the like. Through the above steps, the above-mentioned damascene wiring structure 100 is obtained.

[0066] [Action and effect] In the above-described semiconductor substrate manufacturing method (first to third steps), after forming the groove 32 having the bottom surface 33a and the side surface 33b on which the scallops S are formed in the first step, the side surface 32b of the groove 32 is subjected to a hydrophilic treatment or a degassing treatment in the second step, thereby improving the wettability of the etching solution to the side surface 32b of the groove 32. Furthermore, by performing anisotropic wet etching with the bottom surface 32a of the groove 32 present, the etching solution can be effectively filled into the groove 32. This allows the etching solution to wet the entire side surface 32b of the groove 32, effectively removing the scallops S formed on the side surface 32b. In other words, the groove 33 from which the scallops S have been removed can be obtained. By removing the scallops S, structural weak points in the groove can be eliminated.

[0067] Furthermore, by performing anisotropic etching in the third step, the etching rate of the side surface 32b can be made substantially uniform between the opening side and the bottom side of the groove 32. This makes it possible to prevent problems such as the groove 32's opening side widening in a tapered shape. Therefore, the above-described semiconductor substrate manufacturing method makes it possible to manufacture a substrate 30 having a highly reliable groove 33. That is, it is possible to form a groove 33 on the main surface 31 of the substrate 30 that maintains an appropriate shape and in which the scallops S are appropriately removed.

[0068] According to the above-described method for manufacturing a damascene wiring structure (first to eighth steps), an insulating layer 40 and a metal layer 50 are formed on the inner surface of the groove 33 from which the scallops S have been appropriately removed. This makes it possible to suppress the occurrence of the above-described voids or cracks, etc., and thus obtain a highly reliable damascene wiring structure 100. In other words, as a result of the formation of a highly reliable groove 33, the reliability of the damascene wiring structure 100 formed in the groove 33 can be improved.

[0069] 5, in the method for manufacturing the damascene wiring structure, the main surface 31 of the substrate 30 is along the (100) plane, and in the first step, a groove 33 (first groove 133 or second groove 233) extending in a direction along the (110) plane (in this embodiment, the X-axis direction or the Y-axis direction) is formed. According to the above configuration, a bottom surface 33a along the (100) plane and a side surface 33b along the (110) plane are formed. Furthermore, by utilizing the difference in etching rate depending on the plane orientation, it is possible to form an inclined surface 33c between the bottom surface 33a and the side surface 33b that is along the (111) plane and inclined relative to the bottom surface 33a and the side surface 33b. The angle of the corner between the bottom surface 33a and the side surface 33b when the inclined surface 33c is formed (i.e., the angle between the bottom surface 33a and the inclined surface 33c or the angle between the side surface 33b and the inclined surface 33c) is larger than the angle of the corner when the inclined surface 33c is not formed (i.e., the angle between the bottom surface 33a and the side surface 33b). In this embodiment, the angle between the bottom surface 33a and the inclined surface 33c is approximately 125.3 degrees, and the angle between the side surface 33b and the inclined surface 33c is approximately 144.7 degrees. On the other hand, the angle of the corner when the inclined surface 33c is not formed (i.e., the angle between the bottom surface and the side surface) is approximately 90 degrees. In other words, the formation of the inclined surface 33c results in a corner that is more rounded (i.e., a corner that is gradually curved) than when the inclined surface 33c is not formed. Such corners can make it difficult for cracks to occur in the insulating layer 40 at the corners. Therefore, the above configuration can provide a more reliable damascene wiring structure 100. That is, as a result of forming a more reliable trench 33, the reliability of the damascene wiring structure 100 formed in the trench 33 can be further improved.

[0070] In the above-described substrate 30 (i.e., the semiconductor substrate manufactured by the first to third steps), as described above, the angle of the corner between the bottom surface 33a and the side surface 33b is larger than the angle of the corner when the inclined surface 33c is not provided. That is, the inclined surface 33c forms a corner that is more rounded than when the inclined surface 33c is not formed (i.e., a corner that is gradually curved in a stepwise manner). The groove portion 33 having such a corner suppresses the occurrence of cracks in the material layer at the corner, for example, when a predetermined material layer (in this embodiment, the insulating layer 40) is provided on the inner surface of the groove portion 33. As described above, the reliability of the substrate 30 is improved by the above-described groove portion 33. Furthermore, the substrate 30 can be obtained relatively easily by utilizing the difference in etching rate depending on the surface orientation.

[0071] The above-described damascene wiring structure 100 is formed by embedding the wiring portion 60 and the like in the groove portion 33 having the bottom surface 33a, side surface 33b, and inclined surface 33c as described above. As a result, cracks in the insulating layer 40 are suppressed at the corners of the groove portion 33. Therefore, the reliability of the damascene wiring structure 100 is improved by the groove portion 33.

[0072] In the damascene wiring structure 100, the bottom surface 33a is a surface along the (100) plane, the side surface 33b is a surface along the (110) plane, and the inclined surface 33c is a surface along the (111) plane. According to the above configuration, by utilizing the difference in etching rate depending on the plane orientation, it is possible to easily obtain the damascene wiring structure 100 that exhibits the above-mentioned effects.

[0073] FIG. 11 is a perspective view schematically showing a corner of the damascene wiring structure 100 (i.e., an outer corner portion where the first groove portion 133 and the second groove portion 233 intersect). FIG. 11 illustrates a state before the damascene wiring structure 100 is formed (i.e., a state before the wiring portion 60 and the like are embedded in the first groove portion 133 and the second groove portion 233). As shown in FIG. 11, at the corner where the first groove portion 133 and the second groove portion 233 join, the first groove portion 133 and the second groove portion 233 share a bottom surface 33a. That is, the bottom surface 33a of the first groove portion 133 and the bottom surface 33a of the second groove portion 233 are continuous at the corner.

[0074] The first groove portion 133 has a first side surface 133b and a first inclined surface 133c. The first inclined surface 133c is connected to the bottom surface 33a and the first side surface 133b between the bottom surface 33a and the first side surface 133b and is inclined with respect to the bottom surface 33a and the first side surface 133b. As described above, in this embodiment, the bottom surface 33a is along the (100) plane, the first side surface 133b is along the (110) plane, and the first inclined surface 133c is along the (111) plane. Therefore, the angle formed between the bottom surface 33a and the first inclined surface 133c is approximately 125.3 degrees, and the angle formed between the first side surface 133b and the first inclined surface 133c is approximately 144.7 degrees.

[0075] The second groove portion 233 has a second side surface 233b and a second inclined surface 233c. The second inclined surface 233c is connected to the bottom surface 33a and the second side surface 233b between the bottom surface 33a and the second side surface 233b and is inclined with respect to the bottom surface 33a and the second side surface 233b. As described above, in this embodiment, the bottom surface 33a is along the (100) plane, the second side surface 233b is along the (110) plane, and the second inclined surface 233c is along the (111) plane. Therefore, the angle formed between the bottom surface 33a and the second inclined surface 233c is approximately 125.3 degrees, and the angle formed between the second side surface 233b and the second inclined surface 233c is approximately 144.7 degrees.

[0076] An intermediate surface 35 is formed between the first side surface 133b and the second side surface 233b, and between the first inclined surface 133c and the second inclined surface 233c. The intermediate surface 35 is connected to the first side surface 133b, the second side surface 233b, the first inclined surface 133c, the second inclined surface 233c, and the bottom surface 33a. The intermediate surface 35 is along the (100) plane parallel to the direction perpendicular to the main surface 31 (the X-axis direction) (see FIG. 5). The intermediate surface 35 is formed due to differences in etching rate depending on the plane orientation. Specifically, the etching rate of the (100) plane is slower than that of the (110) plane, resulting in a shape in which the intermediate surface 35, which is the (100) plane, is exposed. Furthermore, the angle formed between the intermediate surface 35 and the first side surface 133b and the angle formed between the intermediate surface 35 and the second side surface 233b are both obtuse angles. Specifically, all of the angles are approximately 135 degrees. Intermediate surface 35 may be a flat surface as shown in Fig. 11, or the portion of intermediate surface 35 between first side surface 133b and second side surface 233b may be inclined with respect to the portion of intermediate surface 35 between first inclined surface 133c and second inclined surface 233c. Intermediate surface 35 does not necessarily have to be formed at a right angle to bottom surface 33a, and intermediate surface 35 may be inclined with respect to bottom surface 33a.

[0077] According to the above configuration, the angle of the corner where the first groove portion 133 and the second groove portion 233 intersect (the corner when viewed from a direction perpendicular to the main surface 31 (the X-axis direction in FIG. 5 )) (i.e., the angle formed between the intermediate surface 35 and the first side surface 133b or the angle formed between the intermediate surface 35 and the second side surface 233b) is larger than the angle of the corner when the intermediate surface 35 is not formed (i.e., the angle formed between the first side surface 133b and the second side surface 233b). In this embodiment, the angle of the corner when the intermediate surface 35 is formed (i.e., the angle formed between the intermediate surface 35 and the first side surface 133b or the angle formed between the intermediate surface 35 and the second side surface 233b) is approximately 135 degrees, and the angle of the corner when the intermediate surface 35 is not formed is approximately 90 degrees. In other words, the formation of the intermediate surface 35 results in a corner that is more rounded (i.e., a corner that is gradually curved) than when the intermediate surface 35 is not formed. Such corners can effectively reduce the stress acting on the wiring portion 60 at the corners when vibrations are applied to the substrate 30. Therefore, the above configuration makes it possible to obtain a damascene wiring structure 100 with even higher reliability. In particular, when the damascene wiring structure 100 is applied to the mirror device 1 as in this embodiment, the substrate 30 is frequently subjected to vibrations due to the swinging of the first movable portion 3 or the second movable portion 4, and therefore the above-mentioned corner configuration (i.e., the configuration in which the intermediate surface 35 is formed) is particularly effective.

[0078] In the damascene wiring structure 100, the insulating layer 40 has a first portion 41 provided on the inner surface of the groove 33 and a second portion 42 formed integrally with the first portion 41 and provided on the main surface 31. The cap layer 70 is provided to cover the second portion 42 of the insulating layer 40, the end 51 of the metal layer 50, and the wiring portion 60. This reduces the number of locations where stress is likely to concentrate, compared to when the insulating layer 40 only has the first portion 41. That is, when the insulating layer 40 only has the first portion 41, the end of the insulating layer 40 is located near the boundary between the main surface 31 and the groove 33, and the main surface 31 and the cap layer 70 come into contact. In this case, the substrate 30, the end of the insulating layer 40, the end 51 of the metal layer 50, the wiring portion 60, and the cap layer 70 come into contact with each other at locations close to each other. Stress is likely to concentrate at such locations. In contrast, in the damascene wiring structure 100, the end of the insulating layer 40 is not present near the boundary between the main surface 31 and the groove portion 33, thereby reducing the number of locations where stress concentrates. Furthermore, the end 51 of the metal layer 50 extends to contact the cap layer 70. If the end 51 did not reach the cap layer 70 and remained lower than the surface 60a of the wiring portion 60, voids might occur in the portion of the wiring portion 60 exposed from the metal layer 50. In contrast, the damascene wiring structure 100 can suppress the occurrence of such voids and prevent peeling of the cap layer 70 due to voids. Furthermore, the surface 43a of the boundary portion 43 between the first portion 41 and the second portion 42 of the insulating layer 40, opposite the substrate 30, includes an inclined surface 43b, and the end 51 of the metal layer 50 is embedded between the cap layer 70 and the inclined surface 43b. At the end 51, the first surface 51a along the cap layer 70 and the second surface 51b along the inclined surface 43b form an acute angle. This makes it possible to prevent stress from being concentrated on the cap layer 70. As a result, the reliability of the damascene wiring structure 100 is improved.

[0079] In the damascene wiring structure 100, the thickness T1 of the cap layer 70 is greater than the thickness T2 of the insulating layer 40. This increases the strength of the cap layer 70, further improving reliability.

[0080] In the damascene wiring structure 100, the portion of the cap layer 70 that contacts the first surface 51a of the end 51 and the portion of the insulating layer 40 that contacts the second surface 51b of the end 51 (the second layer 45 that forms the boundary portion 43) are made of the same material. This makes it possible to increase the bonding strength between the cap layer 70 and the insulating layer 40 in the vicinity of the contact portion between the cap layer 70 and the end 51 of the metal layer 50, thereby further improving reliability.

[0081] In the damascene wiring structure 100, the insulating layer 40 has a first layer 44 made of an oxide film and a second layer 45 made of a nitride film provided on the first layer 44. This allows a sloped shape to be easily formed in the first layer 44 made of an oxide film, facilitating the formation of the sloped surface 43b.

[0082] In the damascene wiring structure 100, the inclined surface 43b is curved in a convex shape, which can more reliably prevent stress from being concentrated on the cap layer .

[0083] In the damascene wiring structure 100, a third surface 51c opposite to the second surface 51b at the end 51 of the metal layer 50 is inclined, and a portion 61 of the wiring portion 60 is inserted between the cap layer 70 and the third surface 51c. This allows the wiring portion 60 to press down on the end 51 of the metal layer 50, thereby reducing the stress acting from the metal layer 50 to the cap layer 70. Furthermore, since the thickness of the portion 61 of the wiring portion 60 in the direction A1 perpendicular to the main surface 31 is reduced, the stress acting from the wiring portion 60 to the cap layer 70 can be reduced.

[0084] In the damascene wiring structure 100, the thickness of the end 51 of the metal layer 50 in the direction A2 parallel to the main surface 31 is greater than the thickness of the portion of the metal layer 50 other than the end 51. This increases the contact area between the end 51 of the metal layer 50 and the cap layer 70, and allows the stress acting from the metal layer 50 to the cap layer 70 to be more suitably dispersed.

[0085] In the damascene wiring structure 100, the thickness of the end 51 of the metal layer 50 in the direction A2 parallel to the main surface 31 gradually increases toward the tip of the end 51. This allows the contact area between the end 51 of the metal layer 50 and the cap layer 70 to be further increased, and the stress acting from the metal layer 50 to the cap layer 70 to be more effectively dispersed.

[0086] The grooves 33 extend in a spiral shape in the damascene wiring structure 100. Even when the grooves 33 extend in a spiral shape like this, high reliability can be obtained.

[0087] In the damascene wiring structure 100, the interval B between adjacent portions 34 in the groove 33 may be smaller than the width W of the groove 33. This allows the pitch (interval) of the wiring to be narrowed, thereby enabling space saving.

[0088] In the damascene wiring structure 100, the width W of the groove 33 is smaller than the depth D of the groove 33. This allows space saving and reduction in the resistance of the wiring.

[0089] In the damascene wiring structure 100, the distance L between the bottom surface 33a of the groove 33 in the direction A1 perpendicular to the main surface 31 and the surface of the substrate 30 opposite the main surface 31 (the surface 81a of the first silicon layer 81) is greater than the depth D of the groove 33. This increases the strength of the substrate 30, further improving its reliability.

[0090] [Variations] Although preferred embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the above embodiments. The materials and shapes of each component are not limited to the above examples. In the above embodiments, a damascene wiring structure 100 applied to a mirror device 1 has been described, but the damascene wiring structure 100 may be applied to devices other than the mirror device 1. Furthermore, in the above embodiments, a two-axis type mirror device 1 that can rotate around two axes (first axis X1 and second axis X2) has been exemplified, but the damascene wiring structure 100 may be applied to a single-axis type mirror device that can rotate around one axis.

[0091] In the above-described semiconductor substrate manufacturing method (steps 1 to 3), trench-shaped grooves 32 and 33 extending along the main surface 31 are formed for the purpose of manufacturing the damascene wiring structure 100. However, in steps 1 to 3, recesses having a via shape, for example, a circular cross section, may also be formed. In this case, too, scallops formed on the side surfaces of the recesses in step 1 can be appropriately removed by wet etching in step 3. Furthermore, the bottom surface of the recesses may be removed after step 3 is performed. For example, the bottom surface of the recesses may be removed by polishing or the like from the surface of the second silicon layer 82 opposite the insulating layer 83, thereby forming through holes. Such through holes may be used, for example, to embed through electrodes (metal). When forming such through holes, the inclined surfaces formed in step 3 can be removed by polishing, thereby obtaining through holes that are uniform in width, extend straight, and are free of scallops.

[0092] In the above embodiment, an SOI wafer SW having an orientation flat OF of a (110) plane was used. Therefore, in order to align the side surface 33b of the groove 33 with the (110) plane, the groove 33 was formed along the X-axis direction along the orientation flat OF or the Y-axis direction perpendicular to the orientation flat OF. However, the SOI wafer used to manufacture the substrate 30 is not limited to the above SOI wafer SW. For example, when an SOI wafer having an orientation flat OF of a (100) plane is used, the plane orientation of the SOI wafer is opposite to the plane orientation shown in FIG. 5 . That is, the (100) plane shown in FIG. 5 becomes the (110) plane, and the (110) plane shown in FIG. 5 becomes the (100) plane. In this case, by forming the groove along a direction inclined at 45 degrees with respect to the X-axis direction and the Y-axis direction, it is possible to form a groove having a side surface along the (110) plane. That is, even when an SOI wafer having a different surface orientation from the SOI wafer SW is used, by adjusting the design (extension direction) of the groove, it is possible to form a groove having a structure similar to the above-described groove 33. Furthermore, in the SOI wafer SW, the crystal orientation of the first silicon layer 81 and the crystal orientation of the second silicon layer 82 do not necessarily have to match.

[0093] The damascene wiring structure 100 may also be configured as in a first modification shown in FIG. 12 . In this first modification, a boundary surface 36 is provided at the boundary between the main surface 31 and the groove portion 33 of the substrate 30, tilting outward with respect to a direction A1 perpendicular to the main surface 31 when viewed from the extension direction of the wiring portion 60. The boundary surface 36 is, for example, a flat surface. The boundary portion 43 of the insulating layer 40 is provided on the boundary surface 36, and therefore extends along the boundary surface 36 and tilts outward with respect to a direction A1 perpendicular to the main surface 31. The inclined surface 43b of the boundary portion 43 and the second surface 51b of the end portion 51 of the metal layer 50 are flat surfaces parallel to the boundary surface 36. The third surface 51c of the end portion 51 is also flat and tilted outward with respect to the direction A1. The inclination angle of the third surface 51c with respect to the direction A1 is gentler than the inclination angle of the second surface 51b with respect to the direction A1. As a result, the thickness of the end portion 51 in the direction A2 parallel to the main surface 31 gradually increases as it approaches the tip of the end portion 51.

[0094] In manufacturing the damascene wiring structure 100 of the first modified example, the grooves 33 are formed by reactive ion etching using, for example, a non-Bosch process and a Bosch process. As a result, when the grooves 33 are formed, an interface 36 is formed at the interface between the main surface 31 of the substrate 30 and the grooves 33. By combining the non-Bosch process and the Bosch process, reliability can be improved.

[0095] Similar to the above embodiment, the first modified example also improves reliability. Furthermore, since the boundary surface 36 is provided at the boundary between the main surface 31 and the groove 33 of the substrate 30, the formation of the inclined surface 43b can be facilitated. In the first modified example, the interval B between the plurality of portions 34 of the groove 33 may also be smaller than the width W of the groove 33. In the case of the first modified example, the interval B is the distance between the inner surfaces of the plurality of portions 34 other than the boundary surface 36 (in other words, the distance between the portions of the inner surfaces of the groove 33 that extend along the direction A1 perpendicular to the main surface 31).

[0096] The damascene wiring structure 100 may be configured as shown in a second modified example in FIG. 13. In the second modified example, the surface 60a of the wiring portion 60 is located closer to the bottom surface 33a of the groove portion 33 than the surface 42a of the second portion 42 of the insulating layer 40. The third surface 51c of the end portion 51 of the metal layer 50 is covered by a boundary portion 71 between the portion of the cap layer 70 on the surface 60a and the portion on the surface 42a. The boundary portion 71 extends along the third surface 51c and is inclined outward with respect to a direction A1 perpendicular to the main surface 31. When manufacturing the damascene wiring structure 100 of the second modified example, for example, the amount of dishing of the wiring portion 60 (the amount of the wiring portion 60 removed) is increased by adjusting the slurry used in the chemical mechanical polishing in the seventh step. This allows the wiring portion 60 to be formed in the shape shown in FIG. 13.

[0097] Similar to the above embodiment, the second modified example also improves reliability. Furthermore, the surface 60a is located closer to the bottom surface 33a of the groove portion 33 than the surface 42a. This further reduces the number of locations where stress is likely to concentrate. Furthermore, because the third surface 51c of the end portion 51 is covered by the boundary portion 71, the contact area between the end portion 51 of the metal layer 50 and the cap layer 70 can be further increased, and stress acting from the metal layer 50 to the cap layer 70 can be more effectively dispersed.

[0098] The damascene wiring structure 100 may be configured as shown in a third modified example in FIG. 14(a). In the third modified example, similar to the second modified example, the surface 60a of the wiring portion 60 is located closer to the bottom surface 33a of the groove portion 33 than the surface 42a of the second portion 42 of the insulating layer 40. Furthermore, the third surface 51c of the end portion 51 of the metal layer 50 is covered by the boundary portion 71 of the cap layer 70. In the third modified example, the thickness T1 of the cap layer 70 is greater than the distance H between the surface 60a and the surface 42a in the direction A1 perpendicular to the main surface 31. The third modified example also improves reliability, similar to the above embodiment. Furthermore, because the thickness T1 of the cap layer 70 is greater than the distance H between the surface 60a and the surface 42a in the direction A1 perpendicular to the main surface 31, the strength of the cap layer 70 can be further improved.

[0099] The damascene wiring structure 100 may be configured as shown in a fourth modified example in FIG. 14(b). In the fourth modified example, similar to the second modified example, the surface 60a of the wiring portion 60 is located closer to the bottom surface 33a of the groove portion 33 than the surface 42a of the second portion 42 of the insulating layer 40. Furthermore, the third surface 51c of the end portion 51 of the metal layer 50 is covered by the boundary portion 71 of the cap layer 70. In the fourth modified example, the thickness T1 of the cap layer 70 is smaller than the distance H between the surface 60a and the surface 42a in the direction A1 perpendicular to the main surface 31. The fourth modified example also improves reliability, similar to the above-described embodiment. Furthermore, because the thickness T1 of the cap layer 70 is smaller than the distance H between the surface 60a and the surface 42a in the direction A1 perpendicular to the main surface 31, the thickness of the wiring portion 60 in the direction A1 can be reduced, thereby further reducing the stress acting from the wiring portion 60 on the cap layer.

[0100] The third surface 51c of the end portion 51 of the metal layer 50 may extend along the second surface 51b. For example, the degree of inclination (inclination angle) of the third surface 51c may be the same as the degree of inclination (inclination angle) of the second surface 51b. The third surface 51c and the second surface 51b may extend parallel to each other. The second portion 42 may be composed of the first layer 44 and the second layer 45. In this case, it is possible to further reduce the number of locations where stress is likely to concentrate. If the cap layer 70 is composed of the same material as the second layer 45 of the insulating layer 40, the area where the same materials are bonded to each other is increased, thereby improving adhesion. The insulating layer 40 may be composed of a single layer. The insulating layer 40 may be composed of a single layer made of, for example, an oxide film. In this case, the cap layer 70 may be composed of an oxide film. The first surface 51a and the second surface 51b may be connected so that their curvatures are continuous when viewed from the extending direction of the wiring portion 60. The damascene wiring structure 100 may be applied to configurations other than actuator devices. [Explanation of symbols]

[0101] 30...substrate (semiconductor substrate), 31...main surface, 32, 33...groove portion, 32a, 33a...bottom surface, 32b, 33b...side surface, 33...groove portion (recess), 33c...inclined surface, 35...intermediate surface, 40...insulating layer, 41...first portion, 42...second portion, 50...metal layer, 51...end portion, 60...wiring portion, 70...cap layer, 100...damascene wiring structure, 133...first groove portion, 133b...first side surface, 133c...first inclined surface, 233...second groove portion, 233b...second side surface, 233c...second inclined surface, S...scallop.

Claims

1. a main surface provided with a recess, The recess has a bottom surface, a side surface, and an inclined surface, the inclined surface is connected to the bottom surface and the side surface between the bottom surface and the side surface, and is inclined with respect to the bottom surface and the side surface so as to form an obtuse angle with the bottom surface and the side surface, a plane orientation of the bottom surface, a plane orientation of the side surface, and a plane orientation of the inclined surface are different from each other, the bottom surface is a surface along the (100) plane, the side surface is a surface along the (110) plane, The semiconductor substrate, wherein the inclined surface is a surface along the (111) plane.

2. the recess has a first groove portion extending in a first direction along the main surface, and a second groove portion sharing the bottom surface with the first groove portion and extending in a second direction along the main surface that intersects with the first direction, the first groove portion has a first side surface and a first inclined surface that is connected to the bottom surface and the first side surface between the bottom surface and the first side surface and is inclined with respect to the bottom surface and the first side surface, the second groove portion has a second side surface and a second inclined surface that is connected to the bottom surface and the second side surface between the bottom surface and the second side surface and is inclined with respect to the bottom surface and the second side surface, an intermediate surface is formed between the first side surface and the second side surface and between the first inclined surface and the second inclined surface; the intermediate surface is connected to the first side surface, the second side surface, the first inclined surface, the second inclined surface, and the bottom surface; The semiconductor substrate according to claim 1 , wherein the angles formed by the intermediate surface and each of the first and second side surfaces are obtuse angles.

3. a first silicon layer, a second silicon layer, and an intermediate layer disposed between the first silicon layer and the second silicon layer; The semiconductor substrate according to claim 1 , wherein the main surface is a surface of the first silicon layer opposite to the intermediate layer.

4. the recess is a groove extending along the main surface, 4. The semiconductor substrate according to claim 1, wherein in a cross section perpendicular to the extending direction of said recess, the length of said bottom surface is longer than the length of said inclined surface.

5. 5. The semiconductor substrate according to claim 1, wherein a difference between a first angle formed by said bottom surface and said inclined surface and a second angle formed by said side surface and said inclined surface is 30 degrees or less.

6. 6. The semiconductor substrate according to claim 1, wherein the bottom surface has a curved shape that is convex on the side opposite to the opening side of the recess.

7. A semiconductor device comprising: a semiconductor substrate according to any one of claims 1 to 6; an insulating layer; a wiring portion; and a cap layer; the recess is a groove extending along the main surface, the wiring portion is provided in the groove portion, the insulating layer is provided between an inner surface of the groove portion and the wiring portion, The cap layer is provided to cover the wiring portion, in a damascene wiring structure.

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