Silicon carbide single crystal ingot, silicon carbide wafer, and method for manufacturing silicon carbide single crystal
By controlling the temperature gradient and defining stress regions during silicon carbide single crystal growth, the method effectively suppresses dislocation conversions, producing high-quality ingots and wafers for semiconductor applications.
Patent Information
- Application Number
- JP2022159843
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-10-03
- Publication Date
- 2025-10-06
- Estimated Expiration
- 2042-10-03
AI Technical Summary
Existing methods for producing silicon carbide single crystals fail to effectively suppress the conversion of threading edge dislocations to prism plane dislocations and the conversion of prism plane dislocations to basal plane dislocations during epitaxial growth.
The method involves growing silicon carbide single crystals with a controlled temperature gradient in the radial direction, limiting it to a predetermined value, and defining specific regions of high and low shear stress to minimize overlapping areas where dislocation conversions occur.
This approach suppresses the conversion of threading edge dislocations to prism plane dislocations and prism plane dislocations to basal plane dislocations, resulting in high-quality silicon carbide single crystal ingots and wafers suitable for semiconductor devices.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a silicon carbide single crystal ingot, a silicon carbide wafer, and a method for producing a silicon carbide single crystal. [Background technology]
[0002] Silicon carbide (hereinafter referred to as SiC) has excellent physical properties compared to Si, such as a band gap approximately three times larger, a saturated drift velocity approximately twice larger, and a breakdown field strength approximately ten times larger. It is also a semiconductor with high thermal conductivity, and is therefore expected to be a material that will realize next-generation high-voltage, low-loss semiconductor elements that will far surpass the performance of currently used Si single-crystal semiconductors.
[0003] High-temperature chemical vapor deposition (hereinafter referred to as HTCVD) is a known method for producing an ingot made of a SiC single crystal (see, for example, Patent Document 1). In the HTCVD method, many of the basal plane dislocations (also referred to as BPDs) contained in a seed substrate are converted to threading edge dislocations (also referred to as TEDs) by epitaxial growth.
[0004] However, some of the TEDs converted from BPDs are not maintained but are converted into prismatic dislocations, and the prismatic dislocations are further converted into BPDs. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Publication No. 2019-099438 Summary of the Invention [Problem to be solved by the invention]
[0006] In view of the above circumstances, the present invention aims to provide a method for producing a silicon carbide single crystal that can suppress the conversion of threading edge dislocations to prism plane dislocations and the conversion of prism plane dislocations to basal plane dislocations, as well as a silicon carbide single crystal ingot and silicon carbide wafer in which the conversion of threading edge dislocations to prism plane dislocations and the conversion of prism plane dislocations to basal plane dislocations are suppressed. [Means for solving the problem]
[0007] A first aspect of the present invention for achieving the above object is a method for producing a silicon carbide single crystal by growing the silicon carbide single crystal on the surface of a seed substrate by an HTCVD method, characterized in that the silicon carbide single crystal is grown so that the temperature gradient in the radial direction is equal to or less than a predetermined temperature.
[0008] A second aspect of the present invention resides in the method for producing a silicon carbide single crystal according to the first aspect, wherein the predetermined value is 15° C. / mm.
[0009] A third aspect of the present invention is a silicon carbide single crystal ingot having a silicon carbide single crystal layer formed on a seed substrate, wherein a region of a basal surface of the silicon carbide single crystal layer exceeding a critical resolved shear stress is defined as a first region, a region of a prism surface of the silicon carbide single crystal layer exceeding a critical resolved shear stress (hereinafter referred to as CRSS) is defined as a second region, a region where the first region and the second region overlap with respect to a threading edge dislocation is defined as a first overlap region, and when viewed in a planar view of the crystal growth surface of the silicon carbide single crystal layer, the area of the first overlap region is less than half the area of the crystal growth surface.
[0010] A fourth aspect of the present invention is the silicon carbide single crystal ingot according to the third aspect, characterized in that a region of the basal surface of the silicon carbide single crystal layer where the critical resolved shear stress is not exceeded is defined as a third region, a region where the second region and the third region overlap is defined as a second overlapping region, and an area of the first overlapping region is smaller than an area of the second overlapping region.
[0011] According to a fifth aspect of the present invention, there is provided a silicon carbide wafer sliced from the silicon carbide single crystal ingot according to the third or fourth aspect. [Effects of the Invention]
[0012] According to the present invention, there are provided a method for producing a silicon carbide single crystal that can suppress the conversion of threading edge dislocations to prism plane dislocations and the conversion of prism plane dislocations to basal plane dislocations, as well as a silicon carbide single crystal ingot and a silicon carbide single crystal wafer in which the conversion of threading edge dislocations to prism plane dislocations and the conversion of prism plane dislocations to basal plane dislocations are suppressed. [Brief explanation of the drawings]
[0013] [Figure 1] FIG. 2 is a schematic diagram showing a silicon carbide single crystal layer formed by epitaxial growth. [Figure 2] FIG. 2 is a diagram showing shear stress acting on the basal surface and prism surface of a silicon carbide single crystal layer. [Figure 3] FIG. 10 shows the overlay of high shear stress regions. [Figure 4] FIG. 10 shows the overlay of high shear stress regions. DETAILED DESCRIPTION OF THE INVENTION
[0014] In this specification, an individual plane orientation is represented by (hkil), and a generic plane orientation including (hkil) and its crystal geometrically equivalent plane orientation is represented by {hkil}. Negative indices are generally represented by placing a "-" (bar) above the number representing the index in crystal geometry, but in this specification, they are represented by placing a minus sign (-) before the number representing the index.
[0015] The mechanism by which TEDs are converted to prism plane dislocations and prism plane dislocations are converted to BPDs during epitaxial growth will be described using Figures 1 and 2. Figure 1 is a schematic diagram showing a silicon carbide single crystal layer formed by epitaxial growth on a seed substrate, and Figure 2 is a diagram showing the shear stress acting on the basal plane and prism plane of the silicon carbide single crystal layer. Figure 1(a) shows the basal plane, and Figure 1(b) shows the prism plane. The basal plane is the {0001} plane, which is the (0001) Si plane or the (000-1) C plane. The prism plane is a plane perpendicular to the basal plane.
[0016] Figure 2(a) shows the shear stress acting on the basal surface, and Figure 2(b) shows the shear stress acting on the prism surface. Both are plane views of the basal surface, with the vertical and horizontal axes representing the lengths in the X and Y directions on the basal surface. The X direction is [11-20]. The shear stress (unit: MPa) is represented by shading, with the larger the absolute value, the darker the shade.
[0017] In Figure 2(a), an ellipse A1, an arc A2, and an arc A3 are shown as lines indicating the critical resolved shear stress acting on the base surface. The ellipse A1 is long in the X direction and is located at the center of the base surface. The arc A2 is located away from the ellipse A1 in the +Y direction. The arc A3 is located away from the ellipse A1 in the -Y direction. The area inside the ellipse A1 is designated R1. The area outside the arc A2 is designated R2, and the area outside the arc A3 is designated R3. The area outside the ellipse A1 and inside the arcs A2 and A3 is designated R4.
[0018] Region R1 is shown dark, and high shear stress exceeding the CRSS is acting on it. Regions R2 and R3 are also shown dark, and shear stress exceeding the CRSS is acting on it in the opposite direction to region R1. Region R4 is shown light, and shear stress lower than the CRSS is acting on it. Regions R1, R2, and R3, which are acting on it with shear stress higher than the CRSS, are collectively referred to as "high shear stress regions at the basal surface." Note that the first region in the claims corresponds to the "high shear stress region at the basal surface."
[0019] In Figure 2(b), four curves B are shown as lines indicating the CRSS acting on the prism surface. The areas outside the four curves B are designated as areas S1, S2, S3, and S4, respectively. Each of areas S1-S4 is roughly fan-shaped. On the other hand, the area inside the four curves B is roughly cross-shaped and designated as area S5.
[0020] Regions S1-S4 are displayed darkly, representing high shear stress exceeding the CRSS. The shear stress in regions S2 and S4 is in the opposite direction to the shear stress in regions S1 and S3. Region S5 is displayed lightly, representing shear stress lower than the CRSS. Regions S1-S4, where shear stress higher than the CRSS acts, are collectively referred to as the "high shear stress region on the prism surface." The (-1100) plane, one of the prism surfaces, has both ends passing through regions S1 and S2, as shown in Figure 2(b). Therefore, shear stress exceeding the CRSS acts on regions S1 and S2 of the prism surface. The second region in the claims corresponds to the "high shear stress region on the prism surface."
[0021] The shear stress distribution shown in Figure 2 is the result of stress analysis using the finite element method, and the CRSS uses values commonly used for SiC. The shear stress distribution in Figures 2(a) and 2(b) can also be obtained from X-ray topography images.
[0022] Figure 3 shows the overlapping high shear stress regions shown in Figure 2. The overlapping regions of the high shear stress region of the base surface and the high shear stress region of the prism surface are designated as region T1 (S1∩R2), region T2 (S2∩R2), region T3 (S3∩R3), and region T4 (S4∩R3), respectively. The first overlapping region described in the claims corresponds to region T1-T4.
[0023] In regions T1-T4, as shown in Figure 1(c), in the high shear stress region of the prism plane, shear stress higher than the CRSS acts on the TEDs, converting them into prismatic dislocations. While the figure shows a single TED, if there are multiple TEDs, some of them will become prismatic dislocations. Furthermore, in the high shear stress region of the basal plane, prismatic dislocations arising from TEDs undergo cross-slip and are converted into BPDs.
[0024] In regions T1-T4, where high shear stress regions overlap, TEDs are easily converted into prismatic plane dislocations, and prismatic plane dislocations are easily converted into BPDs. Therefore, it is preferable to make regions T1-T4 as small as possible. For example, the combined area of regions T1-T4 should be less than half the area of the crystal growth surface (the area of the circle in Figure 3). It is also preferable that each of regions T1-T4 is smaller than each of regions V1-V4. Region V1 is S1∩R4. That is, it is a region where a high shear stress region on the prism surface overlaps with a low shear stress region on the basal plane that does not exceed the CRSS. Similarly, region V2 is S2∩R4, region V3 is S3∩R4, and region V4 is S4∩R4. The third region in the claims corresponds to region R4. The second overlapping region in the claims corresponds to region V1-V4.
[0025] Figure 4 also shows overlapping high shear stress regions, illustrating a different overlap pattern from that shown in Figure 3. Region U1 is S1∩R1. That is, it is a region where the high shear stress region on the prism surface and the high shear stress region on the basal surface overlap. Similarly, region U2 is S2∩R1, region U3 is S3∩R1, and region U4 is S4∩R1. Since regions U1-U4 are regions where high shear stress regions overlap, it is preferable to make them as small as possible. For example, the combined area of regions T1-T4 is less than one-fourth the area of the crystal growth surface. It is also preferable to make each of regions U1-U4 smaller than each of regions V1-V4.
[0026] A method for manufacturing a SiC single crystal ingot having overlapping high shear stress regions as described above will now be described. Although not specifically shown, the SiC single crystal ingot is obtained by growing a SiC single crystal layer on one surface (hereinafter referred to as the crystal growth surface) of a seed substrate by the HTCVD method.
[0027] The seed substrate has an off-angle. The off-angle is the angle between one surface of the seed substrate on which crystal growth occurs (crystal growth surface) and the {0001} plane. The {0001} plane is the (0001) Si plane or the (000-1) C plane. The off-angle direction of the seed substrate is [1-100]. A seed substrate having an off-angle in the [1-100] direction relative to the {0001} plane can be obtained, for example, by obliquely slicing an existing SiC single crystal ingot. The off-angle is not particularly limited, but is, for example, between 1 degree and 8 degrees. The polytype of the seed substrate is 4H-SiC.
[0028] The SiC single crystal layer is formed on the seed substrate by the HTCVD method. Since the method for producing a SiC single crystal layer by the HTCVD method is well known, a detailed description will be omitted. For example, the SiC single crystal layer is produced under the following conditions.
[0029] In the HTCVD method, the growth temperature is preferably 2450°C or higher. The average growth rate until the SiC single crystal layer grows to a thickness of 1 mm is preferably 1 mm / h or higher. The pressure inside the container containing the seed substrate (hereinafter referred to as the container pressure) is 50 kPa or higher and 100 kPa or lower, and the supply rate ratio of the Si-based gas to the C-based gas (C / Si ratio) is 1.0±0.15.
[0030] 3, a specific method for forming the high shear stress regions is to grow the crystal by setting the temperature gradient in the radial direction of the silicon carbide single crystal layer at a predetermined value or less, for example, 15°C / mm or less. By setting the temperature gradient at a predetermined value or less in this way, the areas of the high shear stress regions on the basal surface and the prism surface are reduced, and the area of the overlapping region is also reduced.
[0031] Generally, a silicon carbide single crystal layer has a difference in height in the thickness direction of the seed substrate, and this difference in height causes a temperature gradient in the radial direction. For example, a temperature gradient of about 10 to 15°C / mm occurs in the vertical direction. Therefore, in order to keep the temperature gradient at a predetermined temperature or less, the crystal is grown so that the thickness of the silicon carbide single crystal layer is uniform during crystal growth. Specifically, the arrangement and diameter of the source gas flow path are adjusted so that the flow rate distribution of the source gas for the silicon carbide single crystal layer is uniform. In addition, the temperature of a heater is controlled to adjust the temperature inside a container in which the seed substrate is placed.
[0032] During crystal growth, the thickness of the silicon carbide single crystal layer tends to be thicker at the center and thinner at the outer edge, but it is preferable to perform crystal growth so that the difference in height between the center and outer edge is 1 mm.
[0033] In the SiC single crystal ingot produced by the manufacturing method described above, the overlapping area of the high shear stress regions on the basal plane and prism planes is small, so that the conversion of TEDs in the SiC single crystal layer to prism plane dislocations and the conversion of prism plane dislocations to BPDs are suppressed. Because the conversion of TEDs to prism plane dislocations and BPDs is suppressed in this way, the SiC single crystal ingot is suitable for the manufacture of semiconductor devices.
[0034] In a wafer with a diameter of 3 inches, an analysis was conducted assuming a temperature gradient between the center and the outermost periphery of 15°C / mm, a CRSS of basal plane dislocations of 1 MPa, and a CRSS of threading edge dislocations of 8 MPa, and the total area of regions T1-T4 was estimated to be less than one-fourth of the area of the crystal growth surface.
[0035] Furthermore, according to the method for producing a SiC single crystal ingot, it is possible to produce a SiC single crystal ingot that can be used to produce high-quality wafers as described above, and it is also possible to produce a SiC single crystal ingot at a high growth rate using the HTCVD method. [Explanation of symbols]
[0036] R1-R3…1st area, R4…3rd area, S1-S4…2nd area, T1-T4…1st repeating area, V1-V4…2nd repeating area
Claims
1. A method for producing a silicon carbide single crystal by growing a silicon carbide single crystal on a surface of a seed substrate by HTCVD, comprising: The growth temperature in the HTCVD method is 2450°C or higher, During crystal growth, a temperature gradient of 10 to 15°C / mm is generated in the vertical direction of the silicon carbide single crystal at any position in the radial direction.
2. A method for producing a silicon carbide single crystal comprising the steps of:
2. A silicon carbide single crystal ingot having a silicon carbide single crystal layer formed on a seed substrate, a region of the basal surface of the silicon carbide single crystal layer that exceeds a critical resolved shear stress is defined as a first region; a region of the prism surface of the silicon carbide single crystal layer that exceeds the critical resolved shear stress is defined as a second region; a region where the first region and the second region for a threading edge dislocation overlap is defined as a first overlap region, In a plan view of the crystal growth surface of the silicon carbide single crystal layer, the area of the first overlapping region is less than half the area of the crystal growth surface. A silicon carbide single crystal ingot characterized by:
3. 3. The silicon carbide single crystal ingot according to claim 2, a region of the basal plane of the silicon carbide single crystal layer that does not exceed the critical resolved shear stress is designated as a third region; a region where the second region and the third region overlap is defined as a second overlap region; The area of the first overlapping region is smaller than the area of the second overlapping region. A silicon carbide single crystal ingot characterized by:
4. A silicon carbide wafer sliced from the silicon carbide single crystal ingot according to claim 2 or 3.
Citation Information
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