Display device

Abstract

To provide a semiconductor device including an oxide semiconductor with stable electric characteristics.SOLUTION: A silicon oxide layer containing many defects typified by a dangling bond is formed in contact with an oxide semiconductor layer, and impurities such as hydrogen or moisture (hydrogen atom or compounds containing a hydrogen atom, such as H2O) included in the oxide semiconductor layer are diffused in the silicon oxide layer and the impurity concentration in the oxide semiconductor layer is reduced. In addition, a mixture region is provided at an interface between the oxide semiconductor layer and the silicon oxide layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method thereof.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] In recent years, semiconductor thin films (thickness of several to several hundred nm) formed on substrates with insulating surfaces have been used. The technology of constructing thin film transistors (TFTs) using these elements is attracting attention. Electronic devices such as integrated circuits (ICs) and electro-optical devices It is widely used in various devices, and development is particularly urgent as a switching element for image display devices. There are many types of metal oxides and they are used for various purposes. Indium oxide is one of the most It is a well-known material and is used as a transparent electrode material required for liquid crystal displays, etc. It is being done.

[0004] Some metal oxides exhibit semiconducting properties. Metal oxides that exhibit semiconducting properties include: For example, tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. Thin film transistors using metal oxides with excellent semiconductor properties as the channel formation region are already known. (See Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0006] However, oxide semiconductors tend to deviate from the stoichiometric composition during the thin film formation process. For example, the electrical conductivity of oxide semiconductors changes depending on whether there is an excess or deficiency of oxygen. During the formation of oxide semiconductor thin films, hydrogen and moisture get mixed in and form oxygen (O)-hydrogen (H) bonds. As a result, OH acts as an electron donor, which causes changes in electrical conductivity. Therefore, for active devices such as thin film transistors made of oxide semiconductors, This can cause fluctuations in characteristics.

[0007] In view of the above problems, one embodiment of the present invention provides a semiconductor device using an oxide semiconductor having stable electrical characteristics. The object of the present invention is to provide a semiconductor device. [Means for solving the problem]

[0008] In order to suppress the fluctuation of the electrical characteristics of thin film transistors using oxide semiconductor layers, Specifically, hydrogen and moisture contained in the oxide semiconductor layer are removed. Concentration 1×10 18 Over 2×10 20 cm -3 It is preferable to do the following:

[0009] A silicon oxide layer (SiOx, preferably x is 2 or more) containing many defects such as dangling bonds. ) is formed in contact with the oxide semiconductor layer, and hydrogen and moisture (hydrogen atoms) contained in the oxide semiconductor layer are removed. Impurities such as silicon dioxide and compounds containing hydrogen atoms such as H2O are diffused into the silicon oxide layer. In this case, the impurity concentration in the oxide semiconductor layer may be reduced.

[0010] The defects contained in the silicon oxide layer include dangling silicon bonds, dangling oxygen bonds, or both. The silicon oxide layer, which contains many dangling oxygen bonds as defects, reacts mainly with hydrogen. This increases the binding energy, facilitating diffusion from the oxide semiconductor layer to the silicon oxide layer. This is preferable because it can stabilize impurities in the silicon oxide layer.

[0011] The oxide semiconductor layer or the silicon oxide layer in contact with the oxide semiconductor layer is also The film may be formed in a film formation chamber that has been evacuated using a gas to reduce the impurity concentration.

[0012] One embodiment of the configuration of the invention disclosed in this specification is a gate electrode layer on a substrate; a gate insulating layer, an oxide semiconductor layer on the gate insulating layer, and a source electrode layer on the oxide semiconductor layer; and a drain electrode layer, and an oxide semiconductor layer on the oxide semiconductor layer, the source electrode layer, and the drain electrode layer. a silicon oxide layer in contact with a part of the conductor layer, and A mixed region is provided, and the mixed region is a region including oxygen, silicon, and a metal contained in the oxide semiconductor layer. The semiconductor device contains at least one element.

[0013] The mixed region may have a film thickness of 1 nm to 10 nm (preferably 2 nm to 5 nm). By providing a mixed region and making the interface between the oxide semiconductor layer and the silicon oxide layer less clear, This facilitates diffusion of hydrogen from the oxide semiconductor layer to the silicon oxide layer.

[0014] Another embodiment of the invention disclosed in this specification is a gate electrode layer on a substrate. a gate insulating layer on the gate insulating layer, an oxide semiconductor layer on the gate insulating layer, and a source electrode on the oxide semiconductor layer. a source electrode layer and a drain electrode layer, and an oxide semiconductor layer and an oxide semiconductor layer on the source electrode layer and the drain electrode layer; a silicon oxide layer in contact with a part of the semiconductor layer, the silicon oxide layer being a semiconductor layer containing defects; It is a device.

[0015] The above structure may further include a protective insulating layer covering the silicon oxide layer.

[0016] Another embodiment of the invention disclosed in this specification is a gate electrode layer on a substrate. After forming a gate insulating layer covering the layer, the substrate is introduced into a first processing chamber maintained in a reduced pressure state. Then, the sputtering gas from which hydrogen and moisture have been removed is discharged while removing the remaining moisture in the first processing chamber. A gas is introduced, and a metal oxide target is used to deposit a metal oxide film on the gate insulating layer. an oxide semiconductor layer is formed on the insulating film; and a source electrode layer and a drain electrode layer are formed over the oxide semiconductor layer. After that, the substrate is introduced into a second processing chamber, and hydrogen and A sputtering gas containing oxygen from which moisture has been removed is introduced, and the sputtering gas is then heated in the second processing chamber. A silicon oxide layer containing defects is formed on an oxide semiconductor layer using a target containing silicon. The substrate is heated to a temperature of 100 to 400° C. to remove hydrogen and oxygen contained in the oxide semiconductor layer. Alternatively, the present invention relates to a method for manufacturing a semiconductor device in which moisture is diffused toward a silicon oxide layer.

[0017] Another embodiment of the invention disclosed in this specification is a gate electrode layer on a substrate. After forming a gate insulating layer covering the layer, the substrate is introduced into a first processing chamber maintained in a reduced pressure state. Then, the sputtering gas from which hydrogen and moisture have been removed is discharged while removing the remaining moisture in the first processing chamber. A gas is introduced, and a metal oxide target is used to deposit a metal oxide film on the gate insulating layer. an oxide semiconductor layer is formed on the insulating film; and a source electrode layer and a drain electrode layer are formed over the oxide semiconductor layer. After that, the substrate is introduced into a second processing chamber, and hydrogen and A sputtering gas containing oxygen from which moisture has been removed is introduced, and the sputtering gas is then heated in the second processing chamber. A silicon oxide layer containing defects is formed on an oxide semiconductor layer using a target containing silicon. After that, the substrate is introduced into a third processing chamber maintained in a reduced pressure state, and residual water in the third processing chamber is removed. A sputtering gas containing nitrogen from which hydrogen and moisture have been removed is introduced while removing the components. Silicon nitride is deposited on a silicon oxide layer using a silicon-containing target installed in the processing chamber. Then, the substrate is heated to a temperature of 100 to 400° C. to form an oxide semiconductor layer. This is a method for manufacturing a semiconductor device in which hydrogen or moisture is diffused into a silicon oxide layer.

[0018] Another embodiment of the invention disclosed in this specification is a gate electrode layer on a substrate. After forming a gate insulating layer covering the layer, the substrate is introduced into a first processing chamber maintained in a reduced pressure state. Then, the sputtering gas from which hydrogen and moisture have been removed is discharged while removing the remaining moisture in the first processing chamber. A gas is introduced, and a metal oxide target is used to deposit a metal oxide film on the gate insulating layer. an oxide semiconductor layer is formed on the insulating film; and a source electrode layer and a drain electrode layer are formed over the oxide semiconductor layer. After that, the substrate is introduced into a second processing chamber, and hydrogen and A sputtering gas containing oxygen from which moisture has been removed is introduced, and the sputtering gas is then heated in the second processing chamber. A silicon oxide layer containing defects is formed on an oxide semiconductor layer using a target containing silicon. After that, the substrate is introduced into a third processing chamber maintained in a reduced pressure state, and the substrate is heated to a temperature of 100 to 40°C. The third treatment chamber was heated to a temperature of 0° C., and hydrogen and moisture were removed while removing residual moisture in the chamber. A sputtering gas containing nitrogen was introduced, and a silicon-containing terahertz gas was added to the third processing chamber. A silicon nitride layer is formed on the silicon oxide layer using a get, and the silicon nitride layer is included in the oxide semiconductor layer. This is a method for manufacturing a semiconductor device in which hydrogen or moisture is diffused into a silicon oxide layer.

[0019] Another embodiment of the invention disclosed in this specification is a gate electrode layer on a substrate. After forming a gate insulating layer covering the layer, the substrate is introduced into a first processing chamber maintained in a reduced pressure state. Then, the sputtering gas from which hydrogen and moisture have been removed is discharged while removing the remaining moisture in the first processing chamber. A gas is introduced, and a metal oxide target is used to deposit a metal oxide film on the gate insulating layer. an oxide semiconductor layer is formed on the insulating film; and a source electrode layer and a drain electrode layer are formed over the oxide semiconductor layer. After that, the substrate is introduced into a second processing chamber, and hydrogen and A sputtering gas containing oxygen from which moisture has been removed is introduced, and the sputtering gas is then heated in the second processing chamber. A silicon oxide layer containing defects is formed on an oxide semiconductor layer using a target containing silicon. The sputtering gas containing oxygen was switched to a nitrogen-containing gas from which hydrogen and moisture had been removed. Sputtering gas is introduced, and a target containing silicon is used in the second processing chamber. A silicon nitride layer is formed on the silicon oxide layer using a silicon nitride film. The substrate on which the silicon nitride layer is formed is then The oxide semiconductor layer is heated to a temperature of 0 to 400° C. to oxidize hydrogen or moisture contained in the oxide semiconductor layer. This is a method for manufacturing a semiconductor device in which the ions are diffused into the silicon layer.

[0020] In the method for manufacturing a semiconductor device, the substrate introduced into the second treatment chamber is heated to a temperature of 0° C. to 50° C. At this temperature, a silicon oxide layer including defects can be formed over the oxide semiconductor layer.

[0021] In the method for manufacturing a semiconductor device, the oxide semiconductor layer and / or the silicon oxide film is formed. When performing the above, the first processing chamber and / or the second processing chamber are evacuated using an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump is preferable. The adsorption type vacuum pump is preferably used for the oxide semiconductor layer and / or the silicon oxide layer. It acts to reduce the amount of hydrogen, hydroxyl groups or hydrides contained in the carbon film.

[0022] In the above-described method for manufacturing a semiconductor device, a target for depositing an oxide semiconductor layer is an oxide semiconductor layer. The target may contain zinc oxide as the main component. Metal oxides containing ammonium, gallium, and zinc can be used.

[0023] In the method for manufacturing a semiconductor device, a silicon-containing substrate for forming a silicon oxide film is used. The target can be a silicon semiconductor target or a synthetic quartz target. do.

[0024] Each of the above configurations solves at least one of the above problems.

[0025] The oxide semiconductor layer is InMO3(ZnO) m (m>0) A thin film transistor is fabricated using this thin film as an oxide semiconductor layer. , Ga, Fe, Ni, Mn, and Co. For example, M can be Ga, or Ga and Ni, or Ga and Fe, etc. In some cases, the above metal elements other than a are contained. In addition to the metal elements contained in the alloy, impurity elements include Fe, Ni and other transition metal elements, The oxide of the transition metal is contained in the material. O) m Among oxide semiconductor layers having a structure represented by (m>0), those having a structure containing Ga as M The oxide semiconductor is called In-Ga-Zn-O oxide semiconductor, and its thin film is called In-Ga-Z It is also called nO-based film.

[0026] In addition to the above, metal oxides that can be used for the oxide semiconductor layer include In-Sn-O, I n-Sn-Zn-O system, In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga -Zn-O series, Sn-Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al- Zn-O, In-O, Sn-O, and Zn-O metal oxides can be used Furthermore, the oxide semiconductor layer made of the metal oxide may contain silicon oxide.

[0027] In addition, an oxide conductive layer may be formed between the oxide semiconductor layer and the source electrode and the drain electrode. The oxide conductive layer and the metal layer for forming the source and drain electrodes are successively formed. is possible.

[0028] In addition, thin film transistors are easily damaged by static electricity, so the gate line or source A protection circuit for protecting the thin film transistors in the pixel area can be provided on the same substrate as the line. The protection circuit is preferably configured using a nonlinear element using an oxide semiconductor layer. It's nice.

[0029] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of processes or stacking. Furthermore, the specific names used in this specification are not intended to identify the invention. This does not indicate [Effects of the Invention]

[0030] A semiconductor device including an oxide semiconductor and having stable electrical characteristics can be provided. [Brief explanation of the drawings]

[0031] [Figure 1] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 2] FIG. 2 is a diagram illustrating an example of a film formation apparatus. [Figure 3] FIG. 2 is a diagram illustrating an example of a film formation apparatus. [Figure 4] FIG. 2 is a diagram illustrating an example of a film formation apparatus. [Figure 5] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C illustrate a semiconductor device. [Figure 8] 1A and 1B are diagrams illustrating pixel equivalent circuits of a semiconductor device. [Figure 9] 1A to 1C illustrate a semiconductor device. [Figure 10] 1A to 1C illustrate a semiconductor device. [Figure 11] 1A to 1C illustrate a semiconductor device. [Figure 12] 1A to 1C illustrate a semiconductor device. [Figure 13] 1A to 1C illustrate a semiconductor device. [Figure 14] 1A to 1C illustrate a semiconductor device. [Figure 15] 1A and 1B are diagrams illustrating pixel equivalent circuits of a semiconductor device. [Figure 16] 1A to 1C illustrate a semiconductor device. [Figure 17] 1A and 1B are diagrams illustrating electronic devices. [Figure 18] 1A and 1B are diagrams illustrating electronic devices. [Figure 19] 1A and 1B are diagrams illustrating electronic devices. [Figure 20] 1A and 1B are diagrams illustrating electronic devices. [Figure 21] 1A and 1B are diagrams illustrating electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0032] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and various modifications in form and details are possible by those skilled in the art. Furthermore, the present invention should not be construed as being limited to the description of the following embodiments. It is not something that can be done.

[0033] (Embodiment 1)

[0034] One mode of a semiconductor device and a manufacturing method of the semiconductor device of this embodiment will be described with reference to FIGS. The semiconductor device described in this embodiment mode is a thin film transistor.

[0035] 1A to 1E show examples of cross-sectional structures of semiconductor devices. The thin film transistor 110 is one of the bottom gate structures called a channel etch type. It is also called an inverted staggered thin film transistor.

[0036] The thin film transistor 110 will be described using a thin film transistor with a single gate structure. However, if necessary, a thin-film transistor with a multi-gate structure having multiple channel formation regions may be used. A data can also be formed.

[0037] 1(A) to 1(E), a thin film transistor 110 is fabricated on a substrate 100. The process will be explained.

[0038] First, a conductive film is formed on a substrate 100 having an insulating surface, and then a first photolithography is performed. The gate electrode layer 101 is formed by the process. The end of the formed gate electrode layer has a tapered shape. This is preferable because it improves the coverage of the gate insulating layer to be laminated thereon. The mask may be formed by an ink-jet method. This eliminates the need for a photomask, thereby reducing manufacturing costs.

[0039] There is no significant limitation on the substrate that can be used for the substrate 100 having an insulating surface. In either case, it is necessary for the barium phosphate to have sufficient heat resistance to withstand subsequent heat treatment. A glass substrate such as borosilicate glass or aluminoborosilicate glass can be used.

[0040] In addition, for glass substrates, if the temperature of the subsequent heat treatment is high, the distortion point will be 730°C or higher. For the glass substrate, for example, aluminosilicate glass, aluminum Glass materials such as lumino borosilicate glass and barium borosilicate glass are used. In addition, by containing more barium oxide (BaO) than boron oxide, it is more practical. Therefore, a glass substrate containing more BaO than B2O3 is used. It is preferable to

[0041] Instead of the glass substrate, an insulating substrate such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. A substrate made of an insulating material may also be used. Alternatively, a substrate made of crystallized glass may also be used. A plastic substrate or the like can also be used as appropriate.

[0042] An insulating film serving as a base film may be provided between the substrate 100 and the gate electrode layer 101. , which has the function of preventing the diffusion of impurity elements from the substrate 100, and The insulating film is made of one or more films selected from a silicon film, a silicon nitride oxide film, and a silicon oxynitride film. The insulating film can be formed by a laminated structure.

[0043] The material of the gate electrode layer 101 is selected from the group consisting of molybdenum, titanium, chromium, tantalum, and tungsten. Metallic materials such as zinc, aluminum, copper, neodymium, scandium, etc., or materials containing these as their main components The insulating film 10 can be formed as a single layer or a stacked layer using an alloy material.

[0044] For example, the gate electrode layer 101 may have a two-layer laminate structure, such as a molybdenum layer on an aluminum layer. Two-layer structure with a layer stacked on top of a copper layer, or a two-layer structure with a molybdenum layer stacked on top of a copper layer, or The two-layer structure is a titanium nitride layer or tantalum nitride layer laminated on a copper layer, and the titanium nitride layer and molybdenum nitride layer are It is preferable to have a two-layer structure in which a tungsten layer is laminated. A layer of tungsten or tungsten nitride and an alloy of aluminum and silicon or aluminum Preferably, the titanium nitride layer is a laminate of a titanium alloy and a titanium nitride layer. Note that the gate electrode layer can also be formed using a light-transmitting conductive film. Examples of the conductive film include a transparent conductive oxide.

[0045] Next, the gate insulating layer 102 is formed on the gate electrode layer 101 .

[0046] The gate insulating layer 102 is formed by depositing silicon oxide using a plasma CVD method, a sputtering method, or the like. a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, or an aluminum oxide layer The gate insulating layer 102 can be formed as a single layer or a stacked layer. In order to prevent a large amount of the oxide from being contained, the gate insulating layer 102 is formed by sputtering. When forming a silicon oxide film by sputtering, it is preferable to A silicon target or a quartz target is used as the sputtering target, and oxygen is used as the sputtering gas. The process is carried out using oxygen or a mixed gas of oxygen and argon.

[0047] The gate insulating layer 102 is formed by stacking a silicon nitride layer and a silicon oxide layer from the gate electrode layer 101 side. For example, a layered structure can be formed by sputtering as the first gate insulating layer. A silicon nitride layer (SiN) with a thickness of 50 nm or more and 200 nm or less is formed. y (y>0) On the first gate insulating layer, an oxide film having a thickness of 5 nm to 300 nm is formed as a second gate insulating layer. Silicon oxide layer (SiO x (x>0)) is laminated to form a gate insulating layer with a thickness of 100 nm. .

[0048] In addition, in order to prevent hydrogen, hydroxyl groups, and moisture from being contained in the gate insulating layer 102 as much as possible, As a pre-treatment for film formation, a gate electrode layer 101 is formed in a pre-heating chamber of a sputtering device. The substrate 100 is heated at a temperature of 200° C. or higher to remove impurities adsorbed on the substrate 100. It is preferable that

[0049] Next, an oxide semiconductor layer 12 having a thickness of 2 nm to 200 nm is formed on the gate insulating layer 102. 0 (see Figure 1(A)).

[0050] Before the oxide semiconductor layer 120 is formed by sputtering, argon gas is introduced. The reverse sputtering is performed by introducing the silicon dioxide into the gate insulating layer 102 to generate plasma. It is preferable to remove the dust that has accumulated on the substrate. By applying a voltage to the plate side using an RF power supply, the substrate surface is exposed to plasma and the surface It is a method of modifying the argon atmosphere by using nitrogen, helium, oxygen, etc. That's fine.

[0051] The oxide semiconductor layer 120 is formed by sputtering. n-Ga-Zn-O based film, In-Sn-Zn-O based, In-Al-Zn-O based, Sn-G a-Zn-O system, Al-Ga-Zn-O system, Sn-Al-Zn-O system, In-Zn-O system , Sn-Zn-O, Al-Zn-O, In-O, Sn-O, and Zn-O oxides In this embodiment, the oxide semiconductor layer 120 is an In—Ga—Zn—O system The oxide semiconductor layer is formed by a sputtering method using a metal oxide target. 120 is a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas (typically It can be formed by sputtering in an atmosphere of argon and oxygen. In addition, when using a sputtering method, a film containing 2% by weight or more and 10% by weight or less of SiO2 is used. The oxide semiconductor layer 120 is formed using a target, and a SiOx (X> 0) to prevent the oxide semiconductor from crystallizing during heat treatment in a later process. It is preferable to do so.

[0052] As a target for forming the oxide semiconductor layer 120 by a sputtering method, zinc oxide A metal oxide target containing the metal oxide as the main component can be used. Another example of a target is a metal oxide target containing In, Ga, and Zn (composition ratio and Therefore, In2O3:Ga2O3:ZnO=1:1:1 [molar ratio] can be used. In addition, as a metal oxide target containing In, Ga, and Zn, In2O3:Ga 2O3:ZnO=2:2:1 [molar ratio], or In2O3:Ga2O3:ZnO=1 A target having a composition ratio of 1:4 (molar ratio) can also be used. The target filling rate is 90% to 100%, preferably 95% to 99.9%. By using a metal oxide target with a high filling rate, the oxide semiconductor layer formed is finely divided. A dense film forms.

[0053] The substrate is held in a processing chamber maintained in a reduced pressure state, and the substrate is heated to a temperature above room temperature but below 400°C. Then, the remaining moisture in the processing chamber is removed, and the sputtering gas from which hydrogen and moisture have been removed is heated. A metal oxide is used as a target to form an oxide semiconductor layer 120 on the substrate 100. To remove residual moisture in the processing chamber, an adsorption type vacuum pump is used. For example, a cryopump, an ion pump, or a titanium sublimation pump is preferable. As an exhaust means, a turbo molecular pump and a cold trap are preferably used. The deposition chamber evacuated using a cryopump may be filled with, for example, hydrogen. Because atoms, compounds containing hydrogen atoms such as H2O, and compounds containing carbon atoms are exhausted Therefore, the concentration of impurities contained in the oxide semiconductor layer formed in the deposition chamber can be reduced.

[0054] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed direct current (DC) power supply is used, the powdery substances (particles) generated during film formation are This is preferable because it can reduce the amount of dust (also called crumbs or dust) and make the film thickness distribution uniform. The thickness of the layer is preferably 5 nm to 30 nm. The appropriate thickness varies depending on the material.

[0055] Note that oxygen gas, nitrogen, helium, neon, and argon introduced when forming the oxide semiconductor layer are It is preferable that the rare gas such as argon does not contain impurities such as water and hydrogen. 6N (99.9999%) or more, preferably 7N (99.99999%) or more (i.e., non- It is preferable to keep the concentration of impurities at 1 ppm or less, preferably 0.1 ppm or less.

[0056] By forming the oxide semiconductor layer 120 by the sputtering method as described above, the secondary ions Secondary Ion Mass Spectromet (SIMS) The hydrogen concentration determined by the 19 cm -3 Preferably 5 x 10 or less 18 c m -3 An oxide semiconductor layer in which the following is suppressed can be obtained.

[0057] The sputtering method uses a high frequency power supply as the sputtering power source. There are two methods: DC sputtering and pulsed DC sputtering, which applies a bias voltage in a pulsed manner. RF sputtering is mainly used to deposit insulating films, while DC sputtering is also used. The sputtering method is mainly used when forming a metal film.

[0058] There are also multi-target sputtering systems that can accommodate multiple targets of different materials. The sputtering equipment can deposit layers of different materials in the same chamber, or It is also possible to form films by discharging multiple types of materials simultaneously using the bar.

[0059] In addition, a magnetron sputtering method using a magnet mechanism inside the chamber is used. E using a plasma generated by microwaves without glow discharge. There is a sputtering device that uses the CR sputtering method.

[0060] In addition, as a film formation method using the sputtering method, the target material and the sputtering Reactive sputtering is a method of forming a compound thin film by chemically reacting the gas components with the There are also methods such as a sputtering method in which a voltage is applied to the substrate during film formation, and a bias sputtering method in which a voltage is also applied to the substrate during film formation.

[0061] Next, the oxide semiconductor layer is subjected to a second photolithography process to form island-shaped oxide semiconductor layers 1 In addition, in order to form the island-shaped oxide semiconductor layer 121, The resist mask for this purpose may be formed by an ink-jet method. When the film is formed by the PET method, no photomask is used, and therefore the manufacturing cost can be reduced.

[0062] In addition, when a contact hole is formed in the gate insulating layer 102, the process is performed using an oxide semiconductor. This can be done when layer 121 is formed.

[0063] The etching of the oxide semiconductor layer 120 here can be performed by dry etching or wet etching. Alternatively, either etching or both may be used.

[0064] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, for example For example, chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), carbon tetrachloride (CC l4) etc.) are preferred.

[0065] In addition, gases containing fluorine (fluorine-based gases, such as carbon tetrafluoride (CF4) and sulfur fluoride (SF 6), nitrogen fluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr ), oxygen (O2), and rare gases such as helium (He) and argon (Ar) Additive gases, etc. can be used.

[0066] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing) method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired processed shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were determined as follows: The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0067] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0068] In addition, after wet etching, the etching solution is washed away together with the etched material. The waste etching solution containing the removed material is purified to remove the contained material. The indium and the like contained in the oxide semiconductor layer may be recycled from the waste liquid after etching. By recovering and reusing materials, resources can be used more effectively and costs can be reduced. .

[0069] The etching conditions (etching) are adjusted to suit the material so that the desired processing shape can be etched. The etching conditions (liquid, etching time, temperature, etc.) are adjusted appropriately.

[0070] Note that reverse sputtering is performed before forming a conductive film in the next step, and the oxide semiconductor layer 121 and It is preferable to remove resist residues adhering to the surface of the gate insulating layer 102. .

[0071] Next, a conductive film is formed over the gate insulating layer 102 and the oxide semiconductor layer 121. The conductive film can be formed by sputtering or vacuum deposition. Elements selected from r, Cu, Ta, Ti, Mo, and W, or materials containing the above elements as components Examples of the alloy include an alloy film of the above elements, and an alloy film of a combination of the above elements. Using one or more materials selected from the group consisting of sodium, zirconium, and beryllium The metal conductive film may have a single layer structure or a laminated structure of two or more layers. 2. A single layer structure of aluminum film containing silicon, 3. A titanium film laminated on an aluminum film. Layer structure: Ti film, aluminum film is layered on top of the Ti film, and Ti In addition, titanium (Ti) and tantalum (T a), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), An alloy film made of a single or multiple combinations of elements selected from scandium (Sc), or A nitride film may also be used.

[0072] A resist mask is formed on the conductive film by a third photolithography process, and selective etching is performed. After forming the source electrode layer 115a and the drain electrode layer 115b by etching, The mask is removed (see Figure 1(C)).

[0073] Note that the conductive film was etched so that the oxide semiconductor layer 121 was not removed. The material and etching conditions are adjusted appropriately.

[0074] In this embodiment, a Ti film is used as the conductive film, and an In—Ga -Zn-O oxide was used, and the etching solution was ammonia hydrogen peroxide (31% by weight peroxide). A Ti film was etched as a conductive film using a mixture of hydrogen chloride water, 28% by weight of ammonia water, and water (5:2:2). Switch.

[0075] In the third photolithography step, only a part of the oxide semiconductor layer 121 is etched. In some cases, the source electrode layer 1 is formed as an oxide semiconductor layer having a groove (a recess). 15a, a resist mask for forming the drain electrode layer 115b is formed by an ink jet method. If the resist mask is formed by the inkjet method, a photomask can be used. Therefore, manufacturing costs can be reduced.

[0076] In addition, in order to reduce the number of photomasks and steps used in the photolithography process, The resist mask is formed by a multi-tone mask, which is an exposure mask that allows the incident light to have multiple intensities. The etching process may be performed using a resist mask formed using a multi-tone mask. The mask has a shape with multiple film thicknesses, and the shape can be further deformed by etching. Therefore, it can be used in multiple etching processes to process different patterns. Therefore, one multi-tone mask can handle at least two different patterns. Therefore, the number of exposure masks can be reduced. Since the corresponding photolithography process can also be eliminated, the process can be simplified.

[0077] Exposed oxides by plasma treatment with gases such as N2O, N2, or Ar It is also possible to remove adsorbed water and other substances adhering to the surface of the semiconductor layer. Plasma treatment may be performed using a gas.

[0078] When plasma treatment is performed, a protective film that is in contact with a part of the oxide semiconductor layer is formed without being exposed to the air. A silicon oxide layer 116 is formed as an oxide insulating layer that serves as an insulating film. The oxide semiconductor layer 121 does not overlap with the source electrode layer 115a and the drain electrode layer 115b. The oxide semiconductor layer 121 and the silicon oxide layer 116 are formed so as to be in contact with each other in the above-described region.

[0079] The silicon oxide layer 116 includes an island-shaped oxide semiconductor layer 121, a source electrode layer 115a, and a drain electrode layer 115b. The substrate 100 on which the rain electrode layer 115b has been formed is heated to a temperature equal to or higher than room temperature but lower than 100°C. A sputtering gas containing high-purity oxygen from which hydrogen and moisture have been removed is introduced into the silicon ter The silicon oxide layer 116 is formed using a target. The film is formed to be a silicon oxide (SiOx, preferably x is 2 or more) layer.

[0080] For example, a silicon target with a purity of 6N (99.9999%) and doped with boron is The distance between the target and the substrate (TS distance) was 89 mm, pressure 0.4 Pa, direct current (DC) power supply 6 kW, oxygen (oxygen flow rate 100%) A silicon oxide film is formed by pulse DC sputtering in a 300 MPa atmosphere. nm. Instead of a silicon target, quartz (preferably synthetic quartz) is used to form a silicon oxide film. It can be used as a target for forming a silicon film. The gas used is oxygen or a mixture of oxygen and argon.

[0081] The sputtering gas introduced when forming the silicon oxide layer does not contain impurities such as water or hydrogen. It is preferable that no impurities are included. For example, the purity of hydrogen gas is 6N (99.9999%). or more, preferably 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, Preferably, it is 0.1 ppm or less.

[0082] In this case, the silicon oxide layer 116 is formed while removing the remaining moisture in the processing chamber. It is preferable that the oxide semiconductor layer 121 and the silicon oxide layer 116 contain hydrogen, a hydroxyl group, or moisture. This is to ensure that the following is not included.

[0083] Note that instead of the silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, or an oxide An aluminum nitride layer or the like can also be used.

[0084] Next, the silicon oxide layer 116 containing defects and the oxide semiconductor layer 121 are in contact with each other. The heat treatment is performed at a temperature of from 0° C. to 400° C. The oxide semiconductor layer 121 is The hydrogen or moisture can be diffused into the silicon oxide layer 116 containing defects. Since the oxide silicon layer 116 contains many defects (dangling bonds), the oxide semiconductor Impurities such as hydrogen, hydroxyl groups, and moisture contained in the layer 121 are absorbed by the oxide semiconductor layer 121 and the silicon oxide layer. The oxide layer 116 is then diffused through the interface with the silicon oxide layer 116. The hydrogen atoms contained in the compound semiconductor layer 121, compounds containing hydrogen atoms such as H2O, and carbon atoms Compounds containing atoms can be easily diffused and transferred to the silicon oxide layer 116 .

[0085] Regarding the diffusion of hydrogen from the oxide semiconductor layer to the silicon oxide layer, the hydrogen atoms (amorphous IGZO) and silicon oxide layer (amorphous SiO x ) in which We calculated how likely it was to exist.

[0086] The binding energy E_bind of hydrogen atoms is used to evaluate the stability of hydrogen atoms in the environment. was defined as follows and evaluated: E_bind={E(original structure)+E(H)}-E(H The larger the binding energy E_bind, the easier it is for the hydrogen atom to exist. E(original structure), E(H) E(structure with H added) are the original structure The energy of the hydrogen atom and the energy of the structure with the H added are shown. Energy is transferred to amorphous IGZO, an amorphous material without dangling bonds (hereinafter abbreviated as DB). The calculations were performed for four types of amorphous SiO2, two types of amorphous SiOx with DB, and Ta.

[0087] The calculation was performed using the density functional calculation program CASTEP. The plane wave basis pseudopotential method was used as the cutoff energy. The energy was set to 300 eV. The k-points were arranged in a 2 × 2 × 2 grid.

[0088] The calculated structure is described below. First, the original structure is described below. Amorphous The unit cell of IGZO consists of 12 In atoms, 12 Ga atoms, 12 Zn atoms, and 48 O atoms. The unit cell of amorphous SiO2 without DB is 16 Si atoms. Amorphous SiOx(1) with DB contains 32 atoms of D, 32 atoms of O, totaling 48 atoms. Remove O from amorphous SiO2 without B, and add H to one of the Si atoms bonded to the O. In other words, it has a structure in which 16 Si atoms, 31 O atoms, and 1 H atom are bonded together, for a total of 48 atoms. Amorphous SiOx(2) with DB is the same as amorphous SiO2 without DB. The structure is one in which Si is removed from the above and H is bonded to three of the O atoms that were bonded to the Si. It contains 15 Si atoms, 32 O atoms, and 3 H atoms, for a total of 50 atoms. is a structure in which H is added to the above four structures. In amorphous IGZO, H is O atoms, Si in amorphous SiO2 without DB, and Si in amorphous SiOx with DB. The structure for which H was calculated contains one H in the unit cell. The cell sizes of each structure are summarized in Table 1.

[0089] [Table 1]

[0090] The calculation results are shown in Table 2.

[0091] [Table 2]

[0092] From the above, if there is a DB in which Si is removed and three of the Os that were bonded to the Si are bonded to H, Amorphous SiOx(2) has the largest binding energy, followed by O removal and bonding with the O. SiOx(1) is made by bonding H to one of the Si atoms, followed by IGZO, and the smallest is The order was amorphous SiO2 without DB. Therefore, hydrogen is It is most stable when bound to the DB.

[0093] Therefore, the following process is considered. Amorphous SiOx has a large amount of DB. Therefore, the hydrogen atoms diffusing through the amorphous IGZO-amorphous SiOx interface are It is stabilized by being captured by the DB in the amorphous SiOx. Therefore, the amorphous IGZ The hydrogen atoms in O move to DBs in amorphous SiOx.

[0094] Furthermore, in the case of DB, which is a structure in which tangling bonds are generated by removing Si, Amorphous SiOx(2) has a structure in which tangling bonds are generated by removing O. The binding energy is larger than that of amorphous SiOx(1) when a certain DB is present. In SiOx, hydrogen atoms are more stable when bonded to O. In this case, it is preferable that x is 2 or more.

[0095] In the silicon oxide layer containing defects, silicon oxide containing many dangling oxygen bonds as defects In the oxide semiconductor layer, the binding energy for hydrogen is stronger, so more hydrogen is released from the oxide semiconductor layer. Impurities, including hydrogen or silicon, can be diffused into the silicon oxide layer containing defects. Therefore, in SiOx, x is preferably 2 or more.

[0096] Furthermore, when the silicon oxide layer 116 is formed in contact with the oxide semiconductor layer 121, A mixed region 119 containing an oxide semiconductor and silicon oxide is formed at the interface between the layer and the silicon oxide layer. (See Figure 1(D))

[0097] The mixed region 119 is formed of at least one of oxygen, silicon, and an oxide semiconductor. Contains metal elements. For example, an In-Ga-Zn-O oxide is used as the oxide semiconductor. In this case, the mixed region contains at least one metal element selected from In, Ga, and Zn, and The metal contained in the oxide semiconductor in the mixed region is M. It exists in various forms such as M-OH, MH, MO-Si-H, and MO-Si-OH. Collars, for example, Zn-H and Zn-OH are possible.

[0098] The thickness of the mixed region is 1 nm to 10 nm, preferably 2 nm to 5 nm. The thickness of the silicon oxide layer is controlled by the film formation conditions of the sputtering method used to form the silicon oxide layer. The power of the sputtering power supply can be increased, and the distance between the substrate and the target can be increased. If the distance is closer, the mixed region can be formed thicker. By performing a sputtering method, adsorbed water and the like attached to the surface of the oxide semiconductor layer are removed. It is also possible to do so.

[0099] By providing the mixed region 119 between the oxide semiconductor layer 121 and the silicon oxide layer 116, Therefore, hydrogen atoms contained in the oxide semiconductor layer 121 and hydrogen atoms such as H2O are more likely to be present. The diffusion of the compounds and compounds containing carbon atoms into the silicon oxide layer 116 is promoted, and the movement It becomes easier.

[0100] Through the above steps, a thin film having the oxide semiconductor layer 112 in which the concentrations of hydrogen and hydride are reduced is formed. A transistor 110 can be formed (see FIG. 1(E)).

[0101] When forming the oxide semiconductor layer as described above, it is necessary to remove residual moisture in the reaction atmosphere. As a result, the concentrations of hydrogen and hydride in the oxide semiconductor layer can be reduced. The oxide semiconductor layer can be stabilized.

[0102] A protective insulating layer may be provided over the oxide insulating layer. In this embodiment, the protective insulating layer 103 is formed by an oxide insulating film. The protective insulating layer 103 is formed on the silicon nitride layer 116. The protective insulating layer 103 may be a silicon nitride film, a nitride oxide film, or the like. A silicon nitride film, an aluminum nitride film, or the like is used.

[0103] The substrate 100 on which the silicon oxide layer 116 has been formed as the protective insulating layer 103 is heated to 100°C. The sputtering gas containing high-purity nitrogen, from which hydrogen and moisture have been removed, is heated to a temperature of 400°C. A silicon nitride film is formed by introducing a gas and using a silicon semiconductor target. In the same manner as the silicon oxide layer 116, the protective insulating layer is also formed while removing the remaining moisture in the processing chamber. It is preferable to deposit 103.

[0104] The sputtering gas introduced when forming the silicon nitride film does not contain impurities such as water or hydrogen. It is preferable that no impurities are included. For example, the purity of nitrogen gas is 6N (99.9999%). or more, preferably 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, Preferably, it is 0.1 ppm or less.

[0105] When forming the protective insulating layer 103, the temperature is set to 100° C. to 400° C. during the formation of the protective insulating layer 103. By heating the plate 100, hydrogen or moisture contained in the oxide semiconductor layer is converted into oxide insulating material. The silicon dioxide layer (a silicon dioxide film containing defects) can be diffused into the silicon dioxide layer. After forming 116, a heat treatment may not be necessary.

[0106] When the silicon oxide layer 116 and the silicon nitride layer as the protective insulating layer 103 are stacked, the silicon oxide layer The silicon layer and silicon nitride layer are formed in the same processing chamber using a common silicon target. First, a sputtering gas containing oxygen is introduced into the processing chamber. A silicon oxide layer is formed using a silicon target, and then the sputtering gas is changed to nitrogen. Silicon nitride was deposited using the same silicon target by switching to a sputtering gas containing silicon. A silicon oxide layer and a silicon nitride layer are successively formed without exposure to the atmosphere. This prevents impurities such as hydrogen and moisture from being adsorbed on the surface of the silicon oxide layer. In this case, the silicon oxide layer 116 and the protective insulating layer 103 are made of silicon nitride. After stacking the silicon layer, hydrogen or moisture contained in the oxide semiconductor layer is removed by the oxide insulating layer (defect If a heat treatment (at a temperature of 100 to 400°C) is performed to diffuse the silicon dioxide into the silicon oxide film containing the defects, good.

[0107] The sputtering gas introduced when forming the silicon oxide film or silicon nitride film is It is preferable that the gas does not contain impurities such as water and hydrogen. For example, oxygen gas or nitrogen gas The purity of 6N (99.9999%) or more, preferably 7N (99.99999%) or more, (i.e., the impurity concentration is preferably 1 ppm or less, and more preferably 0.1 ppm or less) .

[0108] After the protective insulation layer is formed, it is further heated in air at 100°C to 200°C for 1 hour to 30 hours. This heat treatment may be carried out by maintaining a constant heating temperature. In addition, the temperature rises from room temperature to a heating temperature of 100°C or more and 200°C, and the temperature rises from the heating temperature to room temperature. The temperature may be lowered several times. Alternatively, the heating may be carried out under reduced pressure. When the heating treatment is carried out under reduced pressure, the heating time can be shortened. By this heat treatment, a normally-off thin film transistor can be obtained. Therefore, the reliability of the semiconductor device can be improved.

[0109] By heating the substrate and forming a silicon nitride layer on the silicon oxide layer containing defects, the oxidation Hydrogen and moisture are diffused from the compound semiconductor layer into the silicon oxide film, while moisture is simultaneously penetrated from the outside air. A barrier film can be provided to prevent the intrusion of oxygen.

[0110] In addition, when an oxide semiconductor layer serving as a channel formation region is formed over a gate insulating layer, a reaction By removing residual moisture in the atmosphere, the concentrations of hydrogen and hydride in the oxide semiconductor layer are reduced. Furthermore, when a silicon oxide layer having defects is provided in contact with the oxide semiconductor layer, the defect can be reduced. By this, hydrogen and moisture in the oxide semiconductor layer are diffused into the silicon oxide film, and the moisture in the oxide semiconductor layer is The concentrations of hydrogen and hydrogen compounds can be reduced.

[0111] The above process can be applied to LCD panels, electroluminescent display panels, and electronic ink displays. Used in the manufacture of backplanes (substrates on which thin film transistors are formed) for display devices The above process is carried out at a temperature of 400°C or less, so the thickness is 1 mm or less. It can also be applied to manufacturing processes using glass substrates with sides exceeding 1 m. All processes can be carried out at temperatures below 00°C, making it ideal for manufacturing display panels. This means that you don't have to consume a lot of energy.

[0112] FIG. 3 shows a semiconductor device that can be used for manufacturing an oxide semiconductor layer and a semiconductor device using the oxide semiconductor layer. 1 shows an example of a film forming apparatus 1000.

[0113] The film forming apparatus 1000 has a loader chamber 1110 and an unloader chamber 1120. A cassette 1111 for storing unprocessed substrates and a cassette 112 for storing processed substrates. 1 is installed. Between the loader room 1110 and the unloader room 1120, a first transport There is a transfer chamber 1100, in which a transfer means 1101 for transferring a substrate is installed.

[0114] The film forming apparatus 1000 includes a second transfer chamber 1200. The means 1201 is installed, and four processing chambers (first processing chamber 12) are connected to the periphery through gate valves. 10, the second treatment chamber 1220, the third treatment chamber 1230, and the fourth treatment chamber 1240 The first processing chamber 1210 is connected to the first transfer chamber via a gate valve. One end is connected to the chamber 1100 and the other end is connected to the second transfer chamber 1200.

[0115] The second transfer chamber 1200, the first processing chamber 1210, the second processing chamber 1220, the third processing chamber 1 The fourth processing chamber 1230 and the fourth processing chamber 1240 are equipped with exhaust means 1205 and exhaust means 1215, respectively. , exhaust means 1225, exhaust means 1235, and exhaust means 1245 are provided. These exhaust means may be selected appropriately depending on the intended use of each processing chamber. It is preferable that the exhaust means is provided with a cryopump. The means may be equipped with a cap.

[0116] When forming an oxide semiconductor layer, not only the treatment chamber for forming the oxide semiconductor layer but also the oxygen In the process before and after the film formation of the film in contact with the oxide semiconductor layer and the oxide semiconductor layer, Use a pumping method such as a cryopump to prevent the water from being mixed in as an impurity. is preferred.

[0117] The first processing chamber 1210 is provided with a substrate heating means 1211. The chamber 1210 is a transfer chamber that is connected to the first transfer chamber 1100 under atmospheric pressure and the second transfer chamber 1200 under reduced pressure. The transfer chamber serves as a transfer chamber for transporting the substrate. The transport chamber 1200 can be protected from atmospheric contamination.

[0118] The second processing chamber 1220, the third processing chamber 1230, and the fourth processing chamber 1240 each include A silicon nitride film, a silicon oxide film, and an oxide semiconductor layer are formed by a sputtering method. That is, each processing chamber is provided with a target and a substrate heating means. A gas supply means for introducing a sputtering gas and a glow discharge generating means are added. do.

[0119] An example of the operation of the film forming apparatus 1000 will be described. Here, as shown in FIG. A method for successively forming a gate insulating layer and an oxide semiconductor layer on a substrate on which a gate electrode layer 101 has been formed. Explain the law.

[0120] The transfer means 1101 transfers the gate electrode 101 from the cassette 1111 to the first processing chamber 1210. Then, the gate valve is closed and the first processing chamber 1210 The substrate 100 is preheated by the above method, and impurities adsorbed on the substrate are desorbed and exhausted. For example, hydrogen atoms, compounds containing hydrogen atoms such as H2O, and compounds containing carbon atoms. .

[0121] Next, the substrate 100 is transferred to the second processing chamber 1220, where a silicon nitride film is formed. The substrate 100 is transferred to the third processing chamber 1230, where a silicon oxide film is formed to form a gate insulating layer 1. The second processing chamber 1220 and the third processing chamber 1230 are equipped with a cryopump or the like. It is preferable that the film formation chamber is evacuated by the gas, and the impurity concentration in the film formation chamber is reduced. The silicon nitride film and silicon oxide film stacked in the processing chamber contain hydrogen, hydroxyl groups, or It is used as the gate insulating layer 102 in which moisture and the like are suppressed.

[0122] The substrate 100 is then transferred to the fourth processing chamber 1240. The fourth processing chamber 1240 contains an oxidizing It is equipped with a target for semiconductors and a cryopump as an exhaust means. In the fourth treatment chamber 1240, an oxide semiconductor layer is formed.

[0123] A method for forming the oxide semiconductor layer 120 in the fourth treatment chamber 1240 will be described with reference to FIG. As shown in FIG. 2, the fourth processing chamber 1240 is connected to the main valve via an exhaust chamber 5002. Therefore, it is connected to the exhaust means 1245, the power supply 5003, the dry pump 5001, the cathode 5 005, stage lifting mechanism 5006, substrate stage 5007, gate valve 5008, cooling The cooling water 5009, the flow rate regulator 5010, and the gas tank 5011 are included. The substrate 100 is held on the cathode 5007, and the oxide semiconductor target 5005 is attached to the cathode 5005 side. 004 is attached.

[0124] The fourth processing chamber 1240 is first evacuated by a dry pump 5001 through an exhaust chamber 5002. Next, the air is evacuated by the evacuation means 1245, which is a cryopump. Impurities such as hydrogen, moisture, hydrides, and hydrogen compounds are exhausted from the processing chamber 1240. Instead of a cryopump, a turbomolecular pump is used, and the intake port of the turbomolecular pump is A cold trap for adsorbing moisture and the like may be provided on top of the filter.

[0125] The substrate 100 having the gate insulating layer 102 formed thereon is passed through the gate valve 5008 to the fourth processing stage. The substrate is transported to the processing chamber 1240 and held on the substrate stage 5007. The sputtering gas is supplied to the fourth processing chamber 124 while controlling the flow rate by the flow rate regulator 5010. 0, and a voltage is applied to the cathode 5005 from the power supply 5003 to generate plasma. The oxide semiconductor layer 120 is formed over the substrate 100 using the target 5004 .

[0126] Although the fourth processing chamber has been described as an example in FIG. 2, the fourth processing chamber may be any processing chamber in the film forming apparatus in this specification. The method of FIG. 2 can also be applied appropriately.

[0127] In the fourth processing chamber 1240, the moisture remaining in the chamber is removed by a cryopump, and the oxide The hydrogen concentration in the semiconductor layer 120 can be reduced. The film is formed while heating the substrate. The moisture remaining in the processing chamber is removed by a cryopump. By performing sputtering deposition, the substrate temperature during deposition of the oxide semiconductor layer 120 is set to room temperature. The temperature can be set to 400°C or lower.

[0128] As described above, the film formation apparatus 1000 is used to form the oxide semiconductor layer 102 from the gate insulating layer 102. 20 can be formed continuously. In FIG. 3, three or more processing chambers are connected via a transfer chamber. For example, a board having an entrance and an exit for the board may be provided. Alternatively, the processing chambers may be connected to one another, ie, in-line.

[0129] FIG. 4 shows a state in which a silicon oxide layer 11 is formed on an island-shaped oxide semiconductor layer 121 as shown in FIG. 1(C). 6 and a protective insulating layer 103.

[0130] The film forming apparatus 3000 has a loader chamber 3110 and an unloader chamber 3120, A cassette 3111 for storing unprocessed substrates and a cassette 312 for storing processed substrates. 1 is installed.

[0131] The film forming apparatus 3000 also includes a first transfer chamber 3100. A transfer means 3101 is installed in the first processing chamber 3101, and five processing chambers (first processing chamber 3102) are connected to the second processing chamber 3103 via gate valves. chamber 3210, a second processing chamber 3220, a third processing chamber 3230, a fourth processing chamber 3240, and and the fifth treatment chamber 3250).

[0132] Loader chamber 3110, unloader chamber 3120, first transfer chamber 3100, first processing chamber 3 210, a second processing chamber 3220, a third processing chamber 3230, a fourth processing chamber 3240, and The processing chamber 3250 of No. 5 is provided with an exhaust means 3115, an exhaust means 3125, and an exhaust means 31 05, exhaust means 3215, exhaust means 3225, exhaust means 3235, exhaust means 3245, and and exhaust means 3255 are provided, and a reduced pressure state can be achieved. The appropriate exhaust system can be selected depending on the intended use of each processing chamber. It is preferable to use a turbo molecular pump equipped with a cold trap. It's okay to have one.

[0133] The loader chamber 3110 and the unloader chamber 3120 transport the substrate to the first transport chamber 3100. By providing the delivery chamber, the first transport chamber 3 100 can be protected from atmospheric pollution.

[0134] The first processing chamber 3210 and the fourth processing chamber 3240 are each equipped with a substrate heating means 3211, and a substrate heating means 3241. On the substrate 30, a silicon oxide film and a silicon nitride film are formed by sputtering. That is, each processing chamber is provided with a target and a substrate heating means. A gas supply means for introducing a sputtering gas and a glow discharge generating means are added. The fifth processing chamber 3250 is provided with a cooling means 3251 .

[0135] An example of the operation of the film forming apparatus 3000 will be described. A method for forming a silicon oxide layer 116 and a protective insulating layer 103 on an oxide semiconductor layer 121 This article explains:

[0136] First, the loader chamber 3110 is evacuated, and the pressure in the loader chamber 3110 is equal to that in the first transfer chamber 31. When the pressure becomes approximately equal to that of the first transfer chamber 3100, the gate valve is opened and the The substrate 100 is transported from the loader chamber 3110 to the first processing chamber 3210 .

[0137] Next, the substrate 100 is preheated by the substrate heating means 3211 in the first processing chamber 3210. It is preferable to desorb and exhaust impurities adsorbed on the surface of the substrate. These include compounds containing hydrogen atoms such as H2O, and compounds containing carbon atoms. The heating temperature is 100°C or higher and 400°C or lower, preferably 150°C or higher and 300°C or lower. It is preferable that the exhaust means provided in the first processing chamber 3210 is a cryopump. The impurities adsorbed on the surface of the substrate 100 are desorbed by preheating and diffused into the first processing chamber 3210. Therefore, it is necessary to use a cryopump to evacuate the impurities from the first processing chamber 3210. This preheating process may be omitted.

[0138] Next, the substrate 100 is transferred to the second processing chamber 3220, and a silicon oxide layer 116 is formed. For example, a silicon oxide film is formed as the silicon oxide layer 116. The impurities in the deposition chamber are reduced by evacuating the gas using a cryopump or other device. The oxide insulating film formed in the treatment chamber with reduced impurity concentration is suppressed. The hydrogen concentration in the oxide insulating film can be reduced. The silicon oxide layer 116 may be formed while heating the substrate 100, but it is necessary to form the silicon oxide layer 116 without including defects. To achieve this, it is desirable to form the film at a temperature of about 0° C. to 50° C., preferably at room temperature.

[0139] When a silicon oxide film is formed as the silicon oxide layer 116 by sputtering, A quartz target or a silicon target can be used as the target. A silicon target is preferred. A silicon target is used under an oxygen and rare gas atmosphere. The silicon oxide film formed by sputtering is composed of unbonded silicon atoms or oxygen atoms. It is possible to include dangling bonds. Also, the silicon oxide layer containing defects In the silicon oxide layer 116, there are many dangling oxygen bonds as defects. The binding energy for impurities such as hydrogen, hydroxyl groups, or moisture is increased, resulting in more oxidation. Hydrogen or impurities containing hydrogen are transferred from the compound semiconductor layer 121 to the silicon oxide layer containing defects. It can be spread.

[0140] The silicon oxide layer 116 having many dangling bonds is provided in contact with the island-shaped oxide semiconductor layer 121. As a result, impurities such as hydrogen, a hydroxyl group, or moisture contained in the island-shaped oxide semiconductor layer 121 are The oxide semiconductor layer 121 is formed on the silicon oxide layer 116 through the interface where the island-shaped oxide semiconductor layer 121 and the silicon oxide layer 116 are in contact with each other. Specifically, the silicon dioxide contained in the island-shaped oxide semiconductor layer 121 is easily diffused into the silicon dioxide layer 116. Hydrogen atoms and compounds containing hydrogen atoms such as H2O are easily diffused and transferred to the silicon oxide layer 116. As a result, the impurity concentration of the island-shaped oxide semiconductor layer 121 is reduced.

[0141] The substrate 100 is then transferred to a third processing chamber 3230, where a protective insulating film is formed on the silicon oxide layer 116. The protective insulating layer 103 has a function of preventing the diffusion of impurity elements. It is sufficient to use a silicon nitride film, a silicon nitride oxide film, or the like. The third processing chamber 3230 is evacuated by a cryopump or the like, and impurities in the film forming chamber are removed. A reduced concentration is preferred.

[0142] The protective insulating layer 103 prevents impurities from diffusing and entering from the outside of the thin film transistor 110. Impurities include compounds containing hydrogen atoms such as hydrogen and H2O, and compounds containing carbon atoms. And so on.

[0143] When a silicon nitride film is formed as the protective insulating layer 103 by sputtering, for example, A silicon target was used, and a mixed gas of nitrogen and argon was introduced into the third processing chamber 3230. The substrate temperature is set to 100°C or higher and 400°C or lower. For example, the film is formed at a temperature of 200°C or higher and 350°C or lower. Impurities containing hydrogen atoms, such as hydrogen, hydroxyl groups, or moisture, are diffused into the silicon oxide layer 116 to form islands. In particular, the impurity concentration in the oxide semiconductor layer 121 can be reduced. A temperature range of 200° C. to 350° C., in which atomic diffusion is promoted, is preferable.

[0144] Furthermore, when the silicon oxide layer 116 and a silicon nitride layer are stacked as the protective insulating layer 103, The silicon oxide layer and silicon nitride layer were deposited in the same processing chamber using a common silicon target. First, a sputtering gas containing oxygen is introduced into the processing chamber. A silicon oxide layer is formed using a mounted silicon target, and then sputtered. The same silicon target was used to deposit nitride silicon by switching the sputtering gas to one containing nitrogen. A silicon oxide layer and a silicon nitride layer are formed successively without exposure to the atmosphere. Therefore, impurities such as hydrogen and moisture are adsorbed on the surface of the silicon oxide layer. In this case, the silicon oxide layer 116 and the nitride layer 103 are used as the protective insulating layer. After stacking the silicon oxide layer, hydrogen or moisture contained in the oxide semiconductor layer is removed by an oxide insulating film. A heat treatment (at a temperature of 100 to 400°C) is performed to diffuse the silicon dioxide into the silicon dioxide layer (a silicon oxide film containing defects). Just do it.

[0145] The sputtering gas introduced when forming the silicon oxide layer or silicon nitride layer is It is preferable that the gas does not contain impurities such as water and hydrogen. For example, oxygen gas or nitrogen gas The purity of 6N (99.9999%) or more, preferably 7N (99.99999%) or more, (i.e., the impurity concentration is preferably 1 ppm or less, and more preferably 0.1 ppm or less) .

[0146] It should be noted that impurities containing hydrogen atoms, such as hydrogen, hydroxyl groups, or moisture, are diffused into the silicon oxide layer 116. In order to reduce the impurity concentration in the island-shaped oxide semiconductor layer 121, a protective insulating film is formed. After the layer 103 is formed, heat treatment may be performed.

[0147] For example, as shown in FIG. 4, the substrate 100 is transferred to a fourth processing chamber 3240 and heated after film formation. In the heat treatment after film formation, the substrate temperature is set to 100°C or higher and 400°C or lower. By this treatment, impurities contained in the oxide semiconductor layer are removed from the island-shaped oxide semiconductor layer 121 and the silicon oxide. The silicon dioxide layer 116 is easily diffused through the interface where the silicon dioxide layer 116 is in contact. The hydrogen atoms contained in the island-shaped oxide semiconductor layer 121 and compounds containing hydrogen atoms such as H2O are As a result, the impurity concentration in the oxide semiconductor layer is reduced. will be done.

[0148] After the heat treatment, the substrate 100 is transferred to the fifth treatment chamber 3250. The plate is cooled from temperature T to a sufficiently low temperature so that impurities such as water do not enter again. The temperature is gradually cooled until it drops by 100°C or more below the heating temperature T. The cooling is carried out using nitrogen, helium, or nitrogen. Alternatively, argon or the like may be introduced into the fifth processing chamber 3250. Nitrogen or rare gases such as helium, neon, and argon must not contain water or hydrogen. The purity of nitrogen or rare gases such as helium, neon, and argon is preferably 6N (99 0.9999%) or more, preferably 7N (99.99999%) or more (i.e., impurity concentration It is preferable to set the concentration to 1 ppm or less, preferably 0.1 ppm or less.

[0149] By using the film forming apparatus 3000 that employs an exhaust means provided with a cryopump, Impurities adsorbed on the inner wall of the processing chamber are released and are deposited on the substrate during film formation, This reduces the problem of impurities being mixed into the film. Impurities can be evacuated to prevent them from being re-adsorbed onto the substrate.

[0150] The silicon oxide layer 116 thus formed contains many dangling bonds. By providing the silicon oxide layer 116 in contact with the conductor layer 121, an island-shaped oxide semiconductor layer Impurities contained in 121, specifically hydrogen atoms and compounds containing hydrogen atoms such as H2O, form islands. The oxide semiconductor layer 121 diffuses and moves to the silicon oxide layer 116, resulting in the formation of islands. The impurity concentration in the oxide semiconductor layer 121 can be reduced.

[0151] For example, when an oxide insulating layer formed using the film formation apparatus described in this embodiment is provided in contact with the insulating film, A thin film transistor in which the oxide semiconductor layer formed on the gate electrode is used as a channel forming region is In the state where no pressure is applied, that is, in the so-called off state, the carrier concentration in the channel formation region is reduced. Therefore, the off-state current is small and good characteristics are exhibited.

[0152] Although FIG. 4 illustrates a configuration in which three or more processing chambers are connected via a transfer chamber, the present invention is not limited to this. For example, a configuration in which the processing chambers have an entrance and an exit for the substrate and are connected to each other, An in-line configuration may also be used.

[0153] The processes using the above-mentioned film forming apparatus are applicable to liquid crystal display panels, electroluminescence display panels, Backplanes (substrates on which thin-film transistors are formed) for electronic ink displays, etc. The process using the above film forming device can be carried out at a temperature of 400°C or less. Therefore, it is used in manufacturing processes that use glass substrates that are 1 mm thick or less and have a side length of more than 1 m. All steps can be performed at a processing temperature of 400°C or less. Therefore, a large amount of energy is not consumed to manufacture the display panel.

[0154] As described above, in a semiconductor device having a thin film transistor using an oxide semiconductor layer, A highly reliable semiconductor device having stable electrical characteristics can be provided.

[0155] (Embodiment 2) This embodiment is another example of a thin film transistor that can be applied to the semiconductor device disclosed in this specification. Shows.

[0156] One mode of a semiconductor device and a manufacturing method of the semiconductor device of this embodiment will be described with reference to FIGS. .

[0157] 5A to 5E show examples of cross-sectional structures of semiconductor devices. The thin film transistor 160 is called a channel protection type (also called a channel stop type). It is one of the bottom gate structures and is also called an inverted staggered thin film transistor.

[0158] The thin film transistor 160 is described using a thin film transistor with a single gate structure. However, if necessary, a thin-film transistor with a multi-gate structure having multiple channel forming regions may be used. A data can also be formed.

[0159] 5A to 5E, a thin film transistor 160 is fabricated on a substrate 150. The process will be explained.

[0160] First, a conductive film is formed on a substrate 150 having an insulating surface, and then a first photolithography is performed. A gate electrode layer 151 is formed by a process. If the resist mask is formed by the inkjet method, a photomask can be used. Therefore, manufacturing costs can be reduced.

[0161] The gate electrode layer 151 is made of molybdenum, titanium, chromium, tantalum, or tungsten. Metallic materials such as zinc, aluminum, copper, neodymium, scandium, etc., or materials containing these as their main components The insulating film 10 can be formed as a single layer or a stacked layer using an alloy material.

[0162] Next, a gate insulating layer 152 is formed on the gate electrode layer 151 .

[0163] In this embodiment, the gate insulating layer 152 is formed by plasma CVD to a thickness of 100 nm or more. A bottom silicon oxynitride layer is formed.

[0164] Next, an oxide semiconductor layer is formed over the gate insulating layer 152, and then subjected to second photolithography. The oxide semiconductor layer 171 is processed into an island shape by a process. The film was formed by sputtering using an In-Ga-Zn-O metal oxide target. To film.

[0165] The substrate is held in a processing chamber maintained in a reduced pressure state, and the substrate is heated to a temperature above room temperature but below 400°C. Then, the remaining moisture in the processing chamber is removed, and the sputtering gas from which hydrogen and moisture have been removed is heated. A metal oxide is used as a target to form an oxide semiconductor layer on the substrate 150. To remove residual moisture in the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, cryopumps, ion pumps, and titanium sublimation pumps are used. As an exhaust means, it is preferable to add a cold trap to a turbo molecular pump. The deposition chamber evacuated using a cryopump may contain, for example, hydrogen atoms or , H2O and other compounds containing hydrogen atoms, and compounds containing carbon atoms, etc. are exhausted. The concentration of impurities contained in the oxide semiconductor layer formed in the film formation chamber can be reduced.

[0166] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed direct current (DC) power supply is used, the powdery substances (particles) generated during film formation are This is preferable because it can reduce the amount of dust (also called crumbs or dust) and make the film thickness distribution uniform. The thickness of the layer is preferably 5 nm to 30 nm. The appropriate thickness varies depending on the material.

[0167] Note that oxygen gas, nitrogen, helium, neon, and argon introduced when forming the oxide semiconductor layer are It is preferable that the rare gas such as argon does not contain impurities such as water and hydrogen. 6N (99.9999%) or more, preferably 7N (99.99999%) or more (i.e., non- It is preferable to keep the concentration of impurities at 1 ppm or less, preferably 0.1 ppm or less.

[0168] Next, a silicon oxide layer 173 was formed over the gate insulating layer 152 and the oxide semiconductor layer 171. Form.

[0169] The substrate 150 on which the island-shaped oxide semiconductor layer 171 has been formed is used as the silicon oxide layer 173. The spa contains high-purity oxygen from which hydrogen and moisture have been removed by heating to a temperature above room temperature but below 100°C. A silicon oxide layer containing defects is formed using a silicon target by introducing a targeting gas. The silicon oxide layer 173 contains defects. Preferably, x is 2 or more.

[0170] The sputtering gas introduced when forming the silicon oxide layer does not contain impurities such as water or hydrogen. It is preferable that no impurities are included. For example, the purity of hydrogen gas is 6N (99.9999%). or more, preferably 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, Preferably, it is 0.1 ppm or less.

[0171] In addition, the silicon oxide layer 173 containing defects contains many dangling oxygen bonds as defects. The silicon oxide layer 173 has a low binding energy for impurities such as hydrogen, hydroxyl groups, or moisture. Since the energy is increased, hydrogen or impurities containing hydrogen are more easily removed from the oxide semiconductor layer 171. can be diffused into the silicon oxide layer containing defects.

[0172] For example, a silicon target with a purity of 6N (99.9999%) and doped with boron is The distance between the target and the substrate (TS distance) was 89 mm, pressure 0.4 Pa, direct current (DC) power supply 6 kW, oxygen (oxygen flow rate 100%) A silicon oxide layer 173 is formed by pulse DC sputtering in an atmosphere. The thickness is set to 300 nm. Note that quartz (preferably synthetic quartz) is used instead of the silicon target. It can be used as a target for forming the silicon oxide layer 173. The silicon layer 173 may be formed while heating the substrate 150. In order to include defects in the film, it is desirable to form the film at a temperature of about 0° C. to 50° C., preferably at room temperature. It's nice.

[0173] In this case, the silicon oxide layer 173 is formed while removing the remaining moisture in the processing chamber. It is preferable that the oxide semiconductor layer 171 and the silicon oxide layer 173 contain hydrogen, a hydroxyl group, or moisture. This is to ensure that the following is not included.

[0174] Note that instead of the silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, or an oxide Aluminum nitride or the like can also be used.

[0175] Furthermore, when the silicon oxide layer 173 is formed in contact with the oxide semiconductor layer 171, the oxide semiconductor A mixed region 179 containing an oxide semiconductor and silicon oxide is formed at the interface between the layer and the silicon oxide layer. (See Figure 5(B).)

[0176] The mixed region 179 is formed of at least one of oxygen, silicon, and an oxide semiconductor. Contains a metal element.

[0177] The thickness of the mixed region is 1 nm to 10 nm, preferably 2 nm to 5 nm. The thickness of the silicon oxide layer is controlled by the film formation conditions of the sputtering method used to form the silicon oxide layer. The power of the sputtering power supply can be increased, and the distance between the substrate and the target can be increased. If the distance is closer, the mixed region can be formed thicker. By performing a sputtering method, adsorbed water and the like attached to the surface of the oxide semiconductor layer are removed. It is also possible to do so.

[0178] By providing the mixed region 179 between the oxide semiconductor layer 171 and the silicon oxide layer 173, Therefore, hydrogen atoms contained in the oxide semiconductor layer 171 and hydrogen atoms such as H2O are more likely to be present. The diffusion of compounds and compounds containing carbon atoms into the silicon oxide layer 173 is promoted, and the movement It becomes easier.

[0179] Next, the silicon oxide layer 173 containing defects and the oxide semiconductor layer 171 are in contact with each other. The heat treatment is performed at a temperature of from 0° C. to 400° C. By this heat treatment, The hydrogen or moisture contained in the silicon oxide layer 173 can be diffused into the silicon oxide layer 173 containing defects. The oxide semiconductor layer 173 contains many defects (dangling bonds). Impurities such as hydrogen, hydroxyl groups, and moisture contained in the layer 171 are removed by the oxide semiconductor layer 171 and the silicon oxide. The oxide layer 173 is then diffused into the silicon oxide layer 173 through the interface where the oxide layer 173 is in contact. The hydrogen atoms contained in the compound semiconductor layer 171, compounds containing hydrogen atoms such as H2O, and carbon atoms This makes it easier for compounds containing atoms to diffuse and move into the silicon oxide layer 173 .

[0180] Through the above steps, the oxide semiconductor layer 162 in which the concentrations of hydrogen and hydride are reduced is formed. This can be done.

[0181] A resist mask is formed on the silicon oxide layer 173 by a third photolithography process. After selective etching is performed to form a silicon oxide layer 166, the resist mask is removed. (See Figure 5(C)).

[0182] Next, a thin film was formed on the gate insulating layer 152, the oxide semiconductor layer 162, and the silicon oxide layer 166. After forming the conductive film, a resist mask is formed by a fourth photolithography process. After selective etching is performed to form the source electrode layer 165a and the drain electrode layer 165b, Then, the resist mask is removed (see FIG. 5(D)).

[0183] The source electrode layer 165a and the drain electrode layer 165b may be made of Al, Cr, Cu, or T. An element selected from the group consisting of a, Ti, Mo, and W, or an alloy containing the above elements, or Examples of such conductive metal films include alloy films that combine the above elements. It may also have a laminated structure of two or more layers.

[0184] Through the above steps, a thin film having the oxide semiconductor layer 162 in which the concentrations of hydrogen and hydride are reduced is formed. A transistor 160 can be formed (see FIG. 5D).

[0185] When forming the oxide semiconductor layer as described above, it is necessary to remove residual moisture in the reaction atmosphere. As a result, the concentrations of hydrogen and hydride in the oxide semiconductor layer can be reduced. The oxide semiconductor layer can be stabilized.

[0186] A protective insulating layer may be provided over the oxide insulating layer. In this embodiment, the protective insulating layer 153 is formed by an oxide insulating film. The insulating film 166 is formed on the source electrode layer 165a and the drain electrode layer 165b. The protective insulating layer 153 may be a silicon nitride film, a silicon nitride oxide film, or an aluminum nitride film. In this embodiment, the protective insulating layer 153 is formed using a silicon nitride film. (See Figure 5(E)).

[0187] Further, on the source electrode layer 165a, the drain electrode layer 165b, and the silicon oxide layer 166, An oxide insulating layer may be formed over the insulating film 154, and the protective insulating layer 153 may be stacked over the oxide insulating layer. A planarization insulating layer may be formed over the protective insulating layer 153 .

[0188] By heating the substrate and forming a silicon nitride layer on the silicon oxide layer containing defects, the oxidation Hydrogen and moisture are diffused from the compound semiconductor layer into the silicon oxide film, while moisture is simultaneously penetrated from the outside air. A barrier film can be provided to prevent the intrusion of oxygen.

[0189] In addition, when an oxide semiconductor layer serving as a channel formation region is formed over a gate insulating layer, a reaction By removing residual moisture in the atmosphere, the concentrations of hydrogen and hydride in the oxide semiconductor layer are reduced. Furthermore, when a silicon oxide layer having defects is provided in contact with the oxide semiconductor layer, the defect can be reduced. By this, hydrogen and moisture in the oxide semiconductor layer are diffused into the silicon oxide film, and the moisture in the oxide semiconductor layer is The concentrations of hydrogen and hydrogen compounds can be reduced.

[0190] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0191] As described above, in a semiconductor device having a thin film transistor using an oxide semiconductor layer, A highly reliable semiconductor device having stable electrical characteristics can be provided.

[0192] (Embodiment 3) This embodiment is another example of a thin film transistor that can be applied to the semiconductor device disclosed in this specification. Shows.

[0193] One mode of a semiconductor device and a manufacturing method of the semiconductor device of this embodiment will be described with reference to FIGS. .

[0194] The thin film transistor 190 is described using a thin film transistor with a single gate structure. However, if necessary, a thin-film transistor with a multi-gate structure having multiple channel forming regions may be used. A data can also be formed.

[0195] 6A to 6C, a thin film transistor 190 is fabricated on the substrate 140. The process will be explained.

[0196] First, a conductive film is formed on a substrate 140 having an insulating surface, and then a first photolithography is performed. In this embodiment, the gate electrode layer 181 is formed by a process. Then, a tungsten film having a thickness of 150 nm is formed by sputtering.

[0197] Next, the gate insulating layer 142 is formed over the gate electrode layer 181. The insulating layer 142 is formed by a silicon oxynitride film having a thickness of 100 nm or less by a plasma CVD method. Form a layer.

[0198] Next, a conductive film is formed on the gate insulating layer 142, and a second photolithography process is performed. A resist mask is formed on the conductive film, and selective etching is performed to form a source electrode layer 195a After the drain electrode layer 195b is formed, the resist mask is removed.

[0199] Next, an oxide semiconductor layer is formed, and an island-shaped oxide semiconductor is formed by a third photolithography process. The oxide semiconductor layer is processed into a layer 141 (see FIG. 6A). The film is formed by sputtering using an n-Ga-Zn-O metal oxide target.

[0200] The substrate is held in a processing chamber maintained in a reduced pressure state, and the substrate is heated to a temperature above room temperature but below 400°C. Then, the remaining moisture in the processing chamber is removed, and the sputtering gas from which hydrogen and moisture have been removed is heated. A metal oxide is used as a target to form an oxide semiconductor layer on the substrate 140. To remove residual moisture in the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, cryopumps, ion pumps, and titanium sublimation pumps are used. As an exhaust means, it is preferable to add a cold trap to a turbo molecular pump. The deposition chamber evacuated using a cryopump may contain, for example, hydrogen atoms or , H2O and other compounds containing hydrogen atoms, and compounds containing carbon atoms, etc. are exhausted. The concentration of impurities contained in the oxide semiconductor layer formed in the film formation chamber can be reduced.

[0201] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed direct current (DC) power supply is used, the powdery substances (particles) generated during film formation are This is preferable because it can reduce the amount of dust (also called crumbs or dust) and make the film thickness distribution uniform. The thickness of the layer is preferably 5 nm to 30 nm. The appropriate thickness varies depending on the material.

[0202] Note that oxygen gas, nitrogen, helium, neon, and argon introduced when forming the oxide semiconductor layer are It is preferable that the rare gas such as argon does not contain impurities such as water and hydrogen. 6N (99.9999%) or more, preferably 7N (99.99999%) or more (i.e., non- It is preferable to keep the concentration of impurities at 1 ppm or less, preferably 0.1 ppm or less.

[0203] Next, the gate insulating layer 142, the oxide semiconductor layer 141, the source electrode layer 195a, and the drain electrode layer 195b are A silicon oxide layer 196 is formed on the inner electrode layer 195b.

[0204] The substrate 140 on which the island-shaped oxide semiconductor layer 141 has been formed is used as the silicon oxide layer 196. The spa contains high-purity oxygen from which hydrogen and moisture have been removed by heating to a temperature above room temperature but below 100°C. A silicon oxide layer containing defects is formed using a silicon target by introducing a targeting gas. The silicon oxide layer 196 is preferably an SiOx (x is preferably 2 or more) film.

[0205] In addition, the silicon oxide layer 196 containing defects contains many dangling bonds of oxygen as defects. The silicon oxide layer 196 has a low binding energy for impurities such as hydrogen, hydroxyl groups, or moisture. Since the energy is increased, hydrogen or impurities containing hydrogen are more easily removed from the oxide semiconductor layer 141. can be diffused into the silicon oxide layer containing defects.

[0206] For example, a silicon target with a purity of 6N (99.9999%) and doped with boron is The distance between the target and the substrate (TS distance) was 89 mm, pressure 0.4 Pa, direct current (DC) power supply 6 kW, oxygen (oxygen flow rate 100%) A silicon oxide layer 196 is formed by pulse DC sputtering in an atmosphere. The thickness is set to 300 nm. Note that quartz (preferably synthetic quartz) is used instead of the silicon target. It can be used as a target for forming the silicon oxide layer 196. The silicon layer 196 may be formed while heating the substrate 140. In order to include defects in the film, it is desirable to form the film at a temperature of about 0° C. to 50° C., preferably at room temperature. It's nice.

[0207] The sputtering gas introduced when forming the silicon oxide layer does not contain impurities such as water or hydrogen. It is preferable that no impurities are included. For example, the purity of hydrogen gas is 6N (99.9999%). or more, preferably 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, Preferably, it is 0.1 ppm or less.

[0208] In this case, the silicon oxide layer 196 is formed while removing the remaining moisture in the processing chamber. It is preferable that hydrogen, a hydroxyl group, or moisture be added to the oxide semiconductor layer 141 and the silicon oxide layer 196. This is to ensure that the following is not included.

[0209] Note that instead of the silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, or an oxide Aluminum nitride or the like can also be used.

[0210] Furthermore, when the silicon oxide layer 196 is formed in contact with the oxide semiconductor layer 141, the oxide semiconductor A mixed region 199 containing an oxide semiconductor and silicon oxide is formed at the interface between the layer and the silicon oxide layer. It is done.

[0211] The mixed region 199 is made of at least one of oxygen, silicon, and an oxide semiconductor. Contains a metal element.

[0212] The thickness of the mixed region is 1 nm to 10 nm, preferably 2 nm to 5 nm. The thickness of the silicon oxide layer is controlled by the film formation conditions of the sputtering method used to form the silicon oxide layer. The power of the sputtering power supply can be increased, and the distance between the substrate and the target can be increased. If the distance is closer, the mixed region can be formed thicker. By performing a sputtering method, adsorbed water and the like attached to the surface of the oxide semiconductor layer are removed. It is also possible to do so.

[0213] By providing the mixed region 199 between the oxide semiconductor layer 141 and the silicon oxide layer 196, Therefore, hydrogen atoms contained in the oxide semiconductor layer 141 and hydrogen atoms such as H2O are more likely to be present. The diffusion of compounds and compounds containing carbon atoms into the silicon oxide layer 196 is promoted, and the It becomes easier.

[0214] Next, a protective insulating layer 183 is formed on the silicon oxide layer 196. For example, a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, or the like is used. The substrate 140 on which the silicon oxide layer 196 has been formed as the protective insulating layer 183 is heated to 100°C. The sputtering gas containing high-purity nitrogen, from which hydrogen and moisture have been removed, is heated to a temperature of 400°C. A silicon nitride film is formed using a silicon semiconductor target.

[0215] The sputtering gas introduced when forming the silicon nitride film does not contain impurities such as water or hydrogen. It is preferable that no impurities are included. For example, the purity of nitrogen gas is 6N (99.9999%). or more, preferably 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, Preferably, it is 0.1 ppm or less.

[0216] By heating the substrate 140 to 100° C. to 400° C. during the formation of the protective insulating layer 183, the oxide Hydrogen or moisture contained in the semiconductor layer is transferred to the oxide insulating layer (a silicon oxide film containing defects). The silicon oxide layer 196 contains many defects (dangling bonds). Therefore, impurities such as hydrogen, hydroxyl groups, and moisture contained in the island-shaped oxide semiconductor layer 141 are oxidized. The silicon oxide layer 196 is formed through the interface where the compound semiconductor layer 141 and the silicon oxide layer 196 are in contact with each other. Specifically, hydrogen atoms contained in the oxide semiconductor layer 141 and hydrogen atoms such as H2O diffuse into the oxide semiconductor layer 141. Compounds containing atoms and compounds containing carbon atoms are easily diffused and transferred to the silicon oxide layer 196. become.

[0217] Through the above steps, a thin film having the oxide semiconductor layer 192 in which the concentrations of hydrogen and hydride are reduced is formed. A transistor 190 can be formed (see FIG. 6C).

[0218] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0219] As described above, in a semiconductor device having a thin film transistor using an oxide semiconductor layer, A highly reliable semiconductor device having stable electrical characteristics can be provided.

[0220] (Fourth embodiment) This embodiment shows an example of a thin film transistor that can be applied to a semiconductor device disclosed in this specification. vinegar.

[0221] In this embodiment mode, a light-transmitting conductive film is formed in the gate electrode layer, the source electrode layer, and the drain electrode layer. Therefore, the other steps can be carried out in the same manner as in the above embodiment. The description of the same parts as those in the embodiment, or parts having similar functions, and repeated steps will be omitted. Also, detailed explanations of the same parts will be omitted.

[0222] For example, the gate electrode layer, the source electrode layer, and the drain electrode layer may be made of a material that is transparent to visible light. Photoconductive materials, such as In-Sn-O, In-Sn-Zn-O, and In-Al -Zn-O series, Sn-Ga-Zn-O series, Al-Ga-Zn-O series, Sn-Al-Zn- O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In-O series, Sn-O Zn-O and Zn-O metal oxides can be used, with a film thickness of 50 nm to 300 nm. The metal oxide used in the gate electrode layer, the source electrode layer, and the drain electrode layer is appropriately selected within the range. The deposition method of the oxide is sputtering, vacuum deposition (electron beam deposition, etc.), arc deposition, etc. Discharge ion plating method, spray method, and sputtering method are used. In this case, the film is formed using a target containing 2% by weight or more and 10% by weight or less of SiO2, and the film is transparent. The conductive film contains SiOx (X>0) which inhibits crystallization, and the heating process It is preferable to prevent the oxide semiconductor layer from being crystallized during the treatment.

[0223] The composition ratio of the light-transmitting conductive film is expressed in atomic percent, and is measured by an electron probe microanalyzer. (EPMA:Electron Probe X-ray MicroAnalyzer ) will be evaluated by analysis.

[0224] In addition, the pixel where the thin film transistor is arranged has a pixel electrode layer or other electrode layer (capacitor The transparent electrode layer and other wiring layers (such as the capacitor wiring layer) are transparent to visible light. By using a conductive film, a display device having a high aperture ratio can be realized. The gate insulating layer, oxide insulating layer, protective insulating layer, and planarizing insulating layer present therein are also transparent to visible light. It is preferable to use a membrane having the following properties:

[0225] In this specification, a film that is transparent to visible light is a film that has a visible light transmittance of 75 to 100 %, and if the film is conductive, it is also called a transparent conductive film. Also, a gate electrode layer, a source electrode layer, a drain electrode layer, a pixel electrode layer, or other electrodes As a metal oxide applied to the wiring layer, a conductive film that is semi-transparent to visible light is used. Translucent to visible light means that the transmittance of visible light is 50 to 75%. .

[0226] By making the thin film transistor transparent, the aperture ratio can be improved. In small LCD panels of 100mm or less, the number of gate wirings can be increased to improve the image quality. In order to achieve high definition, a high aperture ratio can be achieved even if the pixel size is made smaller. In addition, a wide viewing angle is achieved by using a transparent film as a component of the thin-film transistor. Therefore, a high aperture ratio can be achieved even when one pixel is divided into multiple sub-pixels. In other words, even if a group of high-density thin-film transistors is arranged, a large aperture ratio can be obtained, and the display For example, two to four sub-pixels can be placed in one pixel. In the case where a cell is provided, the aperture ratio can be improved because the thin film transistor has light-transmitting properties. In addition, the storage capacitor can be formed using the same material in the same process as the constituent members of the thin film transistor. In this case, the storage capacitor can also be made translucent, which can further improve the aperture ratio. do.

[0227] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0228] (Embodiment 5) This embodiment shows an example of a thin film transistor that can be applied to a semiconductor device disclosed in this specification. vinegar.

[0229] In this embodiment, the oxide semiconductor layer and the source electrode layer or the drain electrode layer in Embodiment 1 are FIG. 7 shows an example in which an oxide conductive layer is provided between an electrode layer and a source region and a drain region. Therefore, other aspects can be carried out in the same manner as in the first embodiment, and the same parts or the same components as in the first embodiment can be used. The explanation of parts having different functions and repetition of steps will be omitted. Since the process is the same except for some differences, the same symbols are used for the same parts and the details of the same parts are Detailed explanations will be omitted.

[0230] The thin film transistor 130 shown in FIG. 7 is a channel-etch type thin film transistor, and is an insulating On a substrate 100 having a surface, a gate electrode layer 111, a gate insulating layer 102, an oxide semiconductor the layer 112, the oxide conductive layers 118a and 118b, the source electrode layer 115a, and the drain electrode The oxide semiconductor layer 112 includes a layer 115b that covers the thin film transistor 130 and is in contact with the oxide semiconductor layer 112. A silicon oxide layer 116 is provided, and a protective insulating layer 103 is further laminated thereon. The silicon oxide layer 116 contains defects, and the oxide semiconductor layer 112 and the silicon oxide layer 116 A mixing region 119 is provided between the two.

[0231] According to the first embodiment, a gate electrode layer 111 is formed on a substrate 100, and a gate insulating layer 10 2 is stacked. An oxide semiconductor layer 112 is formed over the gate insulating layer 102.

[0232] Oxide conductive layers 118a and 118b are formed over the oxide semiconductor layer 112. The oxide conductive layers 118a and 118b are formed by the same photolithography process as the oxide semiconductor layer 112. The oxide conductive layers 118a and 118b are formed as source electrode layers. The shape of the gate electrode layer may be processed by the same photolithography process as that of the drain electrode layer.

[0233] The oxide conductive layers 118a and 118b are formed by a sputtering method or a vacuum deposition method (electron beam deposition). The methods used are the vapor deposition method, arc discharge ion plating method, and spray method. The material of the conductive layers 118a and 118b preferably contains zinc oxide. Preferably, the oxide conductive layer 118 does not contain indium oxide. a, 118b, zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride, oxide Zinc gallium, etc. can be used. The film thickness is in the range of 50 nm to 300 nm. When the sputtering method is used, SiO2 is added in an amount of 2% by weight or more and 10% by weight or less. The film is formed using a target containing SiOx, which inhibits crystallization of the oxide conductive film. (X>0) to prevent the oxide semiconductor from crystallizing during heat treatment in a later step. It is preferable to suppress

[0234] In this embodiment, the oxide conductive layer is formed by the same photolithography process as the oxide semiconductor layer. After processing the shape, the source electrode layer 115a and the drain electrode layer 115b are used as a mask. The oxide conductive layer is then etched to form oxide conductive layers 118a and 118b. The oxide conductive layers 118a and 118b containing lead are formed by removing an acid such as a resist remover. It can be easily etched using alkaline solutions.

[0235] A channel region is formed by utilizing the difference in etching rate between the oxide semiconductor layer and the oxide conductive layer. In order to separate the oxide conductive layer, an etching process is performed to separate the oxide conductive layer. The oxide conductive layer on the oxide semiconductor layer is formed by utilizing the fact that the ionization rate is faster than that of the oxide semiconductor layer. The layer is selectively etched.

[0236] Therefore, the resist mask used to form the source electrode layer 115a and the drain electrode layer 115b The removal of the film is preferably performed by an ashing process. In this case, etching is performed so as not to etch the oxide conductive layer and the oxide semiconductor layer excessively. The etching conditions (type of etchant, concentration, etching time) are adjusted appropriately.

[0237] An oxide semiconductor layer 112 is provided between the oxide semiconductor layer 112 and the drain electrode layer 115b made of a metal material. The conductive layer 118b is a low resistance drain region (LRN (Low Resistance N- type conductivity) region, LRD (Low Resistance) region Similarly, the oxide semiconductor layer 112 and the metal material The oxide conductive layer 118a provided between the source electrode layers 115a made of a material is a low resistance drain layer. Low Resistance N-type conduction region (LRN) ty region, also called LRS (Low Resistance Source) region) and The drain electrode is made of an oxide semiconductor layer, a low-resistance drain region, and a metal material. By using a layered structure, the breakdown voltage of the transistor can be further improved. In other words, the carrier concentration in the low-resistance drain region is higher than that in the high-resistance drain region (HRD region). is also large, for example, 1×10 20 / cm 3 More than 1×10 21 / cm 3 Within the following range preferable.

[0238] The oxide conductive layer is formed as a source region and a drain region by forming an oxide semiconductor layer and a source electrode layer. By providing the source and drain electrode layers between the source and drain regions, the resistance of the source and drain regions can be reduced. The source region and the drain region can be formed in a single layer, and the transistor can operate at high speed. The use of an oxide conductive layer as a gate insulating layer improves the frequency characteristics of the peripheral circuit (drive circuit). This is effective for the contact between the metal electrode (Ti, etc.) and the oxide semiconductor layer. This is because the contact between the conductive layer and the oxide layer can reduce the contact resistance.

[0239] In addition, molybdenum (Mo), which is used as a part of the wiring material in semiconductor devices (e.g. , Mo / Al / Mo), the high contact resistance with the oxide semiconductor layer was an issue. Mo is less likely to oxidize than i, and therefore has a weaker effect of extracting oxygen from the oxide semiconductor layer. This is because the contact interface of the oxide semiconductor layer does not become n-type. The semiconductor layer is connected to the source and drain electrode layers by interposing an oxide conductive layer between the semiconductor layer and the source and drain electrode layers. This reduces contact resistance and improves the frequency characteristics of peripheral circuits (drive circuits).

[0240] Since the channel length of the thin film transistor is determined when the oxide conductive layer is etched, For example, the channel length can be shortened to between 0.1 μm and 2 μm. The operating speed can be increased.

[0241] Although the first embodiment has been described as an example, this embodiment may be combined with other embodiments as appropriate. It is possible to implement this.

[0242] As described above, in a semiconductor device having a thin film transistor using an oxide semiconductor layer, A highly reliable semiconductor device having stable electrical characteristics can be provided.

[0243] (Sixth embodiment) In this embodiment mode, in the semiconductor device described in any of Embodiments 1 to 5, a thin film transistor and an active matrix type light emitting element using electroluminescence. An example of manufacturing a light-emitting display device will be described.

[0244] Light-emitting elements that utilize electroluminescence are either organic or inorganic. Generally, the former is an organic EL element, and the latter is an inorganic EL element. It is called.

[0245] In organic EL elements, a current flows when a voltage is applied to the light-emitting element. The recombination of carriers (electrons and holes) causes light-emitting organic compounds to transition to an excited state. The excited state is formed, and light is emitted when it returns to the ground state. Such a light-emitting element is called a current-excited light-emitting element.

[0246] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0247] FIG. 8 shows an example of a pixel configuration to which digital time gray scale driving can be applied as an example of a semiconductor device. Figure.

[0248] The configuration and operation of a pixel to which digital time gray scale driving can be applied will be described. The figure shows an n-channel transistor using an oxide semiconductor layer as a channel formation region in one pixel. Here is an example of using two of them.

[0249] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, It has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate.

[0250] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. Then, in order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or greater than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0251] The capacitor element 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. The gate capacitance of the driving transistor 6402 is determined by the channel region A capacitance may be formed between the gate electrode and the transistor.

[0252] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is connected to The driving transistor 6402 is either fully on or off. A video signal is input, that is, the driving transistor 6402 is operated in a linear region. The driving transistor 6402 is operated in a linear region, so that the voltage of the driving transistor 6402 is higher than the voltage of the power supply line 6407. A high voltage is applied to the gate of the driving transistor 6402. The signal line 6405 is connected to A voltage equal to or greater than (power supply line voltage+Vth of the driving transistor 6402) is applied.

[0253] Furthermore, when analog grayscale driving is performed instead of digital time grayscale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 8 can be used.

[0254] When analog gradation driving is performed, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or greater than the forward voltage of the light emitting element 64 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and It should be noted that the driving transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The potential of the light emitting element is made higher than the gate potential of the capacitor 6402. A current corresponding to a video signal is passed through 6404, enabling analog gradation driving.

[0255] Note that the pixel configuration shown in Fig. 8 is not limited to this. For example, if a new switch is added to the pixel shown in Fig. 8, A switch, a resistive element, a capacitive element, a transistor, a logic circuit, or the like may be added.

[0256] Next, the configuration of the light-emitting element will be described with reference to FIG. 9. Here, the driving TFT is an n-type The cross-sectional structure of the pixel will be explained using the semiconductor shown in Figures 9(A), (B), and (C). The driving TFTs 7011, 7021, and 7001 used in the device are the same as those shown in the first embodiment. A light-transmitting thin film transistor including an oxide semiconductor layer can be manufactured in the same manner as a thin film transistor. Here is an example of its use.

[0257] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. A top-side emission structure that emits light from the surface on the substrate side, a bottom-side emission structure that emits light from the surface on the substrate side, and a structure that emits light from the substrate side and the substrate There are also light-emitting elements with a double-sided emission structure that emit light from the opposite side of the pixel. The present invention can also be applied to light emitting devices having the following structure.

[0258] A light emitting element with a bottom emission structure will be described with reference to FIG.

[0259] The driving TFT 7011 is an n-type TFT, and light emitted from the light emitting element 7012 is incident on the first electrode 701. 9A shows a cross-sectional view of a pixel when light is emitted to the driving TFT 7011 side. The light-emitting element 70 is formed over a light-transmitting conductive film 7017 electrically connected to the drain electrode layer. 12. A first electrode 7013 is formed on the first electrode 7013. An EL layer 7014, A second electrode 7015 is layered in turn.

[0260] The light-transmitting conductive film 7017 may be formed of indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium-containing indium tin oxide, indium tin oxide, indium zinc oxide, oxide ketone A light-transmitting conductive film such as indium tin oxide to which indium is added can be used. Cut.

[0261] In addition, various materials can be used for the first electrode 7013 of the light-emitting element. When the electrode 7013 is used as a cathode, a material having a small work function, specifically, For example, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, and alloys containing these (Mg:Ag, Al:Li, etc.), as well as rare earth metals such as Yb and Er. In FIG. 9A, the film thickness of the first electrode 7013 is set to a thickness that allows light to pass through (preferably For example, an aluminum film having a thickness of 20 nm is , is used as the first electrode 7013 .

[0262] The periphery of the first electrode 7013 is covered with a partition wall 7019. The partition wall 7019 is made of polyimide. organic resin films such as acrylic, polyamide, and epoxy, inorganic insulating films, or organic polysiloxane The partition wall 7019 is formed by using a photosensitive resin material, and is 13, and an opening is formed on the surface, and the side wall of the opening is an inclined surface formed with a continuous curvature. When a photosensitive resin material is used as the partition wall 7019, In this case, the step of forming a resist mask can be omitted.

[0263] The EL layer 7014 formed on the first electrode 7013 and the partition wall 7019 is made of at least It is sufficient to include a light-emitting layer, and it may be composed of a single layer or a plurality of layers stacked. When the EL layer 7014 is made up of multiple layers, On the first electrode 7013 functioning as a The hole injection layer is laminated in this order. Note that it is not necessary to provide all of these layers.

[0264] The stacking order is not limited to the above, and the first electrode 7013 may function as an anode. Layers of hole injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer are stacked on top of 7013 in this order. However, when comparing power consumption, the first electrode 7013 may function as a cathode. On the first electrode 7013, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, a hole injection layer, and a By stacking the layers in the order of the incoming layers, it is possible to suppress the voltage rise in the drive circuit section and reduce power consumption. Therefore, it is preferable.

[0265] In addition, various materials can be used for the second electrode 7015 formed on the EL layer 7014. For example, when the second electrode 7015 is used as an anode, a material with a large work function can be used. Materials such as ZrN, Ti, W, Ni, Pt, Cr, ITO, IZO, ZnO, etc. A transparent conductive material is preferable. In addition, a shielding film 7016 is formed on the second electrode 7015, for example, For example, a metal that blocks light, a metal that reflects light, or the like is used. In this embodiment, the second electrode 70 An ITO film is used as the shielding film 7015 and a Ti film is used as the shielding film 7016 .

[0266] An EL layer 7014 including a light-emitting layer is sandwiched between a first electrode 7013 and a second electrode 7015. In the case of the element structure shown in FIG. 9(A), the light-emitting element 7012 Light emitted from 012 is emitted to the first electrode 7013 side as shown by the arrow.

[0267] In FIG. 9A, a light-transmitting conductive film is used as a gate electrode layer, and a light-transmitting conductive film is used as a source electrode. The light-emitting element 7 shows an example in which a light-transmitting thin film is used for the drain electrode layer and the drain electrode layer. The light emitted from the 012 passes through the color filter layer 7033 and exits through the substrate. It can be done.

[0268] The color filter layer 7033 can be formed by a droplet discharge method such as an ink jet method, a printing method, or a photolithography method. Each is formed by an etching method using graphic technology.

[0269] The color filter layer 7033 is covered with an overcoat layer 7034, which is further provided with a protective insulating layer. In FIG. 9(A), the overcoat layer 7034 is thin. As shown in the figure, the overcoat layer 7034 prevents the unevenness caused by the color filter layer 7033. It has a flattening function.

[0270] In addition, a protective insulating layer 7035, a planarizing insulating layer 7036, an insulating layer 7032, and an insulating layer 703 The contact hole formed in the insulating film 7011 and reaching the drain electrode layer overlaps with the partition wall 7019. Place it in a position where

[0271] Next, a light emitting element with a dual emission structure will be described with reference to FIG. 9(B).

[0272] In FIG. 9(B), a transparent TFT 7021 is electrically connected to the drain electrode layer of the driving TFT 7021. A first electrode 7023 of the light-emitting element 7022 is formed over the conductive film 7027. An EL layer 7024 and a second electrode 7025 are stacked in this order on a first electrode 7023 .

[0273] The light-transmitting conductive film 7027 may be formed of indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium-containing indium tin oxide, indium tin oxide, indium zinc oxide, oxide ketone A light-transmitting conductive film such as indium tin oxide to which indium is added can be used. Cut.

[0274] In addition, various materials can be used for the first electrode 7023. For example, When 23 is used as a cathode, a material with a small work function, specifically, for example, Li or Cs Alkali metals such as Mg, Ca, Sr, and alkaline earth metals, including these In addition to alloys (Mg:Ag, Al:Li, etc.), rare earth metals such as Yb and Er are preferred. In this embodiment, the first electrode 7023 is used as a cathode, and its film thickness is set to a thickness that allows light to pass through. (Preferably, about 5 nm to 30 nm) For example, an aluminum film having a thickness of 20 nm is A ZnO film is used as the cathode.

[0275] The periphery of the first electrode 7023 is covered with a partition wall 7029. The partition wall 7029 is made of polyimide. organic resin films such as acrylic, polyamide, and epoxy, inorganic insulating films, or organic polysiloxane The partition wall 7029 is formed by using a photosensitive resin material, and is 23, and an opening is formed on the surface, and the side wall of the opening is an inclined surface formed with a continuous curvature. When a photosensitive resin material is used as the partition wall 7029, In this case, the step of forming a resist mask can be omitted.

[0276] The EL layer 7024 formed over the first electrode 7023 and the partition wall 7029 includes a light-emitting layer. It can be made up of a single layer or multiple layers stacked together. When the EL layer 7024 is made up of multiple layers, it functions as a cathode. On the first electrode 7023, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer are formed. It is not necessary to provide all of these layers.

[0277] The stacking order is not limited to the above, and the first electrode 7023 may be used as an anode, and a hole may be formed on the anode. The injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer may be laminated in this order. When comparing power consumption, the first electrode 7023 is used as a cathode, and an electron injection layer 7024 is provided on the cathode. The power consumption is reduced by stacking the electron transport layer, light emitting layer, hole transport layer, and hole injection layer in this order. This is preferable because

[0278] In addition, various materials can be used for the second electrode 7025 formed on the EL layer 7024. For example, when the second electrode 7025 is used as an anode, a material with a large work function can be used. A transparent conductive material such as ITO, IZO, or ZnO can be preferably used. In this embodiment, the second electrode 7025 is used as an anode, and the IT containing silicon oxide is used as an anode. O film is formed.

[0279] An EL layer 7024 including a light-emitting layer is sandwiched between a first electrode 7023 and a second electrode 7025. In the case of the element structure shown in FIG. 9(B), the light-emitting element 7022 The light emitted from the second electrode 7022 is incident on the second electrode 7025 side and the first electrode 702 as shown by the arrow. Shoots on both sides.

[0280] In FIG. 9B, a light-transmitting conductive film is used as a gate electrode layer, and a light-transmitting conductive film is used as a source electrode. The light-emitting element 7 shows an example in which a light-transmitting thin film is used for the drain electrode layer and the drain electrode layer. The light emitted from the first electrode 7022 passes through the color filter layer 7043. , can be projected through the substrate.

[0281] The color filter layer 7043 can be formed by a droplet discharge method such as an ink jet method, a printing method, or a photolithography method. Each is formed by an etching method using graphic technology.

[0282] The color filter layer 7043 is covered with an overcoat layer 7044, which is further provided with a protective insulating layer. Covered by layer 7045.

[0283] In addition, the protective insulating layer 7045, the planarizing insulating layer 7046, the insulating layer 7042, and the insulating layer 704 The contact hole formed in the insulating film 7011 and reaching the drain electrode layer overlaps with the partition wall 7029. Place it in a position where

[0284] However, if a light-emitting element with a dual-side emission structure is used and both display surfaces are full color, Since light from the second electrode 7025 side does not pass through the color filter layer 7043, a separate color filter is required. It is preferable to provide a sealing substrate with a filter layer above the second electrode 7025.

[0285] Next, a light emitting element with a top emission structure will be described with reference to FIG. 9(C).

[0286] In FIG. 9C, the driving TFT 7001 is an n-type TFT, and the light emitted from the light emitting element 7002 is a 9C shows a cross-sectional view of the pixel when the driving TF The drain electrode layer of the driving TFT 7001 is in contact with the first electrode 7003. and the first electrode 7003 of the light-emitting element 7002 are electrically connected. An EL layer 7004 and a second electrode 7005 are laminated in this order on the organic light emitting diode 3 .

[0287] In addition, various materials can be used for the first electrode 7003. For example, When using 03 as a cathode, a material with a small work function, specifically, Li or Cs, Alkali metals such as Mg, Ca, Sr, and alkaline earth metals, including these In addition to alloys (Mg:Ag, Al:Li, etc.), rare earth metals such as Yb and Er are preferred.

[0288] The periphery of the first electrode 7003 is covered with a partition wall 7009. The partition wall 7009 is made of polyimide. organic resin films such as acrylic, polyamide, and epoxy, inorganic insulating films, or organic polysiloxane The partition wall 7009 is formed by using a photosensitive resin material, and the first electrode 70 03, an opening is formed on the surface, and the side wall of the opening is an inclined surface formed with a continuous curvature. When a photosensitive resin material is used as the partition wall 7009, In this case, the step of forming a resist mask can be omitted.

[0289] The EL layer 7004 formed on the first electrode 7003 and the partition wall 7009 is It is sufficient to include a light-emitting layer, and it may be composed of a single layer or a plurality of layers stacked. When the EL layer 7004 is made up of a plurality of layers, On the first electrode 7003 used as a light-emitting layer, an electron injection layer, an electron transport layer, a light-emitting layer, a hole transport ... The insulating layer, the insulating film, and the insulating film are laminated in this order. Note that it is not necessary to provide all of these layers.

[0290] The stacking order is not limited to the above, and the hole injection layer may be formed on the first electrode 7003 used as an anode. Alternatively, the hole transport layer, the light emitting layer, the electron transport layer, and the electron injection layer may be laminated in this order.

[0291] In Figure 9(C), holes are injected onto a laminated film consisting of a Ti film, an aluminum film, and a Ti film in that order. layer, hole transport layer, light-emitting layer, electron transport layer, and electron injection layer are stacked in this order, and then Mg:Ag A laminate of an alloy thin film and ITO is formed.

[0292] However, when the driving TFT 7001 is an n-type, an electron injection layer and an electron The order of stacking the transport layer, light-emitting layer, hole transport layer, and hole injection layer is advantageous in terms of the drive circuit. This is preferable because it can suppress a voltage rise and reduce power consumption.

[0293] The second electrode 7005 is formed using a light-transmitting conductive material, for example, an acid. Indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide , indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Transparent films such as indium tin oxide, indium zinc oxide, and indium tin oxide doped with silicon oxide A photoconductive conductive film may also be used.

[0294] An EL layer 7004 including a light-emitting layer is sandwiched between a first electrode 7003 and a second electrode 7005. The region corresponds to the light-emitting element 7002. In the case of the pixel shown in FIG. 9(C), the light-emitting element 7002 The light emitted from the second electrode 7005 is emitted to the second electrode 7005 side as shown by the arrow.

[0295] In FIG. 9C, the drain electrode layer of the driving TFT 7001 is a silicon oxide layer. 7051, a protective insulating layer 7052, a planarizing insulating layer 7056, a planarizing insulating layer 7053, and an insulating Electrical connection to the first electrode 7003 through a contact hole provided in the edge layer 7055 The planarization insulating layers 7053 and 7056 are made of polyimide, acrylic, benzocyclobutene, Resin materials such as polyamide and epoxy can be used. Low dielectric constant materials (low-k materials), siloxane resins, PSG (phosphor glass), BPSG (phosphorus boron glass) and the like can be used. Note that insulating films formed from these materials can also be used. The planarization insulating layers 7053 and 7056 may be formed by stacking a plurality of layers. The method for forming the edge layers 7053 and 7056 is not particularly limited, and may be sputtering depending on the material. coating method, SOG method, spin coating, dip coating, spray coating, droplet ejection method (inkjet printing, screen printing, offset printing, etc.), doctor knife, roll coater, curtain A coater, knife coater, etc. can be used.

[0296] In addition, a partition wall 700 is provided to insulate the first electrode 7003 from the first electrode of an adjacent pixel. The partition wall 7009 is made of an organic resin such as polyimide, acrylic, polyamide, or epoxy. The partition wall 7009 is formed by using an oil film, an inorganic insulating film, or an organic polysiloxane. An opening is formed on the first electrode 7003 using a photosensitive resin material, and the sidewall of the opening is It is preferable to form the partition wall 700 so that it has an inclined surface formed with a continuous curvature. When a photosensitive resin material is used as 9, the step of forming a resist mask can be omitted. can be done.

[0297] In the structure of FIG. 9C, when a full-color display is performed, for example, the light-emitting element 700 2 is a green light emitting element, one of the adjacent light emitting elements is a red light emitting element, and the other The optical element is a blue light-emitting element. In addition to the three types of light-emitting elements, a white light-emitting element is also added. A light-emitting display device capable of full-color display using four types of light-emitting elements may be manufactured.

[0298] In the structure of FIG. 9(C), all the light emitting elements are white light emitting elements. A sealing substrate having a color filter or the like is disposed above the light emitting element 7002. A light-emitting display device capable of displaying multiple colors may be fabricated. By forming a color filter and combining it with a color conversion layer, a full color display can be achieved. This can be done.

[0299] Thin film transistors 7001, 7011, and 7021 used in the semiconductor device are The thin film transistor of any one of the first to fifth embodiments can be used as appropriate, and the same steps and The thin film transistors 7001, 7011, and 7021 can be formed of oxide. The mixed region is between the semiconductor layer and the silicon oxide layer. A silicon oxide layer (SiOx, preferably x is 2 or more) containing a large number of green bonds. By stacking the oxide semiconductor layer (top) and then performing heat treatment, hydrogen and water contained in the oxide semiconductor layer are The oxide semiconductor layer is diffused into the silicon layer, and hydrogen and water are reduced in the oxide semiconductor layer. The transistors 7001, 7011, and 7021 are highly reliable thin film transistors.

[0300] Of course, a single-color display may be performed. For example, a lighting device may be formed using white light. Alternatively, a monochromatic light emitting device may be used to form an area color type light emitting device.

[0301] If necessary, an optical film such as a polarizing film, eg, a circular polarizing plate, may be provided.

[0302] Although organic EL elements have been described as light-emitting elements here, inorganic EL elements can also be used as light-emitting elements. It is also possible to provide an L element.

[0303] The thin film transistor (driving TFT) that controls the driving of the light emitting element and the light emitting element are electrically However, the current control TFT is connected between the driving TFT and the light emitting element. The configuration may be such that the power supply is connected to the power supply.

[0304] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0305] (Embodiment 7) In this embodiment mode, the appearance and cross section of a light-emitting display panel (also referred to as a light-emitting panel) will be described with reference to FIGS. 10A shows a thin film transistor and a FIG. 10 is a plan view of a panel in which the light-emitting element and the second substrate are sealed with a sealant between them; FIG. 10B corresponds to a cross-sectional view taken along line HI in FIG. 10A.

[0306] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. 3b and the scanning line driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealing material 4505, and a second substrate 4506. The seal is sealed together with the filler 4507 by the sealant. Highly airtight protective film with little outgassing (lamination film, UV curable resin film) It is preferable to package (enclose) the product in a protective film (such as a film) or a cover material.

[0307] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b have a plurality of thin film transistors. In FIG. 10B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45 shows an example of a thin film transistor 4509 included in a line driver circuit 4503a.

[0308] The thin film transistors 4509 and 4510 are the thin film transistors according to any one of Embodiments 1 to 5. A thin film transistor can be used as appropriate and can be formed using similar processes and materials. The transistors 4509 and 4510 have a mixed region between an oxide semiconductor layer and a silicon oxide layer. In addition, silicon oxide containing defects (preferably containing many oxygen dangling bonds) A layer (SiOx, preferably x is 2 or more) is stacked and then heat-treated to form an oxide semiconductor. The hydrogen and water contained in the layer are diffused into the silicon oxide layer, and the hydrogen and water are reduced in the oxide semiconductor layer. Therefore, the thin film transistors 4509 and 4510 are highly reliable thin film transistors. It is a star.

[0309] The thin film transistor 4509 for the driver circuit is an oxide semiconductor thin film transistor. A conductive layer is provided at a position overlapping with the channel forming region of the semiconductor layer. The thin film transistors 4509 and 4510 are n-channel thin film transistors.

[0310] On the silicon oxide layer 4542, an oxide semiconductor of a thin film transistor 4509 for a driver circuit is formed. A conductive layer 4540 is provided at a position overlapping the channel forming region of the body layer. By providing the oxide semiconductor layer with a region overlapping the channel formation region, This can reduce the amount of change in the threshold voltage of the thin film transistor 4509 later. The conductive layer 4540 may have the same potential as the gate electrode layer of the thin film transistor 4509. Alternatively, it may be different and may function as the second gate electrode layer. The potential of the conductive layer 4540 may be GND, 0 V, or may be in a floating state.

[0311] In addition, a silicon oxide layer 4542 covering the oxide semiconductor layer of the thin film transistor 4510 is formed. The source electrode layer or the drain electrode layer of the thin film transistor 4510 is In the opening formed in the silicon oxide layer 4542 and the insulating layer 4551 provided on the transistor, The wiring layer 4550 is electrically connected to the first electrode 4517. The thin film transistor 4510 and the first electrode 4517 are formed in contact with each other. 50.

[0312] The silicon oxide layer 4542 is formed using the same material as the silicon oxide layer 116 described in Embodiment 1. It may be formed by any method.

[0313] A color filter layer 4545 is formed on the insulating layer 455 so as to overlap the light-emitting region of the light-emitting element 4511. Formed on 1.

[0314] It also functions as a planarizing insulating film to reduce the surface irregularities of the color filter layer 4545. It is covered with an overcoat layer 4543 .

[0315] In addition, an insulating layer 4544 is formed on the overcoat layer 4543. The insulating layer 103 may be formed in the same manner as the protective insulating layer 103 described in Embodiment 1. For example, the insulating layer 103 may be formed of silicon nitride. The silicon film may be formed by sputtering.

[0316] The light emitting element 4511 has a first electrode 4 which is a pixel electrode. 517 is a source electrode layer or a drain electrode layer of the thin film transistor 4510 and a wiring layer 45 The light emitting element 4511 is electrically connected to the first electrode 451 via the first electrode 451. 7, the electroluminescent layer 4512 and the second electrode 4513 are laminated together, but are not limited to the configuration shown. The configuration of the light emitting element 4511 is adjusted according to the direction of the light to be extracted from the light emitting element 4511. can be changed appropriately.

[0317] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode 4517, and the sidewall of the opening is continuous. It is preferable to form the inclined surface with a continuous curvature.

[0318] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0319] The second electrode 45 is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light emitting element 4511. A protective film may be formed on the insulating film 13 and the partition wall 4520. Examples of the protective film include a silicon nitride film, Silicon nitride oxide film, DLC film, etc. can be formed.

[0320] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are transmitted through the FPC 4518a, 4518b, and It is supplied by b.

[0321] The connection terminal electrode 4515 is made of the same conductive film as the first electrode 4517 of the light-emitting element 4511. The terminal electrode 4516 is formed on the source electrode layer and the drain electrode layer of the thin film transistor 4509. It is formed from the same conductive film as the electrode layer.

[0322] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. are electrically connected to each other.

[0323] The substrate located in the direction in which light is extracted from the light emitting element 4511 must be light-transmitting. In this case, use a glass plate, plastic plate, polyester film or acrylic film. A light-transmitting material such as polyethylene is used.

[0324] In addition to inert gases such as nitrogen and argon, filler 4507 can also be used as UV-curable resin. It can be made of oil or thermosetting resin, and PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. For example, nitrogen can be used as a filler. That's fine.

[0325] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. An optical film such as a retardation plate (λ / 4 plate, λ / 2 plate) may be provided as appropriate. Alternatively, an anti-reflection film may be provided on the circular polarizer. For example, the surface roughness can be used to diffuse reflected light, Anti-glare treatment can be applied to reduce reflections.

[0326] The sealant is applied using a screen printing method, inkjet device or dispensing device. The sealant is typically a visible light curable, ultraviolet curable or heat curable material. A material containing a resin having a high viscosity may be used. A filler may also be included.

[0327] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Alternatively, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted, and the configuration is not limited to that of FIG.

[0328] Through the above steps, a highly reliable light-emitting display device (display panel) can be manufactured as a semiconductor device. It is possible.

[0329] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0330] (Embodiment 8) The appearance and cross section of a liquid crystal display panel, which is one mode of a semiconductor device, will be described with reference to FIG. 16(A) and 16(C) show thin film transistors 4010 and 4011 and a liquid crystal element 4013 is formed between the first substrate 4001 and the second substrate 4006 by a sealant 4005. 16(B) is a plan view of the panel sealed with the adhesive of FIG. 16(A) or FIG. 16(C). This corresponds to the cross section at MN.

[0331] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this way, a sealing material 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driver circuit 4004 is made up of a first substrate 4001, a sealing material 4005, and a second substrate 4006. The first substrate 4001 is sealed together with the liquid crystal layer 4008. In a region different from the region surrounded by the material 4005, a single crystal is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film or a polycrystalline semiconductor film is mounted.

[0332] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, The wire bonding method, the TAB method, or the like can be used. 16C is an example of mounting a signal line driver circuit 4003 by the COG method. This is an example in which the signal line driver circuit 4003 is implemented by Method B.

[0333] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 16B, the thin film transistor included in the pixel portion 4002 is A transistor 4010 and a thin film transistor 4011 included in the scanning line driver circuit 4004 The insulating layers 4041 and 4042 are formed on the thin film transistors 4010 and 4011. 2, 4020, and 4021 are provided.

[0334] The thin film transistors 4010 and 4011 are the thin film transistors according to any one of the first to fifth embodiments. A thin film transistor can be used as appropriate and can be formed using similar processes and materials. The transistors 4010 and 4011 have a mixed region between the oxide semiconductor layer and the silicon oxide layer. In addition, silicon oxide containing defects (preferably containing many oxygen dangling bonds) A layer (SiOx, preferably x is 2 or more) is stacked and then heat-treated to form an oxide semiconductor. The hydrogen and water contained in the layer are diffused into the silicon oxide layer, and the hydrogen and water are reduced in the oxide semiconductor layer. Therefore, the thin film transistors 4010 and 4011 are highly reliable thin film transistors. In this embodiment, the thin film transistors 4010 and 4011 are n-channel It is a thin film transistor.

[0335] The oxide semiconductor layer of the thin film transistor 4011 for the driver circuit is formed on the insulating layer 4021. A conductive layer 4040 is provided in a position overlapping with the channel formation region. By providing the layer at a position overlapping the channel forming region of the nitride semiconductor layer, In this case, the amount of change in the threshold voltage of the thin film transistor 4011 can be reduced. The conductive layer 4040 may have the same potential as the gate electrode layer of the thin film transistor 4011. The conductive layer may be different from the first gate electrode layer and may function as a second gate electrode layer. The potential of 4040 may be GND, 0V, or may be in a floating state.

[0336] The pixel electrode layer 4030 of the liquid crystal element 4013 is The liquid crystal element 4013 is electrically connected to the source electrode layer or the drain electrode layer. The counter electrode layer 4031 is formed on the second substrate 4006. The portion where the electrode layer 4031 and the liquid crystal layer 4008 overlap corresponds to the liquid crystal element 4013. The pixel electrode layer 4030 and the counter electrode layer 4031 are insulating layers that function as alignment films. The liquid crystal layer 4008 is connected to the insulating layer 4032 and the insulating layer 4033. It is being held.

[0337] The first substrate 4001 and the second substrate 4006 may be light-transmitting substrates. Glass, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film, or acrylic resin film Films can be used.

[0338] 4035 is a columnar spacer obtained by selectively etching the insulating film. To control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 A spherical spacer may be used. is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion is used to connect the opposing electrode layer 40 via conductive particles disposed between the pair of substrates. The conductive particles can electrically connect the sealing material 40 to the common potential line. Included in 05.

[0339] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a response speed of 1 msec. It is optically isotropic, so alignment treatment is not required, and viewing angle dependency is small. Since there is no need to provide an alignment film, rubbing treatment is also unnecessary. This prevents electrostatic breakdown caused by the liquid crystal display device during the manufacturing process. Therefore, it is possible to improve the productivity of the liquid crystal display device. In particular, thin film transistors using oxide semiconductor layers are susceptible to static electricity. Therefore, the electrical characteristics of the capacitor may fluctuate significantly and deviate from the design range. It is possible to use a blue phase liquid crystal material in a liquid crystal display device having a thin film transistor using a layer. It is more effective.

[0340] In addition to the transmissive liquid crystal display device, the present invention can also be applied to a semi-transmissive liquid crystal display device.

[0341] In addition, in a liquid crystal display device, a polarizing plate is provided on the outer side (viewing side) of the substrate, and a colored layer and a display element are provided on the inner side. In this example, the polarizing plate is provided on the inner side of the substrate. In addition, the laminated structure of the polarizing plate and the colored layer is not limited to that of the present embodiment, and the materials of the polarizing plate and the colored layer and The conditions may be appropriately set depending on the manufacturing process conditions. A light-shielding film that functions as a light-shielding film may be provided.

[0342] An insulating layer 4041 is provided over the thin film transistors 4011 and 4010 in contact with the oxide semiconductor layer. The insulating layer 4041 is formed of the same material as the silicon oxide layer 116 described in Embodiment 1. The insulating layer 4041 may be formed by the same material and method as in the first embodiment. A silicon oxide layer containing defects is formed by sputtering. A protective insulating layer 4042 is formed on and in contact with the insulating film 4041. The insulating layer 103 may be formed in the same manner as the insulating layer 103 shown in FIG. In addition, a flat insulating layer 4042 can be formed on the protective insulating layer 4042 to reduce the surface irregularities of the thin film transistor. The insulating layer 4021 functions as an insulating film.

[0343] An insulating layer 4021 is formed as a planarization insulating film. Heat-resistant organic compounds such as amide, acrylic, benzocyclobutene, polyamide, and epoxy. In addition to the above organic materials, low-k materials can also be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. In addition, by stacking multiple insulating films made of these materials, it is possible to obtain an insulating layer. 4021 may be formed.

[0344] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, a S OG method, spin coating, dip coating, spray coating, droplet ejection method (inkjet method, lean printing, offset printing, etc.), doctor knife, roll coater, curtain coater A knife coater or the like can be used. By using the semiconductor device as a gate, a semiconductor device can be manufactured efficiently.

[0345] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A light-transmitting conductive material can be used.

[0346] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer (conductive polymer The conductive composition can be used to form the conductive film. The pixel electrode has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. It is preferable that the electrical conductivity is 0.1 Ω·cm or less.

[0347] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0348] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials applied to 002 are supplied from FPC4018.

[0349] The connection terminal electrode 4015 is made of the same conductive film as the pixel electrode layer 4030 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the source electrode layers of the thin film transistors 4010 and 4011. The drain electrode layer is formed of the same conductive film as the drain electrode layer.

[0350] The connection terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. are electrically connected.

[0351] In FIG. 16, a signal line driver circuit 4003 is separately formed and mounted on a first substrate 4001. The present invention is not limited to this configuration. Alternatively, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be separately formed. It may be implemented.

[0352] In addition, optical components such as black matrices (light-shielding layers), polarizing components, phase difference components, and anti-reflection components For example, a polarizing substrate and a retardation substrate are used to generate circularly polarized light. In addition, a backlight, a sidelight, or the like may be used as the light source.

[0353] In an active matrix liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected pixels, a display pattern is formed on the screen. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode. The liquid crystal layer disposed between the electrode and the counter electrode is optically modulated, and this optical modulation produces a display pattern. is perceived by the observer as

[0354] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, which can cause afterimages. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0355] In addition, the vertical synchronization frequency is set to 1.5 times the normal frequency, preferably 2 times or more, to improve the video characteristics. There is also a driving technology called double speed driving, which improves the image quality.

[0356] In addition, in order to improve the video characteristics of the LCD display, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame period. Therefore, three or more types of LEDs may be used, or white-emitting LEDs may be used. Since multiple LEDs can be controlled, the LE can be switched in accordance with the timing of the optical modulation of the liquid crystal layer. This driving technology can also synchronize the timing of the LEDs to be turned off. This is especially useful when displaying images with a large proportion of black areas occupying the entire screen. This can reduce power consumption.

[0357] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. can be improved compared to the past.

[0358] Furthermore, thin film transistors are easily damaged by static electricity, so the pixel section or drive It is preferable that a protection circuit be provided over the same substrate as the operation circuit. For example, the protection circuit is configured by using a nonlinear element. In this embodiment, a plurality of protection circuits are provided between the line input terminal and the signal line input terminal. A surge voltage is applied to the scanning lines, signal lines, and capacitance bus lines due to static electricity or the like. It is designed to prevent damage to pixel transistors, etc. When a voltage is applied to the transistor, the charge is released to the common wiring. is composed of nonlinear elements arranged in parallel between the scanning lines and the common wiring. Linear elements consist of two-terminal elements such as diodes or three-terminal elements such as transistors. For example, it is possible to form the thin film transistor in the pixel portion in the same process. For example, by connecting the gate terminal and the drain terminal, it can have the same characteristics as a diode. It is possible.

[0359] The LCD module is available in TN (Twisted Nematic) mode, IP S (In-Plane-Switching) mode, FFS (Fringe Field d Switching) mode, ASM (Axially Symmetric al Ignition Micro-cell mode, OCB (Optical Compensation ated Birefringence mode, FLC (Ferroelectric Liquid Crystal mode, AFLC (AntiFerrole Electr ic Liquid Crystal) mode can be used.

[0360] As described above, the semiconductor device disclosed in the present specification is not particularly limited, and may be any of TN liquid crystal, O CB liquid crystal, STN liquid crystal, VA liquid crystal, ECB type liquid crystal, GH liquid crystal, polymer dispersed liquid crystal, Cotic liquid crystal panels can be used, among which normally black liquid crystal panels For example, it is preferable to use a transmissive liquid crystal display device that employs a vertical alignment (VA) mode. There are several types of vertical alignment modes, such as MVA (Multi-Door Alignment). main Vertical Alignment) mode, PVA(Patterne) d Vertical Alignment) mode, ASV mode, etc. can.

[0361] An example of a VA type liquid crystal display device is shown below.

[0362] A VA type liquid crystal display device is a type of method that controls the alignment of liquid crystal molecules in a liquid crystal display panel. In a VA type liquid crystal display device, when no voltage is applied, the liquid crystal molecules are aligned with the panel surface. In this embodiment, pixels are divided into several areas. The molecules are tilted in different directions in each sub-pixel. This is called multi-domain or multi-domain design. In the following explanation, multi-domain A liquid crystal display device with carefully considered design will be described.

[0363] 12 and 13 show the pixel structure of a VA type liquid crystal display panel. FIG. 12 shows a cross-sectional structure corresponding to the cutting line YZ shown in the figure. The following description will refer to both figures.

[0364] This pixel structure has multiple pixel electrode layers in one pixel, and each pixel electrode layer has a TFT Each TFT is configured to be driven by a different gate signal. That is, in a pixel with a multi-domain design, the signal applied to each pixel electrode layer is , and have a configuration in which they are controlled independently.

[0365] The pixel electrode layer 624 is formed by contact holes passing through the insulating film 620 and the insulating film 622. In the ball 623, the wiring 618 is connected to the TFT 628. In the contact hole 627 that penetrates the insulating film 620 and the insulating film 622, The gate wiring 602 of the TFT 628 and the TFT 629 are connected by a wiring 619. The gate wiring 603 of the FT629 is separated so that different gate signals can be applied. On the other hand, the wiring 616 functioning as a data line is connected to the TFT 628 and the TFT 629. The TFT 628 and the TFT 629 are used in common in any one of the first to fifth embodiments. A single thin film transistor can be used as appropriate. A gate insulating layer 606 is formed on the gate insulating layer 603 .

[0366] Furthermore, a capacitance wiring 690 is provided, and the gate insulating layer 606 is used as a dielectric. A capacitance electrode and a storage capacitance are formed, which are electrically connected to the pixel electrode layer.

[0367] The pixel electrode layer 624 and the pixel electrode layer 626 have different shapes and are separated by a slit 625. The pixel electrode layer 626 surrounds the outside of the pixel electrode layer 624 that spreads in a V shape. The timing of applying voltages to the pixel electrode layer 624 and the pixel electrode layer 626 is set as follows: The orientation of the liquid crystal is controlled by varying the TFT 628 and the TFT 629. The equivalent circuit of this pixel structure is shown in FIG. 6. By applying different gate signals to the gate wiring 602 and the gate wiring 603, This allows the liquid crystal elements 651 and 652 to operate differently. By individually controlling the operation of the FT628 and TFT629, the alignment of the liquid crystal can be precisely controlled. This can widen the viewing angle.

[0368] On the counter substrate 601, a light-shielding film 632, a colored film 636, and a counter electrode layer 640 are formed. In addition, a planarizing film, also called an overcoat film, is provided between the colored film 636 and the counter electrode layer 640. The film 637 prevents the alignment of the liquid crystal from becoming disordered. Figure 14 shows the structure of the opposing substrate side. The counter electrode layer 640 is an electrode shared between different pixels, but has a slit 641 formed therein. The slit 641 and the slits on the pixel electrode layer 624 and pixel electrode layer 626 sides are By arranging the dots so that they interdigitate with each other, a diagonal electric field is effectively generated, and the alignment of the liquid crystal is This allows the liquid crystal to be oriented in different directions depending on the location. This allows for a wider viewing angle.

[0369] The counter electrode layer 640 is a first counter electrode layer provided in the pixel section, and is a second counter electrode layer provided in the drive circuit section. The second counter electrode layer has the same potential as the second counter electrode layer having the opening pattern. By providing the opposing electrode layer in the drive circuit section, a highly reliable and low power consumption semiconductor device can be obtained. It is possible.

[0370] The pixel electrode layer 624, the liquid crystal layer 650, and the counter electrode layer 640 are overlapped to form a first liquid crystal pixel. In addition, the pixel electrode layer 626, the liquid crystal layer 650, and the counter electrode layer 640 are overlapped. The first liquid crystal element and the second liquid crystal element are overlapped with each other to form a second liquid crystal element. The liquid crystal display device has a multi-domain structure in which the liquid crystal elements are arranged.

[0371] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0372] (Embodiment 9) In this embodiment, an example of electronic paper is shown as a semiconductor device according to an embodiment of the present invention. vinegar.

[0373] FIG. 11 shows an active matrix semiconductor device as an example of a semiconductor device to which an embodiment of the present invention is applied. The thin film transistor 581 used in the semiconductor device is a thin film transistor 581. The thin film transistor of any one of the first to fifth embodiments can be used appropriately, and the same process can be performed. The thin film transistor 581 can be formed using an oxide semiconductor layer and a silicon oxide layer. It has a mixed region between the carbon layer and the SiO2 layer. It also contains defects (many oxygen dangling bonds). a silicon oxide layer (SiOx, preferably x is 2 or more) is laminated on the substrate, and then subjected to heat treatment. By this treatment, hydrogen and water contained in the oxide semiconductor layer are diffused into the silicon oxide layer, and The oxide semiconductor layer has reduced hydrogen and water. Therefore, the thin film transistor 581 has high reliability. It is a high-performance thin film transistor.

[0374] The electronic paper in Figure 11 is an example of a display device that uses the twisting ball display method. The spherical display method uses black and white spherical particles as the display element, and the electrode layer is and a potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying by controlling the orientation of spherical particles by generating a magnetic field.

[0375] The thin film transistor 581 provided on the substrate 580 is a thin film transistor of a bottom gate structure. The source electrode layer or the drain electrode layer is a silicon oxide layer 583 and a protective insulating layer 58 4. The insulating layer 585 is electrically connected to the first electrode layer 587 through an opening formed in the insulating layer 585. It is being done.

[0376] Between the first electrode layer 587 and the second electrode layer 588, there are a black region 590a and a white region 590b. 0b and a spherical particle 589 having a cavity 594 filled with liquid therearound. The spherical particles 589 are filled with a filler 595 such as resin (see FIG. 11). In this embodiment, the first electrode layer 587 corresponds to the pixel electrode, and the counter substrate 5 The second electrode layer 588 provided in 96 corresponds to the common electrode.

[0377] Also, instead of the twist ball, an electrophoretic element can be used. and a diameter of 10 μm to 20 μm that contains positively charged white particles and negatively charged black particles. Microcapsules of about 0 μm in size are used. When an electric field is applied by the first and second electrode layers, the microcapsules turn white. White particles and black particles move in opposite directions, allowing the display to be white or black. The display element that applies this principle is an electrophoretic display element, which is generally called electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display unit, the image that has been displayed can be retained. Therefore, the semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The ability to preserve the displayed image even when the device (also known as a semiconductor device) is moved away This becomes possible.

[0378] Through the above steps, electronic paper with high reliability as a semiconductor device can be manufactured. .

[0379] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0380] (Embodiment 10) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television receivers), computer monitors, digital cameras, digital video cameras digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable Examples include game machines, mobile information terminals, sound reproduction devices, and large game machines such as pachinko machines. do.

[0381] 17A shows an example of a mobile phone. The mobile phone 1600 has a housing 1601. In addition to the display unit 1602 incorporated in the 1604, a speaker 1605, a microphone 1606, etc.

[0382] The mobile phone 1600 shown in FIG. 17A displays information by touching the display portion 1602 with a finger or the like. In addition, operations such as making a phone call or sending an email can be performed using the display. This can be done by touching 1602 with a finger or the like.

[0383] The screen of the display unit 1602 has three main modes. The first is a display mode that mainly displays images. The first mode is a display mode, and the second mode is an input mode that mainly inputs information such as characters. This is a display + input mode that combines two modes: display mode and input mode.

[0384] For example, when making a call or creating an email, the display unit 1602 is used to input characters. This is the main character input mode, and you can input characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1602. I wish.

[0385] In addition, the mobile phone 1600 may include a sensor for detecting tilt, such as a gyro or an acceleration sensor. By providing a detection device having the above, the orientation of the mobile phone 1600 (portrait or landscape) can be determined and the display The screen display of the display unit 1602 can be automatically switched.

[0386] The screen mode can be switched by touching the display unit 1602 or by operating the housing 1601. This is done by operating the buttons 1603a and 1603b. For example, the image to be displayed on the display unit can be switched depending on the type of image. If the image signal is video data, it switches to display mode, and if it is text data, it switches to input mode. can.

[0387] In the input mode, the optical sensor of the display unit 1602 detects a signal and displays it. If there is no input by touch operation on the part 1602 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0388] The display unit 1602 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to capture images of finger veins, palm veins, etc.

[0389] The semiconductor device described in the above embodiment modes can be applied to the display portion 1602. For example, As the element switching element, a plurality of thin film transistors shown in the other embodiments are arranged. It is possible.

[0390] FIG. 17(B) is also an example of a mobile phone. The portable information terminal shown in FIG. 17(B) is It can have multiple functions. For example, in addition to the telephone function, it can also have a built-in computer and perform various functions. It can also have various data processing functions.

[0391] The portable information terminal shown in FIG. 17B is configured with two housings, a housing 1800 and a housing 1801. The housing 1801 contains a display panel 1802, a speaker 1803, a microphone Phone 1804, pointing device 1806, camera lens 1807, external connection The housing 1800 includes a keyboard 1810 and an external memory slot. 1811, etc. The antenna is built into the housing 1800.

[0392] The display panel 1802 is equipped with a touch panel, and the image displayed on the display panel 1802 is shown in FIG. A plurality of operation keys 1805 are indicated by dotted lines.

[0393] In addition to the above configuration, a contactless IC chip, a small recording device, etc. may be built in.

[0394] The semiconductor device shown in the above embodiment mode can be used for the display panel 1802. The display direction changes accordingly. It is equipped with a microphone 1807, so it is possible to make video calls. The Crophone 1804 is not limited to voice calls, but also allows video calls, recording, playback, etc. Furthermore, the housing 1800 and the housing 1801 slide and are unfolded as shown in FIG. 17(B). The device can be folded from a folded state to a stacked state, making it possible to make the device compact and portable.

[0395] The external connection terminal 1808 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the memory slot 1811, it is possible to store and transfer a larger amount of data. do.

[0396] In addition to the above functions, even if the device has infrared communication function, TV reception function, etc. good.

[0397] FIG. 18A shows an example of a television device. The television device 9600 includes: A display unit 9603 is incorporated in a housing 9601. The display unit 9603 displays images. In this case, the housing 9601 is supported by a stand 9605. The figure shows the configuration.

[0398] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the information displayed on the display 9603 is In addition, the remote control operation device 9610 can operate the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0399] The television device 9600 is configured to include a receiver, a modem, and the like. It can receive more general TV broadcasts and can also receive them via wired or wireless modems. By connecting to a communication network, it can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0400] The semiconductor device described in the above embodiment modes can be applied to the display portion 9603. For example, As the element switching element, a plurality of thin film transistors shown in the other embodiments are arranged. It is possible.

[0401] FIG. 18B shows an example of a digital photo frame. The frame 9700 has a display unit 9703 built into a housing 9701. 3 is capable of displaying various images, for example, images taken with a digital camera. By displaying data, it can function like a regular photo frame.

[0402] The semiconductor device described in the above embodiment modes can be applied to the display portion 9703. For example, As the element switching element, a plurality of thin film transistors shown in the other embodiments are arranged. It is possible.

[0403] The Digital Photo Frame 9700 has an operation panel, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section. These components may be incorporated on the same surface as the display unit, but they may be incorporated on the side or back. It is preferable to have a recording medium for a digital photo frame as it improves the design. A memory that stores image data taken with a digital camera is inserted into the body insertion section. The image data can be captured and the captured image data can be displayed on the display portion 9703 .

[0404] The digital photo frame 9700 may also be configured to be capable of transmitting and receiving information wirelessly. It is also possible to configure the device so that desired image data can be wirelessly acquired and displayed.

[0405] FIG. 19 shows a portable gaming machine, which is composed of two cabinets, a cabinet 9881 and a cabinet 9891. The housing 9881 is connected to a display unit 988 by a connecting portion 9893 so as to be openable and closable. 2 is incorporated in the housing 9891, and a display unit 9883 is incorporated in the housing 9891.

[0406] The semiconductor device described in the above embodiment modes can be applied to the display portion 9883. For example, As the element switching element, a plurality of thin film transistors shown in the other embodiments are arranged. It is possible.

[0407] 19 also includes a speaker unit 9884, a recording medium insertion unit 9885, and a 886, LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor Sa9888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature Degree, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient , vibration, odor or infrared measuring functions), microphone 9889) etc. Of course, the configuration of the portable gaming machine is not limited to the above, and It is sufficient if the device is configured with the thin film transistors disclosed in the specification, and other auxiliary equipment is provided as appropriate. The portable gaming machine shown in FIG. It has the function of reading out the programs or data stored in the device and displaying them on the display, and wirelessly connecting to other portable gaming machines. It has a function to communicate and share information. The function is not limited to this and can have various functions.

[0408] FIG. 21 shows a light emitting device, which is an example of a semiconductor device formed by applying the above embodiment, in a chamber. This is an example of the light emitting device used as a lighting device 3001 in a room. The light emitting device shown in this specification can also be made larger in area. Therefore, it can be used as a large-area lighting device. The light emitting device can also be used as a desk lamp 3002. In addition to ceiling-mounted lighting fixtures and tabletop lighting fixtures, we also offer wall-mounted lighting fixtures, interior lighting fixtures, and indoor lighting fixtures. This also includes guide lights.

[0409] As described above, the semiconductor device described in any one of the first to ninth embodiments can be To provide a highly reliable electronic device that can be applied to display panels of various electronic devices. can be done.

[0410] (Embodiment 11) The semiconductor device disclosed in this specification can be applied as electronic paper. Par can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, trains, etc. It can be used for in-car advertising, displaying on various cards such as credit cards, etc. An example of an electronic device is shown in Figure 20.

[0411] 20 shows an example of an electronic book. For example, an electronic book 2700 includes a housing 2701 and a The housing 2701 and the housing 2703 are The shaft 2711 serves as an axis for opening and closing. This configuration allows the device to operate like a paper book.

[0412] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a sentence is displayed on the right display unit (display unit 2705 in FIG. 20) and An image can be displayed on the display unit 2707 in FIG.

[0413] 20 shows an example in which the housing 2701 is provided with an operation unit. 701 includes a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The keyboard and pointing device may be provided on the rear surface of the housing. On the side, there are external connection terminals (earphone terminal, USB terminal, or AC adapter and USB A configuration including a terminal that can be connected to various cables, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have the function of an electronic dictionary. That's fine.

[0414] The electronic book 2700 may also be configured to be able to send and receive information wirelessly. The desired book data can be purchased and downloaded from the e-book server. is also possible.

[0415] This embodiment mode can be implemented in appropriate combination with other embodiment modes. [Explanation of symbols]

[0416] 100 boards 101 gate electrode layer 102 Gate insulating layer 103 Protective insulation layer 110 Thin-film transistor 111 gate electrode layer 112 Oxide semiconductor layer 115a Source electrode layer 115b drain electrode layer 116 Silicon oxide layer 118a Oxide conductive layer 118b Oxide conductive layer 119 Mixed area 120 Oxide semiconductor layer 121 Oxide semiconductor layer 130 Thin-film transistor 140 PCB 141 Oxide semiconductor layer 142 Gate insulating layer 150 boards 151 gate electrode layer 152 Gate insulating layer 153 Protective Insulation Layer 160 Thin-Film Transistor 162 Oxide semiconductor layer 165a Source electrode layer 165b Drain electrode layer 166 Silicon oxide layer 171 Oxide semiconductor layer 173 Silicon oxide layer 179 Mixed area 181 gate electrode layer 183 Protective Insulation Layer 190 Thin-Film Transistor 192 Oxide semiconductor layer 195a Source electrode layer 195b Drain electrode layer 196 silicon oxide layer 199 Mixed area 580 board 581 Thin-film transistor 583 Silicon oxide layer 584 Protective Insulation Layer 585 Insulation Layer 587 Electrode layer 588 Electrode layer 589 Spherical particles 590a black area 590b White area 594 Cavity 595 Filling material 596 Opposing substrate 600 boards 601 Opposing substrate 602 Gate wiring 603 Gate wiring 606 Gate insulating layer 616 Wiring 618 Wiring 619 Wiring 620 insulating film 622 insulating film 623 Contact Hole 624 Pixel electrode layer 625 Slit 626 Pixel electrode layer 627 Contact Hole 628 TFT 629 TFT 632 Light-shielding film 636 Colored film 637 Planarization film 640 Counter electrode layer 641 Slit 650 LCD layer 651 Liquid crystal element 652 Liquid crystal element 690 Capacitance wiring 1000 Film deposition equipment 1100 Transport Room 1101 Means of transport 1110 Loader Room 1111 cassette 1120 Unloader Room 1121 Cassette 1200 Transport Room 1201 Means of transport 1205 Exhaust means 1210 Processing Room 1211 Substrate heating means 1215 Exhaust means 1220 Processing Room 1225 Exhaust means 1230 Processing Room 1235 Exhaust means 1240 Processing Room 1245 Exhaust means 1600 mobile phones 1601 Case 1602 Display section 1603a Operation button 1603b Operation button 1604 External connection port 1605 Speaker 1606 Mike 1800 cabinet 1801 Case 1802 Display panel 1803 Speaker 1804 Microphone 1805 Operation Key 1806 Pointing Device 1807 Camera Lenses 1808 External connection terminal 1810 keyboard 1811 External memory slot 2700 e-books 2701 Case 2703 Housing 2705 ​​Display section 2707 Display section 2711 Shaft 2721 Power supply 2723 Operation Key 2725 Speaker 3000 Film deposition equipment 3001 Lighting equipment 3002 Tabletop lighting fixture 3100 Transport Room 3101 Means of transport 3105 Exhaust means 3110 Loader Room 3111 Cassette 3115 Exhaust means 3120 Unloader Room 3121 Cassette 3125 Exhaust means 3210 Processing Room 3211 Substrate heating means 3215 Exhaust means 3220 Processing Room 3225 Exhaust means 3230 Processing Room 3235 Exhaust means 3240 Processing Room 3241 Substrate heating means 3245 Exhaust means 3250 Processing Room 3251 Cooling means 3255 Exhaust means 4001 board 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 board 4008 Liquid crystal layer 4010 Thin Film Transistor 4011 Thin-film transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4019 Anisotropic conductive film 4021 Insulation layer 4030 Pixel electrode layer 4031 Counter electrode layer 4032 Insulation layer 4040 Conductive layer 4041 Insulation layer 4042 Protective insulation layer 4501 Circuit Board 4502 Pixel section 4503a Signal line driver circuit 4504a Scanning line driver circuit 4505 Sealing material 4506 board 4507 Filling material 4509 Thin-film transistor 4510 Thin-film transistor 4511 Light-emitting element 4512 Electroluminescent layer 4513 Electrode 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode 4518a FPC 4519 Anisotropic conductive film 4520 Bulkhead 4540 Conductive layer 4542 silicon oxide layer 4543 Overcoat layer 4544 Insulation layer 4545 Color filter layer 4550 wiring layer 4551 Insulation layer 5001 Dry Pump 5002 Exhaust chamber 5003 Power supply 5004 Target 5005 cathode 5006 Stage lifting mechanism 5007 Substrate Stage 5008 Gate Valve 5009 Cooling water 5010 Flow controller 5011 Gas Tank 6400 pixels 6401 Switching transistor 6402 Drive transistor 6403 Capacitor element 6404 Light-emitting element 6405 signal line 6406 scan lines 6407 Power line 6408 Common electrode 7001 Driving TFT 7002 Light-emitting element 7003 Electrode 7004 EL layer 7005 Electrode 7009 Bulkhead 7011 Driving TFT 7012 Light-emitting element 7013 Electrode 7014 EL layer 7015 Electrode 7016 Shielding membrane 7017 Conductive film 7019 Bulkhead 7021 Driving TFT 7022 Light-emitting element 7023 Electrode 7024 EL layer 7025 Electrode 7027 Conductive film 7029 Bulkhead 7031 Insulation layer 7032 Insulation layer 7033 Color filter layer 7034 Overcoat layer 7035 Protective insulation layer 7042 Insulation layer 7043 Color filter layer 7044 Overcoat layer 7045 Protective insulation layer 7051 Silicon oxide layer 7052 Protective insulation layer 7053 Planarization insulating layer 7055 Insulation layer 7056 Planarization insulating layer 9600 Television Equipment 9601 Housing 9603 Display section 9605 Stand 9607 Display section 9609 Operation Key 9610 Remote Controlled Machine 9700 Digital Photo Frame 9701 Housing 9703 Display section 9881 Case 9882 Display section 9883 Display section 9884 Speaker unit 9885 Operation Key 9886 Recording medium insertion section 9887 Connection terminal 9888 Sensor 9889 Microphone 9890 LED Lamp 9891 Case 9893 Connection section

Claims

1. a pixel portion having a first transistor; a driver circuit having a second transistor; A display device having: a silicon nitride layer; an oxide semiconductor layer including a channel formation region of the second transistor; a silicon oxide layer located between the silicon nitride layer and the channel formation region of the oxide semiconductor layer and having a region in contact with the silicon nitride layer; a first region located between the silicon oxide layer and the oxide semiconductor layer, the first region including oxygen, silicon, and at least one metal element selected from In, Ga, and Zn contained in the oxide semiconductor layer; a first conductive layer having a region functioning as a source electrode or a drain electrode of the second transistor; an insulating layer having a region located above the first conductive layer, the first region, the silicon oxide layer, the oxide semiconductor layer, and the silicon nitride layer, and having a planarization function; and The first region has a compound containing carbon atoms.

2. a pixel portion having a first transistor; a driver circuit having a second transistor; A display device having: a silicon nitride layer; an oxide semiconductor layer including a channel formation region of the second transistor; a silicon oxide layer located between the silicon nitride layer and the channel formation region of the oxide semiconductor layer and having a region in contact with the silicon nitride layer; a first region located between the silicon oxide layer and the oxide semiconductor layer, the first region including oxygen, silicon, and at least one metal element selected from In, Ga, and Zn contained in the oxide semiconductor layer; a first conductive layer having a region functioning as a source electrode or a drain electrode of the second transistor; an insulating layer having a region located above the first conductive layer, the first region, the silicon oxide layer, the oxide semiconductor layer, and the silicon nitride layer, and having a planarization function; and The display device, wherein the first region comprises carbon atoms.

3. In claim 1 or claim 2, The display device, wherein the first conductive layer has a region located on the opposite side of the oxide semiconductor layer from the silicon oxide layer.

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