Method for forming ferroelectric thin film and semiconductor device including the same

Abstract

This semiconductor device 100 is provided with an Si substrate 110 and a ferroelectric thin film 120. The ferroelectric thin film 120 is formed on the Si substrate 110. The ferroelectric thin film 120 contains HfNx (1 < x) that has a rhombohedral crystal structure.

Description

[Technical Field]

[0001] The present invention relates to ferroelectric thin films. [Background technology]

[0002] In recent years, with the trend toward higher performance and lower power consumption in portable information and communication devices, it has become important to increase the capacity, speed, and power consumption of non-volatile memory, such as flash memory, which is the semiconductor memory used in integrated circuits.

[0003] Ferroelectric hafnium oxide (Fe-HfO2) is a metastable orthorhombic crystal, and because ferroelectricity can be obtained even in extremely thin films of the 10 nm range, research is underway into miniaturization and high integration of ferroelectric gate transistors (MFSFET, Metal-Ferroelectric-Semiconductor Field-Effect Transistors) using ferroelectric HfO2 (Non-Patent Document 1). Research is also intensifying on integrated circuits that use MFSFETs as analog memory and mimic the operation of the human brain (Non-Patent Document 2).

[0004] High-precision threshold voltage (Vth) control is important for analog memory applications. Currently, in most reported cases, ferroelectric HfO2 is formed by doping Zr (zirconium) or Si (silicon) into HfO2, which poses a challenge in terms of threshold voltage variation due to dopant distribution.

[0005] The present inventors have formed a ferroelectric non-doped HfO2 film with a thickness of 10 nm on a Si substrate and achieved MFSFET operation at a power supply voltage of 2.5 V (Non-Patent Document 3). [Prior art documents] [Non-patent literature]

[0006] [Non-Patent Document 1] SB scke et al., IEDM Tech. Dig., 547 (2011). [Non-patent document 2] S. Dutta et al., VLSI Symp. Tech.Dig., T-38 (2019). [Non-patent document 3] S. Ohmi et al., Device Research Conference, 96 (2020). [Non-patent document 4] S. Ohmi et at., Device Research Conference, 181 (2019). [Non-patent document 5] C. Hu et. al., Scripta Materialia 108, pp. 141-146 (2015) [Non-patent document 6] S. Ohmi et at., IEEE Trans. Electron Devices (2021) [in press] Summary of the Invention [Problem to be solved by the invention]

[0007] When HfO2 is formed on a Si substrate, a high-temperature heat treatment is required, which results in the formation of a low-dielectric-constant SiO2 layer at the interface between the Si substrate and HfO2. The SiO2 layer generates an electric field (depolarization field) in the opposite direction to the electric field generated by the HfO2 layer, which causes degradation of memory characteristics.

[0008] The present disclosure has been made in light of such a situation, and one exemplary purpose of an embodiment thereof is to provide a ferroelectric thin film in which no low-dielectric-constant layer exists at the interface with a Si substrate, and a semiconductor device using the same. [Means for solving the problem]

[0009] A semiconductor device according to an embodiment of the present disclosure includes a Si substrate and a HfN film having a rhombohedral crystal structure formed on the Si substrate. xIt includes a ferroelectric thin film containing (1 < x).

[0010] Another aspect of the present disclosure is a method for forming a ferroelectric thin film. This method involves depositing Hf by ECR (Electron Cyclotron Resonance) sputtering in a gas atmosphere containing N2 and Ar on a Si substrate to form a HfN x layer, and after the forming step, performing a heat treatment to crystallize HfN x (1 < x) into a rhombohedral crystal system.

[0011] Yet another aspect of the present disclosure is a semiconductor device. This semiconductor device includes a transistor. The transistor includes a Si substrate, a HfN formed in a gate region on the Si substrate and having a rhombohedral crystal structure x ferroelectric thin film containing (1 < x), and an n formed in a drain region and a source region adjacent to the gate region of the Si substrate + layer.

Advantages of the Invention

[0012] According to an aspect of the present disclosure, a ferroelectric thin film having no low dielectric constant layer at the interface with a Si substrate can be formed.

Brief Description of the Drawings

[0013] [Figure 1] It is a cross-sectional view showing the basic structure of a semiconductor device according to an embodiment. [Figure 2] It is a diagram showing the crystal structure of HfNx. [Figure 3] It is a cross-sectional view of a semiconductor device according to an example. [Figure 4] It is a cross-sectional view of a semiconductor device according to an example. [Figure 5] Figures 5(a) to (f) are diagrams for explaining the manufacturing method of the semiconductor device of Figure 4. [Figure 6] It is a diagram showing the relationship between the gas flow rate ratio during the deposition of HfNx and the composition ratio of Hf and N. [Figure 7]FIG. 10 is a diagram showing the results of X-ray diffraction (XRD) measurement of the prepared sample. [Figure 8] FIG. 1 shows PV (polarization-voltage) characteristics of MFS diode samples. [Figure 9] FIG. 1 shows the CV (capacitance-voltage) characteristics of MFS diode samples. [Figure 10] 10(a) and 10(b) are diagrams showing the measurement results of the fatigue characteristics of the MFS diode samples. [Figure 11] 1 is a cross-sectional view of a semiconductor device according to an embodiment; [Figure 12] 1 is a cross-sectional view of a semiconductor device according to an embodiment; DETAILED DESCRIPTION OF THE INVENTION

[0014] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. Furthermore, this summary is not an exhaustive overview of all possible embodiments, nor does it limit essential elements of the embodiments. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0015] This summary is not an extensive overview of all possible embodiments, and is not intended to identify key or critical elements of all embodiments or to delineate the scope of some or all aspects. Its sole purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed description that is presented later.

[0016] Conventionally, regarding HfN (hafnium nitride), research has been conducted focusing on its properties as a high-k insulator, but mainly on amorphous materials (Non-Patent Document 4).

[0017] Also, in Non-Patent Document 5, it is reported that HfN x has different crystal structures depending on the composition ratio x of Hf and N. Specifically, it has been reported that HfN 1.165 has a rhombohedral crystal structure when. However, there have been no reported examples where HfN exhibits ferroelectricity.

[0018] The inventor of the present invention focused on the asymmetric structure of the rhombohedral crystal system of HfN x and obtained the idea that this asymmetric structure might enable the realization of a ferroelectric NfN x thin film.

[0019] A semiconductor device according to an embodiment includes a Si substrate and a ferroelectric thin film formed on the Si substrate and having a rhombohedral crystal structure, the HfN x (1 < x) containing.

[0020] According to this configuration, by making the ratio x of N in HfN x greater than 1, asymmetry can be introduced into the crystal structure of HfN x , thereby realizing ferroelectricity. In the manufacturing process of this semiconductor device, O (oxygen) is not required as in the case of forming HfO2, and instead N is used. Therefore, a SiO2 layer is not formed at the interface between the ferroelectric thin film and the Si substrate. Also, the nitridation rate of Si is smaller than the oxidation rate, and the energy required for the reaction is greater for N than for O. Therefore, even when the semiconductor device is heat-treated, it is difficult to form a low dielectric constant SiN layer at the interface between HfN x and Si, and thus a high-quality ferroelectric thin film can be obtained.

[0021] Here, when x approaches 1, it tends to have a metallic crystal structure, and when x approaches 1.33, it tends to have a crystal structure of an insulating stable phase. Therefore, in one embodiment, 1.1 ≤ x ≤ 1.3 may be satisfied. More preferably, 1.15 ≤ x ≤ 1.2 may be satisfied.

[0022] In one embodiment, the semiconductor device may further include a SiO2 layer formed on the Si substrate and outside the active region where the semiconductor device is formed. The SiO2 layer can suppress leakage from the side surface of the device and improve the characteristics of the device.

[0023] In one embodiment, the semiconductor device includes a contact layer containing HfN y (y < 1) formed on a ferroelectric thin film, and a metal electrode formed on the contact layer. Here, when y approaches 0, it is likely to be oxidized, and when y approaches 1, the resistance increases. Therefore, it is preferable that 0.3 ≤ y ≤ 0.8.

[0024] In one embodiment, the thickness of the ferroelectric thin film may be 3 nm to 20 nm.

[0025] A method for forming a ferroelectric thin film according to one embodiment, comprising depositing Hf by ECR sputtering in a gas atmosphere containing N2 and Ar on a Si substrate to form a HfN x (1 < x) layer, and heat-treating after the forming step to crystallize the HfN x layer into a rhombohedral crystal system.

[0026] A semiconductor device according to one embodiment includes a transistor. The transistor includes a Si substrate, a ferroelectric thin film containing HfN x (1 < x) having a rhombohedral crystal structure formed in a gate region on the Si substrate, and an n + layer formed in a drain region and a source region adjacent to the gate region of the Si substrate.

[0027] According to this configuration, HfN xBy increasing the ratio of N to HfN x It is possible to introduce asymmetry into the crystal structure of HfN, which makes it possible to realize ferroelectricity. x By using this insulating layer as the gate insulating film, a low-dielectric layer is not formed at the interface with the Si substrate, making it possible to realize a high-performance ferroelectric gate transistor (MFSFET: Metal-Ferroelectric-Semiconductor Field-Effect Transistor).When this MFSFET is used as a memory element, the effect of the depolarization electric field is reduced compared to MFSFETs that use a HfO2 ferroelectric thin film as the gate insulating film, thereby improving the memory characteristics.

[0028] In one embodiment, 1.1≦x≦1.3 may be satisfied, and more preferably 1.15≦x≦1.2.

[0029] In one embodiment, the semiconductor device may further include a SiO2 layer formed on the Si substrate outside the active area including the gate, source, and drain regions, which can suppress leakage from the side of the device and improve performance.

[0030] (Embodiment) The present disclosure will be described below with reference to the drawings based on preferred embodiments. The same or equivalent components, parts, and processes shown in each drawing are designated by the same reference numerals, and redundant descriptions will be omitted where appropriate. Furthermore, the embodiments are illustrative and do not limit the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

[0031] In this specification, "a state in which component A is connected to component B" includes a case in which component A and component B are directly physically connected, and a case in which component A and component B are indirectly connected via other components that do not substantially affect the electrical connection state between them or impair the function or effect achieved by their combination.

[0032] Similarly, the phrase "member C is provided between member A and member B" includes not only the case where member A and member C, or member B and member C are directly connected, but also the case where they are indirectly connected via other members that do not substantially affect their electrical connection state or impair the functions and effects achieved by their combination.

[0033] Also, the dimensions of the members in each drawing are appropriately enlarged or reduced for easy understanding.

[0034] FIG. 1 is a cross-sectional view showing the basic structure of a semiconductor device 100 according to an embodiment. The semiconductor device 100A includes a Si substrate 110 and a ferroelectric thin film 120. For example, the Si substrate 110 can be a p + -Si(100) substrate or a p-Si(100) substrate.

[0035] The ferroelectric thin film 120 is formed on the Si substrate 110 and contains HfN x (1 < x). The composition ratio x is in the range of 1.1 ≦ x ≦ 1.3, preferably 1.15 ≦ x ≦ 1.2. The thickness of the ferroelectric thin film 120 can be 3 nm to 20 nm, for example, 10 nm.

[0036] FIG. 2 is a diagram showing the crystal structure of HfN x . When x = 1, HfN x has a cubic crystal structure, but as the composition ratio x increases, it has an inclined crystal structure and eventually has a rhombohedral crystal structure. Note that the crystal structure of the ferroelectric thin film 120 is not determined only by the composition ratio x, but is determined by the combination with the heat treatment conditions. In this embodiment, the ferroelectric thin film 120 has a rhombohedral crystal structure, and therefore, the composition ratio x and the heat treatment conditions in the manufacturing process may be determined so as to have a non-symmetric structure of the rhombohedral crystal system.

[0037] The above is the basic configuration of the semiconductor device 100. The laminated structure of the ferroelectric thin film 110 and the ferroelectric thin film 120 is a ferroelectric-semiconductor laminated structure, and if a metal electrode is formed on top of it, it becomes an MFS structure. Those skilled in the art will understand that various semiconductor devices, including diodes and transistors, can be constructed based on the basic structure of Figure 1.

[0038] 3 is a cross-sectional view of a semiconductor device 100A according to one embodiment. The semiconductor device 100A has an MFS structure and includes a Si substrate 110, a ferroelectric thin film 120, a contact layer 130, and a metal electrode 140.

[0039] The contact layer 130 is HfN y (y<1) and is formed on the ferroelectric thin film 120. The metal electrode 140 is a metal such as Al, and is formed on the contact layer 130. In addition to Al, polycrystalline Si, TiN, W, Pt, etc. can be used for the metal electrode 140. The thickness of the ferroelectric thin film 120 can be 3 nm to 20 nm, for example 10 nm, and the thickness of the contact layer 130 can be 10 nm to 30 nm, for example 20 nm.

[0040] If an electrode is added to the Si substrate 110 side of this MFS structure, it becomes an MFS diode. Also, if a drain and a source are formed on the Si substrate 110, a transistor can be configured with the metal electrode 140 as the gate.

[0041] Fig. 4 is a cross-sectional view of a semiconductor device 100B according to one embodiment. This semiconductor device 100B is an MFS diode, and in addition to the MFS structure of Fig. 3, it includes a back electrode 150. The back electrode 150 can be made of a metal material such as Al, similar to the metal electrode 140.

[0042] Next, a method for forming the ferroelectric thin film 120 and a method for manufacturing the semiconductor device 100 will be described. Figures 5(a) to 5(f) are diagrams illustrating a method for manufacturing the semiconductor device 100B of Figure 4. As shown in Figure 5(a), the Si substrate 110 is chemically cleaned. The cleaning may be a combination of SPM (sulfuric acid / hydrogen peroxide) cleaning and DHF (dilute hydrofluoric acid) cleaning.

[0043] Next, as shown in FIG. 5(b), a HfN x A ferroelectric thin film 120 with (x>1) is formed.

[0044] Subsequently, as shown in FIG. 5(c), a HfN x A contact layer 130 with (x<1) is formed.

[0045] The ferroelectric thin film 120 and the contact layer 130 in Figures 5(b) and 5(c) can be formed in-situ by sputtering at room temperature. The sputtering can be performed using an ECR sputtering method, and by switching the atmospheric gas (concentration of N2), HfN x and HfN y can be formed.

[0046] Subsequently, as shown in FIG. 5(d), a heat treatment is performed to remove the HfN of the ferroelectric thin film 120. x The heat treatment may be a PMA (Post-Metallization Anneal) treatment or a PDA (Post-Deposition Anneal) treatment.

[0047] Next, as shown in Fig. 5(e), a metal electrode 140 is formed on the contact layer 130 by thermal evaporation or the like, and patterned by dry etching as necessary. Then, as shown in Fig. 5(f), a backside electrode 150 is formed on the backside of the Si substrate 110. As with the metal electrode 140, Al is preferred as the material for the backside electrode 150, but polycrystalline Si, TiN, W, Pt, etc. can also be used.

[0048] The above is one example of a method for manufacturing the semiconductor device 100B. Those skilled in the art will understand that there are variations in each process and that the order of some processes can be changed. According to this manufacturing method, a laminated structure of the ferroelectric thin film 120 and the contact layer 130 can be formed by switching the atmospheric gas through an in-situ process. This is therefore advantageous in terms of manufacturing cost and manufacturing time.

[0049] Next, an actually fabricated sample of the semiconductor device 100B (referred to as a diode sample) and its evaluation will be described.

[0050] The size of each layer of the fabricated diode sample is as follows: Ferroelectric thin film 120 10nm Contact layer 130 20nm The upper electrode 140 is 50×50 μm 2 It was decided.

[0051] The conditions for forming each layer are as follows.

[0052] The substrate cleaning in FIG. 5(a) was performed using two cycles of SPM and DHF.

[0053] The ferroelectric thin film 120 and the contact layer 130 shown in Figures 5(b) and 5(c) were deposited at room temperature by ECR sputtering. x The NfN contact layer 130 was deposited in an Ar / N2 (=8 / 8 sccm) atmosphere with a microwave power of 500 W and a RF (radio frequency) power of 400 W. y The deposition was carried out under the conditions of an Ar / N2 (=10 / 0.2 sccm) atmosphere, a microwave power of 500 W, and an RF (radio frequency) power of 400 W.

[0054] The heat treatment shown in Figure 5(d) was performed for each sample using either PMA or PDA. Both PMA and PDA were performed in a N2 (1 SLM) atmosphere at 400 °C for 5 min or 500 °C for 5 min.

[0055] Figure 6 shows the HfN x This figure shows the relationship between the gas flow rate ratio during deposition and the composition ratio of Hf and N. As described above, HfN was deposited in an Ar / N2 (=8 / 8 sccm) atmosphere. x When the ferroelectric thin film 120 is formed, N2 / (Ar+N2)=50%, so the composition ratio x is estimated to be 1.15. y When depositing the contact layer 130, N2 / (Ar+N2)=2%, so the composition ratio y is estimated to be 0.5. Note that the relationship in Figure 6 includes an error, so the composition ratios x and y estimated based on the gas flow rate ratio also include an error, and this error is thought to be up to about 20%. Therefore, the composition ratio x in the actual crystal is at least within the range of 0.9≦x≦1.4, and the composition ratio y is within the range of 0.4≦y≦0.6.

[0056] The evaluation results of the diode samples fabricated under the above conditions will be described below.

[0057] Figure 7 shows the results of X-ray diffraction (XRD) measurements of the prepared samples. Figure 7 shows the results of a sample subjected to PDA treatment at 500°C for 5 minutes and a sample subjected to PDA treatment at 400°C for 5 minutes. The measurements were performed after the heat treatment shown in Figure 5(d) and before the formation of electrodes.

[0058] The measurement results for both samples showed that the crystal structure was c-Hf3N4(200) and δ-HfN x The 400°C / 5 min sample shows a mixture of δ-HfN and (111) crystal structures. x It is clear that the (111) crystal structure is dominant and that the crystal structure is rhombohedral.

[0059] In other words, under the deposition conditions of the samples measured this time, it is clear that the sample prepared by heat treatment at 400°C for 5 minutes can successfully form a rhombohedral crystal structure. 1.15 The evaluation results of the electrical and magnetic properties of the thin film sample (hereinafter referred to as the MFS diode sample) will be explained.

[0060] FIG. 8 shows the PV (polarization-voltage) characteristics of the MFS diode sample. The horizontal axis represents the applied voltage, and the vertical axis represents the polarization. From this result, it is clear that HfN x It is clear that the thin film has ferroelectricity, a new finding that was not previously known.

[0061] Also, the coercive voltage is 2V c , that is, the voltage hysteresis width is 7.6V, and the residual polarization is 2P r The remanent polarization of HfO2 without any other elements added was 24.0 μC / cm2. r This is a value significantly larger than the 2.5 μC / cm2 (Non-Patent Document 6). One of the reasons for this large remanent polarization is that the displacement of nitrogen (N) atoms due to an electric field is larger than that of oxygen atoms.

[0062] 9 is a diagram showing the CV (capacitance-voltage) characteristics of the MFS diode sample. x The relative permittivity ε r is estimated to be 23. Amorphous HfN, a high-dielectric-constant insulator x The relative permittivity ε r is approximately 14 to 18 (Non-Patent Document 4), which is larger than that.

[0063] 10(a) and 10(b) are diagrams showing the measurement results of the fatigue characteristics of the MFS diode sample. 10 When the number of times exceeds 10, the characteristics start to deteriorate due to the increase in leakage. 9It is found that it has resistance to cycle switching, which is a practically sufficient value. Also, as shown in Fig. 10(b), no imprint phenomenon is observed.

[0064] Fig. 11 is a cross-sectional view of a semiconductor device 100C according to an embodiment. This semiconductor device 100C is an MFS diode as in Fig. 4, and in addition to the MFS diode in Fig. 4, it includes a SiO2 layer. When the formation range of the metal electrode 140 is set as the active region of the diode, this SiO2 layer is formed outside the active region of the diode. Inside the active region, since the SiO2 layer 160 is not inserted at the interface between the ferroelectric thin film 120 and the Si substrate 110, the influence of the depolarization electric field by the SiO2 layer 160 does not pose a problem.

[0065] By providing the SiO2 layer 160, the leakage from the side surface of the ferroelectric thin film 120 of the diode to the Si substrate 110 can be reduced, and the characteristics can be further improved.

[0066] Fig. 12 is a cross-sectional view of a semiconductor device 100D according to an embodiment. This semiconductor device 100D includes an MFS transistor 200.

[0067] The transistor 200 is formed on the Si substrate 110. The ferroelectric thin film 120 is a gate insulating film formed in the gate region on the Si substrate 110 and has a rhombohedral crystal structure of HfN x (1 < x) is included.

[0068] In this embodiment, on the Si substrate 110, a SiO2 layer 160 is formed so as to surround the active region 202 including the drain (D), gate (G), and source (S) of the transistor 200.

[0069] In the source region and drain region of the Si substrate 110, n + layers 112, 114 are formed. On the ferroelectric thin film 120, a contact layer 130 is formed, but in Fig. 11, the boundary between the ferroelectric thin film 120 and the contact layer 130 is shown integrally without being shown separately.

[0070] In the gate region (G), a metal electrode 140 that serves as a gate electrode is formed on the ferroelectric thin film 120 (contact layer 130). + A source electrode 170 and a drain electrode 172 extend from layers 112 and 114 .

[0071] The above is the configuration of the semiconductor device 100 D. When forming the MFS transistor 200 as shown in FIG.

[0072] (Application) The above-mentioned MFS device can be used as a nonvolatile memory cell by utilizing the change in capacitance and threshold voltage.

[0073] Furthermore, the applications of MFS devices are not limited to non-volatile memory (digital storage elements), but can also be used as analog storage elements that utilize continuous capacitance and threshold changes in response to gate voltage, or as D / A converters.Furthermore, by using floating gate devices as neural computing elements in neural networks, it is expected that they will be applied to neurodevices that mimic the human brain by performing weighting operations on input signals.

[0074] The embodiments merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted to the embodiments as long as they do not deviate from the spirit of the present invention as defined in the claims.

[0075] The present invention has been described using specific terms based on the embodiments, but the embodiments merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted to the embodiments as long as they do not deviate from the concept of the present invention defined in the claims. [Industrial Applicability]

[0076] The present invention relates to ferroelectric thin films. [Explanation of symbols]

[0077] 100 Semiconductor device 110 Si substrate 120 Ferroelectric Thin Films 130 Contact layer 140 Metal electrode 150 Back electrode 160 SiO2 layer 200 transistors

Claims

1. a Si substrate; HfN having a rhombohedral crystal structure formed on the Si substrate ｘ a ferroelectric thin film containing (1<x); A semiconductor device comprising:

2. 2. The semiconductor device according to claim 1, wherein 1.1≦x≦1.

3.

3. 3. The semiconductor device according to claim 1, wherein x satisfies the condition 1.15≦x≦1.

2.

4. On the Si substrate, a SiO.sub.2 is formed outside an active region where a semiconductor device is to be formed. ２ 4. The semiconductor device according to claim 1, further comprising a layer.

5. A HfN film is formed on the ferroelectric thin film. ｙ a contact layer including (y<1); a metal electrode formed on the contact layer; 5. The semiconductor device according to claim 1, further comprising:

6. 6. The semiconductor device according to claim 1, wherein the ferroelectric thin film has a thickness of 3 nm to 20 nm.

7. A method for forming a ferroelectric thin film, comprising the steps of: On a Si substrate, N ２ and Hf was deposited by ECR (Electron Cyclotron Resonance) sputtering in a gas atmosphere containing Ar, to form HfN ｘ forming a (1<x) layer; After the forming step, a heat treatment is performed to form the HfN ｘ crystallizing the layer into a rhombohedral system; A forming method comprising:

8. A transistor is provided. The transistor is a Si substrate; HfN having a rhombohedral crystal structure formed in a gate region on the Si substrate ｘ a ferroelectric thin film containing (1<x); n-type silicon nitride films formed in the drain and source regions adjacent to the gate region of the Si substrate ＋ Layers and A semiconductor device comprising:

9. 9. The semiconductor device according to claim 8, wherein 1.1≦x≦1.

3.

10. 10. The semiconductor device according to claim 8, wherein x satisfies 1.15≦x≦1.

2.

11. On the Si substrate, a SiO.sub.2 layer is formed outside an active region including the gate region, the source region, and the drain region. ２ 11. The semiconductor device according to claim 8, further comprising a layer.

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