Copper / ceramic joints and insulated circuit boards

Abstract

To provide a copper / ceramic joined body that can suppress the occurrence of crack in the ceramic member even when a severe thermal cycle is applied, and has excellent thermal cycle reliability.SOLUTION: Provided is a copper / ceramic joined body 10 which is formed by joining copper members 12 and 13 made of copper or a copper alloy, and a ceramic member 11 made of silicon nitride, and in which an active metal nitride layer 21 is formed on the ceramic member 11 side of the copper member 12, an area ratio of the active metal compound including Si and the active metal in a region of 10 μm from the active metal nitride layer 21 to the copper member 12 side is 10% or less, and a ratio PA / PB between an area ratio PA of the active metal compound in a peripheral region A of the copper member 12 and an area ratio PB of the active metal compound in a central region B of the copper member 12 is within the range of 0.7 or more to 1.4 or less.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a copper / ceramic bonded body formed by bonding a copper member made of copper or a copper alloy to a ceramic member, and to an insulated circuit board formed by bonding a copper plate made of copper or a copper alloy to the surface of a ceramic substrate. [Background technology]

[0002] In power modules, LED modules, and thermoelectric modules, a power semiconductor element, an LED element, and a thermoelectric element are bonded to an insulating circuit board having a circuit layer made of a conductive material formed on one side of an insulating layer. For example, power semiconductor elements for controlling large amounts of electric power used to control wind power generation, electric vehicles, hybrid vehicles, etc. generate a large amount of heat during operation. Therefore, as the substrate on which these elements are mounted, an insulated circuit board has been widely used that includes a ceramic substrate, a circuit layer formed by bonding a metal plate with excellent conductivity to one surface of the ceramic substrate, and a metal layer for heat dissipation formed by bonding a metal plate to the other surface of the ceramic substrate.

[0003] For example, Patent Document 1 proposes an insulated circuit board in which a circuit layer and a metal layer are formed by bonding copper plates to one side and the other side of a ceramic substrate. In Patent Document 1, copper plates are placed on one side and the other side of the ceramic substrate with an Ag-Cu-Ti based brazing material interposed therebetween, and the copper plates are bonded by performing a heat treatment (the so-called active metal brazing method).

[0004] Furthermore, Patent Document 2 proposes a power module substrate in which a copper plate made of copper or a copper alloy and a ceramic substrate made of silicon nitride are bonded together using a bonding material containing Ag and Ti. As described above, when a copper plate and a ceramic substrate are bonded using a bonding material containing Ti, Ti, which is an active metal, reacts with the ceramic substrate, improving the wettability of the bonding material and increasing the bonding strength between the copper plate and the ceramic substrate. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 3211856 [Patent Document 2] Japanese Patent Application Publication No. 2018-008869 Summary of the Invention [Problem to be solved by the invention]

[0006] Recently, there has been a trend toward higher heat generation temperatures from semiconductor elements mounted on insulated circuit boards, and insulated circuit boards are being required to have higher thermal cycle reliability than ever before, so that they can withstand severe thermal cycles. Here, as mentioned above, when a copper plate and a ceramic substrate are joined using a joining material containing Ti, Ti, an active metal, diffuses to the copper plate side, and an intermetallic compound containing Cu and Ti precipitates, which hardens the area near the joining interface, causing cracks in the ceramic member when subjected to thermal cycling, which could reduce thermal cycling reliability.

[0007] The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a copper / ceramic bonded body that can suppress the occurrence of cracks in the ceramic members even when subjected to severe thermal cycling and has excellent thermal cycling reliability, and an insulated circuit board made of this copper / ceramic bonded body. [Means for solving the problem]

[0008] In order to solve the above-mentioned problems, the inventors conducted extensive research and found that when a ceramic member and a copper member are joined using a joining material containing an active metal, the liquid phase generated during joining is expelled from the center of the copper member toward the peripheral portion, resulting in a relatively large amount of active metal being present at the peripheral portion of the copper member, and therefore the peripheral portion of the copper member at the joining interface between the ceramic member and the copper member tends to be harder than the central portion.The inventors also found that when subjected to a thermal cycle load, stress is concentrated in the hard peripheral portion of the copper member at the joining interface, making the ceramic member more likely to crack.

[0009] The present invention has been made based on the above-mentioned findings, and the copper / ceramic joined body of the present invention is a copper / ceramic joined body obtained by joining a copper member made of copper or a copper alloy to a ceramic member made of silicon nitride, wherein the copper member on the ceramic member side has: Consists of nitrides of one or more active metals selected from Ti, Zr, Hf, and Nb An active metal nitride layer is formed, and the area ratio of an active metal compound containing Si and an active metal in a region 10 μm from the active metal nitride layer toward the copper member is 10% or less, and a peripheral region of the copper member (A region extending from a position 20 μm inward from the end of the copper member in the width direction to a position 200 μm inward in the width direction in a cross section along the lamination direction of the copper member and the ceramic member) The area ratio P of the active metal compound in A and a central region of the copper member. (A region of 200 μm in the width direction including the center of the width direction of the copper member in a cross section along the lamination direction of the copper member and the ceramic member) The area ratio P of the active metal compound in B Relative to P A / P B is within the range of 0.7 to 1.4. , the thickness t1 of the active metal nitride layer formed in the peripheral region of the copper member A and a thickness t1 of the active metal nitride layer formed in the central region of the copper member. B is in the range of 0.05 μm or more and 0.8 μm or less, and the thickness ratio t1 A / t1 B is in the range of 0.7 to 1.4, and at the bonding interface between the ceramic member and the copper member, an Ag-Cu alloy layer is formed on the copper member side, and the thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper member A and a thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper member. B is in the range of 1 μm or more and 30 μm or less, and the thickness ratio t2 A / t2 B is within the range of 0.7 to 1.4. It is characterized by the following.

[0010] According to the copper / ceramic joined body of the present invention, at the joining interface between the ceramic member and the copper member joined to at least one surface of the ceramic member, the area ratio of the active metal compound containing Si and an active metal in a region 10 μm from the active metal nitride layer toward the copper member is 10% or less. This prevents the joining interface between the ceramic member and the copper member from becoming harder than necessary. The area ratio P of the active metal compound in the peripheral region of the copper member A and the area ratio P of the active metal compound in the central region of the copper member B Relative to P A / P B Since the hardness of the copper member is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness between the peripheral region of the copper member and the central region of the copper member, and cracking of the ceramic member when subjected to thermal cycles can be suppressed, resulting in excellent thermal cycle reliability.

[0011] Also, The thickness t1 of the active metal nitride layer formed in the peripheral region of the copper member A and a thickness t1 of the active metal nitride layer formed in the central region of the copper member. B Since the thickness is set within the range of 0.05 μm or more and 0.8 μm or less, the ceramic member and the copper member are reliably and firmly bonded together by the active metal, and the bonded interface is further prevented from becoming hard. And the thickness ratio t1 A / t1 B Since the hardness of the bonding interface between the peripheral region and the central region of the copper member is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness, and the occurrence of cracks in the ceramic member when subjected to thermal cycles can be further suppressed.

[0012] moreover, The thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper member A and a thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper member. BSince the thickness is set to the range of 1 μm or more and 30 μm or less, Ag of the bonding material reacts sufficiently with the copper member to reliably and firmly bond the ceramic member and the copper member, and hardening of the bonding interface is further suppressed. And the thickness ratio t2 A / t2 B is set to the range of 0.7 or more and 1.4 or less, so that there is no large difference in hardness of the joining interface between the peripheral region and the central region of the copper member, and the occurrence of cracks in the ceramic member when subjected to thermal cycle loading can be further suppressed.

[0013] The insulating circuit board of the present invention is an insulating circuit board in which a copper plate made of copper or a copper alloy is bonded to the surface of a ceramic substrate made of silicon nitride, and the copper plate on the ceramic substrate side has: Consists of nitrides of one or more active metals selected from Ti, Zr, Hf, and Nb An active metal nitride layer is formed, and the area ratio of an active metal compound containing Si and an active metal in a region 10 μm from the active metal nitride layer toward the copper plate is 10% or less, and a peripheral region of the copper plate (A region extending from a position 20 μm inward from the end of the copper plate in the width direction to a position 200 μm inward in the width direction in a cross section along the lamination direction of the copper plate and the ceramic substrate) The area ratio P of the active metal compound in A and the central region of the copper plate (A region of 200 μm in the width direction including the center of the width direction of the copper plate in a cross section along the lamination direction of the copper plate and the ceramic substrate) The area ratio P of the active metal compound in B Relative to P A / P B is within the range of 0.7 to 1.4. , the thickness t1 of the active metal nitride layer formed in the peripheral region of the copper plate A and a thickness t1 of the active metal nitride layer formed in the central region of the copper plate. B is in the range of 0.05 μm or more and 0.8 μm or less, and the thickness ratio t1 A / t1 B is in the range of 0.7 to 1.4, and at the bonding interface between the ceramic substrate and the copper plate, an Ag-Cu alloy layer is formed on the copper plate side, and the thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper plate A and a thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper plate. B is in the range of 1 μm or more and 30 μm or less, and the thickness ratio t2 A / t2 B is within the range of 0.7 to 1.4. It is characterized by the following.

[0014] According to the insulating circuit board of the present invention, at the bonding interface with a copper plate bonded to at least one surface of the ceramic substrate, the area ratio of the active metal compound containing Si and an active metal in a region 10 μm from the active metal nitride layer toward the copper plate is 10% or less, thereby preventing the bonding interface between the ceramic substrate and the copper plate from becoming unnecessarily hard. The area ratio P of the active metal compound in the peripheral region of the copper plate A and the area ratio P of the active metal compound in the central region of the copper plate B Relative to P A / P B is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness between the peripheral region of the copper plate and the central region of the copper plate, which makes it possible to suppress the occurrence of cracks in the ceramic substrate when subjected to thermal cycles, and the ceramic substrate has excellent thermal cycle reliability.

[0015] Also, The thickness t1 of the active metal nitride layer formed in the peripheral region of the copper plate A and a thickness t1 of the active metal nitride layer formed in the central region of the copper plate. B Since the thickness is set within the range of 0.05 μm to 0.8 μm, the ceramic substrate and the copper plate are reliably and firmly bonded together by the active metal, and the bonded interface is further prevented from hardening. And the thickness ratio t1 A / t1 B Since the hardness of the bonding interface between the peripheral region and the central region of the copper plate is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness, and it is possible to further suppress the occurrence of cracks in the ceramic substrate when subjected to thermal cycles.

[0016] moreover, The thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper plate A and a thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper plate. BSince the thickness is set to the range of 1 μm or more and 30 μm or less, the Ag of the bonding material reacts sufficiently with the copper plate to reliably and firmly bond the ceramic substrate and the copper plate, and hardening of the bonding interface is further suppressed. And the thickness ratio t2 A / t2 B Since the ratio is within the range of 0.7 to 1.4, there is no significant difference in hardness of the bonding interface between the peripheral region and the central region of the copper plate, and cracking of the ceramic substrate can be further suppressed when subjected to thermal cycle loading. [Effects of the Invention]

[0017] According to the present invention, it is possible to provide a copper / ceramic bonded body that can suppress the occurrence of cracks in ceramic members even when subjected to severe thermal cycles and has excellent thermal cycle reliability, and an insulated circuit board made of this copper / ceramic bonded body. [Brief explanation of the drawings]

[0018] [Figure 1] 1 is a schematic explanatory diagram of a power module using an insulating circuit board according to an embodiment of the present invention. FIG. [Figure 2] 1A is an explanatory view showing an enlarged view of the bonding interface between a circuit layer and a metal layer of an insulating circuit board according to an embodiment of the present invention and a ceramic substrate, where (a) is an explanatory view of the peripheral region and the central region of the circuit layer and the metal layer, (b) is the peripheral region, and (c) is the central region. [Figure 3] 1 is a flowchart of a method for manufacturing an insulating circuit board according to an embodiment of the present invention. [Figure 4] 1A to 1C are schematic explanatory views of a method for manufacturing an insulating circuit board according to an embodiment of the present invention. [Figure 5] 5A to 5C are explanatory views of a bonding material disposing step in the manufacturing method of the insulating circuit board according to the embodiment of the present invention. [Figure 6] FIG. 2 is an explanatory diagram showing a method for calculating the area ratio of an active metal compound in an example of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0019] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. The copper / ceramic joined body according to this embodiment is an insulating circuit board 10 formed by joining a ceramic substrate 11 as a ceramic member made of ceramic to a copper plate 42 (circuit layer 12) and a copper plate 43 (metal layer 13) as copper members made of copper or a copper alloy. Fig. 1 shows a power module 1 including the insulating circuit board 10 according to this embodiment.

[0020] This power module 1 includes an insulating circuit board 10 having a circuit layer 12 and a metal layer 13 arranged thereon, a semiconductor element 3 bonded to one surface (the upper surface in FIG. 1) of the circuit layer 12 via a bonding layer 2, and a heat sink 5 arranged on the other side (the lower side in FIG. 1) of the metal layer 13.

[0021] The semiconductor element 3 is made of a semiconductor material such as Si, etc. The semiconductor element 3 and the circuit layer 12 are bonded together via a bonding layer 2. The bonding layer 2 is made of, for example, an Sn--Ag based, Sn--In based, or Sn--Ag--Cu based solder material.

[0022] The heat sink 5 is used to dissipate heat from the insulating circuit board 10. The heat sink 5 is made of copper or a copper alloy, and in this embodiment is made of phosphorus-deoxidized copper. The heat sink 5 is provided with a flow path for a cooling fluid to flow. In this embodiment, the heat sink 5 and the metal layer 13 are joined together by a solder layer 7 made of a solder material. The solder layer 7 is made of, for example, a Sn—Ag-based, Sn—In-based, or Sn—Ag—Cu-based solder material.

[0023] As shown in FIG. 1, the insulating circuit board 10 of this embodiment comprises a ceramic substrate 11, a circuit layer 12 disposed on one surface (the upper surface in FIG. 1) of the ceramic substrate 11, and a metal layer 13 disposed on the other surface (the lower surface in FIG. 1) of the ceramic substrate 11.

[0024] The ceramic substrate 11 is made of silicon nitride (Si3N4), which has excellent insulating and heat dissipating properties. The thickness of the ceramic substrate 11 is set, for example, within the range of 0.2 mm to 1.5 mm, and is set to 0.32 mm in this embodiment.

[0025] As shown in FIG. 4, the circuit layer 12 is formed by bonding a copper plate 42 made of copper or a copper alloy to one surface (the upper surface in FIG. 4) of the ceramic substrate 11. In this embodiment, the circuit layer 12 is formed by bonding a rolled sheet of oxygen-free copper to the ceramic substrate 11. The thickness of the copper plate 42 that will become the circuit layer 12 is set within the range of 0.1 mm to 2.0 mm, and in this embodiment is set to 0.6 mm.

[0026] As shown in FIG. 4, the metal layer 13 is formed by joining a copper plate 43 made of copper or a copper alloy to the other surface (the lower surface in FIG. 4) of the ceramic substrate 11. In this embodiment, the metal layer 13 is formed by bonding a rolled sheet of oxygen-free copper to the ceramic substrate 11. The thickness of the copper plate 43 that will become the metal layer 13 is set within the range of 0.1 mm to 2.0 mm, and in this embodiment, it is set to 0.6 mm.

[0027] At the bonding interface between the ceramic substrate 11 and the circuit layer 12 and metal layer 13, an active metal nitride layer 21 and an Ag—Cu alloy layer 22 are formed in this order from the ceramic substrate 11 side, as shown in FIG.

[0028] In insulating circuit board 10 of this embodiment, as shown in FIG. 2(a), the interface structure in peripheral region A and central region B of circuit layer 12 and metal layer 13 is specified as follows. In this embodiment, the peripheral region A of the circuit layer 12 and the metal layer 13 is, as shown in Figure 2(a), a region that starts from a position 20 μm inward from the widthwise end of the circuit layer 12 and the metal layer 13 and extends further inward in the widthwise direction by 200 μm in a cross section along the stacking direction of the circuit layer 12, the metal layer 13 and the ceramic substrate 11. Furthermore, the central region B of the circuit layer 12 and the metal layer 13 is a region of 200 μm in width including the widthwise center of the circuit layer 12 and the metal layer 13 in a cross section along the stacking direction of the circuit layer 12, the metal layer 13 and the ceramic substrate 11, as shown in Figure 2(a).

[0029] As shown in FIG. 2(b), in the peripheral region A of the bonding interface between the circuit layer 12 and the metal layer 13, a region E of 10 μm from the interface of the active metal nitride layer 21 on the circuit layer 12 side (the interface with the Ag—Cu alloy layer 22) to the circuit layer 12 side is A The area ratio P of the active metal compound containing Si and the active metal (Ti in this embodiment) in A is considered to be less than 10%. 2(c), in the central region B of the bonding interface between the circuit layer 12 and the metal layer 13, a region E B The area ratio P of the active metal compound containing Si and the active metal (Ti in this embodiment) in B is considered to be less than 10%.

[0030] In this embodiment, the area ratio P of the active metal compound in the peripheral region A of the bonding interface between the circuit layer 12 and the metal layer 13 is A and the area ratio P of the active metal compound in the central region B of the bonding interface between the circuit layer 12 and the metal layer 13. B Relative to P A / P Bis set to be within the range of 0.7 to 1.4. Examples of intermetallic compounds containing Si and an active metal (Ti) include TiSi2, TiSi, and Ti5Si. 4, Examples include Ti5Si3 and Ti5Si, and in this embodiment, Ti5Si3 is used.

[0031] In this embodiment, the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the bonding interface between the circuit layer 12 and the metal layer 13 is A , and the thickness t1 of the active metal nitride layer 21B formed in the central region B of the bonding interface between the circuit layer 12 and the metal layer 13. B is within the range of 0.05 μm or more and 0.8 μm or less, and the thickness ratio t1 A / t1 B It is preferable that the ratio is in the range of 0.7 to 1.4. The active metal compound layer 21 (21A, 21B) is formed by an aggregation of particles of the active metal compound. The average particle size of these particles is 10 nm to 100 nm. In this embodiment, the bonding material 45 contains Ti as an active metal, and the ceramic substrate 11 is made of silicon nitride, so the active metal nitride layer 21 (21A, 21B) is made of titanium nitride (TiN). That is, the active metal nitride layer 21 (21A, 21B) is formed by an aggregation of titanium nitride (TiN) particles having an average particle size of 10 nm or more and 100 nm or less.

[0032] Furthermore, in this embodiment, the thickness t2 of the Ag—Cu alloy layer 22A formed in the peripheral region A of the bonding interface between the circuit layer 12 and the metal layer 13 is A and the thickness t2 of the Ag—Cu alloy layer 22B formed in the central region B of the bonding interface between the circuit layer 12 and the metal layer 13. B Ratio to t2 A / t2 B is preferably within the range of 0.7 to 1.4. The thickness of the Ag--Cu alloy layer 22 (22A, 22B) is preferably 1 μm or more and 30 μm or less.

[0033] A method for manufacturing the insulating circuit board 10 according to this embodiment will be described below with reference to FIGS.

[0034] (Joint material placement process S01) A copper plate 42 that will become the circuit layer 12 and a copper plate 43 that will become the metal layer 13 are prepared. Then, a bonding material 45 is applied to the bonding surfaces of the copper plate 42 that will become the circuit layer 12 and the copper plate 43 that will become the metal layer 13, and then dried. The thickness of the applied paste bonding material 45 is preferably in the range of 10 μm to 50 μm after drying. In this embodiment, the paste-like bonding material 45 is applied by screen printing.

[0035] The bonding material 45 contains Ag and active metals (Ti, Zr, Nb, Hf). In this embodiment, an Ag-Ti based brazing filler metal (Ag-Cu-Ti based brazing filler metal) is used as the bonding material 45. Note that the Ag-Ti based brazing filler metal (Ag-Cu-Ti based brazing filler metal) preferably contains, for example, Cu in the range of 0% by mass to 45% by mass, Ti as an active metal in the range of 0.5% by mass to 20% by mass, and the remainder being Ag and unavoidable impurities.

[0036] The specific surface area of ​​the Ag powder contained in the bonding material 45 is 0.15 m 2 / g or more, and 0.25m 2 / g or more is more preferable, and 0.40m 2 On the other hand, the specific surface area of ​​the Ag powder contained in the bonding material 45 is 1.40 m / g or more. 2 / g or less, and 1.00m 2 / g or less is more preferable, and 0.75m 2 It is more preferable that the saturation rate is 1 / g or less. The particle size of the Ag powder contained in the paste-like bonding material 45 is preferably in the range of D10 being 0.7 μm or more and 3.5 μm or less, and D100 being 4.5 μm or more and 23 μm or less.

[0037] Here, in the pressurizing and heating step S03 described later, by applying pressure in the stacking direction, the generated liquid phase is expelled from the center of the copper plates 42, 43 to the peripheral edges, and a relatively large amount of active metal components is present in the peripheral edges of the copper plates 42, 43. Therefore, in this embodiment, as shown in Figure 5, the bonding material 45 is applied so that the thickness of the bonding material 45A applied at the peripheral portions of the copper plate 42 that will become the circuit layer 12 and the copper plate 43 that will become the metal layer 13 is thinner than the thickness of the bonding material 45B applied at the center portions of the copper plate 42 that will become the circuit layer 12 and the copper plate 43 that will become the metal layer 13. In addition, it is preferable that the difference between the coating thickness of bonding material 45A at the peripheral portions of copper plate 42 which will become circuit layer 12 and copper plate 43 which will become metal layer 13 and the coating thickness of bonding material 45B at the central portions be within the range of 5 μm or more and 15 μm or less.

[0038] (Lamination process S02) Next, a copper plate 42 that will become the circuit layer 12 is laminated on one surface (top surface in Figure 4) of the ceramic substrate 11 via a bonding material 45, and a copper plate 43 that will become the metal layer 13 is laminated on the other surface (bottom surface in Figure 4) of the ceramic substrate 11 via a bonding material 45.

[0039] (Pressure and heating step S03) Next, the copper plate 42, the ceramic substrate 11, and the copper plate 43 are heated in a heating furnace in a vacuum atmosphere while being pressed together, and the bonding material 45 is melted. Here, the heating temperature in the pressurizing and heating step S03 is preferably within a range of 800° C. to 850° C. The total temperature integral value in the temperature increase step from 780° C. to the heating temperature and the holding step at the heating temperature is preferably within a range of 7° C. h to 120° C. h. The pressure load in the pressurizing and heating step S03 is preferably set within a range of 0.029 MPa or more and 2.94 MPa or less. Furthermore, the degree of vacuum in the pressurizing and heating step S03 is 1×10 -6 Pa or more 5×10 -2 It is preferable to set it in the range of Pa or less.

[0040] (Cooling process S04) After the pressurizing and heating step S03, the molten bonding material 45 is solidified by cooling, bonding the copper plate 42 that will become the circuit layer 12 to the ceramic substrate 11, and the ceramic substrate 11 to the copper plate 43 that will become the metal layer 13. The cooling rate in the cooling step S04 is preferably in the range of 2°C / min to 20°C / min, and is the cooling rate from the heating temperature to 780°C, which is the Ag-Cu eutectic temperature.

[0041] As described above, the insulating circuit board 10 of this embodiment is manufactured by the bonding material applying step S01, the laminating step S02, the pressurizing and heating step S03, and the cooling step S04.

[0042] (Heat sink bonding process S05) Next, the heat sink 5 is bonded to the other surface of the metal layer 13 of the insulating circuit board 10 . The insulating circuit board 10 and the heat sink 5 are stacked with a solder material interposed therebetween and placed in a heating furnace, where the insulating circuit board 10 and the heat sink 5 are solder-joined via the solder layer 7 .

[0043] (Semiconductor element bonding process S06) Next, the semiconductor element 3 is joined to one surface of the circuit layer 12 of the insulating circuit board 10 by soldering. Through the above-described steps, the power module 1 shown in FIG. 1 is manufactured.

[0044] In the insulating circuit board 10 (copper / ceramic bonded body) of this embodiment configured as described above, in the peripheral region A of the bonding interface between the circuit layer 12 and the metal layer 13, a region E of 10 μm from the interface of the active metal nitride layer 21 on the circuit layer 12 side (the interface with the Ag—Cu alloy layer 22) to the circuit layer 12 side is formed. A The area ratio P of the active metal compound containing Si and the active metal (Ti in this embodiment) in AIn the central region B of the bonding interface between the circuit layer 12 and the metal layer 13, a region E B The area ratio P of the active metal compound containing Si and the active metal (Ti in this embodiment) in B Since the difference is set to 10% or less, the bonding interfaces between the ceramic substrate 11 and the circuit layer 12 and between the ceramic substrate 11 and the metal layer 13 are prevented from becoming harder than necessary.

[0045] In order to further prevent the bonding interfaces between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 from becoming too hard, the area ratio P A ,P B is preferably 8% or less, and more preferably 5% or less.

[0046] The area ratio P of the active metal compound in the peripheral region A of the circuit layer 12 and the metal layer 13 is A and the area ratio P of the active metal compound in the central region B of the circuit layer 12 and the metal layer 13. B Relative to P A / P B is set to be within the range of 0.7 or more and 1.4 or less, so that there is no significant difference in hardness between the peripheral region A of the circuit layer 12 and the metal layer 13 and the central region B of the circuit layer 12 and the metal layer 13, which can suppress the occurrence of cracks in the ceramic substrate 11 when subjected to thermal cycle loads, resulting in excellent thermal cycle reliability.

[0047] In order to further improve the thermal cycle reliability, the area ratio P of the active metal compound in the peripheral region A of the circuit layer 12 and the metal layer 13 is A and the area ratio P of the active metal compound in the central region B of the circuit layer 12 and the metal layer 13. B Relative to P A / P B is more preferably in the range of 0.8 or more and 1.2 or less, and even more preferably in the range of 0.9 or more and 1.1 or less.

[0048] In this embodiment, the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is A、 and the thickness t1 of the active metal nitride layer 21B formed in the central region B of the circuit layer 12 and the metal layer 13. B When the thickness is within the range of 0.05 μm or more and 0.8 μm or less, the active metal reliably and firmly bonds the ceramic substrate 11 to the circuit layer 12 and the metal layer 13, and further prevents the bonding interface from hardening.

[0049] In order to bond the ceramic substrate 11 to the circuit layer 12 and the metal layer 13 more firmly, the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is set to 1 / 2 mm. A , and the thickness t1 of the active metal nitride layer 21B formed in the central region B of the circuit layer 12 and the metal layer 13. B is preferably 0.08 μm or more, and more preferably 0.15 μm or more. In order to further prevent the bonding interface from becoming too hard, the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is set to 0.5 mm. A , and the thickness t1 of the active metal nitride layer 21B formed in the central region B of the circuit layer 12 and the metal layer 13. B is preferably 0.6 μm or less, and more preferably 0.4 μm or less.

[0050] Furthermore, in this embodiment, the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is A , and the thickness t1 of the active metal nitride layer 21B formed in the central region B of the circuit layer 12 and the metal layer 13. B The ratio of t1 A / t1 B When the ratio is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness of the bonding interface between the peripheral region A and the central region B of the circuit layer 12 and the metal layer 13, and it is possible to further suppress the occurrence of cracks in the ceramic substrate 11 when subjected to a thermal cycle.

[0051] In order to further suppress the occurrence of cracks in the ceramic substrate 11 during thermal cycle loading, the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is set to 0.5 μm. A , and the thickness t1 of the active metal nitride layer 21B formed in the central region B of the circuit layer 12 and the metal layer 13. B The ratio of t1 A / t1 B is more preferably in the range of 0.8 or more and 1.2 or less, and even more preferably in the range of 0.9 or more and 1.1 or less.

[0052] In this embodiment, the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is A , and the thickness t2 of the Ag—Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. B However, when the thickness is within the range of 1 μm or more and 30 μm or less, Ag of the bonding material 45 described later reacts sufficiently with the circuit layer 12 and the metal layer 13, so that the ceramic substrate 11, the circuit layer 12, and the metal layer 13 are reliably and firmly bonded together, and hardening of the bonding interface is further suppressed.

[0053] In order to bond the ceramic substrate 11 to the circuit layer 12 and the metal layer 13 more firmly, the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is set to 0.05 mm. A , and the thickness t2 of the Ag—Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. B is preferably 3 μm or more, and more preferably 5 μm or more. In order to further prevent the bonding interface from becoming harder than necessary, the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is set to 0.5 μm. A , and the thickness t2 of the Ag—Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. Bis preferably 25 μm or less, and more preferably 15 μm or less.

[0054] Furthermore, in this embodiment, the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is A and the thickness t2 of the Ag-Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. B Ratio to t2 A / t2 B When the ratio is within the range of 0.7 or more and 1.4 or less, there is no significant difference in hardness of the bonding interface between the peripheral region A and the central region B of the circuit layer 12 and the metal layer 13, and the occurrence of cracks in the ceramic substrate when subjected to thermal cycles can be further suppressed.

[0055] In order to further suppress the occurrence of cracks in the ceramic substrate 11 during thermal cycle loading, the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is set to 0.05 mm. A and the thickness t2 of the Ag-Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. B Ratio to t2 A / t2 B is more preferably in the range of 0.8 or more and 1.2 or less, and even more preferably in the range of 0.9 or more and 1.1 or less.

[0056] Although the embodiment of the present invention has been described above, the present invention is not limited to this and can be modified as appropriate within the scope of the technical idea of ​​the invention. For example, in the present embodiment, a power module is described as being configured by mounting a semiconductor element on an insulating circuit board, but the present invention is not limited to this. For example, an LED module may be configured by mounting an LED element on a circuit layer of an insulating circuit board, or a thermoelectric module may be configured by mounting a thermoelectric element on a circuit layer of an insulating circuit board.

[0057] Furthermore, in the present embodiment, Ti has been described as an example of the active metal contained in the bonding material, but the present invention is not limited thereto, and the bonding material may contain one or more active metals selected from Ti, Zr, Hf, and Nb. These active metals may be contained as hydrides.

[0058] In this embodiment, the area ratio P of the active metal compound in the peripheral region of the circuit layer and the metal layer is adjusted by adjusting the thickness of the bonding material applied to the peripheral region and the center region of the copper plate. A and the area ratio P of the active metal compound in the central region of the circuit layer and the metal layer. B However, the present invention is not limited to this, and the area ratio P of the active metal compound in the peripheral region of the circuit layer and the metal layer can be controlled by applying different bonding materials to the peripheral and central portions of the copper plate. A and the area ratio P of the active metal compound in the central region of the circuit layer and the metal layer. B may be controlled.

[0059] For example, by adjusting the specific surface area (BET value) of the Ag powder contained in the bonding material, the maximum reach L A ,L B In other words, when the specific surface area of ​​the Ag powder is small, the sinterability of the paste-like joining material is high, a liquid phase is easily generated during the pressurizing and heating process, the diffusion of the active metal is promoted, and the area ratio of the active metal compound described above is high. On the other hand, when the specific surface area of ​​the Ag powder is large, the sinterability of the paste-like joining material is low, a liquid phase is less likely to be generated during the pressurizing and heating process, the diffusion of the active metal is suppressed, and the area ratio of the active metal compound described above is low. Alternatively, bonding materials containing different types or amounts of active metals may be applied to the periphery and center of the copper plate.

[0060] Furthermore, in this embodiment, the circuit layer is described as being formed by bonding a rolled sheet of oxygen-free copper to a ceramic substrate, but this is not limited thereto, and the circuit layer may be formed by bonding copper pieces punched out of a copper plate in a circuit pattern to a ceramic substrate. In this case, it is sufficient that each copper piece has the interface structure with the ceramic substrate as described above. In addition, in this embodiment, the bonding material is described as being disposed on the bonding surface of the copper plate, but this is not limited to this, and it is sufficient that the bonding material is disposed between the ceramic substrate and the copper plate, and the bonding material may also be disposed on the bonding surface of the ceramic substrate. [Example]

[0061] The results of confirmation experiments conducted to confirm the effects of the present invention will be described below.

[0062] First, a ceramic substrate (40 mm x 40 mm, thickness 0.32 mm) made of silicon nitride (Si3N4) was prepared. Additionally, a copper plate made of oxygen-free copper, measuring 37 mm x 37 mm and 0.8 mm thick, was prepared as the copper plate for the circuit layer. Furthermore, a copper plate made of oxygen-free copper, measuring 37 mm x 37 mm and 0.8 mm thick, was prepared as the copper plate for the metal layer.

[0063] A bonding material containing Ag powder with a BET value shown in Table 1 was applied to the periphery of the copper plate that would become the circuit layer and metal layer so that the target thickness after drying would be the value shown in Table 1. In addition, a bonding material containing Ag powder with a BET value shown in Table 1 was applied to the center of the copper plate that would become the circuit layer and metal layer so that the target thickness after drying would be the value shown in Table 1. The bonding material used was a paste material, and the amounts of Ag, Cu, and active metal were as shown in Table 1. The BET value (specific surface area) of the Ag powder was measured using an AUTOSORB-1 manufactured by QUANTACHRROME, with pretreatment of heating at 150°C for 30 minutes for vacuum degassing, followed by N2 adsorption, liquid nitrogen at 77K, and the BET multipoint method.

[0064] A copper plate to serve as a circuit layer was laminated on one surface of the ceramic substrate, and a copper plate to serve as a metal layer was laminated on the other surface of the ceramic substrate.

[0065] The laminate was heated while being pressurized in the lamination direction to generate an Ag-Cu liquid phase. The pressure load was 0.294 MPa, and the temperature integral values ​​were as shown in Table 2. The heated laminate was then cooled to bond the copper plate that would become the circuit layer, the ceramic substrate, and the metal plate that would become the metal layer, thereby obtaining an insulated circuit board (copper / ceramic bonded body).

[0066] The area ratio of the active metal compound, the active metal nitride layer, the Ag—Cu alloy layer, and thermal cycle reliability of the obtained insulating circuit board (copper / ceramic bonded body) were evaluated as follows.

[0067] (area ratio of active metal compounds) The cross section of the bonding interface between the circuit layer and the metal layer and the ceramic substrate was observed using an EPMA device, and elemental maps (50 μm wide x 30 μm high) of the active metal and Si in the peripheral and central regions of the circuit layer and the metal layer were obtained in five fields of view. As shown in Figure 6, the overlapping portions of Si and active metal in the region extending from the active metal nitride layer to 10 μm toward the surface of the circuit layer (metal layer) were recognized as active metal compounds containing Si and active metal, and the area ratio of the active metal compounds was calculated. The area ratio is a value when an area of ​​50 μm × 10 μm is taken as 100%. The average values ​​of five visual fields each, for a total of 10 visual fields, are shown in Table 2.

[0068] (active metal nitride layer) The cross sections of the bonding interfaces between the circuit layer and metal layer and the ceramic substrate were measured at a magnification of 30,000x using a scanning electron microscope (Carl Zeiss NTS ULTRA55, accelerating voltage 1.8 kV), and elemental mapping of N and active metal elements was obtained in five fields of view using energy dispersive X-ray analysis. The presence of active metal nitride layers was determined when active metal elements and N were present in the same region. Observations were made in five fields of view for a total of 10 fields of view, and the area of ​​the range in which the active metal element and N existed in the same region was divided by the measured width, and the average value was taken as the "thickness of the active metal nitride layer."

[0069] (Ag-Cu alloy layer) The cross-sections of the bonding interface between the circuit layer and the ceramic substrate, and between the ceramic substrate and the metal layer were subjected to elemental mapping of Ag, Cu, and active metals using an EPMA device. Elemental mapping was performed in five fields of view for each. When Ag + Cu + active metal = 100% by mass, the area where the Ag concentration was 15% by mass or more was defined as the Ag-Cu alloy layer. The area was calculated and divided by the width of the measured area (area / width of measured area). The average of these values ​​was reported as the thickness of the Ag-Cu alloy layer in Table 2.

[0070] (thermal cycle reliability) The above-mentioned insulated circuit board was subjected to a thermal cycle of 40℃ x 5 min ←→ 150℃ x 5 min, and an SAT test was performed every 100 cycles up to 2000 cycles to check for the presence or absence of ceramic cracks and evaluate the number of times that ceramic cracks occurred. The evaluation results are shown in Table 2.

[0071] [Table 1]

[0072] [Table 2]

[0073] In Comparative Example 1, the area ratio of the active metal compound containing Si and active metal in the region 10 μm from the active metal nitride layer toward the copper plate exceeded 10%, and cracks occurred 1,100 times in the thermal cycle test. In Comparative Example 2, the area ratio P of the active metal compound in the peripheral region of the copper plate A and the area ratio P of the active metal compounds in the central region of the copper plate B Relative to P A / P B The value is 0.6, and cracks occurred 1,300 times in a thermal cycle test. In Comparative Example 3, the area ratio P of the active metal compound in the peripheral region of the copper plate A and the area ratio P of the active metal compounds in the central region of the copper plate B Relative to P A / P B The value is set at 1.5, and cracks occurred 1,200 times in a thermal cycle test.

[0074] In contrast, in Inventive Example 1-8, the area ratio of the active metal compound containing Si and the active metal in the region 10 μm from the active metal nitride layer to the copper plate side was 10% or less, and the area ratio P A and the area ratio P of the active metal compounds in the central region of the copper plate B Relative to P A / P B The thermal cycle test showed that cracks occurred more than 1,500 to 2,000 times, demonstrating excellent thermal cycle reliability.

[0075] From the results of the above confirmatory experiments, it was confirmed that the examples of the present invention can suppress the occurrence of cracks in the ceramic members even when subjected to severe thermal cycles, and can provide an insulated circuit board (copper / ceramic bonded body) with excellent thermal cycle reliability. [Explanation of symbols]

[0076] 10 Insulated circuit board (copper / ceramic bonded body) 11 Ceramic substrate (ceramic component) 12 Circuit layer (copper material) 13 Metal layer (copper material) 21(21A, 21B) Active metal nitride layer 22(22A,22B) Ag-Cu alloy layer

Claims

1. A copper / ceramic bonded body obtained by bonding a copper member made of copper or a copper alloy to a ceramic member made of silicon nitride, an active metal nitride layer made of nitrides of one or more active metals selected from Ti, Zr, Hf, and Nb is formed on the copper member on the ceramic member side, and an area ratio of an active metal compound containing Si and an active metal in a region 10 μm from the active metal nitride layer toward the copper member side is 10% or less; The area ratio P of the active metal compound in the peripheral region of the copper member (a region extending from a position 20 μm inward from the end of the copper member in the width direction to a position 200 μm inward in the width direction in a cross section along the lamination direction of the copper member and the ceramic member) Ａ and the area ratio P of the active metal compound in the central region of the copper member (a region of 200 μm in the width direction including the center of the width direction of the copper member in a cross section along the lamination direction of the copper member and the ceramic member). Ｂ Relative to P Ａ / P Ｂ is in the range of 0.7 or more and 1.4 or less, a thickness t1A of the active metal nitride layer formed in the peripheral region of the copper member and a thickness t1B of the active metal nitride layer formed in the central region of the copper member are in the range of 0.05 μm or more and 0.8 μm or less, and a thickness ratio t1A / t1B is in the range of 0.7 or more and 1.4 or less; A copper / ceramic joined body, characterized in that an Ag-Cu alloy layer is formed on the copper member side at the joining interface between the ceramic member and the copper member, the thickness t2A of the Ag-Cu alloy layer formed in the peripheral region of the copper member and the thickness t2B of the Ag-Cu alloy layer formed in the central region of the copper member are in the range of 1 μm or more and 30 μm or less, and the thickness ratio t2A / t2B is in the range of 0.7 or more and 1.4 or less.

2. An insulating circuit board having a ceramic substrate made of silicon nitride and a copper plate made of copper or a copper alloy bonded to the surface thereof, an active metal nitride layer made of nitrides of one or more active metals selected from Ti, Zr, Hf, and Nb is formed on the copper plate facing the ceramic substrate, and an area ratio of an active metal compound containing Si and an active metal in a region 10 μm from the active metal nitride layer toward the copper plate is 10% or less; The area ratio P of the active metal compound in the peripheral region of the copper plate (a region extending from a position 20 μm inward from the end of the copper plate in the width direction to a position 200 μm inward in the width direction in a cross section along the lamination direction of the copper plate and the ceramic substrate) Ａ and the area ratio P of the active metal compound in the central region of the copper plate (a region of 200 μm in the width direction including the center of the width direction of the copper plate in the cross section along the lamination direction of the copper plate and the ceramic substrate). Ｂ Relative to P Ａ / P Ｂ is in the range of 0.7 or more and 1.4 or less, a thickness t1A of the active metal nitride layer formed in the peripheral region of the copper plate and a thickness t1B of the active metal nitride layer formed in the central region of the copper plate are in the range of 0.05 μm or more and 0.8 μm or less, and a thickness ratio t1A / t1B is in the range of 0.7 or more and 1.4 or less; An insulating circuit board characterized in that an Ag-Cu alloy layer is formed on the copper plate side at the bonding interface between the ceramic substrate and the copper plate, the thickness t2A of the Ag-Cu alloy layer formed in the peripheral region of the copper plate and the thickness t2B of the Ag-Cu alloy layer formed in the central region of the copper plate are in the range of 1 μm or more and 30 μm or less, and the thickness ratio t2A / t2B is in the range of 0.7 or more and 1.4 or less.

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