Semiconductor device manufacturing method

Abstract

To suppress positional deviation of a semiconductor chip due to a decrease in adhesion of a sintered material.SOLUTION: A method for manufacturing a semiconductor device includes a first processing step (step S1) of setting an adsorbed amount of oxygen and carbon on a first principal surface of a conductive plate to 20 atom% or less, and a first checking step (step S2) of checking whether the conductive plate after the first processing step is a first reference temperature or lower. When the conductive plate is the first reference temperature or lower, the method further includes a chip mounting step (step S3) of mounting a semiconductor chip on the first principal surface of the conductive plate via a sintered material containing an organic material, a first joining step (step S4) of temporarily joining the semiconductor chip by performing first-condition heating and pressurization for leaving a part of the organic material of the sintered material, a preparing step (S5) of preparing transportation and the like for joining; and a second joining step (step S6) of joining the semiconductor chip by performing second-condition heating and pressurization for sintering the sintered material.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] A known technique involves subjecting the surface of at least one of a pair of substrates having metal regions to a thermal reduction treatment to form metal microparticles, then bringing the surfaces of the metal regions of the pair of substrates into contact with each other and heating them to bond them (Patent Document 1). This technique involves reducing the copper oxide layer on the surface of the metal region using formic acid, removing the copper oxide on the surface of the oxide layer with hydrogen radicals decomposed from formic acid using a platinum catalyst, forming copper metal microparticles by reacting the cuprous oxide underneath with formic acid groups, and bringing the surfaces with the metal microparticles into contact with each other and growing the metal microparticles by sintering or the like.

[0003] Another known technique involves placing a metal substrate on a ceramic substrate via a brazing filler metal containing brazing filler powder and an organic binder, joining the metal substrate to the ceramic substrate via the brazing filler metal by heating, heating the substrate in an oxygen-containing atmosphere to remove deposits primarily composed of carbon, and then immersing the substrate in a chemical containing sulfuric acid or the like to remove oxides from the surface of the metal substrate (Patent Document 2).

[0004] Also known is a technique in which a copper disk is placed on the surface of a copper plate via a metal nanoparticle paste, and then heated and pressurized in a nitrogen atmosphere to bond the copper plate and copper disk. Another technique is to use copper plates and copper disks that have been electropolished in a mixed solution of phosphoric acid and sulfuric acid to remove the surface oxide film and then washed with distilled water (Patent Document 3).

[0005] In addition, a technology is known for joining the members to be joined, in which an oxide layer containing oxygen is formed at the joining interface of the members to be joined, a joining material containing metal compound particles of a predetermined particle size and a reducing agent made of an organic substance is placed at the joining interface, and the members to be joined are heated and pressurized to burn off the organic substance at the joining interface using oxygen, reduce the metal compound particles to produce metal particles of a predetermined particle size, and sinter them (Patent Document 4). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-99917 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-178424 [Patent Document 3] Japanese Patent Application Laid-Open No. 2013-159830 [Patent Document 4] Japanese Patent Application Laid-Open No. 2008-208442 Summary of the Invention [Problem to be solved by the invention]

[0007] Semiconductor devices are known that have a configuration in which a semiconductor chip is mounted on the main surface of a conductive plate, such as a conductive pattern layer of an insulating circuit board or a lead frame, via a sintered material made of silver or copper. In manufacturing such semiconductor devices, for example, a semiconductor chip is first placed on the main surface of the conductive plate via a sintered material containing an organic substance, and the semiconductor chip is temporarily bonded under a first condition of heating and pressure. Then, after a preparatory process such as transporting the conductive plate (insulated circuit board or lead frame) to which the semiconductor chip has been temporarily bonded, the sintered material is sintered under a second condition of heating and pressure, and the semiconductor chip is bonded to the conductive plate via the sintered material.

[0008] Here, a surface to which the sintering material is attached, such as the main surface of the conductive plate, may adsorb a certain amount or more of oxygen and carbon contained in the environment in which the conductive plate is handled. When a certain amount or more of oxygen and carbon is adsorbed on the surface to which the sintering material is attached, the adhesive strength of the sintering material decreases, and the semiconductor chip may become misaligned during the process of placing the semiconductor chip on the conductive plate, temporarily bonding it, and bonding it. Bonding a semiconductor chip in a misaligned state may result in, for example, problems (such as poor connections) in the subsequent connection between the semiconductor chip and other components (conductive wires, clips, blocks, circuit boards, etc.), which may result in reduced yields and reduced quality of the semiconductor device.

[0009] In one aspect, the present invention aims to provide a method for manufacturing a semiconductor device that can suppress misalignment of a semiconductor chip due to a decrease in adhesive strength of a sintered material. [Means for solving the problem]

[0010] In one aspect, a method for manufacturing a semiconductor device is provided, comprising: a first processing step of reducing the amount of oxygen and carbon adsorption on a first main surface of a conductive plate to 20 atomic % or less; a first checking step of checking whether the conductive plate is at or below a first reference temperature after the first processing step; a chip mounting step of, if the conductive plate is at or below the first reference temperature in the first checking step, opposing the first main surface to a second main surface of a semiconductor chip and mounting the semiconductor chip on the first main surface via a sintered material containing an organic substance; a first bonding step of, after the chip mounting step, applying heat and pressure under first conditions such that some of the organic substance remains in the sintered material, thereby temporarily bonding the semiconductor chip to the first main surface via the sintered material; a preparation step of, after the first bonding step, preparing to bond the semiconductor chip to the first main surface via the sintered material; and a second bonding step of, after the preparation step, applying heat and pressure under second conditions such that the sintered material is sintered, thereby bonding the semiconductor chip to the first main surface via the sintered material. [Effects of the Invention]

[0011] In one aspect, it is possible to realize a method for manufacturing a semiconductor device that can suppress misalignment of a semiconductor chip due to a decrease in the adhesive strength of the sintered material. [Brief explanation of the drawings]

[0012] [Figure 1] 1A to 1C are diagrams illustrating a first example of a method for manufacturing a semiconductor device. [Figure 2] 10A to 10C are diagrams illustrating a second example of the method for manufacturing a semiconductor device. [Figure 3] 10A to 10C are diagrams illustrating temporary bonding and bonding between a conductive plate and a semiconductor chip using a sintered material. [Figure 4] 10A to 10C are diagrams illustrating a preparation process for joining a conductive plate and a semiconductor chip using a sintered material. [Figure 5] 1A to 1C are diagrams illustrating an example of a method for manufacturing a semiconductor device. [Figure 6] 5A to 5C are diagrams illustrating a first processing step and a first checking step for a conductive plate in the method for manufacturing a semiconductor device according to the first embodiment. [Figure 7] FIG. 10 is a diagram showing an example of the relationship between the amount of oxygen and carbon adsorbed on the conductive plate and the shear strength of the semiconductor chip. [Figure 8] 10A to 10C are diagrams illustrating a first processing step and a first checking step for a conductive plate according to a second embodiment. [Figure 9] 10A to 10C are diagrams illustrating another example of a method for manufacturing a semiconductor device. [Figure 10] 10A to 10C are diagrams illustrating a second processing step and a second checking step of the semiconductor chip in the method for manufacturing the semiconductor device according to the third embodiment. [Figure 11] 13A to 13C are diagrams illustrating a second processing step and a second checking step of the semiconductor chip according to the fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0013] [First embodiment] 1A and 1B are diagrams illustrating a first example of a method for manufacturing a semiconductor device. Fig. 1A shows a schematic cross-sectional view of a main part of an example of a process for forming a paste-like sintered material. Fig. 1B shows a schematic cross-sectional view of a main part of an example of a semiconductor chip mounting process (chip mounting process) and a temporary bonding process (first bonding process). Fig. 1C shows a schematic cross-sectional view of a main part of an example of a semiconductor chip bonding process (second bonding process).

[0014] In the first example, as shown in FIG. 1A, a paste-like sintered material 20 is first formed on a first main surface 11 of a conductive plate 10. The conductive plate 10 is, for example, a conductive pattern layer in an insulating circuit board in which a conductive pattern layer is formed on the main surface of an insulating substrate such as a ceramic substrate, or a die pad in a lead frame having a die pad. For example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazed) substrate can be used as the insulating circuit board. The conductive pattern layer of the insulating circuit board, and the lead frame or its die pad are made of a metal material such as copper or aluminum.

[0015] The paste-like sintering material 20 contains an organic solvent and metal particles such as silver or copper coated with an organic protective film. As a material for the metal particles of the sintering material 20, silver has the advantage of being less susceptible to oxidation than copper, and copper has the advantage of being less expensive than silver. The paste-like sintering material 20 is an example of a sintering material containing an organic substance (organic solvent and organic protective film). The paste-like sintering material 20 containing metal particles such as silver and the organic substance covering them is applied to the first main surface 11 of a conductive plate 10 such as an insulating circuit board or a lead frame using, for example, a metal mask or a screen mask, and is formed.

[0016] As shown in FIG. 1(A), the paste-like sintered material 20 formed on the first main surface 11 of the conductive plate 10 is dried at a predetermined temperature, for example, about 140°C, to volatilize the organic solvent to a certain extent and fix the shape.

[0017] Next, as shown in FIG. 1B, a semiconductor chip 30 is placed on the paste-like sintered material 20 formed on the first main surface 11 of the conductive plate 10. The semiconductor chip 30 may be a semiconductor chip such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or a power semiconductor chip using a wide bandgap semiconductor such as silicon carbide (SiC). An electrode layer made of a metal material such as copper, for example, an electrode layer functioning as a load electrode such as a collector electrode or a drain electrode, is provided on a second main surface 31 of the semiconductor chip 30 facing the first main surface 11 of the conductive plate 10. The semiconductor chip 30 is placed on the sintered material 20 so that its second main surface 31 faces the first main surface 11 of the conductive plate 10 and the sintered material 20.

[0018] The semiconductor chip 30 placed on the sintered material 20 is heated and pressed against the sintered material 20 and the conductive plate 10, as shown in FIG. 1(B). The heating and pressing conditions at this time are set to first conditions that leave some of the organic matter contained in the sintered material 20, such as some of the organic solvent and an organic protective film coating metal particles such as silver. By heating and pressing under these first conditions, the semiconductor chip 30 is temporarily bonded (or temporarily fixed) to the first main surface 11 of the conductive plate 10 via the sintered material 20 with some of the organic matter remaining.

[0019] The semiconductor chip 30 temporarily bonded to the first main surface 11 of the conductive plate 10 via the sintering material 20 undergoes predetermined preparation processes for bonding, such as transportation, and is then further heated and pressed against the sintering material 20 and the conductive plate 10, as shown in FIG. 1(C). The heating and pressing conditions at this time are set to second conditions that remove organic matter contained in the sintering material 20 and sinter metal particles such as silver to each other. The heating temperature under these second conditions is set to a heating temperature higher than the heating temperature under the first conditions for the temporary bonding, and the pressing force under the second conditions is set to a pressing force higher than the pressing force under the first conditions for the temporary bonding. The semiconductor chip 30 is bonded (or permanently bonded) to the first main surface 11 of the conductive plate 10 via the sintered sintering material 20 by heating and pressing under these second conditions.

[0020] For example, a semiconductor device 1 in which a semiconductor chip 30 is mounted on a first main surface 11 of a conductive plate 10 via a sintered material 20 is obtained by a method as shown in FIGS. 1(A) to 1(C). In the method using such a paste-like sintering material 20, when it is applied to the first main surface 11 of the conductive plate 10 (FIG. 1(A)), corners called dog ears and sagging that occurs at the start of application may occur, so the paste-like sintering material 20 is applied so that it has a planar size larger than the second main surface 31 of the semiconductor chip 30. In addition, in the method using the paste-like sintering material 20, it is necessary to supply a sufficient amount of sintering material 20 paste to the mask used during application, and part of it is filled into the openings of the mask, so the actual amount of paste used is in the range of approximately 80% to 50%.

[0021] FIG. 2 is a diagram illustrating a second example of a method for manufacturing a semiconductor device. FIG. 2(A) shows a cross-sectional view of a main part of an example of a step of placing a semiconductor chip on a sheet-shaped sintered material. FIG. 2(B) shows a cross-sectional view of a main part of an example of a step of transferring a sheet-shaped sintered material to a semiconductor chip. FIG. 2(C) shows a cross-sectional view of a main part of an example of a step of placing a semiconductor chip onto which a sheet-shaped sintered material has been transferred (chip placing step) and a temporary bonding step (first bonding step). FIG. 2(D) shows a cross-sectional view of a main part of an example of a step of bonding a semiconductor chip (second bonding step).

[0022] In the second example, first, as shown in FIG. 2(A), a sheet-like sintered material 20 is placed on a support 40 such as a rubber sheet. The sheet-like sintered material 20 is prepared by applying the paste-like sintered material 20 onto a PET (Poly Ethylene Terephthalate) film or the like, drying it at a predetermined temperature to volatilize the organic solvent to a certain extent, and fixing the shape in advance. The sheet-like sintered material 20 is an example of a sintered material containing organic matter (organic solvent and organic protective film). Such a sheet-like sintered material 20 is placed on the support 40.

[0023] As shown in FIG. 2(A), the semiconductor chip 30 as described above is placed on a sheet-like sintered material 20 placed on a support 40. The semiconductor chip 30 is placed on the sintered material 20 so that the second main surface 31, on which an electrode layer functioning as a load electrode is provided, faces the support 40 and the sintered material 20. The semiconductor chip 30 placed on the sintered material 20 is heated and pressed. As a result, the sintered material 20 is attached (or pasted) to the second main surface 31 of the semiconductor chip 30. Alternatively, the semiconductor chip 30 (its second main surface 31) is attached to the sintered material 20.

[0024] Then, as shown in Figure 2(B), the sintered material 20 on the support 40 is broken at a position that matches the size of the semiconductor chip 30, and the semiconductor chip 30 is picked up together with the sintered material 20 attached and transferred to its second main surface 31.

[0025] 2(C), the picked-up semiconductor chip 30 and sintered material 20 are placed (or attached or pasted) on the first main surface 11 of the conductive plate 10. The semiconductor chip 30 and sintered material 20 are placed on the first main surface 11 so that the side of the sintered material 20 transferred to the second main surface 31 of the semiconductor chip 30 faces the first main surface 11 of the conductive plate 10.

[0026] The semiconductor chip 30, which is placed on the first main surface 11 of the conductive plate 10 via the sintered material 20, is heated and pressed against the sintered material 20 and the conductive plate 10, as shown in FIG. 2(C). The heating and pressing conditions at this time are set to first conditions that leave some of the organic matter contained in the sintered material 20, such as some of the organic solvent and an organic protective film coating metal particles such as silver. By heating and pressing under these first conditions, the semiconductor chip 30 is temporarily bonded (or temporarily fixed) to the first main surface 11 of the conductive plate 10 via the sintered material 20 with some of the organic matter remaining.

[0027] The semiconductor chip 30 temporarily bonded to the first main surface 11 of the conductive plate 10 via the sintering material 20 undergoes predetermined preparation processes for bonding, such as transportation, and is then further heated and pressed against the sintering material 20 and the conductive plate 10, as shown in FIG. 2(D). The heating and pressing conditions at this time are set to second conditions that remove organic matter contained in the sintering material 20 and sinter metal particles such as silver to each other. The heating temperature under these second conditions is set to a heating temperature higher than the heating temperature under the first conditions for the temporary bonding, and the pressing force under the second conditions is set to a pressing force higher than the pressing force under the first conditions for the temporary bonding. The semiconductor chip 30 is bonded (or permanently bonded) to the first main surface 11 of the conductive plate 10 via the sintered sintering material 20 by heating and pressing under these second conditions.

[0028] For example, by the method shown in FIGS. 2(A) to 2(D), a semiconductor device 1 is obtained in which a semiconductor chip 30 is mounted on the first main surface 11 of a conductive plate 10 via a sintered material 20. Furthermore, in the method using such sheet-like sintered material 20, a mechanism is adopted (Figures 2(A) and 2(B)) in which it is transferred to the second main surface 31 of the semiconductor chip 30 in a planar size corresponding to the planar size of the chip, thereby increasing the utilization efficiency of the sintered material 20 to approximately 80% to 95%.

[0029] When the semiconductor device 1 uses a semiconductor chip 30 that operates at a relatively high temperature, for example, a power semiconductor chip that uses a wide bandgap semiconductor such as SiC, using a solder material to bond the semiconductor chip 30 to the conductive plate 10 may cause the operating temperature of the semiconductor chip 30 to approach or exceed the melting point of the solder material, or may not provide sufficient thermal conductivity between the semiconductor chip 30 and the conductive plate 10. In contrast, the sintered material 20 described above is one of the materials that can achieve high heat resistance and thermal conductivity, and is suitable as a material for bonding the conductive plate 10 to a semiconductor chip 30, such as a power semiconductor chip that uses a wide bandgap semiconductor that operates at a relatively high temperature.

[0030] The above-mentioned sintered material 20 and temporary bonding and bonding using the same will be further described. 3A and 3B are diagrams illustrating the temporary bonding and bonding of a conductive plate and a semiconductor chip using a sintered material. FIG. 3A shows a schematic cross-sectional view of a main part of an example of a sintered material. FIG. 3B shows a schematic cross-sectional view of a main part of an example of a temporary bonding step (first bonding step) of a conductive plate and a semiconductor chip. FIG. 3C shows a schematic cross-sectional view of a main part of an example of a bonding step (second bonding step) of a conductive plate and a semiconductor chip.

[0031] As shown in FIG. 3(A), the paste-like sintering material 20 contains an organic solvent 21 and metal particles 23 such as silver coated with an organic protective film 22. Oxidation of the metal particles 23 is suppressed by being coated with the organic protective film 22. The metal particles 23 coated with the organic protective film 22 are mixed with, for example, about 10 wt % of the organic solvent 21 to form a paste. The sintering material 20 is produced, stored, and used in this paste state.

[0032] In the process of temporarily bonding the first main surface 11 of the conductive plate 10 and the second main surface 31 of the semiconductor chip 30 via the sintered material 20 (FIGS. 1(B) and 2(C)), the sintered material 20, from which part of the organic solvent 21 has been evaporated by drying, is heated and pressurized under first conditions such that part of the organic matter, for example, part of the organic solvent 21 and the organic protective film 22, remains. This results in a state as shown in FIG. 3(B), in which the semiconductor chip 30 is temporarily bonded (temporarily fixed) onto the first main surface 11 of the conductive plate 10 via the sintered material 20 containing the organic matter.

[0033] In the bonding process (FIGS. 1(C) and 2(D)) performed after such a temporary bonding process, the sintered material 20 that has been heated and pressed under the first conditions in the temporary bonding process is subjected to heating and pressing under second conditions set at a higher heating temperature and pressure. As a result, as shown in FIG. 3(C), the organic solvent 21 and organic protective film 22 contained in the sintered material 20 are removed by volatilization or decomposition, and the metal particles 23 are sintered together, resulting in a state in which the semiconductor chip 30 is bonded (mainly bonded) onto the first main surface 11 of the conductive plate 10 via the sintered sintered material 20. By joining in this manner, the conductive plate 10 and the semiconductor chip 30 are mechanically and electrically connected by the sintered material 20 .

[0034] In addition, although the above-mentioned Figures 1(A) to 1(C) and Figures 2(A) to 2(D) show an example in which one semiconductor chip 30 is mounted on the first main surface 11 of the conductive plate 10 via a sintered material 20, multiple semiconductor chips 30 may be mounted on the first main surface 11 of the conductive plate 10 via a sintered material 20 each.

[0035] Next, a description will be given of a preparation step for bonding that is carried out between the temporary bonding step (first bonding step) and the bonding step (second bonding step). FIG. 4 is a diagram illustrating a preparation process for bonding a conductive plate and a semiconductor chip using a sintered material.

[0036] For convenience, the example shown here is one using the sheet-like sintered material 20 shown in Figures 2(A) to 2(D). Figure 4 shows, as an example, a configuration in which multiple (two in this example) semiconductor chips 30 are mounted on the first main surface 11 of the conductive plate 10 via the sintered material 20.

[0037] The structure (FIG. 2(C)) in which the semiconductor chip 30 is placed on the first main surface 11 of the conductive plate 10 via the sintered material 20 (sheet-shaped sintered material 20) from which part of the organic solvent 21 has been evaporated by drying is temporarily bonded in a temporary bonding processing unit 50, as shown in FIG. 4 (upper left diagram). The structure is temporarily bonded in the temporary bonding processing unit 50 by heating and pressurizing under a first condition such that part of the organic matter contained in the sintered material 20 remains. Here, the temporary bonding processing unit 50 is a processing unit or processing area for carrying out the temporary bonding process in the manufacturing line of the semiconductor device 1. The temporary bonding processing unit 50 includes a transport mechanism for the conductive plate 10 (the insulating circuit board or lead frame having the conductive plate 10), a transport mechanism for the semiconductor chip 30 (in this example, the semiconductor chip 30 and the sheet-shaped sintered material 20 transferred and attached thereto), and a heating mechanism and a pressurizing mechanism for the structure including the sintered material 20 and the conductive plate 10 and semiconductor chip 30 arranged therebetween.

[0038] The structure in which the semiconductor chip 30 is temporarily bonded to the conductive plate 10 via the sintering material 20 in the temporary bonding processing unit 50 is transported from the temporary bonding processing unit 50 to the bonding processing unit 60 (solid arrow in FIG. 4 ), as shown in FIG. 4 (upper view thereof). For example, the structure is transported from the temporary bonding processing unit 50 to the bonding processing unit 60 by a transport mechanism such as a conveyor or a robot arm. The structure transported to the bonding processing unit 60 is subjected to heating and pressurization under second conditions in the bonding processing unit 60 so that organic substances contained in the sintering material 20 are removed and metal particles are sintered together, thereby bonding the structure. Here, the bonding processing unit 60 is a processing unit or processing area for performing the bonding process in the manufacturing line of the semiconductor device 1. The bonding processing unit 60 includes a transport mechanism for the structure in which the semiconductor chip 30 is temporarily bonded to the conductive plate 10 via the sintering material 20, a heating mechanism for the structure, and a pressurizing mechanism for the structure.

[0039] The structure in which the semiconductor chip 30 is temporarily bonded to the conductive plate 10 via the sintered material 20 in the temporary bonding processing section 50 may be covered with a protective sheet 70, as shown in Figure 4 (the lower figure), and then heated and pressed under the second condition as described above in the bonding processing section 60 to bond them (dotted arrow in Figure 4).

[0040] When multiple semiconductor chips 30 are mounted on the first main surface 11 of the conductive plate 10, a single protective sheet 70 covering the multiple semiconductor chips 30 may be arranged as shown in FIG. 4, or multiple protective sheets 70 covering each of the multiple semiconductor chips 30 may be arranged, although this is not shown here.

[0041] A flexible material is used for the protective sheet 70. For example, silicone resin, polyimide resin, graphite, or the like is used for the protective sheet 70. The protective sheet 70 covers the structure temporarily joined in the temporary joining processing unit 50, and thereby functions to prevent the semiconductor chip 30 from being damaged when a jig for applying pressure to the semiconductor chip 30 directly hits the semiconductor chip 30 during subsequent joining performed in the joining processing unit 60.

[0042] The protective sheet 70 may be placed on the structure temporarily bonded in the temporary bonding processing unit 50 inside the temporary bonding processing unit 50, or may be placed inside the bonding processing unit 60 after transport from the temporary bonding processing unit 50 to the bonding processing unit 60. The protective sheet 70 may be placed on the structure temporarily bonded in the temporary bonding processing unit 50 outside the temporary bonding processing unit 50 and the bonding processing unit 60 after transport from the temporary bonding processing unit 50 and before transport into the bonding processing unit 60. The structure temporarily bonded in the temporary bonding processing unit 50 can be transported to the bonding processing unit 60 with the protective sheet 70 placed on it.

[0043] Preparatory processes for bonding that are carried out between the temporary bonding process and the bonding process include transportation from the temporary bonding processing unit 50 to the bonding processing unit 60, as shown in Figure 4, and placement of a protective sheet 70 inside either the temporary bonding processing unit 50 or the bonding processing unit 60 or outside both.

[0044] Here, the example is one in which the sheet-like sintered material 20 shown in Figures 2(A) to 2(D) is used, but similarly, in the case of the form in which the paste-like sintered material 20 shown in Figures 1(A) to 1(C) is used, the preparation steps for joining that are carried out between the temporary joining step and the joining step include such transportation and placement of the protective sheet 70.

[0045] However, in the preparation processes for such bonding (such as transportation and placement of the protective sheet 70) that are carried out between the temporary bonding process and the bonding process, if the adhesive strength of the sintered material 20 is low, misalignment of the semiconductor chip 30 temporarily bonded onto the first main surface 11 of the conductive plate 10 via the sintered material 20 may occur.

[0046] That is, in the structure (FIGS. 1(B), 2(C), 3(B), and 4) in which the semiconductor chip 30 is temporarily bonded to the first main surface 11 of the conductive plate 10 via the sintering material 20, the sintering material 20 is dried to remove a portion of the organic matter (organic solvent 21), and then heated and pressurized under a first condition in which a portion of the organic matter (organic solvent 21 and organic protective film 22) remains. Therefore, in the structure in which the semiconductor chip 30 is temporarily bonded to the first main surface 11 of the conductive plate 10 via the sintering material 20, the sintering material 20 is likely to have a lower adhesive strength than when it was in an initial paste state. Furthermore, oxygen and carbon contained in the environment in which the conductive plate 10 is handled can be adsorbed to the first main surface 11 of the conductive plate 10 before the sintering material 20 is attached. If a certain amount or more of oxygen and carbon is adsorbed to the first main surface 11 of the conductive plate 10, the adhesive strength of the sintering material 20 attached thereto during temporary bonding will be further reduced.

[0047] When the sintered material 20, whose adhesive strength has been reduced by drying, heating, etc., is attached to the first main surface 11 of the conductive plate 10 to which a certain amount of oxygen and carbon has been adsorbed, further reducing the adhesive strength, the sintered material 20 will no longer be able to exert sufficient adhesive strength to hold the semiconductor chip 30 against the first main surface 11. If the sintered material 20 does not exert sufficient adhesive strength, external forces applied during preparation for bonding after temporary bonding, such as vibrations during transportation or external forces due to contact with the protective sheet 70, may cause the semiconductor chip 30 to become misaligned with respect to the first main surface 11 of the conductive plate 10. When multiple semiconductor chips 30 are mounted on the first main surface 11 of the conductive plate 10, the degree of misalignment may vary among the multiple semiconductor chips 30. Covering the multiple semiconductor chips 30 with a single protective sheet 70, or transporting the multiple semiconductor chips 30 while covered with a single protective sheet 70, may make the multiple semiconductor chips 30 more likely to become misaligned, or the degree of misalignment may vary among the multiple semiconductor chips 30.

[0048] If the semiconductor chip 30 is joined to the first main surface 11 of the conductive plate 10 in a misaligned state, there is a risk that problems (such as poor connection) may occur in the subsequent connection between the semiconductor chip 30 and other components (conductive wires, clips, blocks, circuit boards, etc.), which may result in a decrease in yield or quality of the semiconductor device 1.

[0049] In the method using a paste-like sintering material 20 (FIGS. 1A to 1C), if the organic solvent contains a component that removes oxygen and other contaminants adsorbed on the first main surface 11 of the conductive plate 10, the paste-like sintering material 20 (FIG. 1A) applied to the first main surface 11 can remove oxygen and other contaminants from the first main surface 11, thereby preventing a decrease in the adhesive strength of the sintering material 20 to some extent. However, the inclusion of such a component may result in increased costs. On the other hand, in the method using a sheet-like sintering material 20 (FIGS. 2A to 2D), it is difficult to increase the amount of organic solvent contained in the sintering material 20 in order to maintain the sheet shape when the sheet-like sintering material 20 is transferred to the backside of the semiconductor chip 30. Therefore, the sheet-like sintering material 20 cannot sufficiently remove oxygen and other contaminants from the first main surface 11, making it difficult to prevent a decrease in the adhesive strength of the sintering material 20.

[0050] Furthermore, if the heating temperature and pressure during temporary bonding are set to relatively high values ​​(e.g., a heating temperature of 200°C and a pressure of 5 MPa), a certain degree of adhesive strength of the sintered material 20 can be achieved. However, during subsequent bonding (e.g., a heating temperature of 200°C to 300°C and a pressure of 10 MPa to 40 MPa), the sintered material 20 may not be sintered sufficiently, resulting in a poor bonding strength of the semiconductor chip 30. This is because the organic protective film coating the metal particles volatilizes during temporary bonding, causing the metal particles to alloy with each other, resulting in a porous structure, which prevents sufficient sintering during subsequent bonding. Therefore, temporary bonding is preferably performed at a relatively low heating temperature (e.g., 100°C to 180°C) and a relatively low pressure (e.g., 5 MPa or less). However, in this case, sufficient adhesive strength of the sintered material 20 may not be achieved, potentially causing the semiconductor chip 30 to become misaligned.

[0051] It is also possible to omit the temporary bonding and simply place the semiconductor chip 30 on the first main surface 11 of the conductive plate 10 via the sintered material 20, sintering the sintered material 20 at the same time, and thereby bonding the semiconductor chip 30. However, this requires a sufficient sintering time (3 minutes or more and 5 minutes or less), which increases the time required to bond the semiconductor chip 30 and manufacture the semiconductor device 1.

[0052] Therefore, a method is desired that can obtain sufficient adhesion of the sintered material 20, and can perform temporary bonding at a relatively low heating temperature (e.g., 100°C or higher and 180°C or lower), with a relatively low pressure (e.g., 5 MPa or lower), and in a relatively short time (e.g., 10 seconds or less), thereby suppressing misalignment of the semiconductor chip 30 in the preparation process carried out between temporary bonding and bonding, and that can obtain sufficient sintering and bonding strength in the bonding after temporary bonding.

[0053] In view of this, the following method is adopted as an example to suppress a decrease in the adhesive strength of the sintered material 20 and the resulting displacement of the semiconductor chip 30. FIG. 5 is a diagram illustrating an example of a method for manufacturing a semiconductor device. FIG. 6 is a diagram illustrating a first processing step and a first checking step of a conductive plate in the method for manufacturing a semiconductor device according to the first embodiment. FIG. 6(A) is a schematic cross-sectional view of a main part of an example of a conductive plate before a heat treatment step. FIG. 6(B) is a schematic cross-sectional view of a main part of an example of a heat treatment step of a conductive plate. FIG. 6(C) is a schematic cross-sectional view of a main part of an example of a conductive plate after a heat treatment step.

[0054] In manufacturing the semiconductor device 1 according to the first embodiment, as shown in FIG. 5, before the chip placement process (step S3) in which the semiconductor chip 30 is placed on the conductive plate 10 together with the sintered material 20, a first processing process (step S1) and a first check process (step S2) are performed on the conductive plate 10.

[0055] In the first processing step (step S1), first, a conductive plate 10 as shown in Fig. 6(A) is prepared. As shown in Fig. 6(A), oxygen O and carbon C contained in the environment in which the conductive plate 10 is handled are adsorbed on a first main surface 11 of the conductive plate 10.

[0056] As shown in FIG. 6(B), the prepared conductive plate 10 is transferred to a heat treatment section 80, for example, a reflow furnace, where it is heat-treated in a reducing gas atmosphere. For example, in the heat treatment section 80, the conductive plate 10 is heat-treated in a hydrogen gas atmosphere at 300° C. for 15 minutes. By the heat treatment under predetermined conditions in the heat treatment section 80, oxygen O and carbon C adsorbed on the first main surface 11 of the conductive plate 10 bond with hydrogen H and are desorbed from the first main surface 11. This reduces the amount of oxygen O and carbon C adsorbed on the first main surface 11 of the conductive plate 10, and the first main surface 11 is purified. For example, based on the knowledge shown in FIG. 7 (described later), the conductive plate 10 is heat-treated in a reducing gas atmosphere in the heat treatment section 80 so that the total amount of oxygen O and carbon C adsorbed on the first main surface 11 is 20 atomic % or less.

[0057] After the heat treatment, the conductive plate 10 is cooled by natural or forced cooling in the heat treatment unit 80, and during this process, it is checked whether the first temperature T1 of the conductive plate 10 has become equal to or lower than a first reference temperature Ts1. This is the first check step (step S2). The first reference temperature Ts1, which is the reference for checking the first temperature T1 of the conductive plate 10, is set to a temperature that prevents oxygen O and carbon C in the environment in which the conductive plate 10 is handled from being re-adsorbed onto the first main surface 11 of the conductive plate 10 carried out of the heat treatment unit 80, causing oxidation and carbonization. The first reference temperature Ts1 is set to, for example, 80°C.

[0058] After the heat treatment, the conductive plate 10, which has been cooled to a first temperature T1 that is equal to or lower than the first reference temperature Ts1, is carried out from the heat treatment unit 80, as shown in Fig. 6(C) . Since the first temperature T1 of the carried-out conductive plate 10 is equal to or lower than the first reference temperature Ts1, re-adsorption, oxidation, and carbonization of oxygen O and carbon C onto the first main surface 11 are suppressed.

[0059] After heat treatment is performed in such a reducing gas atmosphere, the conductive plate 10 that is transported out of the heat treatment unit 80 and has a temperature below the first reference temperature Ts1, i.e., the conductive plate 10 after the first processing step (step S1) and the first check step (step S2) shown in Figure 5, is used to perform the subsequent chip placement step (step S3), first bonding step (step S4), preparation step (step S5), and second bonding step (step S6) shown in Figure 5.

[0060] As an example, in the chip mounting step (step S3), a paste-like sintering material 20 is applied to the first main surface 11 of the conductive plate 10 after the first processing step (step S1) and the first checking step (step S2), as shown in FIGS. 1A and 1B, and the semiconductor chip 30 is mounted thereon. In the first bonding step (step S4), as shown in FIG. 1B and other figures, heating and pressurization are performed under first conditions such that part of the organic solvent in the sintering material 20 and the organic protective film coating the metal particles remain, and the semiconductor chip 30 is temporarily bonded (or temporarily fixed) to the first main surface 11 of the conductive plate 10 via the sintering material 20 with some of the organic material remaining. In the subsequent preparation step (step S5), predetermined preparations for bonding, such as transportation and placement of a protective sheet 70, are performed according to the example of FIG. 4. 1(C) and other figures, heating and pressure are applied under second conditions such that organic matter is removed and metal particles are sintered together, and the semiconductor chip 30 is bonded (or permanently bonded) onto the first main surface 11 of the conductive plate 10 via the sintered sintered material 20. In this way, the semiconductor device 1 is manufactured.

[0061] As another example, in the chip placement step (step S3), a semiconductor chip 30 with a sheet-like sintered material 20 transferred and attached thereto, prepared by the steps shown in FIGS. 2A and 2B, is placed on the first main surface 11 of the conductive plate 10 after the first processing step (step S1) and the first checking step (step S2), as shown in FIG. 2C. In the first bonding step (step S4), as shown in FIG. 2C, heating and pressurization are performed under first conditions such that part of the organic solvent in the sintered material 20 and the organic protective film coating the metal particles remain, and the semiconductor chip 30 is temporarily bonded (or temporarily fixed) to the first main surface 11 of the conductive plate 10 via the sintered material 20 with some of the organic material remaining. In the subsequent preparation step (step S5), predetermined preparations for bonding, such as transportation and placement of a protective sheet 70, are performed, as shown in FIG. 4. 2(D) and other figures, heating and pressure are applied under second conditions such that the organic matter is removed and the metal particles are sintered together, and the semiconductor chip 30 is bonded (or permanently bonded) onto the first main surface 11 of the conductive plate 10 via the sintered sintered material 20. In this way, the semiconductor device 1 is manufactured.

[0062] In the manufacture of the semiconductor device 1 employing the first processing step and first checking step according to the first embodiment, the amount of oxygen and carbon adsorbed on the first main surface 11 of the conductive plate 10 is suppressed to a certain amount or less, for example, 20 atomic % or less, by heat treatment in a reducing gas atmosphere. This suppresses a decrease in the adhesive strength between the sintered material 20, which temporarily bonds the semiconductor chip 30 to the first main surface 11 of the conductive plate 10, and the first main surface 11. Suppressing a decrease in the adhesive strength between the sintered material 20 and the first main surface 11 suppresses misalignment of the semiconductor chip 30 during preparation steps, such as transportation and placement of the protective sheet 70, which are performed between temporary bonding and bonding.

[0063] Furthermore, in the manufacture of the semiconductor device 1 employing the first processing step and the first checking step according to the first embodiment, the sintered material 20 after temporary bonding can obtain sufficient adhesion to the first main surface 11 of the conductive plate 10. Therefore, temporary bonding can be performed under the first condition set to a relatively low heating temperature (e.g., 100°C or higher and 180°C or lower), a relatively low pressure (e.g., 5 MPa or lower), and a relatively short time (e.g., 10 seconds or shorter). By performing temporary bonding under these conditions, sufficient sintering and bonding strength can be obtained in the bond after temporary bonding.

[0064] FIG. 7 is a diagram showing an example of the relationship between the amount of oxygen and carbon adsorbed on the conductive plate and the shear strength of the semiconductor chip. 7, the horizontal axis represents the total amount of oxygen and carbon adsorption [atomic %] on the first main surface 11 of the conductive plate 10 before the sintering material 20 is attached, and the vertical axis represents the shear strength [N] of the semiconductor chip 30 temporarily bonded onto the first main surface 11 of the conductive plate 10 via the sintering material 20. The total amount of oxygen and carbon adsorption on the first main surface 11 of the conductive plate 10 was measured by ESCA (Electron Spectroscopy for Chemical Analysis).

[0065] 7 shows that the shear strength of the semiconductor chip 30 temporarily bonded to the first main surface 11 of the conductive plate 10 via the sintering material 20 tends to increase as the amount of oxygen and carbon adsorbed on the first main surface 11 of the conductive plate 10 decreases before the sintering material 20 is attached. For example, if the sintering material 20 is attached to the first main surface 11 of the conductive plate 10 with an adhesive force that results in a shear strength of the semiconductor chip 30 of 0.5 N or more, misalignment of the semiconductor chip 30 is sufficiently suppressed during preparatory steps such as transportation between temporary bonding and placement of the protective sheet 70. To achieve such shear strength of the semiconductor chip 30, it is desirable to keep the total amount of oxygen and carbon adsorbed on the first main surface 11 of the conductive plate 10 before the sintering material 20 is attached to 20 atomic % or less.

[0066] Based on the findings in Figure 7, in the first processing step in which heat treatment is performed in a reducing gas atmosphere as described above and the subsequent first check step, processing is carried out so that the total amount of oxygen and carbon adsorbed on the first main surface 11 of the conductive plate 10 is 20 atomic % or less.

[0067] Manufacturing the semiconductor device 1 using the first processing step and the first checking step according to the first embodiment can effectively prevent misalignment of the semiconductor chip 30 due to a decrease in the adhesive strength of the sintered material 20. This prevents problems (such as poor connection) from occurring in the connection between the semiconductor chip 30 and other components (conductive wires, clips, blocks, circuit boards, etc.) after bonding with the conductive plate 10, and makes it possible to realize high-quality semiconductor devices 1 with a good yield.

[0068] [Second embodiment] In the first embodiment described above, an example was shown in which heat treatment in a reducing gas atmosphere was performed as the first treatment step to reduce the amount of oxygen and carbon adsorbed on the first main surface 11 of the conductive plate 10, but the method for reducing the amount of oxygen and carbon adsorbed on the first main surface 11 is not limited to this. Here, an example in which a different method is adopted as a method for reducing the amount of oxygen and carbon adsorbed on the first main surface 11 of the conductive plate 10 will be described as the second embodiment.

[0069] 8A and 8B are diagrams illustrating the first processing step and the first checking step of the conductive plate according to the second embodiment. Fig. 8A is a schematic cross-sectional view of a main part of an example of the conductive plate before the plasma processing step. Fig. 8B is a schematic cross-sectional view of a main part of an example of the conductive plate in the plasma processing step. Fig. 8C is a schematic cross-sectional view of a main part of an example of the conductive plate after the plasma processing step.

[0070] In manufacturing the semiconductor device 1 according to the second embodiment, the steps shown in FIG. 5 are carried out, namely, the first processing step (step S1), the first checking step (step S2), the chip placement step (step S3), the first bonding step (step S4), the preparation step (step S5), and the second bonding step (step S6).

[0071] In the manufacturing of the semiconductor device 1 according to the second embodiment, in the first processing step (step S1) shown in FIG. 5, the conductive plate 10 having oxygen O and carbon C adsorbed on the first main surface 11 as shown in FIG. 8(A) is transferred to a plasma processing unit 90, for example, a processing chamber, as shown in FIG. 8(B). The conductive plate 10 is plasma-processed in an inert gas atmosphere in the plasma processing unit 90. For example, in the plasma processing unit 90, the conductive plate 10 is plasma-processed in an argon gas atmosphere at room temperature or at elevated temperatures. Alternatively, in the plasma processing unit 90, the conductive plate 10 is plasma-processed in a nitrogen gas atmosphere at room temperature or at elevated temperatures. Note that FIG. 8(B) shows an example in which argon Ar is used.

[0072] By plasma treatment under predetermined conditions in the plasma treatment unit 90, oxygen O and carbon C adsorbed on the first main surface 11 of the conductive plate 10 are repelled by collision with argon Ar and are desorbed from the first main surface 11. This reduces the amount of oxygen O and carbon C adsorbed on the first main surface 11 of the conductive plate 10, and the first main surface 11 is cleaned. For example, based on the knowledge shown in FIG. 7 above, the conductive plate 10 is subjected to plasma treatment in an inert gas atmosphere in the plasma treatment unit 90 so that the total amount of oxygen O and carbon C adsorbed on the first main surface 11 is 20 atomic % or less.

[0073] After the plasma treatment, the conductive plate 10 is cooled by natural or forced cooling in the plasma treatment unit 90, and during this process, it is checked whether the first temperature T1 of the conductive plate 10 has become equal to or lower than a first reference temperature Ts1, for example, 80°C or lower, which is the temperature at which re-adsorption of oxygen O and carbon C onto the first main surface 11 is suppressed. This is the first check step (step S2). After the plasma treatment, the conductive plate 10, whose first temperature T1 is equal to or lower than the first reference temperature Ts1, is carried out of the plasma treatment unit 90, as shown in FIG. 8(C).

[0074] Plasma processing is performed in such an inert gas atmosphere, and the conductive plate 10 that is at or below the first reference temperature Ts1 and is transported out of the plasma processing unit 90, i.e., the conductive plate 10 after the first processing step (step S1) and the first check step (step S2) shown in Figure 5, is used to perform the subsequent chip placement step (step S3), first bonding step (step S4), preparation step (step S5), and second bonding step (step S6) shown in Figure 5.

[0075] As an example, in the chip mounting step (step S3), a paste-like sintering material 20 is applied to the first main surface 11 of the conductive plate 10 after the first processing step (step S1) and the first checking step (step S2), as shown in FIGS. 1A and 1B, and the semiconductor chip 30 is mounted thereon. In the first bonding step (step S4), as shown in FIG. 1B and other figures, heating and pressurization are performed under first conditions such that part of the organic solvent in the sintering material 20 and the organic protective film coating the metal particles remain, and the semiconductor chip 30 is temporarily bonded (or temporarily fixed) to the first main surface 11 of the conductive plate 10 via the sintering material 20 with some of the organic material remaining. In the subsequent preparation step (step S5), predetermined preparations for bonding, such as transportation and placement of a protective sheet 70, are performed according to the example of FIG. 4. 1(C) and other figures, heating and pressure are applied under second conditions such that organic matter is removed and metal particles are sintered together, and the semiconductor chip 30 is bonded (or permanently bonded) onto the first main surface 11 of the conductive plate 10 via the sintered sintered material 20. In this way, the semiconductor device 1 is manufactured.

[0076] As another example, in the chip placement step (step S3), a semiconductor chip 30 with a sheet-like sintered material 20 transferred and attached thereto, prepared by the steps shown in FIGS. 2A and 2B, is placed on the first main surface 11 of the conductive plate 10 after the first processing step (step S1) and the first checking step (step S2), as shown in FIG. 2C. In the first bonding step (step S4), as shown in FIG. 2C, heating and pressurization are performed under first conditions such that part of the organic solvent in the sintered material 20 and the organic protective film coating the metal particles remain, and the semiconductor chip 30 is temporarily bonded (or temporarily fixed) to the first main surface 11 of the conductive plate 10 via the sintered material 20 with some of the organic material remaining. In the subsequent preparation step (step S5), predetermined preparations for bonding, such as transportation and placement of a protective sheet 70, are performed, as shown in FIG. 4. 2(D) and other figures, heating and pressure are applied under second conditions such that the organic matter is removed and the metal particles are sintered together, and the semiconductor chip 30 is bonded (or permanently bonded) onto the first main surface 11 of the conductive plate 10 via the sintered sintered material 20. In this way, the semiconductor device 1 is manufactured.

[0077] In the manufacture of the semiconductor device 1 employing the first processing step and first checking step according to the second embodiment, the amount of oxygen and carbon adsorbed on the first main surface 11 of the conductive plate 10 is suppressed to a certain amount or less, for example, 20 atomic % or less, by plasma processing in an inert gas atmosphere. This suppresses a decrease in the adhesive strength between the sintered material 20, which temporarily bonds the semiconductor chip 30 to the first main surface 11 of the conductive plate 10, and the first main surface 11. Suppressing a decrease in the adhesive strength between the sintered material 20 and the first main surface 11 suppresses misalignment of the semiconductor chip 30 during preparation steps, such as transportation and placement of the protective sheet 70, which are performed between temporary bonding and bonding.

[0078] Furthermore, in the manufacture of the semiconductor device 1 employing the first processing step and the first checking step according to the second embodiment, the sintered material 20 after temporary bonding can obtain sufficient adhesion to the first main surface 11 of the conductive plate 10. Therefore, temporary bonding can be performed under the first condition set to a relatively low heating temperature (e.g., 100°C or higher and 180°C or lower), a relatively low pressure (e.g., 5 MPa or lower), and a relatively short time (e.g., 10 seconds or shorter). By performing temporary bonding under these conditions, sufficient sintering and bonding strength can be obtained in the bond after temporary bonding.

[0079] According to the manufacturing method of the semiconductor device 1 employing the first processing step and the first checking step of the second embodiment, it is possible to effectively prevent the semiconductor chip 30 from being misaligned due to a decrease in the adhesive strength of the sintered material 20. This prevents problems (such as poor connection) from occurring in the connection between the semiconductor chip 30 and other components (conductive wires, clips, blocks, circuit boards, etc.) after bonding with the conductive plate 10, and makes it possible to realize high-quality semiconductor devices 1 with a good yield.

[0080] [Third embodiment] In the first embodiment described above, an example was shown in which the first processing step of heat treating the conductive plate 10 in a reducing gas atmosphere and the subsequent first check step were performed, but such heat treatment in a reducing gas atmosphere can also be performed on the semiconductor chip 30 in addition to the conductive plate 10. Here, an example in which heat treatment in a reducing gas atmosphere is performed on both the conductive plate 10 and the semiconductor chip 30 will be described as the third embodiment.

[0081] Fig. 9 is a diagram for explaining another example of a method for manufacturing a semiconductor device. Fig. 10 is a diagram for explaining a second processing step and a second checking step of a semiconductor chip in a method for manufacturing a semiconductor device according to a third embodiment. Fig. 10(A) shows a schematic cross-sectional view of a main part of an example of a semiconductor chip before a heat treatment step. Fig. 10(B) shows a schematic cross-sectional view of a main part of an example of a heat treatment step of a semiconductor chip. Fig. 10(C) shows a schematic cross-sectional view of a main part of an example of a semiconductor chip after a heat treatment step.

[0082] In the manufacture of the semiconductor device 1 according to the third embodiment, as shown in Fig. 9, a first processing step (step S1) and a first check step (step S2) are performed on the conductive plate 10 before a chip mounting step (step S3) in which the semiconductor chip 30 is mounted on the conductive plate 10 together with the sintered material 20. In the manufacture of the semiconductor device 1 according to the third embodiment, as shown in Fig. 9, a second processing step (step S7) and a second check step (step S8) are performed on the semiconductor chip 30 before the chip mounting step (step S3). Then, after the first processing step (step S1) and the first check step (step S2) are performed on the conductive plate 10 and the second processing step (step S7) and the second check step (step S8) are performed on the semiconductor chip 30, the chip mounting step (step S3), the first bonding step (step S4), the preparation step (step S5), and the second bonding step (step S6) are performed.

[0083] In the manufacture of the semiconductor device 1 according to the third embodiment, the first processing step and the first check step for the conductive plate 10 are performed in the same manner as described in the first embodiment with reference to Figures 6(A) to 6(C). In the manufacture of the semiconductor device 1 according to the third embodiment, the second processing step and the second check step for the semiconductor chip 30 are performed in accordance with the example of the first processing step and the first check step for the conductive plate 10.

[0084] That is, in the manufacturing of the semiconductor device 1 according to the third embodiment, in the second processing step (step S7), the semiconductor chip 30 having oxygen O and carbon C adsorbed on the second main surface 31 as shown in FIG. 10(A) is transferred to a heat treatment unit 80, for example, a reflow furnace, as shown in FIG. 10(B). The semiconductor chip 30 is heat-treated in the heat treatment unit 80 in a reducing gas atmosphere. For example, in the heat treatment unit 80, the semiconductor chip 30 is heat-treated in a hydrogen gas atmosphere at 300°C for 15 minutes. This reduces the amount of oxygen O and carbon C adsorbed on the second main surface 31 of the semiconductor chip 30, and the second main surface 31 is purified. For example, based on the knowledge shown in FIG. 7 above, the semiconductor chip 30 is heat-treated in the heat treatment unit 80 in a reducing gas atmosphere so that the total amount of oxygen O and carbon C adsorbed on the second main surface 31 is 20 atomic % or less.

[0085] After the heat treatment, the semiconductor chip 30 is cooled in the heat treatment unit 80, and it is checked whether its second temperature T2 has become equal to or lower than a second reference temperature Ts2, for example, 80°C, which is the temperature at which re-adsorption of oxygen O and carbon C onto the second main surface 31 is suppressed. This is the second check step (step S8). After the heat treatment, the semiconductor chip 30, whose second temperature T2 is equal to or lower than the second reference temperature Ts2, is carried out of the heat treatment unit 80, as shown in FIG. 10(C).

[0086] The semiconductor chip 30 that has been subjected to the heat treatment in the reducing gas atmosphere and has reached a temperature equal to or lower than the second reference temperature Ts2, i.e., the semiconductor chip 30 after the second processing step (step S7) and the second check step (step S8) shown in FIG. 9, is used, and the subsequent chip mounting step (step S3), first bonding step (step S4), preparation step (step S5), and second bonding step (step S6) shown in FIG. 9 are performed. In the chip mounting step, first bonding step, preparation step, and second bonding step, the conductive plate 10 that has been similarly subjected to the heat treatment in the reducing gas atmosphere and has reached a temperature equal to or lower than the first reference temperature Ts1, i.e., the conductive plate 10 after the first processing step (step S1) and the first check step (step S2) shown in FIG. 9, is used as the conductive plate 10. The chip mounting step, first bonding step, preparation step, and second bonding step are performed in the same manner as described in the first embodiment, regardless of whether a paste-like sintered material 20 or a sheet-like sintered material 20 is used.

[0087] In the manufacture of the semiconductor device 1 according to the third embodiment, heat treatment in a reducing gas atmosphere is performed to suppress the amount of oxygen and carbon adsorption to a certain amount or less, for example, 20 atomic % or less, on both the first main surface 11 of the conductive plate 10 and the second main surface 31 of the semiconductor chip 30. This suppresses a decrease in the adhesive strength of the sintered material 20 to the first main surface 11 of the conductive plate 10, and also suppresses a decrease in the adhesive strength of the sintered material 20 to the second main surface 31 of the semiconductor chip 30. Suppressing a decrease in the adhesive strength of the sintered material 20 to the first main surface 11 and the second main surface 31 further suppresses misalignment of the semiconductor chip 30 during preparatory steps such as transportation and placement of the protective sheet 70, which are performed between temporary bonding steps.

[0088] Furthermore, in the manufacture of the semiconductor device 1 according to the third embodiment, the sintered material 20 after temporary bonding has sufficient adhesive strength with the first main surface 11 of the conductive plate 10 and the second main surface 31 of the semiconductor chip 30. Therefore, temporary bonding can be performed under conditions of a relatively low heating temperature (e.g., 100°C or higher and 180°C or lower), a relatively low pressure (e.g., 5 MPa or lower), and a relatively short time (e.g., 10 seconds or shorter). By performing temporary bonding under these conditions, sufficient sintering and bonding strength can be obtained in the bond after temporary bonding.

[0089] The manufacturing method of the semiconductor device 1 according to the third embodiment can more effectively prevent misalignment of the semiconductor chip 30 due to a decrease in the adhesive strength of the sintered material 20. This prevents problems from occurring in the connection between the semiconductor chip 30 and other components after bonding to the conductive plate 10, and makes it possible to realize high-quality semiconductor devices 1 with a good yield.

[0090] [Fourth embodiment] In the second embodiment, an example was shown in which the first processing step of performing plasma processing in an inert gas atmosphere and the subsequent first check step were performed on the conductive plate 10, but such plasma processing in an inert gas atmosphere can also be performed on the semiconductor chip 30 in addition to the conductive plate 10. Here, an example in which plasma processing in an inert gas atmosphere is performed on both the conductive plate 10 and the semiconductor chip 30 will be described as the fourth embodiment.

[0091] 11A and 11B are diagrams illustrating the second processing step and the second checking step of the semiconductor chip according to the fourth embodiment. FIG. 11A is a schematic cross-sectional view of a main part of an example of the semiconductor chip before the plasma processing step. FIG. 11B is a schematic cross-sectional view of a main part of an example of the semiconductor chip in the plasma processing step. FIG. 11C is a schematic cross-sectional view of a main part of an example of the semiconductor chip after the plasma processing step.

[0092] In the manufacture of the semiconductor device 1 according to the fourth embodiment, as shown in Fig. 9, a first processing step (step S1) and a first check step (step S2) are performed on the conductive plate 10 before a chip mounting step (step S3) in which the semiconductor chip 30 is mounted on the conductive plate 10 together with the sintered material 20. In the manufacture of the semiconductor device 1 according to the fourth embodiment, as shown in Fig. 9, a second processing step (step S7) and a second check step (step S8) are performed on the semiconductor chip 30 before the chip mounting step (step S3). Then, after the first processing step (step S1) and the first check step (step S2) are performed on the conductive plate 10 and the second processing step (step S7) and the second check step (step S8) are performed on the semiconductor chip 30, the chip mounting step (step S3), the first bonding step (step S4), the preparation step (step S5), and the second bonding step (step S6) are performed.

[0093] In the manufacture of the semiconductor device 1 according to the fourth embodiment, the first processing step and the first check step for the conductive plate 10 are performed in the same manner as described in the second embodiment with reference to Figures 8(A) to 8(C). In the manufacture of the semiconductor device 1 according to the fourth embodiment, the second processing step and the second check step for the semiconductor chip 30 are performed in accordance with the example of the first processing step and the first check step for the conductive plate 10.

[0094] That is, in the manufacturing of the semiconductor device 1 according to the fourth embodiment, in the second processing step (step S7) shown in Fig. 9, the semiconductor chip 30 having oxygen O and carbon C adsorbed on the second main surface 31 as shown in Fig. 11(A) is transferred to a plasma processing unit 90, for example, a processing chamber, as shown in Fig. 11(B). In the plasma processing unit 90, the semiconductor chip 30 is subjected to plasma processing in an atmosphere of an inert gas such as argon or nitrogen. Note that Fig. 11(B) shows an example in which argon Ar is used.

[0095] By performing plasma processing under predetermined conditions in the plasma processing unit 90, oxygen O and carbon C adsorbed on the second main surface 31 of the semiconductor chip 30 are repelled by collisions with argon Ar and are desorbed from the second main surface 31. This reduces the amount of oxygen O and carbon C adsorbed on the second main surface 31 of the semiconductor chip 30, and the second main surface 31 is cleaned. For example, based on the knowledge shown in FIG. 7 above, the semiconductor chip 30 is subjected to plasma processing in an inert gas atmosphere in the plasma processing unit 90 so that the total amount of oxygen O and carbon C adsorbed on the second main surface 31 is 20 atomic % or less.

[0096] After the plasma processing, the semiconductor chip 30 is cooled in the plasma processing unit 90, and it is checked whether its second temperature T2 has become equal to or lower than a second reference temperature Ts2, for example, 80°C or lower, which is the temperature at which re-adsorption of oxygen O and carbon C onto the second main surface 31 is suppressed. This is the second check step (step S8). After the plasma processing, the semiconductor chip 30, whose second temperature T2 is equal to or lower than the second reference temperature Ts2, is unloaded from the plasma processing unit 90, as shown in FIG. 11(C).

[0097] The semiconductor chip 30 that has been subjected to the plasma treatment in the inert gas atmosphere and has reached a temperature equal to or lower than the second reference temperature Ts2, i.e., the semiconductor chip 30 after the second treatment step (step S7) and the second check step (step S8) shown in FIG. 9, is used, and the subsequent chip mounting step (step S3), first bonding step (step S4), preparation step (step S5), and second bonding step (step S6) shown in FIG. 9 are performed. In the chip mounting step, first bonding step, preparation step, and second bonding step, the conductive plate 10 that has been subjected to the plasma treatment in the inert gas atmosphere and has reached a temperature equal to or lower than the first reference temperature Ts1, i.e., the conductive plate 10 after the first treatment step (step S1) and the first check step (step S2) shown in FIG. 9, is used as the conductive plate 10. The chip mounting step, first bonding step, preparation step, and second bonding step are performed in the same manner as described in the second embodiment, regardless of whether a paste-like sintered material 20 or a sheet-like sintered material 20 is used.

[0098] In the manufacture of the semiconductor device 1 according to the fourth embodiment, plasma treatment in an inert gas atmosphere is performed to suppress the amount of oxygen and carbon adsorption to a certain amount or less, for example, 20 atomic % or less, on both the first main surface 11 of the conductive plate 10 and the second main surface 31 of the semiconductor chip 30. This suppresses a decrease in the adhesive strength of the sintered material 20 to the first main surface 11 of the conductive plate 10, and also suppresses a decrease in the adhesive strength of the sintered material 20 to the second main surface 31 of the semiconductor chip 30. Suppressing a decrease in the adhesive strength of the sintered material 20 to the first main surface 11 and the second main surface 31 further suppresses misalignment of the semiconductor chip 30 during preparation steps such as transportation and placement of the protective sheet 70, which are performed between temporary bonding steps.

[0099] Furthermore, in the manufacture of the semiconductor device 1 according to the fourth embodiment, the sintered material 20 after temporary bonding has sufficient adhesive strength with the first main surface 11 of the conductive plate 10 and the second main surface 31 of the semiconductor chip 30. Therefore, temporary bonding can be performed under conditions of a relatively low heating temperature (e.g., 100°C or higher and 180°C or lower), a relatively low pressure (e.g., 5 MPa or lower), and a relatively short time (e.g., 10 seconds or shorter). By performing temporary bonding under these conditions, sufficient sintering and bonding strength can be obtained in the bond after temporary bonding.

[0100] According to the manufacturing method of the semiconductor device 1 according to the fourth embodiment, it is possible to more effectively prevent the positional deviation of the semiconductor chip 30 due to the decrease in the adhesive strength of the sintered material 20. This prevents problems from occurring in the connection between the semiconductor chip 30 and other components after bonding with the conductive plate 10, and makes it possible to realize high-quality semiconductor devices 1 with a good yield.

[0101] In the third and fourth embodiments, an example in which both the conductive plate 10 and the semiconductor chip 30 are subjected to heat treatment in a reducing gas atmosphere (third embodiment) and an example in which both the conductive plate 10 and the semiconductor chip 30 are subjected to plasma treatment in an inert gas atmosphere (fourth embodiment) have been shown. In addition, the conductive plate 10 may be subjected to heat treatment in a reducing gas atmosphere, and the semiconductor chip 30 may be subjected to plasma treatment in an inert gas atmosphere. Alternatively, the conductive plate 10 may be subjected to plasma treatment in an inert gas atmosphere, and the semiconductor chip 30 may be subjected to heat treatment in a reducing gas atmosphere. [Explanation of symbols]

[0102] 1. Semiconductor device 10 Conductive plate 11 First main surface 20 Sintered material 21 Organic solvents 22 Organic protective film 23 Metal particles 30 Semiconductor Chips 31 Second main surface 40 Support 50 Temporary bonding processing section 60 Joining processing section 70 Protective Sheet 80 Heat Treatment Section 90 Plasma processing section T1 1st temperature T2 2nd temperature Ts1 1st reference temperature Ts2 2nd reference temperature

Claims

1. a first treatment step of reducing the amount of adsorption of oxygen and carbon on the first main surface of the conductive plate to 20 atomic % or less; a first check step of checking whether the conductive plate after the first treatment step is at or below a first reference temperature; a chip mounting step of, when the temperature of the conductive plate is equal to or lower than the first reference temperature in the first check step, opposing the first main surface to a second main surface of a semiconductor chip and mounting the semiconductor chip on the first main surface via a sintered material containing an organic substance; a first bonding step of temporarily bonding the semiconductor chip to the first main surface via the sintered material by applying heat and pressure under a first condition such that a portion of the organic substance remains on the sintered material after the chip mounting step; a preparation step of preparing to bond the semiconductor chip to the first main surface via the sintered material after the first bonding step; a second bonding step of performing heating and pressure under second conditions for sintering the sintered material after the preparation step, and bonding the semiconductor chip to the first main surface via the sintered material; A method for manufacturing a semiconductor device, comprising:

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein said first treatment step includes a step of heat treating said first main surface in a reducing gas atmosphere.

3. 2. The method for manufacturing a semiconductor device according to claim 1, wherein said first processing step includes a step of plasma processing said first main surface in an inert gas atmosphere.

4. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the first reference temperature is 80[deg.] C.

5. Before the chip mounting step, a second treatment step of reducing the amount of adsorption of oxygen and carbon on the second main surface of the semiconductor chip to 20 atomic % or less; a second check step of checking whether the semiconductor chip after the second processing step is at or below a second reference temperature; Equipped with 5. A method for manufacturing a semiconductor device according to claim 1, wherein in the chip mounting process, if the conductive plate is at or below the first reference temperature in the first check process and the semiconductor chip is at or below the second reference temperature in the second check process, the first main surface and the second main surface are opposed to each other, and the semiconductor chip is mounted on the first main surface via the sintered material.

6. 6. The method for manufacturing a semiconductor device according to claim 5, wherein said second treatment step includes a step of heat treating said second main surface in a reducing gas atmosphere.

7. 6. The method for manufacturing a semiconductor device according to claim 5, wherein said second processing step includes a step of plasma processing said second main surface in an inert gas atmosphere.

8. 8. The method for manufacturing a semiconductor device according to claim 5, wherein the second reference temperature is 80[deg.] C.

9. The chip mounting step includes: applying the sintering material in a paste form to the first main surface of the conductive plate; placing the semiconductor chip with the second main surface facing the paste-like sintering material applied to the first main surface; 9. The method for manufacturing a semiconductor device according to claim 1, further comprising:

10. The chip mounting step includes: attaching a sheet of the sintered material to the second main surface of the semiconductor chip; placing the semiconductor chip so that the second main surface, to which the sheet-like sintered material is attached, faces the first main surface of the conductive plate; 9. The method for manufacturing a semiconductor device according to claim 1, further comprising:

11. 11. The method for manufacturing a semiconductor device according to claim 1, wherein the preparation step includes a step of transporting the conductive plate to which the semiconductor chip has been temporarily bonded via the sintering material to the first main surface.

12. 12. The method for manufacturing a semiconductor device according to claim 1, wherein the preparation step includes a step of covering the semiconductor chip temporarily joined to the first main surface via the sintered material with a protective sheet.

13. 13. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor chip is a semiconductor chip using a wide band gap semiconductor.

14. 14. The method for manufacturing a semiconductor device according to claim 1, wherein the chip mounting step includes a step of mounting a plurality of the semiconductor chips on the first main surface via a plurality of the sintered materials.

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