Method for manufacturing a group III nitride single crystal substrate

Abstract

To provide a production method of a group III nitride single crystal substrate capable of shortening a production time of a device and suppressing cracks and characteristics degradation in device production.SOLUTION: A production method of a group III nitride single crystal substrate of the invention includes a support substrate preparing step for preparing a support substrate containing nitride ceramics, a flattening layer forming step for forming a flattening layer on the top face of the support substrate, a seed crystal forming step for forming a seed crystal on the top face of the flattening layer, an epitaxial growth step for epitaxial growing an object group III nitride single crystal to obtain a composite substrate, and a separation step for separating a group III nitride single crystal substrate made of the group III nitride single crystal from the remainder of the composite substrate by removing at least any one of the flattening layer and the seed crystal layer.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a method for manufacturing single crystal substrates of group III nitrides such as aluminum nitride (AlN), aluminum gallium nitride (Al x Ga 1-x GaN (where 0 < x < 1), gallium nitride (GaN), etc. Specifically, it relates to a method for manufacturing single crystal substrates of group III nitrides by epitaxial film formation of group III nitride bulk substrates with high characteristics and low cost.

Background Art

[0002] Substrates of group III nitrides such as crystalline AlN-based and GaN-based have a wide bandgap and excellent short-wavelength luminescence properties and high-frequency characteristics with high breakdown voltage. Therefore, substrates of group III nitrides are expected to be applied to devices such as light-emitting diodes (LEDs), lasers, Schottky diodes, power devices, and high-frequency devices. In particular, LEDs made from single crystals of AlN and Al x Ga 1-x GaN (where 0.5 < x < 1.0) have been reported to have a bactericidal effect at the emission wavelength in the deep ultraviolet region (UVC; 200 - 280 nm) (see Non-Patent Document 1) and are expected as devices for current coronavirus countermeasures. Also, GaN single crystals are expected as devices for 5G and 6G wireless stations and EV wireless charging, and further improvement in quality, increase in large diameter, and reduction in cost are required.

[0003] Among these, since AlN does not have a melting point under normal pressure, it is difficult to manufacture by a general melt method used for manufacturing silicon single crystals and the like. Against such a background, Non-Patent Documents 2 and 3 describe methods for manufacturing AlN single crystal substrates by sublimation method (modified Lely method) using SiC or AlN as seed crystals in an N2 atmosphere at 1700 - 2250°C. However, since the apparatus becomes large-scale, such as requiring high temperature for crystal growth, it is difficult to reduce the cost, and it is also difficult to increase the large diameter to φ4 inches or more. Also, Patent Document 1 describes a method for growing an AlN layer by hydride vapor phase epitaxy (HVPE) method using a silicon substrate or an AlN substrate as a support substrate.

[0004] However, in the method of Patent Document 1, since silicon or the like is used for the support substrate, it is difficult to reduce the dislocation density of the AlN layer due to the differences in the coefficient of thermal expansion and lattice constant. Therefore, it is conceivable to use a sublimation method AlN substrate with good crystallinity as the support substrate. However, while the dislocation density can be reduced, the support substrate itself has a small diameter and is expensive, so it has been difficult to increase the diameter and reduce the cost of the substrate.

[0005] On the other hand, a method for manufacturing a GaN substrate is described in Patent Document 2. In this manufacturing method, AlN ceramics, whose coefficient of thermal expansion and lattice constant are relatively close to those of a GaN single crystal, are used as a core, and this is sealed with a multilayer film such as SiO2 or Si3N4 to form a support substrate. Subsequently, a planarization layer such as SiO2 is formed to fill in the unevenness of the support substrate. Then, after a seed crystal silicon <111> single crystal is transferred as a thin film onto the planarization layer to form a composite substrate, a single crystal such as GaN is epitaxially grown from the seed crystal to form a film.

[0006] However, in this manufacturing method, for example, when a thick epitaxial film of a single crystal of GaN or AlN, Al x Ga 1-x N (where 0 <x <1) is formed, it is difficult to reduce the dislocation density because the lattice constant difference between the seed crystal of silicon <111> and each single crystal of GaN, AlN, Al x Ga 1-x N (where 0 <x <1) is large. In addition, due to the difference in mutual affinity and coefficient of thermal expansion between the AlN ceramics and the sealing layer, between the multilayer films, and between the multilayer film and the planarization layer, there is a problem that cracks, warping, etc. are likely to occur in the manufactured group III nitride single crystal substrate. Furthermore, the manufactured group III nitride single crystal substrate is usually subjected to a thinning process to make it thinner by back grinding after device fabrication. At this time, unlike a semiconductor such as Si, since the support substrate containing the hard and easily cracked AlN ceramics core is cut, it takes a long time for processing, and it is also likely to cause cracks, resulting in a decrease in device yield and deterioration of characteristics, causing resource loss, which is a major drawback in the manufacture of group III nitride single crystal substrates. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Patent No. 4565042 [Patent Document 2] Patent No. 6626607 [Non-patent literature]

[0008] [Non-Patent Document 1] LEDs Magazine Japan; December 2016, p30-31 [Non-patent document 2] SEI Technical Review; No. 177, pp. 88-91 [Non-patent document 3] Fujikura Technical Report; No. 119, 2010, Vol. 2, p33-38 Summary of the Invention [Problem to be solved by the invention]

[0009] The present invention has been made in view of the above circumstances, and has as its object to provide a method for manufacturing a Group III nitride single crystal substrate that can shorten the time required for manufacturing a device and can suppress cracking and deterioration of characteristics during device manufacturing. [Means for solving the problem]

[0010] The method for producing a Group III nitride single crystal substrate of the present invention includes the following steps: a support substrate preparation step of preparing a support substrate containing nitride ceramics; a planarization layer formation step of providing a planarization layer on the upper surface of the support substrate; a seed crystal layer formation step of providing a seed crystal layer on the upper surface of the planarization layer; an epitaxial film formation step of epitaxially growing a target Group III nitride single crystal on the upper surface of the seed crystal layer to form a composite substrate; and a separation step of removing at least either the planarization layer or the seed crystal layer to separate a Group III nitride single crystal substrate made of Group III nitride single crystal from the remainder of the composite substrate.

[0011] At least one of the planarizing layer and the seed crystal layer may be removed by melting using high-frequency induction heating.

[0012] At least one of the planarizing layer and the seed crystal layer may be removed by dry etching using an etching gas of a Si-based compound and / or a Group III nitride-based compound.

[0013] A stress adjustment layer forming step may be further performed to provide a stress adjustment layer on the lower surface of the support substrate.

[0014] The stress-harmonizing layer may include silicon.

[0015] The nitride ceramic may be either AlN-based, GaN-based or Si3N4-based.

[0016] The support substrate may have a structure in which a core made of nitride ceramic is wrapped in a sealing layer having a thickness of 0.05 μm to 1.5 μm.

[0017] The sealing layer is Si3N4 or SiO x N y (where x=1, 1≦y≦20) may be included.

[0018] The planarization layer is made of SiO2, Si x N y(where 1≦x≦20, y=1) may be included.

[0019] The thickness of the planarizing layer may be 0.5 μm or more and 3.0 μm or less.

[0020] The seed crystal layer may have a thickness of 0.04 μm or more and 1.50 μm or less.

[0021] The seed crystal layer is Si <111> It may be a single crystal.

[0022] Si <111> The single crystal may have a resistivity of 100 Ω·cm or more at 20°C.

[0023] The seed crystal layer may be a Group III nitride single crystal. [Effects of the Invention]

[0024] According to the method for manufacturing a Group III nitride single crystal substrate of the present invention, it is possible to shorten the time required for manufacturing a device, and also to suppress cracks and deterioration of characteristics during manufacturing. [Brief explanation of the drawings]

[0025] [Figure 1] 1 is a diagram showing a flow of a method for manufacturing a Group III nitride single crystal substrate according to the present invention. [Figure 2] 1A and 1B are diagrams illustrating a method for forming a seed crystal substrate by epitaxially growing a film on a sublimation single crystal substrate. DETAILED DESCRIPTION OF THE INVENTION

[0026] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following description and drawings, the same components are denoted by the same reference numerals, and the description of components that have already been described will be omitted or will be limited to the extent necessary.

[0027] FIG. 1 is a diagram showing the flow of a method for manufacturing a group III nitride single crystal substrate 100 according to the present invention.

[0028] First, a support substrate 10 containing nitride ceramic is prepared (support substrate preparation step S1). The support substrate 10 has a core 11 and a sealing layer 12 formed around the core 11.

[0029] The material of the core 11 is preferably an AlN-based, GaN-based, or Si3N4-based nitride ceramic, which has a thermal expansion coefficient as close as possible to that of the group III nitride single crystal substrate 100 to be manufactured and has high thermal conductivity.

[0030] The sealing layer 12 is formed to encase the core 11 in order to seal impurities such as metals and carbon that diffuse from the ceramic of the core 11 .

[0031] The sealing layer 12 is made of silicon nitride (Si3N4) and silicon oxynitride (SiO x N y ) or both of SiO x N y When using the above, it is preferable that x=1 and 1≦y≦20 in view of the balance between the affinity with the core 11 and the ability to prevent impurities.

[0032] The thickness of sealing layer 12 is preferably 0.05 μm or more and 1.5 μm or less. This is because if the thickness is less than 0.05 μm, the ability to prevent impurities is insufficient, and if the thickness is more than 1.5 μm, the difference in thermal expansion coefficient between the nitride ceramic and the sealing layer becomes large, making them more susceptible to peeling.

[0033] The sealing layer 12 may be formed by, for example, forming a film by the LPCVD method.

[0034] Subsequently, a planarization layer 20 is formed on the upper surface of the support substrate 10 (planarization layer forming step S2), thereby planarizing the irregularities of the support substrate 10.

[0035] The planarization layer 20 is made of silicon dioxide (SiO2) and silicon oxynitride (Si x N y) on the upper surface of the support substrate 10, and then smoothing the surface to a level of precision that enables thin-film transfer of the seed crystal layer 32. Smoothing may be performed by, for example, CMP polishing, etching, or the like.

[0036] The planarization layer 20 is Si x N y When using the above, it is preferable that 1≦x≦20 and y=1 in view of affinity with the sealing layer 12, film formation on uneven surfaces, and ease of polishing and etching.

[0037] The planarization layer 20 may be formed by, for example, plasma CVD, LPCVD, or low-pressure MOCVD.

[0038] The thickness of the planarization layer 20 after polishing and etching is preferably 0.5 μm or more and 3.0 μm or less. This is because if the thickness is less than 0.5 μm, the unevenness of the support substrate 10 cannot be filled and voids will form. If the thickness exceeds 3.0 μm, the thickness of the planarization layer 20 will be too thick and the thickness of the support substrate 10 will be too thick. x N y This is because the thermal conductivity is reduced due to the above-mentioned reasons, and the device characteristics are deteriorated.

[0039] In the present invention, if necessary, a stress adjustment layer 21 may be formed on the surface of the support substrate 10 opposite to the surface on which the planarization layer 20 is formed (stress adjustment layer formation step S3). This stress adjustment layer 21 mainly corrects warpage of the epitaxial growth substrate 50 caused by forming the planarization layer 20. It can also function as a crack prevention layer and an electrostatic chuck. For the stress adjustment layer 21, a film material and thickness are selected that have a thermal expansion coefficient that enables warpage of the epitaxial growth substrate 50 to be corrected. The stress adjustment layer 21 is not limited to a specific film material, but preferably contains, for example, elemental silicon. The stress adjustment layer 21 may be formed simultaneously with the planarization layer 20.

[0040] Next, a seed crystal layer 32 is formed on the upper surface of the planarizing layer 20. Prior to this formation, a material for the seed crystal substrate 30 from which the seed crystal layer 32 is cut is selected (seed crystal substrate preparation step S4), and then ions are implanted into one surface (ion implantation surface) of the seed crystal substrate 30 to form a separation position (embrittlement layer) 31 in the seed crystal substrate 30 (ion implantation step S5). The ions implanted at this time are, for example, H + , H2 + , Ar + , He + is preferred.

[0041] The thickness of the seed crystal layer 32 is preferably 0.04 μm or more and 1.50 μm or less. If the thickness of the seed crystal layer 32 is less than 0.04 μm, it is too thin to be used as a seed for epitaxial film growth, and its film thickness and surface condition vary greatly, making it difficult to achieve uniform epitaxial film growth over the entire surface. On the other hand, if the thickness of the seed crystal layer 32 exceeds 1.50 μm, the ion implantation depth must be extremely deep, which requires a large ion implanter, resulting in safety and economic problems.

[0042] When ions are implanted into the seed crystal substrate 30, a separation position 31 is formed in the seed crystal substrate 30 and a damaged layer is generated, resulting in deterioration of crystallinity or loss of crystallinity (amorphization). Therefore, after separating the seed crystal layer 32 from the seed crystal substrate 30, a process such as polishing and / or etching is usually required to remove the damaged layer. For this reason, the ion implantation depth needs to be determined taking into consideration the desired thickness of the seed crystal layer 32 and the thickness to remove the damaged layer.

[0043] The material of the seed crystal substrate 30 is Si <111> Suitable seed crystals are single crystals, SiC single crystals, sapphire single crystals, or Group III nitride single crystals such as aluminum nitride, aluminum gallium nitride, or GaN. This is because, when obtaining a target Group III nitride single crystal by epitaxial growth, a good crystal cannot be obtained unless the seed crystal has the same or similar crystal system as the target Group III nitride single crystal and has a lattice constant and thermal expansion coefficient as close as possible to that of the target Group III nitride single crystal.

[0044] From the viewpoint of cost reduction, large-diameter Si <111> It is preferable to select a single crystal, SiC single crystal, or sapphire single crystal. Among them, Si is the most popular and has the highest mass production and large diameter, and is high quality and relatively inexpensive. <111> Single crystal is more preferable. In addition, Si with a resistivity of 100 Ω cm or more at 20°C is preferable. <111> Single crystals are most preferred. This is because the seed crystal Si <111> This is because if the resistivity of the single crystal at 20°C is 100 Ω·cm or more, the manufactured group III nitride single crystal substrate 100 will be hardly affected by the diffusion of dopant in Si, and the high frequency power consumption of high frequency devices made from this substrate will be small. <111> If the resistivity of the single crystal at 20°C is less than 100 Ω·cm, diffusion of the dopant in the Si will be observed in the produced Group III nitride single crystal substrate 100, and high frequency devices made from this substrate will consume large amounts of power at high frequencies.

[0045] On the other hand, when selecting aluminum nitride single crystal, gallium nitride single crystal, or the like, which are still difficult to obtain in large diameters, a substrate obtained by epitaxially growing aluminum nitride single crystal, gallium nitride single crystal, or the like by MOCVD or HVPE on a large-diameter sapphire substrate as a base may be used as seed crystal substrate 30. Furthermore, when characteristics are extremely important, a substrate obtained by epitaxially growing aluminum nitride single crystal, gallium nitride single crystal, or the like by MOCVD, HVPE, or THVPE on a small-diameter sublimation-grown single crystal substrate or sublimation-grown AlN single crystal substrate as a base may be used as seed crystal substrate 30.

[0046] In this case, ions may be implanted from the surface of the epitaxial layer formed by epitaxial film formation to form a separation position within the epitaxial layer.

[0047] 2, an AlN substrate 34 fabricated by sublimation is used as a base, and an epitaxial layer 35 is formed thereon by epitaxial deposition of AlN using MOCVD, HVPE, or THVPE, thereby forming a seed crystal substrate 30 (step S11). Then, ions are implanted into the surface (ion-implanted surface) of the epitaxial layer 35, thereby forming separation positions 31 of the seed crystal layer 32 in the epitaxial layer 35 (step S12).

[0048] According to this method, even if an expensive AlN substrate 34 produced by sublimation deposition is used as a base, only a portion of the epitaxial layer 35 is consumed as the seed crystal layer 32, and therefore, a high-quality seed crystal layer 32 can be formed economically and relatively quickly. After the formation of the seed crystal layer 32, if the epitaxial layer 35 has a sufficient thickness, the seed crystal substrate 30 can be reused repeatedly. If the epitaxial layer 35 becomes thin due to repeated use of the seed crystal substrate 30, the thickness can be restored by performing epitaxial film formation again, which is effective in reducing manufacturing costs.

[0049] After preparing the seed crystal substrate 30 into which ions are implanted, the ion-implanted surface of the seed crystal substrate 30 is bonded to the planarizing layer 20 formed on the support substrate 10 to form a bonded body 40 (bonding step S6).

[0050] Subsequently, the bonded body 40 is separated at the separation position 31 (seed crystal layer formation step S7). This separates the bonded body 40 into an epitaxial growth substrate 50 in which the seed crystal layer 32 is thin-film-transferred onto the planarizing layer 20 formed on the support substrate 10, and a remainder 33 in which the seed crystal layer 32 has been removed from the seed crystal substrate 30. The remainder 33 of the seed crystal substrate 30 can be reused as a further seed crystal substrate.

[0051] Alternatively, the ion-implanted surface of the seed crystal substrate 30 may be temporarily bonded to another temporary support substrate such as a silicon wafer, and then separated at the peeling position 31 to leave the seed crystal layer 32 bonded to the temporary support substrate. The seed crystal layer 32 on this temporary support substrate may then be bonded to the planarizing layer 20, and the temporary support substrate may then be separated from the seed crystal layer 32 by any method, thereby transferring the seed crystal layer 32 onto the planarizing layer 20. In this manner, an epitaxial growth substrate 50 can be formed in which the seed crystal layer 32 bonded to the planarizing layer 20 is upside down.

[0052] Subsequently, the desired Group III nitride single crystal is epitaxially grown on the upper surface of the seed crystal layer 32 of the epitaxial growth substrate 50 until the film reaches a target thickness (epitaxial film formation step S8), thereby forming the desired Group III nitride single crystal composite substrate 70.

[0053] Then, at least one of the planarizing layer 20 and the seed crystal layer 32 of the composite substrate 70 is removed by dissolving using high-frequency induction heating in an inert gas substantially under atmospheric pressure, or by dry etching using an etching gas under reduced pressure heating, thereby separating the target Group III nitride single crystal layer 60 formed on the epitaxial growth substrate 50 as the Group III nitride single crystal substrate 100 from the composite substrate 70 (separation step S9). Specifically, the separation is performed, for example, as follows.

[0054] When melting using high-frequency induction heating, the composite substrate 70 is first placed in a rotating and vertically movable storage device equipped with an induction coil and a jig capable of precise gradient heating. Next, an inert gas atmosphere, such as Ar, is created inside the storage device at approximately 1 atmosphere pressure. Then, a 1-3 MHz high-frequency oscillator is applied to the induction coil and the jig to heat the circumferential portion of the planarization layer 20 and / or seed crystal layer 32 to a maximum temperature of 1300-1600°C. The induction coil and the jig are adjusted to minimize heating of the remaining portions while providing thermal compensation to prevent the layer to be removed from cooling due to thermal conduction. Furthermore, it is preferable to apply a vertical tensile stress to the composite substrate 70 during heating. The reason for limiting the maximum temperature to the range of 1300-1600°C is that the layer to be removed will not melt below 1300°C, while temperatures above 1600°C significantly deteriorate the equipment components.

[0055] When dry etching is performed using an etching gas, the layer to be removed is etched using a gas that selectively etches the layer to be dissolved while heating to 300 to 1400°C. If the heating temperature is less than 300°C, etching from the outer periphery toward the inside at the junction between the epitaxial growth substrate 50 and the Group III nitride single crystal layer 60 does not progress sufficiently. On the other hand, if the heating temperature exceeds 1400°C, the Group III nitride single crystal layer 60 may be etched to a large extent, or device components may be easily damaged.

[0056] To perform etching more efficiently, the dry etching rate may be increased by applying high frequency waves of several hundred kHz to several tens of MHz while introducing an etching gas into the layer to be removed at, for example, 950°C under reduced pressure (several hundred mPa to several tens of Pa).The dry etching apparatus used in this case may be, for example, a conventional reactive ion etching apparatus (RIE) or high density plasma etching apparatus (ECR, ICP) modified to enable precise gradient heating.

[0057] The type of etching gas to be introduced may be selected depending on the layer to be removed. For example, when the seed crystal layer 32 is a group III nitride-based etching gas, if the etching gases for the Si-based compound and the group III nitride-based etching gases do not react with each other, both the planarizing layer 20 and the seed crystal layer 32 can be removed by mixing the etching gases for the Si-based compound and the group III nitride-based etching gases. On the other hand, if the etching gases react violently with each other when mixed, it is sufficient to use either the etching gas for the Si-based compound or the etching gas for the group III nitride-based etching gas. However, it is preferable to select an etching gas that can remove the planarizing layer 20, which is thicker than the seed crystal layer 32 and has a high separation effect. Specifically, when the constituent material of the planarizing layer 20 is silicon dioxide (SiO2) or silicon oxynitride (SiO x N y ) and therefore, etching gases of Si-based compounds are suitable.

[0058] Examples of etching gases for Si-based compounds include perfluorocarbons (CF4, C2F6, C3F8), hydrofluorocarbons (CHF3, CH2F2, CH3F, C2H2F4), etc. Examples of etching gases for Group III nitrides include inorganic halogen gases, hydrocarbon gases, etc.

[0059] If necessary, gases such as H2, O2, He, and Ar may be added to these gases. The etching rate can be adjusted by changing the ratio of the added gases. When the seed crystal layer 32 is made of Si, for example, the etching rate can be increased by adding 10 to 20% O2 to CF4. Also, when the planarization layer 20 is made of SiO2 and the seed crystal layer 32 is made of Si, the etching rate can be increased by adding 10 to 20% O2 to CF4. <111> In the case of separation by removing SiO2, for example, 50% H2 is added to CF4, and Si <111> When separating by removing CF4, etching gas containing only CF4 may be used.

[0060] When separation is not possible by either dissolution by high-frequency induction heating or dry etching using an etching gas, separation can be more reliably achieved by additionally performing the other method.

[0061] When the group III nitride single crystal substrate 100 is separated, if a part of the seed crystal layer 32 remains attached, it is advisable to remove it by a method appropriate for the constituents of the seed crystal layer 32 .

[0062] Furthermore, the remainder 101 obtained by separating the group III nitride single crystal substrate 100 from the composite substrate 70 can be recycled as appropriate, thereby reducing manufacturing costs.

[0063] According to the method for producing a Group III nitride single crystal substrate of the present invention as explained above, a Group III nitride single crystal substrate can be obtained from which the hard and easily cracked support substrate portion has been removed by dissolution, etching, etc., thereby avoiding the waste of production time and the reduced yield and performance degradation due to cracking of the device that would otherwise be caused by back-grinding the support substrate portion after device fabrication. Furthermore, since the remaining portion removed from the composite substrate can be reused, production costs can be reduced.

[0064] Furthermore, by optimizing the thickness of each layer constituting the composite substrate and the resistivity of the seed crystal layer, it is possible to prevent cracks and warpage in the Group III nitride single crystal substrate separated from the composite substrate, and also to prevent deterioration in the characteristics of devices using the Group III nitride single crystal substrate.

[0065] Examples and comparative examples of the method for producing a Group III nitride single crystal substrate of the present invention are given below.

[0066] Example 1 [Preparation of Support Substrate] A green sheet was created by mixing 100 parts by weight of AlN powder and 5 parts by weight of YO as a sintering aid with an organic binder and solvent. The green sheet was then degreased and sintered at 1900°C under N2, then double-sided polished to produce a polycrystalline AlN substrate with an 8-inch diameter and a thickness of 725 μm. This polycrystalline AlN substrate served as the core of the support substrate. The entire core was then completely covered with a 0.4 μm-thick silicon oxynitride layer formed using the LPCVD method, and then completely covered with a 1.0 μm-thick silicon nitride (Si3N4) layer formed using an LPCVD apparatus. In this way, a support substrate was formed in which the core was covered with a 1.4 μm-thick sealing layer.

[0067] [Lamination of planarizing layer] A 6 μm thick SiO2 layer was deposited as a planarization layer on the sealing layer on one side (top surface) of the support substrate using the plasma CVD method (ICP-CVD apparatus). After that, this SiO2 was baked at 1000°C, and then polished and planarized to a thickness of 3 μm by CMP polishing, resulting in a surface roughness Ra of 0.14 nm.

[0068] [Seed crystal preparation] Commercially available 8-inch diameter silicon wafers pulled by the CZ method <111> The substrate (resistivity at 20°C is 150 Ω·cm) was irradiated with 100 keV at a dose of 6×10 to a depth of 0.7 μm (at the peeling position). 17 / cm 2 The hydrogen ion implantation was carried out. <111> The ion-implanted surface of the substrate is bonded to a planarization layer formed on a support substrate, and then a thin film is transferred to the support substrate. <111> The seed crystal layer was formed. Damage to the seed crystal layer during ion implantation and transfer was completely removed by light polishing using CMP and then etching. The final thickness of the seed crystal layer was 0.04 μm. After thin film transfer, the Si <111> The remaining part of the substrate (i.e., the part that was separated without being transferred to the support substrate) can be used as a large number of seed crystals by repeatedly performing ion implantation, which is extremely economical. As a result, a 3 μm thick planarization layer and a 0.04 μm thick Si <111> An 8-inch diameter epitaxial growth substrate with a seed crystal layer was obtained.

[0069] [GaN epitaxial growth] Next, the epitaxial growth substrate prepared as described above was placed in a GaN epitaxial growth furnace (HVPE apparatus) and subjected to a high-temperature nitridation treatment at a substrate temperature of 900°C for 30 minutes. Next, a GaN buffer layer was formed to a thickness of 20 nm at a substrate temperature of 400°C, and then GaN epitaxial film formation was performed to a thickness of 12 mm at a substrate temperature of 1050°C using GaCl3 and NH3 as process gases, yielding a GaN composite substrate.

[0070] [Separation of GaN epitaxially grown portion from composite substrate] The GaN composite substrate prepared as described above was placed in a storage device that was capable of rotation and vertical movement and was equipped with an induction coil and jig capable of precise gradient heating. The device was then filled with an Ar gas atmosphere at approximately 1 atmosphere pressure, and a 3 MHz high frequency was applied to the induction coil and jig to locally heat the circumferential portion of the seed crystal layer to 1500°C. During this process, thermal compensation was performed to prevent the seed crystal layer from cooling due to thermal conduction, while the induction coil and jig were adjusted to minimize heating of other portions. Furthermore, slight tensile forces were continuously applied to the top and bottom of the GaN composite substrate during heating. As a result, the GaN composite substrate was heated to a temperature between the GaN epitaxially grown portion and the Si <111> The seed crystal layer was separated from the remaining support substrate portion.

[0071] [Evaluation of GaN epitaxial film formation] To evaluate the crystallinity of the GaN epitaxial film, the 12 mm thick GaN epitaxial film was cylindrically ground, then cut to a thickness of 900 μm with a wire saw, and then roughly polished and CMP polished to obtain five GaN single crystal substrates with final dimensions of 8 inches in diameter and 725 μm in thickness. The support substrate portion remaining after the GaN epitaxial film was separated was lightly CMP polished on the surface on the separation side to obtain Si <111> After removing the remaining part of the seed crystal layer, Si <111> The thin film was transferred onto the substrate and recycled.

[0072] The five GaN single crystal substrates for evaluation, each 8 inches in diameter and 725 μm thick, obtained by the above process had X-ray rocking curves with FWHM (Full Width at Half Maximum) of 291 to 350 arcsec, which varied slightly between the seed crystal side and the top side, but were GaN single crystal substrates with extremely excellent crystallinity. Furthermore, etch pits were generated by an alkaline solution (KOH + NaOH) etching method, and EPD (Etch Pit Density) was measured, revealing a density of 2 × 10 5 / cm 2 The dislocation density was extremely low. Furthermore, 600V power devices and 28GHz RF devices were fabricated on these GaN single crystal substrates, and each device substrate was thinned to 200μm by backgrinding the backside. After cutting these substrates into individual devices, the yields of the 600V power devices and the 28GHz RF devices were extremely high, at approximately 98% and 93%, respectively. Furthermore, the loss of the RF devices at 28GHz was low, at approximately 1.5dB.

[0073] <Comparative Example> Si used to form the seed crystal layer <111> GaN epitaxial growth was performed under the same conditions as in Example 1, except that the resistivity of the substrate at 20°C was 85 Ω·cm, to a thickness of 35 μm, resulting in a GaN composite substrate approximately 760 μm thick. The resulting GaN composite substrate had an X-ray rocking curve FWHM of 780 arcsec at the center, indicating poorer crystallinity than in Example 1. The EPD was 8×10 5 / cm 2The dislocation density was higher than that of Example 1. Furthermore, as in Example 1, 600V power devices and 28GHz RF devices were fabricated on these GaN composite substrates. Each device substrate was thinned by backgrinding the backside of a support substrate having an AlN ceramic core. Because the AlN ceramic core was hard, the thinning process took 5 to 6 times longer than in Example 1, and cracks occurred in various places in the device substrate. Furthermore, when attempting to cut the device substrate into individual devices, many portions could not be cut due to the cracks in the device substrate. Therefore, the yields of the 600V power devices and the 28GHz RF devices were extremely low, at approximately 24% and approximately 31%, respectively. The loss of the RF devices at 28GHz was also very high, at approximately 5.3dB.

[0074] <Example 2> [Preparation of Support Substrate] A commercially available GaN polycrystalline ceramic substrate with a diameter of 2 inches and a metal impurity level of 4N was prepared as the core of the support substrate. The entire core was covered with a 0.06 μm thick silicon oxynitride (Si ) layer formed by LPCVD using SiH and N O gases. x N y The support substrate was formed by wrapping the substrate with a layer of SiO 2 (approximate average composition: x=3, y=15).

[0075] [Lamination of Planarizing Layer and Stress Adjustment Layer] A 1.3 μm thick silicon oxynitride (Si) layer was deposited as a planarization layer on the sealing layer on one side (top surface) of the support substrate by the LPCVD method. x N y A layer with an approximate average composition of x = 17, y = 2) was formed. It was then polished to a thickness of 0.5 μm by CMP. The formation of the planarizing layer caused the entire substrate to warp by approximately 50 μm, so in order to correct the warp, a stress adjustment layer with a thickness of 0.5 μm was formed on the underside of the support substrate by LPCVD so that it had the same composition as the planarizing layer. Furthermore, to accommodate adhesion and detachment of the electrostatic chuck, 0.05 μm of polycrystalline Si was added by LPCVD. As a result, the warp was almost completely eliminated and adhesion and detachment of the electrostatic chuck became possible.

[0076] [Seed crystal preparation] A 2-inch diameter, commercially available AlN single crystal (280 μm thick) grown by the modified Lely process (sublimation method) was used as the base substrate. AlN epitaxial film growth was performed on it at 1050 °C using MOCVD (reactant gas: trimethylaluminum (TMAI) + NH3, carrier gas: N2, H2) to obtain a 550 μm epitaxial layer. Ion implantation was performed on the epitaxial layer to a depth of 1.6 μm. The ion-implanted surface was then bonded to a planarized layer formed on a support substrate, followed by thin-film transfer, forming a 1.6 μm thick AlN seed crystal layer on the support substrate. Damage to the seed crystal layer during ion implantation and transfer was completely removed by light polishing using CMP followed by etching. The final thickness of the seed crystal layer after removing the damaged portions was 1.4 μm. As a result, a 2-inch diameter epitaxial growth substrate was obtained, which had a support substrate with a GaN ceramic core sealed with a sealing layer, a 0.5 μm thick planarizing layer, a 1.4 μm thick AlN seed crystal layer, and a 0.55 μm thick stress adjustment layer.

[0077] [AlN epitaxial film formation] Next, the epitaxial growth substrate prepared as described above was placed in an AlN epitaxial growth furnace (HVPE apparatus) and subjected to a high-temperature nitriding treatment at a substrate temperature of 900°C for 30 minutes. Next, an AlN epitaxial film was grown to a thickness of 10 mm at a substrate temperature of 1300°C using AlCl3 and NH3 as process gases, yielding an AlN composite substrate.

[0078] [Separation of the AlN epitaxial film from the composite substrate] The AlN composite substrate prepared as described above was placed in a reactive ion etching (RIE) device equipped with an induction coil and a jig capable of precise gradient heating, and capable of rotation and vertical movement. The temperature inside the device was then raised to 950°C, and a planarization layer (Si x N yThe planarization layer was etched while introducing an etching gas consisting of CF4 with 10% H2 while maintaining a reduced pressure of 15 Pa. This allowed the AlN composite substrate to be separated into the AlN epitaxial film portion and the support substrate portion where a small amount of the AlN seed crystal layer remained.

[0079] [Evaluation of AlN epitaxial film formation] To evaluate the crystallinity of the AlN epitaxially deposited portion, the 10 mm thick AlN epitaxially deposited portion was cylindrically ground, then cut with a wire saw to a thickness of 330 μm, followed by rough polishing and CMP polishing to cut out five AlN single crystal substrates with final dimensions of 2 inches in diameter and 280 μm in thickness. The support substrate portion remaining after the AlN epitaxially deposited portion was lightly CMP polished on the separated side surface to remove the remaining AlN seed crystal layer, after which an AlN thin film was transferred again and it was set aside for recycling.

[0080] The five AlN single crystal evaluation substrates obtained by the above process, each 2-inch diameter and 280 μm thick, had an X-ray rocking curve FWHM (Full Width at Half Maximum) of 189 to 280 arcsec, which varied slightly between the seed crystal side and the top side, but were AlN single crystal substrates with extremely excellent crystallinity. Furthermore, etch pits were generated by an alkaline solution (KOH + NaOH) etching method, and EPD (Etch Pit Density) was measured, revealing a density of 0.1 × 10 5 / cm 2 The dislocation density was extremely low. Furthermore, these AlN single crystal substrates were fabricated into LED devices and thinned to 150 μm by back-grinding the back surface. The yield after cutting these substrates into individual devices was extremely high, at approximately 99%.

[0081] The above-described embodiments and examples are merely illustrative, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits similar effects is included within the technical scope of the present invention. [Explanation of symbols]

[0082] 10 Support substrate 11 cores 12 Sealing layer 20 Planarization layer 21 Stress adjustment layer 30 Seed crystal substrate 31 Peeling position 32 Seed crystal layer 33, 101 remainder 34 AlN substrate 35 Epitaxial layer 40 zygote 50 Epitaxial growth substrate 60 Planarization layer 70 Composite Board 100 Group III nitride single crystal substrate

Claims

1. a support substrate preparation step of preparing a support substrate including nitride ceramics; a planarization layer forming step of providing a planarization layer on an upper surface of the support substrate; a seed crystal layer forming step of providing a seed crystal layer on an upper surface of the planarization layer; an epitaxial film formation step of epitaxially growing a target Group III nitride single crystal on the upper surface of the seed crystal layer to form a composite substrate; a separation step of removing at least one of the planarizing layer and the seed crystal layer by melting using high-frequency induction heating to separate a Group III nitride single crystal substrate made of the Group III nitride single crystal from the remainder of the composite substrate; A method for producing a Group III nitride single crystal substrate by carrying out the steps of:

2. The method for producing a Group III nitride single crystal substrate according to claim 1 , further comprising the step of providing a stress adjustment layer on the lower surface of the support substrate.

3. 3. The method for producing a Group III nitride single crystal substrate according to claim 2, wherein the stress adjustment layer contains silicon.

4. The nitride ceramic is AlN-based, GaN-based or Si-based. ３ N ４ 2. The method for producing a Group III nitride single crystal substrate according to claim 1, wherein the substrate is one of the group III nitride single crystal substrates of the type described above.

5. 2. The method for producing a Group III nitride single crystal substrate according to claim 1, wherein the support substrate has a structure in which a core made of the nitride ceramic is enclosed in a sealing layer having a thickness of 0.05 μm to 1.5 μm.

6. The sealing layer is made of Si ３ N ４ or SiO ｘ N ｙ 6. The method for producing a Group III nitride single crystal substrate according to claim 5, wherein x=1, 1≦y≦20.

7. The planarization layer is made of SiO ２ , Si ｘ N ｙ 2. The method for producing a Group III nitride single crystal substrate according to claim 1, wherein the method comprises at least one of the following: (where 1≦x≦20, y=1).

8. 2. The method for producing a Group III nitride single crystal substrate according to claim 1, wherein the thickness of the planarizing layer is 0.5 μm or more and 3.0 μm or less.

9. 2. The method for producing a Group III nitride single crystal substrate according to claim 1, wherein the seed crystal layer has a thickness of 0.04 μm or more and 1.50 μm or less.

10. 2. The method for producing a Group III nitride single crystal substrate according to claim 1, wherein the seed crystal layer is a Si<111> single crystal.

11. 11. The method for producing a Group III nitride single crystal substrate according to claim 10, wherein the Si<111> single crystal has a resistivity at 20° C. of 100 Ω·cm or more.

12. 2. The method for producing a Group III nitride single crystal substrate according to claim 1, wherein the seed crystal layer is a Group III nitride single crystal.

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