Metal deposition and etching in high aspect ratio features

Abstract

An exemplary etching method may include flowing a fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The secondary gas may be or may include oxygen or nitrogen. A flow ratio of the fluorine-containing precursor to the secondary gas may be about 1:1 or greater. The method may include contacting a substrate with the fluorine-containing precursor and the secondary gas. The substrate may include exposed metal. The substrate may define high aspect ratio structures. The method may include etching the exposed metal in the high aspect ratio structures.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of and priority to U.S. Non-Provisional Application No. 17 / 689,029, entitled "METAL DEPOSITION AND ETCH IN HIGH ASPECT-RATIO FEATURES," filed March 8, 2022, the entire contents of which are incorporated herein by reference for all purposes.

[0002] The present technology relates to semiconductor processes and semiconductor devices, and more particularly to deposition and etching within high aspect ratio features to improve loading across the features. [Background technology]

[0003] Integrated circuits are made possible by processes that create intricately patterned layers of material on a substrate surface. Creating patterned materials on a substrate requires a controlled method for removing exposed material. Chemical etching is used for a variety of purposes, including transferring patterns in photoresist into underlying layers, thinning layers, or thinning the lateral dimensions of features already present on a surface. It is often desirable to have an etching process that etches one material more quickly than another, for example, to facilitate the pattern transfer process. Such an etching process is said to be selective to the first material. As a result of the diversity of materials, circuits, and processes, etching processes have been developed that are selective to a variety of materials.

[0004] Etching processes can be referred to as wet or dry, depending on the materials used in the process. Wet HF etching preferentially removes silicon oxide over other dielectrics and materials. However, wet processes can have difficulty penetrating some constrained trenches and sometimes deform the remaining material. Dry etching, performed in a localized plasma formed within the substrate processing region, can penetrate more constrained trenches and causes less deformation of the fragile remaining structures. However, localized plasma can damage the substrate due to arcing when the localized plasma discharges.

[0005] Therefore, there is a need for improved systems and methods that can be used to produce high quality devices and structures. The present technology addresses these and other needs. Summary of the Invention

[0006] An exemplary etching method may include depositing a metal-containing material or a carbon-containing material along the surface of exposed metal in high-aspect ratio structures defined on a substrate. The method may include flowing a fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The secondary gas may be or may include oxygen or nitrogen. The flow ratio of the fluorine-containing precursor to the secondary gas may be about 1:1 or greater. The method may include contacting a substrate with the fluorine-containing precursor and the secondary gas. The method may include etching the exposed metal in the high-aspect ratio structures.

[0007] In some embodiments, the method may include forming a plasma of the fluorine-containing precursor and the secondary gas. The method may include repeating the method at least one cycle. The metal-containing or carbon-containing material may be thermally deposited. The metal-containing or carbon-containing material may be deposited along the deeper surface within the high aspect ratio structure. Thickness along the surface near the opening to the high aspect ratio structure. The thickness twist To grow biggerThe high aspect ratio structure may include a memory hole in a 3D NAND structure. The exposed metal may extend laterally into a recess formed perpendicular to the memory hole. The method may include purging a processing region of the semiconductor processing chamber after etching the exposed metal. The method may include forming a plasma of an oxygen-containing precursor.

[0008] The method may include contacting the exposed metal with plasma effluents of an oxygen-containing precursor to create a metal oxide. The fluorine-containing precursor may be a first fluorine-containing precursor. The method may include flowing a second fluorine-containing precursor into the processing region. The method may include contacting the metal oxide with the second fluorine-containing precursor. The processing region may be maintained plasma-free while contacting the metal oxide with the second fluorine-containing precursor. Both deposition and etching may be performed in a semiconductor processing chamber. The processing region may be maintained plasma-free during deposition. The method may include, after etching the exposed metal, flowing a chlorine-containing precursor into the processing region. The chlorine-containing precursor may remove residual fluorine. After etching the exposed metal in the high aspect ratio structure, a top-to-bottom loading value may be about 1.5 or less.

[0009] Some embodiments of the present technology may include an etching method. The method may include depositing a metal-containing material or a carbon-containing material along a surface of exposed metal in a high-aspect-ratio structure defined on a substrate. The method may include flowing a first fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The method may include contacting the substrate with the first fluorine-containing precursor and the secondary gas. The substrate may include exposed metal. The substrate may define a memory hole in a 3D NAND structure, and the exposed metal may extend laterally into a recess formed perpendicular to the memory hole. The method may include etching the exposed metal in the memory hole. The method may include forming a plasma of an oxygen-containing precursor. The method may include contacting the exposed metal with plasma effluents of the oxygen-containing precursor to create a metal oxide. The method may include flowing a second fluorine-containing precursor into a processing region of the semiconductor processing chamber. The method may include removing the metal oxide.

[0010] In some embodiments, the secondary gas can be or can include oxygen or nitrogen. The flow ratio of the first fluorine-containing precursor to the secondary gas can be about 1:1 or greater. The method can include forming a plasma of the first fluorine-containing precursor and the secondary gas. The temperature in the semiconductor processing chamber can be maintained between about 200°C and about 500°C. The deposition can form a carbon-containing material or a metal-containing material including tungsten or molybdenum. While flowing the second fluorine-containing precursor into the processing region of the semiconductor processing chamber, the processing region can be maintained plasma-free. The method can include flowing a chlorine-containing precursor into the processing region after etching the exposed metal.

[0011] Some embodiments of the present technology may include an etching method. The method may include depositing a metal-containing material or a carbon-containing material along a surface of exposed metal within a high-aspect-ratio structure defined on a substrate. The method may include flowing a first fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber. The secondary gas may be or may include oxygen or nitrogen. The method may include contacting a substrate with the first fluorine-containing precursor and the secondary gas. The substrate may include exposed metal. The substrate may define a high-aspect-ratio structure. The method may include etching the exposed metal within the high-aspect-ratio structure. The method may include contacting the exposed metal with an oxygen-containing precursor to create a metal oxide. The method may include flowing a second fluorine-containing precursor into the processing region of the semiconductor processing chamber. The method may include removing the metal oxide. The method may be performed at a chamber operating temperature of about 500°C or less.

[0012] Such technology may offer many advantages over conventional systems and techniques. For example, the process may enable more uniform removal of metal from high aspect ratio features and may provide a process that can be performed in a single chamber or in multiple chambers. Furthermore, the process may result in a variety of sidewall profiles during the etching process. These and other embodiments, and many of their advantages and features, are described in more detail in conjunction with the following description and accompanying figures.

[0013] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the drawings. [Brief explanation of the drawings]

[0014] [Figure 1] FIG. 1 illustrates a top view of an embodiment of an exemplary processing system in accordance with some embodiments of the present technique. [Figure 2A] 1 is a schematic cross-sectional view of an exemplary processing chamber in accordance with some embodiments of the present technique; [Figure 2B]FIG. 2B is a detailed view of a portion of the processing chamber shown in FIG. 2A in accordance with some embodiments of the present technique. [Figure 3] FIG. 1 illustrates a bottom view of an exemplary showerhead in accordance with some embodiments of the present technique. [Figure 4] 1A-1C illustrate exemplary operations in a method according to some embodiments of the present technology. [Figure 5A] 1A-1D are cross-sectional views of a substrate during processing in accordance with some embodiments of the present technique. [Figure 5B] 1A-1D are cross-sectional views of a substrate during processing in accordance with some embodiments of the present technique. [Figure 5C] 1A-1D are cross-sectional views of a substrate during processing in accordance with some embodiments of the present technique. [Figure 5D] 1A-1D are cross-sectional views of a substrate during processing in accordance with some embodiments of the present technique. DETAILED DESCRIPTION OF THE INVENTION

[0015] Some of the figures are included as schematic diagrams. It is understood that the figures are for illustrative purposes and should not be considered to scale unless expressly stated to be to scale. Furthermore, as schematic diagrams, the figures are provided to aid in understanding and do not include all aspects or information compared to realistic representations and may include exaggerated material for illustrative purposes.

[0016] In the accompanying figures, similar components and / or features may have the same reference label. Furthermore, various components of the same type may be distinguished by the reference label being followed by a letter that distinguishes between the similar components. When only a first reference label is used in the specification, the description is applicable to any of the similar components having the same first reference label, regardless of the letter.

[0017] In the transition from 2D NAND to 3D NAND, many process operations are changed from vertical to horizontal operations. Furthermore, as the number of cells formed in a 3D NAND structure increases, the aspect ratios of memory holes and other structures increase, sometimes dramatically. During 3D NAND processing, stacks of placeholder layers and dielectric materials may form inter-electrode dielectric or IPD layers. Various operations may be performed on these placeholder layers to position the structures before completely removing the material and replacing it with metal. Metallization may be performed, in which metal is formed along the structures and between the dielectric layers as part of the memory cells. The metal may extend along the sidewalls of the memory holes and into the recessed portions, and a subsequent etch may be performed to separate individual cells within the memory hole structure.

[0018] Many conventional techniques utilize etching processes to create these structures, which may not perform adequately at future process nodes. For example, as the number of cells in a structure increases to hundreds of cells, memory holes may be formed to a depth of several microns. Due to the aggressive etching of wet etchants, the wet etchant may begin etching features near the top of the structure long before the bottom of the structure is accessed by the etchant. Furthermore, wet etching of small form factor structures may result in pattern collapse or distortion due to the surface tension of the etchant. The use of wet etchants may also require subsequent operations to remove residues formed within trenches or holes. Dry etching techniques are also feasible, but may encounter similar loading issues. For example, accessing deep within trenches takes time, so etching may already have occurred near the top of the structure. The ratio of the amount of metal etched at the top of the structure to the amount of metal etched at the bottom of the structure, known as the top-to-bottom loading value, can be approximately 4 or greater in some cases. Thus, the top features may be over-etched before the etch is complete or before the cells are separated near the bottom of the structure.

[0019] The present technology overcomes these problems by implementing a deposition and dry etching process that can allow for control of top-to-bottom loading by incorporating a protective gas into the etchant used. The deposition can utilize more deposition at higher locations in the feature and less deposition at lower locations in the feature, thereby providing a controlled buffer across the material being etched. The protective gas can occupy the entire metal being etched, limiting or reducing etching near the top of the structure while the etchant penetrates into the high aspect ratio structure. This allows for a tunable etching profile to be formed along the structure, providing additional control over the etch that can increase process uniformity regardless of the depth of the structure.

[0020] While the remaining disclosure will routinely identify particular etching processes utilizing the disclosed technology, it will be readily understood that the systems and methods are equally applicable to deposition and cleaning processes that may occur in the described chambers. Thus, the technology should not be considered limited to use with only etching processes or chambers. Furthermore, while an exemplary chamber is described to provide a foundation for the technology, it should be understood that the technology may be applied to virtually any semiconductor processing chamber capable of enabling the described operations.

[0021] FIG. 1 illustrates a top view of one embodiment of a deposition, etch, bake, and cure chamber processing system 100, according to an embodiment. In the figure, a pair of front-opening unified pods 102 supply substrates of various sizes, which are received by a robot arm 104 and placed in a low-pressure holding area 106 before being placed into one of the substrate processing chambers 108a-108f located within tandem sections 109a-109c. A second robot arm 110 may be used to transfer substrate wafers from the holding area 106 to the substrate processing chambers 108a-108f and vice versa. Each substrate processing chamber 108a-108f may be equipped to perform several substrate processing operations, including cyclical layer deposition, atomic layer deposition, chemical vapor deposition, physical vapor deposition, etching, precleaning, degassing, orientation, and other substrate processes, as well as the dry etching processes described herein.

[0022] The substrate processing chambers 108a-108f may include one or more system components for depositing, annealing, curing, and / or etching a dielectric film on a substrate wafer. In one configuration, two pairs of processing chambers, e.g., 108c-108d and 108e-108f, may be used to deposit a dielectric material on a substrate, and a third pair of processing chambers, e.g., 108a-108b, may be used to etch the deposited dielectric. In another configuration, all three pairs of chambers, e.g., 108a-108f, may be configured to etch a dielectric film on a substrate. Any one or more of the described processes may be performed in one or more chambers separate from the illustrated fabrication system in different embodiments. It will be understood that additional configurations of deposition, etching, annealing, and curing chambers for dielectric films are contemplated by system 100.

[0023] 2A shows a cross-sectional view of an exemplary process chamber system 200 having a partitioned plasma generation region within a processing chamber, which may be configured to perform processes described further below. During etching of films including titanium nitride, tantalum nitride, tungsten, silicon, polysilicon, silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, or other materials, process gases may be flowed through a gas inlet assembly 205 into a first plasma region 215. A remote plasma system 201 may optionally be included in the system to process a first gas, which then travels through the gas inlet assembly 205. The inlet assembly 205 may include two or more separate gas supply channels; if a second channel is included, the second channel may bypass the remote plasma system unit 201.

[0024] A cooling plate 203, a faceplate 217, an ion suppressor 223, a showerhead 225, and a substrate support 265 upon which a substrate 255 is disposed are shown, each of which may be included according to an embodiment. The pedestal 265 may have heat exchange channels through which a heat exchange fluid flows to control the temperature of the substrate, and the heat exchange channels may operate to heat and / or cool the substrate or wafer during processing operations. The wafer support platter of the pedestal 265 may comprise aluminum, ceramic, or a combination thereof, and may be resistively heated using embedded resistive heater elements to achieve relatively high temperatures, such as from about 100° C. or below to about 1100° C. or above.

[0025] The face plate 217 may be pyramidal, conical, or of another similar structure with a narrow top flaring to a wider bottom. The face plate 217 may also be flat, as shown, and may include multiple through channels used to distribute process gases. For more uniform delivery to the first plasma region 215, depending on the use of the RPS 201, plasma-generating gases and / or plasma-excited species may pass through multiple holes in the face plate 217, as shown in FIG. 2B.

[0026] An exemplary configuration can include having a gas inlet assembly 205 opening into a gas feed region 258 separated from the first plasma region 215 by the faceplate 217 such that gases / species flow into the first plasma region 215 through holes in the faceplate 217. Structural and operational features can be selected to prevent significant backflow of plasma from the first plasma region 215 into the feed region 258, the gas inlet assembly 205, and the fluid delivery system 210. The faceplate 217, i.e., the conductive top of the chamber, and the showerhead 225 are shown with an insulating ring 220 positioned between them, which allows an AC potential to be applied to the faceplate 217 relative to the showerhead 225 and / or ion suppressor 223. The insulating ring 220 can be positioned between the faceplate 217 and the showerhead 225 and / or ion suppressor 223, thereby allowing a capacitively coupled plasma to form in the first plasma region. Additionally, baffles may be positioned within or otherwise coupled to the first plasma region 215 to affect the flow of fluid into the region through the gas inlet assembly 205. In some embodiments, additional plasma sources, including inductively coupled plasma sources that extend around the chamber or are in fluid communication with the chamber, and additional plasma generation systems may be utilized.

[0027] The ion suppressor 223 may comprise a plate or other geometry defining a plurality of apertures throughout its structure, configured to suppress the transfer of ionic-charged species out of the first plasma region 215 while allowing uncharged neutral or radical species to pass through the ion suppressor 223 and enter the activated gas delivery region between the suppressor and the showerhead. In embodiments, the ion suppressor 223 may comprise a porous plate with various aperture configurations. These uncharged species may include highly reactive species that are transported through the apertures with a less reactive carrier gas. As noted above, the transfer of ionic species through the apertures may be reduced, and in some cases completely suppressed. Controlling the amount of ionic species passing through the ion suppressor 223 can advantageously improve control over the gas mixture contacting the underlying wafer substrate, which in turn can improve control over the deposition and / or etching characteristics of the gas mixture. For example, adjusting the ion concentration of a gas mixture can significantly change its etch selectivity, e.g., SiNx:SiOx etch ratio, Si:SiOx etch ratio, etc. In alternative embodiments in which deposition is performed, the balance between conformal and flow-type deposition of the dielectric material may also be shifted.

[0028] The plurality of apertures in the ion suppressor 223 can be configured to control the passage of the activated gas, i.e., ionic, radical, and / or neutral species, through the ion suppressor 223. For example, the aspect ratio of the apertures, i.e., the diameter to length of the apertures, and / or the geometry of the apertures can be controlled to reduce the flow of ionic charged species in the activated gas passing through the ion suppressor 223. The apertures in the ion suppressor 223 can include a tapered portion facing the plasma excitation region 215 and a cylindrical portion facing the showerhead 225. The cylindrical portion can be shaped and sized to control the flow of ionic species passing into the showerhead 225. An adjustable electrical bias can be applied to the ion suppressor 223 as an additional means for controlling the flow of ionic species through the suppressor.

[0029] The ion suppressor 223 can function to reduce or eliminate the amount of ionic charged species that migrate from the plasma generation region to the substrate. Uncharged neutral and radical species can further pass through the openings in the ion suppressor to react with the substrate. Note that in embodiments, complete elimination of ionic charged species in the reaction region around the substrate may not be performed. In certain cases, ionic species are intended to reach the substrate to perform etching and / or deposition processes. In such cases, the ion suppressor can help control the concentration of ionic species in the reaction region at a process-supportive level.

[0030] Combining the showerhead 225 with the ion suppressor 223 can prevent the plasma present in the first plasma region 215 from directly exciting gases in the substrate processing region 233, while allowing excited species to migrate from the chamber plasma region 215 into the substrate processing region 233. In this manner, the chamber can be configured to prevent the plasma from contacting the substrate 255 being etched. This can advantageously protect various intricate structures and films patterned on the substrate that could be damaged, misaligned, or distorted if directly contacted by the generated plasma. Furthermore, if the plasma is allowed to contact or approach the substrate level, the rate at which oxide species etch can increase. Therefore, if the exposed area of ​​material is an oxide, this material can be further protected by keeping the plasma away from the substrate.

[0031] The processing system may further include a power supply 240 electrically coupled to the processing chamber for supplying power to the faceplate 217, the ion suppressor 223, the showerhead 225, and / or the pedestal 265 to generate a plasma in the first plasma region 215 or processing region 233. The power supply may be configured to deliver an adjustable amount of power to the chamber depending on the process being performed. Such a configuration may enable the use of a tunable plasma in the process being performed. Unlike remote plasma units, which often present an on or off function, a tunable plasma may be configured to deliver a specific amount of power to the plasma region 215. This may enable the development of specific plasma characteristics such as precursors being dissociated in a specific manner to enhance the etch profile produced by those precursors.

[0032] A plasma can be ignited either in the chamber plasma region 215 above the showerhead 225 or in the substrate processing region 233 below the showerhead 225. For example, a plasma can exist in the chamber plasma region 215 to create radical precursors from an inflow of fluorine-containing precursors or other precursors. To ignite a plasma in the chamber plasma region 215 during deposition, an AC voltage, typically in the radio frequency ("RF") range, can be applied between a conductive top portion of the processing chamber, such as the faceplate 217, and the showerhead 225 and / or ion suppressor 223. The RF power source can generate a high RF frequency of 13.56 MHz, but can generate other frequencies alone or in combination with the 13.56 MHz frequency.

[0033] 2B shows a detailed view 253 of features that affect the distribution of process gas through face plate 217. As shown in FIGS. 2A and 2B, face plate 217, cooling plate 203, and gas inlet assembly 205 intersect to define gas delivery region 258, into which process gas can be delivered from gas inlet 205. Gas can fill gas delivery region 258 and flow through apertures 259 in face plate 217 to first plasma region 215. The apertures 259 can be configured to direct the flow substantially in one direction so that process gas can flow into processing region 233, but backflow into gas delivery region 258 after traversing face plate 217 is partially or completely prevented.

[0034] Gas distribution assemblies such as showerhead 225 used in processing chamber section 200 may be referred to as dual channel showerheads and are described in further detail in the embodiment depicted in Figure 3. Dual channel showerheads may provide an etching process that allows separation of etchants outside of processing region 233, resulting in limited interaction with chamber components and each other before being delivered into the processing region.

[0035] The showerhead 225 may include an upper plate 214 and a lower plate 216. The plates may be coupled to one another to define a volume 218 between the plates. The coupling of the plates may provide a first fluid channel 219 through the upper and lower plates and a second fluid channel 221 through the lower plate 216. The formed channel may be configured to provide fluid access from the volume 218 through the lower plate 216 only via the second fluid channel 221, and the first fluid channel 219 may be fluidically isolated from the volume 218 between the plates and the second fluid channel 221. The volume 218 may be fluidly accessible through a side of the gas distribution assembly 225.

[0036] 3 is a bottom view of a showerhead 325 for use in a processing chamber, according to an embodiment. The showerhead 325 may correspond to the showerhead 225 shown in FIG. 2A. The through-holes 365, which represent the first fluid channels 219, may have a variety of shapes and configurations to control and influence the flow of precursors through the showerhead 225. The small holes 375, which represent the second fluid channels 221, may be substantially uniformly distributed over the surface of the showerhead, even among the through-holes 365, and may help to provide more uniform mixing of the precursors as they exit the showerhead compared to other configurations.

[0037] While the aforementioned chambers may be used in performing exemplary methods, including etching methods, any number of chambers may be configured to perform one or more aspects used in embodiments of the present technology. Referring to FIG. 4 , exemplary operations in a method 400 according to an embodiment of the present technology are shown. Method 400 may include one or more operations prior to the start of the method, including front-end processing, deposition, etching, polishing, cleaning, or any other operations that may be performed before the described operations. The method may include numerous optional operations that may or may not be particularly relevant to some embodiments of the method according to embodiments of the present technology. For example, many of the operations are described to provide a broader range of processes that may be performed, but are not essential to the technology and may be performed by alternative methods further described below. Method 400 may describe operations shown generally in FIGS. 5A-5D, and the illustrations of FIGS. 5A-5C will be described in conjunction with the operations of method 400. It should be understood that the figures illustrate only partial schematic views, and that the substrate may include any number of additional materials and features having various properties and aspects as shown in the figures.

[0038] Method 400 may or may not include optional operations to tailor the semiconductor structure to a particular manufacturing operation. It should be understood that method 400 may be performed on any number of semiconductor structures or substrates 505, including the exemplary structure on which a metal material removal operation may be performed, as shown in FIG. 5A. As shown in FIG. 5A, substrate 505 may have multiple stacked layers overlying the substrate, which may be silicon, silicon germanium, or other substrate materials. The layers may include an IPD layer, with alternating layers of dielectric material 510, which may be silicon oxide, and placeholder material 520, which may be silicon nitride or polysilicon, for example. Placeholder material 520 may be or include material that is removed to create individual memory cells in subsequent operations. While shown with only seven layers of material, it should be understood that the exemplary structure may include any number of layers, including hundreds of layers of material, and the figure is merely a schematic diagram for illustrating aspects of the present technology. The trench 530 may be a memory hole or aperture and may be defined through the stack structure down to the level of the substrate 505. The trench 530 may be defined by sidewalls that may be comprised of alternating layers of dielectric material 510 and placeholder material 520. For example, the sidewalls may be the radius of the aperture or memory hole. While only a single memory hole structure is shown, it should be understood that the exemplary substrate may include any number of memory structures throughout the substrate.

[0039] After the recesses may be formed in the placeholder material, metal 540 may be formed or deposited on the structure. Metal 540 may extend around the structure and into each recess formed in the memory holes and placeholder material, as shown. The metal may be molybdenum, tungsten, or some other metal that may be used in 3D NAND or other semiconductor structures. The substrate may then be placed in a processing chamber, such as chamber 200 described above, and method 400 may be performed to etch the metal in the high aspect ratio features. For example, while features according to the present technique may feature any aspect ratio or height-to-width ratio of the structure, in some embodiments, the material may feature a larger aspect ratio, which may make sufficient etching impossible using the conventional techniques or methods described above. For example, in some embodiments, the aspect ratio of exemplary structures such as, by way of non-limiting example, memory holes can be about 10:1 or greater, about 20:1 or greater, about 30:1 or greater, about 40:1 or greater, about 50:1 or greater, about 100:1 or greater, or greater.

[0040] Method 400 may be performed to etch or otherwise remove portions of metal 540, thereby isolating the metal in recessed portions of the structure as shown. The method may be performed to facilitate control of the overall structure profile as well as to improve etching characteristics, such as the surface smoothness of the metal within recessed sections of the structure. While the etching process itself, according to some embodiments of the present technology, may be utilized to control the profile or extent of etching along each section, as aspect ratios continue to increase in structures, including memory structures, stress issues may persist, such as increased processing time to which material higher in a feature may be exposed for longer periods compared to material further within the feature. Accordingly, the present technology may, in some embodiments, include one or more deposition operations that may be used to selectively deposit metal-containing or carbon-containing material along exposed portions of metal 540. While the process described below includes two deposition operations at two different stages of processing, it should be understood that either deposition may be eliminated, repeated, or included depending on encompassed embodiments of the present technology. Accordingly, the claims are not necessarily limited to including both or either deposition operations.

[0041] For example, method 400 may include, at operation 402, depositing a material 545, such as a metal-containing material or a carbon-containing material, along surfaces of exposed metal 540 in trench 530, which may be the high aspect ratio structures described above. As described further below, in embodiments in which material 545 is deposited before separation of exposed metal 540, material 545 may be deposited along all exposed surfaces of exposed metal 540, which may extend above and / or into trench 530. The metal-containing material may be the same or a different metal as exposed metal 540, such as tungsten, molybdenum, or another metal, and if a carbon-containing material is deposited, the material may be carbon or any other carbon-containing material.

[0042] The material can be deposited by plasma-enhanced deposition, although in some embodiments, the deposition can be performed thermally, and the semiconductor processing region can be maintained plasma-free during deposition. In some embodiments, one or more of the deposition operations can be performed in the same chamber as a subsequent etching operation or in a different chamber. Furthermore, deposition can be performed in a first chamber and etching can be performed in a second chamber, both of which can be on the same platform, such as the two chambers on system 100 described above. By utilizing different chambers, plasma deposition can be performed without adjusting processing conditions in the etching chamber, or processing at different temperatures can be more easily performed. However, by performing thermal deposition, deposition can be selectively performed on the metal when a metal-containing material is deposited on the exposed metal 540.

[0043] The deposition can form a gradient thickness across the exposed surface of the metal within the structure, along with the deeper surface within the high aspect ratio structure, as shown in Figure 5A. Material 545 thickness along the surface near the opening to the high aspect ratio structure. The thickness of the material is 545 twist To grow bigger The precursors utilized for deposition may include any precursor capable of facilitating the deposition of a metal- or carbon-containing material. For example, exemplary precursors utilized for deposition may include a tungsten-containing precursor such as tungsten hexafluoride or tungsten oxytetrafluoride, a molybdenum-containing precursor such as molybdenum pentafluoride, molybdenum pentachloride, molybdenum oxyfluoride, or molybdenum oxychloride, among other tungsten- or molybdenum-containing materials capable of facilitating deposition onto the exposed metal 540.

[0044] To facilitate reactions induced by thermal or plasma-enhanced deposition, a hydrogen-containing material may be provided to function as a reducing agent, allowing metal deposition to occur. Exemplary hydrogen-containing materials may include diatomic hydrogen, disilane, or any other hydrogen-containing material. The precursors may contact a higher proportion of the upper surface within the trench 530 than the lower surface within the trench 530, resulting in a deposition gradient that may allow for controllable deposition along the surface. Furthermore, a carbon-containing material may be deposited instead of a metal-containing material, and the carbon-containing precursor may include a carbon- and halogen-containing precursor that can be flowed by a hydrogen-containing reducing agent. According to embodiments of the present technology, any carbon and fluorine precursor or carbon and chlorine precursor may be used.

[0045] Regardless of whether an initial deposition is performed, the method 400 may include etching exposed metal 540 within the trench or feature. The etching may include flowing a fluorine-containing precursor and a secondary gas, such as a protective gas, into a processing region of a chamber in which the substrate is held in operation 405. The fluorine-containing precursor and secondary gas may contact the substrate in operation 410 and etch the metal within the high-aspect-ratio structure in operation 415. As shown in FIG. 5B , the metal 540 may be recessed into the trench along the sidewalls of the memory hole and along the top surface of the entire structure. While conventional techniques can result in a top-to-bottom load resembling a V-shaped profile, with more material etched at the top of the structure as described above, the present technique can result in a substantially or essentially straight profile and an inverted V-shaped profile, where material further within the structure may be etched more than material at the top of the structure, which may enable the formation of a range of top-to-bottom load values. This control can be achieved by etching the deposited material along with the metal 540 and by utilizing a secondary gas during etching, as described below. Similarly, the overall profile of the etch through the trench can be a uniform V-shaped or inverted V-shaped profile, as etching can occur more easily higher in the trench due to the increased residence time and exposure caused by increasing the material removed by deposition. In some embodiments, deposition can be cycled with one or more of the etching operations described throughout this disclosure to create a desired profile in the trench.

[0046] As a further aspect to achieving this control, the present technique can utilize a secondary gas, which can help limit or reduce etching or etching rates at the top of the structure. For example, the fluorine-containing precursor and secondary gas can access the metal 540 along the outer top surface where the memory holes are formed before contacting the metal within the feature. Without the secondary gas, which can be a protective gas, etching can begin at the top of the structure well before etching begins near the bottom of the structure. However, incorporating a secondary gas can allow secondary gas molecules to occupy surface areas or sites along the metal 540, which can slow the etching rate. For example, fluorine can remain bonded to the metal in inconspicuous locations, but these locations can be at least partially blocked by the secondary gas. Exemplary metals, such as molybdenum or tungsten, may not have a one-to-one removal characteristic with fluorine; instead, three, four, or six fluorine atoms may be incorporated before removing the metal atoms. Therefore, utilizing a protective gas can control, reduce, or limit these interactions between fluorine and the metal, which can facilitate etching rate control.

[0047] However, as the flow rate ratio of the secondary gas increases relative to the fluorine-containing precursor, the etching rate may continue to decrease, and eventually the secondary gas molecules will interrupt the etching process at various locations, preventing further etching. Therefore, in some embodiments, the flow rate ratio of the fluorine-containing precursor to the secondary gas may be maintained at about 1:1 or greater, which may ensure that some etching occurs at the top of the structure. For example, the flow ratio of the fluorine-containing precursor to the secondary gas can be maintained at about 1.2:1 or greater, and can also be maintained at about 1.4:1 or greater, about 1.6:1 or greater, about 1.8:1 or greater, about 2.0:1 or greater, about 2.2:1 or greater, about 2.4:1 or greater, about 2.6:1 or greater, about 2.8:1 or greater, about 3.0:1 or greater, about 4.0:1 or greater, about 5.0:1 or greater, about 6.0:1 or greater, about 7.0:1 or greater, about 8.0:1 or greater, about 9.0:1 or greater, about 10.0:1 or greater, or greater. Additionally, a first flow ratio can be used, and as the etching process progresses, the first flow ratio can be adjusted to a second flow ratio that is different from the first flow ratio as the etching process progresses. In some embodiments, any of the ratios described, or any ratio encompassed within the recited ranges, can be used for either the first flow ratio or the second flow ratio during flow operation.

[0048] In some embodiments, the fluorine-containing precursor and / or secondary gas may be plasma-enhanced before contacting the metal on the substrate. The plasma may be formed in a remote region of the processing chamber or may be formed locally. A substrate-level plasma may be created, but in some embodiments, the plasma may be a remote plasma, which may protect exposed substrate material from ion bombardment that may be generated by a substrate-level plasma. Whether plasma-enhanced or not, the material may contact the metal 540 at the top of the structure and then flow through the structure into the memory holes. The etching process may continue until the metal is removed toward the recesses extending laterally and perpendicular to the direction of the memory holes. The process may continue to further recess the metal into each recess to separate the cells through the memory holes, but in some embodiments, method 400 may include a secondary etching process to completely separate the cells and etch laterally within the recesses. Because the memory holes may extend to several micrometers in depth, the etchant may lose energy flowing deeper into the structure and flowing laterally into the recessed feature, which may cause the etch to be slower and less selective to the exposed surface of the dielectric material exposed on some sides. Thus, in the second operation, the etchant may be adjusted to perform a second recess operation.

[0049] For example, the processing region may or may not be purged following the first etching operation. Then, in optional operation 420, a plasma may be formed from an oxygen-containing precursor and flowed to the substrate. Again, the plasma may be formed in a remote portion of the processing chamber or locally at the substrate level. In optional operation 425, the exposed metal previously opened in the first etching process may be contacted with the plasma effluent of the oxygen-containing precursor. After the metal is oxidized, in optional operation 430, a second fluorine-containing precursor may be flowed into the processing chamber. In some embodiments, the plasma may be extinguished before delivery of the second fluorine-containing precursor, and the processing chamber may be maintained plasma-free during delivery of the second fluorine-containing precursor. The second fluorine-containing precursor may be the same or different from the first fluorine-containing precursor, although in some embodiments, the second precursor may more readily donate fluorine under process conditions. The second fluorine-containing precursor may contact the oxidized material and, in optional operation 435, remove the oxidized metal. As shown in FIG. 5C, metal 540 can be completely separated between cells and recessed in the access locations along the vertical memory holes.

[0050] When or immediately before the intra-cell recess processing is performed, a deposition operation may be performed, which may be the same or different from the deposition of material 545 described above. For example, after cell separation, one or more deposition operations may be performed that may deposit material 550. Material 550 may be selectively deposited on metal 540 by performing thermal reduction of a metal-containing precursor. Thus, as described above, deposition may be performed in different stages using different deposition processes. For example, if an initial deposition is performed using material 545, all exposed surfaces may be metal 540, and the deposition may be thermally activated or plasma-enhanced. However, after cell separation, additional exposed material may be included, and it may or may not be desirable to deposit material 550 on the exposed material. By performing thermal deposition according to some embodiments of the present technique, material 550 may be selectively deposited on the exposed surfaces of metal 540. As shown in FIG. 5C, when a second deposition operation is performed, deposition may again be preferentially performed on material higher up in the trench based on flow within the feature. Thus, deposition can improve material etch coverage more quickly. This deposition can be cycled any number of times using one or more of any of the etching operations described throughout this disclosure. By performing a deposition and etching sequence according to embodiments of the present technology, a more uniform profile of metal 540 can be created, as illustrated in FIG. 5D.

[0051] In some embodiments, residual fluorine may be incorporated into the remaining metal after either the first etching process and / or the second etching process. Accordingly, in some embodiments, a post-treatment operation may be performed in optional operation 440, which may occur following the first etching process, such as after operation 415, following the second etching process, such as operation 440, or after each etching process. For example, a chlorine-containing precursor, such as boron trichloride, may be flowed into the processing chamber. The chlorine-containing precursor may be plasma-enhanced or non-plasma-enhanced in embodiments, and if plasma-enhanced, the plasma may be generated remotely or in situ within the processing chamber. In some embodiments of the present technology, the chlorine-containing precursor may contact the substrate and interact with the surface of the remaining metal to remove residual fluorine.

[0052] In some embodiments, exemplary fluorine-containing precursors may include one or more of fluorine or chlorine, and any other halogen. Some exemplary precursors that can be utilized include halides, including hydrogen fluoride, nitrogen trifluoride, or any organic fluoride, diatomic fluorine, bromine trifluoride, chlorine trifluoride, sulfur hexafluoride, xenon difluoride, boron trichloride, tungsten pentachloride, tungsten hexachloride, or any other fluorine-containing precursor. A chlorine-containing precursor may be included in the fluorine-containing precursor or used in place of the fluorine-containing precursor, such as boron trichloride, diatomic chlorine, chlorine trifluoride, or other chlorine-containing precursors. Precursors may also be flowed together in various combinations. For example, as previously mentioned, the second fluorine-containing precursor may more readily donate fluorine compared to the first fluorine-containing precursor. As a non-limiting example of precursors, the first fluorine-containing precursor can be or include nitrogen trifluoride, and the second fluorine-containing precursor can be or include tungsten hexafluoride or sulfur hexafluoride.

[0053] The precursor may also be flowed with any number of additional precursor or carrier gases, including diatomic hydrogen or hydrogen-containing precursors, nitrogen, argon, helium, or any number of additional materials, although in some embodiments, the precursor may be limited to control side reactions or other aspects that may affect selectivity. The secondary gas provided during the etching process may include an oxygen-containing precursor and / or a nitrogen-containing precursor. For example, non-limiting oxygen-containing precursors may include diatomic oxygen, ozone, water, alcohol, hydrogen peroxide, nitrous oxide, nitric oxide, or any other oxygen-containing material. Non-limiting nitrogen-containing precursors may include, for example, diatomic nitrogen, or any oxygen-containing precursor that also contains nitrogen.

[0054] Process conditions can also affect the operations performed in method 400. While each operation of method 400 may be performed at a constant temperature in some embodiments, in some embodiments, the temperature may be adjusted during different operations. In some embodiments, one or more deposition operations may be performed at the same or different temperatures as any etching operations, either in the same chamber or in two different chambers. For example, the temperature of the substrate, pedestal, or any chamber during method 400 may be maintained at about 150°C or higher, about 200°C or higher, about 250°C or higher, about 300°C or higher, about 350°C or higher, about 400°C or higher, about 450°C or higher, about 500°C or higher, or higher, which may facilitate etching operations and deposition operations, including thermal deposition. However, at higher temperatures, further dissociation of fluorine-containing materials may occur, creating more fluorine radicals. As the amount of fluorine radicals increases, protective gases may not be able to adequately control the reaction. Thus, in some embodiments, the temperature may be maintained at or below about 700° C., at or below about 650° C., at or below about 600° C., at or below about 550° C., at or below about 500° C., or even lower. Similarly, in some embodiments, one or more deposition operations may be performed at a first temperature that is higher than a second temperature at which one or more etching operations may be performed.

[0055] In some embodiments, the process may be performed at a variety of pressures, which may facilitate operation in any of a number of process chambers. For example, the process may be performed in a chamber capable of providing a pressure that can be maintained at about 1 Torr or greater, and a chamber capable of providing a pressure that can be maintained at about 2 Torr or greater, about 5 Torr or greater, about 10 Torr or greater, about 50 Torr or greater, about 100 Torr or greater, about 200 Torr or greater, or higher. Utilizing a pressure of about 1 Torr or greater may facilitate delivery of the etchant through the high aspect ratio structure. While a plasma may be utilized in one or more operations as described above, in some embodiments, no plasma may be used, and the entire method may be performed while maintaining a plasma-free environment within the semiconductor processing chamber. If plasma effluents are utilized during one or more operations, the plasma power may be maintained below about 500 W. Maintaining a lower plasma power may control sputtering and limit interactions to more controlled chemical reactions, which may better limit the extent of etching through the metal, such as near the top of the structure. This may facilitate better control of the profile along, for example, the memory hole. As a result, in some embodiments, the plasma power can be maintained at about 450 W or less, about 400 W or less, about 350 W or less, about 300 W or less, about 250 W or less, about 200 W or less, about 150 W or less, about 100 W or less, or even lower.

[0056] By utilizing precursors and processes as described throughout the present disclosure, metals used in 3D NAND and other semiconductor structures can be more uniformly etched from between sections of dielectric materials, such as silicon oxide, while limiting damage or removal of the silicon oxide and maintaining an improved profile or top-to-bottom load value. For example, in some embodiments of the present disclosure, after either the first etching process or the second etching process, the top-to-bottom load value can be maintained at about 2:1 or less, and can also be maintained at about 1.8:1 or less, about 1.6:1 or less, about 1.5:1 or less, about 1.4:1 or less, about 1.3:1 or less, about 1.2:1 or less, about 1.1:1 or less, or about 1.0:1, indicating equivalent etching near the top of the structure as well as near the bottom of the structure. By using the term "about," the present disclosure is intended to encompass limitations of measurement in the form factors described throughout the present disclosure, where the generally specified conditions are understood but may not provide perfect accuracy in measurement. Additionally, in some embodiments, the etching process may be further adjusted to create either a V-shaped profile or an inverted V-shaped profile, as discussed above, in which case the top to bottom loading value may be maintained at about 0.9:1 or less, and may also be maintained at about 0.8:1 or less, about 0.7:1 or less, about 0.6:1 or less, about 0.5:1 or less, or even lower.

[0057] Although the foregoing description, for purposes of explanation, sets forth numerous details in order to provide an understanding of various embodiments of the present technology, it will be apparent to one skilled in the art that particular embodiments may be practiced without some of these details or with additional details.

[0058] Although several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative structures, and equivalents may be used without departing from the spirit of the embodiments. Moreover, to avoid unnecessarily obscuring the present technology, some well-known processes and elements have not been described. Therefore, the above description should not be construed as limiting the scope of the present technology. Furthermore, while a method or process may be described sequentially or stepwise, it should be understood that the operations may be performed simultaneously or in an order different from that listed.

[0059] Where a range of values ​​is provided, unless the context clearly dictates otherwise, it is understood that each intervening value between the upper and lower limits of that range, to the smallest fraction of the unit of the lower limit, is also specifically disclosed. Any narrower range between any stated value or unstated intervening value in a stated range and any other stated or intervening value in that stated range is also encompassed. The upper and lower limits of these smaller ranges may be independently included or excluded within the range, and ranges that include either, neither, or both limits within the smaller ranges are each encompassed within the technology, subject to any explicitly excluded limits in the stated range. When a stated range includes one or both limits, ranges excluding either or both of those included limits are also included.

[0060] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a precursor" includes a plurality of such precursors, reference to "the layer" includes reference to one or more layers and equivalents thereof known to those skilled in the art, and so forth.

[0061] Additionally, the terms "comprise," "comprising," "contain," "containing," "include," and "including," when used in this specification and the claims that follow, are intended to specify the presence of stated features, integers, components, or operations, but do not exclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.

Claims

1. depositing a metal-containing or carbon-containing material along a surface of exposed metal in a high aspect ratio structure defined on a substrate, the metal-containing or carbon-containing material forming a gradient thickness along the surface of the exposed metal, the metal-containing or carbon-containing material having a greater thickness near an opening in the high aspect ratio structure than along a surface deeper within the high aspect ratio structure; flowing a fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber, the secondary gas comprising oxygen or nitrogen, and a flow ratio of the fluorine-containing precursor to the secondary gas being about 1:1 or greater; contacting the substrate with the fluorine-containing precursor and the secondary gas; etching the metal-containing material or the carbon-containing material along with the exposed metal in the high aspect ratio structures; An etching method comprising:

2. The etching method of claim 1 further comprising forming a plasma of the fluorine-containing precursor and the secondary gas.

3. The etching method of claim 1 further comprising repeating the method at least one cycle.

4. 2. The etching method of claim 1, wherein the metal-containing material or the carbon-containing material is thermally deposited such that the metal-containing material or the carbon-containing material is deposited to a greater thickness along surfaces near the openings to the high aspect ratio structures than along surfaces deeper within the high aspect ratio structures.

5. 10. The etching method of claim 1, wherein the high aspect ratio structure comprises a memory hole in a 3D NAND structure, and the exposed metal extends laterally into a recess formed perpendicular to the memory hole.

6. purging the processing region of the semiconductor processing chamber after etching the exposed metal; forming a plasma of an oxygen-containing precursor; contacting the exposed metal with plasma effluents of the oxygen-containing precursor to produce a metal oxide; The etching method of claim 1 further comprising:

7. the fluorine-containing precursor is a first fluorine-containing precursor, and the method comprises: flowing a second fluorine-containing precursor into the processing region; contacting the metal oxide with the second fluorine-containing precursor; The etching method of claim 6 further comprising:

8. 8. The etching method of claim 7, wherein the processing area is maintained plasma-free while contacting the metal oxide with the second fluorine-containing precursor.

9. 10. The etching method of claim 1, wherein both said depositing and said etching are performed in said semiconductor processing chamber, and said processing region is maintained plasma-free during said depositing.

10. 10. The etching method of claim 1, further comprising flowing a chlorine-containing precursor into the processing region after etching the exposed metal, wherein the chlorine-containing precursor removes residual fluorine.

11. 10. The etching method of claim 1, wherein after etching the exposed metal in the high aspect ratio structures, the top to bottom loading value is about 1.5 or less.

12. depositing a metal-containing material or a carbon-containing material along the exposed metal surface within the high aspect ratio structure defined on the substrate; flowing a first fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber; contacting the substrate with the first fluorine-containing precursor and the secondary gas, the substrate including exposed metal, the substrate defining a memory hole in a 3D NAND structure, the exposed metal extending laterally into a recess formed perpendicular to the memory hole; Etching the exposed metal in the memory holes; forming a plasma of an oxygen-containing precursor; contacting the exposed metal with plasma effluents of the oxygen-containing precursor to produce an oxidized metal; flowing a second fluorine-containing precursor into the processing region of the semiconductor processing chamber; removing said oxidized metal; An etching method comprising:

13. The etching method of claim 12 , wherein the secondary gas comprises oxygen or nitrogen.

14. 13. The etching method of claim 12, wherein a flow ratio of the first fluorine-containing precursor to the secondary gas is about 1:1 or greater.

15. 13. The etching method of claim 12, further comprising forming a plasma of the first fluorine-containing precursor and the secondary gas.

16. 13. The etching method of claim 12, wherein the temperature within the semiconductor processing chamber is maintained between about 200°C and about 500°C.

17. 13. The etching method of claim 12, wherein the depositing forms a carbon-containing material or a metal-containing material including tungsten or molybdenum.

18. 13. The etching method of claim 12, wherein the processing region of the semiconductor processing chamber is maintained plasma-free while flowing the second fluorine-containing precursor into the processing region.

19. 13. The etching method of claim 12, further comprising flowing a chlorine-containing precursor into the processing region after etching the exposed metal.

20. depositing a metal-containing material or a carbon-containing material along the exposed metal surface within the high aspect ratio structure defined on the substrate; flowing a first fluorine-containing precursor and a secondary gas into a processing region of a semiconductor processing chamber, wherein the secondary gas comprises oxygen or nitrogen; contacting the substrate with the first fluorine-containing precursor and the secondary gas, the substrate including exposed metal and the substrate defining high aspect ratio structures; Etching the exposed metal within the high aspect ratio structures; contacting the exposed metal with an oxygen-containing precursor to produce a metal oxide; flowing a second fluorine-containing precursor into the processing region of the semiconductor processing chamber; removing the oxidized metal; wherein the method is carried out at a chamber operating temperature of about 500° C. or less.

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