semiconductor integrated circuit device

Abstract

To provide a semiconductor integrated circuit device capable of suppressing an increase in a chip cost required for a measure against a decrease in output voltage due to on-resistance of a transistor in a high-side switch IC.SOLUTION: A semiconductor integrated circuit device comprises: a switch transistor connected between a voltage input terminal and a voltage output terminal; and a control circuit controlling the switch transistor to come into an on-state or an off-state on the basis of a control signal. The control circuit comprises: a reference voltage source which generates a reference voltage from a DC voltage input to the power input terminal; a differential amplifier which outputs a voltage applied to a control terminal of the switch transistor with the reference voltage and a voltage of the voltage output terminal as inputs; and a logic circuit which generates a signal controlling an operation state of the differential amplifier on the basis of a control signal from the output terminal. When the control signal is at a first logic level, the differential amplifier controls the switch transistor into the on-state according to an output signal of the logic circuit. When the control signal is at a second logic level, the differential amplifier controls the switch transistor into the off-state according to the output signal of the logic circuit.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor integrated circuit device (IC) that includes a switching transistor connected between a voltage input terminal and an output terminal and a circuit that controls the on / off of the transistor, and relates to technology that is effective when used in, for example, a high-side switch IC. [Background technology]

[0002] A high-side switch IC is an element (device) that is installed on the power line that supplies power voltage from the power supply to the load and that switches the power supply voltage on and off to the load. As shown in Figure 5, the high-side switch IC is installed on a power supply line 22 that supplies power voltage from a USB power supply 20 to a USB device 21, such as a sensor or a PC peripheral, and is used to control the supply / cut-off of power according to commands from a microcontroller 23, and to protect the device by cutting off the power supply when an abnormality such as a short circuit occurs by monitoring the status of the device 21 with the microcontroller 23.

[0003] 6, a conventional high-side switch IC 10 is configured with a switching transistor M1 connected between a voltage input terminal IN to which a power supply voltage from a power supply 20 is input and an output terminal OUT to which a load device 21 is connected, and a logic circuit 11 that controls the transistor to turn on and off, and is configured to supply and cut off power by inputting an on / off control signal from an external control device such as an external microcomputer to a control terminal CE, which serves as an external terminal of the IC. Examples of inventions of high-side switch ICs with this function are described in Patent Documents 1 and 2. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-91584 [Patent Document 2] Japanese Patent Application Laid-Open No. 2012-90214 Summary of the Invention [Problem to be solved by the invention]

[0005] In a high-side switch IC having the configuration shown in FIG. 6, when the gate terminal of transistor M1 is set to low level and M1 is turned on, electrical continuity is established between the input terminal IN and the output terminal OUT via the on-resistance Ron of M1, allowing current to flow. As a result, as shown in FIG. 7, the output voltage Vout changes in response to the output current Iout flowing to the load, generating ΔV. Therefore, to reduce the fluctuation range of the output voltage Vout, it is necessary to use a transistor with a small on-resistance Ron (i.e., a large element size) as M1 or to increase the number of bonding wires, which increases chip costs. Also, when the output current Iout suddenly changes and the output voltage Vout changes, noise is generated, so as a noise countermeasure, it is necessary to use a large-capacity capacitor as the stabilizing smoothing capacitor Co connected to the output terminal or to install a filter circuit, which poses the problem of increasing costs.

[0006] Furthermore, to ensure that a predetermined power supply voltage is supplied to the power supply terminal of the load device regardless of the on-resistance of transistor M1, it is necessary to correct the voltage input from the power supply to the voltage input terminal, for example, by shifting the input voltage upward by the amount of voltage drop due to the on-resistance, and setting the input voltage to the midpoint within the specified range of the output voltage. However, because the amount of correction must be changed for each system depending on the amount of current consumed by the load device connected to the output terminal, there is an issue that the design burden on the user is increased.

[0007] The present invention has been made in light of the above-mentioned problems, and its object is to provide a semiconductor integrated circuit device as a high-side switch IC that can suppress the increase in chip cost required to address the drop in output voltage due to the on-resistance of a transistor. Another object of the present invention is to provide a semiconductor integrated circuit device as a high-side switch IC that can reduce fluctuations in output voltage to suppress noise generation and reduce the cost required for noise countermeasures. It is still another object of the present invention to provide a semiconductor integrated circuit device as a high-side switch IC that does not require correction of the input voltage for each system, thereby reducing the design burden on the user. [Means for solving the problem]

[0008] In order to achieve the above object, the present invention provides A semiconductor integrated circuit device comprising: a switching transistor connected between a voltage input terminal to which a DC voltage is input and a voltage output terminal; an external terminal (CE) to which a control signal is input; and a control circuit that controls the switching transistor to an on state or an off state based on the control signal, The control circuit a reference voltage source that generates a reference voltage from the DC voltage input to the voltage input terminal; a differential amplifier that receives the reference voltage and the voltage at the voltage output terminal as inputs and outputs a voltage to be applied to a control terminal (gate terminal) of the switching transistor; a logic circuit that generates a signal for controlling an operation state of the differential amplifier based on the control signal input to the external terminal; an inverting input terminal of the differential amplifier is connected to the reference voltage source, and a non-inverting input terminal of the differential amplifier is connected to the voltage output terminal; The differential amplifier is configured to control the switching transistor to an on state when the control signal is at a first logic level, and to control the switching transistor to an off state when the control signal is at a second logic level, in response to the output signal of the logic circuit.

[0009] In a semiconductor integrated circuit device having the above configuration, the differential amplifier constituting the control circuit for controlling the switching transistor operates to match the potential of the inverting input terminal with the potential of the non-inverting input terminal, so that the reference voltage source, differential amplifier, and switching transistor operate as a constant voltage circuit, making it possible to maintain a constant output voltage even when the output current, i.e., the current flowing through the load device, changes, preventing instability of the output voltage due to the on-resistance of the transistor.Furthermore, fluctuations in the output voltage due to changes in the output current are prevented, thereby suppressing the generation of noise.

[0010] Furthermore, by applying a voltage obtained by adding the constant voltage to the voltage input terminal, it is possible to suppress increases in chip costs required to take measures to prevent a drop in output voltage, such as increasing the size of the switching transistor, and it is possible to reduce fluctuations in output voltage due to changes in load current and suppress the generation of noise, thereby reducing the cost required for noise countermeasures. Furthermore, because the amount of voltage drop due to the on-resistance of the switching transistor is constant regardless of the magnitude of the output current, there is no need to change the amount of input voltage correction for each system, reducing the design burden on the user. [Effects of the Invention]

[0011] According to the present invention, in a semiconductor integrated circuit device serving as a high-side switch IC having a transistor connected between a voltage input terminal and an output terminal, it is possible to suppress increases in chip costs required to address the drop in output voltage due to the on-resistance of the transistor. Furthermore, it is possible to reduce fluctuations in the output voltage and suppress noise generation, thereby reducing the cost required for noise countermeasures. Furthermore, there is an effect that correction of the input voltage for each system is not required, thereby reducing the design burden on the user. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a circuit configuration diagram showing an embodiment of a high-side switch IC to which the present invention is applied. [Figure 2]FIG. 2 is a characteristic diagram showing the output current-output voltage characteristics of the high-side switch IC according to the embodiment. [Figure 3] FIG. 2 is a circuit diagram showing a specific circuit example of a high-side switch IC according to an embodiment. [Figure 4] FIG. 10 is a circuit configuration diagram showing a modified example of the high-side switch IC of the embodiment. [Figure 5] FIG. 1 is a system configuration diagram showing a general configuration of a system using a high-side switch IC. [Figure 6] FIG. 1 is a circuit diagram showing a general configuration of a conventional high-side switch IC. [Figure 7] FIG. 7 is a characteristic diagram showing the output current-output voltage characteristics of the high-side switch IC shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0013] Preferred embodiments of the present invention will now be described with reference to the accompanying drawings. Fig. 1 shows an embodiment of a high-side switch IC to which the present invention is applied. In Fig. 1, the area surrounded by a dashed line is formed as a semiconductor integrated circuit (IC) 10 on a semiconductor chip such as single crystal silicon, and an output stabilization capacitor Co is connected to the output terminal OUT of the IC 10.

[0014] 1, in the high-side switch IC10 of this embodiment, a switching transistor M1, which is a P-channel MOS transistor, is connected between a voltage input terminal IN to which a DC voltage VDD is applied and an output terminal OUT to which various devices 21 serving as loads are connected. The IC10 also includes a chip control terminal CE to which a signal from an external microcomputer (CPU) or the like is input, a logic circuit 11 that receives the potential of terminal CE as an input, and a differential amplifier (differential amplification circuit) 12 that generates a gate control signal for transistor M1 based on the output of logic circuit 11. Logic circuit 11 controls the on / off of differential amplifier 12 in accordance with the potential of terminal CE. Logic circuit 11 is configured to have a desired logic function using logic gate circuits such as inverters.

[0015] A reference voltage source 13 that generates a reference voltage Vref is connected between the inverting input terminal (-) of the differential amplifier 12 and the voltage input terminal IN, and the voltage Vout of the output terminal OUT is input to the non-inverting input terminal (+) of the differential amplifier 12. Therefore, due to the virtual short, the differential amplifier 12 drives the gate terminal of M1 so that the voltage of the output terminal OUT, that is, the drain voltage of the transistor M1, becomes the same voltage as the voltage (VDD-Vref) of the inverting input terminal (-). As a result, as shown in FIG. 2, the transistor M1, the differential amplifier 12, and the reference voltage source 13 operate as a constant voltage circuit that generates and outputs a constant voltage (VDD-Vref) even when the output current Iout flowing to the load device 21 changes.

[0016] Note that the switch transistor M1 may be designed to have a characteristic that satisfies the condition Ron<Vref / Iout, where Ron is the on-resistance and Iout is the maximum output current defined as the specification of the IC. Also, when it is desired to supply a predetermined voltage Vcc to the power supply voltage terminal of the load device 21 regardless of the magnitude of the current flowing through the load, the power supply voltage VDD input to the voltage input terminal IN may be set to a voltage shifted higher by ΔV corresponding to the difference between the voltage of the input terminal IN and the voltage of the output terminal OUT than Vcc.

[0017] 5, the supplied voltage fluctuates when the output current flowing to the load device 21 varies, so in order to reduce the fluctuation range of the output voltage Vout even when the output current Iout fluctuates, it was necessary to use a transistor with a large element size as M1 or increase the number of bonding wires, as described above, resulting in an increase in chip costs.In contrast, in the high-side switch IC of this embodiment, because transistor M1 operates as the output transistor of the constant voltage circuit, if a voltage higher by ΔV is input in advance to the input terminal IN, it is not necessary to use a transistor with a significantly large element size as M1 or increase the number of bonding wires, and an increase in chip costs can be avoided.

[0018] Furthermore, even if the output current Iout fluctuates, the fluctuation of the output voltage Vout can be reduced, so that the generation of noise can be suppressed and the cost required for noise countermeasures can be reduced. Furthermore, since a constant voltage is generated and output even if the output current Iout flowing to the load device 21 changes, even when a load device 21 with a different current consumption is used to connect to the output terminal, there is no need to correct the input voltage, thereby reducing the design burden on the user. An appropriate value for the reference voltage Vref is, for example, in the range of 0.05V to 0.5V.

[0019] Next, a specific circuit example of the high-side switch IC10 shown in FIG. 1 will be described with reference to FIG. 3, the differential amplifier 12 includes a differential input stage consisting of differential transistors M5 and M6, each consisting of an N-channel MOS transistor with its source terminals connected in common; a constant current source CC1 connected between the common source of M5 and M6 and ground; active load transistors M7 and M8, each consisting of a P-channel MOS transistor, connected between the drain terminals of M5 and M6 and a voltage input terminal IN; and an output stage consisting of a P-channel MOS transistor M9 and a constant current source CC2 connected in series between the voltage input terminal IN and ground. The gate and drain terminals of transistor M7 are connected together, and the gate terminal of M8 is connected to the gate terminal of M7. The gate terminal of transistor M9 in the output stage is connected to the connection node between transistors M8 and M6, i.e., the output node NO of the differential input stage.

[0020] The reference voltage source 13 includes a depletion-type N-channel MOS transistor M2 and an enhancement-type N-channel MOS transistor M3 connected in series between the voltage input terminal IN and the ground point, and a resistor R2, an N-channel MOS transistor M4, and a resistor R1 connected in series between the voltage input terminal IN and the ground point. The gate and source of the depletion-type transistor M2 are coupled together and kept in a normally on state, the gate terminal of the MOS transistor M3 is connected to the connection node N2 between M4 and the resistor R1, and the gate terminal of the MOS transistor M4 is connected to the connection node N1 between M2 and M3. As a result, the reference voltage source 13 is expressed as follows, where VGS3 is the gate-source voltage of the MOS transistor M3 and Vref is the voltage at the connection node N3 between the resistor R2 and the drain terminal of the N-channel MOS transistor M4. Vref=(R2 / R1)×VGS3 The generated reference voltage Vref is input to the gate terminal of the differential transistor M5 of the differential amplifier 12, and the voltage Vout of the output terminal is input to the gate terminal of the other differential transistor M6 of the differential amplifier 12.

[0021] Furthermore, in this embodiment, switch elements SW1 and SW2 that are turned on and off by an output signal from the logic circuit 11 are provided between the sub-ground line SGL of the reference voltage source 13 and the differential amplifier 12 and the main ground line MGL, and between the gate terminal of the transistor M9 in the output stage of the differential amplifier 12 and the main ground line MGL, respectively. The switch elements SW1 and SW2 are configured to be turned on or off complementarily by the output signal from the logic circuit 11.

[0022] In the above configuration, the logic circuit 11 can be configured, for example, by an inverter that inverts the logic level of the chip control terminal CE and an inverter that further inverts the output of this inverter, and is configured so that the output of the latter inverter controls the switch element SW1 and the output of the former inverter controls the switch element SW2. As a result, when a high-level signal is input to the control terminal CE, the switch element SW1 is turned on, activating the reference voltage source 13 and the differential amplifier 12, and the switch element SW2 is turned off, so that the switch transistor M1 connected between the voltage input terminal IN and the output terminal OUT is controlled to the on state by the output of the differential amplifier 12.

[0023] On the other hand, when a low-level signal is input to the control terminal CE, the switch element SW1 is turned off, stopping the operation of the reference voltage source 13 and the differential amplifier 12, and the switch element SW2 is turned on, applying a ground potential to the gate terminal of the transistor M9 in the output stage of the differential amplifier 12 and turning M9 fully on. As a result, the input voltage VDD is applied to the gate terminal of the switch transistor M1 connected between the voltage input terminal IN and the output terminal OUT, turning M1 off.

[0024] Although the switch element SW1 can be omitted from the operation of the IC, providing the switch element SW1 makes it possible to reduce the current consumption of the IC while the switching transistor M1 is in the off state. Also, from the viewpoint of reducing the current consumption of the IC, it is desirable that the inverter constituting the logic circuit 11 is also a CMOS inverter. Furthermore, when the constant current sources CC1 and CC2 of the differential amplifier 12 are configured as current mirror circuits, for example, the constant current sources CC1 and CC2 may be directly controlled to be turned on and off by the output of the logic circuit 11.

[0025] The basic configuration of reference voltage source 13 using a depletion-type MOS transistor is disclosed in Japanese Patent Application Laid-Open No. 2000-112548 and is publicly known, so a detailed explanation of its operation will be omitted. However, the positive temperature characteristic of depletion-type transistor M2 is canceled out by the negative temperature characteristic of transistor M3, thereby generating a reference voltage Vref that is not temperature dependent. In addition, since resistors R2 and R1 are provided in the source follower circuit section, by appropriately designing the resistance ratio, it is possible to generate the aforementioned reference voltage Vref of 0.05V to 0.5V based on the input voltage VDD.

[0026] (Variation) A modified example of the high-side switch IC10 of the above embodiment is shown in Fig. 4. In the modified high-side switch IC10 shown in Fig. 4, an N-channel MOS transistor is used instead of a P-channel MOS transistor as the switch transistor M1 connected between the voltage input terminal IN and the output terminal OUT, and a bootstrap circuit 14 consisting of a charge pump or the like is provided in the subsequent stage of the differential amplifier 12 so that the transistor M1 is turned on by a voltage that boosts the output voltage of the differential amplifier 12. In this modified example, the differential amplifier 12 is configured so that the reference voltage Vref is input to the non-inverting input terminal thereof, and the output voltage Vout is input to the inverting input terminal thereof.

[0027] If the N-channel transistor M1 is turned on by the output voltage of the differential amplifier 12 without providing the bootstrap circuit 14, M1 will be in an incompletely on state, and the output voltage Vout will be lower than the input voltage VDD by the threshold voltage of the MOS transistor, but by turning on transistor M1 with a voltage that boosts the output voltage of the differential amplifier 12, it is possible to turn it on completely and prevent the output voltage Vout from becoming low. Also, to achieve the same current supply capacity, using an N-channel MOS transistor instead of a P-channel MOS transistor has the advantage of being able to reduce the element size by about half, thereby enabling the IC chip size to be reduced.

[0028] The high-side switch IC10 may also be configured to include an overcurrent protection circuit that protects the switching transistor M1 from overcurrent, a current limit circuit that limits the output current Iout so that it does not exceed a predetermined value, and a thermal shutdown circuit that generates and outputs a signal to turn off the output transistor when it detects that the chip temperature has exceeded a predetermined value. Since the overcurrent protection circuit, current limit circuit, and thermal shutdown circuit in the high-side switch IC are well-known technologies, an example of the circuit configuration and operation will not be described here.

[0029] The invention made by the inventor has been specifically described above based on an embodiment, but the present invention is not limited to the above embodiment. For example, in the above embodiment, MOS transistors are used as transistors constituting the internal circuit of high-side switch IC10, but bipolar transistors may be used instead of MOS transistors. Furthermore, a discrete transistor may be used as transistor M1 to reduce on-resistance.

[0030] In addition, the high-side switch IC10 may be provided with an external terminal and a detection signal output circuit for outputting a detection signal to the outside when the overcurrent detection circuit detects an overcurrent or when the current limit circuit or thermal shutdown circuit detects an abnormal current or abnormal chip temperature. [Explanation of symbols]

[0031] 10...High-side switch IC, 11...Logic circuit, 12...Differential amplifier, 13...Reference voltage source, 14...Bootstrap circuit, M1...Switch transistor, CE...External terminal for control

Claims

1. A semiconductor integrated circuit device comprising: a switching transistor connected between a voltage input terminal to which a DC voltage is input and a voltage output terminal; an external terminal to which a control signal is input; and a control circuit that controls the switching transistor to an on state or an off state based on the control signal, The control circuit a reference voltage source that generates a reference voltage from the DC voltage input to the voltage input terminal; a differential amplifier that receives the reference voltage and the voltage at the voltage output terminal as inputs and outputs a voltage to be applied to a control terminal of the switching transistor; a logic circuit that generates a signal for controlling an operation state of the differential amplifier based on the control signal input to the external terminal; an inverting input terminal of the differential amplifier is connected to the reference voltage source, and a non-inverting input terminal of the differential amplifier is connected to the voltage output terminal; the differential amplifier controls the switching transistor to an on state when the control signal is at a first logic level, and controls the switching transistor to an off state when the control signal is at a second logic level, in response to an output signal of the logic circuit.

2. When the reference voltage is Vref and the output current flowing from the switching transistor to the voltage output terminal is Iout, 2. The semiconductor integrated circuit device according to claim 1, wherein the on-resistance Ron of the switching transistor has a characteristic that satisfies the condition Ron<Vref / Iout.

3. The differential amplifier a differential input stage having a pair of differential transistors and an output stage provided in a subsequent stage of the differential input stage; a control terminal of the transistor of the output stage is connected to the output node of the differential input stage, and a first switch element is provided between the control terminal and a ground point, the first switch element being controlled to be turned on and off based on a signal output from the logic circuit; 3. The semiconductor integrated circuit device according to claim 1, wherein when the control signal is at a second logic level, an operating current of the differential input stage is cut off, and the differential amplification operation is stopped while the switching transistor is maintained in an off state.

4. the switching transistor and the output stage transistor are configured as P-channel MOS transistors, 4. The semiconductor integrated circuit device according to claim 3, wherein the transistor in the output stage has a source terminal connected to the voltage input terminal, and is turned on when the first switch element is turned on when the control signal is at a second logic level, thereby maintaining the switch transistor in an off state.

5. a second switch element that is controlled to be turned on and off based on a signal output from the logic circuit is connected between the reference voltage source and a ground point; 5. The semiconductor integrated circuit device according to claim 3, wherein the second switch element is turned off when the control signal is at a second logic level, thereby causing the reference voltage source to stop operating.

6. the switching transistor is an N-channel MOS transistor, 4. The semiconductor integrated circuit device according to claim 3, wherein a bootstrap circuit for boosting the output level of said differential amplifier is provided between the output terminal of said differential amplifier and the control terminal of said switching transistor.

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