semiconductor chip

Abstract

The present disclosure relates to a semiconductor chip that makes it possible to provide a directional coupler having a wide frequency band and small area. The semiconductor chip comprises a directional coupler that uses a resistance bridge circuit constituted by first to third resistance circuit elements and a circuit to be measured. The technology according to the present disclosure can be applied, for example, to a vector network analyzer and the like.

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor chip, and more particularly to a semiconductor chip including a directional coupler having a wide frequency band and a small area. [Background technology]

[0002] A vector network analyzer includes a signal source, three receivers for R, A, and B channels, and a directional coupler for separating incident waves from reflected waves. Known directional couplers include those with a transmission line formed on a substrate and those using a waveguide (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 5-264835 Summary of the Invention [Problem to be solved by the invention]

[0004] To reduce the cost of vector network analyzers, a directional coupler with a wide frequency band and a small area is required.

[0005] The present disclosure has been made in view of the above circumstances, and makes it possible to provide a directional coupler that has a wide frequency band and a small area. [Means for solving the problem]

[0006] The semiconductor chip according to the first aspect of the present disclosure includes: A semiconductor chip including a directional coupler, the semiconductor chip including a first directional coupler that extracts a part of a test signal from a transmission circuit, and a first resistor circuit element and a second resistor circuit element that constitute a part of a second directional coupler that extracts a reflected signal of the test signal reflected by a circuit under test, the second directional coupler being configured such that the first resistor circuit element and the circuit under test that are connected in series are connected in parallel with the second resistor circuit element and the third resistor circuit element that are connected in series. Resistor Bridge Circuit the third resistor circuit element is disposed outside the semiconductor chip, the first and second resistor circuit elements include variable resistor circuit elements whose resistance values ​​are changeable, and the resistance values ​​of the first and second resistor circuit elements are adjusted so that a balanced condition is established in the resistor bridge circuit when a reference resistor circuit element is connected to a first input / output terminal that connects the circuit under test. .

[0007] In a first aspect of the present disclosure, A semiconductor chip including a directional coupler is provided with a first directional coupler that extracts a part of a test signal from a transmission circuit, and a first resistive circuit element and a second resistive circuit element that constitute a part of a second directional coupler that extracts a reflected signal of the test signal reflected by a circuit under test, and the second directional coupler is provided with the first resistive circuit element and the circuit under test that are connected in series, and the second resistive circuit element and the third resistive circuit element that are connected in series, and the second directional coupler is provided with a first directional coupler that extracts a part of a test signal from a transmission circuit, and a second directional coupler that extracts a reflected signal of the test signal reflected by a circuit under test, and the second directional coupler is provided with a first resistive circuit element and the circuit under test that are connected in series, and the second resistive circuit element and the third resistive circuit element that are connected in series, and the second directional coupler is provided with a second directional coupler that extracts a reflected signal of the test signal reflected by a circuit under test, and the second directional coupler is provided with a first directional coupler that extracts a part of a test signal reflected by a circuit under test, and the second directional coupler is provided with a first directional coupler that extracts a part of a test signal reflected by a circuit under test, and the second directional coupler is provided with a second ... Resistor Bridge Circuit the third resistor circuit element is disposed outside the semiconductor chip, the first and second resistor circuit elements include variable resistor circuit elements whose resistance values ​​are changeable, and the resistance values ​​of the first and second resistor circuit elements are adjusted so that a balanced condition is established in the resistor bridge circuit when a reference resistor circuit element is connected to a first input / output terminal that connects the circuit under test. .

[0008] A semiconductor chip may be a stand-alone device or a module that is incorporated into another device. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a block diagram showing a configuration example of a first embodiment of a vector network analyzer according to the present disclosure. [Figure 2] FIG. 1 is a diagram illustrating S parameters measured by a vector network analyzer. [Figure 3] FIG. 1 is a diagram illustrating S parameters measured by a vector network analyzer. [Figure 4] FIG. 2 is a diagram showing a specific circuit configuration of the directional coupler of FIG. [Figure 5] FIG. 10 is a block diagram showing a configuration example of a second embodiment of a vector network analyzer according to the present disclosure. [Figure 6] FIG. 6 is a diagram showing a specific circuit configuration of the directional coupler of FIG. 5. [Figure 7] FIG. 2 is a diagram illustrating a first modified example of the directional coupler of the first embodiment. [Figure 8] FIG. 10 is a diagram illustrating a second modified example of the directional coupler of the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, with reference to the accompanying drawings, a description will be given of a mode for carrying out the technology of the present disclosure (hereinafter referred to as an embodiment). Note that in this specification and the drawings, components having substantially the same functional configuration are designated by the same reference numerals, and redundant description will be omitted. The description will be given in the following order. 1. Configuration example of first embodiment of VNA 2. Explanation of VNA measurement parameters 3.Specific circuit configuration example of directional coupler 4. Configuration example of second embodiment of VNA 5.Specific circuit configuration example of directional coupler 6.Other circuit configuration examples of directional couplers

[0011] <1. Configuration Example of First Embodiment of VNA> FIG. 1 is a block diagram showing an example of the configuration of a first embodiment of a vector network analyzer (hereinafter referred to as a VNA) according to the present disclosure.

[0012] The VNA 1 is a measurement device that connects a circuit under test 2 (hereinafter referred to as DUT 2) between two ports P1 and P2 and measures the S parameters (reflection characteristics, transmission characteristics) of the DUT 2.

[0013] The VNA 1 has a VNA chip 21 that integrates circuits such as a reference signal generating circuit 11, a transmitting circuit 12, a directional coupler 13, an Rch (R channel) receiving circuit 14, an Ach (A channel) receiving circuit 15, a Bch (B channel) receiving circuit 16, and multiple input / output terminals 17 onto a single chip.

[0014] Of the multiple input / output terminals 17 of the VNA chip 21, input / output terminal 17-1 is a terminal that outputs a test signal and is connected to port P1, input / output terminal 17-2 is a terminal that inputs a power supply voltage VDD, input / output terminal 17-3 is a terminal that is connected to ground (GND), and input / output terminals 17-4 and 17-5 are connected to port P2 via the balun 22 and are terminals that input a signal that has passed through DUT2 (transmitted signal).

[0015] The reference signal generating circuit 11 is composed of a PLL circuit etc., and generates a reference signal that serves as a reference for the circuits within the chip, and supplies it to the transmitting circuit 12, directional coupler 13, Rch receiving circuit 14, Ach receiving circuit 15, and Bch receiving circuit 16, respectively.

[0016] The transmitting circuit 12 receives the reference signal from the reference signal generating circuit 11 and transmits a predetermined frequency f b and supplies the test signal to the directional coupler 13. For example, the transmission circuit 12 may generate a test signal having a frequency f bA sine wave of the above can be generated and output as a test signal.

[0017] The directional coupler 13 divides the test signal from the transmitter circuit 12 that is input to the DUT 2, and separates the reflected signal that is the test signal reflected by the DUT 2. More specifically, the directional coupler 13 outputs a portion of the test signal from the transmitter circuit 12 to the input / output terminal 17-1, and outputs the remaining divided test signal to the Rch receiver circuit 14. The directional coupler 13 also extracts the reflected signal that is reflected by the DUT 2 and input to the Ach receiver circuit 15.

[0018] The Rch receiving circuit 14 receives the input signal supplied from the directional coupler 13 .

[0019] The Ach receiving circuit 15 receives the reflected signal supplied from the directional coupler 13 .

[0020] The Bch receiving circuit 16 receives the transmitted signal that has passed through the DUT2 and is input via the port P2.

[0021] <2. Explanation of VNA measurement parameters> The S parameters measured by the VNA 1 will be described with reference to FIGS.

[0022] The signal source 51 generates a single frequency f b The output test signal is input to the circuit under test 53 via the directional coupler 52.

[0023] The directional coupler 52 includes an R-channel side directional coupler 61 (hereinafter referred to as the Rch directional coupler 61) and an A-channel side directional coupler 62 (hereinafter referred to as the Ach directional coupler 62). A part of the test signal, which is an incident wave, is separated by the Rch directional coupler 61 and input to the Rch receiving circuit. A reflected signal reflected by the DUT 53 is separated by the Ach directional coupler 62 and input to the Ach receiving circuit. Meanwhile, the test signal that has passed through the DUT 53 is input to the Bch receiving circuit.

[0024] By observing the reflected signal received by the Ach receiving circuit with the test signal received by the Rch receiving circuit as a reference, the VNA1 can measure the reflectance as the transfer characteristic from port P1 to port P1 of the circuit under test 53. In other words, the VNA1 can measure the reflectance = Ach signal / Rch signal.

[0025] Furthermore, by observing the transmitted signal received by the Bch receiving circuit with the test signal received by the Rch receiving circuit as a reference, the VNA 1 can measure the transmittance as a transfer characteristic from port P1 to port P2 of the circuit under test 53. In other words, the VNA 1 can measure the transmittance = Bch signal / Rch signal.

[0026] Therefore, ideally, the test signal from signal source 51 would be distributed only to the Rch receiving circuit, and the reflected signal from circuit under test 53 would be distributed only to the Ach receiving circuit, as shown in the upper part of Figure 3. However, in reality, leakage (isolation) exists. A larger ratio of the desired signal to the leakage indicates higher directivity, which is desirable.

[0027] As shown in the lower part of FIG. 3, the port to which the signal source 51 is connected is the first port 71, the port to which the circuit under test 53 is connected is the second port 72, the port to which the Rch receiving circuit is connected is the third port 73, and the port to which the Ach receiving circuit is connected is the fourth port 74. If the insertion loss of the directional coupler 52 is S21, the coupling degree of the test signal is S31, the isolation is S32, the coupling degree of the reflected signal is S42, and the isolation is S41, then the directivity D of the Rch side is Rch is D Rch =S31-S21-S32, and the directivity of Ach side D Ach is D Ach = S21 + S42 - S41. Rch For the insertion loss S21, the directivity D Rch However, the directionality of the Ach side D Ach Regarding the insertion loss S21, only the directivity D Ach In order to degrade the directivity D Ach It is more difficult to raise the

[0028] <3. Specific circuit configuration example of directional coupler> FIG. 4 shows a specific circuit configuration of the directional coupler 13 in FIG.

[0029] The directional coupler 13 has resistive elements 101 to 103 and an R-channel output terminal 104, and resistive elements 111 to 113 and an A-channel output terminal 114. Here, the resistive elements 101 to 103 and the R-channel output terminal 104, and the resistive elements 111 and 112 and the A-channel output terminal 114 are formed within the VNA chip 21, but the resistive element 113 is formed outside the VNA chip 21. The input / output terminal 17-1 is a terminal from which a test signal is output, and the input / output terminal 17-6 is a terminal for connecting the resistive element 112 formed within the chip with the resistive element 113 formed outside the chip.

[0030] Resistance elements 101 to 103 constitute an Rch directional coupler, which extracts a portion of the test signal input from the transmission circuit 12 and outputs it to the Rch reception circuit 14 via the R channel output terminal 104. That is, the test signal input from the transmission circuit 12 is distributed to the resistance elements 111 and 112 and the resistance element 102, and the test signal that flows to the resistance element 102 is output to the Rch reception circuit 14 via the R channel output terminal 104. Resistance element 103 is a termination resistor inside the Rch directional coupler.

[0031] Resistance elements 111 to 113 configure the Ach directional coupler, which outputs a test signal input from the transmitter circuit 12 to the DUT 2 via the input / output terminal 17-1, and also extracts a reflected signal reflected by the DUT 2 and outputs it to the A-channel output terminal 114. The reflected signal output to the A-channel output terminal 114 is supplied to the Ach receiver circuit 15. The resistance elements 111 and 112 of the Ach directional coupler are configured as variable resistance elements whose resistance values ​​can be changed. The resistance value of the resistance element 111 is R1, and the resistance value of the resistance element 112 is R2. The resistance element 113 is a termination resistor inside the Ach directional coupler.

[0032] When measuring S parameters, a DUT 2 is connected to the input / output terminal 17-1. However, when adjusting the VNA chip 21, for example, when adjusting the VNA chip 21 before shipping, a reference resistor 121 having a reference resistance value is connected to the input / output terminal 17-1 as shown in FIG. 4. The reference resistance value is generally 50 Ω. The resistance value of the resistor 113 is set to the resistance value of the reference resistor 121 having the reference resistance value. In this embodiment, the reference resistance value is 50 Ω, and the resistance values ​​R3 and R4 are also 50 Ω in total.

[0033] The resistor elements 111 to 113 constituting the A-ch directional coupler, together with the reference resistor element 121, form a resistor bridge circuit. When adjusting the VNA chip 21, the resistance values ​​of the variable resistor elements 111 and 112 are adjusted so that the balance condition of the bridge circuit is met. That is, in a resistor bridge circuit in which the resistor element 111 (first resistor element) and the reference resistor element 121 connected in series are connected in parallel with the resistor element 112 (second resistor element) and the resistor element 113 (third resistor element) connected in series, the resistance values ​​R1 and R2 of the resistor elements 111 and 112 are adjusted so that R1 / R2=R3 / R4 is met. In other words, when the balance condition of the bridge circuit is met, the currents flowing on the upper and lower sides of the bridge circuit are equal, and the current flowing to the A-channel output terminal 114 becomes zero. Therefore, the resistance values ​​R1 and R2 of the resistor elements 111 and 112 are adjusted so that the current flowing to the A-channel output terminal 114 becomes zero.

[0034] When measuring S parameters after adjusting the resistance values ​​of the resistive elements 111 and 112, if DUT2 is connected to the input / output terminal 17-1, a current according to the impedance of DUT2 flows in the upper side of the bridge circuit, and a current according to the resistance value R4=50Ω of the resistive element 113 flows in the lower side of the bridge circuit. In other words, a signal according to the impedance of DUT2 based on the resistance value R4=50Ω of the resistive element 113 is output to the A-channel output terminal 114, and a reflected signal can be detected.

[0035] As described above, by using a resistor bridge circuit, directional coupler 13 can be made compact while still supporting a wide frequency band, and can be incorporated into a semiconductor chip. By realizing directional coupler 13 on a semiconductor chip as VNA chip 21, a VNA with a wide frequency band and a small area can be provided at low cost.

[0036] By using variable resistance elements whose resistance values ​​can be changed for the resistor elements 111 and 112 that constitute part of the resistor bridge circuit, it is possible to adjust the resistance values ​​R1 and R2 so that the balance condition of the bridge circuit is satisfied, thereby improving the directivity of the directional coupler 13 and enhancing the performance of the directional coupler 13.

[0037] Furthermore, since DUT2 is arranged outside the VNA chip 21 and connected to the directional coupler 13 via the input / output terminal 17-1, the resistor element 113 corresponding to DUT2, out of the resistor elements 112 and 113 of the directional coupler 13 connected in parallel with the resistor element 111 and DUT2, is also arranged outside the VNA chip 21 and connected via the input / output terminal 17-6. By matching the arrangement conditions of the upper and lower sides of the bridge circuit in this way and ensuring symmetry, degradation of directivity is prevented and the performance of the directional coupler 13 is improved.

[0038] 4. Configuration Example of Second Embodiment of VNA FIG. 5 is a block diagram showing a configuration example of a vector network analyzer (VNA) according to a second embodiment of the present disclosure.

[0039] In the second embodiment of Figure 5, parts corresponding to those in the first embodiment shown in Figure 1 are given the same symbols, and explanations of those parts will be omitted as appropriate, with the explanation focusing on parts that differ from the first embodiment.

[0040] In the first embodiment described above, the VNA 1 uses a single-ended signal as the test signal, but the second embodiment differs in that it uses a differential test signal.

[0041] In the VNA 1 of the second embodiment, the transmission circuit 12 and directional coupler 13 in the first embodiment shown in Fig. 1 are replaced with a transmission circuit 12' and a directional coupler 13'. Also, an input / output terminal 17-11 is added as one of the multiple input / output terminals 17. The other configuration of the VNA 1 is the same as that of the VNA 1 of Fig. 1.

[0042] The transmitting circuit 12' receives a predetermined frequency f b The test signal is generated as a differential signal and supplied to the directional coupler 13'. b A first test signal and a second test signal having an anti-phase relationship are generated in a transmitting circuit 12' and input to a directional coupler 13'.

[0043] The directional coupler 13' operates in the same manner as the directional coupler 13 of the first embodiment described above with respect to the first test signal out of the first and second test signals from the transmitter circuit 12'. That is, the directional coupler 13' outputs a portion of the first test signal from the transmitter circuit 12' to the input / output terminal 17-1, and outputs the remaining divided first test signal to the Rch receiver circuit 14. The directional coupler 13' also outputs the reflected signal reflected by the DUT2 and input to the Ach receiver circuit 15.

[0044] On the other hand, the directional coupler 13' distributes the second test signal in the same manner as the first test signal, and outputs the signal to the input / output terminal 17-11.

[0045] The isolation characteristics between ports P1 and P2, which are connected to the DUT 2, are important for the performance of the VNA 1. If there is a large amount of leakage between ports P1 and P2, the transmittance cannot be measured accurately. One cause of leakage between ports P1 and P2 is leakage via an IO ring (not shown in FIG. 5) formed at a position overlapping multiple input / output terminals 17 of the VNA chip 21, as indicated by the dashed arrow in FIG. 5. In other words, part of the test signal output to port P1 reaches input / output terminals 17-4 and 17-5 corresponding to port P2 via the IO ring within the chip, which is a path other than between ports P1 and P2.

[0046] Therefore, the VNA1 in the second embodiment differentiates the test signals, outputs a first test signal to the input / output terminal 17-1, and outputs a second test signal to the input / output terminal 17-11. As a result, even if a leak occurs between ports P1 and P2, the leak signal passing through the IO ring is also a differential signal, so it can be essentially canceled out, and the signal reaching the input / output terminals 17-4 and 17-5 via the IO ring can be reduced. This improves the isolation characteristics between ports P1 and P2, and further improves the performance of the VNA1.

[0047] <5. Specific circuit configuration examples of directional couplers> FIG. 6 shows a specific circuit configuration of the directional coupler 13' of FIG.

[0048] The directional coupler 13' includes a directional coupler 13A that processes a first test signal, which is a differential signal output from the transmission circuit 12', and a directional coupler 13B that processes a second test signal. The configurations of the directional coupler 13A for the first test signal and the directional coupler 13B for the second test signal are the same as those of the directional coupler 13 of the first embodiment.

[0049] The resistive elements constituting the directional coupler 13A for the first test signal are assigned the same reference numerals as those in the directional coupler 13 of the first embodiment, and have the same configuration as the directional coupler 13 of the first embodiment.

[0050] The directional coupler 13B for the second test signal has resistive elements 201 to 203 and resistive elements 211 to 213. The resistive elements 201 to 203 correspond to the resistive elements 101 to 103 of the directional coupler 13A for the first test signal, and the resistive elements 211 to 213 correspond to the resistive elements 111 to 113 of the directional coupler 13A for the first test signal. The resistive elements 211 and 212 are configured as variable resistive elements, and the resistance value of the resistive element 211 is set to R 11 , the resistance value of the resistive element 212 is R 12 , the resistance value of the resistive element 221 is R 13 , the resistance value of the resistive element 213 is R14 Let's say.

[0051] Here, the resistive elements 201 to 203 and the resistive elements 211 and 212 are formed inside the VNA chip 21, and the resistive elements 213 and 221 are formed outside the VNA chip 21, which is also the same as the directional coupler 13A for the first test signal, in other words, the directional coupler 13 of the first embodiment.

[0052] Input / output terminal 17-11 corresponds to input / output terminal 17-1 for the first test signal, and is a terminal from which the second test signal is output. A resistor 221 corresponding to reference resistor 121 for the first test signal is connected to the outside of VNA chip 21 of input / output terminal 17-11. A resistor 213 corresponding to resistor 113 for the first test signal is connected to the outside of VNA chip 21 of input / output terminal 17-12. The resistance values ​​of resistors 221 and 213 are 50Ω, the same as those of reference resistor 121 and resistor 113, respectively.

[0053] The directional coupler 13' using the first and second test signals, which are differential signals, can be configured as described above. The first test signal is output from port P1 via input / output terminal 17-1 to DUT2. The second test signal is output to dummy resistor element 221 via input / output terminal 17-11.

[0054] In the second embodiment described above, the directional coupler 13' can be made compact and incorporated into a semiconductor chip by using a resistor bridge circuit, while still being compatible with a wide frequency band. By realizing the directional coupler 13' on a semiconductor chip as the VNA chip 21, a VNA with a wide frequency band and a small area can be provided at low cost.

[0055] The directional coupler 13A for the first test signal and the directional coupler 13B for the second test signal have the same resistor bridge circuit configuration, and therefore, similar to the first embodiment described above, the performance of the directional coupler 13′ can be improved.

[0056] <6. Other circuit configuration examples of directional couplers> In the first and second embodiments described above, the directional coupler 13 (13′) is configured only with a plurality of resistive elements. However, the directional coupler 13 can also be configured with a circuit including circuit elements other than resistive elements, such as capacitive elements, inductors, or semiconductor elements.

[0057] 7 and 8, a configuration example of the directional coupler 13 including circuit elements other than the resistive elements will be described.

[0058] 7 and 8, parts common to the directional coupler 13 of the first embodiment shown in FIG. 4 are denoted by the same reference numerals, and the description of these parts will be omitted as appropriate.

[0059] FIG. 7 shows a first modification of the directional coupler 13 shown in FIG. 4, which is an example of a directional coupler 13 including a capacitive element as a circuit element other than a resistive element.

[0060] 7, compared to the directional coupler 13 of the first embodiment, a capacitance element 151 is added between the resistance element 111 and the input / output terminal 17-1, and a capacitance element 152 is added between the resistance element 112 and the input / output terminal 17-6. Both the capacitance elements 151 and 152 are capacitance elements with variable capacitance, and are provided to adjust the balance conditions between the upper and lower parts of the bridge circuit.

[0061] FIG. 8 shows a second modification of the directional coupler 13 shown in FIG. 4, which includes an inductor as a circuit element other than a resistive element.

[0062] 8, compared to the directional coupler 13 of the first embodiment, an inductor 161 is added between the resistive element 111 and the input / output terminal 17-1, and an inductor 162 is added between the resistive element 112 and the input / output terminal 17-6. By providing the inductors 161 and 162, the frequency characteristics are improved, and the test signal can be made wider in bandwidth.

[0063] As described above, directional coupler 13 can configure a resistance bridge circuit with the circuit under test using at least one of a resistance element, a capacitance element, an inductor, or a resistance circuit element that is a semiconductor element.

[0064] The embodiments of the present disclosure are not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the technology of the present disclosure.

[0065] For example, it is possible to adopt a form in which all or part of the above-described embodiments are combined.

[0066] The effects described in this specification are merely examples and are not limiting, and there may be effects other than those described in this specification.

[0067] The technology of the present disclosure can have the following configurations. (1) A semiconductor chip including at least a portion of a directional coupler, Directional coupler using a resistive bridge circuit a first resistor circuit element and a second resistor circuit element that form part of the Equipped with 、 The resistor bridge circuit is composed of the first resistor circuit element, the second resistor circuit element, a third resistor circuit element provided outside the semiconductor chip, and a circuit to be measured. Semiconductor chip. (2) The resistor bridge circuit is configured such that the first resistor circuit element and the circuit under test are connected in series, and the second resistor circuit element and the third resistor circuit element are connected in series, and are connected in parallel. The semiconductor chip according to (1) above. (3) the first and second resistance circuit elements are variable resistance circuit elements whose resistance values ​​are changeable; When a reference resistive circuit element is connected to an input / output terminal that connects the circuit under test to the directional coupler, the resistance values ​​of the first and second resistive circuit elements are adjusted so that a balanced condition is established in the resistive bridge circuit. The semiconductor chip according to (2) above. (4) The third resistor circuit element is formed outside the semiconductor chip. The semiconductor chip according to (2) or (3) above. (5) The test signal may further include a transmission circuit that generates a test signal of a predetermined frequency and supplies the test signal to the directional coupler. The semiconductor chip according to any one of (1) to (4) above. (6) The transmission circuit generates the test signal as a differential signal and supplies it to the directional coupler. The semiconductor chip according to (5) above. (7) the test signals of the differential signal are a first test signal and a second test signal; The directional coupler includes a first directional coupler for a first test signal and a second directional coupler for a second test signal. The semiconductor chip according to (6) above. (8) Each of the first and second directional couplers is configured using the resistor bridge circuit. The semiconductor chip according to (7) above. (9) the resistor bridge circuit is configured such that the first resistor circuit element and the circuit under test are connected in series, and the second resistor circuit element and the third resistor circuit element are connected in series, and are connected in parallel; The third resistor circuit element is formed outside the semiconductor chip. The semiconductor chip according to (8) above. [Explanation of symbols]

[0068] 1 Vector Network Analyzer (VNA), 2 Circuit under test, 11 Reference signal generating circuit, 12, 12' Transmitting circuit, 13, 13', 13A, 13B Directional coupler, 14 Rch (R channel) receiving circuit, 15 Ach (A channel) receiving circuit, 16 Bch (B channel) receiving circuit, 17-1 to 17-6, 17-11, 17-12 Input / output terminals, 21 VNA chip, 22 Balun, 101 to 103 Resistors, 104 R channel output terminal, 111 to 113 Resistors, 114 A channel output terminal, 121 Reference resistor, 201 to 203 Resistors, 211 to 213 Resistors, 221 Resistor

Claims

1. A semiconductor chip including a directional coupler, a first directional coupler for extracting a portion of the test signal from the transmission circuit; a first resistive circuit element and a second resistive circuit element that constitute a part of a second directional coupler that extracts a reflected signal of the test signal reflected by a circuit under test; Equipped with the second directional coupler is configured by a resistor bridge circuit in which the first resistor circuit element and the circuit under test connected in series, and the second resistor circuit element and the third resistor circuit element connected in series are connected in parallel, the third resistive circuit element is disposed outside the semiconductor chip; the first and second resistance circuit elements include variable resistance circuit elements whose resistance values ​​are changeable; The resistance values ​​of the first and second resistive circuit elements are adjusted so that a balanced condition is established in the resistive bridge circuit when a reference resistive circuit element is connected to a first input / output terminal that connects the circuit under test. Semiconductor chip.

2. The test signal generating circuit further includes a transmission circuit that generates the test signal of a predetermined frequency and supplies the test signal to the first directional coupler. The semiconductor chip according to claim 1 .

3. the transmission circuit generates the test signal, which is a differential signal including a first test signal and a second test signal; The circuit under test is configured so that only one of the first test signal and the second test signal is supplied to the circuit under test. The semiconductor chip according to claim 1 .

4. One of the first test signal and the second test signal is supplied to the circuit under test via the first input / output terminal, and the other of the first test signal and the second test signal is supplied to a dummy resistor circuit element via the second input / output terminal. The semiconductor chip according to claim 3 .

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