Channelized filters using semiconductor technology.

Abstract

An exemplary channelized filter implemented in semiconductor technology includes a dielectric substrate with metal traces fabricated from semiconductor on one side and input and output ports. Signal traces connected between the input and output ports carry the signal to be filtered. Filter traces are connected at intervals along the length of the signal traces to provide frequency-varying reactance. Ground traces provide a ground reference. A silicon housing with a cavity fabricated from semiconductor has a metal layer deposited on the housing. The periphery of the housing is sized to engage with corresponding ground traces on the periphery of the substrate. Separate cavity walls individually surround each of the filter traces, thereby providing electromagnetic field shielding. A metal-to-metal conductive bond is formed between the cavity walls that engage with the ground traces to establish a common ground reference. The filter traces are preferably serpentine to minimize the footprint area of ​​the substrate.

Description

[Technical Field]

[0001] Embodiments of the present invention relate to a channelized microstrip filter having an enclosure with micromachined interiors fabricated using semiconductor fabrication techniques, which improves the performance of the microstrip filter and provides manufacturability with repeatable performance results. [Background technology]

[0002] High-frequency microstrip filters, i.e., at frequencies above 1 GHz, have been manufactured using a variety of materials and techniques. It is desirable to test subassemblies before assembling them into larger circuit assemblies to ensure the assemblies are composed of known good devices. However, testing high-frequency modular microstrip filters to ensure acceptable performance before assembling them into larger assemblies has proven to be extremely difficult. One reason for this is that the filter's performance is sensitive to the housing in which it is integrated. If a modular microstrip filter is found to fail to meet performance specifications after being installed as part of a larger assembly, it may require tedious field adjustments or the modular microstrip filter may need to be removed and replaced with another modular microstrip filter to achieve acceptable filter performance in the larger assembly.

[0003] To electromagnetically isolate RF filters, housings such as sheet metal, machined metal, or cast metal may be used to enclose the microstrip filter. However, variations in the physical dimensions of the metal housing often result in undesirable variations in electromagnetic coupling within the filter element, resulting in variations in the performance of the filter.

[0004] As part of the overall drive for miniaturization of electronic circuits, there is a desire to minimize the area occupied by high frequency filters. To reduce the overall area of ​​a filter, the individual internal elements of the filter must be placed closer together. This increases the likelihood of electromagnetic field interactions between the elements, compounding the challenge of making it difficult to account for such interactions when designing filters, and introducing undesirable variability that adversely affects repeatable performance from unit to unit.

[0005] There is a need for improved high frequency microstrip filters that can minimize these problems. Summary of the Invention

[0006] It is an object of embodiments of the present invention to provide an improved modular microstrip filter that can minimize the above-mentioned problems.

[0007] An exemplary semiconductor-implemented channelized filter includes a dielectric substrate having metal traces fabricated with semiconductor technology on one side thereof, and input and output ports. Signal traces connected between the input and output ports carry signals to be filtered. Filter traces are connected at intervals along the length of the signal traces to provide frequency-varying reactance. Ground traces provide a ground reference. A silicon enclosure having a cavity fabricated in semiconductor has a metal layer deposited thereon. The periphery of the enclosure is sized to engage with corresponding ground traces on the periphery of the substrate. Individual cavity walls individually surround each filter trace, thereby blocking electromagnetic fields. Metal-to-metal conductive bonds are formed between the cavity walls that engage with the ground traces to establish a common ground reference. The filter traces are preferably serpentine to minimize the footprint area of ​​the substrate. [Brief explanation of the drawings]

[0008] Features of exemplary embodiments of the present invention will become apparent from the detailed description, claims, and accompanying drawings. [Figure 1] FIG. 1 is a perspective view of a high frequency channelized filter according to an embodiment of the present invention with the housing in an open position. [Figure 2] FIG. 2 is a perspective view of the channelized filter shown in FIG. 1 with the housing in the final assembly position. [Figure 3] FIG. 3 is a representative cross-sectional view illustrating an assembled channelized filter according to an embodiment of the present invention. [Figure 4] FIG. 4 is a graph illustrating performance characteristics of an exemplary channelization filter over a range of frequencies, in accordance with an embodiment of the present invention. [Figure 5] FIG. 5 is a partial perspective view of an alternative embodiment of the channelized filter of the present invention, illustrating the ability to test the performance of the filter from the bottom surface of the planar substrate. [Figure 6] FIG. 6 is a partially exploded top view of the embodiment of FIG. DETAILED DESCRIPTION OF THE INVENTION

[0009] One aspect of the present invention recognizes the difficulty associated with reproducibly manufacturing high frequency channelized filters that have consistent performance without the need for post-manufacturing adjustments by minimizing cross-coupling of electromagnetic fields between filter elements. Effective element shielding is important to minimize such cross-coupling, particularly between adjacent elements, and minimize undesirable unit-to-unit performance variations. Effective element shielding also allows for the use of serpentine filter elements to minimize the overall area footprint of the filter and allow for compact filter elements.

[0010] Another aspect of the present invention recognizes input / output coupling improvements that facilitate the ability to reliably test the performance of high frequency modular filters prior to mounting the filters in a larger electronic assembly. In one embodiment, testing is performed through ports on the bottom side of the board opposite the board containing the filter elements, facilitating test probe access and connection to a larger circuit assembly.

[0011] FIG. 1 illustrates a perspective view of a high-frequency channelized filter 100, e.g., a microstrip filter, according to one embodiment of the present invention, comprising a substrate 105 and a housing 110 in an open position. The term "channelized" is used herein to refer to the use of conductive channels to isolate individual elements of the filter, as opposed to a single housing space that encases multiple elements or the entire filter / circuit. A primary signal conductor (transmission line) 115 is disposed on the top surface of the substrate 105, preferably made of a low-loss dielectric such as silicon carbide, alumina, InP, GaAs, or quartz, and extends between an input port 120 and an output port 125. A reference conductor 130, which functions as a ground, extends across various regions of the top surface of the substrate 105 and is interconnected by multiple vias 135 to a reference conductor / ground 140 located across substantially the entire bottom surface of the substrate 105. A number of individual filter elements 145, 150, 155, and 160 are selected to provide frequency-varying values ​​of inductance and / or capacitance at their respective connection points to the primary signal conductor 115. The combined effect of selected inductance and capacitance values ​​of the filter elements positioned along the signal line defines the passband and rejection characteristics of the illustrated bandpass microstrip filter.

[0012] When in the closed position, the housing 110 substantially surrounds the upper periphery of the substrate 105. The housing 110 is preferably fabricated from silicon and has a flat surface 165 positioned to engage the top surface of the substrate 105. The housing 110 includes a plurality of cavities 170, preferably formed by deep reactive ion etching (DRIE) for micro-precision dimensions. Silicon micromachining allows for precise control over the shape of the electromagnetic cavities 170 of the channeled microstrip filter. The cavities 170 correspond to areas on the top surface of the substrate 105 that serve to individually encapsulate the filter elements and signal lines. A surface portion of the flat surface 165 is conductive, i.e., preferably plated with a good conductor such as gold, and is positioned to engage the reference / ground region 130. The vertical sidewalls 175 and bottom 180 of the cavities formed in the cover are also preferably conductive, i.e., plated with a good conductor such as gold. Thus, when the housing 110 is placed in the assembled position to engage the top surface of the substrate 105, all surfaces of the housing facing the substrate are continuously conductive and connected to ground 130. The edges of the interior walls formed by the etched cavities 170 in the housing 110 are positioned to correspond to and engage corresponding ground areas 130, including the ground areas inside the periphery that isolate the individual filter elements. Thus, each individual filter element is enclosed above the substrate in a separate, grounded volume / chamber, providing isolation between the filter elements and essentially eliminating undesirable cross-coupling. Cutouts 190 in the end walls of the housing 110 provide openings for accessing the input 120 and output 125 signal lines. This not only facilitates connecting the channelized microstrip filter's input and output signal lines to a larger circuit assembly, but also allows for temporary attachment of probes for testing the filter prior to implementation in a larger circuit assembly.

[0013] FIG. 2 shows a perspective view of channelized filter 100 with housing 110 in the final assembly position mated with substrate 105, providing a continuous perimeter ground connection to substrate ground 130, except for cutout portion 190. Additionally, each of the interior walls defined by etched regions 170 in housing 110 engages a corresponding ground region 130 on substrate 105. As can be seen with reference to FIG. 1 , each of elements 145, 150, 155, and 160 is completely surrounded on and above substrate 105 by a metallic ground plane, with only the portion of each element that forms a connection with signal line 115 extending outside its respective metal housing. Ground 140 extends substantially across the entire bottom surface of substrate 105 and is connected to the ground on the top side of substrate 105 by a plurality of vias 135 distributed throughout the ground region, such that each of the filter elements is also surrounded by a metallic ground on the bottom side of substrate 105. The degree of encapsulation of the filter elements minimizes cross-coupling between elements and provides highly effective electromagnetic shielding to prevent coupling to circuitry external to the channeled microstrip filter. To provide an effective, continuous electromagnetic ground for the metal 130 on the top surface of the substrate and the metal 140 on the bottom surface of the substrate in the high frequency range in which the channeled microstrip filter operates, the metal on each of the top and bottom surfaces is preferably connected by multiple vias spaced 0.1 wavelengths or less at the highest frequency of operation. Preferably, the conductive layer on surface 165 of housing 110 that engages with the conductive metal 130 on substrate 105 is bonded to one another using gold-to-gold thermocompression bonding for micron-precision assembly.

[0014] Exemplary circuit elements are implemented by traces 145, 150, 155, and 160, as shown in FIG. 1 . However, those skilled in the art will understand that these filter elements are merely illustrative of various types and numbers of filter elements and layouts, and that other filter configurations and layouts can be used to provide desired frequency selectivity using the techniques of embodiments of the present invention. For example, conductor 115 in different filter topologies need not be continuous between input and output or DC shorted. That is, conductor 115 can be made discontinuous by an element such as a “pi-of-cap,” which introduces a gap consisting of three capacitors in tandem: a shunt capacitor, a series capacitor, and a second shunt capacitor. Similarly, short-circuited shunt stubs can be open-circuited shunt stubs, coupled-line stubs, or higher-order subcircuits consisting of an inductive segment followed by a capacitive segment.

[0015] To minimize the footprint area occupied by the filter, the individual filter elements snake along their length. The signal line 115, the metal ground traces 130 on the top surface of the substrate, and the filter elements lie in a common plane parallel to the plane of the substrate. The filter elements snake within this plane. As used herein, "snake" means turning at one or more angles within the same plane, preferably at an angle of 45 degrees or greater. Using 90 degrees as an example, filter element 160 is composed of a first segment 161 connected to signal line 115, a second segment 162 coupled to the end of segment 161 and perpendicular to segment 161, and a segment 163 coupled to the end of segment 162 and perpendicular to segment 162 and parallel to segment 161. In comparison, conventional filter elements would typically extend in a straight line, which would require a substrate significantly wider and / or longer than substrate 105 and would cause the substrate associated with the filter to have a significantly larger footprint area. In conventional "open-face" filters (those that do not use channelized filter elements), the serpentine approach to reducing the filter's footprint poses serious problems. Such an approach significantly increases the design effort because interactive coupling from one filter element to another or to a signal line requires repeated electromagnetic simulations and trial-and-error experiments to resolve issues such as elevated return loss, distorted falloff slope, and undesirable spikes in stopband rejection. Furthermore, the final design results from such an approach are sensitive to manufacturing tolerances and the height and width of the housing channel due to cross-coupling of all elements through empty space. Ground segments 131, 132, and 133 are spaced apart from the segments of filter element 160 and function to encompass the entire serpentine length of the filter element. These ground segments, in combination with corresponding mating walls of the associated cavities, provide an effective ground chamber for the entire serpentine filter element 160, except for the small portion of element 160 that connects to signal line 115.

[0016] To prevent undesired cross-coupling between filter element segment 163 and segment 161, ground segment 132 is disposed therebetween and, together with the corresponding mating walls of the associated cavity, provides insulation between these two segments. Ground segment 131 also functions to provide insulation between filter element segment 161 and the parallel portion of signal line 115. Ground segment 133 provides insulation between filter element segment 163 and an adjacent filter element 155 having a portion parallel to segment 163. Of course, the walls of the associated cavities mating with ground segments 131 and 133 complete the corresponding chambers that provide insulation.

[0017] 3 shows a representative cross section of an assembled channelized filter 100 with the housing 110 mated with the substrate 105. A layer of gold plating 310 covers the inner surface of the housing 110 and the surface 165 that mates with the metal gland 130 on the top surface of the substrate 105. The housing is fabricated from a micro-machined silicon wafer onto which a metal layer is deposited, preferably with a peak-to-valley roughness of less than 1 micron. Such smoothness contributes to consistent performance and reduced loss, especially at high frequencies.

[0018] Representative vias 135 provide electrical continuity between the top and bottom ground metallization on the substrate. In one embodiment, the overall height 320 of the housing 110 is approximately 1 mm, the height 325 of the internal cavity is approximately 0.635 mm, and the width 330 of the cavity is approximately 0.800 mm. These dimensions are consistent with the response of the exemplary filter described with respect to FIG. 4.

[0019] FIG. 4 is a graph 400 illustrating the performance characteristics of the exemplary channelized filter 100 over the frequency range of 0 GHz to 5 GHz. The vertical axis represents decibels (dB), and the horizontal axis represents frequency in gigahertz. Curve 405 illustrates the bandpass filter's transmission characteristic (S21), showing a relatively low signal loss passband from approximately 1.5 GHz to 3.5 GHz, with increasing signal loss below and above this range. Curve 410 illustrates the input return loss (S11), which begins to increase at approximately 1 GHz and returns to a relatively low value at approximately 4 GHz. The input return loss within the bandpass filter range is a minimum of 20 dB. These filter characteristics of the exemplary channelized microstrip filter 100 with compressed, folded, and serpentine filter elements compare favorably to those of conventional microstrip filters that occupy a substantially larger area than filter 100 and use linear filter elements.

[0020] 5 and 6 are partial perspective views of an alternative embodiment 500 of a channelized filter that includes a lower access port on the bottom surface 505 of a planar substrate 510 that provides the ability to engage a probe to test the performance of the filter. Only one of two exemplary input / output ports 515 is shown because a differentiating feature of filter 500 relative to filter 100 relates to the input / output ports being accessible from the bottom surface 505 of substrate 510, as opposed to access to the input / output ports located on the top surface of the substrate for filter 100.

[0021] FIG. 5 shows a partial view of the bottom surface 505 of substrate 510, and FIG. 6 shows a partial view of the top surface 520 of substrate 510. Referring to FIG. 5, a portion 525 of bottom surface 505 is shown with a strip of vias removed to reveal a row of vias connecting the metallization (ground) areas on the top and bottom surfaces. Signal line 530 of filter 500 is identical to signal line 115 of filter 100. As can be seen in FIG. 6, signal line 530 terminates in metallization area 535 on the top surface 520 of the substrate and is sandwiched between metal ground areas 540. This is the structure provided for input / output ports for filter 100. As can be seen in FIG. 5, area 545 on bottom surface 505 of substrate 510 has no metallization. Via 550 connects a strip of metallization area 555 on bottom surface 505 to metallization area 535 located on top surface 520. Vias 550 conductively couple the signal on signal line 530 to metal conductors 555 on the bottom surface of the substrate. An extended region 560 of the unmetallized region 545 on the bottom surface of the substrate provides an impedance transformation, presenting a 50 Ω impedance to port 515. As seen in FIG. 5 , probe 565 includes a central signal conductor 570 and a pair of ground terminations 575 shown engaging one of the input and output ports 515 on the bottom surface of the substrate. The other, lower port (not shown) is identical and provides access to the other of the input and output ports. The ports on the bottom surface of the substrate simplify testing and allow for easy access and coupling of the probes (and their connection points to other circuitry in a larger assembly) without requiring cutouts in the housing as in filter 100. Thus, the housing of filter 500 does not require or have cutouts in the end walls. This eliminates the opportunity for electromagnetic fields to enter or exit through the cutouts, improving shielding and reducing the manufacturing complexity of the housing. Likewise, there is no opportunity for foreign matter to pass through the cutouts and into the filter cavity and adversely affect filter performance, such as detuning or shorting. It is understood that feature 540 is actually connected to ground and is fabricated as one metallized area instead of two separate metallized areas. The difference is that the silicon (Si) cladding covers the ground but not over 540.

[0022] The channelized filter concept is not limited to the exemplary microstrip line, where the signal traces run above a ground plane and the upper housing forms individual chambers around each filter element, but is also applicable to other types of transmission lines, such as striplines, where the signal traces on the substrate are sandwiched between upper and lower ground housings, i.e., the upper channelized housing and a mirror-image lower channelized housing can cooperate to surround and sandwich the individual filter elements within their respective separate chambers.

[0023] While exemplary implementations of the present invention have been illustrated and described in detail herein, it will be apparent to those skilled in the art that various modifications, additions, substitutions, etc., can be made without departing from the spirit of the present invention. For example, the cavities can be of different heights, and the housing can be attached to ground metallization areas on the substrate using various bonding techniques, including eutectic bonding such as indium-gold or gold-tin, or copper pillar bonding. The channeled filter housing can be bonded to multiple corresponding substrates fabricated on a single wafer, rather than as an isolated substrate. The cavity height is limited only by the manufacturing capabilities of the silicon etching tool. Silicon housings with two different etching (cavity) depths are possible.

[0024] The scope of the present invention is defined in the following claims.

Claims

1. 1. A high frequency channelized filter implemented in semiconductor technology, comprising: a substantially planar dielectric substrate; input and output ports disposed on the substrate; lithographically produced metal traces disposed on one of the two major surfaces of the substrate, a first metal trace carrying a high frequency signal to be filtered between the input port and the output port; a plurality of second metal traces connected to the first metal trace at spaced intervals along the length of the first metal trace, each of the plurality of second metal traces providing a frequency-varying reactance to the first metal trace; metal traces including a third metal trace that serves as a reference ground for the first metal trace and the second metal trace; a micromachined silicon enclosure attached to the substrate, the silicon enclosure having a first plane, a cavity formed by semiconductor processing so as to extend from the first plane toward a back surface, and an interior wall defining the cavity; a layer of conductive metal deposited to cover all of the first plane, the cavity, and the interior wall before attaching the silicon enclosure to the substrate; Equipped with the silicon enclosure having a substantially continuous area of ​​the first plane at a periphery of the silicon enclosure, the area being sized to engage a corresponding area of ​​the third metal trace at a periphery of the substrate; each of the plurality of second metal traces having a corresponding respective cavity defined by a cavity wall that engages an adjacent one of the third metal traces, such that each of the plurality of second metal traces is individually surrounded by a conductive metal to provide electromagnetic field shielding for each of the plurality of second metal traces; a metal-to-metal conductive bond is formed between the third metallic trace and the mating first plane to establish a common ground reference; filter.

2. 10. The filter of claim 1, further comprising a corresponding cavity dimensioned with associated cavity walls that engage a third metal trace adjacent to the first metal trace to substantially surround the first metal trace with conductive metal between the input port and the output port to provide electromagnetic field shielding.

3. 2. The filter of claim 1, wherein the substrate is silicon carbide and the deposited metal coating is gold.

4. a metal deposited on the other major surface of the substrate; a plurality of closely spaced, contiguous through-hole conductive vias arranged to connect the third metal traces on the one major surface of the substrate to metal deposited on the other major surface of the substrate and define a common ground reference; The filter of claim 1 further comprising:

5. 10. The filter of claim 1, wherein the cavity is formed by micromachining a silicon wafer and depositing a metal having a peak-to-valley roughness of less than 2 microns.

6. 2. The filter of claim 1, wherein the input port and the output port are disposed on one of the main surfaces of the substrate, and the silicon housing has cutouts in its peripheral wall adjacent to the input port and the output port.

7. 10. The filter of claim 1, wherein at least one of the plurality of second metal traces serpentines along its length to minimize the area of ​​the substrate required to support the second metal trace.

8. 8. The filter of claim 7, wherein at least 50% of the plurality of second metal traces each meander along their length to minimize the area of ​​the substrate required to support the second metal traces.

9. 8. The filter of claim 7, wherein all of the plurality of second metal traces each meander along the length of the second metal trace to minimize the area of ​​the substrate required to support the second metal trace.

10. The filter of claim 7 , wherein the first metal trace meanders between the input port and the output port.

11. a first via that connects a portion of the first metal trace on one main surface of the substrate near one end to an input metal that is disposed on the other main surface of the substrate; a second via connecting the first metal trace near the other end of the first metal trace on one major surface of the substrate to output metal disposed on the other major surface of the substrate; an input port and an output port connected to the input metal and the output metal, respectively, and disposed on the other main surface of the substrate; Furthermore, providing easy access to the input and output ports for testing the performance of the filter before implementing the filter in a larger circuit assembly; The filter of claim 1 .

12. 12. The filter of claim 11, wherein the silicon housing has a continuous area of ​​the first planar surface surrounding an entire perimeter of the silicon housing, the continuous area of ​​the first planar surface being sized to engage a corresponding continuous area of ​​the third metal trace about an entire perimeter of the substrate such that there are no openings between an interior and an exterior of the silicon housing.

13. 12. The filter of claim 11, further comprising impedance matching means associated with the input and output metals on the other of the two major surfaces of the substrate, transforming the impedance at the input and output metals adjacent each of the first and second vias to substantially 50 ohms for testing and connection to external circuitry.

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