Silicon carbide semiconductor epitaxial substrate

Abstract

To provide a silicon carbide semiconductor epitaxial substrate having less dislocation of a basal surface, and a method for manufacturing the same.SOLUTION: A silicon carbide semiconductor epitaxial substrate has a silicon carbide single crystal substrate 1 having a surface having an offset angle of 8° or less and root mean square roughness of 0.1 nm or less, and a plurality of silicon carbide single crystal epitaxial layers, wherein a first epitaxial layer 2 brought into contact with the silicon carbide single crystal substrate 1 is formed under a gas supply condition that C / Si satisfies 1.0 or more and 1.4 or less, donor concentration of the first epitaxial layer 2 is 5×1018 cm-3 or more and 2×1019 cm-3 or less, and a ratio of basal surface dislocation density in a second epitaxial layer 3 formed on the first epitaxial layer 2 to basal surface dislocation density of the silicon carbide single crystal substrate 1 is 0.1% or less.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention can be used in a method for producing a silicon carbide semiconductor epitaxial substrate. [Background technology]

[0002] In the past, power semiconductor elements (power devices) using silicon (Si) have been developed for the purpose of controlling high frequency and high power, and various improvements have been made to significantly improve the device characteristics. However, the device performance of these power semiconductor elements is currently approaching the theoretical limit calculated from the physical properties of silicon. For this reason, power semiconductor elements using new semiconductor materials are being considered in order to further improve device characteristics.

[0003] Silicon carbide (SiC) is attracting attention as a semiconductor material for such power semiconductor elements. Because silicon carbide has a dielectric breakdown field that is more than an order of magnitude higher than that of silicon, it is expected to be applicable to high-voltage devices, and it is also expected to have semiconductor properties that are far superior to silicon, such as excellent heat resistance.

[0004] When fabricating power semiconductor devices using silicon carbide, one possible approach is to epitaxially grow a silicon carbide single crystal thin film on a silicon carbide single crystal substrate using a method known as chemical vapor deposition, and then build a semiconductor device into this epitaxial layer. This epitaxial layer is grown on the silicon carbide single crystal substrate, for example, by introducing monosilane (SiH4) gas to supply silicon (Si) atoms and propane (C3H8) gas to supply carbon (C) atoms while the silicon carbide single crystal substrate is heated.

[0005] Patent Document 1 (U.S. Pat. No. 4,912,064) discloses a method of using a substrate in which the (0001) crystal plane of a silicon carbide single crystal is tilted at an angle of 3 to 12 degrees relative to the surface to prevent the generation of heterogeneous phases during epitaxial growth. This method is currently widely used when forming epitaxial layers on silicon carbide single crystal substrates. The tilt angle of the (0001) crystal plane relative to the surface is hereinafter referred to as the offset angle.

[0006] Furthermore, Patent Document 2 (JP 2005-311348 A) and Non-Patent Document 1 disclose that basal plane dislocations present in a silicon carbide single crystal substrate propagate to the epitaxial layer, thereby reducing the reliability of a bipolar element or a unipolar element incorporating a bipolar-type parasitic diode.

[0007] Patent Document 3 (JP 2008-4888 A) discloses that the surface of a silicon carbide single crystal substrate prior to epitaxial growth is smoothed to a predetermined roughness value or less by hydrogen etching, chemical mechanical polishing, or the like, and the flow rate of the source gas is set to satisfy predetermined conditions, thereby reducing basal plane dislocations propagating to the epitaxial layer.

[0008] Patent Document 4 (JP Patent Publication No. 9-321323) and Non-Patent Document 2 disclose that, in order to improve the stability of the electrical characteristics of silicon carbide semiconductor elements, an epitaxial layer with a high impurity concentration is provided between the epitaxial layer in which the semiconductor element is fabricated and the silicon carbide single crystal substrate. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] U.S. Patent No. 4,912,064 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-311348 [Patent Document 3] Japanese Patent Application Laid-Open No. 2008-4888 [Patent Document 4] Japanese Patent Application Publication No. 9-321323 [Non-patent literature]

[0010] [Non-Patent Document 1] Materials Science Forum, 2007, Vol. 600-603, pp. 1127-1130 [Non-patent document 2] Epiworld product information, October 2018 edition, [Retrieved March 13, 2020], Internet<URL:http: / / www.epiworld-cn.com> Summary of the Invention [Problem to be solved by the invention]

[0011] As disclosed in Patent Document 3, if the surface roughness of a silicon carbide single crystal substrate is smoothed before epitaxial growth and the conditions for forming the epitaxial layer are set, a certain degree of reduction in basal plane dislocations can be achieved. However, in order to increase the yield rate of semiconductor devices and use silicon carbide as power semiconductor devices to replace silicon semiconductor devices, it is necessary to further reduce the basal plane dislocation density.

[0012] An object of the present invention is to solve the above problems and to provide a method for producing a silicon carbide semiconductor epitaxial substrate with fewer basal plane dislocations.

[0013] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0014] A brief summary of a representative embodiment of the present invention will be described below. It is as follows:

[0015] A method for manufacturing a silicon carbide semiconductor epitaxial substrate according to a representative embodiment includes a first step of preparing a silicon carbide single crystal substrate having a surface with an offset angle of 0° or more and 8° or less and a root-mean-square roughness of 0.1 nm or less, and a second step of sequentially growing a plurality of epitaxial layers made of silicon carbide on the silicon carbide single crystal substrate by chemical vapor deposition, wherein growth conditions for the plurality of epitaxial layers are set so that the root-mean-square roughness Rq (nm) of the outermost surface of the plurality of epitaxial layers satisfies the relationship Rq (nm) < 0.007 × V (μm / h) + 0.074, where V (μm / h) is the growth rate of the plurality of epitaxial layers, and wherein a donor concentration of a first epitaxial layer of the plurality of epitaxial layers in contact with the silicon carbide single crystal substrate is set to 5 × 10 18 cm -3 That's it, 2 x 10 19 cm -3 The settings are as follows: [Effects of the Invention]

[0016] According to the exemplary embodiment, a silicon carbide semiconductor epitaxial substrate having a high-quality epitaxial layer with few basal plane dislocations can be obtained, and the reliability and yield rate of semiconductor devices fabricated using this substrate can be improved. [Brief explanation of the drawings]

[0017] [Figure 1] 1 is a cross-sectional view showing a silicon carbide semiconductor epitaxial substrate according to an embodiment. [Figure 2] FIG. 1 is a cross-sectional view illustrating the transformation of basal plane dislocations in a silicon carbide single crystal substrate into threading edge dislocations in a silicon carbide semiconductor epitaxial substrate having two epitaxial layers on a silicon carbide single crystal substrate. [Figure 3] 1A to 1C are cross-sectional views of a silicon carbide semiconductor epitaxial substrate according to an embodiment during a manufacturing process. [Figure 4] 4 is a cross-sectional view of the silicon carbide semiconductor epitaxial substrate during the manufacturing process following FIG. 3. [Figure 5]5 is a cross-sectional view of the silicon carbide semiconductor epitaxial substrate during the manufacturing process, following FIG. 4. [Figure 6] 1 is a graph showing the results of Example 1, illustrating the relationship between the amount of nitrogen supplied during epitaxial growth and the donor concentration of the epitaxial layer. [Figure 7] 1 is a graph showing the results of Example 1, illustrating the relationship between the ratio of the nitrogen supply amount to the carbon supply amount during epitaxial growth and the donor concentration of the epitaxial layer. [Figure 8] 10 is a graph showing the results of Example 2, illustrating the relationship between the donor concentration in the first epitaxial layer and the basal plane dislocation density in the second epitaxial layer. [Figure 9] FIG. 2 is a cross-sectional view illustrating basal plane dislocations present in a silicon carbide single crystal substrate as a comparative example. [Figure 10] FIG. 1 is a cross-sectional view illustrating the propagation of basal plane dislocations of a silicon carbide single crystal substrate in an epitaxial layer formed on the silicon carbide single crystal substrate as a comparative example. [Figure 11] FIG. 1 is a cross-sectional view illustrating the conversion of basal plane dislocations of a silicon carbide single crystal substrate into threading edge dislocations at the interface between the silicon carbide single crystal substrate and the epitaxial layer, or in the epitaxial layer, in a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0018] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In all drawings for explaining the embodiments, components having the same functions are designated by the same reference numerals, and repeated explanations thereof will be omitted. In addition, in the embodiments, explanations of the same or similar parts will not be repeated unless particularly necessary.

[0019] Herein, a silicon carbide single crystal substrate may be simply referred to as a substrate. Herein, a substrate having a layered structure in which an epitaxial layer is formed on a semiconductor substrate is referred to as an epitaxial substrate or a silicon carbide semiconductor epitaxial substrate.

[0020] (Embodiment) <Details of areas for improvement> The areas for improvement are detailed below.

[0021] The present inventors formed epitaxial layers on silicon carbide single crystal substrates (silicon carbide semiconductor substrates) under various conditions and conducted detailed studies to determine the conditions under which the basal plane dislocation density in the epitaxial layers is reduced. As a result, as disclosed in Patent Document 3, they confirmed that smoothing the surface of the silicon carbide single crystal substrate before epitaxial growth and selecting the growth rate of the epitaxial layer so that the surface roughness of the epitaxial layer after growth satisfies predetermined conditions is effective in reducing basal plane dislocations. In addition, the present inventors discovered that forming at least two epitaxial layers on the silicon carbide single crystal substrate and setting the donor concentration of the first epitaxial layer in contact with the silicon carbide single crystal substrate within a predetermined range is important for further reducing basal plane dislocations.

[0022] Here, basal plane dislocations in silicon carbide single crystal substrates and epitaxial layers will be described with reference to FIGS.

[0023] As disclosed in Patent Document 1, when forming an epitaxial layer on a silicon carbide single crystal substrate, it is possible to use a silicon carbide single crystal substrate in which the (0001) crystal plane (sometimes referred to as the basal plane) is inclined with respect to the main surface of the silicon carbide single crystal substrate. As shown as a comparative example in FIG. 9, a silicon carbide single crystal substrate 1 has a back surface and a main surface (front surface) opposite the back surface. As the silicon carbide single crystal substrate 1, for example, a substrate having an inclination angle (offset angle) θ of approximately 2 to 8° is used. Basal plane dislocations (BPDs) are linear crystal defects that occur in the silicon carbide single crystal substrate 1 parallel to the (0001) crystal plane. 9 shows a cross section of silicon carbide single crystal substrate 1 from a direction in which the inclined (0001) crystal plane appears as a straight line, and therefore basal plane dislocations occurring in a direction parallel to the (0001) crystal plane are shown as straight lines extending obliquely from the back side to the front side of silicon carbide single crystal substrate 1. This method of illustrating basal plane dislocations is the same in FIGS. 10 and 11, and in FIG. 2, which will be used in the following explanation.

[0024] These basal plane dislocations include those that were originally present in the single crystal mass before the silicon carbide single crystal substrate 1 was cut out, as shown by basal plane dislocations 11, and those that were generated when the flat silicon carbide single crystal substrate 1 was cut out from the single crystal mass and processed, as shown by basal plane dislocations 12. The density of basal plane dislocations 11 originally present in the silicon carbide single crystal substrate 1 is, for example, 100 to 3000 cm -2 Since the (0001) crystal plane is tilted by an offset angle θ with respect to the surface of silicon carbide single crystal substrate 1, basal plane dislocations 11 penetrate from the back side of silicon carbide single crystal substrate 1 to the front side along this tilted (0001) crystal plane.

[0025] Basal plane dislocations 12 caused by processing occur only near the surface of silicon carbide single crystal substrate 1. Therefore, basal plane dislocations 12 can be removed along with the surface region of silicon carbide single crystal substrate 1 by hydrogen gas etching or chemical mechanical polishing of the substrate surface before epitaxial growth.

[0026] However, it is extremely difficult to physically remove basal plane dislocations 11 that occur deep inside silicon carbide single crystal substrate 1. When an epitaxial layer is formed on such silicon carbide single crystal substrate 1 having basal plane dislocations, basal plane dislocations 11 exposed at the surface of silicon carbide single crystal substrate 1 and disturbances in the atomic arrangement around basal plane dislocations 11 propagate to the epitaxial layer.

[0027] As shown as a comparative example in FIG. 10 , when an epitaxial layer 4 made of silicon carbide is formed on a silicon carbide single crystal substrate 1, basal plane dislocations 11 may extend directly into the epitaxial layer 4 as basal plane dislocations 41. Furthermore, as shown as a comparative example in FIG. 11 , when an epitaxial layer 4 made of silicon carbide is formed on a silicon carbide single crystal substrate 1, basal plane dislocations 11 may convert into threading edge dislocations (TEDs) 42 or 43. Threading edge dislocations 42 are formed by converting basal plane dislocations 11 into threading edge dislocations at the interface 4 a between the silicon carbide single crystal substrate 1 and the epitaxial layer 4. On the other hand, threading edge dislocations 43 are formed by converting basal plane dislocations 11 into threading edge dislocations 43 in the epitaxial layer 4 after extending into the epitaxial layer 4. In this case, even if basal plane dislocations 11 are transformed into threading edge dislocations 43 in epitaxial layer 4, basal plane dislocations 44 remain in epitaxial layer 4.

[0028] Basal plane dislocations and threading edge dislocations have significantly different properties. Microscopic observation reveals that a basal plane dislocation 41 is separated into two partial dislocations spaced a few nanometers apart. The narrow region between the two partial dislocations forms a planar crystal defect known as a stacking fault. When a certain amount of energy is imparted to the basal plane dislocation 41 by the recombination of electrons and holes in the epitaxial layer 4, the region of this stacking fault gradually expands along a plane parallel to the (0001) crystal plane. When a current flows across this planar stacking fault, the electrical resistance is higher than the electrical resistance in a location where no stacking faults exist.

[0029] When a bipolar device or a unipolar device incorporating a bipolar parasitic diode is energized, electrons and holes recombine in the epitaxial layer. Therefore, if basal plane dislocations occur in the region that functions as a semiconductor device, stacking faults expand over time, as described above, and the characteristics of the semiconductor device change over time. This means that basal plane dislocations have a significant adverse effect on the reliability characteristics of semiconductor devices.

[0030] On the other hand, threading edge dislocations 42 are linear defects perpendicular to the (0001) crystal plane. Because they are stable and do not decompose into partial dislocations accompanied by stacking faults, the defects do not expand over time. For this reason, threading edge dislocations 42 are harmless and do not adversely affect the device characteristics or reliability characteristics of semiconductor devices.

[0031] Threading edge dislocation 43 itself is harmless, just like threading edge dislocation 42, but since it is accompanied by basal plane dislocation 44 in epitaxial layer 4, the portion of basal plane dislocation 44 affects the reliability of the element as described above.

[0032] Therefore, reducing the number of basal plane dislocations 41, 44 in the epitaxial layer 4, that is, converting as many basal plane dislocations 11 as possible into threading edge dislocations 42 at the interface 4a between the silicon carbide single crystal substrate 1 and the epitaxial layer, is an important requirement for an epitaxial layer to form a highly reliable semiconductor device.

[0033] As described above, there is room for improvement in silicon carbide semiconductor epitaxial substrates from the viewpoint of increasing the reliability of semiconductor elements.

[0034] Therefore, in this embodiment, an effort is made to solve the above-mentioned room for improvement. Below, a growth method for reducing the density of basal plane dislocations in the epitaxial layer will be described as the technical concept of this embodiment.

[0035] <Structure and manufacturing method of silicon carbide semiconductor epitaxial substrate> The structure and manufacturing method of the silicon carbide semiconductor epitaxial substrate of this embodiment will be described below with reference to FIGS.

[0036] According to Patent Document 3, the conversion of basal plane dislocations to threading edge dislocations is closely related to the smoothness of the growing epitaxial layer and the growth rate of the epitaxial layer.

[0037] Although it is difficult to measure the surface roughness of an epitaxial layer during growth, the surface roughness of the epitaxial layer during growth is roughly proportional to the surface roughness of the formed epitaxial layer. Based on this, Patent Document 3 discloses that an epitaxial layer with a low basal plane dislocation density can be formed by using a silicon carbide single crystal substrate whose surface has a root-mean-square roughness of 0.1 nm or less and controlling the growth conditions of the epitaxial layer so that the root-mean-square roughness Rq (nm) of the epitaxial layer surface after growth satisfies the following formula (1), where V (μm / h) is the growth rate of the epitaxial layer: Rq(nm)<0.007×V(μm / h)+0.074 (1)

[0038] As shown in Fig. 1, the silicon carbide semiconductor epitaxial substrate of this embodiment used to form semiconductor elements has a configuration in which at least two silicon carbide epitaxial layers are stacked on a silicon carbide single crystal substrate 1. A first epitaxial layer (first silicon carbide epitaxial layer) 2 in contact with the silicon carbide single crystal substrate 1 has a relatively high donor concentration (impurity concentration). In the epitaxial substrate, the thickness of the first epitaxial layer on the silicon carbide single crystal substrate is set to about 0.5 µm, and the donor concentration is set to 1 × 10 18 cm -3 On the other hand, the film thickness and donor concentration of the second epitaxial layer (second silicon carbide epitaxial layer) 3 are appropriately designed according to the withstand voltage specifications of the semiconductor element formed on the epitaxial substrate. For example, in the case of an element with a withstand voltage of 1 kV, the film thickness of the second epitaxial layer 3 is 10 μm and the donor concentration is 1×10 16 cm -3Since the functions of a semiconductor element are realized by forming a structure such as a pn junction in the second epitaxial layer 3, it is important to reduce basal plane dislocations in the second epitaxial layer 3 in order to improve the reliability of the semiconductor element.

[0039] In investigating the conditions for reducing basal plane dislocations in the second epitaxial layer, the inventors conducted a detailed investigation into the effect of the donor concentration in the first epitaxial layer on the basal plane dislocation density in the second epitaxial layer.

[0040] As a result, the donor concentration of the first epitaxial layer was set to 1 × 10 18 cm -3 In particular, we found that increasing the donor concentration of the first epitaxial layer to 5×10 is effective in reducing basal plane dislocations in the second epitaxial layer. 18 cm -3 It was found that when the above conditions are met, the effect of reducing basal plane dislocations in the second epitaxial layer is significant.

[0041] The following describes the conversion of basal plane dislocations in two epitaxial layers on a silicon carbide single crystal substrate.

[0042] FIG. 2 illustrates the transformation of basal plane dislocations in the stacked epitaxial layers. Most of the basal plane dislocations 11 in the silicon carbide single crystal substrate 1 transform into threading edge dislocations 21 at the interface 1a between the silicon carbide single crystal substrate 1 and the first epitaxial layer 2. The remaining basal plane dislocations that do not transform propagate through the first epitaxial layer 2, and some of them transform into threading edge dislocations 22 in the first epitaxial layer 2. The remaining basal plane dislocations reach the interface 2a between the first epitaxial layer 2 and the second epitaxial layer 3, and then some of these basal plane dislocations transform into threading edge dislocations 31 near the interface 2a. The remaining basal plane dislocations then propagate through the second epitaxial layer, and some of these basal plane dislocations, 34, transform into threading edge dislocations 32 in the second epitaxial layer 3. However, basal plane dislocations 34 that propagated through the second epitaxial layer 3 before being transformed into threading edge dislocations 32 remain as they are. The remaining basal plane dislocations 33 that did not transform into threading edge dislocations reach the surface 3a of the second epitaxial layer.

[0043] 2, defects (dislocations) that may occur in an epitaxial substrate have been described using the epitaxial substrate of this embodiment as an example. In this embodiment, by satisfying formula (1) and setting the donor concentration of the first epitaxial layer relatively high as shown below, a reduction in basal plane dislocations 33, 34 in the second epitaxial layer 3 is achieved. The donor here is, for example, N (nitrogen), and the silicon carbide single crystal substrate 1, first epitaxial layer 2, and second epitaxial layer 3 all have n-type conductivity.

[0044] The present inventors have found the following through experiments regarding the formation of one epitaxial layer 4 on a silicon carbide single crystal substrate 1, as in the comparative examples shown in Fig. 10 or 11. That is, the present inventors have found that the greater the difference in donor concentration between silicon carbide single crystal substrate 1 and epitaxial layer 4, the greater the rate (conversion rate) of conversion of basal plane dislocations 11 to threading edge dislocations 42 at interface 1a between silicon carbide single crystal substrate 1 and the epitaxial layer, compared to when this difference is small.

[0045] Typically, the donor concentration of the silicon carbide single crystal substrate 1 is 5 × 10 18 cm -3 In the epitaxial substrate shown in FIG. 2, the donor concentration of the first epitaxial layer 2 is set to about 1×10 18 cm -3 From 2 x 10 19 cm -3 Even if the donor concentration of the first epitaxial layer 2 is changed to about 3×10, the difference in concentration between the donor concentration of the first epitaxial layer 2 and the donor concentration of the silicon carbide single crystal substrate 1 does not change significantly. Therefore, it is considered that the conversion rate from basal plane dislocations 11 to threading edge dislocations 21 at the interface 1a between the silicon carbide single crystal substrate 1 and the epitaxial layer does not change significantly depending on the donor concentration of the first epitaxial layer 2. On the other hand, the donor concentration of the second epitaxial layer 3 is usually 3×10 15 cm -3 From 1×10 16 cm -3 Therefore, the donor concentration of the first epitaxial layer 2 is set to about 1×10 18 cm -3 When the density of the first epitaxial layer 2 increases from 0.1 to 0.2, the difference in donor concentration at the interface 2a between the first epitaxial layer 2 and the second epitaxial layer 3 (the difference in donor concentration between the first epitaxial layer 2 and the second epitaxial layer 3) increases significantly. As a result, it is expected that the conversion rate from basal plane dislocations to threading edge dislocations at the interface 2a will increase. In other words, the number of threading edge dislocations 31 in Figure 2 will increase. As a result, there are two cases: one where the dislocation becomes a basal plane dislocation 33, and the other where the dislocation becomes a threading edge dislocation 34. The number of cases where dislocations 32 occur decreases, and the sum of basal plane dislocations 33 and 34 in the second epitaxial layer 3 decreases.

[0046] Thus, it is expected that the conversion rate of basal plane dislocations to threading edge dislocations at the interface 2a between the first epitaxial layer 2 and the second epitaxial layer 3 increases as the donor concentration of the first epitaxial layer 2 increases. However, when the donor concentration of the first epitaxial layer 2 is 2×10 19 cm -3If the donor concentration exceeds 5×10, stacking faults are likely to occur in the first epitaxial layer 2, which is undesirable. 18 cm -3 That's it, 2 x 10 19 cm -3 It is desirable to do the following:

[0047] From the viewpoint of increasing the conversion rate of basal plane dislocations to threading edge dislocations at the interface 2a between the first epitaxial layer 2 and the second epitaxial layer 3, the donor concentration of the first epitaxial layer 2 is set to 8×10 18 cm -3 That's it, 2 x 10 19 cm -3 From the same viewpoint, it is more desirable to set the donor concentration of the first epitaxial layer 2 to 1×10 or less. 19 cm -3 That's it, 2 x 10 19 cm -3 It is even more desirable that:

[0048] Furthermore, increasing the thickness of the first epitaxial layer 2 increases the opportunity for dislocations to be converted into threading edge dislocations 22 (see FIG. 2 ) in the first epitaxial layer 2, which is also effective in reducing the basal plane dislocation density in the second epitaxial layer 3. However, on the other hand, increasing the thickness of the first epitaxial layer 2 increases the time required to grow the first epitaxial layer 2, increasing the risk of defects occurring due to debris falling from the inner wall of the growth furnace onto the surface of the first epitaxial layer 2 during growth. Another problem is increased manufacturing costs. From these perspectives, an appropriate upper limit for the thickness of the first epitaxial layer 2 can be considered. Experiments by the inventors have shown that a thickness of 10 μm for the first epitaxial layer 2 is sufficient to achieve the effect of dislocation conversion. Therefore, by setting the thickness of the first epitaxial layer 2 to 10 μm or less, it is possible to reduce the possibility of defects occurring on the surface of the first epitaxial layer 2 due to debris falling from the inner wall of the growth furnace, and to reduce manufacturing costs. Note that the thickness of the first epitaxial layer 2 is preferably 3 μm or more.

[0049] Furthermore, selecting a silicon carbide single crystal substrate 1 that contains fewer basal plane dislocations 11 is also effective in reducing the basal plane dislocation density in second epitaxial layer 3 .

[0050] In order to increase the conversion rate of basal plane dislocations 11 to threading edge dislocations 21 at the interface 1a between the silicon carbide single crystal substrate 1 and the first epitaxial layer 2, it is desirable to reduce the offset angle of the silicon carbide single crystal substrate 1. The surface of a silicon carbide single crystal substrate with an inclined (0001) crystal plane has a step structure consisting of terraces made of the (0001) crystal plane and their edges. The offset angle is, for example, in the range of 0° to 8°.

[0051] If the offset angle is less than 2°, the terraces will be too wide, and silicon carbide (3C-SiC) with a structure different from that of the epitaxial layer will grow on the terraces. If this silicon carbide grows in the epitaxial layer, it may cause crystal defects. If the offset angle is greater than 5°, the conversion rate at the interface 1a between the silicon carbide single crystal substrate 1 and the first epitaxial layer 2 will decrease, and the basal plane dislocation density in the first epitaxial layer 2 may increase. Therefore, it is particularly desirable that the offset angle of the silicon carbide single crystal substrate 1 be in the range of 2° to 5°.

[0052] The method for manufacturing a silicon carbide semiconductor epitaxial substrate according to this embodiment will be described in detail below.

[0053] First, a silicon carbide single crystal substrate 1 is prepared as shown in FIG. 3. The silicon carbide single crystal constituting the silicon carbide single crystal substrate 1 is preferably 4H-SiC. If the surface of the silicon carbide single crystal substrate 1 is the (0001) crystal plane, one surface is the (0001) Si plane, with silicon atoms exposed at the outermost surface. The other surface, parallel to this, is the (000-1) C plane, with carbon atoms exposed. It is possible to form a silicon carbide epitaxial layer on either surface used as the primary surface, but the optimal formation conditions may differ. Below, we will discuss the case where the (0001) Si plane is used as the growth surface. The offset angle of the (0001) Si plane with respect to the substrate surface is in the range of 0° to 8°. A more preferable range for this offset angle is 2° to 5°.

[0054] The silicon carbide single crystal substrate 1 may be cut from a block of single crystal silicon carbide using a known method, or a commercially available wafer may be purchased. The wafer prepared here is, for example, a disk-shaped silicon carbide single crystal substrate with a diameter of 6 inches and a thickness of approximately 350 μm to 400 μm.

[0055] The silicon carbide single crystal substrate 1 is mechanically polished by known procedures to remove any process-affected layers formed on the surface, and the surface roughness of the front and back surfaces of the substrate is reduced to a predetermined value. Furthermore, the surface 5 of the silicon carbide single crystal substrate 1 on which epitaxial growth is performed is mirror-polished with abrasive grains such as diamond until the surface roughness RMS is 0.2 to 2 nm. Here, the surface roughness RMS refers to the root-mean-square roughness measured over a 10 μm area of ​​the sample using an atomic force microscope (AFM). If commercially available wafers are used, it may be possible to omit these steps.

[0056] After mechanical polishing, the surface 5 is further smoothed by chemical mechanical polishing or reactive ion etching, etc., to reduce the surface roughness RMS to 0.1 nm or less.

[0057] If the surface roughness RMS of surface 5 exceeds 0.1 nm, there is a possibility that basal plane dislocations present only in the vicinity of surface 5 of silicon carbide single crystal substrate 1 will not be completely removed and will remain. Furthermore, no matter how the growth conditions for the epitaxial layer are controlled, the surface roughness of the second epitaxial layer will not be sufficiently small, and the condition of formula (1) will no longer be satisfied.

[0058] The surface roughness RMS of surface 5 is more preferably 0.05 nm or less. The smaller the surface roughness RMS of surface 5, the wider the range of growth conditions for the epitaxial layer that satisfy formula (1) becomes, and the larger the process margin becomes. This makes it possible to more stably produce high-quality silicon carbide semiconductor epitaxial substrates.

[0059] Next, as shown in FIG. 4, a first epitaxial layer 2 is formed on the silicon carbide single crystal substrate 1 by epitaxial growth.

[0060] The epitaxial growth is performed by chemical vapor deposition. Specifically, the silicon carbide single crystal substrate 1 is placed in a growth furnace for epitaxial growth, and hydrogen gas is supplied to maintain the pressure in the furnace at 10 kPa to 30 kPa while the silicon carbide single crystal substrate 1 is heated to 1500°C to 1700°C. The total flow rate of the hydrogen gas is preferably about 100 slm to 170 slm.

[0061] After reaching a predetermined temperature, the silicon carbide single crystal substrate 1 is maintained at that temperature while the source gas is supplied. Growth of the first epitaxial layer 2 begins with the start of the source gas supply. However, before growing the first epitaxial layer 2, the surface 5 (see FIG. 3 ) of the silicon carbide single crystal substrate 1 may be hydrogen-etched. Hydrogen etching can be performed, for example, by maintaining the silicon carbide single crystal substrate 1 at a constant temperature in an epitaxial growth furnace under the above-mentioned hydrogen atmosphere. The hydrogen gas may contain a hydrocarbon such as propane (C3H8) or a hydrogen halide gas such as hydrogen chloride (HCl). This removes the process-affected layer on the substrate surface, removes basal plane dislocations introduced into the substrate surface by processing, and reduces the basal plane dislocations propagating to the epitaxial layer. Hydrogen etching is preferably performed at a temperature of 1300°C or higher and 1700°C or lower. If the hydrogen etching temperature is less than 1300°C, the process-affected layer may not be completely removed, and basal plane dislocations introduced by the process may remain on the substrate surface. A temperature of 1700°C is sufficient to remove the process-affected layer; temperatures higher than this may actually impair the flatness of the substrate surface. The time required for hydrogen etching should be approximately 1 minute to 15 minutes.

[0062] The source gases include, for example, monosilane (SiH4) gas as a silicon atom source and propane (C3H8) gas as a carbon atom source. Nitrogen (N2) gas is also supplied simultaneously with the source gases to control the donor concentration in the epitaxial layer. The source gases may also contain hydrogen halide gases, such as hydrogen chloride (HCl).

[0063] By controlling the feedstock gas supply ratio (the ratio of carbon atoms to silicon atoms in the feedstock gas, expressed as the C / Si ratio) and the feedstock gas supply rate, an epitaxial layer is grown to satisfy formula (1). Both the root-mean-square roughness (Rq) of the epitaxial layer surface and the growth rate (V) of the epitaxial layer in formula (1) are characteristics that can be measured after the epitaxial layer is formed. Therefore, an experiment is first conducted to grow an epitaxial layer using the C / Si ratio and the feedstock gas supply rate as parameters, and the root-mean-square roughness (Rq) and growth rate of the resulting epitaxial layer are measured. The C / Si ratio and feedstock gas supply rate that satisfy formula (1) are then determined. Epitaxial growth is then performed using the obtained C / Si ratio and feedstock gas supply rate as the epitaxial growth conditions. Taking into consideration the uniformity of the epitaxial layer thickness or donor concentration, or the suppression of morphological defects on the surface of the epitaxial layer, the C / Si ratio is preferably set to 1.0 or more and 1.4 or less.

[0064] The donor concentration in the epitaxial layer is proportional to the nitrogen flow rate and correlates with the C / Si ratio. The nitrogen supply amount is set by determining the relationship between the nitrogen flow rate and the donor concentration at a given C / Si ratio through preliminary experiments.

[0065] According to the results of the experiments by the inventors, the donor concentration of the first epitaxial layer 2 is set to 5×10 18 cm -3 That's it, 2 x 10 19 cm -3 When the C / Si ratio was set to the following values, the ratio N / C of the nitrogen flow rate (nitrogen supply amount) to the carbon atoms in the raw material gas (carbon supply amount) was 4.0 or more and 110 or less when the C / Si ratio was set to 1.0 or more and 1.4 or less.

[0066] The growth rate of the epitaxial layer is proportional to the flow rate of the source gas, but the proportionality constant varies depending on the structure of the chemical vapor deposition equipment. Therefore, the preferred range of the source gas supply rate depends on the chemical vapor deposition equipment. The relationship between the source gas supply rate and the growth rate of the epitaxial layer is determined through preliminary experiments, and the growth rate to be adopted is then set. The growth time required to deposit the required film thickness is calculated from the set value of the growth rate.

[0067] 5, after a predetermined time for forming the first epitaxial layer 2 has elapsed, the nitrogen flow rate is changed to a flow rate required for the second epitaxial layer 3, thereby starting the growth of the second epitaxial layer 3. When growing the second epitaxial layer 3, the flow rate of the source gas and the C / Si ratio may be changed from the conditions used when forming the first epitaxial layer 2, as long as they satisfy formula (1). With respect to formula (1), the growth rate V here refers to the growth rate of the stacked epitaxial layers including the first epitaxial layer 2 and the second epitaxial layer 3, and the root mean square roughness Rq of the surface (outermost surface) of the epitaxial layer refers to the root mean square roughness of the top surface of the second epitaxial layer.

[0068] The conditions for growing the second epitaxial layer 3 can be varied as appropriate within the range of the conditions described above for growing the first epitaxial layer 2. That is, a gas containing carbon atoms and a gas containing silicon atoms, along with a mixed gas of nitrogen and hydrogen gas for controlling the donor concentration in the epitaxial layer, are supplied as source gases, and the pressure is maintained at 10 kPa or higher and 30 kPa or lower. Under these conditions, the second epitaxial layer is grown on a silicon carbide single crystal substrate maintained at a temperature of 1500°C or higher and 1700°C or lower. The ratio of the carbon atom supply rate to the silicon atom supply rate in the source gas, C / Si, is set to 1.0 or higher and 1.4 or lower.

[0069] After a predetermined time for forming the second epitaxial layer 3 has elapsed, the supply of the source gas and nitrogen gas is stopped to stop the growth. While maintaining a predetermined pressure in the hydrogen gas flow, the substrate heating is stopped and the silicon carbide single crystal substrate 1 on which the first epitaxial layer 2 and the second epitaxial layer 3 have been deposited is cooled. This completes the silicon carbide semiconductor epitaxial substrate of the present embodiment, which includes the silicon carbide single crystal substrate 1, the first epitaxial layer 2, and the second epitaxial layer 3.

[0070] The basal plane dislocations in second epitaxial layer 3 of the silicon carbide semiconductor epitaxial substrate fabricated in this manner are 0.1% or less of the basal plane dislocations present in silicon carbide single crystal substrate 1. In other words, the silicon carbide semiconductor epitaxial substrate of this embodiment has a second epitaxial layer with excellent crystal quality. Therefore, semiconductor devices fabricated using the silicon carbide semiconductor epitaxial substrate of this embodiment have excellent reliability.

[0071] As such silicon carbide semiconductor epitaxial substrates are repeatedly fabricated, a coating of silicon carbide or the like accumulates on the inner walls of the growth furnace of the chemical vapor deposition apparatus. This coating eventually peels off and falls onto the surface of the growing epitaxial layer, causing defects in the epitaxial layer. Therefore, the growth furnace must be opened to the atmosphere as needed to clean the inner walls. The optimal growth conditions for the epitaxial layer may change before and after cleaning, but the inventors' experiments have shown that the variations are not significant. By conducting experiments to confirm the donor concentration after cleaning and simply fine-tuning the nitrogen supply, it is possible to form an epitaxial layer similar to that before cleaning.

[0072] Example 1 The present inventors have investigated the relationship between the nitrogen supply amount and the donor concentration in order to set the nitrogen supply amount when forming the first epitaxial layer 2 (see FIG. 4).

[0073] First, five 6-inch diameter 4H-SiC single crystal substrates were prepared. Each substrate had an offset angle of 4°. A 10 μm thick silicon carbide epitaxial layer was grown on the (0001) Si surface of each of these four substrates. The growth conditions were: hydrogen supply rate 120 slm, growth pressure 20 kPa, growth temperature 1600°C, SiH supply rate 270 sccm, and C3H8 supply rate 108 sccm (C / Si = 1.2). The nitrogen supply rates for the five substrates were 0.4 sccm, 10 sccm, 100 sccm, 400 sccm, and 800 sccm, respectively.

[0074] A mercury probe was placed in contact with the surface of the epitaxial layer after growth, and a voltage of approximately 1 V was applied between the front (main) and back surfaces to measure the correlation between capacitance and voltage. The results were analyzed to calculate the donor concentration. Figure 6 shows the relationship between the nitrogen supply amount during epitaxial layer growth and the donor concentration of the epitaxial layer. The horizontal axis of Figure 6 represents the nitrogen supply amount during growth of the first epitaxial layer, and the vertical axis represents the donor concentration of the grown first epitaxial layer. Both the vertical and horizontal axes in Figure 6 are plotted logarithmically, and the correlation between the nitrogen supply amount and the donor concentration is a straight line with a slope of approximately 1. This indicates that the nitrogen supply amount and the donor concentration are roughly proportional.

[0075] A similar correlation was also investigated for SiH4 supply rates of 270 sccm, C3H8 supply rates of 90 sccm (C / Si = 1.0), and C3H8 supply rates of 126 sccm (C / Si = 1.4). The results are plotted against the ratio of nitrogen supply rate to carbon supply rate (N / C) in Figure 7. The horizontal axis of Figure 7 is the ratio of nitrogen supply rate to carbon supply rate (N / C), and the vertical axis of Figure 7 is the donor concentration of the first epitaxial layer. From Figure 7, it can be seen that when the donor concentration is increased to 5 × 10 within the range of C / Si = 1.0 to 1.4, 18 cm -3 From 2 x 10 19 cm -3 The amount of nitrogen required to achieve this range is in the range of N / C = 4 to 110 (thick arrow in Figure 7). It was found that the range was

[0076] <Example 2> Three 6-inch diameter 4H-SiC single crystal substrates, A, B, and C, were prepared. Each had an offset angle of 4° and a basal plane dislocation density of approximately 400 cm. -2 Since they were cut from the same block, other crystal qualities are thought to be at the same level.

[0077] Chemical mechanical polishing was performed on these three substrates (silicon carbide single crystal substrates) A, B, and C. The processing conditions were the same, and the surface roughness RMS after processing was 0.03 nm for all of them.

[0078] Two epitaxial layers were formed on each substrate. The thickness of the first epitaxial layer was 3 μm. The donor concentration of the first epitaxial layer was 1×10 for Substrate A. 18 cm -3 , and substrate B is 5 × 10 18 cm -3 , and substrate C is 1×10 19 cm -3 The second epitaxial layer was set to a thickness of 30 μm for all of the substrates A, B, and C, and the donor concentration was set to 3×10 15 cm -3 It was decided.

[0079] The only difference between substrates A, B, and C was the donor concentration of the first epitaxial layer. The growth conditions for forming the first epitaxial layer, other than the nitrogen supply rate, were the same for all substrates, as follows: hydrogen supply rate 120 slm, growth pressure 20 kPa, growth temperature 1600°C, SiH supply rate 270 sccm, and C3H8 supply rate 108 sccm (C / Si=1.2).

[0080] Based on the results of Example 1, the nitrogen supply amount during the formation of the first epitaxial layer was set to 100 sccm (N / C=0.93) for substrate A, 500 sccm (N / C=4.63) for substrate B, and 1000 sccm (N / C=9.26) for substrate C.

[0081] The growth rate under the above conditions was 36 μm / h for all substrates A, B, and C.

[0082] After forming the second epitaxial layer, the surface roughness RMS of the second epitaxial layer was evaluated using an atomic force microscope. The results were 0.288 nm for substrate A, 0.300 nm for substrate B, and 0.295 nm for substrate C, with no significant difference between the substrates.

[0083] The growth rate is 36 μm / h, so the formula is 0.007 × 36 (μm / h) + 0.074 = 0.326 (nm). The outermost surface roughness of the second epitaxial layer satisfies formula (1) for all substrates A, B, and C.

[0084] We used a method called photoluminescence imaging to capture images of basal plane dislocations in the epitaxial layers and count their number to determine the basal plane dislocation density. The basal plane dislocation images obtained with this method are limited to those in the epitaxial layers with low donor concentrations. Therefore, basal plane dislocations in the substrate and the first epitaxial layer with a high donor concentration are not observed, and only basal plane dislocations in the second epitaxial layer with a low donor concentration—those corresponding to basal plane dislocations 33 and 34 in Figure 2—are observed. Figure 8 shows the relationship between the basal plane dislocation density in the second epitaxial layer obtained using this method and the donor concentration in the first epitaxial layer. The horizontal axis of the graph in Figure 8 represents the donor concentration in the first epitaxial layer, and the vertical axis represents the basal plane dislocation density in the second epitaxial layer.

[0085] As shown in Figure 8, as the donor concentration of the first epitaxial layer increases, the basal plane dislocation density in the second epitaxial layer decreases. 18 cm -3 By doing so, the basal plane dislocation density of the second epitaxial layer can be set to 0.1% or less of the basal plane dislocation density of the substrate, thereby improving the stability of the semiconductor device formed on the second epitaxial layer 3.

[0086] The invention made by the present inventors has been specifically described above based on the embodiments thereof, but the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the spirit of the invention. [Explanation of symbols]

[0087] 1. Silicon carbide single crystal substrate 2. First epitaxial layer 3 Second epitaxial layer 4 Epitaxial layer

Claims

1. a silicon carbide single crystal substrate having a surface with an offset angle of 0° or more and 8° or less and a root mean square roughness of 0.1 nm or less; a plurality of silicon carbide single crystal epitaxial layers sequentially grown on the surface of the (0001) Si face of the silicon carbide single crystal substrate; Among the plurality of silicon carbide single crystal epitaxial layers, a first epitaxial layer in contact with the silicon carbide single crystal substrate is formed under gas supply conditions that satisfy a C / Si ratio of 1.0 or more and 1.4 or less, The donor concentration of the first epitaxial layer is 5×10 １８ cm －３ That's it, 2 x 10 １９ cm －３ is as follows: a basal plane dislocation density in a second epitaxial layer formed on the first epitaxial layer among the plurality of silicon carbide single crystal epitaxial layers is 0.1% or less as a ratio to a basal plane dislocation density of the silicon carbide single crystal substrate; the root mean square roughness Rq (nm) of the outermost surfaces of the plurality of silicon carbide single crystal epitaxial layers satisfies the relationship Rq (nm) < 0.326; Silicon carbide semiconductor epitaxial substrate.

2. 2. The silicon carbide semiconductor epitaxial substrate according to claim 1, wherein the first epitaxial layer in contact with the silicon carbide single crystal substrate is formed under gas supply conditions that satisfy an N / C ratio of 4.0 or more and 110 or less. Silicon carbide semiconductor epitaxial substrate.

3. 2. The silicon carbide semiconductor epitaxial substrate according to claim 1, wherein the Rq (nm) is 0.288 to 0.

326. Silicon carbide semiconductor epitaxial substrate.

4. 2. The silicon carbide semiconductor epitaxial substrate according to claim 1, wherein the donor concentration of the first epitaxial layer is 8×10 １８ cm －３ That's it, 2 x 10 １９ cm －３ Below is the Silicon carbide semiconductor epitaxial substrate.

5. 2. The silicon carbide semiconductor epitaxial substrate according to claim 1, wherein the donor concentration of the first epitaxial layer in contact with the silicon carbide single crystal substrate is 1×10 １９ cm －３ That's it, 2 x 10 １９ cm －３ Below is the Silicon carbide semiconductor epitaxial substrate.

6. 2. The silicon carbide semiconductor epitaxial substrate according to claim 1, wherein the thickness of the first epitaxial layer in contact with the silicon carbide single crystal substrate is 3 μm or more and 10 μm or less. Silicon carbide semiconductor epitaxial substrate.

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