Systems and methods for preheating rings in semiconductor wafer reactors
The preheat ring in the reactor adjusts process gas flow to address non-uniformity in epitaxial CVD, achieving uniform growth rates and deposition profiles on semiconductor wafers.
Patent Information
- Application Number
- JP2023540076
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-12-31
- Filing Date
- 2021-12-31
- Publication Date
- 2025-12-01
- Estimated Expiration
- 2041-12-31
AI Technical Summary
Epitaxial chemical vapor deposition (CVD) growth rates are not uniform across the surface of semiconductor wafers due to non-uniform flow rates within the reactor, leading to reduced wafer flatness and variability in local flow rate deviations.
A reactor design incorporating a preheat ring with an annular disk and edge bars to heat and adjust the process gas before it contacts the semiconductor wafer, modifying gas flow direction and velocity to achieve uniform growth rates.
The preheat ring enhances uniformity of epitaxial CVD growth rates, resulting in more uniform radial deposition profiles and wafer thickness, reducing operational costs by minimizing material deposition at edges and improving overall process efficiency.
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Abstract
Description
[Technical Field]
[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority to U.S. Patent Application No. 17 / 139,339, filed December 31, 2020, the entire disclosure of which is incorporated herein by reference in its entirety.
[0002] The present invention relates generally to apparatus and methods for wafer processing, and more particularly to apparatus and methods for semiconductor wafer chemical vapor deposition processing. [Background technology]
[0003] Epitaxial chemical vapor deposition (CVD) is a method for growing thin layers of material on semiconductor wafers, with a lattice structure identical to that of the wafer. Epitaxial CVD is widely used in semiconductor wafer fabrication to build epitaxial layers so that devices can be fabricated directly on the epitaxial layers. The epitaxial deposition process begins by introducing a cleaning gas, such as hydrogen or a mixture of hydrogen and hydrogen chloride, to the front side of the wafer (i.e., the side facing away from the susceptor) and preheating and cleaning the front side of the wafer. The cleaning gas removes native oxide from the front side, allowing an epitaxial silicon layer to grow continuously and uniformly on the surface during subsequent steps of the deposition process. The epitaxial deposition process involves introducing a vaporizable silicon source gas, such as silane or chlorinated silane, to the front side of the wafer, depositing and growing an epitaxial layer of silicon on the front side. The back side, facing the susceptor, may simultaneously be exposed to hydrogen gas. The susceptor that supports the semiconductor wafer within the deposition chamber during epitaxial deposition is rotated during the process to ensure uniform growth of the epitaxial layer.
[0004] However, epitaxial CVD growth rates are generally not uniform across the surface of each wafer due to non-uniform flow rates within the reactor. The lack of uniformity causes reduced wafer flatness and may be the result of variability or local flow rate deviations within the deposition chamber during epitaxial deposition. Therefore, there is a need for a practical and cost-effective apparatus that improves local flow rate deviations to improve epitaxial CVD growth rate uniformity.
[0005] This Background section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and / or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art. Summary of the Invention
[0006] In one aspect, a reactor for contacting a process gas with a semiconductor wafer is provided. The reactor includes an upper dome, a lower dome, an upper liner, a lower liner, and a preheat ring. The lower dome is attached to an upper side. The upper and lower domes define a reaction chamber. The lower liner is disposed below the upper liner. The upper and lower liners define a process gas inlet for flowing process gas into the reaction chamber. The preheat ring is disposed within the reaction chamber to heat the process gas before it contacts the semiconductor wafer. The preheat ring is attached to an inner periphery of the lower liner. The preheat ring includes an annular disk and an edge bar. The annular disk has an inner edge, an outer edge, a first side, and a second side opposite the first side. The inner edge and the outer edge define a radial distance between the inner edge and the outer edge. The edge bar is disposed on the first side surface and extends from the outer edge toward the inner edge by an edge bar radial thickness, the radial distance being greater than the edge bar radial thickness.
[0007] In another aspect, a preheat ring is provided for placement in a reactor during wafer processing to heat process gas before the process gas contacts a semiconductor wafer. The preheat ring includes an annular disk and an edge bar. The preheat ring has an inner edge, an outer edge, a first side, and a second side opposite the first side. The inner edge and the outer edge define a radial distance between the inner edge and the outer edge. The edge bar is positioned on the first side and extends from the outer edge toward the inner edge by an edge bar radial thickness. The radial distance is greater than the edge bar radial thickness.
[0008] In yet another aspect, a method for manufacturing semiconductor wafers in a reactor is provided. The reactor includes upper and lower domes defining a reaction chamber and upper and lower liners defining a process gas inlet. The reactor further includes a preheat ring disposed within the reaction chamber for heating the process gas before the process gas contacts the semiconductor wafer. The preheat ring is attached to the inner periphery of the lower liner and includes an annular disk and an edge bar disposed on the annular disk. The method includes flowing a process gas into the reaction chamber through the process gas inlet. The method includes heating the process gas using the preheat ring. The method further includes adjusting at least one of a velocity and a direction of the process gas using the edge bar. The method includes depositing a layer on the semiconductor wafer using the process gas. The edge bar facilitates forming a layer of uniform thickness on the semiconductor wafer.
[0009] Various refinements exist to the features described in connection with the above-described aspects. Likewise, additional features may be incorporated into the above-described aspects. These refinements and additional features may exist individually or in any combination. For example, various features described below in connection with any of the illustrated embodiments of the present disclosure may be incorporated into any of the above-described aspects, alone or in any combination. [Brief explanation of the drawings]
[0010] [Figure 1] FIG. 1 is a front view of an apparatus for processing substrates such as semiconductor wafers. [Figure 2] FIG. 2 is a perspective view of the device shown in FIG. [Figure 3] FIG. 3 is a cross-sectional view of the device shown in FIG. [Figure 4] FIG. 4 is a perspective view of the device shown in FIG. 1 with the upper dome and upper liner removed for clarity and with portions of the device shown transparent for clarity. [Figure 5] FIG. 5 is a perspective view of the preheat ring shown in FIGS. 3 and 4. FIG. [Figure 6] FIG. 6 is a top view of the preheat ring shown in FIG. [Figure 7] FIG. 7 is a side view of the preheat ring shown in FIG. [Figure 8] FIG. 8 is a perspective view of an alternative embodiment of the preheat ring shown in FIG. [Figure 9] FIG. 9 is a flow diagram of a method for manufacturing semiconductor wafers in the reactor shown in FIG. [Figure 10] FIG. 10 is a graph of epitaxial wafer growth rate as a function of wafer radial distance according to Example 1.
[0011] Corresponding reference characters indicate corresponding parts throughout the drawings. DETAILED DESCRIPTION OF THE INVENTION
[0012] Referring to FIG. 1 , an apparatus for depositing epitaxial layers on semiconductor substrates according to one embodiment of the present disclosure is generally designated 100. While the illustrated apparatus is a single-wafer reactor (i.e., a 300 mm AMAT Centura reactor), the apparatus and methods disclosed herein for providing more uniform epitaxial layers are suitable for use with other reactor designs, including, for example, multiple-wafer reactors. The apparatus 100 includes a reaction chamber 102 having an upper dome 104, a lower dome 106, an upper liner 108, and a lower liner 110. The upper dome 104, the lower dome 106, the upper liner 108, and the lower liner 110 collectively define an interior space of the reaction chamber 102 where process gases contact a semiconductor wafer 114. A gas manifold 116 is used to direct process gases into the reaction chamber 102. A perspective view of the reaction chamber 102 and the gas manifold 116 is shown in FIG. 2. In this embodiment, the apparatus 100 is a 300 mm AMAT Centura reactor. In alternative embodiments, the apparatus 100 may be any type of reactor.
[0013] Apparatus 100 may be used to process wafers in wafer processes including, but not limited to, depositing any type of material on a wafer performed by a chemical vapor deposition (CVD) process, such as epitaxial CVD or polycrystalline CVD. In this regard, references herein to epitaxy and / or CVD processes should not be considered limiting, as apparatus 100 may also be used for other purposes, such as performing etching or planarization processes on wafers. Also, while wafers shown herein are generally circular in shape, wafers of other shapes are contemplated within the scope of this disclosure.
[0014] The apparatus 100 is shown in cross section in FIG. 3 to better illustrate the apparatus. A preheat ring 118 is disposed within the interior space 112 of the reaction chamber 102 to heat the process gas before it contacts the semiconductor wafer 114. The outer periphery of the preheat ring 118 is attached to the inner periphery of the lower liner 110. For example, the preheat ring 118 may be supported by an annular ledge 170 of the lower liner 110. A susceptor 120 (sometimes referred to herein as a "susceptor body") traverses the space within the preheat ring 118 and supports the semiconductor wafer 114.
[0015] The process gas may be heated before contacting the semiconductor wafer 114. Both the preheat ring 118 and the susceptor 120 are generally opaque to absorb radiant heating light generated by high-intensity lamps 122, 124, which may be positioned above and below the reaction chamber 102. Maintaining the preheat ring 118 and the susceptor 120 at a temperature higher than ambient allows the preheat ring 118 and the susceptor 120 to transfer heat to the process gas as it passes over them. Typically, the diameter of the semiconductor wafer 114 is smaller than the diameter of the susceptor 120, allowing the susceptor to heat the process gas before it contacts the wafer.
[0016] The preheat ring 118 and susceptor 120 may preferably be constructed of opaque graphite coated with silicon carbide, although other materials are contemplated. The upper dome 104 and lower dome 106 are typically made of a transparent material to allow radiant heating light to enter the reaction chamber 102 and shine on the preheat ring 118 and susceptor 120. The upper dome 104 and lower dome 106 may be constructed of transparent quartz. Quartz is generally transparent to infrared and visible light and is chemically stable under the reaction conditions of the deposition reaction. Devices other than high-intensity lamps 122, 124, such as resistive heaters and induction heaters, may be used to provide heat to the reaction chamber. Infrared temperature sensors (not shown), such as pyrometers, may be mounted in the reaction chamber 102 to monitor the temperature of the susceptor 120, preheat ring 118, or semiconductor wafer 114 by receiving infrared radiation emitted by the susceptor, preheat ring, or wafer.
[0017] The apparatus 100 may include a shaft 126 that may support the susceptor 120. The shaft 126 extends through a central post 128. The shaft 126 includes a first end 130 attached to the central post 128 and a second end 132 positioned proximate a central region 134 of the semiconductor wafer 114. The shaft 126 has a shaft diameter 136 of about 5 millimeters (mm) to about 10 mm.
[0018] Shaft 126 is connected to a suitable rotation mechanism (not shown) for rotating shaft 126, susceptor 120, and semiconductor wafer 114 relative to apparatus 100 about longitudinal axis X. The outer edge of susceptor 120 and the inner edge of preheat ring 118 (FIG. 3) are separated by a gap 138 to allow for susceptor rotation. Semiconductor wafer 114 is rotated to prevent excessive material deposition on the front edge of the wafer and to provide a more uniform epitaxial layer.
[0019] The preheat ring 118 modifies or conditions the process gas before it contacts the semiconductor wafer 114 to improve growth rates on the semiconductor wafer and create a more uniform radial deposition profile. The upper liner 108 and the lower liner 110 define a process gas inlet 140 and a process gas outlet 142. The process gas inlet 140 allows process gas to flow into the reaction chamber 102, and the process gas outlet 142 allows process gas to flow out of the reaction chamber. The process gas flows from the process gas inlet 140 toward the process gas outlet 142 within the reaction chamber 102 as the semiconductor wafer 114 rotates within the reaction chamber.
[0020] The process gas inlet 140 may be divided into inlet segments 186, 188, 190, and 192, each having a segment height 194 and a segment width 196. Each inlet segment 186, 188, 190, and 192 directs process gas to a different portion of the semiconductor wafer 114. For example, as shown in FIG. 4 , the upper liner 108 and the lower liner 110 define a first inlet segment 186 that directs process gas to the edge 144 of the semiconductor wafer 114, a second inlet segment 188 that directs process gas to the central region 134 of the semiconductor wafer 114, a third inlet segment 190 that directs process gas to the central region 134 of the semiconductor wafer 114, and a fourth inlet segment 192 that directs process gas to the edge 144 of the semiconductor wafer 114.
[0021] The growth rate of the semiconductor wafer 114 at the edge 144 of the semiconductor wafer is faster than the growth rate at the central region 134 of the semiconductor wafer. The faster growth rate at the edge 144 relative to the central region 134 can produce a non-uniform radial deposition profile and a non-uniform thickness of the semiconductor wafer 114. The preheat ring 118 described herein modifies or adjusts the process gas before it contacts the semiconductor wafer 114 to improve the growth rate on the semiconductor wafer, produce a more uniform radial deposition profile, and produce semiconductor wafers with a uniform thickness.
[0022] The preheat ring 118 includes an annular disk 146 and an edge bar 148 attached to the annular disk. The annular disk 146 defines an inner edge 150 defining a disk hole 152 and an inner diameter 154, an outer edge 156 defining an outer diameter 158, a first side 160, a second side 162, and a disk thickness 164 between the first and second sides. The inner diameter 154 is larger than a susceptor diameter 166 of the susceptor 120 such that the preheat ring 118 surrounds the susceptor. Also, although the preheat ring 118 illustrated herein is generally circular to complement the shape of the semiconductor wafer 114, preheat rings of other shapes to complement wafers of other shapes are contemplated within the scope of this disclosure.
[0023] The outer diameter 158 is smaller than the liner diameter 168 of the lower liner 110 such that the lower liner surrounds the preheat ring 118 and the semiconductor wafer 114. The annular disk 146 extends a radial distance 172 from the inner edge 150 to the outer edge 156. The radial distance 172 is configured to allow the preheat ring 118 to absorb heat from the high intensity lamps 122, 124 and transfer the absorbed heat to the process gas as it passes over the preheat ring.
[0024] The edge bar 148 extends from a first side 160 of the annular disk 146 and modifies or adjusts the process gas before it contacts the semiconductor wafer to improve the growth rate on the semiconductor wafer and create a more uniform radial deposition profile. Specifically, the edge bar 148 modifies, adjusts, and / or changes at least one of the process gas flow direction, the process gas velocity, and the process gas flow rate to improve the growth rate on the semiconductor wafer and create a more uniform radial deposition profile.
[0025] In the illustrated embodiment, the preheat ring 118 includes two edge bars 148. In an alternative embodiment, the preheat ring 118 includes one edge bar 148. In a further alternative embodiment, the preheat ring 118 may include multiple small edge bars 148. Thus, the preheat ring 118 may include at least one edge bar 148 and / or multiple edge bars 148, depending on the flow of process gases within the reaction chamber 102. More specifically, simulation and / or experimental results may be used to determine the number and location of edge bars 148 on the preheat ring 118 to improve growth rates on the semiconductor wafer 114 and generate a more uniform radial deposition profile. Like the preheat ring 118, the edge bars 148 may preferably be made of opaque graphite coated with silicon carbide, although other materials are also contemplated. In other embodiments, the edge bars 148 may be made of a translucent or transparent material rather than an opaque material.
[0026] In general, the edge bars 148 are preferably positioned proximate the outer edge 156 of the annular disk 146, proximate the process gas inlet 140, and proximate specific regions of the semiconductor wafer 114 to modify and / or influence the growth rate and mitigate non-uniformities of the semiconductor wafer 114 during processes such as epitaxial deposition. Specifically, the edge bars 148 are positioned proximate the process gas inlet 140 to increase the velocity or flow rate of the process gas at the edge 144 of the semiconductor wafer 114 (compared to when the edge bars are not used), thereby reducing the amount of material (e.g., silicon) that deposits on the edge of the semiconductor wafer during the epitaxial CVD process. The position of the edge bars 148 proximate the process gas inlet also changes the direction of the process gas at the edge 144 of the semiconductor wafer 114 (compared to when the edge bars are not used), thereby reducing the amount of material (e.g., silicon) that deposits on the edge of the semiconductor wafer during the epitaxial CVD process. Thus, the edge bar 148 is preferably positioned proximate the outer edge 156 of the annular disk 146 proximate the process gas inlet 140 to modify the process gas as it enters the reaction chamber 102. In alternative embodiments, the edge bar 148 may be positioned anywhere on the preheat ring 118 that allows the edge bar 148 to operate as described herein.
[0027] The edge bars 148 are also positioned relative to the semiconductor wafer 114 to modify and / or influence the growth rate of non-uniformities on the semiconductor wafer 114 during processing. To improve the growth rate on the semiconductor wafer 114 and generate a more uniform radial deposition profile, simulations and / or experimental results may be used to determine where non-uniformities occur on the semiconductor wafer 114 when the edge bars are not used, and the edge bars 148 may be positioned on the preheat ring 118 to mitigate the non-uniformities. For example, the edge bars 148 may be positioned proximate the edge 144 of the semiconductor wafer 114 to increase the velocity and flow rate of process gases at the edge (compared to when the edge bars are not used), thereby reducing the amount of material (e.g., silicon) that deposits on the edge of the semiconductor wafer during an epitaxial CVD process. The edge bar 148 may also be positioned proximate to the edge 144 of the semiconductor wafer 114 to change the direction of the process gas at the edge (compared to when the edge bar is not used), thereby reducing the amount of material (e.g., silicon) that deposits on the edge of the semiconductor wafer during the epitaxial CVD process.
[0028] For example, the edge bar 148 in the illustrated embodiment is positioned immediately downstream of the first inlet segment 186 and the fourth inlet segment 192 to increase the velocity, increase the flow rate, and / or change the direction of the process gas toward the edge of the semiconductor wafer 114. Thus, the edge bar 148 is preferably positioned proximate the edge 144 of the semiconductor wafer 114 where a local or global maximum layer thickness occurs, reducing edge deposition and creating a more uniform radial deposition profile. Note that this maximum layer thickness may be a local or global maximum and may generally be referred to as a non-uniformity.
[0029] The thickness profile may be determined using any suitable method available to one skilled in the art, including, for example, using a Fourier transform infrared (FTIR) spectrometer or using a wafer flattening tool (e.g., a WaferSight or WaferSight2 from KLA-Tencor Corporation, Milpitas, Calif.). In some embodiments, the radial thickness profile of the substrate may be determined prior to material deposition (e.g., prior to deposition of an epitaxial layer), and the thickness profile of the layer structure may be measured thereafter. The thickness profile of the deposited layer may be determined by subtracting the substrate thickness from the layer structure thickness.
[0030] In the illustrated embodiment, each edge bar 148 is positioned on the preheat ring 118 such that each edge bar defines an edge bar radius 174, an edge bar angle θ relative to a center 176 of the semiconductor wafer 114, and an edge bar radial thickness 177. Specifically, the edge bar 148 has a first end 178 and a second end 180, and the edge bar angle θ is defined between the center 176 of the semiconductor wafer 114 and the first and second ends. The edge bar 148 defines an edge bar perimeter 182 between the first end 178 and the second end 180, and has an edge bar height 184 and an edge bar radial width 187. Additionally, the radial distance 172 is greater than the edge bar radial thickness 177.
[0031] In the illustrated embodiment, the edge bar 148 is a bump or rounded protrusion extending from the first side 160 of the preheat ring 118. In alternative embodiments, the edge bar 148 may have any shape that enables the edge bar to operate as described herein. Also, in the illustrated embodiment, the edge bar 148 is curved such that the edge bar forms an arc segment that is complementary to the shape of the outer edge 156 of the preheat ring 118. In alternative embodiments, the edge bar 148 may have any shape that enables the edge bar to operate as described herein. In other embodiments, the edge bar 148 may be shaped to include various protrusions and / or notches or depressions. The edge bar 148 may also be chamfered or rounded. Such non-uniform shapes may allow the edge bar 148 to modify and / or affect the growth rate of non-uniformities in the semiconductor wafer 114 during processing. For example, analysis of the thickness profile of the semiconductor wafer 114 can identify areas outside the edge 144 where the velocity or flow rate is reduced such that material deposition is uneven. The shape of the edge bar 148 may be adjusted to modify and / or influence the flow of process gas to those areas to reduce material deposition in those areas.
[0032] In the illustrated embodiment, the inner diameter 154 is about 240 mm to about 252 mm, the outer diameter 158 is about 296 mm to about 308 mm, the disk thickness 164 is about 4 mm to about 10 mm, the susceptor diameter 166 is about 240 mm to about 252 mm, the liner diameter 168 is about 296 mm to about 308 mm, the radial distance 172 is about 44 mm to about 68 mm, the edge bar radius 174 is about 143 mm to about 149 mm, the edge bar perimeter 182 is about 20 mm to about 60 mm, the edge bar height 184 is about 0.5 mm to about 2 mm, the edge bar angle θ is about 20 degrees to about 50 degrees, the segment height 194 is about 5 mm to about 8 mm, and the segment width 196 is about 238 mm to about 248 mm. In alternative embodiments, the inner diameter 154, the outer diameter 158, the disk thickness 164, the susceptor diameter 166, the liner diameter 168, the radial distance 172, the edge bar perimeter 182, the edge bar height 184, the edge bar angle θ, the segment height 194, and the segment width 196 may be any distance or angle that enables the edge bar 148 to operate as described herein. More specifically, the inner diameter 154, the outer diameter 158, the disk thickness 164, the susceptor diameter 166, the liner diameter 168, the radial distance 172, the edge bar perimeter 182, the edge bar height 184, the edge bar angle θ, the segment height 194, and the segment width 196 are preferably selected depending on the location and magnitude of a local or global epitaxial layer thickness minimum or maximum. The ranges given above for inner diameter 154, outer diameter 158, disk thickness 164, susceptor diameter 166, liner diameter 168, radial distance 172, edge bar circumference 182, edge bar height 184, edge bar angle θ, segment height 194, and segment width 196 are exemplary, and values outside the stated ranges may be used without limitation.
[0033] The edge bar height 184 may be configured to increase the velocity, flow rate, and / or change of direction of the process gas toward the edge 144 of the semiconductor wafer 114. In the illustrated embodiment, the edge bar height 184 is about 0.5% to about 50% of the segment height 194. Increasing the edge bar height 184 relative to the segment height 194 generally increases the velocity, flow rate, and / or change of direction of the process gas, resulting in less deposition of material on the semiconductor wafer 114 in the portion of the semiconductor wafer adjacent the edge bar 148. Conversely, decreasing the edge bar height 184 relative to the segment height 194 generally decreases the velocity, flow rate, and / or change of direction of the process gas, resulting in more deposition of material on the semiconductor wafer 114 in the portion of the semiconductor wafer adjacent the edge bar 148. Thus, the amount of material deposited on the portion of the semiconductor wafer 114 adjacent the edge bar 148 may be adjusted by varying the edge bar height 184.
[0034] The edge bar perimeter 182 may be configured to increase the velocity, flow rate, and / or change of direction of the process gas toward the edge 144 of the semiconductor wafer 114. In the illustrated embodiment, the edge bar perimeter 182 is about 5% to about 90% of the segment width 196. Increasing the edge bar perimeter 182 relative to the segment width 196 generally increases the velocity, flow rate, and / or change of direction of the process gas, resulting in less deposition of material on the semiconductor wafer 114 in the portion of the semiconductor wafer adjacent the edge bar 148. Conversely, decreasing the edge bar perimeter 182 relative to the segment width 196 generally decreases the velocity, flow rate, and / or change of direction of the process gas, resulting in more deposition of material on the semiconductor wafer 114 in the portion of the semiconductor wafer adjacent the edge bar 148. Thus, the amount of material deposited on the portion of the semiconductor wafer 114 adjacent the edge bar 148 may be adjusted by varying the edge bar perimeter 182.
[0035] 8 is a perspective view of an alternative preheat ring 198 including a single edge bar 148 positioned immediately downstream of the second inlet segment 188 and the third inlet segment 190 to increase the velocity, flow rate, and redirect the process gas toward the central region 134 of the semiconductor wafer 114. The edge bar 148 illustrated in FIG. 8 is substantially similar to the edge bar 148 illustrated in FIGS. 3-7 , except that the edge bar is positioned to address the case where a local or global maximum layer thickness occurs in the central region 134 rather than the edge 144 of the semiconductor wafer 114. Thus, the preheat ring 198 includes an edge bar 148 preferably positioned immediately downstream of the second inlet segment 188 and the third inlet segment 190 to reduce deposition in the central region and produce a more uniform radial deposition profile.
[0036] 9 is a flow diagram of a method 200 for manufacturing semiconductor wafers in a reactor. The method 200 includes flowing 202 a process gas into a reaction chamber through a process gas inlet. The method 200 includes heating 204 the semiconductor wafer using a preheat ring. The method 200 further includes adjusting 206 at least one of the velocity and direction of the process gas using an edge bar. The method 200 includes depositing 208 a layer on the semiconductor wafer using the process gas. The edge bar facilitates forming a layer of uniform thickness on the semiconductor wafer.
[0037] [Example] The processes of the present disclosure are further illustrated in the following examples, which should not be construed in a limiting sense. Example 1: Determining the effect of using edge bars on the radial growth rate profile of a semiconductor wafer
[0038] A preheat ring containing two edge bars positioned before the first and fourth inlet segments as described herein was tested in a single wafer epitaxy reactor to determine its effect on epitaxial wafer growth rate profiles. Epitaxial wafers were prepared by exposing Czochralski-produced single crystal silicon wafers to process gases at wafer temperatures between 1050°C and 1150°C. The edge bars had an edge bar height of 0.5 mm.
[0039] A control run was performed using a preheat ring without edge bars. Figure 10 is a graph 300 showing the epitaxial wafer radial growth rate profile as a function of wafer radial distance. As can be seen from Figure 10, the control produced a higher growth rate radial profile 302, while the edge bars produced a lower growth rate radial profile 304. The higher growth rate radial profile 302 has a first edge growth rate 306 and a first central region growth rate 308, where the difference between the first edge growth rate 306 and the first central region growth rate 308 is a first growth rate difference 310. Similarly, the lower growth rate radial profile 304 has a second edge growth rate 312 and a second central region growth rate 314, where the difference between the second edge growth rate 312 and the second central region growth rate 314 is a second growth rate difference 316. 10 , the first growth rate difference 310 is greater than the second growth rate difference 316, and the lower growth rate radial profile 304 is more uniform because the difference between the edge growth rate and the center region growth rate of the lower growth rate radial profile 304 is less than the difference between the edge growth rate and the center region growth rate of the higher growth rate radial profile 302. Thus, the edge bars produced a uniform growth rate profile for the epitaxial wafer.
[0040] Compared to conventional methods for producing silicon wafers, the disclosed systems and methods have several advantages. For example, a reactor including a preheat ring with edge bars as described facilitates cost-effective production of semiconductor wafers with uniform growth rate profiles during deposition. A uniform growth rate profile produces a more uniform deposition thickness profile. Thus, the edge bars enable the production of semiconductor wafers with uniform thickness profiles. An example preheat ring includes edge bars near the process gas inlet to correct non-uniform growth rates and / or affect the growth rate of semiconductor wafers during processing. The edge bars thereby increase the velocity, flow rate, and / or redirect the process gas toward the edge of the semiconductor wafer, reducing the growth rate at the edge of the semiconductor wafer and producing semiconductor wafers with uniform thickness profiles. Thus, the example preheat ring eliminates or reduces local growth rate deviations and improves the uniformity of epitaxial CVD growth on the wafer compared to conventional techniques. Therefore, using the above-described examples, the production rate of an epitaxial CVD system can be improved and operational costs can be reduced by reducing waste.
[0041] When introducing elements of the present disclosure or embodiments of the disclosure, the articles "a," "an," "the," and "said" are intended to mean that there are one or more elements. The terms "comprising," "including," "containing," and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements. The use of specific orientational terms (e.g., "top," "bottom," "side," etc.) is for convenience of description and does not require a particular orientation of the described items.
[0042] Because various changes may be made in the structure and methods described above without departing from the scope of the present disclosure, it is intended that all matter contained in the above description and shown in the accompanying drawings be interpreted as illustrative and not in a limiting sense.
Claims
1. 1. A reactor for contacting a process gas with a semiconductor wafer, comprising: The reactor comprises: The upper dome and a lower dome attached to the upper dome, the upper dome and the lower dome defining a reaction chamber; an upper liner; a lower liner disposed below the upper liner, the upper liner and the lower liner together defining a process gas inlet for flowing the process gas into the reaction chamber; a preheat ring disposed within the reaction chamber for heating the process gas before the process gas contacts the semiconductor wafer, the preheat ring being attached to an inner periphery of the lower liner; Equipped with The preheat ring is an annular disc having an inner edge, an outer edge, a first side, and a second side opposite the first side, the inner edge and the outer edge defining a radial distance between the inner edge and the outer edge; an edge bar disposed on the first side and extending from the outer edge toward the inner edge by an edge bar radial thickness, the radial distance being greater than the edge bar radial thickness; A reaction apparatus comprising:
2. 10. The reactor of claim 1, wherein said edge bar adjusts the velocity of said process gas within said reaction chamber.
3. 10. The reactor of claim 1, wherein said edge bar directs said process gas within said reaction chamber.
4. The process gas inlet a first inlet segment directing process gas toward the edge of the semiconductor wafer; a second inlet segment directing process gas toward a central region of the semiconductor wafer; a third inlet segment directing process gas toward the central region of the semiconductor wafer; a fourth inlet segment directing process gas at the edge of the semiconductor wafer; The reactor of claim 1 , comprising:
5. 5. The reactor of claim 4, wherein the edge bar is disposed adjacent to at least one of the first inlet segment and the fourth inlet segment.
6. the edge bars include a first edge bar and a second edge bar; 5. The reactor of claim 4, wherein said first edge bar is positioned adjacent said first inlet segment and said second edge bar is positioned adjacent said fourth inlet segment.
7. 7. The reactor of claim 6, wherein said first edge bar and said second edge bar adjust the velocity and direction of said process gas directed at said edge of said semiconductor wafer.
8. 5. The reactor of claim 4, wherein the edge bar is disposed adjacent to at least one of the second inlet segment and the third inlet segment.
9. 5. The reactor of claim 4, wherein said edge bar is disposed adjacent said second inlet segment and said third inlet segment.
10. 10. The reactor of claim 9, wherein said edge bars adjust the velocity and direction of said process gas directed toward said central region of said semiconductor wafer.
11. a preheat ring disposed in the reactor for heating a process gas before the process gas contacts a semiconductor wafer during wafer processing, the preheat ring comprising: The preheat ring is an annular disc having an inner edge, an outer edge, a first side, and a second side opposite the first side, the inner edge and the outer edge defining a radial distance between the inner edge and the outer edge; an edge bar disposed on the first side and extending from the outer edge toward the inner edge by an edge bar radial thickness, the radial distance being greater than the edge bar radial thickness; A preheat ring.
12. The preheat ring of claim 11 , wherein the edge bar adjusts the velocity of the process gas within the reaction chamber.
13. The preheat ring of claim 11 , wherein the edge bar directs the process gas within the reaction chamber.
14. 12. The preheat ring of claim 11, wherein the annular disk and the edge bar are generally opaque to absorb radiant heating light produced by high intensity lamps.
15. The preheat ring of claim 11 , wherein the wafer process is epitaxial chemical vapor deposition.
16. The preheat ring of claim 11 , wherein the edge bar is a rounded protrusion extending from the first side.
17. 12. The preheat ring of claim 11, wherein the edge bar is made of opaque graphite coated with silicon carbide.
18. 1. A method for manufacturing semiconductor wafers in a reactor, the reactor comprising upper and lower domes defining a reaction chamber, and upper and lower liners defining a process gas inlet, the reactor further comprising a preheat ring disposed within the reaction chamber for heating the process gas before the process gas contacts the semiconductor wafer, the preheat ring being attached to an inner periphery of the lower liner, the preheat ring including an annular disk and an edge bar disposed on the annular disk; The method comprises: flowing the process gas into the reaction chamber through the process gas inlet; heating the process gas using the preheat ring; adjusting at least one of the velocity and direction of the process gas using the edge bar; Depositing a layer on the semiconductor wafer using the process gas. Prepared for this, The method, wherein the edge bar facilitates forming the layer of uniform thickness on the semiconductor wafer.
19. 20. The method of claim 18, wherein the depositing step is performed by epitaxial chemical vapor deposition.
20. 20. The method of claim 18, further comprising rotating the semiconductor wafer relative to the reactor.
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