Manufacturing method of electronic components and electronic component holding jig

Abstract

To provide a manufacturing method of an electronic component and an electronic component holding jig capable of reducing the possibility of collision of the electronic component.SOLUTION: A manufacturing method of an electronic component 1 according to the present invention includes an electronic component preparation step of preparing an electronic component 1 including a laminate chip 1A having a dielectric layer 14 and an internal electrode 15 stacked thereon, an electronic component holding step of holding the electronic components 1 in an electronic component holding jig 200 in an aligned state spaced a predetermined distance apart from each other, a position information acquisition step of acquiring position information of the laminate chip 1A in the electronic component holding jig 200, a processing step of processing the electronic component 1 while the electronic component 1 is held in the electronic component holding jig 200, and an information linking step of linking the processing results of the electronic component 1 to the position information.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing electronic components and an electronic component holding jig. [Background technology]

[0002] Electronic components such as multilayer ceramic capacitors are aligned from a bulk state using a transfer device, for example, each time they are subjected to external electrode formation, various inspections, individual packaging, etc. (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-69827 Summary of the Invention [Problem to be solved by the invention]

[0004] However, when electronic components are aligning in a loose state using a feeding device, a certain amount of electronic components must be densely packed together and fed into the feeding device to improve feeding efficiency, which can cause electronic components to collide with each other, potentially resulting in defects occurring in subsequent processes.

[0005] An object of the present invention is to provide a method for manufacturing electronic components and an electronic component holder that can reduce the possibility of collision of electronic components. [Means for solving the problem]

[0006] In order to solve the above problems, the present invention provides a method for manufacturing an electronic component, including an electronic component preparation step of preparing an electronic component including a laminate chip in which dielectric layers and internal electrodes are stacked; an electronic component holding step of holding the electronic components in an electronic component holding jig in an aligned state spaced a predetermined distance from each other; a position information acquisition step of acquiring position information of the laminate chip in the electronic component holding jig; a processing step of processing the electronic component while it is held in the electronic component holding jig; and an information linking step of linking the electronic component processing results to the position information. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide a method for manufacturing an electronic component and an electronic component holder that can reduce the possibility of collision of electronic components. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a schematic perspective view of a multilayer ceramic capacitor 1B according to an embodiment. [Figure 2] 2 is a cross-sectional view of the multilayer ceramic capacitor 1B taken along line II-II of FIG. 1. [Figure 3] 10 is a flowchart illustrating a method for manufacturing the multilayer ceramic capacitor 1B. [Figure 4] FIG. 1 is a perspective view showing a transfer device 100. [Figure 5] FIG. 10 is a diagram illustrating an electronic component holding step. [Figure 6] 1 is a perspective view showing a plurality of electronic components 1 held on an adhesive sheet 200. FIG. [Figure 7] FIG. 3 is a diagram illustrating the placement of a first visual inspection device 301 at an inspection position. [Figure 8] FIG. 10 is a diagram illustrating a characteristic inspection process. [Figure 9] FIG. 10 is a diagram illustrating a storage process. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of a manufacturing method for an electronic component 1 and an electronic component holding jig according to the present invention will be described. Possible examples of the electronic component 1 include a resistor, a thermistor, a coil, and a multilayer ceramic capacitor. In the embodiments, the electronic component 1 will be described as a laminate chip 1A or a multilayer ceramic capacitor 1B having external electrodes 3 formed on the end faces of the laminate chip 1A. In addition, in the embodiments, the electronic component holding jig will be described as an adhesive sheet 200.

[0010] Fig. 1 is a schematic perspective view of a multilayer ceramic capacitor 1B according to an embodiment of the present invention, and Fig. 2 is a cross-sectional view of the multilayer ceramic capacitor 1B taken along line II-II of Fig. 1.

[0011] (Multilayer ceramic capacitor 1B) The multilayer ceramic capacitor 1B has a substantially rectangular parallelepiped shape and includes a laminate chip 1A and a pair of external electrodes 3 provided on both ends of the laminate chip 1A. The laminate chip 1A includes an inner layer portion 11 in which a plurality of dielectric layers 14 and a plurality of internal electrodes 15 are laminated.

[0012] In the following description, the terms used to represent the orientation of the multilayer ceramic capacitor 1B are: a length direction L, which is the direction in which the pair of external electrodes 3 are provided in the multilayer ceramic capacitor 1B; a stacking direction T, which is the direction in which the dielectric layers 14 and the internal electrodes 15 are stacked; and a width direction W, which is the direction intersecting both the length direction L and the stacking direction T.

[0013] Furthermore, of the six outer surfaces of the laminated chip 1A, one facing in the stacking direction T is referred to as the first main surface A1, and the other as the second main surface A2; a pair of outer surfaces facing in the width direction W are referred to as side surfaces B; one of the pair of outer surfaces facing in the length direction L is referred to as the first end surface C1, and the other as the second end surface C2. When it is not necessary to distinguish between the first main surface A1 and the second main surface A2, they will be referred to together as the main surface A. When it is not necessary to distinguish between the first end surface C1 and the second end surface C2, they will be referred to together as the end surface C.

[0014] The multilayer ceramic capacitor 1B of this embodiment preferably has a length L dimension of 1.0 mm to 3.2 mm, a width W dimension of 0.5 mm to 2.5 mm, and a stacking direction T dimension of 0.2 mm to 2.8 mm.

[0015] (Laminated chip 1A) The laminate chip 1A includes an inner layer portion 11 and outer layer portions 12 disposed on both main surfaces A of the inner layer portion 11. The corners and ridges of the laminate chip 1A are preferably rounded. The corners are portions where three surfaces of the laminate chip 1A intersect, and the ridges are portions where two surfaces of the laminate chip 1A intersect.

[0016] (Dielectric layer 14) The dielectric layer 14 is made of a dielectric material. Examples of the dielectric material include dielectric ceramics containing components such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3. These components may also be supplemented with components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, or Ni compounds in smaller amounts than the main component. Other examples include piezoelectric ceramics such as PZT ceramics, semiconducting ceramics such as spinel ceramics, and magnetic ceramics such as ferrite. Piezoelectric ceramics function as a piezoelectric component, semiconducting ceramics function as a thermistor, and magnetic ceramics function as an inductor. In the case of an inductor, the internal electrode 15 is a coiled conductor.

[0017] (Internal electrode 15) The internal electrode 15 includes a plurality of first internal electrodes 15A and a plurality of second internal electrodes 15B. The first internal electrodes 15A and the second internal electrodes 15B are arranged alternately. Note that, unless it is necessary to particularly distinguish between the first internal electrodes 15A and the second internal electrodes 15B, they will be collectively referred to as the internal electrodes 15.

[0018] The internal electrodes 15 contain metals such as Ni, Cu, Ag, Pd, Ag-Pd alloy, Au, etc. The internal electrodes 15 may further contain dielectric particles having the same composition as the ceramics contained in the dielectric layers.

[0019] The internal electrode 15 includes opposing portions 152 that face each other between the first internal electrode 15A and the second internal electrode 15B, and lead portions 151 that do not face each other between the first internal electrode 15A and the second internal electrode 15B and are drawn from the opposing portions 152 toward one end face C. Ends of the lead portions 151 are exposed at the end face C and electrically connected to the external electrode 3. The extending directions of the lead portions 151 differ between the first internal electrode 15A and the second internal electrode 15B, and the lead portions 151 are drawn alternately toward the first end face C1 and the second end face C2. Charge is accumulated between the opposing portions 152 of the first internal electrode 15A and the second internal electrode 15B that are adjacent in the stacking direction T, and the lead portions 151 function as a capacitor.

[0020] The laminate chip 1A includes a side gap portion 20 (shown in Figure 1) located between the side surface B and the opposing portion 152 where the first internal electrode 15A and the second internal electrode 15B face each other, and an end gap portion 21 (shown in Figure 2) located between the opposing portion 152 and the end face C and including the lead-out portion 151 of either the first internal electrode 15A or the second internal electrode 15B.

[0021] (Outer layer part 12) The outer layer portion 12 is made of the same dielectric ceramic material as the dielectric layer 14 of the inner layer portion 11 .

[0022] (External electrode 3) The external electrodes 3 include a first external electrode 3A provided on a first end face C1 of the laminate chip 1A and a second external electrode 3B provided on a second end face C2 of the laminate chip 1A. When there is no need to distinguish between the first external electrode 3A and the second external electrode 3B, they will be collectively referred to as the external electrode 3. The external electrode 3 covers not only the end face C but also a portion of the main surface A and the side face B on the end face C side.

[0023] The external electrode 3 may include a base electrode layer 30 and a plating layer 31 disposed on the outside of the base electrode layer 30. The external electrode 3 may be provided directly on the laminate chip 1A, or a catalyst may be provided on the laminate chip 1A as a pretreatment. The base electrode layer 30 includes at least one selected from a baked layer 30a, a resin layer 30b, a thin film layer 30c, etc.

[0024] The baked layer 30a contains glass and metal. The glass contains Si, etc. The metal contains at least one selected from Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The baked layer 30a may be multi-layered. The baked layer 30a is formed by applying a conductive paste containing glass and metal to the laminate chip 1A and baking it. The baked layer 30a may be baked simultaneously with the internal electrodes 15, or may be baked after the internal electrodes 15 are baked.

[0025] The resin layer 30b may contain conductive particles and a thermosetting resin. The resin layer 30b may be formed directly on the laminated chip 1A without forming the baked layer 30a. The resin layer 30b may be a multi-layered layer.

[0026] The thin film layer 30c is formed by a thin film forming method such as sputtering or vapor deposition, and is a layer of metal particles deposited to a thickness of 1 μm or less.

[0027] The plating layer 31 preferably includes a plating of one metal selected from Cu, Ni, Ag, Pd, an Ag-Pd alloy, Au, etc., or an alloy containing such a metal. The plating layer 31 may be formed of multiple layers. In this embodiment, it has a two-layer structure consisting of a Ni plating layer as the first plating layer 31a and a Sn plating layer as the second plating layer 31b. It is preferable that the plating layer 31 does not include glass.

[0028] When the first plating layer 31a is a Ni plating layer, the base electrode layer 30 can be prevented from being corroded by solder when the multilayer ceramic capacitor 1B is mounted.

[0029] When Sn or Au is used for the second plating layer 31b, the wettability of the solder when mounting the multilayer ceramic capacitor 1B is improved, making mounting easier. The second plating layer 31b is formed as needed, and the external electrode 3 may be composed of the first plating layer 31a. The second plating layer 31b may be provided as the outermost layer of the plating layer 31, or another plating layer may be provided on the second plating layer 31b.

[0030] The metal content per unit volume of the plating layer 31 is preferably 99% by volume or more.

[0031] (Manufacturing method of multilayer ceramic capacitor 1B) Next, a method for manufacturing the multilayer ceramic capacitor 1B will be described below with reference to a flowchart of FIG.

[0032] (Electronic component preparation process S1) In the electronic component preparation process, first, a dielectric sheet and a conductive paste for the internal electrodes are prepared. The dielectric sheet and the conductive paste for the internal electrodes contain a binder and a solvent, and known organic binders and organic solvents can be used. The conductive paste for the internal electrodes is printed in a predetermined pattern on the dielectric sheet by, for example, screen printing or gravure printing, to form an internal electrode pattern.

[0033] A predetermined number of dielectric sheets for outer layer portions, on which no internal electrode pattern is printed, are stacked, and then dielectric sheets on which an internal electrode pattern is printed are stacked in order, and a predetermined number of dielectric sheets for outer layer portions are stacked on top of that to produce a laminated sheet. The laminated sheets are pressed in the stacking direction using a means such as a hydrostatic press to produce a laminated block.

[0034] The laminate block is cut to a predetermined size to cut out individual laminate chips 1A. At this time, corners and ridges of the laminate chip 1A may be rounded by barrel polishing or the like. The laminate chip 1A is then fired. The firing temperature is preferably 900 to 1300°C, although it depends on the materials of the dielectric and internal electrodes.

[0035] Thereafter, a baking layer 30a is formed on the end faces C of the plurality of laminate chips 1A. When forming the baking layer 30a, a conductive paste is applied to the end faces C of the plurality of laminate chips 1A, and the laminate chips 1A coated with the conductive paste are placed in a baking sheath and baked, thereby forming the baking layer 30a. Then, other layers of the external electrodes 3 are further formed to manufacture the multilayer ceramic capacitor 1B.

[0036] Here, the manufacturing method of the electronic component 1 of this embodiment includes various processing steps in which various processes such as visual inspection are performed on the laminate chip 1A before the external electrodes 3 are formed, or on the multilayer ceramic capacitor 1B after the external electrodes 3 are formed. These processing steps will be explained below, but since the object to be processed in the processing steps is the laminate chip 1A or the multilayer ceramic capacitor 1B, they will be explained as the electronic component 1.

[0037] The various processing steps include, for example, an electronic component holding step S2, an appearance inspection step S4, a first information linking step S5, a characteristic inspection step S6, a second information linking step S7, a storage step S8, and a third information linking step S9.

[0038] (Electronic component holding process S2) In the electronic component holding step, the electronic components 1 are aligned using a transfer device 100. Fig. 4 is a perspective view showing the transfer device 100. Fig. 5 is a diagram illustrating the electronic component holding step.

[0039] The transfer device 100 is a device that aligns multiple electronic components 1. The electronic components 1 may be aligned in the same direction by using magnets or dimensional differences in the stacking direction and width direction. The transfer device 100 includes a pallet main body 101 and a base 102. The pallet main body 101 includes an alignment area 103 and a side wall portion 104 that surrounds the alignment area 103. The pallet main body 101 is provided with a supply port that allows multiple electronic components 1 to be supplied into the alignment area 103. The alignment area 103 is provided with multiple recesses 106. Each recess 106 is capable of storing one electronic component 1.

[0040] 4, the recesses 106 are arranged in 4 rows and 5 columns for convenience of illustration. However, the number and arrangement of the recesses 106 are not limited to this. For example, it is preferable to increase the number of recesses 106 in the row and column directions so that the total number of recesses 106 is several thousand to several tens of thousands.

[0041] A plurality of electronic components 1 are supplied in a loose state to transfer device 100. Electronic components 1 are stored one by one in recesses 106 while moving within alignment area 103, and are aligned according to the rows and columns of recesses 106.

[0042] 5(a) is a cross-sectional view of the transfer device 100 with the electronic component 1 stored in the recess 106. As shown in the figure, when the electronic component 1 is stored in the recess 106, a part of the electronic component 1 protrudes upward from the opening. However, the electronic component 1 does not have to protrude from the opening, and if it does not protrude, the electronic component 1 can be transferred in more smoothly.

[0043] From the state shown in FIG. 5(a), as shown in FIG. 5(b), the adhesive sheet 200 is pressed against the main surface A or the side surface B of the plurality of electronic components 1, so that the plurality of electronic components 1 are collectively held by the adhesive sheet 200.

[0044] (Adhesive sheet 200) The adhesive sheet 200 includes a substrate 201 and an adhesive layer 202 formed on one surface of the substrate 201. The adhesive sheet 200 preferably has the following properties. Water absorption rate: The volume change rate when absorbing water is 3% or less, and the water absorption rate is 0.01% or more and 3% or less. Size: 200mm to 1000mm per side. Flexibility: It has a certain degree of flexibility and is elastic enough to return to its original shape even when bent more than 90 degrees. It has transparency.

[0045] (Base material 201) The substrate 201 preferably has the following properties: Thickness: 0.05mm or more and 0.2mm or less. Water absorption rate: The volume change rate when absorbing water is 3% or less, and the water absorption rate is 0.01% or more and 3% or less. Material: epoxy resin containing glass fiber, polyimide, PET. An adhesive layer 202 may be formed on the main surface of the metal plate.

[0046] (Adhesive layer 202) The adhesive layer 202 preferably has the following properties: Thickness: 50 μm or more and 300 μm or less. Heat resistance temperature: The adhesive does not lose its adhesiveness in the range of 130°C to 260°C, and can continue to hold the electronic component 1 even during subsequent heat treatment. Volume resistivity: 10^10 Ω·cm is preferable. A high volume resistivity reduces the risk of erroneous measurements in subsequent measurement processes. Adhesive strength: 0.1N / 25cm or more and 3N / 25cm or less. If the adhesive strength is 0.1N / 25cm or more, it is possible to continue to hold the electronic component 1 without it falling off. Material: Silicone resin or fluororesin. After processing, it can be reused by washing.

[0047] Next, from the state of FIG. 5(b), as shown in FIG. 5(c), the plurality of electronic components 1 held by the adhesive sheet 200 are detached from the transfer device 100 and pulled up from the recess 106.

[0048] 6 is a perspective view showing multiple electronic components 1 held on adhesive sheet 200, showing an example in which the electronic components 1 on adhesive sheet 200 are arranged in a large number, rather than the 4×5 arrangement shown in FIG. 4. For example, on one adhesive sheet 200 measuring 366×280 mm, approximately 1,000 electronic components 1 with a GR18 size of 1.6 mm×0.8 mm×0.5 mm, 1,000 electronic components 1 with a GR21 size of 2.0 mm×1.25 mm×0.6 mm, 1,000 electronic components 1 with a GR31 size of 3.2 mm×1.6 mm×0.85 mm, and 1,000 electronic components 1 with a GR32 size of 3.2 mm×2.5 mm×2.0 mm can be mounted. Note that these sizes include tolerances according to EIA standards.

[0049] However, the present invention is not limited to this, and the electronic components 1 may be held by, for example, picking up the electronic components 1 scattered on the firing sheath, such as the multilayer ceramic capacitor 1B after the external electrodes 3 have been formed, one by one and transferring them to the adhesive sheet. By picking them up one by one in this way, the electronic components 1 can be held on the adhesive sheet without colliding with each other.

[0050] (Location information acquisition step S3) Each adhesive sheet 200 is provided with individual identification information 210. The identification information 210 may be a two-dimensional barcode such as a barcode or a QR code (registered trademark), or may be a numerical value. Each individual electronic component 1 is provided with position information indicating the row and column position of the electronic component 1 on the adhesive sheet 200 having the specific identification information 210. The identification information 210 may be linked to lot information for each electronic component 1, and the design information may be linked to production information for the electronic component 1. The identification information 210 may also be linked to the number of times the adhesive sheet has been used for processing.

[0051] (Appearance inspection process S4) Next, in a visual inspection step as a processing step, adhesive sheet 200 holding multiple electronic components 1 is transported to an inspection position where first visual inspection device 301 is disposed. Fig. 7 is a diagram illustrating the visual inspection step. First visual inspection device 301 includes an imaging device such as a CCD, and inspects the visual appearance of electronic components 1 while held by adhesive sheet 200. Note that Fig. 7 illustrates a multilayer ceramic capacitor 1B as electronic component 1.

[0052] The first visual inspection device 301 includes not only an imaging device 301a1 that images the first main surface A1 side of the electronic component 1, but also an imaging device 301b1 that images the side surface B1 side and an imaging device 301b2 that images the side surface B2 side. If the adhesive sheet 200 is transparent, visual inspection can be performed through the adhesive sheet 200. In this case, the first visual inspection device 301 may further include an imaging device 301a2 that images the second main surface A2 side. Note that, with regard to imaging the second main surface A2 side, the second main surface A2 side may be directly imaged when the electronic component 1 is picked up from the adhesive sheet 200.

[0053] (First information linking step S5) In the first information linking process as an information linking process, the inspection results of each electronic component 1 obtained in the appearance inspection process S4 are linked to the position information or identification information 210 of the corresponding electronic component 1 obtained in the position information acquisition process, and stored in a memory unit not shown.

[0054] (Characteristics inspection process S6) Next, the electronic component 1 is subjected to a characteristic inspection process as a processing process. FIG. 8 is a diagram illustrating the characteristic inspection process. FIG. 8 also illustrates a multilayer ceramic capacitor 1B as the electronic component 1. There are various methods for inspecting the characteristics of the electronic component 1. For example, a measurement probe 303 is brought into contact with the external electrodes 3 of the multilayer ceramic capacitor 1B as the electronic component 1 held on an adhesive sheet 200, and various parameters such as capacitance and insulation resistance are measured. The characteristic inspection may be a burn-in test in which heating and voltage application are performed during measurement. The characteristic inspection may also be performed multiple times, in which case an appearance inspection process may be inserted between characteristic inspections.

[0055] After the characteristic inspection process, if the multilayer ceramic capacitor 1B does not satisfy a certain standard, a heat treatment process may be included to restore the capacitance value. In this case, the heat treatment is, for example, at 130 to 200°C for 10 minutes to 3 hours. The heat treatment process may be performed after the characteristic inspection or after the second information linking process described below.

[0056] The characteristic inspection step may also include an underwater inspection step of inspecting the laminated chip 1A for peeling at the interface with the dielectric layer using ultrasonic waves in water.

[0057] (Second information linking step S7) In the second information linking step, the inspection results of each electronic component 1 acquired in the characteristic inspection step are linked with the position information of the corresponding electronic component 1 and stored in a storage unit (not shown).

[0058] (Storage process S8) Next, in the processing step, the multilayer ceramic capacitor 1B as the electronic component 1 is stored in a carrier tape 400, which is a long packaging material. Fig. 9 is a diagram illustrating the storing step. In the storing step, the multilayer ceramic capacitor 1B that has passed various steps such as the appearance selection step and the characteristic inspection step is stored in a storage hole 401 arranged in the carrier tape 400 and sealed with a top tape 402.

[0059] In the storing step, as shown in the figure, the multilayer ceramic capacitor 1B held on the adhesive sheet 200 is picked up by a nozzle 403 and stored in a carrier tape 400. During picking, the second main surface A2 side may be directly imaged.

[0060] Carrier tape 400 is a long, thin, strip-like member, and has a plurality of storage holes 401 for storing electronic components arranged at equal intervals in the longitudinal direction thereof. After multilayer ceramic capacitors 1B are sequentially loaded into each storage hole 401 of carrier tape 400, picked up by nozzle 403, top tape 402, also made of a long, thin, strip-like member, is superimposed on the surface of the opening side of storage hole 401, and these are sandwiched and thermocompressed to be packaged.

[0061] (Third information linking step S9) In the third information linking process, information regarding which storage hole 401 of which carrier tape 400 the multilayer ceramic capacitor 1B was stored in during the storage process is linked to the position information of each multilayer ceramic capacitor 1B and stored in a memory unit not shown.

[0062] (Effects of the embodiment) As described above, the embodiment includes an electronic component preparation step of preparing, as the electronic component 1, the laminate chip 1A or the multilayer ceramic capacitor 1B including the laminate chip 1A.

[0063] The method also includes an electronic component holding step of holding these electronic components 1 in an aligned state spaced a predetermined distance apart on adhesive layer 202 of adhesive sheet 200, which is an electronic component holding jig. The method also includes a position information acquisition step of acquiring position information of electronic components 1 on adhesive sheet 200, a processing step of processing electronic components 1 while electronic components 1 are held on adhesive sheet 200, and an information linking step of linking the processing results of electronic components 1 with the position information.

[0064] According to the embodiment, multiple processing steps are performed while maintaining the aligned state. Therefore, the number of times that the transfer device used to align the scattered electronic components 1 is used is reduced. This reduces the possibility of defective products being produced due to collisions between electronic components inside the transfer device.

[0065] Since location information and processing results are linked for each electronic component 1, even if a problem occurs in a downstream process or with a user, the electronic component 1 is linked to its location information and identification ID, making it possible to trace where the problem occurred and easily identify the cause of the defective product.

[0066] The electronic components are aligned and held at a predetermined distance apart, making them easy to handle.

[0067] Since the possibility of electronic components 1 colliding with each other is reduced until they are housed in carrier tape 400, the quality of multilayer ceramic capacitor 1B in its final form is improved.

[0068] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various changes and modifications are possible, including the following.

[0069] <1> A method for manufacturing an electronic component, comprising: an electronic component preparation step of preparing an electronic component including a laminate chip in which dielectric layers and internal electrodes are stacked; an electronic component holding step of holding the electronic component in an electronic component holding jig in an aligned state spaced a predetermined distance from each other; a position information acquisition step of acquiring position information of the laminate chip in the electronic component holding jig; a processing step of processing the electronic component while it is held in the electronic component holding jig; and an information linking step of linking the electronic component processing results to the position information.

[0070] <2> The processing step includes a visual inspection step for the electronic component. <1> A method for manufacturing the electronic component according to claim 1.

[0071] <3> the processing step includes a characteristic inspection step for the electronic component; <1> or <2> A method for manufacturing the electronic component according to claim 1.

[0072] <4> the processing step includes a step of forming external electrodes on the stacked chip; <1> from <3> 10. A method for manufacturing an electronic component according to any one of the preceding claims.

[0073] <5> The treatment step includes a heat treatment step of the electronic component at 130°C or higher. <1> from <4> 10. A method for manufacturing an electronic component according to any one of the preceding claims.

[0074] <6> The processing step includes an underwater processing step for the electronic component. <1> from <5> 10. A method for manufacturing an electronic component according to any one of the preceding claims.

[0075] <7> The processing step includes a step of storing the electronic components in a long packaging material. <1> from <6> 10. A method for manufacturing an electronic component according to any one of the preceding claims.

[0076] <8> the processing result of the electronic component includes position information on the packaging material. <7> A method for manufacturing the electronic component according to claim 1.

[0077] <9> The distance between the electronic components is 0.1 mm or more and 10 mm or less. <1> from <8> 10. A method for manufacturing an electronic component according to any one of the preceding claims.

[0078] <10> The electronic component has a lengthwise dimension of 1.0 mm or more and 3.2 mm or less, a widthwise dimension of 0.5 mm or more and 2.5 mm or less, and a stacking direction dimension of 0.2 mm or more and 2.8 mm or less. <1> from <9> 10. A method for manufacturing an electronic component according to any one of the preceding claims.

[0079] <11> The electronic component holder is an adhesive sheet having a heat resistance temperature of 130°C or higher and 260°C or lower. <1> from <10> 10. An electronic component holding jig used in the method for manufacturing an electronic component according to any one of the above.

[0080] <12> The electronic component holder is an adhesive sheet having a water absorption rate of 0.01% or more and 3% or less. <11> The electronic component holding jig according to claim 1.

[0081] <13> The electronic component holder is an adhesive sheet having a base material and an adhesive layer, and is reusable by cleaning the adhesive layer after the treatment step. <11> or <12> The electronic component holding jig according to claim 1.

[0082] <14> The electronic component holder is an adhesive sheet having a substrate and an adhesive layer, the thickness of the substrate being 50 μm or more and 200 μm or less, and the thickness of the adhesive layer being 50 μm or more and 300 μm or less. <11> from <13> 10. An electronic component holding jig according to claim 9.

[0083] <15> the electronic component holder is an adhesive sheet having a substrate and an adhesive layer, the adhesive layer being made of a silicone resin or a fluororesin; <11> from <14> 10. An electronic component holding jig according to claim 9.

[0084] <16> The electronic component holder is a transparent adhesive sheet. <11> from <15> 10. An electronic component holding jig according to claim 9. [Explanation of symbols]

[0085] 1. Electronic Components 1B multilayer ceramic capacitor 1A stacked chip 3 External electrode 14 Dielectric layer 15 Internal electrode 30 Base electrode layer 30a Baking layer 100 Transfer device 106 Recess 200 adhesive sheets 202 Adhesive layer 210 Identification Information 301 First appearance inspection device 302 Second appearance inspection device 303 Measuring Probe 400 Carrier Tape 401 Storage hole

Claims

1. an electronic component preparation step of preparing an electronic component including a laminate chip in which dielectric layers and internal electrodes are laminated; an electronic component holding step of holding the electronic components in an electronic component holding jig in an aligned state spaced a predetermined distance apart from each other; a position information acquiring step of acquiring position information of the laminated chip in the electronic component holding jig; a processing step of processing the electronic component in a state where the electronic component is held by the electronic component holding jig; an information linking step of linking the processing result of the electronic component with the location information, The treatment step includes a heat treatment step of the electronic component at 130°C or higher and 200°C or lower. Manufacturing methods for electronic components.

2. The processing step includes a visual inspection step for the electronic component. The method for manufacturing an electronic component according to claim 1 .

3. the processing step includes a characteristic inspection step for the electronic component; The method for manufacturing an electronic component according to claim 1 .

4. the processing step includes a step of forming external electrodes on the stacked chip; The method for manufacturing an electronic component according to claim 1 .

5. The processing step includes an underwater processing step for the electronic component. The method for manufacturing an electronic component according to claim 1 .

6. The processing step includes a step of storing the electronic components in a long packaging material. The method for manufacturing an electronic component according to claim 1 .

7. the processing result of the electronic component includes position information on the packaging material. The method for manufacturing an electronic component according to claim 6 .

8. The distance between the electronic components is 0.1 mm or more and 10 mm or less. The method for manufacturing an electronic component according to claim 1 .

9. The electronic component is The lengthwise dimension is 1.0 mm or more and 3.2 mm or less, The width dimension is 0.5 mm or more and 2.5 mm or less, The dimension in the stacking direction is 0.2 mm or more and 2.8 mm or less. The method for manufacturing an electronic component according to claim 1 .

10. The electronic component holder is an adhesive sheet having a heat resistance temperature of 130°C or higher and 260°C or lower. An electronic component holding jig used in the method for manufacturing an electronic component according to any one of claims 1 to 9.

11. The electronic component holder is an adhesive sheet having a water absorption rate of 0.01% or more and 3% or less. An electronic component holding jig used in the method for manufacturing an electronic component according to any one of claims 1 to 9.

12. The electronic component holder is an adhesive sheet having a base material and an adhesive layer, and is reusable by cleaning the adhesive layer after the treatment step. An electronic component holding jig used in the method for manufacturing an electronic component according to any one of claims 1 to 9.

13. The electronic component holder is an adhesive sheet having a substrate and an adhesive layer, the substrate having a thickness of 50 μm or more and 200 μm or less, and the adhesive layer having a thickness of 50 μm or more and 300 μm or less. An electronic component holding jig used in the method for manufacturing an electronic component according to any one of claims 1 to 9.

14. the electronic component holder is an adhesive sheet having a substrate and an adhesive layer, the adhesive layer being made of a silicone resin or a fluororesin; An electronic component holding jig used in the method for manufacturing an electronic component according to any one of claims 1 to 9.

15. The electronic component holder is a transparent adhesive sheet. An electronic component holding jig used in the method for manufacturing an electronic component according to any one of claims 1 to 9.

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