Power Conversion Device

The power conversion device uses a ripple cancellation current generating circuit to synchronize inductor currents, effectively suppressing ripple current without a noise filter, achieving a smaller, lighter, and more cost-effective design.

JP7784638B2Active Publication Date: 2025-12-12PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
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Patent Information

Application Number
JP2022568345
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-12-11
Filing Date
2021-12-10
Publication Date
2025-12-12
Estimated Expiration
2041-12-10

AI Technical Summary

Technical Problem

Existing power conversion devices require large noise filters to suppress all frequency components of ripple current, hindering miniaturization.

Method used

A power conversion device with a ripple cancellation current generating circuit that cancels out ripple current by generating a counter-current using inductors and switch elements, allowing for synchronized control to eliminate the need for a noise filter.

Benefits of technology

This approach effectively suppresses all frequency components of ripple current, reducing the size, weight, and cost of the device by eliminating the need for a large noise filter.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

This power conversion apparatus (1) has a pair of input terminals (T1, T2) and a pair of output terminals (T3, T4), and is provided with: a first series circuit that comprises a first inductor (L1) and a first switching element (S1) and that is connected in parallel to the pair of input terminals (T1, T2); and a switching circuit (11) that switches, by using a second switching element (S4), a voltage between both ends of the first switching element (S1) and outputs the voltage. The power conversion apparatus (1) includes a power conversion circuit (1) that converts an input voltage inputted to the pair of input terminals (T1, T2) to a predetermined output voltage and then outputs the output voltage to the pair of output terminals (T3, T4). The power conversion apparatus (1) is provided with a ripple cancellation current generation circuit (4) that, when the first switching element (S1) is subjected to ON / OFF control, generates a ripple cancellation current for cancelling a ripple current generated by accumulation and discharge of current energy to and from the first inductor (L1), and inputs the ripple cancellation current to the pair of input terminals (T1, T2) of the power conversion apparatus, whereby the ripple current is cancelled.
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Description

[Technical Field]

[0001] The present disclosure relates to a power conversion device such as a switching power supply circuit. [Background technology]

[0002] In switching power supply circuits such as boost converters, the repeated accumulation and release of magnetic (current) energy in the reactor generates a triangular ripple current. If this ripple current propagates outside the switching power supply circuit, there is a concern that it may adversely affect other electronic devices as electromagnetic noise. For this reason, it is necessary to suppress the propagation of ripple current within the switching power supply circuit.

[0003] Patent Document 1 discloses a method for suppressing ripple current using an interleaving method. In the case of two-phase interleaving, odd-order harmonic components of the frequency components contained in triangular ripple current can be suppressed. On the other hand, when the inductance of the reactor is the same, even-order harmonic components increase by 6 dB (double).

[0004] Patent Document 2 discloses a suppression method using a frequency spread control system. The switching frequency is varied to prevent noise energy from concentrating at a single frequency. When the switching frequency is varied between 90 kHz and 110 kHz, the energy of the fundamental wave is dispersed between 90 kHz and 110 kHz (a range of 20 kHz), and the energy of the second harmonic is dispersed between 180 kHz and 220 kHz (a range of 40 kHz). In other words, the dispersion range is wide for higher-order harmonics, and a significant suppression effect can be achieved. On the other hand, the suppression effect is limited for the fundamental wave and lower-order harmonics. Furthermore, when peak detection is used as a noise observation method, no noise suppression effect can be achieved.

[0005] Patent Document 3 discloses a suppression method using a bypass circuit. By magnetically coupling the inductor and reactor of the bypass circuit, the fundamental component of the ripple current can be significantly suppressed. However, the suppression effect on harmonic components is low. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 3570113 [Patent Document 2] Japanese Patent Application Publication No. 7-264849 [Patent Document 3] Patent No. 5971607 Summary of the Invention [Problem to be solved by the invention]

[0007] However, as mentioned above, the degree and range of noise suppression effect is limited regardless of the technology used. Therefore, a large noise filter is required to sufficiently suppress all frequency components of noise. This poses a problem of preventing the miniaturization of power supply devices.

[0008] An object of the present disclosure is to solve the above problems and to provide a power conversion device that is a switching power supply circuit such as a boost converter, which can suppress all frequency components of ripple current without using a large noise filter. [Means for solving the problem]

[0009] A power conversion device according to one aspect of the present disclosure includes: A power conversion device having a pair of input terminals and a pair of output terminals, a first series circuit of a first inductor and a first switch element connected in parallel to the pair of input terminals; and a switching circuit that switches and outputs a voltage across the first switch element using a second switch element, and that converts an input voltage input to the pair of input terminals into a predetermined output voltage and then outputs the output voltage to the pair of output terminals, the power conversion device includes a ripple cancellation current generating circuit that generates a ripple cancellation current that cancels out a ripple current generated by storing and releasing current energy in the first inductor when the first switch element is on / off controlled, and inputs the ripple cancellation current to a pair of input terminals of the power conversion device, thereby canceling out the ripple current; The ripple canceling current generating circuit comprises: a second inductor having one end connected to one of the pair of input terminals; a second series circuit connected between the other end of the second inductor and the other of the pair of input terminals, the second series circuit being configured by connecting a third switch element and a first capacitor in series; 2 and a series circuit of The above 2 a third series circuit connected in parallel to the series circuit of the first series circuit, the third series circuit being configured by connecting a fourth switch element and a second capacitor in series; a power supply device that applies a predetermined voltage to the second capacitor; Equipped with. [Effects of the Invention]

[0010] According to a power conversion device according to an embodiment of the present disclosure, it is possible to cancel out triangular ripple current. In other words, it is possible to suppress all frequency components of the ripple current. As a result, compared to conventional power conversion devices, it is possible to reduce the number of noise filters, thereby achieving a smaller, lighter, and more cost-effective device. [Brief explanation of the drawings]

[0011] [Figure 1A] 1 is a block diagram showing an example of the configuration of a power conversion device according to a first embodiment. [Figure 1B] 1B is a block diagram showing an example of the configuration of a control circuit 10 in FIG. 1A. [Figure 2] 1B is a timing chart showing a current I1 flowing through an inductor L1 in response to a gate control signal G1 in FIG. 1A. [Figure 3]1B is a timing chart showing the relationship between gate control signals G1 to G4 in FIG. 1A and the current waveforms of currents I1 and I2 in inductors L1 and L2. [Figure 4] FIG. 1 is a block diagram showing an example of the configuration of a power conversion device according to a conventional technique. [Figure 5] 1B is a circuit diagram showing an example of the configuration of a switching circuit 11-1 according to a first embodiment that is applied to the power conversion device of FIG. 1A. FIG. [Figure 6] 6 is a diagram showing a simulation result of the power conversion device using the switching circuit 11-1 of FIG. 5, and is a timing chart showing the currents I1 and I2 of the inductors L1 and L2 and the power supply inflow current Ips. [Figure 7] 1B is a circuit diagram showing a configuration example of a switching circuit 11-2 according to a second embodiment that is applied to the power conversion device of FIG. 1A. FIG. [Figure 8] FIG. 10 is a block diagram showing a configuration example of a power conversion device according to a second embodiment. [Figure 9] 9 is a timing chart showing the relationship between gate control signals G1 to G6 in FIG. 8 and the current waveforms of currents I1, I2, I5 and current I1+I5 of inductors L1, L2, L5. [Figure 10] 9 is a circuit diagram showing a configuration example of a switching circuit 11A of FIG. 8. FIG. [Figure 11] 9 is a diagram showing a simulation result of the power conversion device of FIG. 8, and is a timing chart showing the current waveforms of currents I1, I2, I5 and I1+I5 of inductors L1, L2, L5 and power supply inflow current Ips. [Figure 12] FIG. 10 is a block diagram showing a configuration example of a power conversion device according to a third embodiment. [Figure 13] 13 is a circuit diagram showing an example of the configuration of the voltage conversion circuit 3 of FIG. 12. FIG. [Figure 14A] 13 is a timing chart showing the relationship between gate control signals G1 to G4 and currents I1 and I2 of inductors L1 and L2 in FIG. [Figure 14B]13 is a timing chart showing the relationship between gate control signals G7 to G10 and currents I6, I7 and I6+I7 of inductors L6 and L7 in FIG. 12. [Figure 15] FIG. 10 is a block diagram showing a configuration example of a power conversion device according to a fourth embodiment. [Figure 16] FIG. 10 is a block diagram showing a configuration example of a power conversion device according to a fifth embodiment. [Figure 17] FIG. 17 is a block diagram showing an example of the configuration of a control circuit 15 in FIG. 16. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings, in which the same or similar components are denoted by the same reference numerals.

[0013] (Embodiment 1) Fig. 1A is a block diagram showing a configuration example of a power conversion device according to embodiment 1. The power conversion device in Fig. 1A is a power conversion device, such as a DC / DC converter, including a power conversion circuit 1 that includes an inductor L1 and a switching circuit 11 and performs power conversion, such as DC / DC conversion, on a voltage input to a pair of input terminals T1 and T2, and then outputs the converted voltage to a pair of output terminals T3 and T4, and is characterized by further including a ripple cancellation current generation circuit 4 that generates a ripple cancellation current that cancels out a ripple current generated by the accumulation and release of current energy in the inductor L1 in response to gate control signals G1 and G4 supplied from a control circuit 10 to the switching circuit 11, and inputs the ripple cancellation current to the input terminals T1 and T2 of the power conversion device, thereby canceling out the ripple current.

[0014] 1A, the power conversion circuit 1 has a pair of input terminals T1 and T2 and a pair of output terminals T3 and T4, and is configured with a smoothing circuit 5, a switch element S1, and a switching circuit 11. Here, the switching circuit 11 is, for example, a switching circuit 11-1 which is a step-up DC / DC converter as shown in FIG. 5, or a switching circuit 11-2 which is a step-up / step-down DC / DC converter (SEPIC (Single Ended Primary Inductor Converter)) as shown in FIG. 7.

[0015] The smoothing circuit 5 includes a smoothing capacitor C1 and an inductor L1, which is a reactor. The smoothing capacitor C1 is connected in parallel to the input terminals T1 and T2, and the inductor L1 is connected between the input terminal T1 and the input terminal T11 of the switching circuit 11. The switch element S1 is connected in parallel to the input terminals T11 and T12 of the switching circuit 11, and is controlled to be turned on / off in accordance with a gate control signal G1 from the control circuit 10. The input terminal T2 is connected to the input terminal T12 of the switching circuit 11.

[0016] The switching circuit 11 has input terminals T11 and T12 and output terminals T13 and T14, and switches the voltage input to the input terminals T11 and T12 in accordance with a gate control signal G4 from the control circuit 10, and then outputs it to the output terminals T3 and T4 via the output terminals T13 and T14.

[0017] The ripple cancellation current generating circuit 4 is connected in parallel with the input terminals T1 and T2 of the power conversion circuit 1 and is composed of a power supply device 12 that generates a predetermined applied voltage V1, an inductor L2, switch elements S2 and S3, and capacitors C2 and C3. The input terminal T1 is connected to the input terminal T2 via the inductor L2 and a series circuit of the switch element S2 and capacitor C2, and is also connected to the input terminal T2 via the inductor L2 and a series circuit of the switch element S3 and capacitor C3. The power supply device 12 generates the applied voltage V1 and applies it to the connection point between the switch element S3 and capacitor C3. The switch elements S2 and S3 are controlled on / off in accordance with gate control signals G2 and G3, respectively, from the control circuit 10.

[0018] The switch elements S1 to S4 (switch elements S5 to S10 in other embodiments) are configured by, for example, MOS field effect transistors, and gate control signals G1 to G4 are applied to the gates of the switch elements S1 to S4 from the control circuit 10 to control the ON / OFF state of the switch elements S1 to S4.

[0019] Fig. 1B is a block diagram showing an example of the configuration of the control circuit 10 of Fig. 1A. In Fig. 1B, the control circuit 10 is configured to include a PWM signal generator 31, a delay circuit 32, inverters 33 and 34, and gate drivers 41 to 44.

[0020] 1B, gate control signals G1 to G4 for driving switch elements S1 to S4 are generated by the same control circuit 10 and transmitted to switch element S1 of power conversion circuit 1, switch element S4 (described later) of switching circuit 11, and switch elements S2 and S3. This prevents misalignment of the switching timing between power conversion circuit 1 and switch elements S2 and S3. Since misalignment of the switching timing may weaken the effect of suppressing ripple current, the power conversion device of FIG. 1A can compensate for the effect of suppressing ripple current.

[0021] Furthermore, in the control circuit 10, a delay may be added to either the gate control signals G1, G4 or the gate control signals G2, G3 by, for example, a delay circuit 32 so as to correct the difference in switching speed (transition time) between the switch element S1 and the switch elements S2 and S3. For example, as shown in FIG. 1B, after the PWM signal generator 31 generates a predetermined PWM signal, (1) Generate a gate control signal G1 via the gate driver 41; (2) generating a gate control signal G4 via an inverter 33 and a gate driver 44; (3) generating a gate control signal G2 through the delay circuit 32, the inverter 34, and the gate driver 42; (4) A gate control signal G3 is generated via the delay circuit 32 and the gate driver 43.

[0022] It is assumed that switch elements S2 and S3 will use components with a smaller rated current than switch element S1. Components with a smaller rated current tend to have faster switching speeds, so this difference can prevent the suppression effect from being weakened.

[0023] Fig. 2 is a timing chart showing the current I1 flowing through the inductor L1 in response to the gate control signal G1 in Fig. 1A. In the timing charts from Fig. 2 onwards, when each gate control signal is at a high level, the switch element applied to the gate is turned on, whereas when each gate control signal is at a low level, the switch element applied to the gate is turned off.

[0024] In Figure 1A, a voltage Vin is applied between input terminals T1 and T2. When switch element S1 is on, magnetic energy is stored in inductor L1. On the other hand, when switch element S1 is off, the magnetic energy of inductor L1 is released. As a result, the current flowing through inductor L1 is the sum of the DC amplitude Adc and the triangular wave amplitude Atri, as shown in Figure 2.

[0025] 3 is a timing chart showing the relationship between the gate control signals G1 to G4 in FIG. 1A and the waveforms of the currents I1 and I2 through inductors L1 and L2. As shown in FIG. 3, when switch element S1 is on, switch element S2 is turned off and switch element S3 is turned on (state ST1). Also, when switch element S1 is off, switch element S2 is turned on and switch element S3 is turned off (state ST2). That is, the gate control signals G2 and G3 for the ripple cancellation current generating circuit 4 are generated in synchronization with the gate control signals G1 and G4 of the power conversion circuit 1. Here, if a voltage V1 higher than the input voltage Vin is applied to capacitor C3 using power supply device 12, the current through inductor L2 decreases in state ST1 and increases in state ST2, as shown in FIG. 3.

[0026] The net current generated in the power conversion circuit 1 is the sum of the currents flowing through inductor L1 and inductor L2. That is, the triangular wave component of current I1 flowing through inductor L1 is canceled out by current I2 (ripple cancellation current) flowing through inductor L2.

[0027] Fig. 4 is a block diagram showing an example of the configuration of a power conversion device according to the prior art. In the power conversion device according to the prior art, as shown in Fig. 4, a noise filter 2 having input terminals T5 and T6 is used to suppress propagation of the ripple current Ips to the power supply. In contrast, in the power conversion device according to the first embodiment, the noise filter 2 can be eliminated.

[0028] Because the noise filter 2 is connected in series with the power conversion circuit 1, a large current flows through it. This requires the use of components with a large rated current, which leads to an increase in size and cost. On the other hand, as shown in FIG. 3, only a small current corresponding to the triangular wave amplitude Atri flows through the inductor L2 and switch elements S2 and S3 used in the first embodiment (no DC component flows). This allows the use of components with a small rated current. This not only means that the circuit can be implemented in a compact and low-cost manner, but also that the power loss in these components is small.

[0029] Furthermore, because the ripple cancellation current generating circuit 4 is connected in parallel with the power conversion circuit 1, it does not affect the basic operation of the power conversion circuit 1. In other words, after optimally designing the power conversion circuit 1 from the perspective of power conversion efficiency, etc., a design for reducing ripple current can be implemented. Furthermore, unlike approaches that attempt to "detect" noise and then cancel it, this approach can cancel ripple current simply by driving in synchronization. This means that a suppression effect can be achieved even when there is external noise that could cause detection errors, and it can be applied to devices with strict safety requirements, such as automotive equipment.

[0030] (First Example of Embodiment 1 (Step-Up DC / DC Converter)) Fig. 5 is a circuit diagram showing an example configuration of a switching circuit 11-1 according to a first embodiment that is applied to the power conversion device of Fig. 1A. In Fig. 5, the switching circuit 11-1 is configured to include a switch element S4 and a capacitor C4. The input terminal T11 is connected to the output terminal T13 via the switch element S4, and the input terminal T12 is connected to the output terminal T14. The capacitor C4 is connected in parallel to the output terminals T13 and T14.

[0031] As shown in Fig. 3, when switch elements S1 and S4 are alternately turned on and off, the power conversion circuit 1 operates as a step-up DC / DC converter. When the duty ratio of the gate control signal G1 for switch element S1 is D and the duty ratio of the gate control signal G4 for switch element S4 is 1-D, and the power conversion circuit 1 is driven with a period T, the triangular wave amplitude Atri shown in Fig. 3 in the steady state is expressed by the following equation:

[0032] Atri=DT×(Vin / L1) (1)

[0033] Here, when L2 = a × L1 (a is a predetermined positive coefficient), the conditions for completely canceling out the ripple current Ips in inductor L1 are shown. In order to completely cancel out the ripple current Ips, the triangular wave amplitudes Atri of the currents I1 and I2 flowing through inductors L1 and L2 in Figure 3 must be the same. In a steady state, the triangular wave amplitude Atri of inductor L2 is expressed by the following equation:

[0034] Atri=DT×(V1-Vin) / (a×L1) (2)

[0035] Therefore, when the applied voltage V1 of the power supply device 12 is V1=(1+a)×Vin, the triangular wave amplitudes Atri of the currents flowing through the inductors L1 and L2 match, and the ripple current Ips is completely cancelled out.

[0036] While the above conditions are optimal, setting the value of the applied voltage V1 of the power supply device 12 between (1 + 0.5A) × Vin and (1 + 1.5A) × Vin can achieve a noise reduction effect of 6 dB or more. In other words, the amplitude of the noise current can be reduced by more than half. In this case, too, by reducing the number of components in the noise filter 2, it is possible to achieve a smaller size and lower costs.

[0037] Next, referring to FIG. 6, the effect of reducing the ripple current Ips will be shown by circuit simulation.

[0038] In FIG. 1A, the inductances of the inductors L1 and L2 are set to L1=L2=200 μH. The switch elements S1 to S4 are all configured, for example, with MOS field effect transistors, and the switching frequency of the switch elements S1 to S4 is set to 100 kHz (cycle T=1 / 100 kHz=10 μ Here, the duty ratio D of the gate control signals G1 and G3 for the switch elements S1 and S3 is set to D=0.7. If the input voltage Vin=100V, the applied voltage V1 of the power supply device 12 is calculated to be 200V, so a voltage of 200V is applied from the power supply device 12 to the capacitor C3.

[0039] Fig. 6 is a diagram showing the results of a simulation of a power conversion device using the switching circuit 11-1 of Fig. 5, and is a timing chart showing the currents I1 and I2 of inductors L1 and L2 and the power supply inflow current Ips. As is clear from Fig. 6, the triangular wave component contained in the current of inductor L1 is canceled out by the current I2 of inductor L2. This confirms that the power supply inflow current Ips propagating from input terminal T1 to the power supply does not contain a ripple component.

[0040] Incidentally, even if the on / off timings of the switch elements S2 and S3 are interchanged and V1=Vin×{1−(1+a)D} / (1−D), the same effect as before the timing interchange can be obtained.

[0041] As described above, the switch elements S1 to S4 may be transistors such as MOS field-effect transistors or GaN-HEMTs (High Electron Mobility Transistors). A diode may be used for the switch element S4, in which case the gate control signal G4 is not required.

[0042] (power factor correction circuit) Furthermore, a full-bridge diode rectifier circuit, for example, may be connected in front of the input terminals T1 and T2 to configure the power factor correction circuit. In this case, an AC voltage is input to the input terminals of the power factor correction circuit, and the input voltage Vin to the power conversion circuit 1 fluctuates, so the applied voltage V1 of the power supply device 12 can be varied accordingly. In this case, the noise filter 2 can be eliminated, which also has the effect of improving the power factor.

[0043] (Second Example of Embodiment 1 (SEPIC)) Fig. 7 is a circuit diagram showing a configuration example of a switching circuit 11-2 according to a second embodiment that is applied to the power conversion device of Fig. 1A. In Fig. 7, the switching circuit 11-2 is configured to include a switch element S4, capacitors C4 and C5, and an inductor L4. The input terminal T11 is connected to the output terminal T13 via the capacitor C5 and the switch element S4, and the input terminal T12 is connected to the output terminal T14. The capacitor C4 is connected in parallel with the output terminals T13 and T14. Furthermore, the inductor L4 is connected between the connection point of the capacitor C5 and the switch element S4 and the input terminal T12.

[0044] As shown in Fig. 3, when switch elements S1 and S4 are alternately turned on and off, the power conversion circuit 1 operates as a SEPIC (Single Ended Primary Inductor Converter; step-up / step-down DC / DC converter). When the duty ratio of the gate control signal G1 for switch element S1 is D and the duty ratio of the gate control signal G4 for switch element S4 is 1-D, and the power conversion circuit 1 is driven with a period T, the triangular wave amplitude Atri shown in Fig. 3 in a steady state is expressed by the following equation:

[0045] Atri=DT×(Vin / L1) (3)

[0046] In the same manner as in the step-up DC / DC converter according to the first example of the first embodiment, the ripple current Ips can be cancelled out.

[0047] (Embodiment 2) Fig. 8 is a block diagram showing a configuration example of a power conversion device according to embodiment 2. In Fig. 8, the power conversion device according to embodiment 2 has the following differences compared to the power conversion device according to embodiment 1 in Fig. 1. (1) Instead of the power conversion circuit 1, a power conversion circuit 1A is provided. (2) A smoothing circuit 5A is provided instead of the smoothing circuit 5. The smoothing circuit 5A further includes an inductor L5, which is a reactor, in addition to the components of the smoothing circuit 5. (3) Compared to the power conversion circuit 1, the power conversion circuit 1A further includes a switch element S5 that is on / off controlled by a gate control signal G5. (4) Instead of the switching circuit 11, a switching circuit 11A is provided which further has an input terminal T15 and is on / off controlled by gate control signals G4 and G6. (5) A control circuit 10A is provided instead of the control circuit 10. The control circuit 10A generates gate control signals G1 to G6. The differences will be explained below.

[0048] 8, input terminal T1 is connected to input terminal T15 of switching circuit 11A via inductor L5, which is a reactor, and input terminal T15 is connected to input terminal T12 via switch element S5. Here, power conversion circuit 1A forms a two-phase interleaved circuit that drives switch elements S1 and S5 with a half-cycle (T / 2) shift.

[0049] FIG. 9 is a timing chart showing the relationship between the gate control signals G1 to G6 in FIG. 8 and the waveforms of the currents I1, I2, I5, and I1+I5 of inductors L1, L2, and L5. FIG. 9 shows the current waveforms when the duty ratio of the gate control signals G1 and G5 for switch elements S1 and S5 is greater than 0.5. In FIG. 9, in state ST3, one of switch elements S1 and S5 is turned on and the other is turned off. In state ST4, both switch elements S1 and S5 are turned on. At this time, the input current of the power conversion circuit 1A is the sum (I1+I5) of the currents flowing through inductors L1 and L5. That is, the gate control signals G2 and G3 for the ripple cancellation current generation circuit 4 are generated in synchronization with the gate control signals G1, G4 to G6 of the power conversion circuit 1.

[0050] In the power conversion device of Fig. 8, in state ST3, switch element S2 is turned on and switch element S3 is turned off, as shown in Fig. 9. Also, in state ST4, switch element S2 is turned off and switch element S3 is turned on. When power supply device 12 is used to apply an applied voltage V1 higher than input voltage Vin to capacitor C3, as shown in Fig. 9, current I2 through inductor L2 increases in state ST3 and decreases in state ST4.

[0051] 8 is the sum (I1+I2+I5) of the currents flowing through inductors L1, L5, and L2. That is, the triangular wave component included in the sum (I1+I5) of the currents flowing through inductors L1 and L5 is canceled out by the current I2 flowing through inductor L2. This allows the noise filter 2 to be eliminated, as in the first embodiment.

[0052] (Interleaved step-up DC / DC converter) FIG. 10 is a circuit diagram showing an example of the configuration of the switching circuit 11A of FIG. 8 that constitutes the interleaved boost DC / DC converter.

[0053] The switching circuit 11A in FIG. 10 differs from the switching circuit 11-1 in FIG. 5 in the following respects. (1) The input terminal T15 and the switch element S6 are further provided. (2) The input terminal T15 is connected to the output terminal T13 via a switch element S6 that is on / off controlled by a gate control signal G6.

[0054] In the power conversion device of Fig. 8 including the switching circuit 11A configured as described above, when switch elements S1 and S4 are alternately turned on / off and switch elements S5 and S6 are alternately turned on / off and switch elements S1 and S5 are shifted by a half period (T / 2) from each other and driven, as shown in Fig. 9, the power conversion circuit 1A operates as an interleaved step-up DC / DC converter. When the duty ratio of gate control signals G1 and G5 for switch elements S1 and S5 is D and the duty ratio of gate control signals G4 and G6 for switch elements S4 and S6 is 1-D and the power conversion circuit 1A is driven with a period T, the triangular wave amplitude Atri shown in Fig. 9 in a steady state is expressed by the following equation:

[0055] Atri = (2D-1)T × (Vin / L1) (4)

[0056] Here, when the inductances of the inductors are L5 = L1 and L2 = a × L1, the conditions for completely canceling out the triangular wave component contained in the sum of the currents flowing through inductors L1 and L5 are as follows: In order to completely cancel out the ripple current, in Figure 9, the sum of the currents flowing through inductors L1 and L5 (I1 + I5) must match the triangular wave amplitude Atri of the current I2 flowing through L2. In a steady state, the triangular wave amplitude Atri of inductor L2 is expressed by the following equation:

[0057] Atri=(D-0.5)T×(V1-Vin) / (a×L1) (5)

[0058] Therefore, if the applied voltage is V1 = (1 + 2a) × Vin (where the coefficient a is a positive integer), the sum of the currents flowing through inductors L1 and L5 (I1 + I5) will match the triangular wave amplitude Atri of the current I2 flowing through inductor L2, and the ripple current will be completely canceled out.

[0059] Although the above are the optimal conditions, if the value of the applied voltage V1 of the power supply device 12 is set to a value between (1+a)×Vin and (1+3a)×Vin, a noise reduction effect of 6 dB or more can be obtained, i.e., the amplitude of the noise current is suppressed to less than half. In this case, too, by reducing the number of components in the noise filter 2, it is possible to achieve a smaller size and lower costs.

[0060] Fig. 11 is a diagram showing the results of a simulation of the power conversion device of Fig. 8, and is a timing chart showing the waveforms of currents I1, I2, I5 and I1+I5 of inductors L1, L2, L5 and the power supply inflow current Ips. Fig. 11 shows the effect of reducing ripple current by circuit simulation.

[0061] In Figure 8, the inductances of the inductors are L1 = L5 = L2 = 200 μH. All of the switch elements S1 to S6 are configured using MOS field-effect transistors. The switching frequency of switch elements S1, S4 to S6 is 100 kHz, i.e., the period T = 1 / 100 kHz = 10 μs. The switching frequency of switch elements S2 and S3 is 200 kHz, and the duty ratio D of the gate control signals G1 and G5 for switch elements S1 and S5 is 0.7. If the input voltage Vin is 100 V, the applied voltage V1 of power supply 12 is calculated to be 300 V, so V1 = 300 V is applied from power supply 12 to capacitor C3. The current waveforms at each point are shown in Figure 11.

[0062] As is clear from Figure 11, the current I1 through inductor L1 and the current I5 through inductor L5 contain a 100 kHz triangular wave component, and are shifted by a half cycle of 5 μs from each other. Therefore, the sum of the currents through inductors L1 and L5 (I1 + I5) contains a triangular wave component with twice the frequency, 200 kHz. This is cancelled out by the current I2 through inductor L2. This confirms that the current Ips propagating from input terminal T1 to the power supply does not contain a triangular wave ripple component.

[0063] In FIG. 10, the same effect can be obtained by exchanging the on and off timings of the switch elements S2 and S3, so that V1=Vin×{1−a×(2D−1) / (1−D)}.

[0064] In addition, inductors L1 and L5 may be magnetically coupled to each other. In this case, inductors L1 and L5 can be implemented as a single coupled inductor. Furthermore, power conversion circuit 1 may be configured as a three- or more-phase interleaved circuit.

[0065] Furthermore, in the interleaved circuit, in order to improve power conversion efficiency, only a single phase may be operated under light load. In this case, the control of the switch elements S2 and S3 and the applied voltage V1 of the power supply device 12 may be switched depending on the operation method. That is, the operation may be performed according to the second embodiment during interleaved operation, and according to the first embodiment during single-phase operation. This makes it possible to suppress noise regardless of the operation method of the interleaved circuit.

[0066] (Embodiment 3) Fig. 12 is a block diagram showing a configuration example of a power conversion device according to embodiment 3. In Fig. 12, the power conversion device according to embodiment 3 has the following differences compared to the power conversion device according to embodiment 1 in Fig. 1. (1) The ripple canceling current generating circuit 4 is replaced with a ripple canceling current generating circuit 4A. (2) The ripple canceling current generating circuit 4A includes a voltage conversion circuit 3 instead of the power supply device 12. Here, the voltage conversion circuit 3 is an example of a power supply device. (3) A control circuit 10B is provided instead of the control circuit 10. The control circuit 10B generates gate control signals G1 to G4 and G7 to G10. The differences will be explained below.

[0067] In FIG. 12, voltage conversion circuit 3 has input terminals T21 and T22 and output terminals T23 and T24, converts input voltage Vin to applied voltage V1, and applies it to capacitor C3. As described in the first embodiment, if applied voltage V1 = (1 + a) × Vin, ripple current is completely canceled out. When the power conversion device of FIG. 12 according to the third embodiment is used, the input voltage of voltage conversion circuit 3 is Vin, so that voltage conversion circuit 3 only needs to perform power conversion with a step-up ratio of 1 + a, regardless of the state of power conversion circuit 1 (drive cycle and duty ratio of each switch element). Therefore, there is no need to synchronize with power conversion circuit 1, and applied voltage V1 can be generated easily from a design perspective.

[0068] Fig. 13 is a circuit diagram showing an example of the configuration of the voltage conversion circuit 3 of Fig. 12. In Fig. 13, the voltage conversion circuit 3 is configured to include capacitors C6 and C7, inductors L6 and L7, and switch elements S7 to S10. Here, the switch elements S7 to S10 are on / off controlled by gate control signals G7 to G10 from a control circuit 10B, respectively.

[0069] 13, a capacitor C6 is connected in parallel between input terminals T21 and T22, and a capacitor C7 is connected in parallel between output terminals T23 and T24. The input terminal T21 is connected to the input terminal T22 and output terminal T24 via an inductor L6 and a switch element S7, and is also connected to the output terminal T23 via an inductor L6 and a switch element S9. The input terminal T21 is also connected to the output terminal T24 via an inductor L7 and a switch element S8, and is also connected to the output terminal T23 via an inductor L7 and a switch element S10.

[0070] In the voltage conversion circuit 3 of Fig. 13 configured as above, the inductance of the inductor is set to L1 = L2. In this case, since the positive coefficient a = 1, the applied voltage V1 = 2Vin. Therefore, the voltage conversion circuit 3 of Fig. 13 constitutes an interleaved boost DC / DC converter.

[0071] Fig. 14A is a timing chart showing the relationship between the gate control signals G1 to G4 and the currents I1 and I2 of inductors L1 and L2 in Fig. 12. Also, Fig. 14B is a timing chart showing the relationship between the gate control signals G7 to G10 and the currents I6, I7 and I6+I7 of inductors L6 and L7 in Fig. 12.

[0072] As described above, the voltage conversion circuit 3 in FIG. 13 is an interleaved step-up DC / DC converter. To achieve a step-up ratio of 2, as shown in FIG. 14, the gate control signals G7 and G8 for the switch elements S7 and S8 are driven with a duty ratio of 0.5, as shown in FIG. 14. With a duty ratio of 0.5, the triangular wave current flowing through inductors L6 and L7 does not contain even-order harmonic components. Therefore, if the switch elements S7 and S8 are driven with a half-cycle offset (interleaved operation), odd-order harmonic components are also canceled out, and no ripple is generated in the input current from the voltage conversion circuit 3. In other words, the ripple component of the input current of the power conversion circuit 1 is canceled out by the triangular wave current in inductor L2. Therefore, the voltage conversion circuit 3 does not generate a ripple current, and no ripple current propagates to terminals T1 and T2. The cancellation of the triangular wave currents in inductors L1 and L2 is completed by the operation of switch elements S1 to S4. The cancellation of the triangular wave currents in inductors L6 and L7 is completed by the operation of switch elements S7 to S10.

[0073] 14A and the gate control signals G7 to G10 in Fig. 14B do not need to be synchronized with each other, including the drive frequency and timing, and can be operated asynchronously. However, in Fig. 14A, as in the first and second embodiments, the gate control signals G2 and G3 for the ripple cancellation current generation circuit 4A are generated in synchronization with the gate control signals G1 and G4 of the power conversion circuit 1.

[0074] Furthermore, a dedicated noise filter may be provided in front of the input terminals T21 and T22 of the voltage conversion circuit 3 to suppress noise generated by the voltage conversion circuit 3. Because no large current flows through the voltage conversion circuit 3, the noise filter can be implemented in a small size at low cost. For the same reason, the voltage conversion circuit 3 itself can also be implemented in a small size at low cost.

[0075] (Embodiment 4) Fig. 15 is a block diagram showing a configuration example of a power conversion device according to embodiment 4. In Fig. 15, the power conversion device according to embodiment 4 has the following differences compared to the power conversion device according to embodiment 1 in Fig. 1. (1) The ripple canceling current generating circuit 4 is replaced with a ripple canceling current generating circuit 4B. (2) The ripple canceling current generating circuit 4B includes a voltage conversion circuit 3A instead of the power supply device 12. Here, the voltage conversion circuit 3A is an example of a power supply device. The differences will be explained below.

[0076] In Figure 15, a voltage conversion circuit 3A converts the output voltage Vout of the power conversion circuit 1 into an applied voltage V1 and applies it to a capacitor C3. A feature of this embodiment is that the voltage conversion circuit 3A is not directly connected to the input terminals T1 and T2, so that ripple current generated by the voltage conversion circuit 3A does not propagate to the input terminals T1 and T2. In other words, from the perspective of noise suppression, the applied voltage V1 can be easily generated. Therefore, it can be implemented using any general DC / DC converter circuit, and it is sufficient to operate the DC / DC converter so that the output voltage V1 becomes V1 using general control.

[0077] However, unlike in the third embodiment, the step-up / step-down ratio required for the voltage conversion circuit 3A depends on the duty ratio of the switch element S1. Therefore, the voltage conversion circuit 3A needs to be configured so that the step-up / step-down ratio can be changed according to the duty ratio of the gate control signal G1 for the switch element S1.

[0078] As described above, this embodiment has the same effects as those of embodiments 1 to 3, and also has the unique effect of easily generating the applied voltage V1 from the standpoint of noise countermeasures, since the ripple current generated by the voltage conversion circuit 3A does not propagate to the input terminals T1 and T2.

[0079] (Embodiment 5) Fig. 16 is a block diagram showing a configuration example of a power conversion device according to embodiment 5. In Fig. 16, the power conversion device according to embodiment 5 has the following differences compared to the power conversion device according to embodiment 1 in Fig. 1. (1) A power conversion circuit 1B is provided instead of the power conversion circuit 1. The power conversion circuit 1B includes a current detector CS1 between the input terminal T1 and the capacitor C1. (2) A ripple cancellation current generating circuit 4C is provided instead of the ripple cancellation current generating circuit 4. The ripple cancellation current generating circuit 4C includes a power supply device 12C instead of the power supply device 12, and further includes a control circuit 15. Here, the power supply device 12C is configured with a DC / DC converter equipped with a switching circuit including, for example, a gate driver. The differences will be explained below.

[0080] 16, a current detector CS1 detects a current propagating to an input terminal T1 and outputs a current detection signal to a control circuit 15.

[0081] Fig. 17 is a block diagram showing an example of the configuration of control circuit 15 of Fig. 16. In Fig. 17, control circuit 15 is configured to include target voltage setter 20, band-pass filter 21, detector 22, A / D converter 23, subtractor 24, and PWM signal generator 25. Here, control circuit 15 performs control so as to correct applied voltage V1 of power supply device 12C so as to minimize the ripple current, based on a current detection signal corresponding to the current detected by current detector CS1.

[0082] 17, a current detection signal from current detector CS1 is passed through band-pass filter 21 and detector 22 to detect a noise detection signal corresponding to the noise level, and the noise detection signal is converted into a digital signal by an A / D converter and then output to subtractor 24. Subtractor 24 subtracts the digital signal of the noise detection signal from the target voltage signal from target voltage setter 20 and outputs the signal resulting from the subtraction to PWM signal generator 25. PWM signal generator 25 generates a PWM signal (gate control signal) having a duty ratio corresponding to the signal resulting from the subtraction and applies it to the gate driver of the switching circuit of power supply device 12C.

[0083] The control circuit 15 configured as described above performs feedback control to adjust the duty ratio of the PWM signal (gate control signal) that generates the applied voltage V1 of the power supply device 12C by comparing the noise detection signal with the target voltage. This makes it possible to sufficiently suppress the ripple component of the input current even if the inductance values ​​of the inductors L1 and L2 differ from the expected values ​​due to component variations. [Industrial Applicability]

[0084] INDUSTRIAL APPLICABILITY A power conversion device according to the present disclosure is useful for realizing a low-noise, small-sized, low-cost power conversion device for use in in-vehicle equipment, industrial equipment, and the like. [Explanation of symbols]

[0085] 1.1A power conversion circuit 2. Noise Filter 3,3A voltage conversion circuit 4,4A,4B Ripple canceling current generating circuit 5,5A smoothing circuit 10, 10A, 10B control circuit 11, 11-1, 11-2, 11A switching circuit 12,12C power supply 15 Control circuit 20 Target voltage setting device 21 Bandpass Filter 22 Detector 23 A / D converter 24 Subtractor 25 PWM signal generator 31 PWM signal generator 32 Delay Circuit 33,34 Inverter 41~44 Gate drivers C1~C7 capacitors CS1 Current Detector L1~L7 inductors S1~S10 Switch elements T1~T24 terminals

Claims

1. A power conversion device having a pair of input terminals and a pair of output terminals, a first series circuit of a first inductor and a first switch element connected in parallel to the pair of input terminals; and a switching circuit that switches and outputs a voltage across the first switch element using a second switch element, and that converts an input voltage input to the pair of input terminals into a predetermined output voltage and then outputs the output voltage to the pair of output terminals, the power conversion device includes a ripple cancellation current generating circuit that generates a ripple cancellation current that cancels out a ripple current generated by storing and releasing current energy in the first inductor when the first switch element is controlled to be on / off, and inputs the ripple cancellation current to a pair of input terminals of the power conversion device, thereby canceling out the ripple current; The ripple canceling current generating circuit comprises: a second inductor having one end connected to one of the pair of input terminals; a second series circuit connected between the other end of the second inductor and the other of the pair of input terminals, the second series circuit being configured by connecting a third switch element and a first capacitor in series; a third series circuit connected in parallel to the second series circuit, the third series circuit being configured by connecting a fourth switch element and a second capacitor in series; a power supply device that applies a predetermined voltage to the second capacitor; A power conversion device comprising:

2. 2. The power conversion device according to claim 1, further comprising a first control circuit that generates a pair of second gate control signals that are synchronized with a pair of first gate control signals supplied to the first and second switch elements and drive the third and fourth switch elements in an inverted relationship with each other.

3. 3. The power conversion device according to claim 1, wherein when L2=a×L1, where Vin is the input voltage, L1 is the inductance of the first inductor, L2 is the inductance of the second inductor, and a is a positive coefficient, the applied voltage V1 is set to a value between (1+0.5a)×Vin and (1+1.5a)×Vin.

4. 3. The power conversion device according to claim 1, wherein when L2=a×L1, where Vin is the input voltage, L1 is the inductance of the first inductor, L2 is the inductance of the second inductor, and a is a positive coefficient, the applied voltage V1 is set to a value of V1=(1+a)×Vin.

5. 5. The power conversion device according to claim 1, wherein the power conversion circuit is a step-up DC / DC converter.

6. 5. The power conversion device according to claim 1, wherein the power conversion circuit is a step-up / step-down DC / DC converter (SEPIC (Single Ended Primary Inductor Converter)).

7. The power conversion circuit includes: a fourth series circuit including a third inductor and a fifth switch element connected in parallel to the pair of input terminals; The power conversion device according to claim 1 , wherein the switching circuit further switches and outputs the voltage across the fifth switch element using a sixth switch element.

8. 8. The power conversion device according to claim 7, further comprising a second control circuit that generates a pair of second gate control signals in synchronization with two pairs of third gate control signals supplied to the first and second switch elements and the fifth and sixth switch elements, and that drive the third and fourth switch elements in an inverted relationship with each other.

9. 9. The power conversion device according to claim 7, wherein the applied voltage V1 is set to a value between V1=(1+a)×Vin and (1+3a)×Vin, where Vin is the input voltage, L1 is the inductance of the first inductor, L2 is the inductance of the second inductor, and a is a positive coefficient.

10. 9. The power conversion device according to claim 7, wherein the applied voltage V1 is set to a value of V1 = (1 + 2a) × Vin, where Vin is the input voltage, L1 is the inductance of the first inductor, L2 is the inductance of the second inductor, and a is a positive coefficient.

11. The power conversion device according to any one of claims 7 to 10, wherein the power conversion circuit is an interleaved step-up DC / DC converter.

12. The power conversion device according to any one of claims 1 to 11, wherein the power supply device is a voltage conversion circuit that converts the input voltage to the predetermined applied voltage and applies the converted applied voltage to the second capacitor.

13. The power supply device is a voltage conversion circuit that converts the output voltage to the predetermined applied voltage and applies the converted applied voltage to the second capacitor. The power conversion device according to any one of claims 1 to 11.

14. the power conversion circuit further includes a current detector that detects a current at the pair of input terminals; The power conversion device according to any one of claims 1 to 11, wherein the ripple cancellation current generating circuit further includes a third control circuit that adjusts the applied voltage based on the current detected by the current detector.

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