Wafer anti-static device
The anti-static device adjusts wafer transport and static elimination parameters based on measured charge levels to enhance productivity and efficiency in semiconductor manufacturing.
Patent Information
- Application Number
- JP2021185304
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-11-12
- Publication Date
- 2025-12-12
- Estimated Expiration
- 2041-11-12
AI Technical Summary
Conventional static elimination methods using ionizers increase takt time, leading to decreased productivity, and fail to account for variations in wafer type and installation environment, resulting in suboptimal static elimination.
An anti-static device that includes a charge amount measuring means, static elimination means, and control means to adjust wafer transport operation, static elimination air supply, and processing time based on measured charge levels to maintain static electricity below a threshold.
Optimizes static elimination regardless of wafer type or environment, improving productivity by minimizing takt time and ensuring effective charge neutralization.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to an anti-static device for a wafer, and more particularly to an anti-static device for a wafer that is carried in and out of a wafer stage by a transport arm in a semiconductor manufacturing device. [Background technology]
[0002] In semiconductor manufacturing processes, a thin, disk-shaped semiconductor wafer (hereinafter simply referred to as "wafer") is transferred to a wafer mounting table using a transfer arm, and is held on the wafer mounting table for various processes. The wafer placed on the wafer mounting table becomes charged with static electricity for various reasons.
[0003] For example, in semiconductor manufacturing processes, a dicing tape with a die-bonding film adhesive called a die attach film (DAF) is attached to the backside of the wafer, and the dicing tape is expanded to separate the wafer and die attach film into individual chips. During this separation process, static electricity is generated, and the generated static electricity is charged onto the wafer. Furthermore, when the wafer is transported by a transfer arm, friction with the air causes static electricity to build up on the wafer. This static electricity can attract debris to the wafer. Therefore, it is necessary to minimize the amount of charge on the wafer.
[0004] Therefore, conventionally, a method has been known in which an ionizer is used as a static eliminator to reduce the amount of charge on the wafer, and ionized static eliminator air is supplied from the ionizer to eliminate static (see, for example, Patent Document 1).
[0005] As a method of static elimination, the performance of the ionizer (for example, the amount of charge on the wafer 10 seconds after transfer) is measured, the time for static elimination by the ionizer is controlled, and static elimination air is supplied for a predetermined period of time. [Prior art documents] [Patent documents]
[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2017-59841 Summary of the Invention [Problem to be solved by the invention]
[0007] Therefore, in a conventional static elimination method, the amount of charge can be sufficiently reduced by extending the time for applying ionized static elimination air using an ionizer. However, extending the static elimination time using a static elimination device such as an ionizer increases the takt time, which results in a decrease in productivity.
[0008] Furthermore, the amount of charge on a wafer varies depending on the type of wafer (for example, the pattern of the semiconductor chip, the type of tape attached to the wafer, etc.), and can also vary depending on the environment in which the equipment is installed. Therefore, the time for applying static elimination air is generally set to match the workpiece that will have the greatest amount of charge, but this can sometimes take an excessive amount of time to neutralize some wafers. This has led to the problem of poor productivity.
[0009] Therefore, a technical problem has arisen that must be solved in order to provide a wafer anti-static device that can perform optimal static elimination regardless of the type of wafer or the installation environment, and that can improve takt time and productivity, and the present invention aims to solve this problem. [Means for solving the problem]
[0010] The present invention has been proposed to achieve the above object, and the invention described in claim 1 is an anti-static device for a wafer transported by a transport arm, comprising: Placed on the holding table a charge amount measuring means for measuring the amount of static electricity charged on the wafer and outputting the measurement result; The carrier arm is carried out from the holding table. a static elimination means for supplying static elimination air to the wafer to remove the static electricity charged on the wafer; Based on the amount of electrostatic charge measured before the wafer is unloaded,The wafer is transported by the transport arm so that the charge amount is maintained at or below a predetermined threshold. Out and a control means for adjusting at least one of the operation of the charge removal means, the amount of charge removal air supplied by the charge removal means, and the processing time required for processing the wafer.
[0011] According to this configuration, the amount of static electricity stored on a wafer being transported by the transport arm is measured by a charge amount measuring means. The measurement results are input to a control means, which, based on the measurement results, adjusts at least one of the wafer transport operation by the transport arm (e.g., the speed at which the wafer is loaded onto and unloaded from the wafer mounting table), the amount of static-eliminating air supplied by the static-eliminating means, and the process time required for wafer processing. In other words, adjusting the wafer transport operation by the transport arm extends the time the wafer is exposed to static-eliminating air, even if the amount of static-eliminating air supplied to the wafer per unit time by the static-eliminating means is constant, thereby adjusting the total amount of static-eliminating air the wafer is exposed to. This allows for proper static elimination. On the other hand, when the control means adjusts the amount of static-eliminating air supplied by the static-eliminating means (e.g., increasing or decreasing the amount supplied per unit time) based on the measurement results, the total amount of static-eliminating air the wafer is exposed to is adjusted, even if the speed of the wafer transport operation by the transport arm is constant. This allows for proper static elimination. Furthermore, when the control means adjusts the process time required for wafer processing based on the measurement results, the total amount of static elimination air to which the wafer is exposed is adjusted even if the amount of static elimination air supplied by the static elimination means is constant. This allows for appropriate static elimination. Therefore, even if the type of wafer, the semiconductor chip pattern, the type of tape attached to the wafer, or the installation environment changes, optimal static elimination for that wafer can be performed.
[0012] The invention of claim 2 provides an anti-static device for wafers, in the configuration of claim 1, wherein the control means calculates the required supply amount of the static elimination air required to reduce the amount of charge to a predetermined threshold or less, divides the required supply amount of static elimination air by the length of the transport path of the transport arm that passes through the supply range of the static elimination air, and adjusts the speed at which the wafer is transported by the transport arm.
[0013] According to this configuration, the control means calculates the required supply amount of neutralizing air required to reduce the charge amount to a predetermined threshold or below, divides the required supply amount of neutralizing air by the length of the transport path of the transport arm that passes through the neutralizing air supply range, and adjusts the speed at which the wafer is transported by the transport arm.This makes it possible to perform optimal neutralization for the wafer even if the type of wafer, the pattern of the semiconductor chip, the type of tape attached to the wafer, or the installation environment changes.
[0014] A third aspect of the present invention provides the wafer anti-static device according to the first or second aspect, wherein the static elimination means is an ionizer that supplies ionized static elimination air.
[0015] According to this configuration, a static elimination means for supplying ionized static elimination air can be established using a commercially available ionizer. [Effects of the Invention]
[0016] According to the present invention, the charge amount of a wafer is monitored by the charge amount measuring means, and at least one of the wafer transport operation by the transport arm (for example, the speed at which the wafer is loaded onto and unloaded from the wafer mounting table, etc.), the amount of static elimination air supplied by the static elimination means, and the process time required for wafer processing are adjusted. This makes it possible to perform static elimination processing and transport in the shortest time for wafers with a low charge amount, and to extend the static elimination processing time and suppress the amount of charge for wafers with a high charge amount, thereby making it possible to make adjustments such as reducing the speed at which the wafer is transported by the transport arm or extending the static elimination time.As a result, optimal static elimination can be performed regardless of the type of wafer or installation environment, thereby improving takt time and increasing productivity. [Brief explanation of the drawings]
[0017] [Figure 1] 1 is a perspective view showing a configuration of a main part of a wafer transport and holding device to which a wafer charging prevention device according to an embodiment of the present invention is applied; [Figure 2] FIG. 2 is a plan view of the wafer transport and holding device shown in FIG. [Figure 3] FIG. 2 is a front view of the wafer transport and holding device shown in FIG. [Figure 4] FIG. 2 is a side view of the wafer transport and holding device shown in FIG. [Figure 5] 1 is a block diagram showing a system configuration of a wafer charging prevention device according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION
[0018] To achieve the object of the present invention to provide an anti-static device for wafers that can perform optimal static elimination regardless of the type of wafer or the installation environment, and that can improve takt time and productivity, the present invention provides an anti-static device for wafers transported by a transport arm, comprising: charge amount measuring means that measures the amount of static electricity stored on the wafer and outputs the measurement result; static elimination means that supplies static elimination air to the wafer to remove the static electricity stored on the wafer; and control means that adjusts at least one of the wafer transport operation by the transport arm, the amount of static elimination air supplied by the static elimination means, or the process time required to process the wafer, so as to maintain the amount of static electricity at or below a predetermined threshold. [Example]
[0019] An embodiment of the present invention will be described in detail below with reference to the accompanying drawings. In the following embodiment, when the number, value, amount, range, etc. of components is mentioned, the number is not limited to the specific number, and may be more or less than the specific number, unless otherwise specified or when it is clearly limited to a specific number in principle.
[0020] Furthermore, when referring to the shape or positional relationship of components, etc., it includes things that are substantially similar or approximate to those shapes, etc., unless otherwise specified or when it is clearly considered otherwise in principle.
[0021] In addition, the drawings may exaggerate characteristic parts to make the features easier to understand, and the dimensional proportions of the components may not be the same as in reality. In addition, in cross-sectional views, hatching of some components may be omitted to make the cross-sectional structure of the components easier to understand.
[0022] In the following description, expressions indicating directions such as up, down, left, and right are not absolute, but are appropriate when each part of the wafer transport and holding device to which the wafer charging prevention device of the present invention is applied is in the posture depicted, but if the posture changes, they should be interpreted accordingly. Furthermore, the same elements are given the same symbols throughout the description of the embodiments.
[0023] 1 to 4 show a wafer transport / holding device to which the wafer charging prevention device according to the present invention is applied, with FIG. 1 being an external perspective view of the wafer transport / holding device, FIG. 2 being a plan view of the wafer transport / holding device, FIG. 3 being a front view of the wafer transport / holding device, and FIG. 4 being a side view of the wafer transport / holding device. Also, FIG. 5 is a block diagram showing the system configuration of the wafer charging prevention device according to an embodiment of the present invention. In the following explanation, the left-right direction in FIG. 3 will be referred to as the left-right direction of the device, the up-down direction as the up-down direction, and the direction perpendicular to the plane of the paper as the front-rear direction.
[0024] 1 to 4, a wafer transport and holding device 10 incorporating a wafer antistatic device 11 according to an embodiment of the present invention includes a vacuum suction-type chuck table 12 as a wafer mounting table that applies negative air pressure (negative pressure) to suction-hold a wafer W and perform various processes thereon, a wafer transport mechanism 13 as a wafer transport means that transports and sets the wafer W from the previous processing step onto the chuck table 12, a charge amount measuring device 14 as a charge amount measuring means that measures the amount of static electricity stored on the wafer W on the chuck table 12, a static eliminator 15 as a static eliminator that supplies static eliminator air to the wafer W transported from the chuck table 12 by the wafer transport mechanism 13 to remove static electricity stored on the wafer W, and a control device 16 as a control means. The wafer W is formed by cutting an ingot of semiconductor material into a thin plate along the crystal axis and polishing it to have a roughly circular shape, but the wafer W placed on the chuck table 12 is not shown in FIGS.
[0025] 1 and 2, the chuck table 12 is a disk-shaped table. The chuck table 12 includes a disk-shaped holding table 12a having an outer diameter larger than that of the wafer W, and a suction portion 12b that is exposed on the upper surface of the holding table 12a (the surface on which the wafer W is placed).
[0026] The suction portion 12b of the chuck table 12 is formed in a disk shape with an outer diameter substantially the same as that of the wafer W. The suction portion 12b is provided with a plurality of suction grooves (not shown) and suction holes (not shown) communicating with the plurality of grooves. A wafer suction vacuum line (not shown) provided in the holding table 12a is connected to the suction holes. Therefore, the suction holes function as suction ports of the wafer suction vacuum line.
[0027] Although not shown, the wafer suction vacuum line is provided with a pressure gauge, a valve, and a vacuum source in that order, and these suction holes, wafer suction vacuum line, pressure gauge, valve, vacuum source, etc. constitute a wafer vacuum suction means. That is, the wafer vacuum suction means applies negative pressure to suction portion 12b, and can suck and hold wafer W placed on suction portion 12b of chuck table 12 while the negative pressure is being applied.
[0028] As shown in FIGS. 1 to 4, the wafer transfer mechanism 13 includes a transfer arm 17, a wafer chuck unit 18, and a robot arm 19.
[0029] One end (base end) of the transfer arm 17 is rotatably attached to, for example, a robot arm 19 via a pivot 20, and is provided with wafer chuck units 18 on both the left and right sides of the other end. The transfer arm 17 holds the wafer W by gripping the outer periphery of the wafer W via the wafer chuck units 18, and is movable from a required position (pre-process position) to a required position (main process position) and / or from the required position (main process position) to a required position (post-process position) by movement of the robot arm 19. That is, by movement of the robot arm 19, the wafer W before processing can be moved from the pre-process position onto the chuck table 12, and the processed wafer W can be moved from the chuck table 12 to a post-process position provided at a required position.
[0030] The charge amount measuring device 14 is a charge amount measuring means that measures the amount of static electricity charged on the wafer W placed on the chuck table 12 and outputs the measurement result. As shown in FIGS. 1 to 4 , the charge amount measuring device 14 is attached to one end of the transfer arm 17 above the wafer W held by the wafer chuck unit 18 and in a state lying approximately parallel to the upper surface of the wafer W. The charge amount measuring device 14 continuously or intermittently measures the amount of static electricity charged on the wafer W held by the wafer chuck unit 18 and outputs the measurement result to the control device 16 in real time.
[0031] 1 to 4, the static eliminator 15 is disposed at one end of the transfer arm 17 and at a distance from the outside of the chuck table 12. In this embodiment, an ionizer is used as the static eliminator 15. The ionizer sprays ionized static eliminator air toward the wafer W held by the chuck table 12 and the wafer W held by the wafer chuck unit 18, and can use the static eliminator air to eliminate static electricity charged on the wafer W, etc.
[0032] The control device 16, which is, for example, a computer, performs the central processing function of controlling the overall operation of the wafer transport and holding device 10. The control device 16 also has a program installed therein that controls the wafer transport and holding device 10 in accordance with a predetermined procedure. As shown in the block diagram of the system configuration of the wafer anti-static device in FIG. 5, the control device 16 is controllably connected to the suction unit 12b of the chuck table 12, the wafer transport mechanism 13, the charge amount measuring device 14, and the static eliminator 15.
[0033] Next, the operation of the wafer charging prevention device 11 according to the present invention will be described. The operation here is performed in accordance with a predetermined procedure by a program installed in the control device 16. First, the wafer W before processing is held by the wafer chuck portion 18 of the transfer arm 17, transported from the pre-processing position toward the chuck table 12, and loaded onto the holding table 12a of the chuck table 12. Once the wafer W is placed on the holding table 12a, the wafer suction vacuum line is turned on, and the wafer W is suction-held on the holding table 12a.
[0034] When the wafer W is sucked and held on the holding table 12a, the holding by the transfer arm 17 is released, and predetermined processing of the wafer W is started. At the same time, the charge amount measuring device 14 starts measuring the amount of static electricity charged on the wafer W placed on the holding table 12a, and the measurement result is output to the control device 16.
[0035] When the predetermined processing of the wafer W is completed, the control device 16 controls the wafer transfer mechanism 13 to start transferring the wafer W from the holding table 12a by the transfer arm 17, i.e., moving it to a post-processing position. At this time, the control device 16 determines whether the amount of static electricity charged on the processed wafer W exceeds a threshold value (e.g., 250 volts) based on the measurement result by the charge amount measuring device 14. The control device 16 also activates the static eliminator (ionizer) 15 to emit static eliminator air.
[0036] If the charge amount of the wafer W is below the threshold (below 250 volts), the control device 16 controls the wafer transfer mechanism 13 to have the transfer arm 17 hold the wafer W and transfer it out at a normal transfer speed, for example, 1 mm / sec, which is set when passing through the area of the static eliminator air emitted from the static eliminator 15. At this time, the wafer W is exposed to the static eliminator air emitted from the static eliminator 15 to be neutralized, and is transferred out to the subsequent process in a neutralized state.
[0037] On the other hand, if the amount of charge on the wafer W exceeds the threshold (250 volts or more), the control device 16 controls the wafer transfer mechanism 13 to decelerate (adjust) the transfer speed of the wafer W as it passes through the area of the static elimination air to a speed lower than 1 mm / sec, for example, 0.5 mm / sec, and transfer the wafer W. This deceleration adjustment increases the transfer time of the wafer W passing through the area of the static elimination air, i.e., the time the wafer W is exposed to the static elimination air, thereby improving the static elimination effect on the wafer W. It also prevents static electricity from being generated on the wafer W when the transfer arm 17 suddenly lifts the wafer W from the holding table 12a. This completes one cycle of operation, and the same operation is repeated again.
[0038] It should be noted that the speed at which the wafer W is transported by the wafer transport mechanism 13 is merely an example, and the timing at which the measurement by the charge amount measuring device 14 starts and stops, and the timing at which the supply of neutralizing air released from the neutralizer 15 starts and stops may also be changed depending on the type of wafer (e.g., the pattern of the semiconductor chip, the type of tape attached to the wafer, etc.).
[0039] In addition, the control device 16 adjusts the speed at which the wafer W is loaded and unloaded by the transfer arm 17 of the wafer transfer mechanism 13 based on the measurement results obtained by the charge amount measuring device 14, which is a charge amount measuring means, to adjust the time that the wafer W is exposed to the charge-eliminating air from the charge eliminator 15. However, in addition to this, the control device 16 may also adjust the supply of charge-eliminating air to the wafer W using, for example, any of the following means (1) to (3). (1) The speed at which the wafer W is carried in and out by the transport arm 17 is fixed, and the amount of neutralizing air supplied from the neutralizer 15 is adjusted based on the measurement results obtained by the charge amount measuring device 14, thereby adjusting the amount of neutralizing air that the wafer W is exposed to per unit time. (2) Based on the measurement results obtained by the charge amount measuring device 14, the required supply amount of de-ionizing air necessary to reduce the charge amount to a predetermined threshold or less is calculated, and the required supply amount of de-ionizing air is divided by the length of the transport path of the transport arm 17 passing through the supply range of the de-ionizing air, thereby adjusting the transport speed of the wafer W by the transport arm 17. (3) Based on the measurement results obtained by the charge amount measuring device 14, the process time required to process the wafer W (for example, the time the wafer W waits on the chuck table 12) is adjusted.
[0040] Therefore, in the wafer antistatic device 11 of this embodiment, the amount of static electricity charged on the wafer W placed on the chuck table (holding table 12a), which is a wafer mounting table, is monitored by a charge amount measuring device 14, which is a charge amount measuring means, and the measurement result is output to a control device 16, which is a control means. Then, based on the measurement result, the control device 16 adjusts at least one of the transport operation (including speed, path, etc.) of the wafer W by the transport arm 17, the amount of static eliminator air supplied by the static eliminator 15, or the process time required to process the wafer W (e.g., the waiting time on the chuck table 12), thereby adjusting the total amount of static eliminator air to which the wafer W is exposed, thereby performing appropriate static elimination. As a result, even if the type of wafer W, the pattern of the semiconductor chip, the type of tape attached to the wafer W, or the facility environment changes, the optimal static elimination required for the wafer can be performed.
[0041] Furthermore, the present invention can be modified in various ways without departing from the spirit of the present invention, and it goes without saying that the present invention also covers such modifications. [Explanation of symbols]
[0042] 10: Wafer transport and holding device 11: Anti-static device 12: Chuck table (wafer placement table) 12a: Holding table 12b: Suction part 13: Wafer transport mechanism (wafer transport means) 14: Charge amount measuring device (charge amount measuring means) 15: Static eliminator (static eliminator) 16: Control device (control means) 17: Transfer arm 18: Wafer chuck part 19: Robot arm 20: Axis W: Wafer
Claims
1. An anti-static device for a wafer transported by a transport arm, comprising: a charge amount measuring means for measuring the amount of static electricity charged on the wafer placed on the holding table and outputting the measurement result; a static elimination unit that supplies static elimination air to the wafer transferred from the holding table by the transfer arm to remove static electricity from the wafer; a control means for adjusting at least one of the operation of carrying out the wafer by the transfer arm, the amount of neutralizing air supplied by the neutralization means, or the process time required to process the wafer, based on the amount of electrostatic charge measured before the wafer is carried out, so as to maintain the amount of electrostatic charge at or below a predetermined threshold; 1. A wafer charging prevention device comprising:
2. 2. The wafer anti-static device according to claim 1, wherein the control means calculates the required supply amount of the static elimination air required to reduce the amount of charge to a predetermined threshold or less, divides the required supply amount of static elimination air by the length of the transport path of the transport arm that passes through the supply range of the static elimination air, and adjusts the speed at which the wafer is transported by the transport arm.
3. 3. The apparatus for preventing charging of a wafer according to claim 1, wherein the charge eliminating means is an ionizer that supplies ionized charge eliminating air.
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